[igt-dev] [PATCH i-g-t v3 0/2] Shared reset domain

[igt-dev] [PATCH i-g-t v3 0/2] Shared reset domain

[priyanka.dandamudi]

From: Priyanka Dandamudi <priyanka.dandamudi@intel.com>

Add lib to check for shared reset domain and 
igt_require condition to skip test when non preemption 
spinner submitted to all engines having shared reset domain.

v2: Some minox fixes.

v3: Added logic for multiple CCS.

Priyanka Dandamudi (2):
  lib/igt_gt: Check for shared reset domain
  tests/i915/gem_ctx_exec: Skip test for shared reset domain

 lib/igt_gt.c              | 20 ++++++++++++++++++++
 lib/igt_gt.h              |  2 ++
 tests/i915/gem_ctx_exec.c |  5 +++++
 3 files changed, 27 insertions(+)

-- 
2.25.1

[igt-dev] [PATCH i-g-t v3 1/2] lib/igt_gt: Check for shared reset domain

[priyanka.dandamudi]

From: Priyanka Dandamudi <priyanka.dandamudi@intel.com>

Function to check if a platform has shared reset domain.

v2: Some minor fixes (Ashutosh)

v3: Add logic for multiple CCS (Roper Matt)

Signed-off-by: Priyanka Dandamudi <priyanka.dandamudi@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
Cc: Melkaveri, Arjun <arjun.melkaveri@intel.com>
---
 lib/igt_gt.c | 20 ++++++++++++++++++++
 lib/igt_gt.h |  2 ++
 2 files changed, 22 insertions(+)

diff --git a/lib/igt_gt.c b/lib/igt_gt.c
index 7c7df95e..2cf7be2b 100644
--- a/lib/igt_gt.c
+++ b/lib/igt_gt.c
@@ -637,3 +637,23 @@ int gem_execbuf_flags_to_engine_class(unsigned int flags)
 		igt_assert(0);
 	}
 }
+
+bool has_shared_reset_domain(int fd, const intel_ctx_t *ctx)
+{
+	const struct intel_execution_engine2 *e;
+	bool rcs0 = false;
+	bool ccs0 = false;
+	int ccs_count = 0;
+
+	for_each_ctx_engine(fd, ctx, e) {
+		if ((rcs0 && ccs0) || (ccs_count > 1))
+			break;
+		else if (e->class == I915_ENGINE_CLASS_RENDER)
+			rcs0 = true;
+		else if (e->class == I915_ENGINE_CLASS_COMPUTE) {
+			ccs0 = true;
+			ccs_count++;
+		}
+	}
+	return ((rcs0 && ccs0) || (ccs_count > 1));
+}
diff --git a/lib/igt_gt.h b/lib/igt_gt.h
index c5059817..f0340552 100644
--- a/lib/igt_gt.h
+++ b/lib/igt_gt.h
@@ -84,4 +84,6 @@ extern const struct intel_execution_engine2 {
 
 int gem_execbuf_flags_to_engine_class(unsigned int flags);
 
+bool has_shared_reset_domain(int fd, const intel_ctx_t *ctx);
+
 #endif /* IGT_GT_H */
-- 
2.25.1

[igt-dev] [PATCH i-g-t v3 2/2] tests/i915/gem_ctx_exec: Skip test for shared reset domain

[priyanka.dandamudi]

From: Priyanka Dandamudi <priyanka.dandamudi@intel.com>

The test tries to submit non-preemptible spinneris to all engines,
causes a hang and expects the non-preemptible spinners to survive
but fails to do for RCS+CCS.
So, updated the code to skip nohangcheck subtest for a platform with RCS+CCS.

v2: Some minor fixes (Ashutosh).

v3: Updated code to skip test only for RCS/CCS (Roper Matt)

Signed-off-by: Priyanka Dandamudi <priyanka.dandamudi@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
Cc: Melkaveri, Arjun <arjun.melkaveri@intel.com>
---
 tests/i915/gem_ctx_exec.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/tests/i915/gem_ctx_exec.c b/tests/i915/gem_ctx_exec.c
index a1270a88..0b2b7e10 100644
--- a/tests/i915/gem_ctx_exec.c
+++ b/tests/i915/gem_ctx_exec.c
@@ -276,6 +276,7 @@ static void nohangcheck_hostile(int i915)
 	int err = 0;
 	int dir;
 	uint64_t ahnd;
+	bool has_sh_do = false;
 
 	/*
 	 * Even if the user disables hangcheck during their context,
@@ -292,11 +293,15 @@ static void nohangcheck_hostile(int i915)
 	ahnd = get_reloc_ahnd(i915, ctx->id);
 
 	igt_require(__enable_hangcheck(dir, false));
+	has_sh_do = has_shared_reset_domain(i915, ctx);
 
 	for_each_ctx_engine(i915, ctx, e) {
 		igt_spin_t *spin;
 		int new;
 
+		if (has_sh_do && (e->class == I915_ENGINE_CLASS_RENDER ||
+			    e->class == I915_ENGINE_CLASS_COMPUTE))
+			continue;
 		/* Set a fast hang detection for a dead context */
 		gem_engine_property_printf(i915, e->name,
 					   "preempt_timeout_ms", "%d", 50);
-- 
2.25.1

[igt-dev] ✓ Fi.CI.BAT: success for Shared reset domain (rev3)

[Patchwork]

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== Series Details ==

Series: Shared reset domain (rev3)
URL   : https://patchwork.freedesktop.org/series/98612/
State : success

== Summary ==

CI Bug Log - changes from IGT_6327 -> IGTPW_6558
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/index.html

Participating hosts (45 -> 43)
------------------------------

  Additional (2): fi-kbl-soraka fi-pnv-d510 
  Missing    (4): fi-ctg-p8600 fi-bsw-cyan fi-bdw-samus fi-hsw-4200u 

Known issues
------------

  Here are the changes found in IGTPW_6558 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@amdgpu/amd_basic@cs-gfx:
    - fi-hsw-4770:        NOTRUN -> [SKIP][1] ([fdo#109271] / [fdo#109315]) +17 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/fi-hsw-4770/igt@amdgpu/amd_basic@cs-gfx.html

  * igt@amdgpu/amd_basic@semaphore:
    - fi-bdw-5557u:       NOTRUN -> [SKIP][2] ([fdo#109271]) +31 similar issues
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/fi-bdw-5557u/igt@amdgpu/amd_basic@semaphore.html

  * igt@gem_exec_fence@basic-busy@bcs0:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][3] ([fdo#109271]) +8 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/fi-kbl-soraka/igt@gem_exec_fence@basic-busy@bcs0.html

  * igt@gem_huc_copy@huc-copy:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][4] ([fdo#109271] / [i915#2190])
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/fi-kbl-soraka/igt@gem_huc_copy@huc-copy.html

  * igt@gem_lmem_swapping@basic:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][5] ([fdo#109271] / [i915#4613]) +3 similar issues
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/fi-kbl-soraka/igt@gem_lmem_swapping@basic.html

  * igt@i915_module_load@reload:
    - fi-bxt-dsi:         [PASS][6] -> [DMESG-WARN][7] ([i915#1982])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6327/fi-bxt-dsi/igt@i915_module_load@reload.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/fi-bxt-dsi/igt@i915_module_load@reload.html

  * igt@i915_selftest@live@gt_pm:
    - fi-kbl-soraka:      NOTRUN -> [DMESG-FAIL][8] ([i915#1886] / [i915#2291])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html

  * igt@i915_selftest@live@hangcheck:
    - fi-snb-2600:        [PASS][9] -> [INCOMPLETE][10] ([i915#3921])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6327/fi-snb-2600/igt@i915_selftest@live@hangcheck.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/fi-snb-2600/igt@i915_selftest@live@hangcheck.html

  * igt@kms_chamelium@common-hpd-after-suspend:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][11] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/fi-kbl-soraka/igt@kms_chamelium@common-hpd-after-suspend.html

  * igt@kms_chamelium@dp-crc-fast:
    - fi-bdw-5557u:       NOTRUN -> [SKIP][12] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/fi-bdw-5557u/igt@kms_chamelium@dp-crc-fast.html

  * igt@kms_flip@basic-flip-vs-dpms:
    - fi-kbl-8809g:       NOTRUN -> [SKIP][13] ([fdo#109271]) +3 similar issues
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/fi-kbl-8809g/igt@kms_flip@basic-flip-vs-dpms.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-b:
    - fi-kbl-8809g:       [PASS][14] -> [SKIP][15] ([fdo#109271]) +15 similar issues
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6327/fi-kbl-8809g/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-b.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/fi-kbl-8809g/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-b.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][16] ([fdo#109271] / [i915#533])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/fi-kbl-soraka/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html
    - fi-kbl-8809g:       [PASS][17] -> [SKIP][18] ([fdo#109271] / [i915#533])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6327/fi-kbl-8809g/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/fi-kbl-8809g/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html

  * igt@kms_psr@primary_page_flip:
    - fi-skl-6600u:       [PASS][19] -> [FAIL][20] ([i915#4547])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6327/fi-skl-6600u/igt@kms_psr@primary_page_flip.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/fi-skl-6600u/igt@kms_psr@primary_page_flip.html

  * igt@prime_vgem@basic-userptr:
    - fi-pnv-d510:        NOTRUN -> [SKIP][21] ([fdo#109271]) +57 similar issues
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/fi-pnv-d510/igt@prime_vgem@basic-userptr.html

  
#### Possible fixes ####

  * igt@core_hotunplug@unbind-rebind:
    - fi-elk-e7500:       [FAIL][22] ([i915#3194]) -> [PASS][23]
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6327/fi-elk-e7500/igt@core_hotunplug@unbind-rebind.html
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/fi-elk-e7500/igt@core_hotunplug@unbind-rebind.html
    - fi-kbl-8809g:       [DMESG-WARN][24] -> [PASS][25]
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6327/fi-kbl-8809g/igt@core_hotunplug@unbind-rebind.html
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/fi-kbl-8809g/igt@core_hotunplug@unbind-rebind.html

  * igt@i915_selftest@live@hangcheck:
    - fi-hsw-4770:        [INCOMPLETE][26] ([i915#4785]) -> [PASS][27]
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6327/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html

  * igt@i915_selftest@live@hugepages:
    - {bat-adlp-6}:       [DMESG-WARN][28] ([i915#1888]) -> [PASS][29]
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6327/bat-adlp-6/igt@i915_selftest@live@hugepages.html
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/bat-adlp-6/igt@i915_selftest@live@hugepages.html

  * igt@kms_addfb_basic@too-high:
    - fi-kbl-8809g:       [FAIL][30] -> [PASS][31] +2 similar issues
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6327/fi-kbl-8809g/igt@kms_addfb_basic@too-high.html
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/fi-kbl-8809g/igt@kms_addfb_basic@too-high.html

  * igt@kms_addfb_basic@unused-modifier:
    - fi-kbl-8809g:       [SKIP][32] ([fdo#109271]) -> [PASS][33] +18 similar issues
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6327/fi-kbl-8809g/igt@kms_addfb_basic@unused-modifier.html
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/fi-kbl-8809g/igt@kms_addfb_basic@unused-modifier.html

  * igt@kms_force_connector_basic@force-connector-state:
    - fi-kbl-8809g:       [DMESG-FAIL][34] -> [PASS][35]
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6327/fi-kbl-8809g/igt@kms_force_connector_basic@force-connector-state.html
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/fi-kbl-8809g/igt@kms_force_connector_basic@force-connector-state.html

  * igt@kms_force_connector_basic@force-edid:
    - fi-kbl-8809g:       [CRASH][36] -> [PASS][37]
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6327/fi-kbl-8809g/igt@kms_force_connector_basic@force-edid.html
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/fi-kbl-8809g/igt@kms_force_connector_basic@force-edid.html

  
#### Warnings ####

  * igt@runner@aborted:
    - fi-skl-6600u:       [FAIL][38] ([i915#1436] / [i915#4312]) -> [FAIL][39] ([i915#4312])
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6327/fi-skl-6600u/igt@runner@aborted.html
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/fi-skl-6600u/igt@runner@aborted.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
  [i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886
  [i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888
  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#2291]: https://gitlab.freedesktop.org/drm/intel/issues/2291
  [i915#3194]: https://gitlab.freedesktop.org/drm/intel/issues/3194
  [i915#3921]: https://gitlab.freedesktop.org/drm/intel/issues/3921
  [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
  [i915#4547]: https://gitlab.freedesktop.org/drm/intel/issues/4547
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#4785]: https://gitlab.freedesktop.org/drm/intel/issues/4785
  [i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_6327 -> IGTPW_6558

  CI-20190529: 20190529
  CI_DRM_11088: 31b826a55fd46e5e2fc21720a466946f9ccfe557 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_6558: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/index.html
  IGT_6327: 0d559158c2d3b5723abbfc2cb4b04532e28663b2 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/index.html

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[igt-dev] ✓ Fi.CI.IGT: success for Shared reset domain (rev3)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 30244 bytes --]

== Series Details ==

Series: Shared reset domain (rev3)
URL   : https://patchwork.freedesktop.org/series/98612/
State : success

== Summary ==

CI Bug Log - changes from IGT_6327_full -> IGTPW_6558_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/index.html

Participating hosts (8 -> 8)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_6558_full:

### IGT changes ###

#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@i915_pm_dc@dc6-psr:
    - {shard-tglu}:       NOTRUN -> [SKIP][1]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-tglu-1/igt@i915_pm_dc@dc6-psr.html

  * igt@runner@aborted:
    - {shard-tglu}:       ([FAIL][2], [FAIL][3], [FAIL][4], [FAIL][5]) ([i915#3002] / [i915#3690] / [i915#4312]) -> ([FAIL][6], [FAIL][7], [FAIL][8]) ([i915#3002] / [i915#4312])
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6327/shard-tglu-3/igt@runner@aborted.html
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6327/shard-tglu-1/igt@runner@aborted.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6327/shard-tglu-4/igt@runner@aborted.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6327/shard-tglu-7/igt@runner@aborted.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-tglu-4/igt@runner@aborted.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-tglu-7/igt@runner@aborted.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-tglu-2/igt@runner@aborted.html

  
Known issues
------------

  Here are the changes found in IGTPW_6558_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@feature_discovery@chamelium:
    - shard-tglb:         NOTRUN -> [SKIP][9] ([fdo#111827])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-tglb7/igt@feature_discovery@chamelium.html

  * igt@gem_eio@unwedge-stress:
    - shard-tglb:         [PASS][10] -> [FAIL][11] ([i915#232])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6327/shard-tglb7/igt@gem_eio@unwedge-stress.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-tglb2/igt@gem_eio@unwedge-stress.html
    - shard-iclb:         [PASS][12] -> [TIMEOUT][13] ([i915#2481] / [i915#3070])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6327/shard-iclb8/igt@gem_eio@unwedge-stress.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-iclb3/igt@gem_eio@unwedge-stress.html

  * igt@gem_exec_balancer@parallel-ordering:
    - shard-kbl:          NOTRUN -> [FAIL][14] ([i915#4916])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-kbl6/igt@gem_exec_balancer@parallel-ordering.html

  * igt@gem_exec_balancer@parallel-out-fence:
    - shard-iclb:         [PASS][15] -> [SKIP][16] ([i915#4525]) +3 similar issues
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6327/shard-iclb1/igt@gem_exec_balancer@parallel-out-fence.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-iclb3/igt@gem_exec_balancer@parallel-out-fence.html

  * igt@gem_exec_fair@basic-none-share:
    - shard-snb:          NOTRUN -> [SKIP][17] ([fdo#109271]) +107 similar issues
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-snb7/igt@gem_exec_fair@basic-none-share.html

  * igt@gem_exec_fair@basic-none-share@rcs0:
    - shard-iclb:         NOTRUN -> [FAIL][18] ([i915#2842])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-iclb4/igt@gem_exec_fair@basic-none-share@rcs0.html
    - shard-tglb:         NOTRUN -> [FAIL][19] ([i915#2842])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-tglb8/igt@gem_exec_fair@basic-none-share@rcs0.html

  * igt@gem_exec_fair@basic-none-solo@rcs0:
    - shard-apl:          NOTRUN -> [FAIL][20] ([i915#2842])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-apl3/igt@gem_exec_fair@basic-none-solo@rcs0.html

  * igt@gem_exec_fair@basic-pace-share@rcs0:
    - shard-glk:          NOTRUN -> [FAIL][21] ([i915#2842]) +1 similar issue
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-glk1/igt@gem_exec_fair@basic-pace-share@rcs0.html

  * igt@gem_exec_fair@basic-pace-solo@rcs0:
    - shard-iclb:         [PASS][22] -> [FAIL][23] ([i915#2842])
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6327/shard-iclb4/igt@gem_exec_fair@basic-pace-solo@rcs0.html
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-iclb8/igt@gem_exec_fair@basic-pace-solo@rcs0.html

  * igt@gem_exec_fair@basic-pace@vcs1:
    - shard-kbl:          [PASS][24] -> [FAIL][25] ([i915#2842])
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6327/shard-kbl4/igt@gem_exec_fair@basic-pace@vcs1.html
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-kbl3/igt@gem_exec_fair@basic-pace@vcs1.html

  * igt@gem_exec_params@no-blt:
    - shard-tglb:         NOTRUN -> [SKIP][26] ([fdo#109283])
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-tglb8/igt@gem_exec_params@no-blt.html
    - shard-iclb:         NOTRUN -> [SKIP][27] ([fdo#109283])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-iclb5/igt@gem_exec_params@no-blt.html

  * igt@gem_exec_whisper@basic-forked:
    - shard-glk:          [PASS][28] -> [DMESG-WARN][29] ([i915#118]) +1 similar issue
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6327/shard-glk3/igt@gem_exec_whisper@basic-forked.html
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-glk2/igt@gem_exec_whisper@basic-forked.html

  * igt@gem_lmem_swapping@basic:
    - shard-iclb:         NOTRUN -> [SKIP][30] ([i915#4613]) +1 similar issue
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-iclb4/igt@gem_lmem_swapping@basic.html
    - shard-kbl:          NOTRUN -> [SKIP][31] ([fdo#109271] / [i915#4613]) +2 similar issues
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-kbl3/igt@gem_lmem_swapping@basic.html
    - shard-tglb:         NOTRUN -> [SKIP][32] ([i915#4613]) +1 similar issue
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-tglb5/igt@gem_lmem_swapping@basic.html

  * igt@gem_lmem_swapping@parallel-multi:
    - shard-apl:          NOTRUN -> [SKIP][33] ([fdo#109271] / [i915#4613]) +1 similar issue
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-apl8/igt@gem_lmem_swapping@parallel-multi.html
    - shard-glk:          NOTRUN -> [SKIP][34] ([fdo#109271] / [i915#4613]) +1 similar issue
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-glk2/igt@gem_lmem_swapping@parallel-multi.html

  * igt@gem_pwrite@basic-exhaustion:
    - shard-apl:          NOTRUN -> [WARN][35] ([i915#2658])
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-apl8/igt@gem_pwrite@basic-exhaustion.html

  * igt@gem_render_copy@y-tiled-mc-ccs-to-vebox-y-tiled:
    - shard-iclb:         NOTRUN -> [SKIP][36] ([i915#768]) +2 similar issues
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-iclb5/igt@gem_render_copy@y-tiled-mc-ccs-to-vebox-y-tiled.html

  * igt@gem_userptr_blits@dmabuf-sync:
    - shard-iclb:         NOTRUN -> [SKIP][37] ([i915#3323])
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-iclb4/igt@gem_userptr_blits@dmabuf-sync.html
    - shard-apl:          NOTRUN -> [SKIP][38] ([fdo#109271] / [i915#3323])
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-apl1/igt@gem_userptr_blits@dmabuf-sync.html

  * igt@gem_userptr_blits@vma-merge:
    - shard-glk:          NOTRUN -> [FAIL][39] ([i915#3318])
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-glk9/igt@gem_userptr_blits@vma-merge.html
    - shard-kbl:          NOTRUN -> [FAIL][40] ([i915#3318])
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-kbl6/igt@gem_userptr_blits@vma-merge.html

  * igt@gen7_exec_parse@basic-allowed:
    - shard-tglb:         NOTRUN -> [SKIP][41] ([fdo#109289])
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-tglb2/igt@gen7_exec_parse@basic-allowed.html

  * igt@gen7_exec_parse@oacontrol-tracking:
    - shard-iclb:         NOTRUN -> [SKIP][42] ([fdo#109289]) +1 similar issue
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-iclb5/igt@gen7_exec_parse@oacontrol-tracking.html

  * igt@gen9_exec_parse@secure-batches:
    - shard-iclb:         NOTRUN -> [SKIP][43] ([i915#2856])
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-iclb2/igt@gen9_exec_parse@secure-batches.html
    - shard-tglb:         NOTRUN -> [SKIP][44] ([i915#2527] / [i915#2856])
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-tglb7/igt@gen9_exec_parse@secure-batches.html

  * igt@i915_pm_backlight@bad-brightness:
    - shard-glk:          NOTRUN -> [SKIP][45] ([fdo#109271]) +95 similar issues
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-glk4/igt@i915_pm_backlight@bad-brightness.html

  * igt@i915_pm_dc@dc3co-vpb-simulation:
    - shard-apl:          NOTRUN -> [SKIP][46] ([fdo#109271] / [i915#658])
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-apl8/igt@i915_pm_dc@dc3co-vpb-simulation.html

  * igt@kms_big_fb@linear-32bpp-rotate-0:
    - shard-glk:          NOTRUN -> [DMESG-WARN][47] ([i915#118])
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-glk2/igt@kms_big_fb@linear-32bpp-rotate-0.html

  * igt@kms_big_fb@linear-8bpp-rotate-270:
    - shard-iclb:         NOTRUN -> [SKIP][48] ([fdo#110725] / [fdo#111614]) +1 similar issue
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-iclb4/igt@kms_big_fb@linear-8bpp-rotate-270.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip:
    - shard-kbl:          NOTRUN -> [SKIP][49] ([fdo#109271] / [i915#3777]) +1 similar issue
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-kbl4/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip.html

  * igt@kms_big_fb@yf-tiled-8bpp-rotate-180:
    - shard-tglb:         NOTRUN -> [SKIP][50] ([fdo#111615]) +3 similar issues
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-tglb8/igt@kms_big_fb@yf-tiled-8bpp-rotate-180.html

  * igt@kms_big_fb@yf-tiled-8bpp-rotate-270:
    - shard-iclb:         NOTRUN -> [SKIP][51] ([fdo#110723]) +4 similar issues
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-iclb7/igt@kms_big_fb@yf-tiled-8bpp-rotate-270.html

  * igt@kms_big_joiner@basic:
    - shard-iclb:         NOTRUN -> [SKIP][52] ([i915#2705])
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-iclb6/igt@kms_big_joiner@basic.html

  * igt@kms_ccs@pipe-a-bad-rotation-90-y_tiled_gen12_rc_ccs_cc:
    - shard-kbl:          NOTRUN -> [SKIP][53] ([fdo#109271] / [i915#3886]) +12 similar issues
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-kbl3/igt@kms_ccs@pipe-a-bad-rotation-90-y_tiled_gen12_rc_ccs_cc.html

  * igt@kms_ccs@pipe-a-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs:
    - shard-apl:          NOTRUN -> [SKIP][54] ([fdo#109271] / [i915#3886]) +4 similar issues
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-apl7/igt@kms_ccs@pipe-a-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-a-random-ccs-data-y_tiled_gen12_rc_ccs_cc:
    - shard-iclb:         NOTRUN -> [SKIP][55] ([fdo#109278] / [i915#3886]) +4 similar issues
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-iclb2/igt@kms_ccs@pipe-a-random-ccs-data-y_tiled_gen12_rc_ccs_cc.html

  * igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_gen12_mc_ccs:
    - shard-glk:          NOTRUN -> [SKIP][56] ([fdo#109271] / [i915#3886]) +3 similar issues
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-glk5/igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-b-missing-ccs-buffer-y_tiled_gen12_mc_ccs:
    - shard-tglb:         NOTRUN -> [SKIP][57] ([i915#3689] / [i915#3886]) +2 similar issues
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-tglb5/igt@kms_ccs@pipe-b-missing-ccs-buffer-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-c-bad-aux-stride-y_tiled_ccs:
    - shard-tglb:         NOTRUN -> [SKIP][58] ([i915#3689])
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-tglb5/igt@kms_ccs@pipe-c-bad-aux-stride-y_tiled_ccs.html

  * igt@kms_ccs@pipe-c-bad-rotation-90-yf_tiled_ccs:
    - shard-tglb:         NOTRUN -> [SKIP][59] ([fdo#111615] / [i915#3689]) +2 similar issues
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-tglb2/igt@kms_ccs@pipe-c-bad-rotation-90-yf_tiled_ccs.html

  * igt@kms_chamelium@vga-edid-read:
    - shard-iclb:         NOTRUN -> [SKIP][60] ([fdo#109284] / [fdo#111827]) +5 similar issues
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-iclb5/igt@kms_chamelium@vga-edid-read.html

  * igt@kms_color@pipe-d-gamma:
    - shard-iclb:         NOTRUN -> [SKIP][61] ([fdo#109278] / [i915#1149])
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-iclb2/igt@kms_color@pipe-d-gamma.html

  * igt@kms_color_chamelium@pipe-a-ctm-limited-range:
    - shard-apl:          NOTRUN -> [SKIP][62] ([fdo#109271] / [fdo#111827]) +4 similar issues
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-apl1/igt@kms_color_chamelium@pipe-a-ctm-limited-range.html
    - shard-glk:          NOTRUN -> [SKIP][63] ([fdo#109271] / [fdo#111827]) +6 similar issues
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-glk1/igt@kms_color_chamelium@pipe-a-ctm-limited-range.html
    - shard-snb:          NOTRUN -> [SKIP][64] ([fdo#109271] / [fdo#111827]) +2 similar issues
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-snb4/igt@kms_color_chamelium@pipe-a-ctm-limited-range.html

  * igt@kms_color_chamelium@pipe-b-ctm-0-25:
    - shard-kbl:          NOTRUN -> [SKIP][65] ([fdo#109271] / [fdo#111827]) +15 similar issues
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-kbl4/igt@kms_color_chamelium@pipe-b-ctm-0-25.html

  * igt@kms_color_chamelium@pipe-c-degamma:
    - shard-tglb:         NOTRUN -> [SKIP][66] ([fdo#109284] / [fdo#111827]) +3 similar issues
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-tglb1/igt@kms_color_chamelium@pipe-c-degamma.html

  * igt@kms_content_protection@srm:
    - shard-kbl:          NOTRUN -> [TIMEOUT][67] ([i915#1319])
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-kbl3/igt@kms_content_protection@srm.html

  * igt@kms_content_protection@uevent:
    - shard-kbl:          NOTRUN -> [FAIL][68] ([i915#2105])
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-kbl7/igt@kms_content_protection@uevent.html
    - shard-tglb:         NOTRUN -> [SKIP][69] ([i915#1063])
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-tglb7/igt@kms_content_protection@uevent.html
    - shard-apl:          NOTRUN -> [FAIL][70] ([i915#2105])
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-apl1/igt@kms_content_protection@uevent.html
    - shard-iclb:         NOTRUN -> [SKIP][71] ([fdo#109300] / [fdo#111066])
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-iclb2/igt@kms_content_protection@uevent.html

  * igt@kms_cursor_crc@pipe-a-cursor-512x512-rapid-movement:
    - shard-iclb:         NOTRUN -> [SKIP][72] ([fdo#109278] / [fdo#109279]) +1 similar issue
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-iclb3/igt@kms_cursor_crc@pipe-a-cursor-512x512-rapid-movement.html

  * igt@kms_cursor_crc@pipe-a-cursor-suspend:
    - shard-kbl:          [PASS][73] -> [DMESG-WARN][74] ([i915#180]) +1 similar issue
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6327/shard-kbl7/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-kbl6/igt@kms_cursor_crc@pipe-a-cursor-suspend.html

  * igt@kms_cursor_crc@pipe-c-cursor-32x32-sliding:
    - shard-tglb:         NOTRUN -> [SKIP][75] ([i915#3319])
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-tglb8/igt@kms_cursor_crc@pipe-c-cursor-32x32-sliding.html

  * igt@kms_cursor_crc@pipe-c-cursor-max-size-random:
    - shard-tglb:         NOTRUN -> [SKIP][76] ([i915#3359]) +1 similar issue
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-tglb7/igt@kms_cursor_crc@pipe-c-cursor-max-size-random.html

  * igt@kms_cursor_crc@pipe-d-cursor-512x170-onscreen:
    - shard-tglb:         NOTRUN -> [SKIP][77] ([fdo#109279] / [i915#3359]) +2 similar issues
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-tglb5/igt@kms_cursor_crc@pipe-d-cursor-512x170-onscreen.html

  * igt@kms_cursor_crc@pipe-d-cursor-dpms:
    - shard-iclb:         NOTRUN -> [SKIP][78] ([fdo#109278]) +24 similar issues
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-iclb5/igt@kms_cursor_crc@pipe-d-cursor-dpms.html

  * igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic:
    - shard-iclb:         NOTRUN -> [SKIP][79] ([fdo#109274] / [fdo#109278]) +2 similar issues
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-iclb3/igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic.html

  * igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy:
    - shard-tglb:         NOTRUN -> [SKIP][80] ([fdo#109274] / [fdo#111825]) +7 similar issues
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-tglb2/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
    - shard-iclb:         [PASS][81] -> [FAIL][82] ([i915#2346])
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6327/shard-iclb2/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-iclb7/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html

  * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ac-hdmi-a1-hdmi-a2:
    - shard-glk:          [PASS][83] -> [FAIL][84] ([i915#79])
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6327/shard-glk1/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ac-hdmi-a1-hdmi-a2.html
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-glk3/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ac-hdmi-a1-hdmi-a2.html

  * igt@kms_flip@2x-modeset-vs-vblank-race-interruptible:
    - shard-iclb:         NOTRUN -> [SKIP][85] ([fdo#109274]) +4 similar issues
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-iclb3/igt@kms_flip@2x-modeset-vs-vblank-race-interruptible.html

  * igt@kms_flip@flip-vs-suspend-interruptible@c-dp1:
    - shard-apl:          [PASS][86] -> [DMESG-WARN][87] ([i915#180]) +2 similar issues
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6327/shard-apl1/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-apl8/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling:
    - shard-tglb:         NOTRUN -> [SKIP][88] ([i915#2587])
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-tglb8/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-mmap-cpu:
    - shard-tglb:         NOTRUN -> [SKIP][89] ([fdo#109280] / [fdo#111825]) +19 similar issues
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-tglb8/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-mmap-cpu.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-blt:
    - shard-iclb:         NOTRUN -> [SKIP][90] ([fdo#109280]) +21 similar issues
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-iclb5/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-wc:
    - shard-kbl:          NOTRUN -> [SKIP][91] ([fdo#109271]) +273 similar issues
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-kbl7/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-wc.html

  * igt@kms_hdr@bpc-switch-suspend:
    - shard-kbl:          NOTRUN -> [DMESG-WARN][92] ([i915#180]) +1 similar issue
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-kbl4/igt@kms_hdr@bpc-switch-suspend.html

  * igt@kms_hdr@static-swap:
    - shard-tglb:         NOTRUN -> [SKIP][93] ([i915#1187])
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-tglb8/igt@kms_hdr@static-swap.html
    - shard-iclb:         NOTRUN -> [SKIP][94] ([i915#1187])
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-iclb8/igt@kms_hdr@static-swap.html

  * igt@kms_invalid_mode@clock-too-high:
    - shard-iclb:         NOTRUN -> [SKIP][95] ([i915#4278])
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-iclb1/igt@kms_invalid_mode@clock-too-high.html

  * igt@kms_pipe_b_c_ivb@disable-pipe-b-enable-pipe-c:
    - shard-apl:          NOTRUN -> [SKIP][96] ([fdo#109271]) +105 similar issues
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-apl7/igt@kms_pipe_b_c_ivb@disable-pipe-b-enable-pipe-c.html

  * igt@kms_pipe_crc_basic@disable-crc-after-crtc-pipe-d:
    - shard-glk:          NOTRUN -> [SKIP][97] ([fdo#109271] / [i915#533])
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-glk7/igt@kms_pipe_crc_basic@disable-crc-after-crtc-pipe-d.html
    - shard-apl:          NOTRUN -> [SKIP][98] ([fdo#109271] / [i915#533])
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-apl7/igt@kms_pipe_crc_basic@disable-crc-after-crtc-pipe-d.html

  * igt@kms_pipe_crc_basic@read-crc-pipe-d:
    - shard-kbl:          NOTRUN -> [SKIP][99] ([fdo#109271] / [i915#533]) +1 similar issue
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-kbl1/igt@kms_pipe_crc_basic@read-crc-pipe-d.html

  * igt@kms_plane_alpha_blend@pipe-b-alpha-opaque-fb:
    - shard-apl:          NOTRUN -> [FAIL][100] ([fdo#108145] / [i915#265])
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-apl3/igt@kms_plane_alpha_blend@pipe-b-alpha-opaque-fb.html

  * igt@kms_plane_alpha_blend@pipe-b-alpha-transparent-fb:
    - shard-glk:          NOTRUN -> [FAIL][101] ([i915#265]) +1 similar issue
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-glk1/igt@kms_plane_alpha_blend@pipe-b-alpha-transparent-fb.html
    - shard-apl:          NOTRUN -> [FAIL][102] ([i915#265])
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-apl4/igt@kms_plane_alpha_blend@pipe-b-alpha-transparent-fb.html
    - shard-kbl:          NOTRUN -> [FAIL][103] ([i915#265])
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-kbl3/igt@kms_plane_alpha_blend@pipe-b-alpha-transparent-fb.html

  * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-max:
    - shard-kbl:          NOTRUN -> [FAIL][104] ([fdo#108145] / [i915#265]) +1 similar issue
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-kbl6/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-max.html

  * igt@kms_plane_lowres@pipe-b-tiling-y:
    - shard-tglb:         NOTRUN -> [SKIP][105] ([i915#3536])
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-tglb1/igt@kms_plane_lowres@pipe-b-tiling-y.html
    - shard-iclb:         NOTRUN -> [SKIP][106] ([i915#3536])
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-iclb3/igt@kms_plane_lowres@pipe-b-tiling-y.html

  * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area:
    - shard-kbl:          NOTRUN -> [SKIP][107] ([fdo#109271] / [i915#658]) +1 similar issue
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-kbl7/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area.html

  * igt@kms_psr2_sf@plane-move-sf-dmg-area:
    - shard-glk:          NOTRUN -> [SKIP][108] ([fdo#109271] / [i915#658])
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-glk3/igt@kms_psr2_sf@plane-move-sf-dmg-area.html

  * igt@kms_psr2_su@page_flip-xrgb8888:
    - shard-tglb:         NOTRUN -> [SKIP][109] ([i915#1911])
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-tglb7/igt@kms_psr2_su@page_flip-xrgb8888.html

  * igt@kms_psr@psr2_dpms:
    - shard-tglb:         NOTRUN -> [FAIL][110] ([i915#132] / [i915#3467]) +1 similar issue
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-tglb6/igt@kms_psr@psr2_dpms.html
    - shard-iclb:         NOTRUN -> [SKIP][111] ([fdo#109441]) +1 similar issue
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-iclb4/igt@kms_psr@psr2_dpms.html

  * igt@kms_psr@psr2_sprite_plane_move:
    - shard-iclb:         [PASS][112] -> [SKIP][113] ([fdo#109441])
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6327/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-iclb8/igt@kms_psr@psr2_sprite_plane_move.html

  * igt@kms_setmode@basic:
    - shard-glk:          [PASS][114] -> [FAIL][115] ([i915#31])
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6327/shard-glk7/igt@kms_setmode@basic.html
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-glk2/igt@kms_setmode@basic.html

  * igt@kms_writeback@writeback-check-output:
    - shard-apl:          NOTRUN -> [SKIP][116] ([fdo#109271] / [i915#2437]) +1 similar issue
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-apl3/igt@kms_writeback@writeback-check-output.html

  * igt@kms_writeback@writeback-invalid-parameters:
    - shard-tglb:         NOTRUN -> [SKIP][117] ([i915#2437])
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-tglb6/igt@kms_writeback@writeback-invalid-parameters.html
    - shard-glk:          NOTRUN -> [SKIP][118] ([fdo#109271] / [i915#2437])
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-glk7/igt@kms_writeback@writeback-invalid-parameters.html
    - shard-iclb:         NOTRUN -> [SKIP][119] ([i915#2437])
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-iclb8/igt@kms_writeback@writeback-invalid-parameters.html

  * igt@kms_writeback@writeback-pixel-formats:
    - shard-kbl:          NOTRUN -> [SKIP][120] ([fdo#109271] / [i915#2437]) +1 similar issue
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-kbl6/igt@kms_writeback@writeback-pixel-formats.html

  * igt@nouveau_crc@pipe-c-source-outp-complete:
    - shard-iclb:         NOTRUN -> [SKIP][121] ([i915#2530])
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-iclb7/igt@nouveau_crc@pipe-c-source-outp-complete.html

  * igt@nouveau_crc@pipe-d-source-outp-inactive:
    - shard-tglb:         NOTRUN -> [SKIP][122] ([i915#2530])
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-tglb6/igt@nouveau_crc@pipe-d-source-outp-inactive.html
    - shard-iclb:         NOTRUN -> [SKIP][123] ([fdo#109278] / [i915#2530])
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-iclb4/igt@nouveau_crc@pipe-d-source-outp-inactive.html

  * igt@prime_nv_pcopy@test_semaphore:
    - shard-iclb:         NOTRUN -> [SKIP][124] ([fdo#109291]) +1 similar issue
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-iclb7/igt@prime_nv_pcopy@test_semaphore.html
    - shard-tglb:         NOTRUN -> [SKIP][125] ([fdo#109291])
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-tglb1/igt@prime_nv_pcopy@test_semaphore.html

  * igt@sysfs_clients@fair-7:
    - shard-apl:          NOTRUN -> [SKIP][126] ([fdo#109271] / [i915#2994]) +1 similar issue
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-apl4/igt@sysfs_clients@fair-7.html
    - shard-iclb:         NOTRUN -> [SKIP][127] ([i915#2994])
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-iclb6/igt@sysfs_clients@fair-7.html
    - shard-tglb:         NOTRUN -> [SKIP][128] ([i915#2994])
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-tglb5/igt@sysfs_clients@fair-7.html

  * igt@sysfs_clients@pidname:
    - shard-glk:          NOTRUN -> [SKIP][129] ([fdo#109271] / [i915#2994]) +1 similar issue
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-glk4/igt@sysfs_clients@pidname.html

  * igt@sysfs_clients@sema-25:
    - shard-kbl:          NOTRUN -> [SKIP][130] ([fdo#109271] / [i915#2994]) +2 similar issues
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-kbl7/igt@sysfs_clients@sema-25.html

  
#### Possible fixes ####

  * igt@gem_exec_balancer@parallel-bb-first:
    - shard-iclb:         [SKIP][131] ([i915#4525]) -> [PASS][132]
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6327/shard-iclb6/igt@gem_exec_balancer@parallel-bb-first.html
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-iclb1/igt@gem_exec_balancer@parallel-bb-first.html

  * igt@gem_exec_fair@basic-none@vecs0:
    - shard-apl:          [FAIL][133] ([i915#2842]) -> [PASS][134]
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6327/shard-apl8/igt@gem_exec_fair@basic-none@vecs0.html
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-apl3/igt@gem_exec_fair@basic-none@vecs0.html

  * igt@gem_exec_fair@basic-pace@bcs0:
    - shard-iclb:         [FAIL][135] ([i915#2842]) -> [PASS][136]
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6327/shard-iclb8/igt@gem_exec_fair@basic-pace@bcs0.html
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/shard-iclb7/igt@gem_exec_fair@basic-pace@bcs0.html

  * igt@gem_exec_fair@basic-pace@vecs0:
    - shard-kbl:          [FAIL][137] ([i915#2842]) -> [PASS][138] +2 similar issues
   [137]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_63

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6558/index.html

[-- Attachment #2: Type: text/html, Size: 33852 bytes --]

Re: [igt-dev] [PATCH i-g-t v3 1/2] lib/igt_gt: Check for shared reset domain

[Dixit, Ashutosh]

On Mon, 17 Jan 2022 00:56:59 -0800, <priyanka.dandamudi@intel.com> wrote:
>
> +bool has_shared_reset_domain(int fd, const intel_ctx_t *ctx)
> +{
> +	const struct intel_execution_engine2 *e;
> +	bool rcs0 = false;
> +	bool ccs0 = false;
> +	int ccs_count = 0;
> +
> +	for_each_ctx_engine(fd, ctx, e) {
> +		if ((rcs0 && ccs0) || (ccs_count > 1))
> +			break;
> +		else if (e->class == I915_ENGINE_CLASS_RENDER)
> +			rcs0 = true;
> +		else if (e->class == I915_ENGINE_CLASS_COMPUTE) {
> +			ccs0 = true;
> +			ccs_count++;
> +		}
> +	}
> +	return ((rcs0 && ccs0) || (ccs_count > 1));
> +}

No need for bool, just use counts. Something like:

bool has_shared_reset_domain(int fd, const intel_ctx_t *ctx)
{
	const struct intel_execution_engine2 *e;
	int rcs = 0, ccs = 0;

	for_each_ctx_engine(fd, ctx, e) {
		if (e->class == I915_ENGINE_CLASS_RENDER)
			rcs++;
		else if (e->class == I915_ENGINE_CLASS_COMPUTE)
			ccs++;
	}

	return ((rcs && ccs) || (ccs >= 2));
}

Hmm, this can just be:

bool has_shared_reset_domain(int fd, const intel_ctx_t *ctx)
{
	const struct intel_execution_engine2 *e;
	int count = 0;

	for_each_ctx_engine(fd, ctx, e)
		if (e->class == I915_ENGINE_CLASS_RENDER ||
			e->class == I915_ENGINE_CLASS_COMPUTE)
		count++;

	return count >= 2;
}

Re: [igt-dev] [PATCH i-g-t v3 2/2] tests/i915/gem_ctx_exec: Skip test for shared reset domain

[Dixit, Ashutosh]

On Mon, 17 Jan 2022 00:57:00 -0800, <priyanka.dandamudi@intel.com> wrote:
>
> @@ -292,11 +293,15 @@ static void nohangcheck_hostile(int i915)
>	ahnd = get_reloc_ahnd(i915, ctx->id);
>
>	igt_require(__enable_hangcheck(dir, false));
> +	has_sh_do = has_shared_reset_domain(i915, ctx);
>
>	for_each_ctx_engine(i915, ctx, e) {
>		igt_spin_t *spin;
>		int new;
>
> +		if (has_sh_do && (e->class == I915_ENGINE_CLASS_RENDER ||
> +			    e->class == I915_ENGINE_CLASS_COMPUTE))
> +			continue;

If we need to do this, let's not try to overly optimize things (which will
clutter up the code since has_shared_reset_domain() may get called from
multiple places) and just pass the engine into the function, something
like:

bool has_shared_reset_domain(int fd, struct intel_execution_engine2 *e2,
			     const intel_ctx_t *ctx)
{
	const struct intel_execution_engine2 *e;
	int count = 0;

	if (!(e2->class == I915_ENGINE_CLASS_RENDER ||
		e2->class == I915_ENGINE_CLASS_COMPUTE))
		return false;

	for_each_ctx_engine(fd, ctx, e)
		if (e->class == I915_ENGINE_CLASS_RENDER ||
			e->class == I915_ENGINE_CLASS_COMPUTE)
		count++;

	return count >= 2;
}

And then in the loop above just have:

	if (has_shared_reset_domain(fd, e, ctx))
		continue;

Also, I may be wrong, but it looks to me that this test should pass even if
we have shared resets, the test is not even using engine resets. What
failure are we seeing and on which platforms and with how many gt's? Does
the test fail only on DG2 or also on other products with RCS + CCS? Can you
paste the output after running the failing test?

Any idea anyone why this test would fail with a shared reset domain? Could
it be failing due to a different reason than a shared reset domain as
people pointed out on previous versions of the patch? In that case this
patch is incorrect.

Re: [igt-dev] [PATCH i-g-t v3 1/2] lib/igt_gt: Check for shared reset domain

[Matt Roper]

On Mon, Jan 17, 2022 at 12:20:42PM -0800, Dixit, Ashutosh wrote:
> On Mon, 17 Jan 2022 00:56:59 -0800, <priyanka.dandamudi@intel.com> wrote:
> >
> > +bool has_shared_reset_domain(int fd, const intel_ctx_t *ctx)
> > +{
> > +	const struct intel_execution_engine2 *e;
> > +	bool rcs0 = false;
> > +	bool ccs0 = false;
> > +	int ccs_count = 0;
> > +
> > +	for_each_ctx_engine(fd, ctx, e) {
> > +		if ((rcs0 && ccs0) || (ccs_count > 1))
> > +			break;
> > +		else if (e->class == I915_ENGINE_CLASS_RENDER)
> > +			rcs0 = true;
> > +		else if (e->class == I915_ENGINE_CLASS_COMPUTE) {
> > +			ccs0 = true;
> > +			ccs_count++;
> > +		}
> > +	}
> > +	return ((rcs0 && ccs0) || (ccs_count > 1));
> > +}
> 
> No need for bool, just use counts. Something like:
> 
> bool has_shared_reset_domain(int fd, const intel_ctx_t *ctx)
> {
> 	const struct intel_execution_engine2 *e;
> 	int rcs = 0, ccs = 0;
> 
> 	for_each_ctx_engine(fd, ctx, e) {
> 		if (e->class == I915_ENGINE_CLASS_RENDER)
> 			rcs++;
> 		else if (e->class == I915_ENGINE_CLASS_COMPUTE)
> 			ccs++;
> 	}
> 
> 	return ((rcs && ccs) || (ccs >= 2));
> }
> 
> Hmm, this can just be:
> 
> bool has_shared_reset_domain(int fd, const intel_ctx_t *ctx)
> {
> 	const struct intel_execution_engine2 *e;
> 	int count = 0;
> 
> 	for_each_ctx_engine(fd, ctx, e)
> 		if (e->class == I915_ENGINE_CLASS_RENDER ||
> 			e->class == I915_ENGINE_CLASS_COMPUTE)
> 		count++;
> 
> 	return count >= 2;
> }

Yeah, there's no reason to count RCS and CCS separately; all we care
about is whether there's more than one engine in the shared reset
domain.

However I think any approach that involves just counting engines from
userspace isn't really going to work once we start supporting multi-tile
since the various RCS/CCS engines on two separate GTs do belong to
separate reset domains.  E.g., if you query the engine list and see just
CCS0 and CCS1 (or even RCS0 and CCS0) you don't know whether those
engines are both from a single GT and thus share a reset domain, or
whether they come from different GTs and each has its own reset domain.


Matt

-- 
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795

Re: [igt-dev] [PATCH i-g-t v3 1/2] lib/igt_gt: Check for shared reset domain

[John Harrison]

On 1/18/2022 14:32, Matt Roper wrote:
> On Mon, Jan 17, 2022 at 12:20:42PM -0800, Dixit, Ashutosh wrote:
>> On Mon, 17 Jan 2022 00:56:59 -0800, <priyanka.dandamudi@intel.com> wrote:
>>> +bool has_shared_reset_domain(int fd, const intel_ctx_t *ctx)
>>> +{
>>> +	const struct intel_execution_engine2 *e;
>>> +	bool rcs0 = false;
>>> +	bool ccs0 = false;
>>> +	int ccs_count = 0;
>>> +
>>> +	for_each_ctx_engine(fd, ctx, e) {
>>> +		if ((rcs0 && ccs0) || (ccs_count > 1))
>>> +			break;
>>> +		else if (e->class == I915_ENGINE_CLASS_RENDER)
>>> +			rcs0 = true;
>>> +		else if (e->class == I915_ENGINE_CLASS_COMPUTE) {
>>> +			ccs0 = true;
>>> +			ccs_count++;
>>> +		}
>>> +	}
>>> +	return ((rcs0 && ccs0) || (ccs_count > 1));
>>> +}
>> No need for bool, just use counts. Something like:
>>
>> bool has_shared_reset_domain(int fd, const intel_ctx_t *ctx)
>> {
>> 	const struct intel_execution_engine2 *e;
>> 	int rcs = 0, ccs = 0;
>>
>> 	for_each_ctx_engine(fd, ctx, e) {
>> 		if (e->class == I915_ENGINE_CLASS_RENDER)
>> 			rcs++;
>> 		else if (e->class == I915_ENGINE_CLASS_COMPUTE)
>> 			ccs++;
>> 	}
>>
>> 	return ((rcs && ccs) || (ccs >= 2));
>> }
>>
>> Hmm, this can just be:
>>
>> bool has_shared_reset_domain(int fd, const intel_ctx_t *ctx)
>> {
>> 	const struct intel_execution_engine2 *e;
>> 	int count = 0;
>>
>> 	for_each_ctx_engine(fd, ctx, e)
>> 		if (e->class == I915_ENGINE_CLASS_RENDER ||
>> 			e->class == I915_ENGINE_CLASS_COMPUTE)
>> 		count++;
>>
>> 	return count >= 2;
>> }
> Yeah, there's no reason to count RCS and CCS separately; all we care
> about is whether there's more than one engine in the shared reset
> domain.
>
> However I think any approach that involves just counting engines from
> userspace isn't really going to work once we start supporting multi-tile
> since the various RCS/CCS engines on two separate GTs do belong to
> separate reset domains.  E.g., if you query the engine list and see just
> CCS0 and CCS1 (or even RCS0 and CCS0) you don't know whether those
> engines are both from a single GT and thus share a reset domain, or
> whether they come from different GTs and each has its own reset domain.
There is a query API to determine which engine is on which tile, isn't 
there? The distance thing? If CCS0 and CCS1 have a distance of zero they 
are on the same tile and dependent, otherwise they are on different 
tiles and independent?

However, I wonder if this is the right approach at all. What should a 
test do on a multi-tile system? Test each tile independently but skip 
dependent engines? Test them together with RCS of one tile vs RCS of the 
other? Just skip everything? Seems like it is likely to be a different 
requirement for different tests. So maybe  the API is going to need to 
take take two engines as a parameter and say whether those two specific 
engines are shared or not? It's all getting extremely messy.

John.

>
> Matt
>

Re: [igt-dev] [PATCH i-g-t v3 2/2] tests/i915/gem_ctx_exec: Skip test for shared reset domain

[John Harrison]

On 1/17/2022 17:54, Dixit, Ashutosh wrote:
> On Mon, 17 Jan 2022 00:57:00 -0800, <priyanka.dandamudi@intel.com> wrote:
>> @@ -292,11 +293,15 @@ static void nohangcheck_hostile(int i915)
>> 	ahnd = get_reloc_ahnd(i915, ctx->id);
>>
>> 	igt_require(__enable_hangcheck(dir, false));
>> +	has_sh_do = has_shared_reset_domain(i915, ctx);
>>
>> 	for_each_ctx_engine(i915, ctx, e) {
>> 		igt_spin_t *spin;
>> 		int new;
>>
>> +		if (has_sh_do && (e->class == I915_ENGINE_CLASS_RENDER ||
>> +			    e->class == I915_ENGINE_CLASS_COMPUTE))
>> +			continue;
> If we need to do this, let's not try to overly optimize things (which will
> clutter up the code since has_shared_reset_domain() may get called from
> multiple places) and just pass the engine into the function, something
> like:
>
> bool has_shared_reset_domain(int fd, struct intel_execution_engine2 *e2,
> 			     const intel_ctx_t *ctx)
> {
> 	const struct intel_execution_engine2 *e;
> 	int count = 0;
>
> 	if (!(e2->class == I915_ENGINE_CLASS_RENDER ||
> 		e2->class == I915_ENGINE_CLASS_COMPUTE))
> 		return false;
>
> 	for_each_ctx_engine(fd, ctx, e)
> 		if (e->class == I915_ENGINE_CLASS_RENDER ||
> 			e->class == I915_ENGINE_CLASS_COMPUTE)
> 		count++;
>
> 	return count >= 2;
> }
>
> And then in the loop above just have:
>
> 	if (has_shared_reset_domain(fd, e, ctx))
> 		continue;
>
> Also, I may be wrong, but it looks to me that this test should pass even if
> we have shared resets, the test is not even using engine resets. What
> failure are we seeing and on which platforms and with how many gt's? Does
> the test fail only on DG2 or also on other products with RCS + CCS? Can you
> paste the output after running the failing test?
>
> Any idea anyone why this test would fail with a shared reset domain? Could
> it be failing due to a different reason than a shared reset domain as
> people pointed out on previous versions of the patch? In that case this
> patch is incorrect.

Presumably the test is actually testing context persistence? If so, I 
would say the best option right now is to add an 
'is_persistance_fixed()' helper which currently returns false on modern 
platforms and causes any persistence related test to skip. The KMD 
implementation of persistence is broken. It vaguely hangs together for 
execlist mode with no dependent engines but it is totally broken for GuC 
submission (because part of the implementation is buried deep within the 
execlist backend) and the current design can never work for engines with 
dependent resets.

Once persistence has been completely re-written (and greatly simplified) 
in the KMD, we can then review the persistence related IGTs and decide 
whether each is still valid or is now pointless. I suspect this one 
would count as pointless. It is called 'nohangcheck' and seems to be 
testing persistence behaviour when the heartbeat is explicitly disabled. 
Part of the persistence re-write is to remove any dependence on the 
state of the heartbeat.

Without looking at this specific test in detail, I can't say exactly 
what might be happening here, but it seems likely that it is 
specifically a DG2 issue (and thus should only skip on DG2). The 
persistence implementation involves sending super high priority pings to 
engines. Assuming the workload on the target engine is pre-emptible, the 
ping should make it through. But if this is a DG2 and the target engine 
is CCS# then that pre-emption requires a pre-emption on RCS as well. If 
the test has put a non-pre-emtible background workload on RCS, then RCS 
is never going to switch, thus CCS can't switch either. Hence 
pre-emption timeouts, engine resets and test failures. In this case, the 
failure is not even specifically related to dependent engine resets.

One option is to make all the workloads pre-emptible but there is an 
argument that the point of the test is to ensure no interference at all 
including unwanted pre-emptions. Thus, the test is correctly failing 
because the hardware cannot provide context isolation.

John.

Re: [igt-dev] [PATCH i-g-t v3 1/2] lib/igt_gt: Check for shared reset domain

[Matt Roper]

On Wed, Jan 19, 2022 at 11:09:00AM -0800, John Harrison wrote:
> On 1/18/2022 14:32, Matt Roper wrote:
> > On Mon, Jan 17, 2022 at 12:20:42PM -0800, Dixit, Ashutosh wrote:
> > > On Mon, 17 Jan 2022 00:56:59 -0800, <priyanka.dandamudi@intel.com> wrote:
> > > > +bool has_shared_reset_domain(int fd, const intel_ctx_t *ctx)
> > > > +{
> > > > +	const struct intel_execution_engine2 *e;
> > > > +	bool rcs0 = false;
> > > > +	bool ccs0 = false;
> > > > +	int ccs_count = 0;
> > > > +
> > > > +	for_each_ctx_engine(fd, ctx, e) {
> > > > +		if ((rcs0 && ccs0) || (ccs_count > 1))
> > > > +			break;
> > > > +		else if (e->class == I915_ENGINE_CLASS_RENDER)
> > > > +			rcs0 = true;
> > > > +		else if (e->class == I915_ENGINE_CLASS_COMPUTE) {
> > > > +			ccs0 = true;
> > > > +			ccs_count++;
> > > > +		}
> > > > +	}
> > > > +	return ((rcs0 && ccs0) || (ccs_count > 1));
> > > > +}
> > > No need for bool, just use counts. Something like:
> > > 
> > > bool has_shared_reset_domain(int fd, const intel_ctx_t *ctx)
> > > {
> > > 	const struct intel_execution_engine2 *e;
> > > 	int rcs = 0, ccs = 0;
> > > 
> > > 	for_each_ctx_engine(fd, ctx, e) {
> > > 		if (e->class == I915_ENGINE_CLASS_RENDER)
> > > 			rcs++;
> > > 		else if (e->class == I915_ENGINE_CLASS_COMPUTE)
> > > 			ccs++;
> > > 	}
> > > 
> > > 	return ((rcs && ccs) || (ccs >= 2));
> > > }
> > > 
> > > Hmm, this can just be:
> > > 
> > > bool has_shared_reset_domain(int fd, const intel_ctx_t *ctx)
> > > {
> > > 	const struct intel_execution_engine2 *e;
> > > 	int count = 0;
> > > 
> > > 	for_each_ctx_engine(fd, ctx, e)
> > > 		if (e->class == I915_ENGINE_CLASS_RENDER ||
> > > 			e->class == I915_ENGINE_CLASS_COMPUTE)
> > > 		count++;
> > > 
> > > 	return count >= 2;
> > > }
> > Yeah, there's no reason to count RCS and CCS separately; all we care
> > about is whether there's more than one engine in the shared reset
> > domain.
> > 
> > However I think any approach that involves just counting engines from
> > userspace isn't really going to work once we start supporting multi-tile
> > since the various RCS/CCS engines on two separate GTs do belong to
> > separate reset domains.  E.g., if you query the engine list and see just
> > CCS0 and CCS1 (or even RCS0 and CCS0) you don't know whether those
> > engines are both from a single GT and thus share a reset domain, or
> > whether they come from different GTs and each has its own reset domain.
> There is a query API to determine which engine is on which tile, isn't
> there? The distance thing? If CCS0 and CCS1 have a distance of zero they are
> on the same tile and dependent, otherwise they are on different tiles and
> independent?

If I recall correctly, the distance query is only for determining the
distance of an engine from a specific memory region.  So if you had a
four-tile layout like

        0 - 1
        |   |
        2 - 3

some pairs of tiles would be the same distance from any single memory
region you choose.  You'd potentially have to compare the distance to
multiple memory regions to figure out whether the engines truly
originated from the same tile or not.  So I guess it's doable (if/when
the distance query arrives), but kind of ugly.  It seems like userspace
would rather have a more straightforward way to determine this, such as
a reset ID (integer) associated with every engine.  If two engines have
the same reset ID, userspace would know they're tied together without
jumping through any extra hoops.  I don't know what the UMD plans are in
this area though.


Matt

> 
> However, I wonder if this is the right approach at all. What should a test
> do on a multi-tile system? Test each tile independently but skip dependent
> engines? Test them together with RCS of one tile vs RCS of the other? Just
> skip everything? Seems like it is likely to be a different requirement for
> different tests. So maybe  the API is going to need to take take two engines
> as a parameter and say whether those two specific engines are shared or not?
> It's all getting extremely messy.
> 
> John.
> 
> > 
> > Matt
> > 
> 

-- 
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795

Re: [igt-dev] [PATCH i-g-t v3 1/2] lib/igt_gt: Check for shared reset domain

[John Harrison]

On 1/19/2022 11:32, Matt Roper wrote:
> On Wed, Jan 19, 2022 at 11:09:00AM -0800, John Harrison wrote:
>> On 1/18/2022 14:32, Matt Roper wrote:
>>> On Mon, Jan 17, 2022 at 12:20:42PM -0800, Dixit, Ashutosh wrote:
>>>> On Mon, 17 Jan 2022 00:56:59 -0800, <priyanka.dandamudi@intel.com> wrote:
>>>>> +bool has_shared_reset_domain(int fd, const intel_ctx_t *ctx)
>>>>> +{
>>>>> +	const struct intel_execution_engine2 *e;
>>>>> +	bool rcs0 = false;
>>>>> +	bool ccs0 = false;
>>>>> +	int ccs_count = 0;
>>>>> +
>>>>> +	for_each_ctx_engine(fd, ctx, e) {
>>>>> +		if ((rcs0 && ccs0) || (ccs_count > 1))
>>>>> +			break;
>>>>> +		else if (e->class == I915_ENGINE_CLASS_RENDER)
>>>>> +			rcs0 = true;
>>>>> +		else if (e->class == I915_ENGINE_CLASS_COMPUTE) {
>>>>> +			ccs0 = true;
>>>>> +			ccs_count++;
>>>>> +		}
>>>>> +	}
>>>>> +	return ((rcs0 && ccs0) || (ccs_count > 1));
>>>>> +}
>>>> No need for bool, just use counts. Something like:
>>>>
>>>> bool has_shared_reset_domain(int fd, const intel_ctx_t *ctx)
>>>> {
>>>> 	const struct intel_execution_engine2 *e;
>>>> 	int rcs = 0, ccs = 0;
>>>>
>>>> 	for_each_ctx_engine(fd, ctx, e) {
>>>> 		if (e->class == I915_ENGINE_CLASS_RENDER)
>>>> 			rcs++;
>>>> 		else if (e->class == I915_ENGINE_CLASS_COMPUTE)
>>>> 			ccs++;
>>>> 	}
>>>>
>>>> 	return ((rcs && ccs) || (ccs >= 2));
>>>> }
>>>>
>>>> Hmm, this can just be:
>>>>
>>>> bool has_shared_reset_domain(int fd, const intel_ctx_t *ctx)
>>>> {
>>>> 	const struct intel_execution_engine2 *e;
>>>> 	int count = 0;
>>>>
>>>> 	for_each_ctx_engine(fd, ctx, e)
>>>> 		if (e->class == I915_ENGINE_CLASS_RENDER ||
>>>> 			e->class == I915_ENGINE_CLASS_COMPUTE)
>>>> 		count++;
>>>>
>>>> 	return count >= 2;
>>>> }
>>> Yeah, there's no reason to count RCS and CCS separately; all we care
>>> about is whether there's more than one engine in the shared reset
>>> domain.
>>>
>>> However I think any approach that involves just counting engines from
>>> userspace isn't really going to work once we start supporting multi-tile
>>> since the various RCS/CCS engines on two separate GTs do belong to
>>> separate reset domains.  E.g., if you query the engine list and see just
>>> CCS0 and CCS1 (or even RCS0 and CCS0) you don't know whether those
>>> engines are both from a single GT and thus share a reset domain, or
>>> whether they come from different GTs and each has its own reset domain.
>> There is a query API to determine which engine is on which tile, isn't
>> there? The distance thing? If CCS0 and CCS1 have a distance of zero they are
>> on the same tile and dependent, otherwise they are on different tiles and
>> independent?
> If I recall correctly, the distance query is only for determining the
> distance of an engine from a specific memory region.  So if you had a
> four-tile layout like
>
>          0 - 1
>          |   |
>          2 - 3
>
> some pairs of tiles would be the same distance from any single memory
> region you choose.  You'd potentially have to compare the distance to
> multiple memory regions to figure out whether the engines truly
> originated from the same tile or not.  So I guess it's doable (if/when
> the distance query arrives), but kind of ugly.  It seems like userspace
> would rather have a more straightforward way to determine this, such as
> a reset ID (integer) associated with every engine.  If two engines have
> the same reset ID, userspace would know they're tied together without
> jumping through any extra hoops.  I don't know what the UMD plans are in
> this area though.
Yeah, there was a policy of jumping through as many hoops as possible to 
hide multi-tile hardware from UMDs. I think we have moved away from that 
now? So maybe we can just report the tile id for a given engine? I think 
there are valid UMD reasons for wanting to know that - load balancing of 
compute workloads, for example. But maybe those usages are still tied to 
memory regions anyway? Either way, I don't think there is a valid reason 
for UMDs to need to know about engine reset dependencies. So I can't see 
any API to expose that being approved. It would have to be a debugfs 
interface only. But if we can expose the tile id, that would be sufficient.

John.

>
> Matt
>
>> However, I wonder if this is the right approach at all. What should a test
>> do on a multi-tile system? Test each tile independently but skip dependent
>> engines? Test them together with RCS of one tile vs RCS of the other? Just
>> skip everything? Seems like it is likely to be a different requirement for
>> different tests. So maybe  the API is going to need to take take two engines
>> as a parameter and say whether those two specific engines are shared or not?
>> It's all getting extremely messy.
>>
>> John.
>>
>>> Matt
>>>