* [PATCH v2 0/4] Minor Fixes and Refactoring for HDMI PCON stuff
@ 2022-02-01 7:20 ` Ankit Nautiyal
0 siblings, 0 replies; 13+ messages in thread
From: Ankit Nautiyal @ 2022-02-01 7:20 UTC (permalink / raw)
To: intel-gfx, dri-devel; +Cc: vandita.kulkarni, uma.shankar, swati2.sharma
Misc fixes and refactoring in HDMI2.1 PCON helper functions.
V2:
Addressed review comments from Jani.
Splitted the drm_helper addition and usage in separate patches.
Ankit Nautiyal (4):
drm/i915/hdmi: Fix the definition of intel_hdmi_dsc_get_bpp
drm/edid: Add helper to get max FRL rate for an HDMI sink
drm/i915/dp: Use the drm helpers for getting max FRL rate
drm/i915/display: Simplify helpers for getting DSC slices and bpp
drivers/gpu/drm/drm_edid.c | 38 +++++++++++++++++++++++
drivers/gpu/drm/i915/display/intel_dp.c | 26 ++++++----------
drivers/gpu/drm/i915/display/intel_hdmi.c | 26 +++++++++-------
drivers/gpu/drm/i915/display/intel_hdmi.h | 9 ++++--
include/drm/drm_edid.h | 2 ++
5 files changed, 70 insertions(+), 31 deletions(-)
--
2.25.1
^ permalink raw reply [flat|nested] 13+ messages in thread
* [Intel-gfx] [PATCH v2 0/4] Minor Fixes and Refactoring for HDMI PCON stuff
@ 2022-02-01 7:20 ` Ankit Nautiyal
0 siblings, 0 replies; 13+ messages in thread
From: Ankit Nautiyal @ 2022-02-01 7:20 UTC (permalink / raw)
To: intel-gfx, dri-devel
Misc fixes and refactoring in HDMI2.1 PCON helper functions.
V2:
Addressed review comments from Jani.
Splitted the drm_helper addition and usage in separate patches.
Ankit Nautiyal (4):
drm/i915/hdmi: Fix the definition of intel_hdmi_dsc_get_bpp
drm/edid: Add helper to get max FRL rate for an HDMI sink
drm/i915/dp: Use the drm helpers for getting max FRL rate
drm/i915/display: Simplify helpers for getting DSC slices and bpp
drivers/gpu/drm/drm_edid.c | 38 +++++++++++++++++++++++
drivers/gpu/drm/i915/display/intel_dp.c | 26 ++++++----------
drivers/gpu/drm/i915/display/intel_hdmi.c | 26 +++++++++-------
drivers/gpu/drm/i915/display/intel_hdmi.h | 9 ++++--
include/drm/drm_edid.h | 2 ++
5 files changed, 70 insertions(+), 31 deletions(-)
--
2.25.1
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PATCH v2 1/4] drm/i915/hdmi: Fix the definition of intel_hdmi_dsc_get_bpp
2022-02-01 7:20 ` [Intel-gfx] " Ankit Nautiyal
@ 2022-02-01 7:20 ` Ankit Nautiyal
-1 siblings, 0 replies; 13+ messages in thread
From: Ankit Nautiyal @ 2022-02-01 7:20 UTC (permalink / raw)
To: intel-gfx, dri-devel; +Cc: vandita.kulkarni, uma.shankar, swati2.sharma
Fix the data-type of the argument output_format to enum, for the
function intel_hdmi_dsc_get_bpp.
v2: Fixed formatting issues in commit message (Jani).
Avoided including the header intel_display_types.h, instead used
forward declaration for the appropriate enum. (Jani).
Fixes: 6e6cb758e035 ("drm/i915: Add helper functions for calculating DSC parameters for HDMI2.1")
Cc: Uma Shankar <uma.shankar@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_hdmi.c | 4 ++--
drivers/gpu/drm/i915/display/intel_hdmi.h | 5 +++--
2 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 45cf0ab04009..381a9de3a015 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -3126,8 +3126,8 @@ intel_hdmi_dsc_get_num_slices(const struct intel_crtc_state *crtc_state,
*/
int
intel_hdmi_dsc_get_bpp(int src_fractional_bpp, int slice_width, int num_slices,
- int output_format, bool hdmi_all_bpp,
- int hdmi_max_chunk_bytes)
+ enum intel_output_format output_format,
+ bool hdmi_all_bpp, int hdmi_max_chunk_bytes)
{
int max_dsc_bpp, min_dsc_bpp;
int target_bytes;
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.h b/drivers/gpu/drm/i915/display/intel_hdmi.h
index b577c38fa90c..ea2a3456bd4b 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.h
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.h
@@ -22,6 +22,7 @@ struct intel_hdmi;
struct drm_connector_state;
union hdmi_infoframe;
enum port;
+enum intel_output_format;
void intel_hdmi_init_connector(struct intel_digital_port *dig_port,
struct intel_connector *intel_connector);
@@ -49,8 +50,8 @@ bool intel_hdmi_limited_color_range(const struct intel_crtc_state *crtc_state,
bool intel_hdmi_bpc_possible(const struct intel_crtc_state *crtc_state,
int bpc, bool has_hdmi_sink, bool ycbcr420_output);
int intel_hdmi_dsc_get_bpp(int src_fractional_bpp, int slice_width,
- int num_slices, int output_format, bool hdmi_all_bpp,
- int hdmi_max_chunk_bytes);
+ int num_slices, enum intel_output_format output_format,
+ bool hdmi_all_bpp, int hdmi_max_chunk_bytes);
int intel_hdmi_dsc_get_num_slices(const struct intel_crtc_state *crtc_state,
int src_max_slices, int src_max_slice_width,
int hdmi_max_slices, int hdmi_throughput);
--
2.25.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [Intel-gfx] [PATCH v2 1/4] drm/i915/hdmi: Fix the definition of intel_hdmi_dsc_get_bpp
@ 2022-02-01 7:20 ` Ankit Nautiyal
0 siblings, 0 replies; 13+ messages in thread
From: Ankit Nautiyal @ 2022-02-01 7:20 UTC (permalink / raw)
To: intel-gfx, dri-devel
Fix the data-type of the argument output_format to enum, for the
function intel_hdmi_dsc_get_bpp.
v2: Fixed formatting issues in commit message (Jani).
Avoided including the header intel_display_types.h, instead used
forward declaration for the appropriate enum. (Jani).
Fixes: 6e6cb758e035 ("drm/i915: Add helper functions for calculating DSC parameters for HDMI2.1")
Cc: Uma Shankar <uma.shankar@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_hdmi.c | 4 ++--
drivers/gpu/drm/i915/display/intel_hdmi.h | 5 +++--
2 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 45cf0ab04009..381a9de3a015 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -3126,8 +3126,8 @@ intel_hdmi_dsc_get_num_slices(const struct intel_crtc_state *crtc_state,
*/
int
intel_hdmi_dsc_get_bpp(int src_fractional_bpp, int slice_width, int num_slices,
- int output_format, bool hdmi_all_bpp,
- int hdmi_max_chunk_bytes)
+ enum intel_output_format output_format,
+ bool hdmi_all_bpp, int hdmi_max_chunk_bytes)
{
int max_dsc_bpp, min_dsc_bpp;
int target_bytes;
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.h b/drivers/gpu/drm/i915/display/intel_hdmi.h
index b577c38fa90c..ea2a3456bd4b 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.h
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.h
@@ -22,6 +22,7 @@ struct intel_hdmi;
struct drm_connector_state;
union hdmi_infoframe;
enum port;
+enum intel_output_format;
void intel_hdmi_init_connector(struct intel_digital_port *dig_port,
struct intel_connector *intel_connector);
@@ -49,8 +50,8 @@ bool intel_hdmi_limited_color_range(const struct intel_crtc_state *crtc_state,
bool intel_hdmi_bpc_possible(const struct intel_crtc_state *crtc_state,
int bpc, bool has_hdmi_sink, bool ycbcr420_output);
int intel_hdmi_dsc_get_bpp(int src_fractional_bpp, int slice_width,
- int num_slices, int output_format, bool hdmi_all_bpp,
- int hdmi_max_chunk_bytes);
+ int num_slices, enum intel_output_format output_format,
+ bool hdmi_all_bpp, int hdmi_max_chunk_bytes);
int intel_hdmi_dsc_get_num_slices(const struct intel_crtc_state *crtc_state,
int src_max_slices, int src_max_slice_width,
int hdmi_max_slices, int hdmi_throughput);
--
2.25.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v2 2/4] drm/edid: Add helper to get max FRL rate for an HDMI sink
2022-02-01 7:20 ` [Intel-gfx] " Ankit Nautiyal
@ 2022-02-01 7:20 ` Ankit Nautiyal
-1 siblings, 0 replies; 13+ messages in thread
From: Ankit Nautiyal @ 2022-02-01 7:20 UTC (permalink / raw)
To: intel-gfx, dri-devel; +Cc: vandita.kulkarni, uma.shankar, swati2.sharma
Add the helpers for getting the max FRL rate with and without DSC
for an HDMI sink.
v2: Fix the subject line and documentation of the helpers (Jani).
Split the helper definitions and usage into separate patches. (Jani).
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/drm_edid.c | 38 ++++++++++++++++++++++++++++++++++++++
include/drm/drm_edid.h | 2 ++
2 files changed, 40 insertions(+)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index eb61a1a92dc0..c209fd6b24a2 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -6176,3 +6176,41 @@ void drm_update_tile_info(struct drm_connector *connector,
connector->tile_group = NULL;
}
}
+
+/**
+ * drm_hdmi_sink_max_frl - get the max frl rate, if supported
+ * @connector - connector with HDMI sink
+ *
+ * RETURNS:
+ * max frl rate supported by the HDMI sink, 0 if FRL not supported
+ */
+int drm_hdmi_sink_max_frl(struct drm_connector *connector)
+{
+ int max_lanes = connector->display_info.hdmi.max_lanes;
+ int rate_per_lane = connector->display_info.hdmi.max_frl_rate_per_lane;
+
+ return max_lanes * rate_per_lane;
+}
+EXPORT_SYMBOL(drm_hdmi_sink_max_frl);
+
+/**
+ * drm_hdmi_sink_dsc_max_frl - get the max frl rate from HDMI sink with
+ * DSC1.2 compression.
+ * @connector - connector with HDMI sink
+ *
+ * RETURNS:
+ * max frl rate supported by the HDMI sink with DSC1.2, 0 if FRL not supported
+ */
+int drm_hdmi_sink_dsc_max_frl(struct drm_connector *connector)
+{
+ int max_dsc_lanes, dsc_rate_per_lane;
+
+ if (!connector->display_info.hdmi.dsc_cap.v_1p2)
+ return 0;
+
+ max_dsc_lanes = connector->display_info.hdmi.dsc_cap.max_lanes;
+ dsc_rate_per_lane = connector->display_info.hdmi.dsc_cap.max_frl_rate_per_lane;
+
+ return max_dsc_lanes * dsc_rate_per_lane;
+}
+EXPORT_SYMBOL(drm_hdmi_sink_dsc_max_frl);
diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h
index 18f6c700f6d0..5003e1254c44 100644
--- a/include/drm/drm_edid.h
+++ b/include/drm/drm_edid.h
@@ -592,6 +592,8 @@ drm_display_mode_from_cea_vic(struct drm_device *dev,
u8 video_code);
const u8 *drm_find_edid_extension(const struct edid *edid,
int ext_id, int *ext_index);
+int drm_hdmi_sink_max_frl(struct drm_connector *connector);
+int drm_hdmi_sink_dsc_max_frl(struct drm_connector *connector);
#endif /* __DRM_EDID_H__ */
--
2.25.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [Intel-gfx] [PATCH v2 2/4] drm/edid: Add helper to get max FRL rate for an HDMI sink
@ 2022-02-01 7:20 ` Ankit Nautiyal
0 siblings, 0 replies; 13+ messages in thread
From: Ankit Nautiyal @ 2022-02-01 7:20 UTC (permalink / raw)
To: intel-gfx, dri-devel
Add the helpers for getting the max FRL rate with and without DSC
for an HDMI sink.
v2: Fix the subject line and documentation of the helpers (Jani).
Split the helper definitions and usage into separate patches. (Jani).
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/drm_edid.c | 38 ++++++++++++++++++++++++++++++++++++++
include/drm/drm_edid.h | 2 ++
2 files changed, 40 insertions(+)
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index eb61a1a92dc0..c209fd6b24a2 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -6176,3 +6176,41 @@ void drm_update_tile_info(struct drm_connector *connector,
connector->tile_group = NULL;
}
}
+
+/**
+ * drm_hdmi_sink_max_frl - get the max frl rate, if supported
+ * @connector - connector with HDMI sink
+ *
+ * RETURNS:
+ * max frl rate supported by the HDMI sink, 0 if FRL not supported
+ */
+int drm_hdmi_sink_max_frl(struct drm_connector *connector)
+{
+ int max_lanes = connector->display_info.hdmi.max_lanes;
+ int rate_per_lane = connector->display_info.hdmi.max_frl_rate_per_lane;
+
+ return max_lanes * rate_per_lane;
+}
+EXPORT_SYMBOL(drm_hdmi_sink_max_frl);
+
+/**
+ * drm_hdmi_sink_dsc_max_frl - get the max frl rate from HDMI sink with
+ * DSC1.2 compression.
+ * @connector - connector with HDMI sink
+ *
+ * RETURNS:
+ * max frl rate supported by the HDMI sink with DSC1.2, 0 if FRL not supported
+ */
+int drm_hdmi_sink_dsc_max_frl(struct drm_connector *connector)
+{
+ int max_dsc_lanes, dsc_rate_per_lane;
+
+ if (!connector->display_info.hdmi.dsc_cap.v_1p2)
+ return 0;
+
+ max_dsc_lanes = connector->display_info.hdmi.dsc_cap.max_lanes;
+ dsc_rate_per_lane = connector->display_info.hdmi.dsc_cap.max_frl_rate_per_lane;
+
+ return max_dsc_lanes * dsc_rate_per_lane;
+}
+EXPORT_SYMBOL(drm_hdmi_sink_dsc_max_frl);
diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h
index 18f6c700f6d0..5003e1254c44 100644
--- a/include/drm/drm_edid.h
+++ b/include/drm/drm_edid.h
@@ -592,6 +592,8 @@ drm_display_mode_from_cea_vic(struct drm_device *dev,
u8 video_code);
const u8 *drm_find_edid_extension(const struct edid *edid,
int ext_id, int *ext_index);
+int drm_hdmi_sink_max_frl(struct drm_connector *connector);
+int drm_hdmi_sink_dsc_max_frl(struct drm_connector *connector);
#endif /* __DRM_EDID_H__ */
--
2.25.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v2 3/4] drm/i915/dp: Use the drm helpers for getting max FRL rate
2022-02-01 7:20 ` [Intel-gfx] " Ankit Nautiyal
@ 2022-02-01 7:20 ` Ankit Nautiyal
-1 siblings, 0 replies; 13+ messages in thread
From: Ankit Nautiyal @ 2022-02-01 7:20 UTC (permalink / raw)
To: intel-gfx, dri-devel; +Cc: vandita.kulkarni, uma.shankar, swati2.sharma
Re-use the drm helpers for getting max FRL rate for an HDMI sink.
This patch removes the duplicate code and calls the already defined
drm helpers for the task.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp.c | 19 +++++--------------
1 file changed, 5 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 4d4579a301f6..f7fe7de7e553 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2190,22 +2190,13 @@ static int intel_dp_hdmi_sink_max_frl(struct intel_dp *intel_dp)
{
struct intel_connector *intel_connector = intel_dp->attached_connector;
struct drm_connector *connector = &intel_connector->base;
- int max_frl_rate;
- int max_lanes, rate_per_lane;
- int max_dsc_lanes, dsc_rate_per_lane;
+ int max_frl = drm_hdmi_sink_max_frl(connector);
+ int dsc_max_frl = drm_hdmi_sink_dsc_max_frl(connector);
- max_lanes = connector->display_info.hdmi.max_lanes;
- rate_per_lane = connector->display_info.hdmi.max_frl_rate_per_lane;
- max_frl_rate = max_lanes * rate_per_lane;
+ if (dsc_max_frl)
+ return min(max_frl, dsc_max_frl);
- if (connector->display_info.hdmi.dsc_cap.v_1p2) {
- max_dsc_lanes = connector->display_info.hdmi.dsc_cap.max_lanes;
- dsc_rate_per_lane = connector->display_info.hdmi.dsc_cap.max_frl_rate_per_lane;
- if (max_dsc_lanes && dsc_rate_per_lane)
- max_frl_rate = min(max_frl_rate, max_dsc_lanes * dsc_rate_per_lane);
- }
-
- return max_frl_rate;
+ return max_frl;
}
static bool
--
2.25.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [Intel-gfx] [PATCH v2 3/4] drm/i915/dp: Use the drm helpers for getting max FRL rate
@ 2022-02-01 7:20 ` Ankit Nautiyal
0 siblings, 0 replies; 13+ messages in thread
From: Ankit Nautiyal @ 2022-02-01 7:20 UTC (permalink / raw)
To: intel-gfx, dri-devel
Re-use the drm helpers for getting max FRL rate for an HDMI sink.
This patch removes the duplicate code and calls the already defined
drm helpers for the task.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp.c | 19 +++++--------------
1 file changed, 5 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 4d4579a301f6..f7fe7de7e553 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2190,22 +2190,13 @@ static int intel_dp_hdmi_sink_max_frl(struct intel_dp *intel_dp)
{
struct intel_connector *intel_connector = intel_dp->attached_connector;
struct drm_connector *connector = &intel_connector->base;
- int max_frl_rate;
- int max_lanes, rate_per_lane;
- int max_dsc_lanes, dsc_rate_per_lane;
+ int max_frl = drm_hdmi_sink_max_frl(connector);
+ int dsc_max_frl = drm_hdmi_sink_dsc_max_frl(connector);
- max_lanes = connector->display_info.hdmi.max_lanes;
- rate_per_lane = connector->display_info.hdmi.max_frl_rate_per_lane;
- max_frl_rate = max_lanes * rate_per_lane;
+ if (dsc_max_frl)
+ return min(max_frl, dsc_max_frl);
- if (connector->display_info.hdmi.dsc_cap.v_1p2) {
- max_dsc_lanes = connector->display_info.hdmi.dsc_cap.max_lanes;
- dsc_rate_per_lane = connector->display_info.hdmi.dsc_cap.max_frl_rate_per_lane;
- if (max_dsc_lanes && dsc_rate_per_lane)
- max_frl_rate = min(max_frl_rate, max_dsc_lanes * dsc_rate_per_lane);
- }
-
- return max_frl_rate;
+ return max_frl;
}
static bool
--
2.25.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [PATCH v2 4/4] drm/i915/display: Simplify helpers for getting DSC slices and bpp
2022-02-01 7:20 ` [Intel-gfx] " Ankit Nautiyal
@ 2022-02-01 7:20 ` Ankit Nautiyal
-1 siblings, 0 replies; 13+ messages in thread
From: Ankit Nautiyal @ 2022-02-01 7:20 UTC (permalink / raw)
To: intel-gfx, dri-devel; +Cc: vandita.kulkarni, uma.shankar, swati2.sharma
Genralize the helper for getting DSC slice count and compressed bpp
for HDMI sink supporting DSC.
This patch:
-Removes the assumption on the bpc and sends it as an argument for
calculating compressed bpc.
-Sends the resolution, and output format as parameters for which the
DSC paremeters are to be calculated instead of crtc_state.
v2: Added forward declaration for struct drm_display_mode.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp.c | 7 +++++--
drivers/gpu/drm/i915/display/intel_hdmi.c | 24 ++++++++++++-----------
drivers/gpu/drm/i915/display/intel_hdmi.h | 6 ++++--
3 files changed, 22 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index f7fe7de7e553..17d08f06499b 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2357,7 +2357,9 @@ intel_dp_pcon_dsc_enc_slices(struct intel_dp *intel_dp,
int pcon_max_slices = drm_dp_pcon_dsc_max_slices(intel_dp->pcon_dsc_dpcd);
int pcon_max_slice_width = drm_dp_pcon_dsc_max_slice_width(intel_dp->pcon_dsc_dpcd);
- return intel_hdmi_dsc_get_num_slices(crtc_state, pcon_max_slices,
+ return intel_hdmi_dsc_get_num_slices(&crtc_state->hw.adjusted_mode,
+ crtc_state->output_format,
+ pcon_max_slices,
pcon_max_slice_width,
hdmi_max_slices, hdmi_throughput);
}
@@ -2374,9 +2376,10 @@ intel_dp_pcon_dsc_enc_bpp(struct intel_dp *intel_dp,
int pcon_fractional_bpp = drm_dp_pcon_dsc_bpp_incr(intel_dp->pcon_dsc_dpcd);
int hdmi_max_chunk_bytes =
connector->display_info.hdmi.dsc_cap.total_chunk_kbytes * 1024;
+ int bpc = crtc_state->pipe_bpp / 3;
return intel_hdmi_dsc_get_bpp(pcon_fractional_bpp, slice_width,
- num_slices, output_format, hdmi_all_bpp,
+ num_slices, output_format, bpc, hdmi_all_bpp,
hdmi_max_chunk_bytes);
}
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 381a9de3a015..f75e2384da63 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -3004,7 +3004,8 @@ int intel_hdmi_dsc_get_slice_height(int vactive)
* intel_hdmi_dsc_get_num_slices - get no. of dsc slices based on dsc encoder
* and dsc decoder capabilities
*
- * @crtc_state: intel crtc_state
+ * @mode: drm_display_mode for which num of slices are needed
+ * @output_format : pipe output format
* @src_max_slices: maximum slices supported by the DSC encoder
* @src_max_slice_width: maximum slice width supported by DSC encoder
* @hdmi_max_slices: maximum slices supported by sink DSC decoder
@@ -3014,7 +3015,8 @@ int intel_hdmi_dsc_get_slice_height(int vactive)
* and decoder.
*/
int
-intel_hdmi_dsc_get_num_slices(const struct intel_crtc_state *crtc_state,
+intel_hdmi_dsc_get_num_slices(const struct drm_display_mode *mode,
+ enum intel_output_format output_format,
int src_max_slices, int src_max_slice_width,
int hdmi_max_slices, int hdmi_throughput)
{
@@ -3036,7 +3038,7 @@ intel_hdmi_dsc_get_num_slices(const struct intel_crtc_state *crtc_state,
int max_throughput; /* max clock freq. in khz per slice */
int max_slice_width;
int slice_width;
- int pixel_clock = crtc_state->hw.adjusted_mode.crtc_clock;
+ int pixel_clock = mode->crtc_clock;
if (!hdmi_throughput)
return 0;
@@ -3047,8 +3049,8 @@ intel_hdmi_dsc_get_num_slices(const struct intel_crtc_state *crtc_state,
* for 4:4:4 is 1.0. Multiplying these factors by 10 and later
* dividing adjusted clock value by 10.
*/
- if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR444 ||
- crtc_state->output_format == INTEL_OUTPUT_FORMAT_RGB)
+ if (output_format == INTEL_OUTPUT_FORMAT_YCBCR444 ||
+ output_format == INTEL_OUTPUT_FORMAT_RGB)
kslice_adjust = 10;
else
kslice_adjust = 5;
@@ -3103,7 +3105,7 @@ intel_hdmi_dsc_get_num_slices(const struct intel_crtc_state *crtc_state,
else
return 0;
- slice_width = DIV_ROUND_UP(crtc_state->hw.adjusted_mode.hdisplay, target_slices);
+ slice_width = DIV_ROUND_UP(mode->hdisplay, target_slices);
if (slice_width >= max_slice_width)
min_slices = target_slices + 1;
} while (slice_width >= max_slice_width);
@@ -3119,6 +3121,7 @@ intel_hdmi_dsc_get_num_slices(const struct intel_crtc_state *crtc_state,
* @slice_width: dsc slice width supported by the source and sink
* @num_slices: num of slices supported by the source and sink
* @output_format: video output format
+ * @bpc: bits per color
* @hdmi_all_bpp: sink supports decoding of 1/16th bpp setting
* @hdmi_max_chunk_bytes: max bytes in a line of chunks supported by sink
*
@@ -3126,7 +3129,7 @@ intel_hdmi_dsc_get_num_slices(const struct intel_crtc_state *crtc_state,
*/
int
intel_hdmi_dsc_get_bpp(int src_fractional_bpp, int slice_width, int num_slices,
- enum intel_output_format output_format,
+ enum intel_output_format output_format, int bpc,
bool hdmi_all_bpp, int hdmi_max_chunk_bytes)
{
int max_dsc_bpp, min_dsc_bpp;
@@ -3144,18 +3147,17 @@ intel_hdmi_dsc_get_bpp(int src_fractional_bpp, int slice_width, int num_slices,
* for each bpp we check if no of bytes can be supported by HDMI sink
*/
- /* Assuming: bpc as 8*/
if (output_format == INTEL_OUTPUT_FORMAT_YCBCR420) {
min_dsc_bpp = 6;
- max_dsc_bpp = 3 * 4; /* 3*bpc/2 */
+ max_dsc_bpp = 3 * bpc / 2;
} else if (output_format == INTEL_OUTPUT_FORMAT_YCBCR444 ||
output_format == INTEL_OUTPUT_FORMAT_RGB) {
min_dsc_bpp = 8;
- max_dsc_bpp = 3 * 8; /* 3*bpc */
+ max_dsc_bpp = 3 * bpc;
} else {
/* Assuming 4:2:2 encoding */
min_dsc_bpp = 7;
- max_dsc_bpp = 2 * 8; /* 2*bpc */
+ max_dsc_bpp = 2 * bpc;
}
/*
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.h b/drivers/gpu/drm/i915/display/intel_hdmi.h
index ea2a3456bd4b..8a2941d285de 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.h
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.h
@@ -12,6 +12,7 @@
#include "i915_reg.h"
struct drm_connector;
+struct drm_display_mode;
struct drm_encoder;
struct drm_i915_private;
struct intel_connector;
@@ -51,8 +52,9 @@ bool intel_hdmi_bpc_possible(const struct intel_crtc_state *crtc_state,
int bpc, bool has_hdmi_sink, bool ycbcr420_output);
int intel_hdmi_dsc_get_bpp(int src_fractional_bpp, int slice_width,
int num_slices, enum intel_output_format output_format,
- bool hdmi_all_bpp, int hdmi_max_chunk_bytes);
-int intel_hdmi_dsc_get_num_slices(const struct intel_crtc_state *crtc_state,
+ int bpc, bool hdmi_all_bpp, int hdmi_max_chunk_bytes);
+int intel_hdmi_dsc_get_num_slices(const struct drm_display_mode *mode,
+ enum intel_output_format output_format,
int src_max_slices, int src_max_slice_width,
int hdmi_max_slices, int hdmi_throughput);
int intel_hdmi_dsc_get_slice_height(int vactive);
--
2.25.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [Intel-gfx] [PATCH v2 4/4] drm/i915/display: Simplify helpers for getting DSC slices and bpp
@ 2022-02-01 7:20 ` Ankit Nautiyal
0 siblings, 0 replies; 13+ messages in thread
From: Ankit Nautiyal @ 2022-02-01 7:20 UTC (permalink / raw)
To: intel-gfx, dri-devel
Genralize the helper for getting DSC slice count and compressed bpp
for HDMI sink supporting DSC.
This patch:
-Removes the assumption on the bpc and sends it as an argument for
calculating compressed bpc.
-Sends the resolution, and output format as parameters for which the
DSC paremeters are to be calculated instead of crtc_state.
v2: Added forward declaration for struct drm_display_mode.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp.c | 7 +++++--
drivers/gpu/drm/i915/display/intel_hdmi.c | 24 ++++++++++++-----------
drivers/gpu/drm/i915/display/intel_hdmi.h | 6 ++++--
3 files changed, 22 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index f7fe7de7e553..17d08f06499b 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2357,7 +2357,9 @@ intel_dp_pcon_dsc_enc_slices(struct intel_dp *intel_dp,
int pcon_max_slices = drm_dp_pcon_dsc_max_slices(intel_dp->pcon_dsc_dpcd);
int pcon_max_slice_width = drm_dp_pcon_dsc_max_slice_width(intel_dp->pcon_dsc_dpcd);
- return intel_hdmi_dsc_get_num_slices(crtc_state, pcon_max_slices,
+ return intel_hdmi_dsc_get_num_slices(&crtc_state->hw.adjusted_mode,
+ crtc_state->output_format,
+ pcon_max_slices,
pcon_max_slice_width,
hdmi_max_slices, hdmi_throughput);
}
@@ -2374,9 +2376,10 @@ intel_dp_pcon_dsc_enc_bpp(struct intel_dp *intel_dp,
int pcon_fractional_bpp = drm_dp_pcon_dsc_bpp_incr(intel_dp->pcon_dsc_dpcd);
int hdmi_max_chunk_bytes =
connector->display_info.hdmi.dsc_cap.total_chunk_kbytes * 1024;
+ int bpc = crtc_state->pipe_bpp / 3;
return intel_hdmi_dsc_get_bpp(pcon_fractional_bpp, slice_width,
- num_slices, output_format, hdmi_all_bpp,
+ num_slices, output_format, bpc, hdmi_all_bpp,
hdmi_max_chunk_bytes);
}
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c b/drivers/gpu/drm/i915/display/intel_hdmi.c
index 381a9de3a015..f75e2384da63 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.c
@@ -3004,7 +3004,8 @@ int intel_hdmi_dsc_get_slice_height(int vactive)
* intel_hdmi_dsc_get_num_slices - get no. of dsc slices based on dsc encoder
* and dsc decoder capabilities
*
- * @crtc_state: intel crtc_state
+ * @mode: drm_display_mode for which num of slices are needed
+ * @output_format : pipe output format
* @src_max_slices: maximum slices supported by the DSC encoder
* @src_max_slice_width: maximum slice width supported by DSC encoder
* @hdmi_max_slices: maximum slices supported by sink DSC decoder
@@ -3014,7 +3015,8 @@ int intel_hdmi_dsc_get_slice_height(int vactive)
* and decoder.
*/
int
-intel_hdmi_dsc_get_num_slices(const struct intel_crtc_state *crtc_state,
+intel_hdmi_dsc_get_num_slices(const struct drm_display_mode *mode,
+ enum intel_output_format output_format,
int src_max_slices, int src_max_slice_width,
int hdmi_max_slices, int hdmi_throughput)
{
@@ -3036,7 +3038,7 @@ intel_hdmi_dsc_get_num_slices(const struct intel_crtc_state *crtc_state,
int max_throughput; /* max clock freq. in khz per slice */
int max_slice_width;
int slice_width;
- int pixel_clock = crtc_state->hw.adjusted_mode.crtc_clock;
+ int pixel_clock = mode->crtc_clock;
if (!hdmi_throughput)
return 0;
@@ -3047,8 +3049,8 @@ intel_hdmi_dsc_get_num_slices(const struct intel_crtc_state *crtc_state,
* for 4:4:4 is 1.0. Multiplying these factors by 10 and later
* dividing adjusted clock value by 10.
*/
- if (crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR444 ||
- crtc_state->output_format == INTEL_OUTPUT_FORMAT_RGB)
+ if (output_format == INTEL_OUTPUT_FORMAT_YCBCR444 ||
+ output_format == INTEL_OUTPUT_FORMAT_RGB)
kslice_adjust = 10;
else
kslice_adjust = 5;
@@ -3103,7 +3105,7 @@ intel_hdmi_dsc_get_num_slices(const struct intel_crtc_state *crtc_state,
else
return 0;
- slice_width = DIV_ROUND_UP(crtc_state->hw.adjusted_mode.hdisplay, target_slices);
+ slice_width = DIV_ROUND_UP(mode->hdisplay, target_slices);
if (slice_width >= max_slice_width)
min_slices = target_slices + 1;
} while (slice_width >= max_slice_width);
@@ -3119,6 +3121,7 @@ intel_hdmi_dsc_get_num_slices(const struct intel_crtc_state *crtc_state,
* @slice_width: dsc slice width supported by the source and sink
* @num_slices: num of slices supported by the source and sink
* @output_format: video output format
+ * @bpc: bits per color
* @hdmi_all_bpp: sink supports decoding of 1/16th bpp setting
* @hdmi_max_chunk_bytes: max bytes in a line of chunks supported by sink
*
@@ -3126,7 +3129,7 @@ intel_hdmi_dsc_get_num_slices(const struct intel_crtc_state *crtc_state,
*/
int
intel_hdmi_dsc_get_bpp(int src_fractional_bpp, int slice_width, int num_slices,
- enum intel_output_format output_format,
+ enum intel_output_format output_format, int bpc,
bool hdmi_all_bpp, int hdmi_max_chunk_bytes)
{
int max_dsc_bpp, min_dsc_bpp;
@@ -3144,18 +3147,17 @@ intel_hdmi_dsc_get_bpp(int src_fractional_bpp, int slice_width, int num_slices,
* for each bpp we check if no of bytes can be supported by HDMI sink
*/
- /* Assuming: bpc as 8*/
if (output_format == INTEL_OUTPUT_FORMAT_YCBCR420) {
min_dsc_bpp = 6;
- max_dsc_bpp = 3 * 4; /* 3*bpc/2 */
+ max_dsc_bpp = 3 * bpc / 2;
} else if (output_format == INTEL_OUTPUT_FORMAT_YCBCR444 ||
output_format == INTEL_OUTPUT_FORMAT_RGB) {
min_dsc_bpp = 8;
- max_dsc_bpp = 3 * 8; /* 3*bpc */
+ max_dsc_bpp = 3 * bpc;
} else {
/* Assuming 4:2:2 encoding */
min_dsc_bpp = 7;
- max_dsc_bpp = 2 * 8; /* 2*bpc */
+ max_dsc_bpp = 2 * bpc;
}
/*
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.h b/drivers/gpu/drm/i915/display/intel_hdmi.h
index ea2a3456bd4b..8a2941d285de 100644
--- a/drivers/gpu/drm/i915/display/intel_hdmi.h
+++ b/drivers/gpu/drm/i915/display/intel_hdmi.h
@@ -12,6 +12,7 @@
#include "i915_reg.h"
struct drm_connector;
+struct drm_display_mode;
struct drm_encoder;
struct drm_i915_private;
struct intel_connector;
@@ -51,8 +52,9 @@ bool intel_hdmi_bpc_possible(const struct intel_crtc_state *crtc_state,
int bpc, bool has_hdmi_sink, bool ycbcr420_output);
int intel_hdmi_dsc_get_bpp(int src_fractional_bpp, int slice_width,
int num_slices, enum intel_output_format output_format,
- bool hdmi_all_bpp, int hdmi_max_chunk_bytes);
-int intel_hdmi_dsc_get_num_slices(const struct intel_crtc_state *crtc_state,
+ int bpc, bool hdmi_all_bpp, int hdmi_max_chunk_bytes);
+int intel_hdmi_dsc_get_num_slices(const struct drm_display_mode *mode,
+ enum intel_output_format output_format,
int src_max_slices, int src_max_slice_width,
int hdmi_max_slices, int hdmi_throughput);
int intel_hdmi_dsc_get_slice_height(int vactive);
--
2.25.1
^ permalink raw reply related [flat|nested] 13+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Minor Fixes and Refactoring for HDMI PCON stuff (rev2)
2022-02-01 7:20 ` [Intel-gfx] " Ankit Nautiyal
` (4 preceding siblings ...)
(?)
@ 2022-02-01 7:54 ` Patchwork
-1 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2022-02-01 7:54 UTC (permalink / raw)
To: Ankit Nautiyal; +Cc: intel-gfx
== Series Details ==
Series: Minor Fixes and Refactoring for HDMI PCON stuff (rev2)
URL : https://patchwork.freedesktop.org/series/99311/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
^ permalink raw reply [flat|nested] 13+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for Minor Fixes and Refactoring for HDMI PCON stuff (rev2)
2022-02-01 7:20 ` [Intel-gfx] " Ankit Nautiyal
` (5 preceding siblings ...)
(?)
@ 2022-02-01 8:21 ` Patchwork
-1 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2022-02-01 8:21 UTC (permalink / raw)
To: Ankit Nautiyal; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 3503 bytes --]
== Series Details ==
Series: Minor Fixes and Refactoring for HDMI PCON stuff (rev2)
URL : https://patchwork.freedesktop.org/series/99311/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11168 -> Patchwork_22146
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/index.html
Participating hosts (48 -> 43)
------------------------------
Missing (5): fi-bdw-5557u shard-tglu shard-rkl shard-dg1 fi-bdw-samus
Known issues
------------
Here are the changes found in Patchwork_22146 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_pm_rpm@module-reload:
- fi-skl-6600u: [PASS][1] -> [FAIL][2] ([i915#4547])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/fi-skl-6600u/igt@i915_pm_rpm@module-reload.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/fi-skl-6600u/igt@i915_pm_rpm@module-reload.html
* igt@runner@aborted:
- fi-skl-6600u: NOTRUN -> [FAIL][3] ([i915#1814] / [i915#4312])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/fi-skl-6600u/igt@runner@aborted.html
#### Possible fixes ####
* igt@i915_selftest@live@gt_pm:
- {fi-jsl-1}: [DMESG-FAIL][4] ([i915#1886]) -> [PASS][5]
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/fi-jsl-1/igt@i915_selftest@live@gt_pm.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/fi-jsl-1/igt@i915_selftest@live@gt_pm.html
#### Warnings ####
* igt@i915_selftest@live@hangcheck:
- bat-dg1-6: [DMESG-FAIL][6] ([i915#4494] / [i915#4957]) -> [DMESG-FAIL][7] ([i915#4957])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/bat-dg1-6/igt@i915_selftest@live@hangcheck.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/bat-dg1-6/igt@i915_selftest@live@hangcheck.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#1814]: https://gitlab.freedesktop.org/drm/intel/issues/1814
[i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#4494]: https://gitlab.freedesktop.org/drm/intel/issues/4494
[i915#4547]: https://gitlab.freedesktop.org/drm/intel/issues/4547
[i915#4898]: https://gitlab.freedesktop.org/drm/intel/issues/4898
[i915#4957]: https://gitlab.freedesktop.org/drm/intel/issues/4957
[i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
Build changes
-------------
* Linux: CI_DRM_11168 -> Patchwork_22146
CI-20190529: 20190529
CI_DRM_11168: c2bd9b295e337f6a882ac5ec422171502090d33a @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6337: 7c9c034619ef9dbfbfe041fbf3973a1cf1ac7a22 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_22146: 9fa44b49882f54ab0172b7d5d25f5bb914d76e46 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
9fa44b49882f drm/i915/display: Simplify helpers for getting DSC slices and bpp
f4ed69e310fc drm/i915/dp: Use the drm helpers for getting max FRL rate
e0ad213b5099 drm/edid: Add helper to get max FRL rate for an HDMI sink
214a4fad0398 drm/i915/hdmi: Fix the definition of intel_hdmi_dsc_get_bpp
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/index.html
[-- Attachment #2: Type: text/html, Size: 4136 bytes --]
^ permalink raw reply [flat|nested] 13+ messages in thread
* [Intel-gfx] ✗ Fi.CI.IGT: failure for Minor Fixes and Refactoring for HDMI PCON stuff (rev2)
2022-02-01 7:20 ` [Intel-gfx] " Ankit Nautiyal
` (6 preceding siblings ...)
(?)
@ 2022-02-01 10:18 ` Patchwork
-1 siblings, 0 replies; 13+ messages in thread
From: Patchwork @ 2022-02-01 10:18 UTC (permalink / raw)
To: Ankit Nautiyal; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 30277 bytes --]
== Series Details ==
Series: Minor Fixes and Refactoring for HDMI PCON stuff (rev2)
URL : https://patchwork.freedesktop.org/series/99311/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11168_full -> Patchwork_22146_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_22146_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_22146_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (11 -> 13)
------------------------------
Additional (2): shard-rkl shard-dg1
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_22146_full:
### CI changes ###
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* boot:
- {shard-dg1}: NOTRUN -> ([FAIL][1], [PASS][2], [PASS][3])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-dg1-12/boot.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-dg1-12/boot.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-dg1-12/boot.html
### IGT changes ###
#### Possible regressions ####
* igt@i915_selftest@mock@requests:
- shard-skl: [PASS][4] -> [INCOMPLETE][5]
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-skl6/igt@i915_selftest@mock@requests.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-skl1/igt@i915_selftest@mock@requests.html
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@kms_scaling_modes@scaling-mode-full-aspect:
- {shard-tglu}: NOTRUN -> [SKIP][6]
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-tglu-2/igt@kms_scaling_modes@scaling-mode-full-aspect.html
* igt@kms_scaling_modes@scaling-mode-none:
- {shard-rkl}: NOTRUN -> [SKIP][7]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-rkl-2/igt@kms_scaling_modes@scaling-mode-none.html
### Piglit changes ###
#### Possible regressions ####
* spec@arb_copy_image@arb_copy_image-formats --samples=4:
- pig-glk-j5005: NOTRUN -> [FAIL][8]
[8]: None
Known issues
------------
Here are the changes found in Patchwork_22146_full that come from known issues:
### CI changes ###
#### Possible fixes ####
* boot:
- shard-glk: ([PASS][9], [PASS][10], [PASS][11], [PASS][12], [PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18], [PASS][19], [PASS][20], [PASS][21], [PASS][22], [PASS][23], [FAIL][24], [PASS][25], [PASS][26], [PASS][27], [PASS][28], [PASS][29], [PASS][30], [PASS][31], [PASS][32], [PASS][33]) ([i915#4392]) -> ([PASS][34], [PASS][35], [PASS][36], [PASS][37], [PASS][38], [PASS][39], [PASS][40], [PASS][41], [PASS][42], [PASS][43], [PASS][44], [PASS][45], [PASS][46], [PASS][47], [PASS][48], [PASS][49], [PASS][50], [PASS][51], [PASS][52], [PASS][53], [PASS][54], [PASS][55], [PASS][56], [PASS][57], [PASS][58])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-glk3/boot.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-glk3/boot.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-glk4/boot.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-glk4/boot.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-glk4/boot.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-glk3/boot.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-glk1/boot.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-glk1/boot.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-glk1/boot.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-glk2/boot.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-glk2/boot.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-glk3/boot.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-glk9/boot.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-glk9/boot.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-glk9/boot.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-glk8/boot.html
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-glk8/boot.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-glk8/boot.html
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-glk7/boot.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-glk7/boot.html
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-glk7/boot.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-glk6/boot.html
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-glk6/boot.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-glk5/boot.html
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-glk5/boot.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-glk4/boot.html
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-glk4/boot.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-glk3/boot.html
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-glk4/boot.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-glk5/boot.html
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-glk3/boot.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-glk3/boot.html
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-glk2/boot.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-glk5/boot.html
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-glk2/boot.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-glk2/boot.html
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-glk1/boot.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-glk1/boot.html
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-glk6/boot.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-glk6/boot.html
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-glk6/boot.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-glk7/boot.html
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-glk7/boot.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-glk7/boot.html
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-glk8/boot.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-glk8/boot.html
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-glk8/boot.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-glk9/boot.html
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-glk9/boot.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-glk4/boot.html
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_balancer@parallel-out-fence:
- shard-iclb: [PASS][59] -> [SKIP][60] ([i915#4525]) +2 similar issues
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-iclb4/igt@gem_exec_balancer@parallel-out-fence.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-iclb8/igt@gem_exec_balancer@parallel-out-fence.html
* igt@gem_exec_fair@basic-none@vcs1:
- shard-iclb: NOTRUN -> [FAIL][61] ([i915#2842])
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-iclb4/igt@gem_exec_fair@basic-none@vcs1.html
* igt@gem_exec_fair@basic-pace@rcs0:
- shard-kbl: [PASS][62] -> [FAIL][63] ([i915#2842]) +2 similar issues
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-kbl4/igt@gem_exec_fair@basic-pace@rcs0.html
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-kbl6/igt@gem_exec_fair@basic-pace@rcs0.html
* igt@gem_exec_fair@basic-throttle@rcs0:
- shard-glk: [PASS][64] -> [FAIL][65] ([i915#2842])
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-glk5/igt@gem_exec_fair@basic-throttle@rcs0.html
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-glk1/igt@gem_exec_fair@basic-throttle@rcs0.html
- shard-iclb: [PASS][66] -> [FAIL][67] ([i915#2842]) +1 similar issue
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-iclb6/igt@gem_exec_fair@basic-throttle@rcs0.html
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-iclb7/igt@gem_exec_fair@basic-throttle@rcs0.html
* igt@gem_lmem_swapping@parallel-random:
- shard-glk: NOTRUN -> [SKIP][68] ([fdo#109271] / [i915#4613])
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-glk4/igt@gem_lmem_swapping@parallel-random.html
* igt@gem_lmem_swapping@random-engines:
- shard-skl: NOTRUN -> [SKIP][69] ([fdo#109271] / [i915#4613])
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-skl9/igt@gem_lmem_swapping@random-engines.html
* igt@gem_lmem_swapping@verify:
- shard-kbl: NOTRUN -> [SKIP][70] ([fdo#109271] / [i915#4613])
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-kbl7/igt@gem_lmem_swapping@verify.html
* igt@gem_userptr_blits@input-checking:
- shard-kbl: NOTRUN -> [DMESG-WARN][71] ([i915#4990])
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-kbl4/igt@gem_userptr_blits@input-checking.html
* igt@gem_userptr_blits@map-fixed-invalidate-busy@wb:
- shard-glk: [PASS][72] -> [DMESG-WARN][73] ([i915#118]) +3 similar issues
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-glk8/igt@gem_userptr_blits@map-fixed-invalidate-busy@wb.html
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-glk3/igt@gem_userptr_blits@map-fixed-invalidate-busy@wb.html
* igt@gem_userptr_blits@vma-merge:
- shard-kbl: NOTRUN -> [FAIL][74] ([i915#3318])
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-kbl4/igt@gem_userptr_blits@vma-merge.html
* igt@gen9_exec_parse@allowed-single:
- shard-skl: [PASS][75] -> [DMESG-WARN][76] ([i915#1436] / [i915#716])
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-skl3/igt@gen9_exec_parse@allowed-single.html
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-skl9/igt@gen9_exec_parse@allowed-single.html
* igt@i915_selftest@live@hangcheck:
- shard-snb: [PASS][77] -> [INCOMPLETE][78] ([i915#3921])
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-snb7/igt@i915_selftest@live@hangcheck.html
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-snb7/igt@i915_selftest@live@hangcheck.html
* igt@kms_async_flips@alternate-sync-async-flip:
- shard-skl: [PASS][79] -> [FAIL][80] ([i915#2521])
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-skl8/igt@kms_async_flips@alternate-sync-async-flip.html
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-skl8/igt@kms_async_flips@alternate-sync-async-flip.html
* igt@kms_big_fb@linear-32bpp-rotate-0:
- shard-glk: NOTRUN -> [DMESG-WARN][81] ([i915#118])
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-glk4/igt@kms_big_fb@linear-32bpp-rotate-0.html
* igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-async-flip:
- shard-skl: NOTRUN -> [FAIL][82] ([i915#3743])
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-skl1/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
* igt@kms_ccs@pipe-c-bad-pixel-format-y_tiled_gen12_rc_ccs_cc:
- shard-glk: NOTRUN -> [SKIP][83] ([fdo#109271] / [i915#3886]) +2 similar issues
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-glk4/igt@kms_ccs@pipe-c-bad-pixel-format-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_mc_ccs:
- shard-kbl: NOTRUN -> [SKIP][84] ([fdo#109271] / [i915#3886]) +3 similar issues
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-kbl7/igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_mc_ccs.html
* igt@kms_chamelium@dp-audio-edid:
- shard-skl: NOTRUN -> [SKIP][85] ([fdo#109271] / [fdo#111827]) +3 similar issues
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-skl9/igt@kms_chamelium@dp-audio-edid.html
* igt@kms_chamelium@hdmi-crc-single:
- shard-kbl: NOTRUN -> [SKIP][86] ([fdo#109271] / [fdo#111827]) +1 similar issue
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-kbl7/igt@kms_chamelium@hdmi-crc-single.html
* igt@kms_color_chamelium@pipe-b-ctm-0-5:
- shard-glk: NOTRUN -> [SKIP][87] ([fdo#109271] / [fdo#111827]) +3 similar issues
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-glk4/igt@kms_color_chamelium@pipe-b-ctm-0-5.html
* igt@kms_cursor_crc@pipe-c-cursor-suspend:
- shard-kbl: [PASS][88] -> [DMESG-WARN][89] ([i915#180]) +1 similar issue
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-kbl1/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-kbl1/igt@kms_cursor_crc@pipe-c-cursor-suspend.html
* igt@kms_flip@2x-flip-vs-panning-vs-hang:
- shard-skl: NOTRUN -> [SKIP][90] ([fdo#109271]) +55 similar issues
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-skl9/igt@kms_flip@2x-flip-vs-panning-vs-hang.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1:
- shard-skl: NOTRUN -> [FAIL][91] ([i915#2122])
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-skl9/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
* igt@kms_flip@flip-vs-suspend-interruptible@c-dp1:
- shard-kbl: [PASS][92] -> [INCOMPLETE][93] ([i915#636])
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-kbl7/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-kbl3/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html
* igt@kms_flip@flip-vs-suspend@c-dp1:
- shard-apl: [PASS][94] -> [DMESG-WARN][95] ([i915#180])
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-apl7/igt@kms_flip@flip-vs-suspend@c-dp1.html
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-apl8/igt@kms_flip@flip-vs-suspend@c-dp1.html
* igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1:
- shard-skl: [PASS][96] -> [FAIL][97] ([i915#2122])
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-skl6/igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1.html
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-skl9/igt@kms_flip@plain-flip-fb-recreate-interruptible@c-edp1.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling:
- shard-glk: [PASS][98] -> [FAIL][99] ([i915#4911]) +1 similar issue
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-glk4/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling.html
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-glk8/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling.html
* igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-cpu:
- shard-glk: NOTRUN -> [SKIP][100] ([fdo#109271]) +39 similar issues
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-glk4/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-cpu.html
* igt@kms_pipe_b_c_ivb@disable-pipe-b-enable-pipe-c:
- shard-apl: NOTRUN -> [SKIP][101] ([fdo#109271]) +18 similar issues
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-apl3/igt@kms_pipe_b_c_ivb@disable-pipe-b-enable-pipe-c.html
* igt@kms_plane_alpha_blend@pipe-a-alpha-basic:
- shard-kbl: NOTRUN -> [FAIL][102] ([fdo#108145] / [i915#265])
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-kbl7/igt@kms_plane_alpha_blend@pipe-a-alpha-basic.html
* igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area:
- shard-glk: NOTRUN -> [SKIP][103] ([fdo#109271] / [i915#658])
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-glk4/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area.html
* igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area:
- shard-apl: NOTRUN -> [SKIP][104] ([fdo#109271] / [i915#658])
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-apl7/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area.html
* igt@kms_psr2_su@page_flip-nv12:
- shard-kbl: NOTRUN -> [SKIP][105] ([fdo#109271] / [i915#658])
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-kbl3/igt@kms_psr2_su@page_flip-nv12.html
* igt@kms_psr@psr2_no_drrs:
- shard-iclb: [PASS][106] -> [SKIP][107] ([fdo#109441]) +1 similar issue
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-iclb2/igt@kms_psr@psr2_no_drrs.html
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-iclb3/igt@kms_psr@psr2_no_drrs.html
* igt@kms_setmode@basic:
- shard-apl: [PASS][108] -> [FAIL][109] ([i915#31])
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-apl6/igt@kms_setmode@basic.html
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-apl1/igt@kms_setmode@basic.html
* igt@kms_universal_plane@disable-primary-vs-flip-pipe-d:
- shard-kbl: NOTRUN -> [SKIP][110] ([fdo#109271]) +60 similar issues
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-kbl7/igt@kms_universal_plane@disable-primary-vs-flip-pipe-d.html
* igt@kms_vblank@pipe-b-ts-continuation-suspend:
- shard-skl: [PASS][111] -> [INCOMPLETE][112] ([i915#2828])
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-skl4/igt@kms_vblank@pipe-b-ts-continuation-suspend.html
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-skl10/igt@kms_vblank@pipe-b-ts-continuation-suspend.html
* igt@kms_vblank@pipe-d-wait-idle:
- shard-glk: NOTRUN -> [SKIP][113] ([fdo#109271] / [i915#533]) +1 similar issue
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-glk4/igt@kms_vblank@pipe-d-wait-idle.html
* igt@sysfs_clients@fair-0:
- shard-glk: NOTRUN -> [SKIP][114] ([fdo#109271] / [i915#2994])
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-glk4/igt@sysfs_clients@fair-0.html
* igt@sysfs_heartbeat_interval@idempotent@rcs0:
- shard-skl: [PASS][115] -> [DMESG-WARN][116] ([i915#1982]) +1 similar issue
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-skl7/igt@sysfs_heartbeat_interval@idempotent@rcs0.html
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-skl8/igt@sysfs_heartbeat_interval@idempotent@rcs0.html
#### Possible fixes ####
* igt@gem_exec_balancer@parallel-keep-submit-fence:
- shard-iclb: [SKIP][117] ([i915#4525]) -> [PASS][118]
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-iclb5/igt@gem_exec_balancer@parallel-keep-submit-fence.html
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-iclb4/igt@gem_exec_balancer@parallel-keep-submit-fence.html
* igt@gem_exec_fair@basic-none-solo@rcs0:
- shard-apl: [FAIL][119] ([i915#2842]) -> [PASS][120]
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-apl3/igt@gem_exec_fair@basic-none-solo@rcs0.html
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-apl4/igt@gem_exec_fair@basic-none-solo@rcs0.html
* igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-tglb: [FAIL][121] ([i915#2842]) -> [PASS][122]
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-tglb3/igt@gem_exec_fair@basic-pace-share@rcs0.html
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-tglb5/igt@gem_exec_fair@basic-pace-share@rcs0.html
- shard-glk: [FAIL][123] ([i915#2842]) -> [PASS][124]
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-glk6/igt@gem_exec_fair@basic-pace-share@rcs0.html
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-glk5/igt@gem_exec_fair@basic-pace-share@rcs0.html
* igt@i915_pm_sseu@full-enable:
- shard-skl: [FAIL][125] ([i915#3650]) -> [PASS][126]
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-skl3/igt@i915_pm_sseu@full-enable.html
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-skl9/igt@i915_pm_sseu@full-enable.html
* igt@i915_suspend@sysfs-reader:
- shard-apl: [DMESG-WARN][127] ([i915#180]) -> [PASS][128] +1 similar issue
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-apl3/igt@i915_suspend@sysfs-reader.html
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-apl7/igt@i915_suspend@sysfs-reader.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@c-hdmi-a2:
- shard-glk: [FAIL][129] ([i915#79]) -> [PASS][130]
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-glk5/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-hdmi-a2.html
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-glk1/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-hdmi-a2.html
* igt@kms_flip@flip-vs-expired-vblank@a-edp1:
- shard-skl: [FAIL][131] ([i915#79]) -> [PASS][132] +1 similar issue
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-skl3/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-skl9/igt@kms_flip@flip-vs-expired-vblank@a-edp1.html
* igt@kms_flip@flip-vs-expired-vblank@b-edp1:
- shard-skl: [FAIL][133] ([i915#2122]) -> [PASS][134]
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-skl3/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-skl9/igt@kms_flip@flip-vs-expired-vblank@b-edp1.html
* igt@kms_frontbuffer_tracking@fbc-suspend:
- shard-kbl: [DMESG-WARN][135] ([i915#180]) -> [PASS][136] +4 similar issues
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-kbl1/igt@kms_frontbuffer_tracking@fbc-suspend.html
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-kbl4/igt@kms_frontbuffer_tracking@fbc-suspend.html
* igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
- shard-skl: [FAIL][137] ([fdo#108145] / [i915#265]) -> [PASS][138] +1 similar issue
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-skl10/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-skl10/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
* igt@kms_plane_lowres@pipe-a-tiling-none:
- {shard-tglu}: [FAIL][139] ([i915#3957]) -> [PASS][140]
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-tglu-1/igt@kms_plane_lowres@pipe-a-tiling-none.html
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-tglu-5/igt@kms_plane_lowres@pipe-a-tiling-none.html
* igt@kms_psr@psr2_cursor_plane_onoff:
- shard-iclb: [SKIP][141] ([fdo#109441]) -> [PASS][142]
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-iclb5/igt@kms_psr@psr2_cursor_plane_onoff.html
[142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-iclb2/igt@kms_psr@psr2_cursor_plane_onoff.html
* igt@perf@polling-small-buf:
- shard-skl: [FAIL][143] ([i915#1722]) -> [PASS][144]
[143]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-skl3/igt@perf@polling-small-buf.html
[144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-skl1/igt@perf@polling-small-buf.html
#### Warnings ####
* igt@gem_exec_balancer@parallel-ordering:
- shard-iclb: [FAIL][145] ([i915#4916]) -> [SKIP][146] ([i915#4525])
[145]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-iclb4/igt@gem_exec_balancer@parallel-ordering.html
[146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-iclb6/igt@gem_exec_balancer@parallel-ordering.html
* igt@gem_exec_fair@basic-none-rrul@rcs0:
- shard-iclb: [FAIL][147] ([i915#2852]) -> [FAIL][148] ([i915#2842])
[147]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-iclb2/igt@gem_exec_fair@basic-none-rrul@rcs0.html
[148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-iclb7/igt@gem_exec_fair@basic-none-rrul@rcs0.html
* igt@i915_pm_rc6_residency@rc6-fence:
- shard-iclb: [WARN][149] ([i915#2684]) -> [WARN][150] ([i915#1804] / [i915#2684]) +1 similar issue
[149]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-iclb2/igt@i915_pm_rc6_residency@rc6-fence.html
[150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-iclb6/igt@i915_pm_rc6_residency@rc6-fence.html
* igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area:
- shard-iclb: [SKIP][151] ([fdo#111068] / [i915#658]) -> [SKIP][152] ([i915#2920])
[151]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-iclb1/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area.html
[152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-iclb2/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area.html
* igt@kms_psr2_su@page_flip-xrgb8888:
- shard-iclb: [FAIL][153] ([i915#4148]) -> [SKIP][154] ([fdo#109642] / [fdo#111068] / [i915#658])
[153]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-iclb2/igt@kms_psr2_su@page_flip-xrgb8888.html
[154]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-iclb6/igt@kms_psr2_su@page_flip-xrgb8888.html
* igt@runner@aborted:
- shard-kbl: ([FAIL][155], [FAIL][156], [FAIL][157], [FAIL][158], [FAIL][159], [FAIL][160]) ([fdo#109271] / [i915#180] / [i915#1814] / [i915#3002] / [i915#4312]) -> ([FAIL][161], [FAIL][162], [FAIL][163], [FAIL][164], [FAIL][165]) ([i915#1436] / [i915#180] / [i915#1814] / [i915#3002] / [i915#4312])
[155]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-kbl4/igt@runner@aborted.html
[156]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-kbl1/igt@runner@aborted.html
[157]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-kbl1/igt@runner@aborted.html
[158]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-kbl1/igt@runner@aborted.html
[159]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-kbl1/igt@runner@aborted.html
[160]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-kbl1/igt@runner@aborted.html
[161]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-kbl1/igt@runner@aborted.html
[162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-kbl1/igt@runner@aborted.html
[163]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-kbl4/igt@runner@aborted.html
[164]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-kbl6/igt@runner@aborted.html
[165]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-kbl1/igt@runner@aborted.html
- shard-skl: ([FAIL][166], [FAIL][167], [FAIL][168], [FAIL][169], [FAIL][170], [FAIL][171]) ([i915#1814] / [i915#2029] / [i915#3002] / [i915#4312]) -> ([FAIL][172], [FAIL][173], [FAIL][174], [FAIL][175], [FAIL][176]) ([i915#1436] / [i915#2722] / [i915#3002] / [i915#4312])
[166]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-skl3/igt@runner@aborted.html
[167]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-skl3/igt@runner@aborted.html
[168]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-skl6/igt@runner@aborted.html
[169]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-skl3/igt@runner@aborted.html
[170]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-skl8/igt@runner@aborted.html
[171]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11168/shard-skl8/igt@runner@aborted.html
[172]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-skl1/igt@runner@aborted.html
[173]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-skl9/igt@runner@aborted.html
[174]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-skl8/igt@runner@aborted.html
[175]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-skl1/igt@runner@aborted.html
[176]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/shard-skl8/igt@runner@aborted.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22146/index.html
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^ permalink raw reply [flat|nested] 13+ messages in thread
end of thread, other threads:[~2022-02-01 10:18 UTC | newest]
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-- links below jump to the message on this page --
2022-02-01 7:20 [PATCH v2 0/4] Minor Fixes and Refactoring for HDMI PCON stuff Ankit Nautiyal
2022-02-01 7:20 ` [Intel-gfx] " Ankit Nautiyal
2022-02-01 7:20 ` [PATCH v2 1/4] drm/i915/hdmi: Fix the definition of intel_hdmi_dsc_get_bpp Ankit Nautiyal
2022-02-01 7:20 ` [Intel-gfx] " Ankit Nautiyal
2022-02-01 7:20 ` [PATCH v2 2/4] drm/edid: Add helper to get max FRL rate for an HDMI sink Ankit Nautiyal
2022-02-01 7:20 ` [Intel-gfx] " Ankit Nautiyal
2022-02-01 7:20 ` [PATCH v2 3/4] drm/i915/dp: Use the drm helpers for getting max FRL rate Ankit Nautiyal
2022-02-01 7:20 ` [Intel-gfx] " Ankit Nautiyal
2022-02-01 7:20 ` [PATCH v2 4/4] drm/i915/display: Simplify helpers for getting DSC slices and bpp Ankit Nautiyal
2022-02-01 7:20 ` [Intel-gfx] " Ankit Nautiyal
2022-02-01 7:54 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Minor Fixes and Refactoring for HDMI PCON stuff (rev2) Patchwork
2022-02-01 8:21 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-02-01 10:18 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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