* [Intel-gfx] [PATCH v2 0/5] drm/i915: Futher optimize plane updates
@ 2022-02-10 6:23 Ville Syrjala
2022-02-10 6:23 ` [Intel-gfx] [PATCH v2 1/5] drm/i915: Optimize icl+ universal plane programming Ville Syrjala
` (10 more replies)
0 siblings, 11 replies; 19+ messages in thread
From: Ville Syrjala @ 2022-02-10 6:23 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Optimize icl+ plane updates by moving most register writes
into the .update_noarm() hook. Also stop taking uncore.lock
for plane register writes as well.
Just a rebase.
Ville Syrjälä (5):
drm/i915: Optimize icl+ universal plane programming
drm/i915: Make skl+ universal plane registers unlocked
drm/i915: Make cursor plane registers unlocked
drm/i915: Make most pre-skl primary plane registers unlocked
drm/i915: Make pre-skl sprite plane registers unlocked
drivers/gpu/drm/i915/display/i9xx_plane.c | 24 +--
drivers/gpu/drm/i915/display/intel_cursor.c | 10 -
drivers/gpu/drm/i915/display/intel_sprite.c | 45 ----
.../drm/i915/display/skl_universal_plane.c | 196 ++++++++++++------
4 files changed, 147 insertions(+), 128 deletions(-)
--
2.34.1
^ permalink raw reply [flat|nested] 19+ messages in thread
* [Intel-gfx] [PATCH v2 1/5] drm/i915: Optimize icl+ universal plane programming
2022-02-10 6:23 [Intel-gfx] [PATCH v2 0/5] drm/i915: Futher optimize plane updates Ville Syrjala
@ 2022-02-10 6:23 ` Ville Syrjala
2022-02-21 11:21 ` Lisovskiy, Stanislav
2022-02-10 6:24 ` [Intel-gfx] [PATCH v2 2/5] drm/i915: Make skl+ universal plane registers unlocked Ville Syrjala
` (9 subsequent siblings)
10 siblings, 1 reply; 19+ messages in thread
From: Ville Syrjala @ 2022-02-10 6:23 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
On icl+ all plane registers are armed by PLANE_SURF, so we can
move almost everything over into the update_noarm() hook.
The PLANE_CTL write has to stay in the icl_update_arm() hook though
as it still exhibits the somewhat annoying self-arming behaviour
when the plane transitioning from disabled to enabled.
We could either do a full split for skl+ vs. icl+, or we could try
some other kind of split where we'd eg. keep most things in the skl+
functions and call them from the icl+ functions. I think a full split
is probably the cleaner approach since we've anyway accumulated quite
a bit of icl+ specific things, so that is what I opted to do.
Some i915_update_info stats for tgl:
before: after:
Updates: 5043 Updates: 5043
| |
1us | 1us |
|** |***
4us |****** 4us |********
|********** |***********
16us |*********** 16us |**********
|**** |*
66us | 66us |
| |
262us | 262us |
| |
1ms | 1ms |
| |
4ms | 4ms |
| |
17ms | 17ms |
| |
Min update: 3494ns Min update: 2983ns
Max update: 49491ns Max update: 39986ns
Average update: 18031ns Average update: 13423ns
Overruns > 100us: 0 Overruns > 100us: 0
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
.../drm/i915/display/skl_universal_plane.c | 195 ++++++++++++++----
1 file changed, 155 insertions(+), 40 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 1223075595ff..5b1b089e045d 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -619,6 +619,25 @@ skl_plane_disable_arm(struct intel_plane *plane,
spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
+ skl_write_plane_wm(plane, crtc_state);
+
+ intel_de_write_fw(dev_priv, PLANE_CTL(pipe, plane_id), 0);
+ intel_de_write_fw(dev_priv, PLANE_SURF(pipe, plane_id), 0);
+
+ spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
+}
+
+static void
+icl_plane_disable_arm(struct intel_plane *plane,
+ const struct intel_crtc_state *crtc_state)
+{
+ struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
+ enum plane_id plane_id = plane->id;
+ enum pipe pipe = plane->pipe;
+ unsigned long irqflags;
+
+ spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
+
if (icl_is_hdr_plane(dev_priv, plane_id))
intel_de_write_fw(dev_priv, PLANE_CUS_CTL(pipe, plane_id), 0);
@@ -1065,7 +1084,7 @@ static void icl_plane_csc_load_black(struct intel_plane *plane)
intel_de_write_fw(i915, PLANE_CSC_POSTOFF(pipe, plane_id, 2), 0);
}
-static int skl_plane_color_plane(const struct intel_plane_state *plane_state)
+static int icl_plane_color_plane(const struct intel_plane_state *plane_state)
{
/* Program the UV plane on planar master */
if (plane_state->planar_linked_plane && !plane_state->planar_slave)
@@ -1082,9 +1101,7 @@ skl_plane_update_noarm(struct intel_plane *plane,
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
enum plane_id plane_id = plane->id;
enum pipe pipe = plane->pipe;
- int color_plane = skl_plane_color_plane(plane_state);
- u32 stride = skl_plane_stride(plane_state, color_plane);
- const struct drm_framebuffer *fb = plane_state->hw.fb;
+ u32 stride = skl_plane_stride(plane_state, 0);
int crtc_x = plane_state->uapi.dst.x1;
int crtc_y = plane_state->uapi.dst.y1;
u32 src_w = drm_rect_width(&plane_state->uapi.src) >> 16;
@@ -1099,12 +1116,109 @@ skl_plane_update_noarm(struct intel_plane *plane,
spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
+ intel_de_write_fw(dev_priv, PLANE_STRIDE(pipe, plane_id),
+ PLANE_STRIDE_(stride));
+ intel_de_write_fw(dev_priv, PLANE_POS(pipe, plane_id),
+ PLANE_POS_Y(crtc_y) | PLANE_POS_X(crtc_x));
+ intel_de_write_fw(dev_priv, PLANE_SIZE(pipe, plane_id),
+ PLANE_HEIGHT(src_h - 1) | PLANE_WIDTH(src_w - 1));
+
+ skl_write_plane_wm(plane, crtc_state);
+
+ spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
+}
+
+static void
+skl_plane_update_arm(struct intel_plane *plane,
+ const struct intel_crtc_state *crtc_state,
+ const struct intel_plane_state *plane_state)
+{
+ struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
+ enum plane_id plane_id = plane->id;
+ enum pipe pipe = plane->pipe;
+ u32 x = plane_state->view.color_plane[0].x;
+ u32 y = plane_state->view.color_plane[0].y;
+ u32 plane_ctl, plane_color_ctl = 0;
+ unsigned long irqflags;
+
+ plane_ctl = plane_state->ctl |
+ skl_plane_ctl_crtc(crtc_state);
+
+ if (DISPLAY_VER(dev_priv) >= 10)
+ plane_color_ctl = plane_state->color_ctl |
+ glk_plane_color_ctl_crtc(crtc_state);
+
+ spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
+
+ intel_de_write_fw(dev_priv, PLANE_KEYVAL(pipe, plane_id), skl_plane_keyval(plane_state));
+ intel_de_write_fw(dev_priv, PLANE_KEYMSK(pipe, plane_id), skl_plane_keymsk(plane_state));
+ intel_de_write_fw(dev_priv, PLANE_KEYMAX(pipe, plane_id), skl_plane_keymax(plane_state));
+
+ intel_de_write_fw(dev_priv, PLANE_OFFSET(pipe, plane_id),
+ PLANE_OFFSET_Y(y) | PLANE_OFFSET_X(x));
+
+ intel_de_write_fw(dev_priv, PLANE_AUX_DIST(pipe, plane_id),
+ skl_plane_aux_dist(plane_state, 0));
+
+ intel_de_write_fw(dev_priv, PLANE_AUX_OFFSET(pipe, plane_id),
+ PLANE_OFFSET_Y(plane_state->view.color_plane[1].y) |
+ PLANE_OFFSET_X(plane_state->view.color_plane[1].x));
+
+ if (DISPLAY_VER(dev_priv) >= 10)
+ intel_de_write_fw(dev_priv, PLANE_COLOR_CTL(pipe, plane_id), plane_color_ctl);
+
+ /*
+ * Enable the scaler before the plane so that we don't
+ * get a catastrophic underrun even if the two operations
+ * end up happening in two different frames.
+ *
+ * TODO: split into noarm+arm pair
+ */
+ if (plane_state->scaler_id >= 0)
+ skl_program_plane_scaler(plane, crtc_state, plane_state);
+
/*
- * FIXME: pxp session invalidation can hit any time even at time of commit
- * or after the commit, display content will be garbage.
+ * The control register self-arms if the plane was previously
+ * disabled. Try to make the plane enable atomic by writing
+ * the control register just before the surface register.
*/
- if (plane_state->force_black)
- icl_plane_csc_load_black(plane);
+ intel_de_write_fw(dev_priv, PLANE_CTL(pipe, plane_id), plane_ctl);
+ intel_de_write_fw(dev_priv, PLANE_SURF(pipe, plane_id),
+ skl_plane_surf(plane_state, 0));
+
+ spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
+}
+
+static void
+icl_plane_update_noarm(struct intel_plane *plane,
+ const struct intel_crtc_state *crtc_state,
+ const struct intel_plane_state *plane_state)
+{
+ struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
+ enum plane_id plane_id = plane->id;
+ enum pipe pipe = plane->pipe;
+ int color_plane = icl_plane_color_plane(plane_state);
+ u32 stride = skl_plane_stride(plane_state, color_plane);
+ const struct drm_framebuffer *fb = plane_state->hw.fb;
+ int crtc_x = plane_state->uapi.dst.x1;
+ int crtc_y = plane_state->uapi.dst.y1;
+ int x = plane_state->view.color_plane[color_plane].x;
+ int y = plane_state->view.color_plane[color_plane].y;
+ int src_w = drm_rect_width(&plane_state->uapi.src) >> 16;
+ int src_h = drm_rect_height(&plane_state->uapi.src) >> 16;
+ u32 plane_color_ctl;
+ unsigned long irqflags;
+
+ plane_color_ctl = plane_state->color_ctl |
+ glk_plane_color_ctl_crtc(crtc_state);
+
+ /* The scaler will handle the output position */
+ if (plane_state->scaler_id >= 0) {
+ crtc_x = 0;
+ crtc_y = 0;
+ }
+
+ spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
intel_de_write_fw(dev_priv, PLANE_STRIDE(pipe, plane_id),
PLANE_STRIDE_(stride));
@@ -1113,6 +1227,13 @@ skl_plane_update_noarm(struct intel_plane *plane,
intel_de_write_fw(dev_priv, PLANE_SIZE(pipe, plane_id),
PLANE_HEIGHT(src_h - 1) | PLANE_WIDTH(src_w - 1));
+ intel_de_write_fw(dev_priv, PLANE_KEYVAL(pipe, plane_id), skl_plane_keyval(plane_state));
+ intel_de_write_fw(dev_priv, PLANE_KEYMSK(pipe, plane_id), skl_plane_keymsk(plane_state));
+ intel_de_write_fw(dev_priv, PLANE_KEYMAX(pipe, plane_id), skl_plane_keymax(plane_state));
+
+ intel_de_write_fw(dev_priv, PLANE_OFFSET(pipe, plane_id),
+ PLANE_OFFSET_Y(y) | PLANE_OFFSET_X(x));
+
if (intel_fb_is_rc_ccs_cc_modifier(fb->modifier)) {
intel_de_write_fw(dev_priv, PLANE_CC_VAL(pipe, plane_id, 0),
lower_32_bits(plane_state->ccval));
@@ -1120,61 +1241,49 @@ skl_plane_update_noarm(struct intel_plane *plane,
upper_32_bits(plane_state->ccval));
}
+ intel_de_write_fw(dev_priv, PLANE_AUX_DIST(pipe, plane_id),
+ skl_plane_aux_dist(plane_state, color_plane));
+
if (icl_is_hdr_plane(dev_priv, plane_id))
intel_de_write_fw(dev_priv, PLANE_CUS_CTL(pipe, plane_id),
plane_state->cus_ctl);
+ intel_de_write_fw(dev_priv, PLANE_COLOR_CTL(pipe, plane_id), plane_color_ctl);
+
if (fb->format->is_yuv && icl_is_hdr_plane(dev_priv, plane_id))
icl_program_input_csc(plane, crtc_state, plane_state);
skl_write_plane_wm(plane, crtc_state);
+ /*
+ * FIXME: pxp session invalidation can hit any time even at time of commit
+ * or after the commit, display content will be garbage.
+ */
+ if (plane_state->force_black)
+ icl_plane_csc_load_black(plane);
+
intel_psr2_program_plane_sel_fetch(plane, crtc_state, plane_state, color_plane);
spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
}
static void
-skl_plane_update_arm(struct intel_plane *plane,
+icl_plane_update_arm(struct intel_plane *plane,
const struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state)
{
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
enum plane_id plane_id = plane->id;
enum pipe pipe = plane->pipe;
- int color_plane = skl_plane_color_plane(plane_state);
- u32 x = plane_state->view.color_plane[color_plane].x;
- u32 y = plane_state->view.color_plane[color_plane].y;
- u32 plane_color_ctl = 0;
- u32 plane_ctl = plane_state->ctl;
+ int color_plane = icl_plane_color_plane(plane_state);
+ u32 plane_ctl;
unsigned long irqflags;
- plane_ctl |= skl_plane_ctl_crtc(crtc_state);
-
- if (DISPLAY_VER(dev_priv) >= 10)
- plane_color_ctl = plane_state->color_ctl |
- glk_plane_color_ctl_crtc(crtc_state);
+ plane_ctl = plane_state->ctl |
+ skl_plane_ctl_crtc(crtc_state);
spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
- intel_de_write_fw(dev_priv, PLANE_KEYVAL(pipe, plane_id), skl_plane_keyval(plane_state));
- intel_de_write_fw(dev_priv, PLANE_KEYMSK(pipe, plane_id), skl_plane_keymsk(plane_state));
- intel_de_write_fw(dev_priv, PLANE_KEYMAX(pipe, plane_id), skl_plane_keymax(plane_state));
-
- intel_de_write_fw(dev_priv, PLANE_OFFSET(pipe, plane_id),
- PLANE_OFFSET_Y(y) | PLANE_OFFSET_X(x));
-
- intel_de_write_fw(dev_priv, PLANE_AUX_DIST(pipe, plane_id),
- skl_plane_aux_dist(plane_state, color_plane));
-
- if (DISPLAY_VER(dev_priv) < 11)
- intel_de_write_fw(dev_priv, PLANE_AUX_OFFSET(pipe, plane_id),
- PLANE_OFFSET_Y(plane_state->view.color_plane[1].y) |
- PLANE_OFFSET_X(plane_state->view.color_plane[1].x));
-
- if (DISPLAY_VER(dev_priv) >= 10)
- intel_de_write_fw(dev_priv, PLANE_COLOR_CTL(pipe, plane_id), plane_color_ctl);
-
/*
* Enable the scaler before the plane so that we don't
* get a catastrophic underrun even if the two operations
@@ -2162,9 +2271,15 @@ skl_universal_plane_create(struct drm_i915_private *dev_priv,
}
plane->max_stride = skl_plane_max_stride;
- plane->update_noarm = skl_plane_update_noarm;
- plane->update_arm = skl_plane_update_arm;
- plane->disable_arm = skl_plane_disable_arm;
+ if (DISPLAY_VER(dev_priv) >= 11) {
+ plane->update_noarm = icl_plane_update_noarm;
+ plane->update_arm = icl_plane_update_arm;
+ plane->disable_arm = icl_plane_disable_arm;
+ } else {
+ plane->update_noarm = skl_plane_update_noarm;
+ plane->update_arm = skl_plane_update_arm;
+ plane->disable_arm = skl_plane_disable_arm;
+ }
plane->get_hw_state = skl_plane_get_hw_state;
plane->check_plane = skl_plane_check;
--
2.34.1
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [Intel-gfx] [PATCH v2 2/5] drm/i915: Make skl+ universal plane registers unlocked
2022-02-10 6:23 [Intel-gfx] [PATCH v2 0/5] drm/i915: Futher optimize plane updates Ville Syrjala
2022-02-10 6:23 ` [Intel-gfx] [PATCH v2 1/5] drm/i915: Optimize icl+ universal plane programming Ville Syrjala
@ 2022-02-10 6:24 ` Ville Syrjala
2022-02-24 14:38 ` Lisovskiy, Stanislav
2022-02-10 6:24 ` [Intel-gfx] [PATCH v2 3/5] drm/i915: Make cursor " Ville Syrjala
` (8 subsequent siblings)
10 siblings, 1 reply; 19+ messages in thread
From: Ville Syrjala @ 2022-02-10 6:24 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Drop the locks around most universal plane register writes.
The lock isn't needed since each plane's register are neatly
contained on their own cachelines.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
.../drm/i915/display/skl_universal_plane.c | 35 -------------------
1 file changed, 35 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 5b1b089e045d..db9e31c12169 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -615,16 +615,11 @@ skl_plane_disable_arm(struct intel_plane *plane,
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
enum plane_id plane_id = plane->id;
enum pipe pipe = plane->pipe;
- unsigned long irqflags;
-
- spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
skl_write_plane_wm(plane, crtc_state);
intel_de_write_fw(dev_priv, PLANE_CTL(pipe, plane_id), 0);
intel_de_write_fw(dev_priv, PLANE_SURF(pipe, plane_id), 0);
-
- spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
}
static void
@@ -634,9 +629,6 @@ icl_plane_disable_arm(struct intel_plane *plane,
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
enum plane_id plane_id = plane->id;
enum pipe pipe = plane->pipe;
- unsigned long irqflags;
-
- spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
if (icl_is_hdr_plane(dev_priv, plane_id))
intel_de_write_fw(dev_priv, PLANE_CUS_CTL(pipe, plane_id), 0);
@@ -646,8 +638,6 @@ icl_plane_disable_arm(struct intel_plane *plane,
intel_psr2_disable_plane_sel_fetch(plane, crtc_state);
intel_de_write_fw(dev_priv, PLANE_CTL(pipe, plane_id), 0);
intel_de_write_fw(dev_priv, PLANE_SURF(pipe, plane_id), 0);
-
- spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
}
static bool
@@ -1106,7 +1096,6 @@ skl_plane_update_noarm(struct intel_plane *plane,
int crtc_y = plane_state->uapi.dst.y1;
u32 src_w = drm_rect_width(&plane_state->uapi.src) >> 16;
u32 src_h = drm_rect_height(&plane_state->uapi.src) >> 16;
- unsigned long irqflags;
/* The scaler will handle the output position */
if (plane_state->scaler_id >= 0) {
@@ -1114,8 +1103,6 @@ skl_plane_update_noarm(struct intel_plane *plane,
crtc_y = 0;
}
- spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
-
intel_de_write_fw(dev_priv, PLANE_STRIDE(pipe, plane_id),
PLANE_STRIDE_(stride));
intel_de_write_fw(dev_priv, PLANE_POS(pipe, plane_id),
@@ -1124,8 +1111,6 @@ skl_plane_update_noarm(struct intel_plane *plane,
PLANE_HEIGHT(src_h - 1) | PLANE_WIDTH(src_w - 1));
skl_write_plane_wm(plane, crtc_state);
-
- spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
}
static void
@@ -1139,7 +1124,6 @@ skl_plane_update_arm(struct intel_plane *plane,
u32 x = plane_state->view.color_plane[0].x;
u32 y = plane_state->view.color_plane[0].y;
u32 plane_ctl, plane_color_ctl = 0;
- unsigned long irqflags;
plane_ctl = plane_state->ctl |
skl_plane_ctl_crtc(crtc_state);
@@ -1148,8 +1132,6 @@ skl_plane_update_arm(struct intel_plane *plane,
plane_color_ctl = plane_state->color_ctl |
glk_plane_color_ctl_crtc(crtc_state);
- spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
-
intel_de_write_fw(dev_priv, PLANE_KEYVAL(pipe, plane_id), skl_plane_keyval(plane_state));
intel_de_write_fw(dev_priv, PLANE_KEYMSK(pipe, plane_id), skl_plane_keymsk(plane_state));
intel_de_write_fw(dev_priv, PLANE_KEYMAX(pipe, plane_id), skl_plane_keymax(plane_state));
@@ -1185,8 +1167,6 @@ skl_plane_update_arm(struct intel_plane *plane,
intel_de_write_fw(dev_priv, PLANE_CTL(pipe, plane_id), plane_ctl);
intel_de_write_fw(dev_priv, PLANE_SURF(pipe, plane_id),
skl_plane_surf(plane_state, 0));
-
- spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
}
static void
@@ -1207,7 +1187,6 @@ icl_plane_update_noarm(struct intel_plane *plane,
int src_w = drm_rect_width(&plane_state->uapi.src) >> 16;
int src_h = drm_rect_height(&plane_state->uapi.src) >> 16;
u32 plane_color_ctl;
- unsigned long irqflags;
plane_color_ctl = plane_state->color_ctl |
glk_plane_color_ctl_crtc(crtc_state);
@@ -1218,8 +1197,6 @@ icl_plane_update_noarm(struct intel_plane *plane,
crtc_y = 0;
}
- spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
-
intel_de_write_fw(dev_priv, PLANE_STRIDE(pipe, plane_id),
PLANE_STRIDE_(stride));
intel_de_write_fw(dev_priv, PLANE_POS(pipe, plane_id),
@@ -1263,8 +1240,6 @@ icl_plane_update_noarm(struct intel_plane *plane,
icl_plane_csc_load_black(plane);
intel_psr2_program_plane_sel_fetch(plane, crtc_state, plane_state, color_plane);
-
- spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
}
static void
@@ -1277,13 +1252,10 @@ icl_plane_update_arm(struct intel_plane *plane,
enum pipe pipe = plane->pipe;
int color_plane = icl_plane_color_plane(plane_state);
u32 plane_ctl;
- unsigned long irqflags;
plane_ctl = plane_state->ctl |
skl_plane_ctl_crtc(crtc_state);
- spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
-
/*
* Enable the scaler before the plane so that we don't
* get a catastrophic underrun even if the two operations
@@ -1302,8 +1274,6 @@ icl_plane_update_arm(struct intel_plane *plane,
intel_de_write_fw(dev_priv, PLANE_CTL(pipe, plane_id), plane_ctl);
intel_de_write_fw(dev_priv, PLANE_SURF(pipe, plane_id),
skl_plane_surf(plane_state, color_plane));
-
- spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
}
static void
@@ -1313,7 +1283,6 @@ skl_plane_async_flip(struct intel_plane *plane,
bool async_flip)
{
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
- unsigned long irqflags;
enum plane_id plane_id = plane->id;
enum pipe pipe = plane->pipe;
u32 plane_ctl = plane_state->ctl;
@@ -1323,13 +1292,9 @@ skl_plane_async_flip(struct intel_plane *plane,
if (async_flip)
plane_ctl |= PLANE_CTL_ASYNC_FLIP;
- spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
-
intel_de_write_fw(dev_priv, PLANE_CTL(pipe, plane_id), plane_ctl);
intel_de_write_fw(dev_priv, PLANE_SURF(pipe, plane_id),
skl_plane_surf(plane_state, 0));
-
- spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
}
static bool intel_format_is_p01x(u32 format)
--
2.34.1
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [Intel-gfx] [PATCH v2 3/5] drm/i915: Make cursor plane registers unlocked
2022-02-10 6:23 [Intel-gfx] [PATCH v2 0/5] drm/i915: Futher optimize plane updates Ville Syrjala
2022-02-10 6:23 ` [Intel-gfx] [PATCH v2 1/5] drm/i915: Optimize icl+ universal plane programming Ville Syrjala
2022-02-10 6:24 ` [Intel-gfx] [PATCH v2 2/5] drm/i915: Make skl+ universal plane registers unlocked Ville Syrjala
@ 2022-02-10 6:24 ` Ville Syrjala
2022-02-11 9:26 ` [Intel-gfx] [PATCH v3 " Ville Syrjala
2022-02-10 6:24 ` [Intel-gfx] [PATCH v2 4/5] drm/i915: Make most pre-skl primary " Ville Syrjala
` (7 subsequent siblings)
10 siblings, 1 reply; 19+ messages in thread
From: Ville Syrjala @ 2022-02-10 6:24 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Drop the locks around cursor plane register writes. The
lock isn't needed since each plane's register are neatly
contained on their own cachelines.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_cursor.c | 10 ----------
1 file changed, 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c b/drivers/gpu/drm/i915/display/intel_cursor.c
index 2ade8fdd9bdd..625c1fb68273 100644
--- a/drivers/gpu/drm/i915/display/intel_cursor.c
+++ b/drivers/gpu/drm/i915/display/intel_cursor.c
@@ -255,7 +255,6 @@ static void i845_cursor_update_arm(struct intel_plane *plane,
{
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
u32 cntl = 0, base = 0, pos = 0, size = 0;
- unsigned long irqflags;
if (plane_state && plane_state->uapi.visible) {
unsigned int width = drm_rect_width(&plane_state->uapi.dst);
@@ -270,8 +269,6 @@ static void i845_cursor_update_arm(struct intel_plane *plane,
pos = intel_cursor_position(plane_state);
}
- spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
-
/* On these chipsets we can only modify the base/size/stride
* whilst the cursor is disabled.
*/
@@ -290,8 +287,6 @@ static void i845_cursor_update_arm(struct intel_plane *plane,
} else {
intel_de_write_fw(dev_priv, CURPOS(PIPE_A), pos);
}
-
- spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
}
static void i845_cursor_disable_arm(struct intel_plane *plane,
@@ -492,7 +487,6 @@ static void i9xx_cursor_update_arm(struct intel_plane *plane,
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
enum pipe pipe = plane->pipe;
u32 cntl = 0, base = 0, pos = 0, fbc_ctl = 0;
- unsigned long irqflags;
if (plane_state && plane_state->uapi.visible) {
int width = drm_rect_width(&plane_state->uapi.dst);
@@ -508,8 +502,6 @@ static void i9xx_cursor_update_arm(struct intel_plane *plane,
pos = intel_cursor_position(plane_state);
}
- spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
-
/*
* On some platforms writing CURCNTR first will also
* cause CURPOS to be armed by the CURBASE write.
@@ -555,8 +547,6 @@ static void i9xx_cursor_update_arm(struct intel_plane *plane,
intel_de_write_fw(dev_priv, CURPOS(pipe), pos);
intel_de_write_fw(dev_priv, CURBASE(pipe), base);
}
-
- spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
}
static void i9xx_cursor_disable_arm(struct intel_plane *plane,
--
2.34.1
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [Intel-gfx] [PATCH v2 4/5] drm/i915: Make most pre-skl primary plane registers unlocked
2022-02-10 6:23 [Intel-gfx] [PATCH v2 0/5] drm/i915: Futher optimize plane updates Ville Syrjala
` (2 preceding siblings ...)
2022-02-10 6:24 ` [Intel-gfx] [PATCH v2 3/5] drm/i915: Make cursor " Ville Syrjala
@ 2022-02-10 6:24 ` Ville Syrjala
2022-02-21 11:19 ` Lisovskiy, Stanislav
2022-02-10 6:24 ` [Intel-gfx] [PATCH v2 5/5] drm/i915: Make pre-skl sprite " Ville Syrjala
` (6 subsequent siblings)
10 siblings, 1 reply; 19+ messages in thread
From: Ville Syrjala @ 2022-02-10 6:24 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Drop the locks around most primary plane register writes.
The lock isn't needed since each plane's register are neatly
contained on their own cachelines.
The one exception we have to make is DSPADDR/DSPSURF which is
(ab)used to also trigger FBC nukes on pre-snb (since the
hardware doesn't seem to have any dedicated mechanism to
trigger nukes). So we need to keep the lock around it to
protect against the rmw performed by the fbc code.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/i9xx_plane.c | 24 +++++++++--------------
1 file changed, 9 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/i9xx_plane.c b/drivers/gpu/drm/i915/display/i9xx_plane.c
index a87b65cd41fd..af190bacdd97 100644
--- a/drivers/gpu/drm/i915/display/i9xx_plane.c
+++ b/drivers/gpu/drm/i915/display/i9xx_plane.c
@@ -418,9 +418,6 @@ static void i9xx_plane_update_noarm(struct intel_plane *plane,
{
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;
- unsigned long irqflags;
-
- spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
intel_de_write_fw(dev_priv, DSPSTRIDE(i9xx_plane),
plane_state->view.color_plane[0].mapping_stride);
@@ -441,8 +438,6 @@ static void i9xx_plane_update_noarm(struct intel_plane *plane,
intel_de_write_fw(dev_priv, DSPSIZE(i9xx_plane),
DISP_HEIGHT(crtc_h - 1) | DISP_WIDTH(crtc_w - 1));
}
-
- spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
}
static void i9xx_plane_update_arm(struct intel_plane *plane,
@@ -465,8 +460,6 @@ static void i9xx_plane_update_arm(struct intel_plane *plane,
else
dspaddr_offset = linear_offset;
- spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
-
if (IS_CHERRYVIEW(dev_priv) && i9xx_plane == PLANE_B) {
int crtc_x = plane_state->uapi.dst.x1;
int crtc_y = plane_state->uapi.dst.y1;
@@ -496,13 +489,15 @@ static void i9xx_plane_update_arm(struct intel_plane *plane,
* the control register just before the surface register.
*/
intel_de_write_fw(dev_priv, DSPCNTR(i9xx_plane), dspcntr);
+
+ /* lock to protect against rmw in fbc nuke */
+ spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
if (DISPLAY_VER(dev_priv) >= 4)
intel_de_write_fw(dev_priv, DSPSURF(i9xx_plane),
intel_plane_ggtt_offset(plane_state) + dspaddr_offset);
else
intel_de_write_fw(dev_priv, DSPADDR(i9xx_plane),
intel_plane_ggtt_offset(plane_state) + dspaddr_offset);
-
spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
}
@@ -540,14 +535,14 @@ static void i9xx_plane_disable_arm(struct intel_plane *plane,
*/
dspcntr = i9xx_plane_ctl_crtc(crtc_state);
- spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
-
intel_de_write_fw(dev_priv, DSPCNTR(i9xx_plane), dspcntr);
+
+ /* lock to protect against rmw in fbc nuke */
+ spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
if (DISPLAY_VER(dev_priv) >= 4)
intel_de_write_fw(dev_priv, DSPSURF(i9xx_plane), 0);
else
intel_de_write_fw(dev_priv, DSPADDR(i9xx_plane), 0);
-
spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
}
@@ -566,8 +561,10 @@ g4x_primary_async_flip(struct intel_plane *plane,
if (async_flip)
dspcntr |= DISP_ASYNC_FLIP;
- spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
intel_de_write_fw(dev_priv, DSPCNTR(i9xx_plane), dspcntr);
+
+ /* lock to protect against rmw in fbc nuke */
+ spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
intel_de_write_fw(dev_priv, DSPSURF(i9xx_plane),
intel_plane_ggtt_offset(plane_state) + dspaddr_offset);
spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
@@ -582,12 +579,9 @@ vlv_primary_async_flip(struct intel_plane *plane,
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
u32 dspaddr_offset = plane_state->view.color_plane[0].offset;
enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;
- unsigned long irqflags;
- spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
intel_de_write_fw(dev_priv, DSPADDR_VLV(i9xx_plane),
intel_plane_ggtt_offset(plane_state) + dspaddr_offset);
- spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
}
static void
--
2.34.1
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [Intel-gfx] [PATCH v2 5/5] drm/i915: Make pre-skl sprite plane registers unlocked
2022-02-10 6:23 [Intel-gfx] [PATCH v2 0/5] drm/i915: Futher optimize plane updates Ville Syrjala
` (3 preceding siblings ...)
2022-02-10 6:24 ` [Intel-gfx] [PATCH v2 4/5] drm/i915: Make most pre-skl primary " Ville Syrjala
@ 2022-02-10 6:24 ` Ville Syrjala
2022-02-21 11:18 ` Lisovskiy, Stanislav
2022-02-10 7:01 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Futher optimize plane updates (rev3) Patchwork
` (5 subsequent siblings)
10 siblings, 1 reply; 19+ messages in thread
From: Ville Syrjala @ 2022-02-10 6:24 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Drop the locks around sprite plane register writes. The
lock isn't needed since each plane's register are neatly
contained on their own cachelines.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_sprite.c | 45 ---------------------
1 file changed, 45 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
index 2d71294aaceb..f6875a49b8cb 100644
--- a/drivers/gpu/drm/i915/display/intel_sprite.c
+++ b/drivers/gpu/drm/i915/display/intel_sprite.c
@@ -430,9 +430,6 @@ vlv_sprite_update_noarm(struct intel_plane *plane,
int crtc_y = plane_state->uapi.dst.y1;
u32 crtc_w = drm_rect_width(&plane_state->uapi.dst);
u32 crtc_h = drm_rect_height(&plane_state->uapi.dst);
- unsigned long irqflags;
-
- spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
intel_de_write_fw(dev_priv, SPSTRIDE(pipe, plane_id),
plane_state->view.color_plane[0].mapping_stride);
@@ -440,8 +437,6 @@ vlv_sprite_update_noarm(struct intel_plane *plane,
SP_POS_Y(crtc_y) | SP_POS_X(crtc_x));
intel_de_write_fw(dev_priv, SPSIZE(pipe, plane_id),
SP_HEIGHT(crtc_h - 1) | SP_WIDTH(crtc_w - 1));
-
- spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
}
static void
@@ -457,14 +452,11 @@ vlv_sprite_update_arm(struct intel_plane *plane,
u32 x = plane_state->view.color_plane[0].x;
u32 y = plane_state->view.color_plane[0].y;
u32 sprctl, linear_offset;
- unsigned long irqflags;
sprctl = plane_state->ctl | vlv_sprite_ctl_crtc(crtc_state);
linear_offset = intel_fb_xy_to_linear(x, y, plane_state, 0);
- spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
-
if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B)
chv_sprite_update_csc(plane_state);
@@ -494,8 +486,6 @@ vlv_sprite_update_arm(struct intel_plane *plane,
vlv_sprite_update_clrc(plane_state);
vlv_sprite_update_gamma(plane_state);
-
- spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
}
static void
@@ -505,14 +495,9 @@ vlv_sprite_disable_arm(struct intel_plane *plane,
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
enum pipe pipe = plane->pipe;
enum plane_id plane_id = plane->id;
- unsigned long irqflags;
-
- spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
intel_de_write_fw(dev_priv, SPCNTR(pipe, plane_id), 0);
intel_de_write_fw(dev_priv, SPSURF(pipe, plane_id), 0);
-
- spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
}
static bool
@@ -862,15 +847,12 @@ ivb_sprite_update_noarm(struct intel_plane *plane,
u32 src_w = drm_rect_width(&plane_state->uapi.src) >> 16;
u32 src_h = drm_rect_height(&plane_state->uapi.src) >> 16;
u32 sprscale = 0;
- unsigned long irqflags;
if (crtc_w != src_w || crtc_h != src_h)
sprscale = SPRITE_SCALE_ENABLE |
SPRITE_SRC_WIDTH(src_w - 1) |
SPRITE_SRC_HEIGHT(src_h - 1);
- spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
-
intel_de_write_fw(dev_priv, SPRSTRIDE(pipe),
plane_state->view.color_plane[0].mapping_stride);
intel_de_write_fw(dev_priv, SPRPOS(pipe),
@@ -879,8 +861,6 @@ ivb_sprite_update_noarm(struct intel_plane *plane,
SPRITE_HEIGHT(crtc_h - 1) | SPRITE_WIDTH(crtc_w - 1));
if (IS_IVYBRIDGE(dev_priv))
intel_de_write_fw(dev_priv, SPRSCALE(pipe), sprscale);
-
- spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
}
static void
@@ -895,14 +875,11 @@ ivb_sprite_update_arm(struct intel_plane *plane,
u32 x = plane_state->view.color_plane[0].x;
u32 y = plane_state->view.color_plane[0].y;
u32 sprctl, linear_offset;
- unsigned long irqflags;
sprctl = plane_state->ctl | ivb_sprite_ctl_crtc(crtc_state);
linear_offset = intel_fb_xy_to_linear(x, y, plane_state, 0);
- spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
-
if (key->flags) {
intel_de_write_fw(dev_priv, SPRKEYVAL(pipe), key->min_value);
intel_de_write_fw(dev_priv, SPRKEYMSK(pipe),
@@ -931,8 +908,6 @@ ivb_sprite_update_arm(struct intel_plane *plane,
intel_plane_ggtt_offset(plane_state) + sprsurf_offset);
ivb_sprite_update_gamma(plane_state);
-
- spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
}
static void
@@ -941,17 +916,12 @@ ivb_sprite_disable_arm(struct intel_plane *plane,
{
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
enum pipe pipe = plane->pipe;
- unsigned long irqflags;
-
- spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
intel_de_write_fw(dev_priv, SPRCTL(pipe), 0);
/* Disable the scaler */
if (IS_IVYBRIDGE(dev_priv))
intel_de_write_fw(dev_priv, SPRSCALE(pipe), 0);
intel_de_write_fw(dev_priv, SPRSURF(pipe), 0);
-
- spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
}
static bool
@@ -1204,15 +1174,12 @@ g4x_sprite_update_noarm(struct intel_plane *plane,
u32 src_w = drm_rect_width(&plane_state->uapi.src) >> 16;
u32 src_h = drm_rect_height(&plane_state->uapi.src) >> 16;
u32 dvsscale = 0;
- unsigned long irqflags;
if (crtc_w != src_w || crtc_h != src_h)
dvsscale = DVS_SCALE_ENABLE |
DVS_SRC_WIDTH(src_w - 1) |
DVS_SRC_HEIGHT(src_h - 1);
- spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
-
intel_de_write_fw(dev_priv, DVSSTRIDE(pipe),
plane_state->view.color_plane[0].mapping_stride);
intel_de_write_fw(dev_priv, DVSPOS(pipe),
@@ -1220,8 +1187,6 @@ g4x_sprite_update_noarm(struct intel_plane *plane,
intel_de_write_fw(dev_priv, DVSSIZE(pipe),
DVS_HEIGHT(crtc_h - 1) | DVS_WIDTH(crtc_w - 1));
intel_de_write_fw(dev_priv, DVSSCALE(pipe), dvsscale);
-
- spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
}
static void
@@ -1236,14 +1201,11 @@ g4x_sprite_update_arm(struct intel_plane *plane,
u32 x = plane_state->view.color_plane[0].x;
u32 y = plane_state->view.color_plane[0].y;
u32 dvscntr, linear_offset;
- unsigned long irqflags;
dvscntr = plane_state->ctl | g4x_sprite_ctl_crtc(crtc_state);
linear_offset = intel_fb_xy_to_linear(x, y, plane_state, 0);
- spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
-
if (key->flags) {
intel_de_write_fw(dev_priv, DVSKEYVAL(pipe), key->min_value);
intel_de_write_fw(dev_priv, DVSKEYMSK(pipe),
@@ -1267,8 +1229,6 @@ g4x_sprite_update_arm(struct intel_plane *plane,
g4x_sprite_update_gamma(plane_state);
else
ilk_sprite_update_gamma(plane_state);
-
- spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
}
static void
@@ -1277,16 +1237,11 @@ g4x_sprite_disable_arm(struct intel_plane *plane,
{
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
enum pipe pipe = plane->pipe;
- unsigned long irqflags;
-
- spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
intel_de_write_fw(dev_priv, DVSCNTR(pipe), 0);
/* Disable the scaler */
intel_de_write_fw(dev_priv, DVSSCALE(pipe), 0);
intel_de_write_fw(dev_priv, DVSSURF(pipe), 0);
-
- spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
}
static bool
--
2.34.1
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Futher optimize plane updates (rev3)
2022-02-10 6:23 [Intel-gfx] [PATCH v2 0/5] drm/i915: Futher optimize plane updates Ville Syrjala
` (4 preceding siblings ...)
2022-02-10 6:24 ` [Intel-gfx] [PATCH v2 5/5] drm/i915: Make pre-skl sprite " Ville Syrjala
@ 2022-02-10 7:01 ` Patchwork
2022-02-10 8:15 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
` (4 subsequent siblings)
10 siblings, 0 replies; 19+ messages in thread
From: Patchwork @ 2022-02-10 7:01 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 3667 bytes --]
== Series Details ==
Series: drm/i915: Futher optimize plane updates (rev3)
URL : https://patchwork.freedesktop.org/series/99149/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11207 -> Patchwork_22234
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/index.html
Participating hosts (45 -> 43)
------------------------------
Additional (1): bat-rpls-1
Missing (3): fi-bsw-cyan fi-icl-u2 shard-tglu
Known issues
------------
Here are the changes found in Patchwork_22234 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_flink_basic@bad-flink:
- fi-skl-6600u: [PASS][1] -> [FAIL][2] ([i915#4547])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/fi-skl-6600u/igt@gem_flink_basic@bad-flink.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/fi-skl-6600u/igt@gem_flink_basic@bad-flink.html
* igt@i915_selftest@live@hangcheck:
- bat-dg1-6: [PASS][3] -> [DMESG-FAIL][4] ([i915#4494] / [i915#4957])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/bat-dg1-6/igt@i915_selftest@live@hangcheck.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/bat-dg1-6/igt@i915_selftest@live@hangcheck.html
* igt@kms_pipe_crc_basic@read-crc-pipe-b:
- fi-cfl-8109u: [PASS][5] -> [DMESG-WARN][6] ([i915#295]) +12 similar issues
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/fi-cfl-8109u/igt@kms_pipe_crc_basic@read-crc-pipe-b.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/fi-cfl-8109u/igt@kms_pipe_crc_basic@read-crc-pipe-b.html
#### Warnings ####
* igt@i915_pm_rpm@basic-rte:
- fi-kbl-guc: [SKIP][7] ([fdo#109271]) -> [FAIL][8] ([i915#3049])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/fi-kbl-guc/igt@i915_pm_rpm@basic-rte.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/fi-kbl-guc/igt@i915_pm_rpm@basic-rte.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[i915#295]: https://gitlab.freedesktop.org/drm/intel/issues/295
[i915#3049]: https://gitlab.freedesktop.org/drm/intel/issues/3049
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#4494]: https://gitlab.freedesktop.org/drm/intel/issues/4494
[i915#4547]: https://gitlab.freedesktop.org/drm/intel/issues/4547
[i915#4897]: https://gitlab.freedesktop.org/drm/intel/issues/4897
[i915#4957]: https://gitlab.freedesktop.org/drm/intel/issues/4957
Build changes
-------------
* Linux: CI_DRM_11207 -> Patchwork_22234
CI-20190529: 20190529
CI_DRM_11207: 0d650d738ee924dc0c367ff1f33c61237a635933 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6342: 1bd167a3af9e8f6168ac89c64c64b929694d9be7 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_22234: ebef7e80786343e2bdf985da2212692864327cfc @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
ebef7e807863 drm/i915: Make pre-skl sprite plane registers unlocked
2afcc45526b7 drm/i915: Make most pre-skl primary plane registers unlocked
a94acb7297ed drm/i915: Make cursor plane registers unlocked
70612125272d drm/i915: Make skl+ universal plane registers unlocked
e88416e136a5 drm/i915: Optimize icl+ universal plane programming
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/index.html
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^ permalink raw reply [flat|nested] 19+ messages in thread
* [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Futher optimize plane updates (rev3)
2022-02-10 6:23 [Intel-gfx] [PATCH v2 0/5] drm/i915: Futher optimize plane updates Ville Syrjala
` (5 preceding siblings ...)
2022-02-10 7:01 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Futher optimize plane updates (rev3) Patchwork
@ 2022-02-10 8:15 ` Patchwork
2022-02-10 12:08 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Futher optimize plane updates (rev4) Patchwork
` (3 subsequent siblings)
10 siblings, 0 replies; 19+ messages in thread
From: Patchwork @ 2022-02-10 8:15 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 30260 bytes --]
== Series Details ==
Series: drm/i915: Futher optimize plane updates (rev3)
URL : https://patchwork.freedesktop.org/series/99149/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11207_full -> Patchwork_22234_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_22234_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_22234_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (11 -> 12)
------------------------------
Additional (1): shard-rkl
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_22234_full:
### IGT changes ###
#### Possible regressions ####
* igt@gem_exec_balancer@parallel-ordering:
- shard-iclb: NOTRUN -> [DMESG-FAIL][1]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-iclb1/igt@gem_exec_balancer@parallel-ordering.html
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@syncobj_timeline@invalid-transfer-non-existent-point:
- {shard-rkl}: NOTRUN -> [DMESG-WARN][2]
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-rkl-1/igt@syncobj_timeline@invalid-transfer-non-existent-point.html
Known issues
------------
Here are the changes found in Patchwork_22234_full that come from known issues:
### CI changes ###
#### Issues hit ####
* boot:
- shard-glk: ([PASS][3], [PASS][4], [PASS][5], [PASS][6], [PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12], [PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18], [PASS][19], [PASS][20], [PASS][21], [PASS][22], [PASS][23], [PASS][24], [PASS][25], [PASS][26], [PASS][27]) -> ([PASS][28], [PASS][29], [PASS][30], [PASS][31], [PASS][32], [PASS][33], [PASS][34], [PASS][35], [PASS][36], [PASS][37], [PASS][38], [PASS][39], [PASS][40], [PASS][41], [PASS][42], [PASS][43], [PASS][44], [PASS][45], [FAIL][46], [PASS][47], [PASS][48], [PASS][49], [PASS][50], [PASS][51], [PASS][52]) ([i915#4392])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-glk1/boot.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-glk7/boot.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-glk6/boot.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-glk6/boot.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-glk6/boot.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-glk6/boot.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-glk5/boot.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-glk5/boot.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-glk5/boot.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-glk4/boot.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-glk4/boot.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-glk3/boot.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-glk3/boot.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-glk2/boot.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-glk2/boot.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-glk2/boot.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-glk1/boot.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-glk1/boot.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-glk9/boot.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-glk9/boot.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-glk9/boot.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-glk8/boot.html
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-glk8/boot.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-glk8/boot.html
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-glk7/boot.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-glk9/boot.html
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-glk9/boot.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-glk8/boot.html
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-glk8/boot.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-glk8/boot.html
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-glk8/boot.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-glk7/boot.html
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-glk7/boot.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-glk7/boot.html
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-glk6/boot.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-glk6/boot.html
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-glk6/boot.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-glk5/boot.html
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-glk5/boot.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-glk5/boot.html
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-glk4/boot.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-glk4/boot.html
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-glk3/boot.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-glk3/boot.html
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-glk3/boot.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-glk3/boot.html
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-glk2/boot.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-glk2/boot.html
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-glk1/boot.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-glk1/boot.html
### IGT changes ###
#### Issues hit ####
* igt@drm_read@invalid-buffer:
- shard-glk: [PASS][53] -> [DMESG-WARN][54] ([i915#118] / [i915#1888])
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-glk1/igt@drm_read@invalid-buffer.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-glk7/igt@drm_read@invalid-buffer.html
* igt@gem_ctx_isolation@preservation-s3@vcs1:
- shard-kbl: [PASS][55] -> [DMESG-WARN][56] ([i915#180]) +4 similar issues
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-kbl7/igt@gem_ctx_isolation@preservation-s3@vcs1.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-kbl6/igt@gem_ctx_isolation@preservation-s3@vcs1.html
* igt@gem_eio@hibernate:
- shard-skl: NOTRUN -> [SKIP][57] ([fdo#109271])
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-skl2/igt@gem_eio@hibernate.html
* igt@gem_eio@in-flight-suspend:
- shard-skl: [PASS][58] -> [INCOMPLETE][59] ([i915#4843])
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-skl10/igt@gem_eio@in-flight-suspend.html
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-skl4/igt@gem_eio@in-flight-suspend.html
* igt@gem_exec_balancer@parallel-contexts:
- shard-iclb: NOTRUN -> [DMESG-WARN][60] ([i915#5076])
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-iclb2/igt@gem_exec_balancer@parallel-contexts.html
* igt@gem_exec_capture@pi@rcs0:
- shard-skl: [PASS][61] -> [INCOMPLETE][62] ([i915#4547])
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-skl2/igt@gem_exec_capture@pi@rcs0.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-skl7/igt@gem_exec_capture@pi@rcs0.html
* igt@gem_exec_fair@basic-none@vecs0:
- shard-apl: [PASS][63] -> [FAIL][64] ([i915#2842])
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-apl7/igt@gem_exec_fair@basic-none@vecs0.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-apl4/igt@gem_exec_fair@basic-none@vecs0.html
* igt@gem_exec_fair@basic-pace@vecs0:
- shard-kbl: [PASS][65] -> [FAIL][66] ([i915#2842]) +1 similar issue
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-kbl7/igt@gem_exec_fair@basic-pace@vecs0.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-kbl3/igt@gem_exec_fair@basic-pace@vecs0.html
* igt@gem_exec_fair@basic-sync@rcs0:
- shard-tglb: [PASS][67] -> [SKIP][68] ([i915#2848])
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-tglb6/igt@gem_exec_fair@basic-sync@rcs0.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-tglb6/igt@gem_exec_fair@basic-sync@rcs0.html
* igt@gem_exec_whisper@basic-contexts:
- shard-glk: [PASS][69] -> [DMESG-WARN][70] ([i915#118])
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-glk7/igt@gem_exec_whisper@basic-contexts.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-glk1/igt@gem_exec_whisper@basic-contexts.html
* igt@gem_lmem_swapping@heavy-random:
- shard-kbl: NOTRUN -> [SKIP][71] ([fdo#109271] / [i915#4613])
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-kbl4/igt@gem_lmem_swapping@heavy-random.html
* igt@gem_lmem_swapping@heavy-verify-random:
- shard-apl: NOTRUN -> [SKIP][72] ([fdo#109271] / [i915#4613])
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-apl3/igt@gem_lmem_swapping@heavy-verify-random.html
* igt@gem_pread@exhaustion:
- shard-tglb: NOTRUN -> [WARN][73] ([i915#2658])
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-tglb1/igt@gem_pread@exhaustion.html
* igt@gem_pxp@verify-pxp-execution-after-suspend-resume:
- shard-iclb: NOTRUN -> [SKIP][74] ([i915#4270])
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-iclb1/igt@gem_pxp@verify-pxp-execution-after-suspend-resume.html
* igt@gem_render_copy@yf-tiled-to-vebox-y-tiled:
- shard-iclb: NOTRUN -> [SKIP][75] ([i915#768])
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-iclb2/igt@gem_render_copy@yf-tiled-to-vebox-y-tiled.html
* igt@gen3_render_linear_blits:
- shard-iclb: NOTRUN -> [SKIP][76] ([fdo#109289])
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-iclb2/igt@gen3_render_linear_blits.html
* igt@gen9_exec_parse@bb-start-out:
- shard-iclb: NOTRUN -> [SKIP][77] ([i915#2856])
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-iclb1/igt@gen9_exec_parse@bb-start-out.html
* igt@i915_pm_rpm@system-suspend:
- shard-skl: [PASS][78] -> [INCOMPLETE][79] ([i915#151])
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-skl3/igt@i915_pm_rpm@system-suspend.html
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-skl3/igt@i915_pm_rpm@system-suspend.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-async-flip:
- shard-tglb: NOTRUN -> [SKIP][80] ([fdo#111615])
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-tglb1/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip:
- shard-kbl: NOTRUN -> [SKIP][81] ([fdo#109271] / [i915#3777])
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-kbl4/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip.html
* igt@kms_ccs@pipe-a-crc-primary-basic-y_tiled_gen12_mc_ccs:
- shard-apl: NOTRUN -> [SKIP][82] ([fdo#109271] / [i915#3886])
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-apl3/igt@kms_ccs@pipe-a-crc-primary-basic-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-b-crc-primary-basic-y_tiled_gen12_rc_ccs_cc:
- shard-kbl: NOTRUN -> [SKIP][83] ([fdo#109271] / [i915#3886]) +1 similar issue
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-kbl4/igt@kms_ccs@pipe-b-crc-primary-basic-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_chamelium@dp-hpd-enable-disable-mode:
- shard-tglb: NOTRUN -> [SKIP][84] ([fdo#109284] / [fdo#111827]) +1 similar issue
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-tglb1/igt@kms_chamelium@dp-hpd-enable-disable-mode.html
* igt@kms_chamelium@vga-hpd-after-suspend:
- shard-kbl: NOTRUN -> [SKIP][85] ([fdo#109271] / [fdo#111827]) +6 similar issues
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-kbl7/igt@kms_chamelium@vga-hpd-after-suspend.html
* igt@kms_color@pipe-a-ctm-max:
- shard-skl: [PASS][86] -> [DMESG-WARN][87] ([i915#1982])
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-skl7/igt@kms_color@pipe-a-ctm-max.html
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-skl10/igt@kms_color@pipe-a-ctm-max.html
* igt@kms_color_chamelium@pipe-c-ctm-green-to-red:
- shard-iclb: NOTRUN -> [SKIP][88] ([fdo#109284] / [fdo#111827]) +1 similar issue
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-iclb1/igt@kms_color_chamelium@pipe-c-ctm-green-to-red.html
* igt@kms_color_chamelium@pipe-c-ctm-negative:
- shard-apl: NOTRUN -> [SKIP][89] ([fdo#109271] / [fdo#111827])
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-apl3/igt@kms_color_chamelium@pipe-c-ctm-negative.html
* igt@kms_cursor_crc@pipe-b-cursor-max-size-offscreen:
- shard-iclb: NOTRUN -> [SKIP][90] ([fdo#109278]) +6 similar issues
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-iclb2/igt@kms_cursor_crc@pipe-b-cursor-max-size-offscreen.html
* igt@kms_cursor_crc@pipe-b-cursor-suspend:
- shard-apl: [PASS][91] -> [DMESG-WARN][92] ([i915#180]) +3 similar issues
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-apl4/igt@kms_cursor_crc@pipe-b-cursor-suspend.html
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-apl2/igt@kms_cursor_crc@pipe-b-cursor-suspend.html
* igt@kms_cursor_crc@pipe-d-cursor-256x256-sliding:
- shard-kbl: NOTRUN -> [SKIP][93] ([fdo#109271]) +54 similar issues
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-kbl4/igt@kms_cursor_crc@pipe-d-cursor-256x256-sliding.html
* igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy:
- shard-glk: [PASS][94] -> [FAIL][95] ([i915#72])
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-glk5/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-glk4/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html
- shard-iclb: NOTRUN -> [SKIP][96] ([fdo#109274] / [fdo#109278])
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-iclb1/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html
* igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions:
- shard-tglb: NOTRUN -> [SKIP][97] ([fdo#109274] / [fdo#111825])
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-tglb1/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
- shard-iclb: [PASS][98] -> [FAIL][99] ([i915#2346]) +1 similar issue
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-iclb4/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-iclb7/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
* igt@kms_flip@2x-plain-flip-ts-check:
- shard-iclb: NOTRUN -> [SKIP][100] ([fdo#109274])
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-iclb2/igt@kms_flip@2x-plain-flip-ts-check.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling:
- shard-iclb: [PASS][101] -> [SKIP][102] ([i915#3701])
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-iclb6/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling.html
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-iclb2/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-plflip-blt:
- shard-iclb: NOTRUN -> [SKIP][103] ([fdo#109280]) +3 similar issues
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-iclb1/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@fbc-suspend:
- shard-kbl: [PASS][104] -> [INCOMPLETE][105] ([i915#2828] / [i915#3614])
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-kbl4/igt@kms_frontbuffer_tracking@fbc-suspend.html
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-kbl6/igt@kms_frontbuffer_tracking@fbc-suspend.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-fullscreen:
- shard-apl: NOTRUN -> [SKIP][106] ([fdo#109271]) +25 similar issues
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-apl3/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-fullscreen.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-blt:
- shard-tglb: NOTRUN -> [SKIP][107] ([fdo#109280] / [fdo#111825]) +2 similar issues
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-tglb1/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-draw-blt.html
* igt@kms_hdr@bpc-switch-dpms:
- shard-skl: [PASS][108] -> [FAIL][109] ([i915#1188])
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-skl3/igt@kms_hdr@bpc-switch-dpms.html
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-skl3/igt@kms_hdr@bpc-switch-dpms.html
* igt@kms_hdr@static-toggle-suspend:
- shard-tglb: NOTRUN -> [SKIP][110] ([i915#1187])
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-tglb1/igt@kms_hdr@static-toggle-suspend.html
* igt@kms_pipe_crc_basic@disable-crc-after-crtc-pipe-d:
- shard-kbl: NOTRUN -> [SKIP][111] ([fdo#109271] / [i915#533])
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-kbl4/igt@kms_pipe_crc_basic@disable-crc-after-crtc-pipe-d.html
* igt@kms_plane_alpha_blend@pipe-b-alpha-7efc:
- shard-kbl: NOTRUN -> [FAIL][112] ([fdo#108145] / [i915#265])
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-kbl7/igt@kms_plane_alpha_blend@pipe-b-alpha-7efc.html
* igt@kms_psr2_sf@overlay-plane-update-continuous-sf:
- shard-kbl: NOTRUN -> [SKIP][113] ([fdo#109271] / [i915#658])
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-kbl4/igt@kms_psr2_sf@overlay-plane-update-continuous-sf.html
* igt@kms_psr@psr2_cursor_blt:
- shard-iclb: [PASS][114] -> [SKIP][115] ([fdo#109441]) +2 similar issues
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-iclb2/igt@kms_psr@psr2_cursor_blt.html
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-iclb8/igt@kms_psr@psr2_cursor_blt.html
* igt@kms_vblank@pipe-a-ts-continuation-suspend:
- shard-kbl: [PASS][116] -> [DMESG-WARN][117] ([i915#180] / [i915#295])
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-kbl3/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-kbl6/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
- shard-apl: [PASS][118] -> [DMESG-WARN][119] ([i915#180] / [i915#295])
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-apl1/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-apl6/igt@kms_vblank@pipe-a-ts-continuation-suspend.html
* igt@kms_vrr@flip-dpms:
- shard-iclb: NOTRUN -> [SKIP][120] ([fdo#109502])
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-iclb2/igt@kms_vrr@flip-dpms.html
* igt@nouveau_crc@pipe-a-source-outp-inactive:
- shard-tglb: NOTRUN -> [SKIP][121] ([i915#2530]) +1 similar issue
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-tglb1/igt@nouveau_crc@pipe-a-source-outp-inactive.html
* igt@perf@gen8-unprivileged-single-ctx-counters:
- shard-tglb: NOTRUN -> [SKIP][122] ([fdo#109289])
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-tglb1/igt@perf@gen8-unprivileged-single-ctx-counters.html
* igt@prime_nv_api@i915_nv_import_twice:
- shard-tglb: NOTRUN -> [SKIP][123] ([fdo#109291])
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-tglb7/igt@prime_nv_api@i915_nv_import_twice.html
* igt@prime_nv_test@i915_import_cpu_mmap:
- shard-iclb: NOTRUN -> [SKIP][124] ([fdo#109291])
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-iclb2/igt@prime_nv_test@i915_import_cpu_mmap.html
#### Possible fixes ####
* igt@gem_exec_capture@pi@vcs0:
- shard-iclb: [INCOMPLETE][125] ([i915#3371]) -> [PASS][126]
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-iclb1/igt@gem_exec_capture@pi@vcs0.html
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-iclb2/igt@gem_exec_capture@pi@vcs0.html
* igt@gem_exec_fair@basic-none@vcs0:
- shard-kbl: [FAIL][127] ([i915#2842]) -> [PASS][128]
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-kbl7/igt@gem_exec_fair@basic-none@vcs0.html
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-kbl3/igt@gem_exec_fair@basic-none@vcs0.html
* igt@gem_exec_parallel@contexts@rcs0:
- shard-iclb: [INCOMPLETE][129] ([i915#1895]) -> [PASS][130]
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-iclb8/igt@gem_exec_parallel@contexts@rcs0.html
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-iclb1/igt@gem_exec_parallel@contexts@rcs0.html
* igt@gem_ppgtt@flink-and-close-vma-leak:
- shard-apl: [FAIL][131] ([i915#644]) -> [PASS][132]
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-apl1/igt@gem_ppgtt@flink-and-close-vma-leak.html
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-apl1/igt@gem_ppgtt@flink-and-close-vma-leak.html
* igt@gem_workarounds@suspend-resume-context:
- shard-apl: [DMESG-WARN][133] ([i915#180]) -> [PASS][134]
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-apl6/igt@gem_workarounds@suspend-resume-context.html
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-apl3/igt@gem_workarounds@suspend-resume-context.html
* igt@i915_suspend@forcewake:
- shard-kbl: [DMESG-WARN][135] ([i915#180]) -> [PASS][136] +2 similar issues
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-kbl6/igt@i915_suspend@forcewake.html
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-kbl4/igt@i915_suspend@forcewake.html
* igt@kms_flip@flip-vs-suspend@c-dp1:
- shard-kbl: [INCOMPLETE][137] ([i915#636]) -> [PASS][138]
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-kbl3/igt@kms_flip@flip-vs-suspend@c-dp1.html
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-kbl1/igt@kms_flip@flip-vs-suspend@c-dp1.html
* igt@kms_frontbuffer_tracking@psr-rgb101010-draw-pwrite:
- shard-skl: [DMESG-WARN][139] ([i915#1982]) -> [PASS][140]
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-skl9/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-pwrite.html
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-skl1/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-pwrite.html
* igt@kms_hdr@bpc-switch-suspend:
- shard-skl: [FAIL][141] ([i915#1188]) -> [PASS][142]
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-skl4/igt@kms_hdr@bpc-switch-suspend.html
[142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-skl6/igt@kms_hdr@bpc-switch-suspend.html
* igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
- shard-skl: [FAIL][143] ([fdo#108145] / [i915#265]) -> [PASS][144]
[143]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-skl8/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
[144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-skl9/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
* igt@kms_plane_scaling@plane-scaling@pipe-a-plane-scaling:
- shard-glk: [DMESG-WARN][145] ([i915#118] / [i915#1888]) -> [PASS][146]
[145]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-glk1/igt@kms_plane_scaling@plane-scaling@pipe-a-plane-scaling.html
[146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-glk7/igt@kms_plane_scaling@plane-scaling@pipe-a-plane-scaling.html
* igt@kms_psr@psr2_primary_page_flip:
- shard-iclb: [SKIP][147] ([fdo#109441]) -> [PASS][148] +2 similar issues
[147]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-iclb6/igt@kms_psr@psr2_primary_page_flip.html
[148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-iclb2/igt@kms_psr@psr2_primary_page_flip.html
#### Warnings ####
* igt@gem_exec_fair@basic-throttle@rcs0:
- shard-tglb: [FAIL][149] ([i915#2849]) -> [FAIL][150] ([i915#2842])
[149]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-tglb3/igt@gem_exec_fair@basic-throttle@rcs0.html
[150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-tglb8/igt@gem_exec_fair@basic-throttle@rcs0.html
* igt@kms_psr2_sf@primary-plane-update-sf-dmg-area:
- shard-iclb: [SKIP][151] ([fdo#111068] / [i915#658]) -> [SKIP][152] ([i915#2920])
[151]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-iclb5/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area.html
[152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-iclb2/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area.html
* igt@runner@aborted:
- shard-kbl: ([FAIL][153], [FAIL][154], [FAIL][155], [FAIL][156], [FAIL][157], [FAIL][158], [FAIL][159], [FAIL][160], [FAIL][161], [FAIL][162], [FAIL][163]) ([i915#180] / [i915#1814] / [i915#3002] / [i915#4312] / [i915#602]) -> ([FAIL][164], [FAIL][165], [FAIL][166], [FAIL][167], [FAIL][168], [FAIL][169], [FAIL][170], [FAIL][171], [FAIL][172], [FAIL][173], [FAIL][174], [FAIL][175]) ([i915#1436] / [i915#180] / [i915#1814] / [i915#3002] / [i915#4312] / [i915#602])
[153]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-kbl1/igt@runner@aborted.html
[154]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-kbl6/igt@runner@aborted.html
[155]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-kbl6/igt@runner@aborted.html
[156]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-kbl4/igt@runner@aborted.html
[157]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-kbl6/igt@runner@aborted.html
[158]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-kbl4/igt@runner@aborted.html
[159]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-kbl3/igt@runner@aborted.html
[160]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-kbl6/igt@runner@aborted.html
[161]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-kbl6/igt@runner@aborted.html
[162]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-kbl3/igt@runner@aborted.html
[163]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11207/shard-kbl1/igt@runner@aborted.html
[164]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-kbl6/igt@runner@aborted.html
[165]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-kbl6/igt@runner@aborted.html
[166]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-kbl7/igt@runner@aborted.html
[167]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-kbl3/igt@runner@aborted.html
[168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-kbl7/igt@runner@aborted.html
[169]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-kbl4/igt@runner@aborted.html
[170]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-kbl4/igt@runner@aborted.html
[171]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-kbl6/igt@runner@aborted.html
[172]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-kbl6/igt@runner@aborted.html
[173]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-kbl3/igt@runner@aborted.html
[174]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-kbl1/igt@runner@aborted.html
[175]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/shard-kbl3/igt@runner@aborted.html
{name}: This element is suppressed. This means it is ignored when computing
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22234/index.html
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^ permalink raw reply [flat|nested] 19+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Futher optimize plane updates (rev4)
2022-02-10 6:23 [Intel-gfx] [PATCH v2 0/5] drm/i915: Futher optimize plane updates Ville Syrjala
` (6 preceding siblings ...)
2022-02-10 8:15 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
@ 2022-02-10 12:08 ` Patchwork
2022-02-10 14:33 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
` (2 subsequent siblings)
10 siblings, 0 replies; 19+ messages in thread
From: Patchwork @ 2022-02-10 12:08 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 4484 bytes --]
== Series Details ==
Series: drm/i915: Futher optimize plane updates (rev4)
URL : https://patchwork.freedesktop.org/series/99149/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11211 -> Patchwork_22237
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/index.html
Participating hosts (47 -> 43)
------------------------------
Missing (4): fi-bsw-cyan fi-pnv-d510 shard-tglu bat-dg1-5
Known issues
------------
Here are the changes found in Patchwork_22237 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@amdgpu/amd_cs_nop@sync-fork-compute0:
- fi-snb-2600: NOTRUN -> [SKIP][1] ([fdo#109271]) +17 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/fi-snb-2600/igt@amdgpu/amd_cs_nop@sync-fork-compute0.html
* igt@gem_exec_suspend@basic-s3@smem:
- fi-skl-6600u: [PASS][2] -> [INCOMPLETE][3] ([i915#4547])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11211/fi-skl-6600u/igt@gem_exec_suspend@basic-s3@smem.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/fi-skl-6600u/igt@gem_exec_suspend@basic-s3@smem.html
- fi-bdw-5557u: [PASS][4] -> [INCOMPLETE][5] ([i915#146])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11211/fi-bdw-5557u/igt@gem_exec_suspend@basic-s3@smem.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/fi-bdw-5557u/igt@gem_exec_suspend@basic-s3@smem.html
* igt@i915_selftest@live@hangcheck:
- fi-hsw-4770: [PASS][6] -> [INCOMPLETE][7] ([i915#3303])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11211/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html
* igt@runner@aborted:
- fi-hsw-4770: NOTRUN -> [FAIL][8] ([fdo#109271] / [i915#1436] / [i915#4312])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/fi-hsw-4770/igt@runner@aborted.html
#### Possible fixes ####
* igt@i915_selftest@live@hangcheck:
- fi-snb-2600: [INCOMPLETE][9] ([i915#3921]) -> [PASS][10]
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11211/fi-snb-2600/igt@i915_selftest@live@hangcheck.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/fi-snb-2600/igt@i915_selftest@live@hangcheck.html
* igt@kms_frontbuffer_tracking@basic:
- fi-cml-u2: [DMESG-WARN][11] ([i915#4269]) -> [PASS][12]
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11211/fi-cml-u2/igt@kms_frontbuffer_tracking@basic.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/fi-cml-u2/igt@kms_frontbuffer_tracking@basic.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
[i915#146]: https://gitlab.freedesktop.org/drm/intel/issues/146
[i915#3303]: https://gitlab.freedesktop.org/drm/intel/issues/3303
[i915#3921]: https://gitlab.freedesktop.org/drm/intel/issues/3921
[i915#4269]: https://gitlab.freedesktop.org/drm/intel/issues/4269
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#4547]: https://gitlab.freedesktop.org/drm/intel/issues/4547
[i915#4897]: https://gitlab.freedesktop.org/drm/intel/issues/4897
Build changes
-------------
* Linux: CI_DRM_11211 -> Patchwork_22237
CI-20190529: 20190529
CI_DRM_11211: 6b5e0f742803676e8494c3c271cc7d2cf31d6413 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6342: 1bd167a3af9e8f6168ac89c64c64b929694d9be7 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_22237: c889ad1dd83b85c8969047e60f5a6645584b505c @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
c889ad1dd83b drm/i915: Make pre-skl sprite plane registers unlocked
8cd109922365 drm/i915: Make most pre-skl primary plane registers unlocked
f47e2e98562b drm/i915: Make cursor plane registers unlocked
928940a98d5a drm/i915: Make skl+ universal plane registers unlocked
ee284be638cf drm/i915: Optimize icl+ universal plane programming
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/index.html
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^ permalink raw reply [flat|nested] 19+ messages in thread
* [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Futher optimize plane updates (rev4)
2022-02-10 6:23 [Intel-gfx] [PATCH v2 0/5] drm/i915: Futher optimize plane updates Ville Syrjala
` (7 preceding siblings ...)
2022-02-10 12:08 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Futher optimize plane updates (rev4) Patchwork
@ 2022-02-10 14:33 ` Patchwork
2022-02-11 18:29 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Futher optimize plane updates (rev5) Patchwork
2022-02-11 22:26 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
10 siblings, 0 replies; 19+ messages in thread
From: Patchwork @ 2022-02-10 14:33 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx
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== Series Details ==
Series: drm/i915: Futher optimize plane updates (rev4)
URL : https://patchwork.freedesktop.org/series/99149/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11211_full -> Patchwork_22237_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_22237_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_22237_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (13 -> 13)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_22237_full:
### IGT changes ###
#### Possible regressions ####
* igt@kms_async_flips@async-flip-with-page-flip-events:
- shard-kbl: [PASS][1] -> [INCOMPLETE][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11211/shard-kbl3/igt@kms_async_flips@async-flip-with-page-flip-events.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-kbl6/igt@kms_async_flips@async-flip-with-page-flip-events.html
* igt@kms_plane_multiple@atomic-pipe-b-tiling-x:
- shard-tglb: [PASS][3] -> [INCOMPLETE][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11211/shard-tglb2/igt@kms_plane_multiple@atomic-pipe-b-tiling-x.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-tglb8/igt@kms_plane_multiple@atomic-pipe-b-tiling-x.html
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@gem_exec_flush@basic-wb-rw-before-default:
- {shard-rkl}: NOTRUN -> ([PASS][5], [INCOMPLETE][6])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-rkl-4/igt@gem_exec_flush@basic-wb-rw-before-default.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-rkl-5/igt@gem_exec_flush@basic-wb-rw-before-default.html
* igt@gem_mmap_offset@open-flood:
- {shard-rkl}: [PASS][7] -> [INCOMPLETE][8]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11211/shard-rkl-6/igt@gem_mmap_offset@open-flood.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-rkl-5/igt@gem_mmap_offset@open-flood.html
* igt@syncobj_timeline@transfer-timeline-point:
- {shard-rkl}: NOTRUN -> [DMESG-WARN][9]
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-rkl-1/igt@syncobj_timeline@transfer-timeline-point.html
Known issues
------------
Here are the changes found in Patchwork_22237_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@drm_read@invalid-buffer:
- shard-glk: [PASS][10] -> [DMESG-WARN][11] ([i915#118] / [i915#1888])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11211/shard-glk3/igt@drm_read@invalid-buffer.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-glk2/igt@drm_read@invalid-buffer.html
* igt@feature_discovery@psr2:
- shard-iclb: NOTRUN -> [SKIP][12] ([i915#658]) +1 similar issue
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-iclb6/igt@feature_discovery@psr2.html
* igt@gem_ctx_isolation@preservation-s3@bcs0:
- shard-kbl: [PASS][13] -> [DMESG-WARN][14] ([i915#180]) +2 similar issues
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11211/shard-kbl3/igt@gem_ctx_isolation@preservation-s3@bcs0.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-kbl7/igt@gem_ctx_isolation@preservation-s3@bcs0.html
* igt@gem_exec_balancer@parallel-contexts:
- shard-iclb: NOTRUN -> [SKIP][15] ([i915#4525])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-iclb6/igt@gem_exec_balancer@parallel-contexts.html
* igt@gem_exec_capture@pi@rcs0:
- shard-skl: [PASS][16] -> [INCOMPLETE][17] ([i915#4547])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11211/shard-skl2/igt@gem_exec_capture@pi@rcs0.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-skl4/igt@gem_exec_capture@pi@rcs0.html
* igt@gem_exec_capture@pi@vecs0:
- shard-tglb: [PASS][18] -> [INCOMPLETE][19] ([i915#3371])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11211/shard-tglb6/igt@gem_exec_capture@pi@vecs0.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-tglb6/igt@gem_exec_capture@pi@vecs0.html
* igt@gem_exec_endless@dispatch@vcs0:
- shard-tglb: [PASS][20] -> [INCOMPLETE][21] ([i915#3778])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11211/shard-tglb3/igt@gem_exec_endless@dispatch@vcs0.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-tglb3/igt@gem_exec_endless@dispatch@vcs0.html
* igt@gem_exec_fair@basic-pace-solo@rcs0:
- shard-iclb: NOTRUN -> [FAIL][22] ([i915#2842]) +1 similar issue
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-iclb8/igt@gem_exec_fair@basic-pace-solo@rcs0.html
* igt@gem_exec_fair@basic-pace@vecs0:
- shard-kbl: [PASS][23] -> [FAIL][24] ([i915#2842]) +2 similar issues
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11211/shard-kbl1/igt@gem_exec_fair@basic-pace@vecs0.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-kbl3/igt@gem_exec_fair@basic-pace@vecs0.html
* igt@gem_exec_schedule@submit-early-slice@vcs0:
- shard-skl: NOTRUN -> [INCOMPLETE][25] ([i915#3797])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-skl1/igt@gem_exec_schedule@submit-early-slice@vcs0.html
* igt@gem_lmem_swapping@heavy-verify-random:
- shard-skl: NOTRUN -> [SKIP][26] ([fdo#109271] / [i915#4613]) +1 similar issue
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-skl1/igt@gem_lmem_swapping@heavy-verify-random.html
* igt@gem_lmem_swapping@parallel-random-engines:
- shard-kbl: NOTRUN -> [SKIP][27] ([fdo#109271] / [i915#4613])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-kbl1/igt@gem_lmem_swapping@parallel-random-engines.html
* igt@gem_lmem_swapping@random:
- shard-iclb: NOTRUN -> [SKIP][28] ([i915#4613])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-iclb5/igt@gem_lmem_swapping@random.html
* igt@gem_pread@exhaustion:
- shard-tglb: NOTRUN -> [WARN][29] ([i915#2658])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-tglb2/igt@gem_pread@exhaustion.html
* igt@gem_pxp@dmabuf-shared-protected-dst-is-context-refcounted:
- shard-iclb: NOTRUN -> [SKIP][30] ([i915#4270]) +1 similar issue
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-iclb8/igt@gem_pxp@dmabuf-shared-protected-dst-is-context-refcounted.html
* igt@gem_render_copy@yf-tiled-to-vebox-y-tiled:
- shard-iclb: NOTRUN -> [SKIP][31] ([i915#768])
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-iclb6/igt@gem_render_copy@yf-tiled-to-vebox-y-tiled.html
* igt@gen7_exec_parse@oacontrol-tracking:
- shard-iclb: NOTRUN -> [SKIP][32] ([fdo#109289]) +1 similar issue
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-iclb5/igt@gen7_exec_parse@oacontrol-tracking.html
* igt@gen9_exec_parse@allowed-all:
- shard-skl: [PASS][33] -> [DMESG-WARN][34] ([i915#1436] / [i915#716]) +1 similar issue
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11211/shard-skl1/igt@gen9_exec_parse@allowed-all.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-skl7/igt@gen9_exec_parse@allowed-all.html
* igt@gen9_exec_parse@cmd-crossing-page:
- shard-iclb: NOTRUN -> [SKIP][35] ([i915#2856])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-iclb8/igt@gen9_exec_parse@cmd-crossing-page.html
* igt@i915_pm_dc@dc6-dpms:
- shard-skl: NOTRUN -> [FAIL][36] ([i915#454])
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-skl3/igt@i915_pm_dc@dc6-dpms.html
* igt@i915_pm_lpsp@screens-disabled:
- shard-iclb: NOTRUN -> [SKIP][37] ([i915#1902])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-iclb8/igt@i915_pm_lpsp@screens-disabled.html
* igt@i915_suspend@debugfs-reader:
- shard-kbl: [PASS][38] -> [INCOMPLETE][39] ([i915#3614])
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11211/shard-kbl6/igt@i915_suspend@debugfs-reader.html
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-kbl4/igt@i915_suspend@debugfs-reader.html
* igt@kms_async_flips@crc:
- shard-skl: NOTRUN -> [FAIL][40] ([i915#4272])
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-skl1/igt@kms_async_flips@crc.html
* igt@kms_big_fb@linear-64bpp-rotate-270:
- shard-iclb: NOTRUN -> [SKIP][41] ([fdo#110725] / [fdo#111614]) +1 similar issue
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-iclb5/igt@kms_big_fb@linear-64bpp-rotate-270.html
* igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-hflip:
- shard-kbl: NOTRUN -> [SKIP][42] ([fdo#109271] / [i915#3777])
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-kbl1/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-hflip.html
* igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-async-flip:
- shard-skl: NOTRUN -> [FAIL][43] ([i915#3743])
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-skl1/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-async-flip:
- shard-tglb: NOTRUN -> [SKIP][44] ([fdo#111615])
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-tglb2/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip:
- shard-skl: NOTRUN -> [SKIP][45] ([fdo#109271] / [i915#3777])
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-skl1/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-async-flip:
- shard-iclb: NOTRUN -> [SKIP][46] ([fdo#110723]) +2 similar issues
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-iclb6/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html
* igt@kms_ccs@pipe-b-bad-aux-stride-y_tiled_gen12_rc_ccs_cc:
- shard-kbl: NOTRUN -> [SKIP][47] ([fdo#109271] / [i915#3886]) +2 similar issues
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-kbl1/igt@kms_ccs@pipe-b-bad-aux-stride-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-b-bad-rotation-90-y_tiled_gen12_mc_ccs:
- shard-iclb: NOTRUN -> [SKIP][48] ([fdo#109278] / [i915#3886]) +1 similar issue
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-iclb8/igt@kms_ccs@pipe-b-bad-rotation-90-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-c-missing-ccs-buffer-y_tiled_gen12_mc_ccs:
- shard-skl: NOTRUN -> [SKIP][49] ([fdo#109271] / [i915#3886]) +5 similar issues
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-skl3/igt@kms_ccs@pipe-c-missing-ccs-buffer-y_tiled_gen12_mc_ccs.html
* igt@kms_chamelium@dp-hpd-enable-disable-mode:
- shard-tglb: NOTRUN -> [SKIP][50] ([fdo#109284] / [fdo#111827]) +1 similar issue
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-tglb2/igt@kms_chamelium@dp-hpd-enable-disable-mode.html
* igt@kms_chamelium@vga-frame-dump:
- shard-skl: NOTRUN -> [SKIP][51] ([fdo#109271] / [fdo#111827]) +8 similar issues
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-skl9/igt@kms_chamelium@vga-frame-dump.html
* igt@kms_color@pipe-d-ctm-0-5:
- shard-iclb: NOTRUN -> [SKIP][52] ([fdo#109278] / [i915#1149]) +1 similar issue
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-iclb8/igt@kms_color@pipe-d-ctm-0-5.html
* igt@kms_color_chamelium@pipe-a-ctm-limited-range:
- shard-iclb: NOTRUN -> [SKIP][53] ([fdo#109284] / [fdo#111827]) +2 similar issues
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-iclb6/igt@kms_color_chamelium@pipe-a-ctm-limited-range.html
* igt@kms_color_chamelium@pipe-a-degamma:
- shard-kbl: NOTRUN -> [SKIP][54] ([fdo#109271] / [fdo#111827]) +8 similar issues
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-kbl4/igt@kms_color_chamelium@pipe-a-degamma.html
* igt@kms_content_protection@uevent:
- shard-kbl: NOTRUN -> [FAIL][55] ([i915#2105])
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-kbl1/igt@kms_content_protection@uevent.html
* igt@kms_cursor_crc@pipe-c-cursor-512x512-offscreen:
- shard-iclb: NOTRUN -> [SKIP][56] ([fdo#109278] / [fdo#109279])
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-iclb8/igt@kms_cursor_crc@pipe-c-cursor-512x512-offscreen.html
* igt@kms_cursor_crc@pipe-d-cursor-64x21-sliding:
- shard-iclb: NOTRUN -> [SKIP][57] ([fdo#109278]) +18 similar issues
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-iclb8/igt@kms_cursor_crc@pipe-d-cursor-64x21-sliding.html
* igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions:
- shard-tglb: NOTRUN -> [SKIP][58] ([fdo#109274] / [fdo#111825])
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-tglb2/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions.html
* igt@kms_cursor_legacy@cursora-vs-flipb-varying-size:
- shard-iclb: NOTRUN -> [SKIP][59] ([fdo#109274] / [fdo#109278])
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-iclb8/igt@kms_cursor_legacy@cursora-vs-flipb-varying-size.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
- shard-skl: [PASS][60] -> [FAIL][61] ([i915#2346])
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11211/shard-skl1/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-skl6/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
* igt@kms_cursor_legacy@flip-vs-cursor-toggle:
- shard-iclb: [PASS][62] -> [FAIL][63] ([i915#2346])
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11211/shard-iclb2/igt@kms_cursor_legacy@flip-vs-cursor-toggle.html
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-iclb7/igt@kms_cursor_legacy@flip-vs-cursor-toggle.html
* igt@kms_dp_tiled_display@basic-test-pattern-with-chamelium:
- shard-iclb: NOTRUN -> [SKIP][64] ([i915#3528])
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-iclb5/igt@kms_dp_tiled_display@basic-test-pattern-with-chamelium.html
* igt@kms_flip@2x-plain-flip-ts-check:
- shard-iclb: NOTRUN -> [SKIP][65] ([fdo#109274])
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-iclb6/igt@kms_flip@2x-plain-flip-ts-check.html
* igt@kms_flip@flip-vs-suspend-interruptible@a-dp1:
- shard-apl: [PASS][66] -> [DMESG-WARN][67] ([i915#180]) +4 similar issues
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11211/shard-apl8/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-apl1/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html
* igt@kms_flip@flip-vs-suspend@c-dp1:
- shard-kbl: [PASS][68] -> [INCOMPLETE][69] ([i915#636])
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11211/shard-kbl1/igt@kms_flip@flip-vs-suspend@c-dp1.html
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-kbl3/igt@kms_flip@flip-vs-suspend@c-dp1.html
* igt@kms_flip@wf_vblank-ts-check-interruptible@a-edp1:
- shard-skl: [PASS][70] -> [FAIL][71] ([i915#2122])
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11211/shard-skl9/igt@kms_flip@wf_vblank-ts-check-interruptible@a-edp1.html
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-skl4/igt@kms_flip@wf_vblank-ts-check-interruptible@a-edp1.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling:
- shard-skl: NOTRUN -> [INCOMPLETE][72] ([i915#3701])
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-skl2/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling:
- shard-glk: [PASS][73] -> [FAIL][74] ([i915#4911])
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11211/shard-glk5/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling.html
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-glk8/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling:
- shard-iclb: [PASS][75] -> [SKIP][76] ([i915#3701])
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11211/shard-iclb5/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling.html
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-iclb2/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling.html
* igt@kms_frontbuffer_tracking@fbc-1p-shrfb-fliptrack-mmap-gtt:
- shard-skl: NOTRUN -> [SKIP][77] ([fdo#109271]) +117 similar issues
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-skl3/igt@kms_frontbuffer_tracking@fbc-1p-shrfb-fliptrack-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-plflip-blt:
- shard-tglb: NOTRUN -> [SKIP][78] ([fdo#109280] / [fdo#111825]) +1 similar issue
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-tglb2/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-mmap-wc:
- shard-iclb: NOTRUN -> [SKIP][79] ([fdo#109280]) +12 similar issues
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-iclb6/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-wc:
- shard-kbl: NOTRUN -> [SKIP][80] ([fdo#109271]) +114 similar issues
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-kbl1/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-wc.html
* igt@kms_hdr@static-toggle-dpms:
- shard-iclb: NOTRUN -> [SKIP][81] ([i915#1187])
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-iclb6/igt@kms_hdr@static-toggle-dpms.html
* igt@kms_hdr@static-toggle-suspend:
- shard-tglb: NOTRUN -> [SKIP][82] ([i915#1187])
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-tglb2/igt@kms_hdr@static-toggle-suspend.html
* igt@kms_pipe_crc_basic@hang-read-crc-pipe-d:
- shard-skl: NOTRUN -> [SKIP][83] ([fdo#109271] / [i915#533])
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-skl3/igt@kms_pipe_crc_basic@hang-read-crc-pipe-d.html
* igt@kms_plane_alpha_blend@pipe-b-alpha-7efc:
- shard-kbl: NOTRUN -> [FAIL][84] ([fdo#108145] / [i915#265]) +3 similar issues
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-kbl4/igt@kms_plane_alpha_blend@pipe-b-alpha-7efc.html
* igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
- shard-skl: [PASS][85] -> [FAIL][86] ([fdo#108145] / [i915#265]) +1 similar issue
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11211/shard-skl9/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-skl9/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
* igt@kms_psr2_sf@cursor-plane-update-sf:
- shard-iclb: NOTRUN -> [SKIP][87] ([fdo#111068] / [i915#658])
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-iclb8/igt@kms_psr2_sf@cursor-plane-update-sf.html
* igt@kms_psr@psr2_dpms:
- shard-iclb: NOTRUN -> [SKIP][88] ([fdo#109441])
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-iclb6/igt@kms_psr@psr2_dpms.html
* igt@kms_psr@psr2_sprite_mmap_cpu:
- shard-iclb: [PASS][89] -> [SKIP][90] ([fdo#109441])
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11211/shard-iclb2/igt@kms_psr@psr2_sprite_mmap_cpu.html
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-iclb3/igt@kms_psr@psr2_sprite_mmap_cpu.html
* igt@kms_setmode@basic:
- shard-apl: [PASS][91] -> [FAIL][92] ([i915#31])
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11211/shard-apl4/igt@kms_setmode@basic.html
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-apl2/igt@kms_setmode@basic.html
* igt@kms_vrr@flip-dpms:
- shard-iclb: NOTRUN -> [SKIP][93] ([fdo#109502])
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-iclb6/igt@kms_vrr@flip-dpms.html
* igt@kms_writeback@writeback-invalid-parameters:
- shard-kbl: NOTRUN -> [SKIP][94] ([fdo#109271] / [i915#2437])
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-kbl1/igt@kms_writeback@writeback-invalid-parameters.html
* igt@nouveau_crc@pipe-a-source-outp-inactive:
- shard-tglb: NOTRUN -> [SKIP][95] ([i915#2530])
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-tglb2/igt@nouveau_crc@pipe-a-source-outp-inactive.html
* igt@nouveau_crc@pipe-b-ctx-flip-detection:
- shard-iclb: NOTRUN -> [SKIP][96] ([i915#2530])
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-iclb8/igt@nouveau_crc@pipe-b-ctx-flip-detection.html
* igt@perf@gen8-unprivileged-single-ctx-counters:
- shard-tglb: NOTRUN -> [SKIP][97] ([fdo#109289])
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-tglb2/igt@perf@gen8-unprivileged-single-ctx-counters.html
* igt@prime_nv_test@i915_nv_sharing:
- shard-iclb: NOTRUN -> [SKIP][98] ([fdo#109291]) +3 similar issues
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-iclb5/igt@prime_nv_test@i915_nv_sharing.html
* igt@sysfs_clients@fair-7:
- shard-iclb: NOTRUN -> [SKIP][99] ([i915#2994])
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-iclb8/igt@sysfs_clients@fair-7.html
* igt@sysfs_clients@recycle:
- shard-skl: NOTRUN -> [SKIP][100] ([fdo#109271] / [i915#2994]) +1 similar issue
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-skl3/igt@sysfs_clients@recycle.html
* igt@sysfs_clients@sema-50:
- shard-kbl: NOTRUN -> [SKIP][101] ([fdo#109271] / [i915#2994]) +1 similar issue
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-kbl4/igt@sysfs_clients@sema-50.html
#### Possible fixes ####
* igt@api_intel_bb@reset-bb:
- {shard-rkl}: [INCOMPLETE][102] ([i915#2295]) -> [PASS][103] +1 similar issue
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11211/shard-rkl-5/igt@api_intel_bb@reset-bb.html
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-rkl-4/igt@api_intel_bb@reset-bb.html
* igt@drm_read@short-buffer-nonblock:
- shard-skl: [DMESG-WARN][104] ([i915#1982]) -> [PASS][105]
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11211/shard-skl8/igt@drm_read@short-buffer-nonblock.html
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-skl4/igt@drm_read@short-buffer-nonblock.html
* igt@fbdev@unaligned-read:
- {shard-rkl}: [SKIP][106] ([i915#2582]) -> [PASS][107]
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11211/shard-rkl-5/igt@fbdev@unaligned-read.html
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-rkl-6/igt@fbdev@unaligned-read.html
* igt@gem_ctx_isolation@preservation-s3@rcs0:
- shard-apl: [DMESG-WARN][108] ([i915#180]) -> [PASS][109]
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11211/shard-apl6/igt@gem_ctx_isolation@preservation-s3@rcs0.html
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-apl6/igt@gem_ctx_isolation@preservation-s3@rcs0.html
* igt@gem_exec_fair@basic-none-share@rcs0:
- shard-iclb: [FAIL][110] ([i915#2842]) -> [PASS][111]
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11211/shard-iclb6/igt@gem_exec_fair@basic-none-share@rcs0.html
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-iclb7/igt@gem_exec_fair@basic-none-share@rcs0.html
* igt@gem_exec_whisper@basic-fds-priority:
- {shard-rkl}: [INCOMPLETE][112] -> [PASS][113]
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11211/shard-rkl-5/igt@gem_exec_whisper@basic-fds-priority.html
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-rkl-6/igt@gem_exec_whisper@basic-fds-priority.html
* igt@gem_exec_whisper@basic-queues-forked-all:
- shard-glk: [DMESG-WARN][114] ([i915#118]) -> [PASS][115] +2 similar issues
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11211/shard-glk5/igt@gem_exec_whisper@basic-queues-forked-all.html
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-glk8/igt@gem_exec_whisper@basic-queues-forked-all.html
* igt@gem_huc_copy@huc-copy:
- shard-tglb: [SKIP][116] ([i915#2190]) -> [PASS][117]
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11211/shard-tglb6/igt@gem_huc_copy@huc-copy.html
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-tglb3/igt@gem_huc_copy@huc-copy.html
* igt@gem_ppgtt@flink-and-close-vma-leak:
- shard-glk: [FAIL][118] ([i915#644]) -> [PASS][119]
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11211/shard-glk8/igt@gem_ppgtt@flink-and-close-vma-leak.html
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-glk6/igt@gem_ppgtt@flink-and-close-vma-leak.html
* igt@gem_userptr_blits@huge-split:
- {shard-dg1}: [FAIL][120] ([i915#3376]) -> [PASS][121]
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11211/shard-dg1-17/igt@gem_userptr_blits@huge-split.html
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-dg1-18/igt@gem_userptr_blits@huge-split.html
* igt@i915_pm_backlight@bad-brightness:
- {shard-rkl}: [SKIP][122] ([i915#3012]) -> [PASS][123]
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11211/shard-rkl-5/igt@i915_pm_backlight@bad-brightness.html
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-rkl-6/igt@i915_pm_backlight@bad-brightness.html
* igt@i915_pm_rpm@dpms-lpsp:
- {shard-rkl}: [SKIP][124] ([i915#1397]) -> [PASS][125]
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11211/shard-rkl-4/igt@i915_pm_rpm@dpms-lpsp.html
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-rkl-6/igt@i915_pm_rpm@dpms-lpsp.html
* igt@i915_pm_rpm@pm-tiling:
- {shard-rkl}: [SKIP][126] ([fdo#109308]) -> [PASS][127]
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11211/shard-rkl-5/igt@i915_pm_rpm@pm-tiling.html
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-rkl-6/igt@i915_pm_rpm@pm-tiling.html
* igt@kms_big_fb@x-tiled-32bpp-rotate-180:
- {shard-rkl}: [SKIP][128] ([i915#1845]) -> [PASS][129] +19 similar issues
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11211/shard-rkl-5/igt@kms_big_fb@x-tiled-32bpp-rotate-180.html
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-rkl-6/igt@kms_big_fb@x-tiled-32bpp-rotate-180.html
* igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_gen12_rc_ccs:
- {shard-rkl}: ([SKIP][130], [SKIP][131]) ([i915#1845] / [i915#4098]) -> [PASS][132]
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11211/shard-rkl-5/igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_gen12_rc_ccs.html
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11211/shard-rkl-4/igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_gen12_rc_ccs.html
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-rkl-6/igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_gen12_rc_ccs.html
* igt@kms_color@pipe-a-ctm-0-25:
- {shard-rkl}: [SKIP][133] ([i915#1149] / [i915#1849]) -> [PASS][134] +1 similar issue
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11211/shard-rkl-5/igt@kms_color@pipe-a-ctm-0-25.html
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-rkl-6/igt@kms_color@pipe-a-ctm-0-25.html
* igt@kms_color@pipe-b-gamma:
- {shard-rkl}: ([SKIP][135], [SKIP][136]) ([i915#1149] / [i915#1849] / [i915#4098]) -> [PASS][137]
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11211/shard-rkl-5/igt@kms_color@pipe-b-gamma.html
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11211/shard-rkl-4/igt@kms_color@pipe-b-gamma.html
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/shard-rkl-6/igt@kms_color@pipe-b-gamma.html
* igt@kms_color@pipe-b-legacy-gamma-reset:
- {shard-rkl}: [SKIP][138] ([i915#4098]) -> [PASS][139]
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11211/shard-rkl-4/igt@kms_color@pipe-b-legacy-gamma-reset.html
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/s
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22237/index.html
[-- Attachment #2: Type: text/html, Size: 33543 bytes --]
^ permalink raw reply [flat|nested] 19+ messages in thread
* [Intel-gfx] [PATCH v3 3/5] drm/i915: Make cursor plane registers unlocked
2022-02-10 6:24 ` [Intel-gfx] [PATCH v2 3/5] drm/i915: Make cursor " Ville Syrjala
@ 2022-02-11 9:26 ` Ville Syrjala
2022-02-24 14:37 ` Lisovskiy, Stanislav
0 siblings, 1 reply; 19+ messages in thread
From: Ville Syrjala @ 2022-02-11 9:26 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Drop the locks around cursor plane register writes. The
lock isn't needed since each plane's register are neatly
contained on their own cachelines.
The locking did have a secondary effect of disabling
interrupts around the cursor registers writes though.
If we drop that then we open outselves up for sceduling
delays and whatnot while on the middle of the register
writes. That increases the chance of not all the register
writes land during the same frame. For normal atomic
commits this is not a concern as the vblank evade mechanism
anyway disables interrupts around the update, but the legacy
cursor codepath does not. Technically we should do a vblank
evade there as well, but so far no one has bothered to hook
that up. So in the meantime let's put an explicit local irq
disable/enable around the legacy cursor update to keep the
race window minimal.
v2: local_irq_{disable,enable}() for legacy cursor ioctl
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_cursor.c | 20 ++++++++++----------
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c b/drivers/gpu/drm/i915/display/intel_cursor.c
index 2ade8fdd9bdd..b648be744cf2 100644
--- a/drivers/gpu/drm/i915/display/intel_cursor.c
+++ b/drivers/gpu/drm/i915/display/intel_cursor.c
@@ -255,7 +255,6 @@ static void i845_cursor_update_arm(struct intel_plane *plane,
{
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
u32 cntl = 0, base = 0, pos = 0, size = 0;
- unsigned long irqflags;
if (plane_state && plane_state->uapi.visible) {
unsigned int width = drm_rect_width(&plane_state->uapi.dst);
@@ -270,8 +269,6 @@ static void i845_cursor_update_arm(struct intel_plane *plane,
pos = intel_cursor_position(plane_state);
}
- spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
-
/* On these chipsets we can only modify the base/size/stride
* whilst the cursor is disabled.
*/
@@ -290,8 +287,6 @@ static void i845_cursor_update_arm(struct intel_plane *plane,
} else {
intel_de_write_fw(dev_priv, CURPOS(PIPE_A), pos);
}
-
- spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
}
static void i845_cursor_disable_arm(struct intel_plane *plane,
@@ -492,7 +487,6 @@ static void i9xx_cursor_update_arm(struct intel_plane *plane,
struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
enum pipe pipe = plane->pipe;
u32 cntl = 0, base = 0, pos = 0, fbc_ctl = 0;
- unsigned long irqflags;
if (plane_state && plane_state->uapi.visible) {
int width = drm_rect_width(&plane_state->uapi.dst);
@@ -508,8 +502,6 @@ static void i9xx_cursor_update_arm(struct intel_plane *plane,
pos = intel_cursor_position(plane_state);
}
- spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
-
/*
* On some platforms writing CURCNTR first will also
* cause CURPOS to be armed by the CURBASE write.
@@ -555,8 +547,6 @@ static void i9xx_cursor_update_arm(struct intel_plane *plane,
intel_de_write_fw(dev_priv, CURPOS(pipe), pos);
intel_de_write_fw(dev_priv, CURBASE(pipe), base);
}
-
- spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
}
static void i9xx_cursor_disable_arm(struct intel_plane *plane,
@@ -715,6 +705,14 @@ intel_legacy_cursor_update(struct drm_plane *_plane,
*/
crtc_state->active_planes = new_crtc_state->active_planes;
+ /*
+ * Technically we should do a vblank evasion here to make
+ * sure all the cursor registers update on the same frame.
+ * For now just make sure the register writes happen as
+ * quickly as possible to minimize the race window.
+ */
+ local_irq_disable();
+
if (new_plane_state->uapi.visible) {
intel_plane_update_noarm(plane, crtc_state, new_plane_state);
intel_plane_update_arm(plane, crtc_state, new_plane_state);
@@ -722,6 +720,8 @@ intel_legacy_cursor_update(struct drm_plane *_plane,
intel_plane_disable_arm(plane, crtc_state);
}
+ local_irq_enable();
+
intel_plane_unpin_fb(old_plane_state);
out_free:
--
2.34.1
^ permalink raw reply related [flat|nested] 19+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Futher optimize plane updates (rev5)
2022-02-10 6:23 [Intel-gfx] [PATCH v2 0/5] drm/i915: Futher optimize plane updates Ville Syrjala
` (8 preceding siblings ...)
2022-02-10 14:33 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
@ 2022-02-11 18:29 ` Patchwork
2022-02-11 22:26 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
10 siblings, 0 replies; 19+ messages in thread
From: Patchwork @ 2022-02-11 18:29 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
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== Series Details ==
Series: drm/i915: Futher optimize plane updates (rev5)
URL : https://patchwork.freedesktop.org/series/99149/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11220 -> Patchwork_22255
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/index.html
Participating hosts (45 -> 43)
------------------------------
Additional (1): bat-jsl-2
Missing (3): fi-bsw-cyan shard-tglu fi-pnv-d510
Known issues
------------
Here are the changes found in Patchwork_22255 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@amdgpu/amd_cs_nop@fork-compute0:
- fi-blb-e6850: NOTRUN -> [SKIP][1] ([fdo#109271]) +17 similar issues
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/fi-blb-e6850/igt@amdgpu/amd_cs_nop@fork-compute0.html
* igt@core_auth@basic-auth:
- fi-kbl-soraka: [PASS][2] -> [DMESG-WARN][3] ([i915#1982])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/fi-kbl-soraka/igt@core_auth@basic-auth.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/fi-kbl-soraka/igt@core_auth@basic-auth.html
* igt@gem_huc_copy@huc-copy:
- fi-skl-6600u: NOTRUN -> [SKIP][4] ([fdo#109271] / [i915#2190])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/fi-skl-6600u/igt@gem_huc_copy@huc-copy.html
* igt@gem_lmem_swapping@verify-random:
- fi-skl-6600u: NOTRUN -> [SKIP][5] ([fdo#109271] / [i915#4613]) +3 similar issues
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/fi-skl-6600u/igt@gem_lmem_swapping@verify-random.html
* igt@i915_selftest@live:
- fi-skl-6600u: NOTRUN -> [FAIL][6] ([i915#4547])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/fi-skl-6600u/igt@i915_selftest@live.html
* igt@i915_selftest@live@hangcheck:
- bat-dg1-6: [PASS][7] -> [DMESG-FAIL][8] ([i915#4494] / [i915#4957])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/bat-dg1-6/igt@i915_selftest@live@hangcheck.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/bat-dg1-6/igt@i915_selftest@live@hangcheck.html
- fi-bdw-5557u: NOTRUN -> [INCOMPLETE][9] ([i915#3921])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/fi-bdw-5557u/igt@i915_selftest@live@hangcheck.html
* igt@kms_chamelium@vga-edid-read:
- fi-skl-6600u: NOTRUN -> [SKIP][10] ([fdo#109271] / [fdo#111827]) +8 similar issues
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/fi-skl-6600u/igt@kms_chamelium@vga-edid-read.html
- fi-bdw-5557u: NOTRUN -> [SKIP][11] ([fdo#109271] / [fdo#111827]) +8 similar issues
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/fi-bdw-5557u/igt@kms_chamelium@vga-edid-read.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- fi-skl-6600u: NOTRUN -> [SKIP][12] ([fdo#109271]) +3 similar issues
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/fi-skl-6600u/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
- fi-skl-6600u: NOTRUN -> [SKIP][13] ([fdo#109271] / [i915#533])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/fi-skl-6600u/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html
* igt@kms_psr@cursor_plane_move:
- fi-bdw-5557u: NOTRUN -> [SKIP][14] ([fdo#109271]) +13 similar issues
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/fi-bdw-5557u/igt@kms_psr@cursor_plane_move.html
#### Possible fixes ####
* igt@gem_exec_suspend@basic-s3@smem:
- fi-skl-6600u: [INCOMPLETE][15] ([i915#4547]) -> [PASS][16]
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/fi-skl-6600u/igt@gem_exec_suspend@basic-s3@smem.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/fi-skl-6600u/igt@gem_exec_suspend@basic-s3@smem.html
* igt@i915_selftest@live@requests:
- fi-blb-e6850: [DMESG-FAIL][17] ([i915#5026]) -> [PASS][18]
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/fi-blb-e6850/igt@i915_selftest@live@requests.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/fi-blb-e6850/igt@i915_selftest@live@requests.html
* igt@kms_frontbuffer_tracking@basic:
- fi-cml-u2: [DMESG-WARN][19] ([i915#4269]) -> [PASS][20]
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/fi-cml-u2/igt@kms_frontbuffer_tracking@basic.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/fi-cml-u2/igt@kms_frontbuffer_tracking@basic.html
#### Warnings ####
* igt@runner@aborted:
- fi-skl-6600u: [FAIL][21] ([i915#4312]) -> [FAIL][22] ([i915#1436] / [i915#4312])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/fi-skl-6600u/igt@runner@aborted.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/fi-skl-6600u/igt@runner@aborted.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
[i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
[i915#3921]: https://gitlab.freedesktop.org/drm/intel/issues/3921
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4269]: https://gitlab.freedesktop.org/drm/intel/issues/4269
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#4494]: https://gitlab.freedesktop.org/drm/intel/issues/4494
[i915#4547]: https://gitlab.freedesktop.org/drm/intel/issues/4547
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4898]: https://gitlab.freedesktop.org/drm/intel/issues/4898
[i915#4957]: https://gitlab.freedesktop.org/drm/intel/issues/4957
[i915#5026]: https://gitlab.freedesktop.org/drm/intel/issues/5026
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
Build changes
-------------
* Linux: CI_DRM_11220 -> Patchwork_22255
CI-20190529: 20190529
CI_DRM_11220: 32e4daa92806f1d9bb97fd9c858c2b1baf9a0ba8 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6342: 1bd167a3af9e8f6168ac89c64c64b929694d9be7 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_22255: 8468d03c82c1f340c8cec6c3c98c78358aafe7d7 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
8468d03c82c1 drm/i915: Make pre-skl sprite plane registers unlocked
c334c5d7601c drm/i915: Make most pre-skl primary plane registers unlocked
32981cc0a856 drm/i915: Make cursor plane registers unlocked
e0e43a964d56 drm/i915: Make skl+ universal plane registers unlocked
909c385e8996 drm/i915: Optimize icl+ universal plane programming
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/index.html
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^ permalink raw reply [flat|nested] 19+ messages in thread
* [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Futher optimize plane updates (rev5)
2022-02-10 6:23 [Intel-gfx] [PATCH v2 0/5] drm/i915: Futher optimize plane updates Ville Syrjala
` (9 preceding siblings ...)
2022-02-11 18:29 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Futher optimize plane updates (rev5) Patchwork
@ 2022-02-11 22:26 ` Patchwork
10 siblings, 0 replies; 19+ messages in thread
From: Patchwork @ 2022-02-11 22:26 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 30269 bytes --]
== Series Details ==
Series: drm/i915: Futher optimize plane updates (rev5)
URL : https://patchwork.freedesktop.org/series/99149/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11220_full -> Patchwork_22255_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_22255_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_22255_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (13 -> 13)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_22255_full:
### IGT changes ###
#### Possible regressions ####
* igt@kms_flip@flip-vs-fences-interruptible@a-vga1:
- shard-snb: [PASS][1] -> [INCOMPLETE][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-snb5/igt@kms_flip@flip-vs-fences-interruptible@a-vga1.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-snb2/igt@kms_flip@flip-vs-fences-interruptible@a-vga1.html
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@gem_exec_balancer@busy:
- {shard-rkl}: [PASS][3] -> [DMESG-WARN][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-rkl-1/igt@gem_exec_balancer@busy.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-rkl-5/igt@gem_exec_balancer@busy.html
* igt@i915_module_load@reload-no-display:
- {shard-rkl}: NOTRUN -> [INCOMPLETE][5]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-rkl-5/igt@i915_module_load@reload-no-display.html
* igt@syncobj_timeline@transfer-timeline-point:
- {shard-rkl}: NOTRUN -> [DMESG-FAIL][6]
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-rkl-2/igt@syncobj_timeline@transfer-timeline-point.html
Known issues
------------
Here are the changes found in Patchwork_22255_full that come from known issues:
### CI changes ###
#### Possible fixes ####
* boot:
- {shard-rkl}: ([PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12], [PASS][13], [PASS][14], [FAIL][15], [PASS][16], [PASS][17], [PASS][18], [PASS][19], [PASS][20], [PASS][21], [PASS][22], [PASS][23], [PASS][24], [PASS][25], [PASS][26], [PASS][27], [PASS][28]) -> ([PASS][29], [PASS][30], [PASS][31], [PASS][32], [PASS][33], [PASS][34], [PASS][35], [PASS][36], [PASS][37], [PASS][38], [PASS][39], [PASS][40], [PASS][41], [PASS][42], [PASS][43], [PASS][44], [PASS][45], [PASS][46], [PASS][47], [PASS][48], [PASS][49])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-rkl-5/boot.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-rkl-2/boot.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-rkl-2/boot.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-rkl-4/boot.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-rkl-4/boot.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-rkl-5/boot.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-rkl-5/boot.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-rkl-6/boot.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-rkl-5/boot.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-rkl-6/boot.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-rkl-5/boot.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-rkl-5/boot.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-rkl-6/boot.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-rkl-1/boot.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-rkl-1/boot.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-rkl-1/boot.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-rkl-1/boot.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-rkl-1/boot.html
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-rkl-2/boot.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-rkl-2/boot.html
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-rkl-2/boot.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-rkl-2/boot.html
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-rkl-1/boot.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-rkl-1/boot.html
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-rkl-6/boot.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-rkl-6/boot.html
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-rkl-6/boot.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-rkl-5/boot.html
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-rkl-5/boot.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-rkl-5/boot.html
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-rkl-5/boot.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-rkl-5/boot.html
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-rkl-4/boot.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-rkl-4/boot.html
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-rkl-4/boot.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-rkl-2/boot.html
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-rkl-2/boot.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-rkl-2/boot.html
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-rkl-2/boot.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-rkl-2/boot.html
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-rkl-2/boot.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-rkl-1/boot.html
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-rkl-1/boot.html
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_fair@basic-none-share@rcs0:
- shard-iclb: [PASS][50] -> [FAIL][51] ([i915#2842])
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-iclb3/igt@gem_exec_fair@basic-none-share@rcs0.html
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-iclb8/igt@gem_exec_fair@basic-none-share@rcs0.html
* igt@gem_exec_fair@basic-none@vcs0:
- shard-kbl: [PASS][52] -> [FAIL][53] ([i915#2842]) +3 similar issues
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-kbl4/igt@gem_exec_fair@basic-none@vcs0.html
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-kbl6/igt@gem_exec_fair@basic-none@vcs0.html
* igt@gem_exec_fair@basic-throttle@rcs0:
- shard-iclb: [PASS][54] -> [FAIL][55] ([i915#2849])
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-iclb5/igt@gem_exec_fair@basic-throttle@rcs0.html
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-iclb2/igt@gem_exec_fair@basic-throttle@rcs0.html
* igt@gem_huc_copy@huc-copy:
- shard-apl: NOTRUN -> [SKIP][56] ([fdo#109271] / [i915#2190])
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-apl1/igt@gem_huc_copy@huc-copy.html
* igt@gem_lmem_swapping@random:
- shard-apl: NOTRUN -> [SKIP][57] ([fdo#109271] / [i915#4613])
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-apl3/igt@gem_lmem_swapping@random.html
* igt@gem_pread@exhaustion:
- shard-tglb: NOTRUN -> [WARN][58] ([i915#2658])
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-tglb5/igt@gem_pread@exhaustion.html
* igt@gen9_exec_parse@allowed-all:
- shard-apl: NOTRUN -> [DMESG-WARN][59] ([i915#1436] / [i915#716])
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-apl1/igt@gen9_exec_parse@allowed-all.html
* igt@i915_pm_rpm@modeset-lpsp-stress:
- shard-apl: NOTRUN -> [SKIP][60] ([fdo#109271]) +71 similar issues
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-apl4/igt@i915_pm_rpm@modeset-lpsp-stress.html
* igt@kms_big_fb@x-tiled-32bpp-rotate-180:
- shard-glk: [PASS][61] -> [DMESG-WARN][62] ([i915#118]) +1 similar issue
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-glk5/igt@kms_big_fb@x-tiled-32bpp-rotate-180.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-glk4/igt@kms_big_fb@x-tiled-32bpp-rotate-180.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-async-flip:
- shard-tglb: NOTRUN -> [SKIP][63] ([fdo#111615])
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-tglb5/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
* igt@kms_ccs@pipe-c-bad-pixel-format-y_tiled_gen12_rc_ccs_cc:
- shard-apl: NOTRUN -> [SKIP][64] ([fdo#109271] / [i915#3886])
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-apl3/igt@kms_ccs@pipe-c-bad-pixel-format-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-c-bad-rotation-90-y_tiled_gen12_mc_ccs:
- shard-kbl: NOTRUN -> [SKIP][65] ([fdo#109271] / [i915#3886])
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-kbl1/igt@kms_ccs@pipe-c-bad-rotation-90-y_tiled_gen12_mc_ccs.html
* igt@kms_chamelium@dp-hpd-enable-disable-mode:
- shard-tglb: NOTRUN -> [SKIP][66] ([fdo#109284] / [fdo#111827]) +1 similar issue
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-tglb5/igt@kms_chamelium@dp-hpd-enable-disable-mode.html
* igt@kms_chamelium@hdmi-hpd-with-enabled-mode:
- shard-skl: NOTRUN -> [SKIP][67] ([fdo#109271] / [fdo#111827])
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-skl7/igt@kms_chamelium@hdmi-hpd-with-enabled-mode.html
* igt@kms_chamelium@vga-hpd-enable-disable-mode:
- shard-apl: NOTRUN -> [SKIP][68] ([fdo#109271] / [fdo#111827]) +3 similar issues
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-apl3/igt@kms_chamelium@vga-hpd-enable-disable-mode.html
* igt@kms_cursor_crc@pipe-a-cursor-suspend:
- shard-kbl: [PASS][69] -> [DMESG-WARN][70] ([i915#180]) +3 similar issues
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-kbl1/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-kbl1/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
* igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions:
- shard-tglb: NOTRUN -> [SKIP][71] ([fdo#109274] / [fdo#111825])
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-tglb5/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
- shard-skl: [PASS][72] -> [FAIL][73] ([i915#2346] / [i915#533])
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-skl3/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-skl6/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-kbl: [PASS][74] -> [INCOMPLETE][75] ([i915#180] / [i915#636])
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-kbl7/igt@kms_fbcon_fbt@fbc-suspend.html
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-kbl4/igt@kms_fbcon_fbt@fbc-suspend.html
* igt@kms_flip@plain-flip-ts-check-interruptible@c-edp1:
- shard-skl: [PASS][76] -> [FAIL][77] ([i915#2122]) +1 similar issue
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-skl1/igt@kms_flip@plain-flip-ts-check-interruptible@c-edp1.html
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-skl6/igt@kms_flip@plain-flip-ts-check-interruptible@c-edp1.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-downscaling:
- shard-iclb: [PASS][78] -> [SKIP][79] ([i915#3701])
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-iclb5/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-downscaling.html
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-iclb2/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-downscaling.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-blt:
- shard-kbl: NOTRUN -> [SKIP][80] ([fdo#109271]) +23 similar issues
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-kbl1/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-gtt:
- shard-iclb: [PASS][81] -> [FAIL][82] ([i915#1888] / [i915#2546])
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-iclb7/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-gtt.html
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-iclb5/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-plflip-blt:
- shard-tglb: NOTRUN -> [SKIP][83] ([fdo#109280] / [fdo#111825]) +2 similar issues
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-tglb5/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-indfb-pgflip-blt:
- shard-iclb: [PASS][84] -> [FAIL][85] ([i915#1888])
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-iclb7/igt@kms_frontbuffer_tracking@psr-1p-primscrn-indfb-pgflip-blt.html
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-iclb5/igt@kms_frontbuffer_tracking@psr-1p-primscrn-indfb-pgflip-blt.html
* igt@kms_hdr@bpc-switch:
- shard-skl: [PASS][86] -> [FAIL][87] ([i915#1188])
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-skl7/igt@kms_hdr@bpc-switch.html
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-skl4/igt@kms_hdr@bpc-switch.html
* igt@kms_hdr@static-toggle-suspend:
- shard-tglb: NOTRUN -> [SKIP][88] ([i915#1187])
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-tglb5/igt@kms_hdr@static-toggle-suspend.html
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
- shard-kbl: NOTRUN -> [DMESG-WARN][89] ([i915#180])
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-kbl1/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c.html
* igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes:
- shard-apl: [PASS][90] -> [DMESG-WARN][91] ([i915#180])
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-apl2/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes.html
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-apl4/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes.html
* igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b-planes:
- shard-skl: [PASS][92] -> [INCOMPLETE][93] ([i915#4939])
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-skl4/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b-planes.html
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-skl10/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b-planes.html
* igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min:
- shard-skl: [PASS][94] -> [FAIL][95] ([fdo#108145] / [i915#265])
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-skl2/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-skl7/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html
* igt@kms_psr@psr2_cursor_plane_onoff:
- shard-iclb: [PASS][96] -> [SKIP][97] ([fdo#109441]) +1 similar issue
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-iclb2/igt@kms_psr@psr2_cursor_plane_onoff.html
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-iclb6/igt@kms_psr@psr2_cursor_plane_onoff.html
* igt@kms_vblank@pipe-d-query-forked-busy:
- shard-skl: NOTRUN -> [SKIP][98] ([fdo#109271]) +8 similar issues
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-skl7/igt@kms_vblank@pipe-d-query-forked-busy.html
* igt@kms_writeback@writeback-pixel-formats:
- shard-kbl: NOTRUN -> [SKIP][99] ([fdo#109271] / [i915#2437])
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-kbl3/igt@kms_writeback@writeback-pixel-formats.html
* igt@nouveau_crc@pipe-a-source-outp-inactive:
- shard-tglb: NOTRUN -> [SKIP][100] ([i915#2530]) +1 similar issue
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-tglb5/igt@nouveau_crc@pipe-a-source-outp-inactive.html
* igt@perf@gen8-unprivileged-single-ctx-counters:
- shard-tglb: NOTRUN -> [SKIP][101] ([fdo#109289])
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-tglb5/igt@perf@gen8-unprivileged-single-ctx-counters.html
* igt@prime_nv_api@i915_nv_import_twice:
- shard-tglb: NOTRUN -> [SKIP][102] ([fdo#109291])
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-tglb7/igt@prime_nv_api@i915_nv_import_twice.html
#### Possible fixes ####
* igt@gem_eio@in-flight-contexts-10ms:
- shard-apl: [TIMEOUT][103] ([i915#3063]) -> [PASS][104]
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-apl3/igt@gem_eio@in-flight-contexts-10ms.html
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-apl4/igt@gem_eio@in-flight-contexts-10ms.html
* igt@gem_exec_capture@pi@bcs0:
- {shard-rkl}: [INCOMPLETE][105] ([i915#3371]) -> [PASS][106]
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-rkl-6/igt@gem_exec_capture@pi@bcs0.html
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-rkl-5/igt@gem_exec_capture@pi@bcs0.html
* igt@gem_exec_fair@basic-pace@vecs0:
- shard-kbl: [FAIL][107] ([i915#2842]) -> [PASS][108]
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-kbl1/igt@gem_exec_fair@basic-pace@vecs0.html
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-kbl1/igt@gem_exec_fair@basic-pace@vecs0.html
* igt@gem_exec_fence@syncobj-export:
- {shard-rkl}: [DMESG-WARN][109] -> [PASS][110]
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-rkl-5/igt@gem_exec_fence@syncobj-export.html
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-rkl-4/igt@gem_exec_fence@syncobj-export.html
* igt@gem_exec_gttfill@engines@vecs0:
- {shard-rkl}: [INCOMPLETE][111] ([i915#5080]) -> [PASS][112]
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-rkl-5/igt@gem_exec_gttfill@engines@vecs0.html
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-rkl-1/igt@gem_exec_gttfill@engines@vecs0.html
* igt@gem_huc_copy@huc-copy:
- shard-tglb: [SKIP][113] ([i915#2190]) -> [PASS][114]
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-tglb6/igt@gem_huc_copy@huc-copy.html
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-tglb8/igt@gem_huc_copy@huc-copy.html
* igt@kms_ccs@pipe-a-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc:
- {shard-rkl}: [SKIP][115] ([i915#1845]) -> [PASS][116] +1 similar issue
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-rkl-4/igt@kms_ccs@pipe-a-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc.html
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-rkl-6/igt@kms_ccs@pipe-a-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_color@pipe-a-ctm-0-75:
- {shard-rkl}: [SKIP][117] ([i915#1149] / [i915#4098]) -> [PASS][118]
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-rkl-4/igt@kms_color@pipe-a-ctm-0-75.html
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-rkl-6/igt@kms_color@pipe-a-ctm-0-75.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
- shard-iclb: [FAIL][119] ([i915#2346]) -> [PASS][120]
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-iclb7/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-iclb5/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-apl: [INCOMPLETE][121] ([i915#180]) -> [PASS][122]
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-apl1/igt@kms_fbcon_fbt@fbc-suspend.html
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-apl3/igt@kms_fbcon_fbt@fbc-suspend.html
* igt@kms_flip@plain-flip-ts-check@c-edp1:
- shard-skl: [FAIL][123] ([i915#2122]) -> [PASS][124] +1 similar issue
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-skl2/igt@kms_flip@plain-flip-ts-check@c-edp1.html
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-skl3/igt@kms_flip@plain-flip-ts-check@c-edp1.html
* igt@kms_frontbuffer_tracking@fbc-suspend:
- shard-apl: [DMESG-WARN][125] ([i915#180]) -> [PASS][126] +1 similar issue
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-apl2/igt@kms_frontbuffer_tracking@fbc-suspend.html
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-apl1/igt@kms_frontbuffer_tracking@fbc-suspend.html
* igt@kms_hdr@bpc-switch-suspend:
- shard-kbl: [DMESG-WARN][127] ([i915#180]) -> [PASS][128] +2 similar issues
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-kbl1/igt@kms_hdr@bpc-switch-suspend.html
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-kbl1/igt@kms_hdr@bpc-switch-suspend.html
* igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
- shard-skl: [FAIL][129] ([fdo#108145] / [i915#265]) -> [PASS][130]
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-skl3/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-skl6/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
* igt@kms_psr@psr2_sprite_plane_move:
- shard-iclb: [SKIP][131] ([fdo#109441]) -> [PASS][132] +1 similar issue
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-iclb5/igt@kms_psr@psr2_sprite_plane_move.html
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html
* igt@perf@polling-parameterized:
- shard-glk: [FAIL][133] ([i915#1542]) -> [PASS][134]
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-glk3/igt@perf@polling-parameterized.html
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-glk8/igt@perf@polling-parameterized.html
- shard-kbl: [FAIL][135] ([i915#1542]) -> [PASS][136]
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-kbl6/igt@perf@polling-parameterized.html
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-kbl3/igt@perf@polling-parameterized.html
#### Warnings ####
* igt@gem_exec_balancer@parallel-keep-in-fence:
- shard-iclb: [SKIP][137] ([i915#4525]) -> [DMESG-WARN][138] ([i915#5076])
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-iclb5/igt@gem_exec_balancer@parallel-keep-in-fence.html
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-iclb2/igt@gem_exec_balancer@parallel-keep-in-fence.html
* igt@i915_pm_rc6_residency@rc6-idle:
- shard-iclb: [WARN][139] ([i915#2684]) -> [FAIL][140] ([i915#2680])
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-iclb8/igt@i915_pm_rc6_residency@rc6-idle.html
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-iclb8/igt@i915_pm_rc6_residency@rc6-idle.html
* igt@kms_color@pipe-d-ctm-negative:
- shard-glk: [SKIP][141] ([fdo#109271] / [i915#1888]) -> [SKIP][142] ([fdo#109271])
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-glk2/igt@kms_color@pipe-d-ctm-negative.html
[142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-glk7/igt@kms_color@pipe-d-ctm-negative.html
* igt@runner@aborted:
- shard-kbl: ([FAIL][143], [FAIL][144], [FAIL][145], [FAIL][146], [FAIL][147], [FAIL][148], [FAIL][149], [FAIL][150], [FAIL][151], [FAIL][152], [FAIL][153], [FAIL][154], [FAIL][155], [FAIL][156], [FAIL][157]) ([i915#1436] / [i915#180] / [i915#1814] / [i915#3002] / [i915#4312]) -> ([FAIL][158], [FAIL][159], [FAIL][160], [FAIL][161], [FAIL][162], [FAIL][163], [FAIL][164], [FAIL][165], [FAIL][166], [FAIL][167], [FAIL][168], [FAIL][169], [FAIL][170], [FAIL][171], [FAIL][172]) ([i915#1436] / [i915#180] / [i915#1814] / [i915#3002] / [i915#4312] / [i915#92])
[143]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-kbl4/igt@runner@aborted.html
[144]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-kbl1/igt@runner@aborted.html
[145]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-kbl7/igt@runner@aborted.html
[146]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-kbl3/igt@runner@aborted.html
[147]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-kbl1/igt@runner@aborted.html
[148]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-kbl1/igt@runner@aborted.html
[149]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-kbl7/igt@runner@aborted.html
[150]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-kbl7/igt@runner@aborted.html
[151]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-kbl3/igt@runner@aborted.html
[152]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-kbl1/igt@runner@aborted.html
[153]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-kbl1/igt@runner@aborted.html
[154]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-kbl1/igt@runner@aborted.html
[155]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-kbl4/igt@runner@aborted.html
[156]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-kbl6/igt@runner@aborted.html
[157]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-kbl7/igt@runner@aborted.html
[158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-kbl1/igt@runner@aborted.html
[159]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-kbl6/igt@runner@aborted.html
[160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-kbl7/igt@runner@aborted.html
[161]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-kbl4/igt@runner@aborted.html
[162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-kbl4/igt@runner@aborted.html
[163]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-kbl1/igt@runner@aborted.html
[164]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-kbl7/igt@runner@aborted.html
[165]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-kbl1/igt@runner@aborted.html
[166]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-kbl1/igt@runner@aborted.html
[167]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-kbl1/igt@runner@aborted.html
[168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-kbl4/igt@runner@aborted.html
[169]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-kbl1/igt@runner@aborted.html
[170]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-kbl3/igt@runner@aborted.html
[171]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-kbl7/igt@runner@aborted.html
[172]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/shard-kbl6/igt@runner@aborted.html
- shard-apl: ([FAIL][173], [FAIL][174], [FAIL][175], [FAIL][176], [FAIL][177], [FAIL][178], [FAIL][179], [FAIL][180]) ([fdo#109271] / [i915#180] / [i915#1814] / [i915#3002] / [i915#4312]) -> ([FAIL][181], [FAIL][182], [FAIL][183], [FAIL][184], [FAIL][185], [FAIL][186], [FAIL][187]) ([fdo#109271] / [i915#1814] / [i915#3002] / [i915#4312])
[173]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-apl2/igt@runner@aborted.html
[174]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-apl2/igt@runner@aborted.html
[175]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-apl8/igt@runner@aborted.html
[176]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-apl8/igt@runner@aborted.html
[177]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-apl6/igt@runner@aborted.html
[178]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-apl6/igt@runner@aborted.html
[179]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11220/shard-apl1/igt@runner@aborted.html
[180]: https://int
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22255/index.html
[-- Attachment #2: Type: text/html, Size: 32853 bytes --]
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [Intel-gfx] [PATCH v2 5/5] drm/i915: Make pre-skl sprite plane registers unlocked
2022-02-10 6:24 ` [Intel-gfx] [PATCH v2 5/5] drm/i915: Make pre-skl sprite " Ville Syrjala
@ 2022-02-21 11:18 ` Lisovskiy, Stanislav
0 siblings, 0 replies; 19+ messages in thread
From: Lisovskiy, Stanislav @ 2022-02-21 11:18 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
On Thu, Feb 10, 2022 at 08:24:03AM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Drop the locks around sprite plane register writes. The
> lock isn't needed since each plane's register are neatly
> contained on their own cachelines.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_sprite.c | 45 ---------------------
> 1 file changed, 45 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
> index 2d71294aaceb..f6875a49b8cb 100644
> --- a/drivers/gpu/drm/i915/display/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/display/intel_sprite.c
> @@ -430,9 +430,6 @@ vlv_sprite_update_noarm(struct intel_plane *plane,
> int crtc_y = plane_state->uapi.dst.y1;
> u32 crtc_w = drm_rect_width(&plane_state->uapi.dst);
> u32 crtc_h = drm_rect_height(&plane_state->uapi.dst);
> - unsigned long irqflags;
> -
> - spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
>
> intel_de_write_fw(dev_priv, SPSTRIDE(pipe, plane_id),
> plane_state->view.color_plane[0].mapping_stride);
> @@ -440,8 +437,6 @@ vlv_sprite_update_noarm(struct intel_plane *plane,
> SP_POS_Y(crtc_y) | SP_POS_X(crtc_x));
> intel_de_write_fw(dev_priv, SPSIZE(pipe, plane_id),
> SP_HEIGHT(crtc_h - 1) | SP_WIDTH(crtc_w - 1));
> -
> - spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> }
>
> static void
> @@ -457,14 +452,11 @@ vlv_sprite_update_arm(struct intel_plane *plane,
> u32 x = plane_state->view.color_plane[0].x;
> u32 y = plane_state->view.color_plane[0].y;
> u32 sprctl, linear_offset;
> - unsigned long irqflags;
>
> sprctl = plane_state->ctl | vlv_sprite_ctl_crtc(crtc_state);
>
> linear_offset = intel_fb_xy_to_linear(x, y, plane_state, 0);
>
> - spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
> -
> if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B)
> chv_sprite_update_csc(plane_state);
>
> @@ -494,8 +486,6 @@ vlv_sprite_update_arm(struct intel_plane *plane,
>
> vlv_sprite_update_clrc(plane_state);
> vlv_sprite_update_gamma(plane_state);
> -
> - spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> }
>
> static void
> @@ -505,14 +495,9 @@ vlv_sprite_disable_arm(struct intel_plane *plane,
> struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
> enum pipe pipe = plane->pipe;
> enum plane_id plane_id = plane->id;
> - unsigned long irqflags;
> -
> - spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
>
> intel_de_write_fw(dev_priv, SPCNTR(pipe, plane_id), 0);
> intel_de_write_fw(dev_priv, SPSURF(pipe, plane_id), 0);
> -
> - spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> }
>
> static bool
> @@ -862,15 +847,12 @@ ivb_sprite_update_noarm(struct intel_plane *plane,
> u32 src_w = drm_rect_width(&plane_state->uapi.src) >> 16;
> u32 src_h = drm_rect_height(&plane_state->uapi.src) >> 16;
> u32 sprscale = 0;
> - unsigned long irqflags;
>
> if (crtc_w != src_w || crtc_h != src_h)
> sprscale = SPRITE_SCALE_ENABLE |
> SPRITE_SRC_WIDTH(src_w - 1) |
> SPRITE_SRC_HEIGHT(src_h - 1);
>
> - spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
> -
> intel_de_write_fw(dev_priv, SPRSTRIDE(pipe),
> plane_state->view.color_plane[0].mapping_stride);
> intel_de_write_fw(dev_priv, SPRPOS(pipe),
> @@ -879,8 +861,6 @@ ivb_sprite_update_noarm(struct intel_plane *plane,
> SPRITE_HEIGHT(crtc_h - 1) | SPRITE_WIDTH(crtc_w - 1));
> if (IS_IVYBRIDGE(dev_priv))
> intel_de_write_fw(dev_priv, SPRSCALE(pipe), sprscale);
> -
> - spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> }
>
> static void
> @@ -895,14 +875,11 @@ ivb_sprite_update_arm(struct intel_plane *plane,
> u32 x = plane_state->view.color_plane[0].x;
> u32 y = plane_state->view.color_plane[0].y;
> u32 sprctl, linear_offset;
> - unsigned long irqflags;
>
> sprctl = plane_state->ctl | ivb_sprite_ctl_crtc(crtc_state);
>
> linear_offset = intel_fb_xy_to_linear(x, y, plane_state, 0);
>
> - spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
> -
> if (key->flags) {
> intel_de_write_fw(dev_priv, SPRKEYVAL(pipe), key->min_value);
> intel_de_write_fw(dev_priv, SPRKEYMSK(pipe),
> @@ -931,8 +908,6 @@ ivb_sprite_update_arm(struct intel_plane *plane,
> intel_plane_ggtt_offset(plane_state) + sprsurf_offset);
>
> ivb_sprite_update_gamma(plane_state);
> -
> - spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> }
>
> static void
> @@ -941,17 +916,12 @@ ivb_sprite_disable_arm(struct intel_plane *plane,
> {
> struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
> enum pipe pipe = plane->pipe;
> - unsigned long irqflags;
> -
> - spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
>
> intel_de_write_fw(dev_priv, SPRCTL(pipe), 0);
> /* Disable the scaler */
> if (IS_IVYBRIDGE(dev_priv))
> intel_de_write_fw(dev_priv, SPRSCALE(pipe), 0);
> intel_de_write_fw(dev_priv, SPRSURF(pipe), 0);
> -
> - spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> }
>
> static bool
> @@ -1204,15 +1174,12 @@ g4x_sprite_update_noarm(struct intel_plane *plane,
> u32 src_w = drm_rect_width(&plane_state->uapi.src) >> 16;
> u32 src_h = drm_rect_height(&plane_state->uapi.src) >> 16;
> u32 dvsscale = 0;
> - unsigned long irqflags;
>
> if (crtc_w != src_w || crtc_h != src_h)
> dvsscale = DVS_SCALE_ENABLE |
> DVS_SRC_WIDTH(src_w - 1) |
> DVS_SRC_HEIGHT(src_h - 1);
>
> - spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
> -
> intel_de_write_fw(dev_priv, DVSSTRIDE(pipe),
> plane_state->view.color_plane[0].mapping_stride);
> intel_de_write_fw(dev_priv, DVSPOS(pipe),
> @@ -1220,8 +1187,6 @@ g4x_sprite_update_noarm(struct intel_plane *plane,
> intel_de_write_fw(dev_priv, DVSSIZE(pipe),
> DVS_HEIGHT(crtc_h - 1) | DVS_WIDTH(crtc_w - 1));
> intel_de_write_fw(dev_priv, DVSSCALE(pipe), dvsscale);
> -
> - spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> }
>
> static void
> @@ -1236,14 +1201,11 @@ g4x_sprite_update_arm(struct intel_plane *plane,
> u32 x = plane_state->view.color_plane[0].x;
> u32 y = plane_state->view.color_plane[0].y;
> u32 dvscntr, linear_offset;
> - unsigned long irqflags;
>
> dvscntr = plane_state->ctl | g4x_sprite_ctl_crtc(crtc_state);
>
> linear_offset = intel_fb_xy_to_linear(x, y, plane_state, 0);
>
> - spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
> -
> if (key->flags) {
> intel_de_write_fw(dev_priv, DVSKEYVAL(pipe), key->min_value);
> intel_de_write_fw(dev_priv, DVSKEYMSK(pipe),
> @@ -1267,8 +1229,6 @@ g4x_sprite_update_arm(struct intel_plane *plane,
> g4x_sprite_update_gamma(plane_state);
> else
> ilk_sprite_update_gamma(plane_state);
> -
> - spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> }
>
> static void
> @@ -1277,16 +1237,11 @@ g4x_sprite_disable_arm(struct intel_plane *plane,
> {
> struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
> enum pipe pipe = plane->pipe;
> - unsigned long irqflags;
> -
> - spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
>
> intel_de_write_fw(dev_priv, DVSCNTR(pipe), 0);
> /* Disable the scaler */
> intel_de_write_fw(dev_priv, DVSSCALE(pipe), 0);
> intel_de_write_fw(dev_priv, DVSSURF(pipe), 0);
> -
> - spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> }
>
> static bool
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [Intel-gfx] [PATCH v2 4/5] drm/i915: Make most pre-skl primary plane registers unlocked
2022-02-10 6:24 ` [Intel-gfx] [PATCH v2 4/5] drm/i915: Make most pre-skl primary " Ville Syrjala
@ 2022-02-21 11:19 ` Lisovskiy, Stanislav
0 siblings, 0 replies; 19+ messages in thread
From: Lisovskiy, Stanislav @ 2022-02-21 11:19 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
On Thu, Feb 10, 2022 at 08:24:02AM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Drop the locks around most primary plane register writes.
> The lock isn't needed since each plane's register are neatly
> contained on their own cachelines.
>
> The one exception we have to make is DSPADDR/DSPSURF which is
> (ab)used to also trigger FBC nukes on pre-snb (since the
> hardware doesn't seem to have any dedicated mechanism to
> trigger nukes). So we need to keep the lock around it to
> protect against the rmw performed by the fbc code.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> ---
> drivers/gpu/drm/i915/display/i9xx_plane.c | 24 +++++++++--------------
> 1 file changed, 9 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/i9xx_plane.c b/drivers/gpu/drm/i915/display/i9xx_plane.c
> index a87b65cd41fd..af190bacdd97 100644
> --- a/drivers/gpu/drm/i915/display/i9xx_plane.c
> +++ b/drivers/gpu/drm/i915/display/i9xx_plane.c
> @@ -418,9 +418,6 @@ static void i9xx_plane_update_noarm(struct intel_plane *plane,
> {
> struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
> enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;
> - unsigned long irqflags;
> -
> - spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
>
> intel_de_write_fw(dev_priv, DSPSTRIDE(i9xx_plane),
> plane_state->view.color_plane[0].mapping_stride);
> @@ -441,8 +438,6 @@ static void i9xx_plane_update_noarm(struct intel_plane *plane,
> intel_de_write_fw(dev_priv, DSPSIZE(i9xx_plane),
> DISP_HEIGHT(crtc_h - 1) | DISP_WIDTH(crtc_w - 1));
> }
> -
> - spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> }
>
> static void i9xx_plane_update_arm(struct intel_plane *plane,
> @@ -465,8 +460,6 @@ static void i9xx_plane_update_arm(struct intel_plane *plane,
> else
> dspaddr_offset = linear_offset;
>
> - spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
> -
> if (IS_CHERRYVIEW(dev_priv) && i9xx_plane == PLANE_B) {
> int crtc_x = plane_state->uapi.dst.x1;
> int crtc_y = plane_state->uapi.dst.y1;
> @@ -496,13 +489,15 @@ static void i9xx_plane_update_arm(struct intel_plane *plane,
> * the control register just before the surface register.
> */
> intel_de_write_fw(dev_priv, DSPCNTR(i9xx_plane), dspcntr);
> +
> + /* lock to protect against rmw in fbc nuke */
> + spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
> if (DISPLAY_VER(dev_priv) >= 4)
> intel_de_write_fw(dev_priv, DSPSURF(i9xx_plane),
> intel_plane_ggtt_offset(plane_state) + dspaddr_offset);
> else
> intel_de_write_fw(dev_priv, DSPADDR(i9xx_plane),
> intel_plane_ggtt_offset(plane_state) + dspaddr_offset);
> -
> spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> }
>
> @@ -540,14 +535,14 @@ static void i9xx_plane_disable_arm(struct intel_plane *plane,
> */
> dspcntr = i9xx_plane_ctl_crtc(crtc_state);
>
> - spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
> -
> intel_de_write_fw(dev_priv, DSPCNTR(i9xx_plane), dspcntr);
> +
> + /* lock to protect against rmw in fbc nuke */
> + spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
> if (DISPLAY_VER(dev_priv) >= 4)
> intel_de_write_fw(dev_priv, DSPSURF(i9xx_plane), 0);
> else
> intel_de_write_fw(dev_priv, DSPADDR(i9xx_plane), 0);
> -
> spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> }
>
> @@ -566,8 +561,10 @@ g4x_primary_async_flip(struct intel_plane *plane,
> if (async_flip)
> dspcntr |= DISP_ASYNC_FLIP;
>
> - spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
> intel_de_write_fw(dev_priv, DSPCNTR(i9xx_plane), dspcntr);
> +
> + /* lock to protect against rmw in fbc nuke */
> + spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
> intel_de_write_fw(dev_priv, DSPSURF(i9xx_plane),
> intel_plane_ggtt_offset(plane_state) + dspaddr_offset);
> spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> @@ -582,12 +579,9 @@ vlv_primary_async_flip(struct intel_plane *plane,
> struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
> u32 dspaddr_offset = plane_state->view.color_plane[0].offset;
> enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;
> - unsigned long irqflags;
>
> - spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
> intel_de_write_fw(dev_priv, DSPADDR_VLV(i9xx_plane),
> intel_plane_ggtt_offset(plane_state) + dspaddr_offset);
> - spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> }
>
> static void
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [Intel-gfx] [PATCH v2 1/5] drm/i915: Optimize icl+ universal plane programming
2022-02-10 6:23 ` [Intel-gfx] [PATCH v2 1/5] drm/i915: Optimize icl+ universal plane programming Ville Syrjala
@ 2022-02-21 11:21 ` Lisovskiy, Stanislav
0 siblings, 0 replies; 19+ messages in thread
From: Lisovskiy, Stanislav @ 2022-02-21 11:21 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
On Thu, Feb 10, 2022 at 08:23:59AM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> On icl+ all plane registers are armed by PLANE_SURF, so we can
> move almost everything over into the update_noarm() hook.
>
> The PLANE_CTL write has to stay in the icl_update_arm() hook though
> as it still exhibits the somewhat annoying self-arming behaviour
> when the plane transitioning from disabled to enabled.
>
> We could either do a full split for skl+ vs. icl+, or we could try
> some other kind of split where we'd eg. keep most things in the skl+
> functions and call them from the icl+ functions. I think a full split
> is probably the cleaner approach since we've anyway accumulated quite
> a bit of icl+ specific things, so that is what I opted to do.
>
> Some i915_update_info stats for tgl:
> before: after:
> Updates: 5043 Updates: 5043
> | |
> 1us | 1us |
> |** |***
> 4us |****** 4us |********
> |********** |***********
> 16us |*********** 16us |**********
> |**** |*
> 66us | 66us |
> | |
> 262us | 262us |
> | |
> 1ms | 1ms |
> | |
> 4ms | 4ms |
> | |
> 17ms | 17ms |
> | |
> Min update: 3494ns Min update: 2983ns
> Max update: 49491ns Max update: 39986ns
> Average update: 18031ns Average update: 13423ns
> Overruns > 100us: 0 Overruns > 100us: 0
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> ---
> .../drm/i915/display/skl_universal_plane.c | 195 ++++++++++++++----
> 1 file changed, 155 insertions(+), 40 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> index 1223075595ff..5b1b089e045d 100644
> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> @@ -619,6 +619,25 @@ skl_plane_disable_arm(struct intel_plane *plane,
>
> spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
>
> + skl_write_plane_wm(plane, crtc_state);
> +
> + intel_de_write_fw(dev_priv, PLANE_CTL(pipe, plane_id), 0);
> + intel_de_write_fw(dev_priv, PLANE_SURF(pipe, plane_id), 0);
> +
> + spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> +}
> +
> +static void
> +icl_plane_disable_arm(struct intel_plane *plane,
> + const struct intel_crtc_state *crtc_state)
> +{
> + struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
> + enum plane_id plane_id = plane->id;
> + enum pipe pipe = plane->pipe;
> + unsigned long irqflags;
> +
> + spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
> +
> if (icl_is_hdr_plane(dev_priv, plane_id))
> intel_de_write_fw(dev_priv, PLANE_CUS_CTL(pipe, plane_id), 0);
>
> @@ -1065,7 +1084,7 @@ static void icl_plane_csc_load_black(struct intel_plane *plane)
> intel_de_write_fw(i915, PLANE_CSC_POSTOFF(pipe, plane_id, 2), 0);
> }
>
> -static int skl_plane_color_plane(const struct intel_plane_state *plane_state)
> +static int icl_plane_color_plane(const struct intel_plane_state *plane_state)
> {
> /* Program the UV plane on planar master */
> if (plane_state->planar_linked_plane && !plane_state->planar_slave)
> @@ -1082,9 +1101,7 @@ skl_plane_update_noarm(struct intel_plane *plane,
> struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
> enum plane_id plane_id = plane->id;
> enum pipe pipe = plane->pipe;
> - int color_plane = skl_plane_color_plane(plane_state);
> - u32 stride = skl_plane_stride(plane_state, color_plane);
> - const struct drm_framebuffer *fb = plane_state->hw.fb;
> + u32 stride = skl_plane_stride(plane_state, 0);
> int crtc_x = plane_state->uapi.dst.x1;
> int crtc_y = plane_state->uapi.dst.y1;
> u32 src_w = drm_rect_width(&plane_state->uapi.src) >> 16;
> @@ -1099,12 +1116,109 @@ skl_plane_update_noarm(struct intel_plane *plane,
>
> spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
>
> + intel_de_write_fw(dev_priv, PLANE_STRIDE(pipe, plane_id),
> + PLANE_STRIDE_(stride));
> + intel_de_write_fw(dev_priv, PLANE_POS(pipe, plane_id),
> + PLANE_POS_Y(crtc_y) | PLANE_POS_X(crtc_x));
> + intel_de_write_fw(dev_priv, PLANE_SIZE(pipe, plane_id),
> + PLANE_HEIGHT(src_h - 1) | PLANE_WIDTH(src_w - 1));
> +
> + skl_write_plane_wm(plane, crtc_state);
> +
> + spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> +}
> +
> +static void
> +skl_plane_update_arm(struct intel_plane *plane,
> + const struct intel_crtc_state *crtc_state,
> + const struct intel_plane_state *plane_state)
> +{
> + struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
> + enum plane_id plane_id = plane->id;
> + enum pipe pipe = plane->pipe;
> + u32 x = plane_state->view.color_plane[0].x;
> + u32 y = plane_state->view.color_plane[0].y;
> + u32 plane_ctl, plane_color_ctl = 0;
> + unsigned long irqflags;
> +
> + plane_ctl = plane_state->ctl |
> + skl_plane_ctl_crtc(crtc_state);
> +
> + if (DISPLAY_VER(dev_priv) >= 10)
> + plane_color_ctl = plane_state->color_ctl |
> + glk_plane_color_ctl_crtc(crtc_state);
> +
> + spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
> +
> + intel_de_write_fw(dev_priv, PLANE_KEYVAL(pipe, plane_id), skl_plane_keyval(plane_state));
> + intel_de_write_fw(dev_priv, PLANE_KEYMSK(pipe, plane_id), skl_plane_keymsk(plane_state));
> + intel_de_write_fw(dev_priv, PLANE_KEYMAX(pipe, plane_id), skl_plane_keymax(plane_state));
> +
> + intel_de_write_fw(dev_priv, PLANE_OFFSET(pipe, plane_id),
> + PLANE_OFFSET_Y(y) | PLANE_OFFSET_X(x));
> +
> + intel_de_write_fw(dev_priv, PLANE_AUX_DIST(pipe, plane_id),
> + skl_plane_aux_dist(plane_state, 0));
> +
> + intel_de_write_fw(dev_priv, PLANE_AUX_OFFSET(pipe, plane_id),
> + PLANE_OFFSET_Y(plane_state->view.color_plane[1].y) |
> + PLANE_OFFSET_X(plane_state->view.color_plane[1].x));
> +
> + if (DISPLAY_VER(dev_priv) >= 10)
> + intel_de_write_fw(dev_priv, PLANE_COLOR_CTL(pipe, plane_id), plane_color_ctl);
> +
> + /*
> + * Enable the scaler before the plane so that we don't
> + * get a catastrophic underrun even if the two operations
> + * end up happening in two different frames.
> + *
> + * TODO: split into noarm+arm pair
> + */
> + if (plane_state->scaler_id >= 0)
> + skl_program_plane_scaler(plane, crtc_state, plane_state);
> +
> /*
> - * FIXME: pxp session invalidation can hit any time even at time of commit
> - * or after the commit, display content will be garbage.
> + * The control register self-arms if the plane was previously
> + * disabled. Try to make the plane enable atomic by writing
> + * the control register just before the surface register.
> */
> - if (plane_state->force_black)
> - icl_plane_csc_load_black(plane);
> + intel_de_write_fw(dev_priv, PLANE_CTL(pipe, plane_id), plane_ctl);
> + intel_de_write_fw(dev_priv, PLANE_SURF(pipe, plane_id),
> + skl_plane_surf(plane_state, 0));
> +
> + spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> +}
> +
> +static void
> +icl_plane_update_noarm(struct intel_plane *plane,
> + const struct intel_crtc_state *crtc_state,
> + const struct intel_plane_state *plane_state)
> +{
> + struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
> + enum plane_id plane_id = plane->id;
> + enum pipe pipe = plane->pipe;
> + int color_plane = icl_plane_color_plane(plane_state);
> + u32 stride = skl_plane_stride(plane_state, color_plane);
> + const struct drm_framebuffer *fb = plane_state->hw.fb;
> + int crtc_x = plane_state->uapi.dst.x1;
> + int crtc_y = plane_state->uapi.dst.y1;
> + int x = plane_state->view.color_plane[color_plane].x;
> + int y = plane_state->view.color_plane[color_plane].y;
> + int src_w = drm_rect_width(&plane_state->uapi.src) >> 16;
> + int src_h = drm_rect_height(&plane_state->uapi.src) >> 16;
> + u32 plane_color_ctl;
> + unsigned long irqflags;
> +
> + plane_color_ctl = plane_state->color_ctl |
> + glk_plane_color_ctl_crtc(crtc_state);
> +
> + /* The scaler will handle the output position */
> + if (plane_state->scaler_id >= 0) {
> + crtc_x = 0;
> + crtc_y = 0;
> + }
> +
> + spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
>
> intel_de_write_fw(dev_priv, PLANE_STRIDE(pipe, plane_id),
> PLANE_STRIDE_(stride));
> @@ -1113,6 +1227,13 @@ skl_plane_update_noarm(struct intel_plane *plane,
> intel_de_write_fw(dev_priv, PLANE_SIZE(pipe, plane_id),
> PLANE_HEIGHT(src_h - 1) | PLANE_WIDTH(src_w - 1));
>
> + intel_de_write_fw(dev_priv, PLANE_KEYVAL(pipe, plane_id), skl_plane_keyval(plane_state));
> + intel_de_write_fw(dev_priv, PLANE_KEYMSK(pipe, plane_id), skl_plane_keymsk(plane_state));
> + intel_de_write_fw(dev_priv, PLANE_KEYMAX(pipe, plane_id), skl_plane_keymax(plane_state));
> +
> + intel_de_write_fw(dev_priv, PLANE_OFFSET(pipe, plane_id),
> + PLANE_OFFSET_Y(y) | PLANE_OFFSET_X(x));
> +
> if (intel_fb_is_rc_ccs_cc_modifier(fb->modifier)) {
> intel_de_write_fw(dev_priv, PLANE_CC_VAL(pipe, plane_id, 0),
> lower_32_bits(plane_state->ccval));
> @@ -1120,61 +1241,49 @@ skl_plane_update_noarm(struct intel_plane *plane,
> upper_32_bits(plane_state->ccval));
> }
>
> + intel_de_write_fw(dev_priv, PLANE_AUX_DIST(pipe, plane_id),
> + skl_plane_aux_dist(plane_state, color_plane));
> +
> if (icl_is_hdr_plane(dev_priv, plane_id))
> intel_de_write_fw(dev_priv, PLANE_CUS_CTL(pipe, plane_id),
> plane_state->cus_ctl);
>
> + intel_de_write_fw(dev_priv, PLANE_COLOR_CTL(pipe, plane_id), plane_color_ctl);
> +
> if (fb->format->is_yuv && icl_is_hdr_plane(dev_priv, plane_id))
> icl_program_input_csc(plane, crtc_state, plane_state);
>
> skl_write_plane_wm(plane, crtc_state);
>
> + /*
> + * FIXME: pxp session invalidation can hit any time even at time of commit
> + * or after the commit, display content will be garbage.
> + */
> + if (plane_state->force_black)
> + icl_plane_csc_load_black(plane);
> +
> intel_psr2_program_plane_sel_fetch(plane, crtc_state, plane_state, color_plane);
>
> spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> }
>
> static void
> -skl_plane_update_arm(struct intel_plane *plane,
> +icl_plane_update_arm(struct intel_plane *plane,
> const struct intel_crtc_state *crtc_state,
> const struct intel_plane_state *plane_state)
> {
> struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
> enum plane_id plane_id = plane->id;
> enum pipe pipe = plane->pipe;
> - int color_plane = skl_plane_color_plane(plane_state);
> - u32 x = plane_state->view.color_plane[color_plane].x;
> - u32 y = plane_state->view.color_plane[color_plane].y;
> - u32 plane_color_ctl = 0;
> - u32 plane_ctl = plane_state->ctl;
> + int color_plane = icl_plane_color_plane(plane_state);
> + u32 plane_ctl;
> unsigned long irqflags;
>
> - plane_ctl |= skl_plane_ctl_crtc(crtc_state);
> -
> - if (DISPLAY_VER(dev_priv) >= 10)
> - plane_color_ctl = plane_state->color_ctl |
> - glk_plane_color_ctl_crtc(crtc_state);
> + plane_ctl = plane_state->ctl |
> + skl_plane_ctl_crtc(crtc_state);
>
> spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
>
> - intel_de_write_fw(dev_priv, PLANE_KEYVAL(pipe, plane_id), skl_plane_keyval(plane_state));
> - intel_de_write_fw(dev_priv, PLANE_KEYMSK(pipe, plane_id), skl_plane_keymsk(plane_state));
> - intel_de_write_fw(dev_priv, PLANE_KEYMAX(pipe, plane_id), skl_plane_keymax(plane_state));
> -
> - intel_de_write_fw(dev_priv, PLANE_OFFSET(pipe, plane_id),
> - PLANE_OFFSET_Y(y) | PLANE_OFFSET_X(x));
> -
> - intel_de_write_fw(dev_priv, PLANE_AUX_DIST(pipe, plane_id),
> - skl_plane_aux_dist(plane_state, color_plane));
> -
> - if (DISPLAY_VER(dev_priv) < 11)
> - intel_de_write_fw(dev_priv, PLANE_AUX_OFFSET(pipe, plane_id),
> - PLANE_OFFSET_Y(plane_state->view.color_plane[1].y) |
> - PLANE_OFFSET_X(plane_state->view.color_plane[1].x));
> -
> - if (DISPLAY_VER(dev_priv) >= 10)
> - intel_de_write_fw(dev_priv, PLANE_COLOR_CTL(pipe, plane_id), plane_color_ctl);
> -
> /*
> * Enable the scaler before the plane so that we don't
> * get a catastrophic underrun even if the two operations
> @@ -2162,9 +2271,15 @@ skl_universal_plane_create(struct drm_i915_private *dev_priv,
> }
>
> plane->max_stride = skl_plane_max_stride;
> - plane->update_noarm = skl_plane_update_noarm;
> - plane->update_arm = skl_plane_update_arm;
> - plane->disable_arm = skl_plane_disable_arm;
> + if (DISPLAY_VER(dev_priv) >= 11) {
> + plane->update_noarm = icl_plane_update_noarm;
> + plane->update_arm = icl_plane_update_arm;
> + plane->disable_arm = icl_plane_disable_arm;
> + } else {
> + plane->update_noarm = skl_plane_update_noarm;
> + plane->update_arm = skl_plane_update_arm;
> + plane->disable_arm = skl_plane_disable_arm;
> + }
> plane->get_hw_state = skl_plane_get_hw_state;
> plane->check_plane = skl_plane_check;
>
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [Intel-gfx] [PATCH v3 3/5] drm/i915: Make cursor plane registers unlocked
2022-02-11 9:26 ` [Intel-gfx] [PATCH v3 " Ville Syrjala
@ 2022-02-24 14:37 ` Lisovskiy, Stanislav
2022-02-24 17:00 ` Ville Syrjälä
0 siblings, 1 reply; 19+ messages in thread
From: Lisovskiy, Stanislav @ 2022-02-24 14:37 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
On Fri, Feb 11, 2022 at 11:26:04AM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Drop the locks around cursor plane register writes. The
> lock isn't needed since each plane's register are neatly
> contained on their own cachelines.
>
> The locking did have a secondary effect of disabling
> interrupts around the cursor registers writes though.
> If we drop that then we open outselves up for sceduling
> delays and whatnot while on the middle of the register
> writes. That increases the chance of not all the register
> writes land during the same frame. For normal atomic
> commits this is not a concern as the vblank evade mechanism
> anyway disables interrupts around the update, but the legacy
> cursor codepath does not. Technically we should do a vblank
> evade there as well, but so far no one has bothered to hook
> that up. So in the meantime let's put an explicit local irq
> disable/enable around the legacy cursor update to keep the
> race window minimal.
>
> v2: local_irq_{disable,enable}() for legacy cursor ioctl
Guess, this will help our infamous atomic update evasion time exceeeded.
I think I've even checked with similar patch.
Good that its finally will make its way into kernel.
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_cursor.c | 20 ++++++++++----------
> 1 file changed, 10 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c b/drivers/gpu/drm/i915/display/intel_cursor.c
> index 2ade8fdd9bdd..b648be744cf2 100644
> --- a/drivers/gpu/drm/i915/display/intel_cursor.c
> +++ b/drivers/gpu/drm/i915/display/intel_cursor.c
> @@ -255,7 +255,6 @@ static void i845_cursor_update_arm(struct intel_plane *plane,
> {
> struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
> u32 cntl = 0, base = 0, pos = 0, size = 0;
> - unsigned long irqflags;
>
> if (plane_state && plane_state->uapi.visible) {
> unsigned int width = drm_rect_width(&plane_state->uapi.dst);
> @@ -270,8 +269,6 @@ static void i845_cursor_update_arm(struct intel_plane *plane,
> pos = intel_cursor_position(plane_state);
> }
>
> - spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
> -
> /* On these chipsets we can only modify the base/size/stride
> * whilst the cursor is disabled.
> */
> @@ -290,8 +287,6 @@ static void i845_cursor_update_arm(struct intel_plane *plane,
> } else {
> intel_de_write_fw(dev_priv, CURPOS(PIPE_A), pos);
> }
> -
> - spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> }
>
> static void i845_cursor_disable_arm(struct intel_plane *plane,
> @@ -492,7 +487,6 @@ static void i9xx_cursor_update_arm(struct intel_plane *plane,
> struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
> enum pipe pipe = plane->pipe;
> u32 cntl = 0, base = 0, pos = 0, fbc_ctl = 0;
> - unsigned long irqflags;
>
> if (plane_state && plane_state->uapi.visible) {
> int width = drm_rect_width(&plane_state->uapi.dst);
> @@ -508,8 +502,6 @@ static void i9xx_cursor_update_arm(struct intel_plane *plane,
> pos = intel_cursor_position(plane_state);
> }
>
> - spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
> -
> /*
> * On some platforms writing CURCNTR first will also
> * cause CURPOS to be armed by the CURBASE write.
> @@ -555,8 +547,6 @@ static void i9xx_cursor_update_arm(struct intel_plane *plane,
> intel_de_write_fw(dev_priv, CURPOS(pipe), pos);
> intel_de_write_fw(dev_priv, CURBASE(pipe), base);
> }
> -
> - spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> }
>
> static void i9xx_cursor_disable_arm(struct intel_plane *plane,
> @@ -715,6 +705,14 @@ intel_legacy_cursor_update(struct drm_plane *_plane,
> */
> crtc_state->active_planes = new_crtc_state->active_planes;
>
> + /*
> + * Technically we should do a vblank evasion here to make
> + * sure all the cursor registers update on the same frame.
> + * For now just make sure the register writes happen as
> + * quickly as possible to minimize the race window.
> + */
> + local_irq_disable();
> +
> if (new_plane_state->uapi.visible) {
> intel_plane_update_noarm(plane, crtc_state, new_plane_state);
> intel_plane_update_arm(plane, crtc_state, new_plane_state);
> @@ -722,6 +720,8 @@ intel_legacy_cursor_update(struct drm_plane *_plane,
> intel_plane_disable_arm(plane, crtc_state);
> }
>
> + local_irq_enable();
> +
> intel_plane_unpin_fb(old_plane_state);
>
> out_free:
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [Intel-gfx] [PATCH v2 2/5] drm/i915: Make skl+ universal plane registers unlocked
2022-02-10 6:24 ` [Intel-gfx] [PATCH v2 2/5] drm/i915: Make skl+ universal plane registers unlocked Ville Syrjala
@ 2022-02-24 14:38 ` Lisovskiy, Stanislav
0 siblings, 0 replies; 19+ messages in thread
From: Lisovskiy, Stanislav @ 2022-02-24 14:38 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
On Thu, Feb 10, 2022 at 08:24:00AM +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Drop the locks around most universal plane register writes.
> The lock isn't needed since each plane's register are neatly
> contained on their own cachelines.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
> ---
> .../drm/i915/display/skl_universal_plane.c | 35 -------------------
> 1 file changed, 35 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> index 5b1b089e045d..db9e31c12169 100644
> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> @@ -615,16 +615,11 @@ skl_plane_disable_arm(struct intel_plane *plane,
> struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
> enum plane_id plane_id = plane->id;
> enum pipe pipe = plane->pipe;
> - unsigned long irqflags;
> -
> - spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
>
> skl_write_plane_wm(plane, crtc_state);
>
> intel_de_write_fw(dev_priv, PLANE_CTL(pipe, plane_id), 0);
> intel_de_write_fw(dev_priv, PLANE_SURF(pipe, plane_id), 0);
> -
> - spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> }
>
> static void
> @@ -634,9 +629,6 @@ icl_plane_disable_arm(struct intel_plane *plane,
> struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
> enum plane_id plane_id = plane->id;
> enum pipe pipe = plane->pipe;
> - unsigned long irqflags;
> -
> - spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
>
> if (icl_is_hdr_plane(dev_priv, plane_id))
> intel_de_write_fw(dev_priv, PLANE_CUS_CTL(pipe, plane_id), 0);
> @@ -646,8 +638,6 @@ icl_plane_disable_arm(struct intel_plane *plane,
> intel_psr2_disable_plane_sel_fetch(plane, crtc_state);
> intel_de_write_fw(dev_priv, PLANE_CTL(pipe, plane_id), 0);
> intel_de_write_fw(dev_priv, PLANE_SURF(pipe, plane_id), 0);
> -
> - spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> }
>
> static bool
> @@ -1106,7 +1096,6 @@ skl_plane_update_noarm(struct intel_plane *plane,
> int crtc_y = plane_state->uapi.dst.y1;
> u32 src_w = drm_rect_width(&plane_state->uapi.src) >> 16;
> u32 src_h = drm_rect_height(&plane_state->uapi.src) >> 16;
> - unsigned long irqflags;
>
> /* The scaler will handle the output position */
> if (plane_state->scaler_id >= 0) {
> @@ -1114,8 +1103,6 @@ skl_plane_update_noarm(struct intel_plane *plane,
> crtc_y = 0;
> }
>
> - spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
> -
> intel_de_write_fw(dev_priv, PLANE_STRIDE(pipe, plane_id),
> PLANE_STRIDE_(stride));
> intel_de_write_fw(dev_priv, PLANE_POS(pipe, plane_id),
> @@ -1124,8 +1111,6 @@ skl_plane_update_noarm(struct intel_plane *plane,
> PLANE_HEIGHT(src_h - 1) | PLANE_WIDTH(src_w - 1));
>
> skl_write_plane_wm(plane, crtc_state);
> -
> - spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> }
>
> static void
> @@ -1139,7 +1124,6 @@ skl_plane_update_arm(struct intel_plane *plane,
> u32 x = plane_state->view.color_plane[0].x;
> u32 y = plane_state->view.color_plane[0].y;
> u32 plane_ctl, plane_color_ctl = 0;
> - unsigned long irqflags;
>
> plane_ctl = plane_state->ctl |
> skl_plane_ctl_crtc(crtc_state);
> @@ -1148,8 +1132,6 @@ skl_plane_update_arm(struct intel_plane *plane,
> plane_color_ctl = plane_state->color_ctl |
> glk_plane_color_ctl_crtc(crtc_state);
>
> - spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
> -
> intel_de_write_fw(dev_priv, PLANE_KEYVAL(pipe, plane_id), skl_plane_keyval(plane_state));
> intel_de_write_fw(dev_priv, PLANE_KEYMSK(pipe, plane_id), skl_plane_keymsk(plane_state));
> intel_de_write_fw(dev_priv, PLANE_KEYMAX(pipe, plane_id), skl_plane_keymax(plane_state));
> @@ -1185,8 +1167,6 @@ skl_plane_update_arm(struct intel_plane *plane,
> intel_de_write_fw(dev_priv, PLANE_CTL(pipe, plane_id), plane_ctl);
> intel_de_write_fw(dev_priv, PLANE_SURF(pipe, plane_id),
> skl_plane_surf(plane_state, 0));
> -
> - spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> }
>
> static void
> @@ -1207,7 +1187,6 @@ icl_plane_update_noarm(struct intel_plane *plane,
> int src_w = drm_rect_width(&plane_state->uapi.src) >> 16;
> int src_h = drm_rect_height(&plane_state->uapi.src) >> 16;
> u32 plane_color_ctl;
> - unsigned long irqflags;
>
> plane_color_ctl = plane_state->color_ctl |
> glk_plane_color_ctl_crtc(crtc_state);
> @@ -1218,8 +1197,6 @@ icl_plane_update_noarm(struct intel_plane *plane,
> crtc_y = 0;
> }
>
> - spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
> -
> intel_de_write_fw(dev_priv, PLANE_STRIDE(pipe, plane_id),
> PLANE_STRIDE_(stride));
> intel_de_write_fw(dev_priv, PLANE_POS(pipe, plane_id),
> @@ -1263,8 +1240,6 @@ icl_plane_update_noarm(struct intel_plane *plane,
> icl_plane_csc_load_black(plane);
>
> intel_psr2_program_plane_sel_fetch(plane, crtc_state, plane_state, color_plane);
> -
> - spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> }
>
> static void
> @@ -1277,13 +1252,10 @@ icl_plane_update_arm(struct intel_plane *plane,
> enum pipe pipe = plane->pipe;
> int color_plane = icl_plane_color_plane(plane_state);
> u32 plane_ctl;
> - unsigned long irqflags;
>
> plane_ctl = plane_state->ctl |
> skl_plane_ctl_crtc(crtc_state);
>
> - spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
> -
> /*
> * Enable the scaler before the plane so that we don't
> * get a catastrophic underrun even if the two operations
> @@ -1302,8 +1274,6 @@ icl_plane_update_arm(struct intel_plane *plane,
> intel_de_write_fw(dev_priv, PLANE_CTL(pipe, plane_id), plane_ctl);
> intel_de_write_fw(dev_priv, PLANE_SURF(pipe, plane_id),
> skl_plane_surf(plane_state, color_plane));
> -
> - spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> }
>
> static void
> @@ -1313,7 +1283,6 @@ skl_plane_async_flip(struct intel_plane *plane,
> bool async_flip)
> {
> struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
> - unsigned long irqflags;
> enum plane_id plane_id = plane->id;
> enum pipe pipe = plane->pipe;
> u32 plane_ctl = plane_state->ctl;
> @@ -1323,13 +1292,9 @@ skl_plane_async_flip(struct intel_plane *plane,
> if (async_flip)
> plane_ctl |= PLANE_CTL_ASYNC_FLIP;
>
> - spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
> -
> intel_de_write_fw(dev_priv, PLANE_CTL(pipe, plane_id), plane_ctl);
> intel_de_write_fw(dev_priv, PLANE_SURF(pipe, plane_id),
> skl_plane_surf(plane_state, 0));
> -
> - spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> }
>
> static bool intel_format_is_p01x(u32 format)
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 19+ messages in thread
* Re: [Intel-gfx] [PATCH v3 3/5] drm/i915: Make cursor plane registers unlocked
2022-02-24 14:37 ` Lisovskiy, Stanislav
@ 2022-02-24 17:00 ` Ville Syrjälä
0 siblings, 0 replies; 19+ messages in thread
From: Ville Syrjälä @ 2022-02-24 17:00 UTC (permalink / raw)
To: Lisovskiy, Stanislav; +Cc: intel-gfx
On Thu, Feb 24, 2022 at 04:37:03PM +0200, Lisovskiy, Stanislav wrote:
> On Fri, Feb 11, 2022 at 11:26:04AM +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > Drop the locks around cursor plane register writes. The
> > lock isn't needed since each plane's register are neatly
> > contained on their own cachelines.
> >
> > The locking did have a secondary effect of disabling
> > interrupts around the cursor registers writes though.
> > If we drop that then we open outselves up for sceduling
> > delays and whatnot while on the middle of the register
> > writes. That increases the chance of not all the register
> > writes land during the same frame. For normal atomic
> > commits this is not a concern as the vblank evade mechanism
> > anyway disables interrupts around the update, but the legacy
> > cursor codepath does not. Technically we should do a vblank
> > evade there as well, but so far no one has bothered to hook
> > that up. So in the meantime let's put an explicit local irq
> > disable/enable around the legacy cursor update to keep the
> > race window minimal.
> >
> > v2: local_irq_{disable,enable}() for legacy cursor ioctl
>
> Guess, this will help our infamous atomic update evasion time exceeeded.
> I think I've even checked with similar patch.
> Good that its finally will make its way into kernel.
Yeah. I also sent a new series that split color management
to noarm+arm and drops some more usless locks.
After those I think the TODO list is down to:
- cursor noarm+arm split
- scaler/pfit noarm+arm split
- random locked register accesses during fastsea,
and maybe a few are still left in pure plane commits as well
> Reviewed-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Thanks.
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 19+ messages in thread
end of thread, other threads:[~2022-02-24 17:00 UTC | newest]
Thread overview: 19+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-02-10 6:23 [Intel-gfx] [PATCH v2 0/5] drm/i915: Futher optimize plane updates Ville Syrjala
2022-02-10 6:23 ` [Intel-gfx] [PATCH v2 1/5] drm/i915: Optimize icl+ universal plane programming Ville Syrjala
2022-02-21 11:21 ` Lisovskiy, Stanislav
2022-02-10 6:24 ` [Intel-gfx] [PATCH v2 2/5] drm/i915: Make skl+ universal plane registers unlocked Ville Syrjala
2022-02-24 14:38 ` Lisovskiy, Stanislav
2022-02-10 6:24 ` [Intel-gfx] [PATCH v2 3/5] drm/i915: Make cursor " Ville Syrjala
2022-02-11 9:26 ` [Intel-gfx] [PATCH v3 " Ville Syrjala
2022-02-24 14:37 ` Lisovskiy, Stanislav
2022-02-24 17:00 ` Ville Syrjälä
2022-02-10 6:24 ` [Intel-gfx] [PATCH v2 4/5] drm/i915: Make most pre-skl primary " Ville Syrjala
2022-02-21 11:19 ` Lisovskiy, Stanislav
2022-02-10 6:24 ` [Intel-gfx] [PATCH v2 5/5] drm/i915: Make pre-skl sprite " Ville Syrjala
2022-02-21 11:18 ` Lisovskiy, Stanislav
2022-02-10 7:01 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Futher optimize plane updates (rev3) Patchwork
2022-02-10 8:15 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-02-10 12:08 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Futher optimize plane updates (rev4) Patchwork
2022-02-10 14:33 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-02-11 18:29 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Futher optimize plane updates (rev5) Patchwork
2022-02-11 22:26 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
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