[PATCH V3 0/4] crypto: Add Xilinx ZynqMP SHA3 driver support

From: Harsha <harsha.harsha@xilinx.com>
To: <herbert@gondor.apana.org.au>, <davem@davemloft.net>,
	<linux-crypto@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>, <michals@xilinx.com>
Cc: <saratcha@xilinx.com>, <harshj@xilinx.com>, <git@xilinx.com>,
	Harsha <harsha.harsha@xilinx.com>
Subject: [PATCH V3 0/4] crypto: Add Xilinx ZynqMP SHA3 driver support
Date: Wed, 23 Feb 2022 16:05:00 +0530	[thread overview]
Message-ID: <1645612504-3047-1-git-send-email-harsha.harsha@xilinx.com> (raw)

This patch set does the following:
  - Updates the Makefile for xilinx subdirectory
  - Adds communication layer support for sha_hash in zynqmp.c
  - Adds Xilinx ZynqMP driver for SHA3 Algorithm
  - Updates the list of MAINTAINERS

Following tests have been done for the driver:
 - Enabled kernel self tests and extra run-time crypto self tests
 - Tested SHA hash computation for different sizes of data using
   userspace application
 - Tested SHA hash computation using multiple updates of data using
   userspace application
 - Tested parallel hash computation
 - Tested using the tcrypt module

V3 changes:
Added details of tests in cover letter
Added SOB for previous poster of RFC patch
Removed module_platform_driver in 3/4
Used memzero_explicit instead of memset in 3/4

V2 changes:
- Removed dependency on COMPILE_TEST in 3/4
- Rebased this patchset on latest Cryptodev-2.6 tree which fixed
below kernel robot warning
   In file included from ./arch/s390/include/generated/asm/cacheflush.h:1,
                    from drivers/crypto/xilinx/zynqmp-sha.c:6:
include/asm-generic/cacheflush.h:53:46: warning: 'struct folio' declared
inside parameter list will not be visible outside of this definition
or declaration
      53 | static inline void flush_dcache_folio(struct folio *folio) { }
         |
- Included linux/cacheflush.h instead of asm/cacheflush.h in 3/4
 
V1 changes:
- Converted RFC patch to PATCH
- Updated zynqmp-sha driver so that it can be self discovered 
- Removed patch 3/6 and 4/6 as they added support for device tree
- Substituted hw with hardware in drivers/crypto/Kconfig


Harsha (4):
  drivers: crypto: Updated Makefile for xilinx subdirectory
  firmware: xilinx: Add ZynqMP SHA API for SHA3 functionality
  crypto: xilinx: Add Xilinx SHA3 driver
  MAINTAINERS: Add maintainer for Xilinx ZynqMP SHA3 driver

 MAINTAINERS                          |   5 +
 drivers/crypto/Kconfig               |  10 ++
 drivers/crypto/Makefile              |   2 +-
 drivers/crypto/xilinx/Makefile       |   1 +
 drivers/crypto/xilinx/zynqmp-sha.c   | 283 +++++++++++++++++++++++++++++++++++
 drivers/firmware/xilinx/zynqmp.c     |  26 ++++
 include/linux/firmware/xlnx-zynqmp.h |   8 +
 7 files changed, 334 insertions(+), 1 deletion(-)
 create mode 100644 drivers/crypto/xilinx/zynqmp-sha.c

-- 
1.8.2.1