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* [igt-dev] [PATCH i-g-t v4] tests/amdgpu: new test for Freesync-Video Mode
@ 2022-03-05  4:12 Solomon Chiu
  2022-03-05  5:02 ` [igt-dev] ✓ Fi.CI.BAT: success for tests/amdgpu: new test for Freesync-Video Mode (rev5) Patchwork
                   ` (2 more replies)
  0 siblings, 3 replies; 4+ messages in thread
From: Solomon Chiu @ 2022-03-05  4:12 UTC (permalink / raw)
  To: igt-dev

This tests transition between normal and FreeSync-Video modes and
measures the FPS to ensure vblank events are happening at the
expected rate. A SMPTE test pattern is displayed in the first mode,
and then a simple animation is displayed in the second mode, in
order to help the user to check if there are blanking with mode
transition.

v4: Rebase and refine commit message
v3: Remove conditional debugging calls and some comments.
v2: Rebase
---
 tests/amdgpu/amd_freesync_video_mode.c | 872 +++++++++++++++++++++++++
 1 file changed, 872 insertions(+)
 create mode 100644 tests/amdgpu/amd_freesync_video_mode.c

diff --git a/tests/amdgpu/amd_freesync_video_mode.c b/tests/amdgpu/amd_freesync_video_mode.c
new file mode 100644
index 00000000..579d2443
--- /dev/null
+++ b/tests/amdgpu/amd_freesync_video_mode.c
@@ -0,0 +1,872 @@
+/*
+ * Copyright 2022 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ */
+
+#include "igt.h"
+#include "sw_sync.h"
+#include <fcntl.h>
+#include <signal.h>
+
+#define NSECS_PER_SEC		(1000000000ull)
+#define TEST_DURATION_NS	(10 * NSECS_PER_SEC)
+
+#define BYTES_PER_PIXEL         4
+#define MK_COLOR(r, g, b)	((0 << 24) | (r << 16) | (g << 8) | b)
+
+/*
+ * The Display Core of amdgpu will add a set of modes derived from the
+ * base FreeSync video mode into the corresponding connector’s mode list based
+ * on commonly used refresh rates and VRR range of the connected display.
+ * From the userspace's perspective, they can see a seamless mode change
+ * experience when the change between different refresh rates under the same
+ * resolution. Additionally, userspace applications such as Video playback can
+ * read this modeset list and change the refresh rate based on the video frame
+ * rate. Finally, the userspace can also derive an appropriate mode for
+ * a particular refresh rate based on the FreeSync Mode and add it to the
+ * connector’s mode list.
+*/
+IGT_TEST_DESCRIPTION("This tests transition between normal and FreeSync-Video"
+		     "modes and measures the FPS to ensure vblank events are"
+		     "happening at the expected rate.");
+typedef struct range {
+	unsigned int min;
+	unsigned int max;
+} range_t;
+
+typedef struct data {
+	int		drm_fd;
+	igt_display_t	display;
+	igt_plane_t	*primary;
+	igt_fb_t	fbs[2];
+	uint32_t	*fb_mem[2];
+	int		front;
+	bool		fb_initialized;
+	range_t		range;
+
+	drmModeConnector *connector;
+	drmModeModeInfo *modes;
+	int		count_modes;
+
+	uint32_t	preferred_mode_index;
+        uint32_t	base_mode_index;
+	uint32_t	hdisplay;
+	uint32_t	vdisplay;
+} data_t;
+
+struct fsv_sprite {
+        uint32_t        w;
+	uint32_t	h;
+        uint32_t        *data;
+};
+static struct fsv_sprite cicle_sprite;
+
+enum {
+        FSV_PREFERRED_MODE,
+        FSV_BASE_MODE,
+        FSV_FREESYNC_VIDEO_MODE,
+        FSV_NON_FREESYNC_VIDEO_MODE,
+};
+
+enum {
+	ANIM_TYPE_SMPTE,
+	ANIM_TYPE_CIRCLE_WAVE,
+
+	ANIM_TYPE_COUNT,
+};
+
+enum {
+	SCENE_BASE_MODE_TO_VARIOUS_FSV_MODE ,
+	SCENE_LOWER_FSV_MODE_TO_HIGHER_FSV_MODE ,
+	SCENE_NON_FSV_MODE_TO_FSV_MODE ,
+	SCENE_BASE_MODE_TO_CUSTUM_MODE ,
+	SCENE_NON_FSV_MODE_TO_NON_FSV_MODE,
+
+	SCENE_COUNT,
+};
+
+/*----------------------------------------------------------------------------*/
+
+/* Converts a timespec structure to nanoseconds. */
+static uint64_t timespec_to_ns(struct timespec *ts)
+{
+	return ts->tv_sec * NSECS_PER_SEC + ts->tv_nsec;
+}
+
+/*
+ * Gets an event from DRM and returns its timestamp in nanoseconds.
+ * Asserts if the event from DRM is not matched with requested one.
+ *
+ * This blocks until the event is received.
+ */
+static uint64_t get_kernel_event_ns(data_t *data, uint32_t event)
+{
+	struct drm_event_vblank ev;
+
+	igt_set_timeout(1, "Waiting for an event\n");
+	igt_assert_eq(read(data->drm_fd, &ev, sizeof(ev)), sizeof(ev));
+	igt_assert_eq(ev.base.type, event);
+	igt_reset_timeout();
+
+	return ev.tv_sec * NSECS_PER_SEC + ev.tv_usec * 1000ull;
+}
+
+/*
+ * Returns the current CLOCK_MONOTONIC time in nanoseconds.
+ * The regular IGT helpers can't be used since they default to
+ * CLOCK_MONOTONIC_RAW - which isn't what the kernel uses for its timestamps.
+ */
+static uint64_t get_time_ns(void)
+{
+	struct timespec ts;
+	memset(&ts, 0, sizeof(ts));
+	errno = 0;
+
+	if (!clock_gettime(CLOCK_MONOTONIC, &ts))
+		return timespec_to_ns(&ts);
+
+	igt_warn("Could not read monotonic time: %s\n", strerror(errno));
+	igt_fail(-errno);
+
+	return 0;
+}
+
+static void fbmem_draw_rect(
+		uint32_t *fbmem,
+		uint32_t stride,
+		uint32_t x,
+		uint32_t y,
+		uint32_t w,
+		uint32_t h,
+		uint32_t color)
+{
+        uint32_t offset = y * stride + x;
+
+        for (uint32_t j = 0; j < h; j++) {
+                for (uint32_t i = 0; i < w; i++) {
+                        fbmem[offset + i] = color;
+                }
+                offset += stride;
+        }
+}
+
+static void fbmem_draw_smpte_pattern(uint32_t *fbmem, int width, int height)
+{
+	uint32_t x, y;
+        uint32_t colors_top[] = {
+                MK_COLOR(192, 192, 192), /* grey */
+                MK_COLOR(192, 192, 0),   /* yellow */
+                MK_COLOR(0, 192, 192),   /* cyan */
+                MK_COLOR(0, 192, 0),     /* green */
+                MK_COLOR(192, 0, 192),   /* magenta */
+                MK_COLOR(192, 0, 0),     /* red */
+                MK_COLOR(0, 0, 192),     /* blue */
+        };
+        uint32_t colors_middle[] = {
+                MK_COLOR(0, 0, 192),     /* blue */
+                MK_COLOR(19, 19, 19),    /* black */
+                MK_COLOR(192, 0, 192),   /* magenta */
+                MK_COLOR(19, 19, 19),    /* black */
+                MK_COLOR(0, 192, 192),   /* cyan */
+                MK_COLOR(19, 19, 19),    /* black */
+                MK_COLOR(192, 192, 192), /* grey */
+        };
+        uint32_t colors_bottom[] = {
+                MK_COLOR(0, 33, 76),     /* in-phase */
+                MK_COLOR(255, 255, 255), /* super white */
+                MK_COLOR(50, 0, 106),    /* quadrature */
+                MK_COLOR(19, 19, 19),    /* black */
+                MK_COLOR(9, 9, 9),       /* 3.5% */
+                MK_COLOR(19, 19, 19),    /* 7.5% */
+                MK_COLOR(29, 29, 29),    /* 11.5% */
+                MK_COLOR(19, 19, 19),    /* black */
+        };
+
+        for (y = 0; y < height * 6 / 9; ++y) {
+                for (x = 0; x < width; ++x)
+                        fbmem[x] =
+                                colors_top[x * 7 / width];
+                fbmem += width;
+        }
+
+        for (; y < height * 7 / 9; ++y) {
+                for (x = 0; x < width; ++x)
+                        fbmem[x] =
+                                colors_middle[x * 7 / width];
+                fbmem += width;
+        }
+
+        for (; y < height; ++y) {
+                for (x = 0; x < width * 5 / 7; ++x)
+                        fbmem[x] =
+                                colors_bottom[x * 4 / (width * 5 / 7)];
+                for (; x < width * 6 / 7; ++x)
+                        fbmem[x] =
+                                colors_bottom[(x - width * 5 / 7) * 3
+                                              / (width / 7) + 4];
+                for (; x < width; ++x)
+                        fbmem[x] = colors_bottom[7];
+                fbmem += width;
+        }
+}
+
+static void sprite_init(
+		struct fsv_sprite *sprite,
+		uint32_t w,
+		uint32_t h)
+{
+        igt_assert(sprite);
+
+        sprite->data = (uint32_t *)malloc(w * h * BYTES_PER_PIXEL);
+        igt_assert(sprite->data);
+
+        sprite->w = w;
+        sprite->h = h;
+}
+
+static void sprite_paste(
+		uint32_t *fbmem,
+		uint32_t fb_stride,
+		struct fsv_sprite *sprite,
+		uint32_t x,
+		uint32_t y)
+{
+        uint32_t fb_offset = y * fb_stride + x;
+        uint32_t sprite_offset = 0;
+
+        for (int j = 0; j < sprite->h; j++) {
+                memcpy(fbmem + fb_offset, sprite->data + sprite_offset, sprite->w * 4);
+                sprite_offset += sprite->w;
+                fb_offset += fb_stride;
+        }
+}
+
+static void sprite_draw_rect(
+		struct fsv_sprite *sprite,
+		uint32_t x,
+		uint32_t y,
+		uint32_t w,
+		uint32_t h,
+		uint32_t color)
+{
+        uint32_t offset = y * sprite->w + x;
+        uint32_t *addr = (uint32_t *)sprite->data;
+
+        for (uint32_t j = 0; j < h; j++) {
+                addr = (uint32_t *)(sprite->data + offset);
+                for (uint32_t i = 0; i < w; i++) {
+                        addr[i] = color;
+                }
+                offset += sprite->w;
+        }
+}
+
+/* drawing horizontal line in the sprite */
+static void sprite_draw_hline(
+		struct fsv_sprite *sprite,
+		uint32_t x1,
+		uint32_t y1,
+		uint32_t x2,
+		uint32_t color)
+{
+	uint32_t offset = y1 * sprite->w;
+        for (int x = x1 ; x < x2; x++) {
+                sprite->data[offset + x] = color;
+        }
+}
+
+/* drawing filled circle with Bresenham's algorithm */
+static void sprite_draw_circle(
+		struct fsv_sprite *sprite,
+		uint32_t x,
+		uint32_t y,
+		uint32_t radius,
+		uint32_t color)
+{
+        int offsetx = 0, offsety = radius, d = radius -1;
+
+        while (offsety >= offsetx) {
+                sprite_draw_hline(sprite, x - offsety, y + offsetx,
+                                x + offsety, color);
+                sprite_draw_hline(sprite, x - offsetx, y + offsety,
+                                x + offsetx, color);
+                sprite_draw_hline(sprite, x - offsetx, y - offsety,
+                                x + offsetx, color);
+                sprite_draw_hline(sprite, x - offsety, y - offsetx,
+                                x + offsety, color);
+
+                if (d >= 2 * offsetx) {
+                        d -= 2 * offsetx + 1;
+                        offsetx += 1;
+                } else if (d < 2 * (radius - offsety)) {
+                        d += 2 * offsety - 1;
+                        offsety -= 1;
+                } else {
+                        d += 2 * (offsety - offsetx - 1);
+                        offsety -= 1;
+                        offsetx += 1;
+                }
+        }
+}
+
+static void sprite_anim_init(void)
+{
+        memset(&cicle_sprite, 0, sizeof(cicle_sprite));
+        sprite_init(&cicle_sprite, 100, 100);
+
+        sprite_draw_rect(&cicle_sprite, 0, 0, 100, 100, MK_COLOR(128, 128, 128));
+	/* draw filled circle with center (50, 50), radius 50. */
+        sprite_draw_circle(&cicle_sprite, 50, 50, 50, MK_COLOR(0, 0, 255));
+}
+
+static void sprite_anim(data_t *data, uint32_t *addr)
+{
+        struct timeval tv1, tv2, tv_delta;
+        uint64_t frame_ns = get_time_ns();
+        double now = frame_ns / (double)NSECS_PER_SEC;
+
+        gettimeofday(&tv1, NULL);
+
+        fbmem_draw_rect(addr, data->hdisplay, 0, 0,
+			data->hdisplay, data->vdisplay, MK_COLOR(128, 128, 128));
+	/* red rectangle for checking tearing effect*/
+        if (data->front) {
+                fbmem_draw_rect(addr, data->hdisplay, 0, 0,
+			30, data->vdisplay, MK_COLOR(191, 0, 0));
+        }
+
+	/* draw 16 filled circles */
+        for (int i = 0; i < 16; ++i) {
+                double tv = now + i * 0.25;
+                float x, y;
+                x = data->hdisplay - 10.0f - 118.0f * i - 100.0f;
+                y = data->vdisplay * 0.5f + cos(tv) * data->vdisplay * 0.35;
+                sprite_paste(addr, data->hdisplay, &cicle_sprite, (uint32_t)x, (uint32_t)y);
+        }
+
+        gettimeofday(&tv2, NULL);
+        timersub(&tv2, &tv1, &tv_delta);
+
+        igt_debug("time of drawing: %ld ms\n", tv_delta.tv_usec / 1000);
+}
+
+/*----------------------------------------------------------------------------*/
+
+/* The freesync video modes is derived from the base mode(the mode with the
+   highest clock rate, and has the same resolution with preferred mode) by
+   amdgpu driver. They have the same clock rate with base mode, and the
+   type of mode has been set as DRM_MODE_TYPE_DRIVER"
+*/
+static bool is_freesync_video_mode(data_t *data, drmModeModeInfo *mode)
+{
+        drmModeModeInfo *base_mode = &data->modes[data->base_mode_index];
+        uint32_t bm_clock = base_mode->clock;
+
+        if (    mode->hdisplay == data->hdisplay &&
+                mode->vdisplay == data->vdisplay &&
+                mode->clock == bm_clock &&
+		mode->type & DRM_MODE_TYPE_DRIVER) {
+                return true;
+        }
+
+        return false;
+}
+
+static drmModeModeInfo* select_mode(
+        data_t *data,
+        uint32_t mode_type,
+        int refresh_rate)
+{
+	int i;
+        int index;
+        drmModeModeInfo *mode = NULL;
+	igt_debug("select_mode: type=%d, refresh_rate=%d\n", mode_type, refresh_rate);
+
+        switch (mode_type) {
+        case FSV_BASE_MODE:
+                index = data->base_mode_index;
+                mode = &data->modes[index];
+                break;
+
+        case FSV_PREFERRED_MODE:
+                index = data->preferred_mode_index;
+                mode = &data->modes[index];
+                break;
+
+        case FSV_FREESYNC_VIDEO_MODE:
+                for (i = 0; i < data->count_modes; i++) {
+                        mode = &data->modes[i];
+                        if (    mode->vrefresh == refresh_rate &&
+                                is_freesync_video_mode(data, mode)) {
+                                break;
+                        }
+                }
+		if (i == data->count_modes)
+			mode = NULL;
+                break;
+
+        case FSV_NON_FREESYNC_VIDEO_MODE:
+                for (i = 0; i < data->count_modes; i++) {
+                        mode = &data->modes[i];
+                        if (    mode->vrefresh == refresh_rate &&
+                                !is_freesync_video_mode(data, mode)) {
+                                break;
+                        }
+                }
+		if (i == data->count_modes)
+			mode = NULL;
+                break;
+
+        default:
+                igt_assert("Cannot find mode with specified rate and type.");
+                break;
+        }
+
+	if (mode) {
+		igt_info("selected mode:\n");
+		kmstest_dump_mode(mode);
+	}
+
+        return mode;
+}
+
+static int prepare_custom_mode(
+        data_t *data,
+	drmModeModeInfo *custom_mode,
+	uint32_t refresh_rate)
+{
+	uint64_t num, den;
+	uint64_t target_vtotal, target_vtotal_diff;
+	drmModeModeInfo *base_mode;
+
+	igt_info("prepare custom mode:\n");
+
+	base_mode = &data->modes[data->base_mode_index];
+	if (base_mode->vrefresh < refresh_rate) {
+		igt_warn("The given refresh rate is large than base mode's one:" \
+				" base_mode->vrefresh=%d, refresh_rate=%u\n",
+				base_mode->vrefresh, refresh_rate);
+		return -1;
+	}
+
+	if (refresh_rate < data->range.min ||
+			refresh_rate > data->range.max) {
+		igt_warn("The given refresh rate(%u) should be between the rage of: min=%d, max=%d\n",
+				refresh_rate, data->range.min, data->range.max);
+		return -1;
+	}
+
+	num = (unsigned long long)base_mode->clock * 1000 * 1000;
+	den = refresh_rate * 1000 * (unsigned long long)base_mode->htotal;
+	target_vtotal = num / den;
+	target_vtotal_diff = target_vtotal - base_mode->vtotal;
+	igt_debug("num=%lu, den=%lu, " \
+                  "target_vtotal=%lu, target_vtotal_diff=%lu, base_mode->vtotal=%d\n",
+		  num, den, target_vtotal, target_vtotal_diff, base_mode->vtotal
+		);
+
+	/* Check for illegal modes */
+	if (base_mode->vsync_start + target_vtotal_diff < base_mode->vdisplay ||
+			base_mode->vsync_end + target_vtotal_diff < base_mode->vsync_start ||
+			base_mode->vtotal + target_vtotal_diff < base_mode->vsync_end)
+		return -1;
+
+	*custom_mode = *base_mode;
+	custom_mode->vtotal += (uint16_t)target_vtotal_diff;
+	custom_mode->vsync_start += (uint16_t)target_vtotal_diff;
+	custom_mode->vsync_end += (uint16_t)target_vtotal_diff;
+	custom_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
+	custom_mode->type |= DRM_MODE_TYPE_DRIVER;
+	custom_mode->vrefresh = refresh_rate;
+
+	igt_info("custom mode:\n");
+	kmstest_dump_mode(custom_mode);
+
+	return 0;
+}
+
+/* Returns the rate duration in nanoseconds for the given refresh rate. */
+static uint64_t nsec_per_frame(uint64_t refresh)
+{
+	return NSECS_PER_SEC / refresh;
+}
+
+/* Read min and max vrr range from the connector debugfs. */
+static range_t
+get_vrr_range(data_t *data, igt_output_t *output)
+{
+	char buf[256];
+	char *start_loc;
+	int fd, res;
+	range_t range;
+
+	fd = igt_debugfs_connector_dir(data->drm_fd, output->name, O_RDONLY);
+	igt_assert(fd >= 0);
+
+	res = igt_debugfs_simple_read(fd, "vrr_range", buf, sizeof(buf));
+	igt_require(res > 0);
+
+	close(fd);
+
+	igt_assert(start_loc = strstr(buf, "Min: "));
+	igt_assert_eq(sscanf(start_loc, "Min: %u", &range.min), 1);
+
+	igt_assert(start_loc = strstr(buf, "Max: "));
+	igt_assert_eq(sscanf(start_loc, "Max: %u", &range.max), 1);
+
+	return range;
+}
+
+/* Returns true if an output supports VRR. */
+static bool has_vrr(igt_output_t *output)
+{
+	return igt_output_has_prop(output, IGT_CONNECTOR_VRR_CAPABLE) &&
+	       igt_output_get_prop(output, IGT_CONNECTOR_VRR_CAPABLE);
+}
+
+/* Toggles variable refresh rate on the pipe. */
+static void set_vrr_on_pipe(data_t *data, enum pipe pipe, bool enabled)
+{
+	igt_pipe_set_prop_value(&data->display, pipe, IGT_CRTC_VRR_ENABLED,
+				enabled);
+	igt_display_commit2(&data->display, COMMIT_ATOMIC);
+}
+
+static void prepare_test(
+		data_t *data,
+		igt_output_t *output,
+		enum pipe pipe,
+		drmModeModeInfo *mode)
+{
+	/* Reset output */
+	igt_display_reset(&data->display);
+	igt_output_set_pipe(output, pipe);
+
+	igt_output_override_mode(output, mode);
+
+	/* Prepare resources */
+	if (!data->fb_initialized) {
+		igt_create_fb(data->drm_fd, mode->hdisplay, mode->vdisplay,
+				DRM_FORMAT_XRGB8888, DRM_FORMAT_MOD_LINEAR, &data->fbs[0]);
+
+		igt_create_fb(data->drm_fd, mode->hdisplay, mode->vdisplay,
+				DRM_FORMAT_XRGB8888, DRM_FORMAT_MOD_LINEAR, &data->fbs[1]);
+		data->fb_mem[0] = igt_fb_map_buffer(data->drm_fd, &data->fbs[0]);
+		data->fb_mem[1] = igt_fb_map_buffer(data->drm_fd, &data->fbs[1]);
+		data->fb_initialized = true;
+	}
+
+	fbmem_draw_smpte_pattern(data->fb_mem[0], data->hdisplay, data->vdisplay);
+	fbmem_draw_smpte_pattern(data->fb_mem[1], data->hdisplay, data->vdisplay);
+
+	/* Take care of any required modesetting before the test begins. */
+	data->primary = igt_output_get_plane_type(output, DRM_PLANE_TYPE_PRIMARY);
+	igt_plane_set_fb(data->primary, &data->fbs[0]);
+
+	/* Clear vrr_enabled state before enabling it, because
+	 * it might be left enabled if the previous test fails.
+	 */
+	igt_pipe_set_prop_value(&data->display, pipe, IGT_CRTC_VRR_ENABLED, 0);
+
+	igt_display_commit2(&data->display, COMMIT_ATOMIC);
+}
+
+/* Performs an atomic non-blocking page-flip on a pipe. */
+static void
+do_flip(data_t *data)
+{
+	int ret;
+	igt_fb_t *fb = &(data->fbs[data->front]);
+
+	igt_set_timeout(1, "Scheduling page flip\n");
+	igt_plane_set_fb(data->primary, fb);
+
+	do {
+		ret = igt_display_try_commit_atomic(&data->display,
+				  DRM_MODE_ATOMIC_NONBLOCK |
+				  DRM_MODE_PAGE_FLIP_EVENT,
+				  data);
+	} while (ret == -EBUSY);
+
+	igt_assert_eq(ret, 0);
+	igt_reset_timeout();
+}
+
+/*
+ * Flips at the given rate and measures against the expected value.
+ * Returns the pass rate as a percentage from 0 - 100.
+ *
+ * The VRR API is quite flexible in terms of definition - the driver
+ * can arbitrarily restrict the bounds further than the absolute
+ * min and max range. But VRR is really about extending the flip
+ * to prevent stuttering or to match a source content rate.
+ */
+static uint32_t
+flip_and_measure(
+		data_t *data,
+		igt_output_t *output,
+		enum pipe pipe,
+		uint64_t interval_ns,
+		uint64_t duration_ns,
+		int anim_type)
+{
+	uint64_t start_ns, last_event_ns, target_ns;
+	uint32_t total_flip = 0, total_pass = 0;
+
+	/* Align with the flip completion event to speed up convergence. */
+	do_flip(data);
+	start_ns = last_event_ns = target_ns = get_kernel_event_ns(data,
+							DRM_EVENT_FLIP_COMPLETE);
+	igt_info("interval_ns=%lu\n", interval_ns);
+
+	for (;;) {
+		uint64_t event_ns;
+		int64_t diff_ns;
+
+		data->front = !data->front;
+		if (anim_type == ANIM_TYPE_CIRCLE_WAVE)
+			sprite_anim(data, data->fb_mem[data->front]);
+		do_flip(data);
+
+		/* We need to capture flip event instead of vblank event,
+		 * because vblank is triggered after each frame, but depending
+		 * on the vblank evasion time flip might or might not happen in
+		 * that same frame.
+		 */
+		event_ns = get_kernel_event_ns(data, DRM_EVENT_FLIP_COMPLETE);
+		igt_debug("event_ns - last_event_ns: %"PRIu64"\n",
+						(event_ns - last_event_ns));
+
+		/*
+		 * Check if the difference between the two flip timestamps
+		 * was within the required threshold from the expected rate.
+		 *
+		 * A ~50us threshold is arbitrary, but it's roughly the
+		 * difference between 144Hz and 143Hz which should give this
+		 * enough accuracy for most use cases.
+		 */
+		diff_ns = interval_ns;
+		diff_ns -= event_ns - last_event_ns;
+		if (llabs(diff_ns) < 50000ll)
+			total_pass += 1;
+
+		last_event_ns = event_ns;
+		total_flip += 1;
+
+		if (event_ns - start_ns > duration_ns)
+			break;
+	}
+
+	igt_info("Completed %u flips, %u were in threshold for (%llu Hz) %"PRIu64"ns.\n",
+		 total_flip, total_pass, (NSECS_PER_SEC / interval_ns), interval_ns);
+
+	return total_flip ? ((total_pass * 100) / total_flip) : 0;
+}
+
+static void init_data(data_t *data, igt_output_t *output) {
+	int i;
+	uint32_t pm_hdisplay, pm_vdisplay, max_clk = 0;
+	drmModeModeInfo *preferred_mode;
+	drmModeConnector *connector;
+
+	connector = data->connector = output->config.connector;
+	data->count_modes = connector->count_modes;
+	data->modes = (drmModeModeInfo *)malloc(sizeof(drmModeModeInfo) * data->count_modes);
+
+	for (i = 0; i < data->count_modes; i++) {
+		data->modes[i] = connector->modes[i];
+#ifdef FSV_DEBUG
+		igt_info("mode %d:", i);
+		kmstest_dump_mode(&data->modes[i]);
+#endif
+	}
+
+	/* searching the preferred mode */
+        for (i = 0; i < connector->count_modes; i++) {
+                drmModeModeInfo *mode = &connector->modes[i];
+
+                if (mode->type & DRM_MODE_TYPE_PREFERRED) {
+                        data->preferred_mode_index = i;
+			data->hdisplay = mode->hdisplay;
+			data->vdisplay = mode->vdisplay;
+			pm_hdisplay = preferred_mode->hdisplay;
+			pm_vdisplay = preferred_mode->vdisplay;
+			break;
+                }
+        }
+
+        /* searching the base mode; */
+        for (i = 0; i < connector->count_modes; i++) {
+                drmModeModeInfo *mode = &connector->modes[i];
+                if (mode->hdisplay == pm_hdisplay && mode->vdisplay == pm_vdisplay) {
+                        if (mode->clock > max_clk) {
+                                max_clk = mode->clock;
+                                data->base_mode_index = i;
+                        }
+                }
+        }
+        igt_info("preferred=%d, base=%d\n", data->preferred_mode_index, data->base_mode_index);
+
+        for (i = 0; i < connector->count_modes; i++) {
+                drmModeModeInfo *mode = &connector->modes[i];
+                if (is_freesync_video_mode(data, mode))
+                        igt_debug("mode[%d] is freesync video mode.\n", i);
+        }
+
+	data->range = get_vrr_range(data, output);
+}
+
+static void finish_test(data_t *data, enum pipe pipe, igt_output_t *output)
+{
+	set_vrr_on_pipe(data, pipe, 0);
+	igt_plane_set_fb(data->primary, NULL);
+	igt_output_set_pipe(output, PIPE_NONE);
+	igt_output_override_mode(output, NULL);
+	igt_display_commit2(&data->display, COMMIT_ATOMIC);
+
+	igt_fb_unmap_buffer(&data->fbs[1], data->fb_mem[1]);
+	igt_fb_unmap_buffer(&data->fbs[0], data->fb_mem[0]);
+	igt_remove_fb(data->drm_fd, &data->fbs[1]);
+	igt_remove_fb(data->drm_fd, &data->fbs[0]);
+}
+
+static void
+mode_transition(data_t *data, enum pipe pipe, igt_output_t *output, uint32_t scene)
+{
+	uint32_t result;
+	uint64_t interval;
+	drmModeModeInfo *mode_start = NULL, *mode_playback = NULL, mode_custom;
+
+	init_data(data, output);
+	sprite_anim_init();
+
+	igt_info("stage-1:\n");
+	switch(scene) {
+        case SCENE_BASE_MODE_TO_VARIOUS_FSV_MODE:
+		mode_start = select_mode(data, FSV_BASE_MODE, 0);
+                mode_playback  = select_mode(data, FSV_FREESYNC_VIDEO_MODE, 60);
+		break;
+        case SCENE_LOWER_FSV_MODE_TO_HIGHER_FSV_MODE:
+		mode_start = select_mode(data, FSV_FREESYNC_VIDEO_MODE, 60);
+                mode_playback = select_mode(data, FSV_FREESYNC_VIDEO_MODE, 120);
+		break;
+        case SCENE_NON_FSV_MODE_TO_FSV_MODE:
+		mode_start = select_mode(data, FSV_NON_FREESYNC_VIDEO_MODE, 60);
+                mode_playback = select_mode(data, FSV_FREESYNC_VIDEO_MODE, 60);
+		break;
+        case SCENE_BASE_MODE_TO_CUSTUM_MODE:
+		mode_start = select_mode(data, FSV_BASE_MODE, 0);
+		prepare_custom_mode(data, &mode_custom, 72);
+		mode_playback = &mode_custom;
+		break;
+	case SCENE_NON_FSV_MODE_TO_NON_FSV_MODE:
+		mode_start = select_mode(data, FSV_NON_FREESYNC_VIDEO_MODE, 120);
+		mode_playback = select_mode(data, FSV_NON_FREESYNC_VIDEO_MODE, 100);
+		break;
+	default:
+		igt_warn("Undefined test scene: %d", scene);
+		break;
+	}
+	igt_assert_f(mode_start && mode_playback,
+			"Failure on selecting mode with given type and refresh rate.\n");
+	prepare_test(data, output, pipe, mode_start);
+	interval = nsec_per_frame(mode_start->vrefresh) ;
+	set_vrr_on_pipe(data, pipe, 1);
+	result = flip_and_measure(data, output, pipe, interval, TEST_DURATION_NS, ANIM_TYPE_SMPTE);
+
+	igt_info("stage-2: simple animation as video playback\n");
+	prepare_test(data, output, pipe, mode_playback);
+	interval = nsec_per_frame(mode_playback->vrefresh) ;
+	result = flip_and_measure(data, output, pipe, interval, TEST_DURATION_NS, ANIM_TYPE_CIRCLE_WAVE);
+	igt_assert_f(result > 90, "Target refresh rate not meet(result=%d%%\n", result);
+
+	finish_test(data, pipe, output);
+}
+
+static void
+run_test(data_t *data, uint32_t scene)
+{
+	igt_output_t *output;
+	bool found = false;
+
+	for_each_connected_output(&data->display, output) {
+		enum pipe pipe;
+
+		if (!has_vrr(output))
+			continue;
+
+		for_each_pipe(&data->display, pipe)
+			if (igt_pipe_connector_valid(pipe, output)) {
+				mode_transition(data, pipe, output, scene);
+				found = true;
+				break;
+			}
+	}
+
+	if (!found)
+		igt_skip("No vrr capable outputs found.\n");
+}
+
+igt_main
+{
+	data_t data = {};
+	memset(&data, 0, sizeof(data));
+
+	igt_fixture {
+		data.drm_fd = drm_open_driver_master(DRIVER_AMDGPU);
+		if (data.drm_fd == -1) {
+			igt_skip("Not an amdgpu driver.\n");
+		}
+		kmstest_set_vt_graphics_mode();
+		igt_display_require(&data.display, data.drm_fd);
+		igt_require(data.display.is_atomic);
+		igt_display_require_output(&data.display);
+	}
+
+	/* Expectation: Modeset happens instantaneously without blanking */
+        igt_describe("Test switch from base freesync mode to " \
+                     "various freesync video modes");
+        igt_subtest("freesync-base-to-various")
+		run_test(&data, SCENE_BASE_MODE_TO_VARIOUS_FSV_MODE);
+
+	/* Expectation: Modeset happens instantaneously without blanking */
+        igt_describe("Test switching from lower refresh freesync mode to " \
+                     "another freesync mode with higher refresh rate");
+        igt_subtest("freesync-lower-to-higher")
+		run_test(&data, SCENE_LOWER_FSV_MODE_TO_HIGHER_FSV_MODE);
+
+	/* Expectation: Full modeset is triggered. */
+        igt_describe("Test switching from non preferred video mode to " \
+                     "one of freesync video mode");
+        igt_subtest("freesync-non-preferred-to-freesync")
+		run_test(&data, SCENE_NON_FSV_MODE_TO_FSV_MODE);
+
+	/* Expectation: Modeset happens instantaneously without blanking */
+        igt_describe("Add custom mode through xrandr based on " \
+                     "base freesync mode and apply the new mode");
+        igt_subtest("freesync-custom-mode")
+		run_test(&data, SCENE_BASE_MODE_TO_CUSTUM_MODE);
+
+        igt_info("end of test\n");
+
+	igt_fixture {
+		igt_display_fini(&data.display);
+	}
+}
-- 
2.25.1

^ permalink raw reply related	[flat|nested] 4+ messages in thread

* [igt-dev] ✓ Fi.CI.BAT: success for tests/amdgpu: new test for Freesync-Video Mode (rev5)
  2022-03-05  4:12 [igt-dev] [PATCH i-g-t v4] tests/amdgpu: new test for Freesync-Video Mode Solomon Chiu
@ 2022-03-05  5:02 ` Patchwork
  2022-03-05  9:59 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
  2022-03-07 16:05 ` [igt-dev] [i-g-t, v4] tests/amdgpu: new test for Freesync-Video Mode Lin, Wayne
  2 siblings, 0 replies; 4+ messages in thread
From: Patchwork @ 2022-03-05  5:02 UTC (permalink / raw)
  To: Solomon Chiu; +Cc: igt-dev

[-- Attachment #1: Type: text/plain, Size: 7934 bytes --]

== Series Details ==

Series: tests/amdgpu: new test for Freesync-Video Mode (rev5)
URL   : https://patchwork.freedesktop.org/series/100861/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_11330 -> IGTPW_6742
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/index.html

Participating hosts (48 -> 41)
------------------------------

  Additional (1): fi-glk-dsi 
  Missing    (8): shard-tglu fi-tgl-1115g4 fi-icl-u2 fi-bsw-cyan fi-ilk-650 shard-rkl shard-dg1 fi-bdw-samus 

Known issues
------------

  Here are the changes found in IGTPW_6742 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@amdgpu/amd_basic@query-info:
    - fi-glk-dsi:         NOTRUN -> [SKIP][1] ([fdo#109271]) +30 similar issues
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/fi-glk-dsi/igt@amdgpu/amd_basic@query-info.html

  * igt@gem_huc_copy@huc-copy:
    - fi-skl-6600u:       NOTRUN -> [SKIP][2] ([fdo#109271] / [i915#2190])
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/fi-skl-6600u/igt@gem_huc_copy@huc-copy.html
    - fi-glk-dsi:         NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#2190])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/fi-glk-dsi/igt@gem_huc_copy@huc-copy.html

  * igt@gem_lmem_swapping@parallel-random-engines:
    - fi-glk-dsi:         NOTRUN -> [SKIP][4] ([fdo#109271] / [i915#4613]) +3 similar issues
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/fi-glk-dsi/igt@gem_lmem_swapping@parallel-random-engines.html

  * igt@gem_lmem_swapping@verify-random:
    - fi-skl-6600u:       NOTRUN -> [SKIP][5] ([fdo#109271] / [i915#4613]) +3 similar issues
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/fi-skl-6600u/igt@gem_lmem_swapping@verify-random.html

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-glk-dsi:         NOTRUN -> [SKIP][6] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/fi-glk-dsi/igt@kms_chamelium@hdmi-hpd-fast.html

  * igt@kms_chamelium@vga-edid-read:
    - fi-skl-6600u:       NOTRUN -> [SKIP][7] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/fi-skl-6600u/igt@kms_chamelium@vga-edid-read.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
    - fi-skl-6600u:       NOTRUN -> [SKIP][8] ([fdo#109271]) +2 similar issues
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/fi-skl-6600u/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
    - fi-skl-6600u:       NOTRUN -> [SKIP][9] ([fdo#109271] / [i915#533])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/fi-skl-6600u/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html
    - fi-glk-dsi:         NOTRUN -> [SKIP][10] ([fdo#109271] / [i915#533])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/fi-glk-dsi/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html

  * igt@kms_psr@primary_page_flip:
    - fi-skl-6600u:       NOTRUN -> [INCOMPLETE][11] ([i915#4547] / [i915#4838])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/fi-skl-6600u/igt@kms_psr@primary_page_flip.html

  * igt@runner@aborted:
    - fi-skl-6600u:       NOTRUN -> [FAIL][12] ([i915#2722] / [i915#4312])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/fi-skl-6600u/igt@runner@aborted.html
    - fi-bdw-5557u:       NOTRUN -> [FAIL][13] ([i915#2426] / [i915#4312])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/fi-bdw-5557u/igt@runner@aborted.html

  
#### Possible fixes ####

  * igt@gem_flink_basic@bad-flink:
    - fi-skl-6600u:       [INCOMPLETE][14] ([i915#4547]) -> [PASS][15]
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/fi-skl-6600u/igt@gem_flink_basic@bad-flink.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/fi-skl-6600u/igt@gem_flink_basic@bad-flink.html

  * igt@i915_selftest@live@active:
    - {bat-rpls-2}:       [DMESG-WARN][16] ([i915#4391]) -> [PASS][17] +1 similar issue
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/bat-rpls-2/igt@i915_selftest@live@active.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/bat-rpls-2/igt@i915_selftest@live@active.html

  * igt@i915_selftest@live@dmabuf:
    - {fi-tgl-dsi}:       [FAIL][18] -> [PASS][19]
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/fi-tgl-dsi/igt@i915_selftest@live@dmabuf.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/fi-tgl-dsi/igt@i915_selftest@live@dmabuf.html

  * igt@i915_selftest@live@guc:
    - {bat-rpls-2}:       [DMESG-WARN][20] -> [PASS][21]
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/bat-rpls-2/igt@i915_selftest@live@guc.html
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/bat-rpls-2/igt@i915_selftest@live@guc.html

  * igt@kms_busy@basic@modeset:
    - {bat-adlp-6}:       [DMESG-WARN][22] ([i915#3576]) -> [PASS][23] +1 similar issue
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/bat-adlp-6/igt@kms_busy@basic@modeset.html
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/bat-adlp-6/igt@kms_busy@basic@modeset.html

  
#### Warnings ####

  * igt@i915_selftest@live@hangcheck:
    - bat-dg1-6:          [DMESG-FAIL][24] ([i915#4494] / [i915#4957]) -> [DMESG-FAIL][25] ([i915#4957])
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/bat-dg1-6/igt@i915_selftest@live@hangcheck.html
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/bat-dg1-6/igt@i915_selftest@live@hangcheck.html
    - fi-hsw-4770:        [INCOMPLETE][26] ([i915#4785]) -> [INCOMPLETE][27] ([i915#3303])
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#2426]: https://gitlab.freedesktop.org/drm/intel/issues/2426
  [i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
  [i915#2722]: https://gitlab.freedesktop.org/drm/intel/issues/2722
  [i915#3303]: https://gitlab.freedesktop.org/drm/intel/issues/3303
  [i915#3576]: https://gitlab.freedesktop.org/drm/intel/issues/3576
  [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
  [i915#4391]: https://gitlab.freedesktop.org/drm/intel/issues/4391
  [i915#4494]: https://gitlab.freedesktop.org/drm/intel/issues/4494
  [i915#4547]: https://gitlab.freedesktop.org/drm/intel/issues/4547
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#4785]: https://gitlab.freedesktop.org/drm/intel/issues/4785
  [i915#4838]: https://gitlab.freedesktop.org/drm/intel/issues/4838
  [i915#4957]: https://gitlab.freedesktop.org/drm/intel/issues/4957
  [i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533


Build changes
-------------

  * CI: CI-20190529 -> None
  * IGT: IGT_6364 -> IGTPW_6742

  CI-20190529: 20190529
  CI_DRM_11330: 68d8cd94c6eaa94aa6bae2e92efbd488523a1a1b @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_6742: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/index.html
  IGT_6364: 3523fe577bc22e6512a8de7e60175c8f46cf61d2 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/index.html

[-- Attachment #2: Type: text/html, Size: 9939 bytes --]

^ permalink raw reply	[flat|nested] 4+ messages in thread

* [igt-dev] ✓ Fi.CI.IGT: success for tests/amdgpu: new test for Freesync-Video Mode (rev5)
  2022-03-05  4:12 [igt-dev] [PATCH i-g-t v4] tests/amdgpu: new test for Freesync-Video Mode Solomon Chiu
  2022-03-05  5:02 ` [igt-dev] ✓ Fi.CI.BAT: success for tests/amdgpu: new test for Freesync-Video Mode (rev5) Patchwork
@ 2022-03-05  9:59 ` Patchwork
  2022-03-07 16:05 ` [igt-dev] [i-g-t, v4] tests/amdgpu: new test for Freesync-Video Mode Lin, Wayne
  2 siblings, 0 replies; 4+ messages in thread
From: Patchwork @ 2022-03-05  9:59 UTC (permalink / raw)
  To: Solomon Chiu; +Cc: igt-dev

[-- Attachment #1: Type: text/plain, Size: 30272 bytes --]

== Series Details ==

Series: tests/amdgpu: new test for Freesync-Video Mode (rev5)
URL   : https://patchwork.freedesktop.org/series/100861/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_11330_full -> IGTPW_6742_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/index.html

Participating hosts (13 -> 8)
------------------------------

  Missing    (5): pig-kbl-iris pig-glk-j5005 pig-skl-6260u shard-rkl shard-dg1 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in IGTPW_6742_full:

### IGT changes ###

#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * {igt@kms_plane_scaling@scaler-with-pixel-format-unity-scaling@pipe-b-edp-1-scaler-with-pixel-format}:
    - shard-iclb:         [PASS][1] -> [INCOMPLETE][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/shard-iclb3/igt@kms_plane_scaling@scaler-with-pixel-format-unity-scaling@pipe-b-edp-1-scaler-with-pixel-format.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-iclb2/igt@kms_plane_scaling@scaler-with-pixel-format-unity-scaling@pipe-b-edp-1-scaler-with-pixel-format.html

  
Known issues
------------

  Here are the changes found in IGTPW_6742_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_ctx_persistence@engines-persistence:
    - shard-snb:          NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#1099])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-snb7/igt@gem_ctx_persistence@engines-persistence.html

  * igt@gem_ctx_shared@q-in-order:
    - shard-snb:          NOTRUN -> [SKIP][4] ([fdo#109271]) +171 similar issues
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-snb5/igt@gem_ctx_shared@q-in-order.html

  * igt@gem_ctx_sseu@invalid-sseu:
    - shard-tglb:         NOTRUN -> [SKIP][5] ([i915#280])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-tglb3/igt@gem_ctx_sseu@invalid-sseu.html

  * igt@gem_eio@kms:
    - shard-tglb:         [PASS][6] -> [FAIL][7] ([i915#232])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/shard-tglb6/igt@gem_eio@kms.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-tglb2/igt@gem_eio@kms.html

  * igt@gem_exec_balancer@parallel-keep-in-fence:
    - shard-tglb:         NOTRUN -> [DMESG-WARN][8] ([i915#5076])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-tglb2/igt@gem_exec_balancer@parallel-keep-in-fence.html
    - shard-kbl:          NOTRUN -> [DMESG-WARN][9] ([i915#5076])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-kbl7/igt@gem_exec_balancer@parallel-keep-in-fence.html
    - shard-iclb:         NOTRUN -> [SKIP][10] ([i915#4525])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-iclb7/igt@gem_exec_balancer@parallel-keep-in-fence.html

  * igt@gem_exec_fair@basic-none@vcs0:
    - shard-apl:          [PASS][11] -> [FAIL][12] ([i915#2842]) +1 similar issue
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/shard-apl6/igt@gem_exec_fair@basic-none@vcs0.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-apl2/igt@gem_exec_fair@basic-none@vcs0.html

  * igt@gem_exec_fair@basic-pace-solo@rcs0:
    - shard-iclb:         NOTRUN -> [FAIL][13] ([i915#2842]) +1 similar issue
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-iclb8/igt@gem_exec_fair@basic-pace-solo@rcs0.html
    - shard-glk:          NOTRUN -> [FAIL][14] ([i915#2842]) +1 similar issue
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-glk4/igt@gem_exec_fair@basic-pace-solo@rcs0.html

  * igt@gem_exec_fair@basic-pace@bcs0:
    - shard-tglb:         NOTRUN -> [FAIL][15] ([i915#2842]) +7 similar issues
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-tglb2/igt@gem_exec_fair@basic-pace@bcs0.html

  * igt@gem_exec_fair@basic-pace@vecs0:
    - shard-kbl:          NOTRUN -> [FAIL][16] ([i915#2842]) +2 similar issues
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-kbl4/igt@gem_exec_fair@basic-pace@vecs0.html

  * igt@gem_huc_copy@huc-copy:
    - shard-tglb:         NOTRUN -> [SKIP][17] ([i915#2190])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-tglb7/igt@gem_huc_copy@huc-copy.html
    - shard-kbl:          NOTRUN -> [SKIP][18] ([fdo#109271] / [i915#2190])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-kbl1/igt@gem_huc_copy@huc-copy.html

  * igt@gem_lmem_swapping@parallel-random:
    - shard-apl:          NOTRUN -> [SKIP][19] ([fdo#109271] / [i915#4613]) +1 similar issue
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-apl7/igt@gem_lmem_swapping@parallel-random.html

  * igt@gem_lmem_swapping@verify:
    - shard-tglb:         NOTRUN -> [SKIP][20] ([i915#4613])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-tglb8/igt@gem_lmem_swapping@verify.html
    - shard-kbl:          NOTRUN -> [SKIP][21] ([fdo#109271] / [i915#4613])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-kbl4/igt@gem_lmem_swapping@verify.html

  * igt@gem_media_vme:
    - shard-tglb:         NOTRUN -> [SKIP][22] ([i915#284])
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-tglb8/igt@gem_media_vme.html

  * igt@gem_pxp@create-protected-buffer:
    - shard-iclb:         NOTRUN -> [SKIP][23] ([i915#4270]) +2 similar issues
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-iclb2/igt@gem_pxp@create-protected-buffer.html

  * igt@gem_pxp@reject-modify-context-protection-off-2:
    - shard-tglb:         NOTRUN -> [SKIP][24] ([i915#4270]) +3 similar issues
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-tglb1/igt@gem_pxp@reject-modify-context-protection-off-2.html

  * igt@gem_render_copy@linear-to-vebox-y-tiled:
    - shard-apl:          NOTRUN -> [SKIP][25] ([fdo#109271]) +160 similar issues
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-apl2/igt@gem_render_copy@linear-to-vebox-y-tiled.html

  * igt@gem_render_copy@y-tiled-to-vebox-linear:
    - shard-iclb:         NOTRUN -> [SKIP][26] ([i915#768]) +1 similar issue
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-iclb3/igt@gem_render_copy@y-tiled-to-vebox-linear.html

  * igt@gem_softpin@allocator-evict-all-engines:
    - shard-glk:          [PASS][27] -> [FAIL][28] ([i915#4171])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/shard-glk4/igt@gem_softpin@allocator-evict-all-engines.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-glk6/igt@gem_softpin@allocator-evict-all-engines.html

  * igt@gem_userptr_blits@access-control:
    - shard-tglb:         NOTRUN -> [SKIP][29] ([i915#3297])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-tglb2/igt@gem_userptr_blits@access-control.html

  * igt@gem_userptr_blits@input-checking:
    - shard-glk:          NOTRUN -> [DMESG-WARN][30] ([i915#4991])
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-glk2/igt@gem_userptr_blits@input-checking.html

  * igt@gen3_render_linear_blits:
    - shard-tglb:         NOTRUN -> [SKIP][31] ([fdo#109289]) +6 similar issues
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-tglb8/igt@gen3_render_linear_blits.html

  * igt@gen7_exec_parse@bitmasks:
    - shard-iclb:         NOTRUN -> [SKIP][32] ([fdo#109289]) +3 similar issues
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-iclb5/igt@gen7_exec_parse@bitmasks.html

  * igt@gen9_exec_parse@basic-rejected-ctx-param:
    - shard-tglb:         NOTRUN -> [SKIP][33] ([i915#2527] / [i915#2856]) +2 similar issues
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-tglb5/igt@gen9_exec_parse@basic-rejected-ctx-param.html

  * igt@gen9_exec_parse@unaligned-access:
    - shard-iclb:         NOTRUN -> [SKIP][34] ([i915#2856]) +1 similar issue
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-iclb2/igt@gen9_exec_parse@unaligned-access.html

  * igt@i915_pm_backlight@bad-brightness:
    - shard-glk:          NOTRUN -> [SKIP][35] ([fdo#109271]) +96 similar issues
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-glk9/igt@i915_pm_backlight@bad-brightness.html

  * igt@i915_pm_rc6_residency@rc6-idle:
    - shard-tglb:         NOTRUN -> [WARN][36] ([i915#2681] / [i915#2684])
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-tglb6/igt@i915_pm_rc6_residency@rc6-idle.html
    - shard-iclb:         NOTRUN -> [WARN][37] ([i915#2684])
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-iclb2/igt@i915_pm_rc6_residency@rc6-idle.html

  * igt@i915_pm_sseu@full-enable:
    - shard-tglb:         NOTRUN -> [SKIP][38] ([i915#4387])
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-tglb5/igt@i915_pm_sseu@full-enable.html

  * igt@i915_query@query-topology-known-pci-ids:
    - shard-tglb:         NOTRUN -> [SKIP][39] ([fdo#109303])
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-tglb8/igt@i915_query@query-topology-known-pci-ids.html
    - shard-iclb:         NOTRUN -> [SKIP][40] ([fdo#109303])
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-iclb5/igt@i915_query@query-topology-known-pci-ids.html

  * igt@i915_selftest@live@gt_lrc:
    - shard-tglb:         NOTRUN -> [DMESG-FAIL][41] ([i915#2373])
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-tglb8/igt@i915_selftest@live@gt_lrc.html

  * igt@i915_selftest@live@gt_pm:
    - shard-tglb:         NOTRUN -> [DMESG-FAIL][42] ([i915#1759])
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-tglb8/igt@i915_selftest@live@gt_pm.html

  * igt@kms_addfb_basic@invalid-smem-bo-on-discrete:
    - shard-tglb:         NOTRUN -> [SKIP][43] ([i915#3826])
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-tglb2/igt@kms_addfb_basic@invalid-smem-bo-on-discrete.html
    - shard-iclb:         NOTRUN -> [SKIP][44] ([i915#3826])
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-iclb8/igt@kms_addfb_basic@invalid-smem-bo-on-discrete.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-fencing:
    - shard-iclb:         NOTRUN -> [SKIP][45] ([i915#1769])
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-iclb3/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html

  * igt@kms_big_fb@linear-32bpp-rotate-0:
    - shard-glk:          [PASS][46] -> [DMESG-WARN][47] ([i915#118]) +1 similar issue
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/shard-glk1/igt@kms_big_fb@linear-32bpp-rotate-0.html
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-glk7/igt@kms_big_fb@linear-32bpp-rotate-0.html

  * igt@kms_big_fb@x-tiled-16bpp-rotate-90:
    - shard-tglb:         NOTRUN -> [SKIP][48] ([fdo#111614]) +3 similar issues
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-tglb3/igt@kms_big_fb@x-tiled-16bpp-rotate-90.html
    - shard-iclb:         NOTRUN -> [SKIP][49] ([fdo#110725] / [fdo#111614])
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-iclb6/igt@kms_big_fb@x-tiled-16bpp-rotate-90.html

  * igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip:
    - shard-apl:          NOTRUN -> [SKIP][50] ([fdo#109271] / [i915#3777]) +2 similar issues
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-apl8/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
    - shard-kbl:          NOTRUN -> [SKIP][51] ([fdo#109271] / [i915#3777]) +4 similar issues
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-kbl3/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html

  * igt@kms_big_fb@yf-tiled-64bpp-rotate-0:
    - shard-iclb:         NOTRUN -> [SKIP][52] ([fdo#110723]) +1 similar issue
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-iclb7/igt@kms_big_fb@yf-tiled-64bpp-rotate-0.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip:
    - shard-glk:          NOTRUN -> [SKIP][53] ([fdo#109271] / [i915#3777]) +1 similar issue
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-glk6/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip:
    - shard-tglb:         NOTRUN -> [SKIP][54] ([fdo#111615]) +7 similar issues
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-tglb6/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip.html

  * igt@kms_ccs@pipe-a-crc-primary-rotation-180-y_tiled_gen12_mc_ccs:
    - shard-kbl:          NOTRUN -> [SKIP][55] ([fdo#109271] / [i915#3886]) +7 similar issues
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-kbl1/igt@kms_ccs@pipe-a-crc-primary-rotation-180-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-a-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc:
    - shard-apl:          NOTRUN -> [SKIP][56] ([fdo#109271] / [i915#3886]) +6 similar issues
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-apl6/igt@kms_ccs@pipe-a-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc.html
    - shard-iclb:         NOTRUN -> [SKIP][57] ([fdo#109278] / [i915#3886]) +7 similar issues
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-iclb5/igt@kms_ccs@pipe-a-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc.html

  * igt@kms_ccs@pipe-b-bad-rotation-90-y_tiled_gen12_mc_ccs:
    - shard-tglb:         NOTRUN -> [SKIP][58] ([i915#3689] / [i915#3886]) +5 similar issues
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-tglb3/igt@kms_ccs@pipe-b-bad-rotation-90-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_mc_ccs:
    - shard-glk:          NOTRUN -> [SKIP][59] ([fdo#109271] / [i915#3886]) +6 similar issues
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-glk5/igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-d-bad-rotation-90-yf_tiled_ccs:
    - shard-tglb:         NOTRUN -> [SKIP][60] ([fdo#111615] / [i915#3689]) +5 similar issues
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-tglb3/igt@kms_ccs@pipe-d-bad-rotation-90-yf_tiled_ccs.html

  * igt@kms_ccs@pipe-d-crc-sprite-planes-basic-y_tiled_ccs:
    - shard-tglb:         NOTRUN -> [SKIP][61] ([i915#3689]) +8 similar issues
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-tglb6/igt@kms_ccs@pipe-d-crc-sprite-planes-basic-y_tiled_ccs.html

  * igt@kms_cdclk@plane-scaling:
    - shard-tglb:         NOTRUN -> [SKIP][62] ([i915#3742])
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-tglb2/igt@kms_cdclk@plane-scaling.html

  * igt@kms_chamelium@dp-hpd-for-each-pipe:
    - shard-iclb:         NOTRUN -> [SKIP][63] ([fdo#109284] / [fdo#111827]) +10 similar issues
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-iclb4/igt@kms_chamelium@dp-hpd-for-each-pipe.html

  * igt@kms_chamelium@vga-hpd-enable-disable-mode:
    - shard-glk:          NOTRUN -> [SKIP][64] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-glk4/igt@kms_chamelium@vga-hpd-enable-disable-mode.html

  * igt@kms_chamelium@vga-hpd-without-ddc:
    - shard-kbl:          NOTRUN -> [SKIP][65] ([fdo#109271] / [fdo#111827]) +13 similar issues
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-kbl7/igt@kms_chamelium@vga-hpd-without-ddc.html

  * igt@kms_color@pipe-d-ctm-0-25:
    - shard-iclb:         NOTRUN -> [SKIP][66] ([fdo#109278] / [i915#1149])
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-iclb1/igt@kms_color@pipe-d-ctm-0-25.html

  * igt@kms_color_chamelium@pipe-b-ctm-0-25:
    - shard-snb:          NOTRUN -> [SKIP][67] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-snb6/igt@kms_color_chamelium@pipe-b-ctm-0-25.html

  * igt@kms_color_chamelium@pipe-b-ctm-limited-range:
    - shard-tglb:         NOTRUN -> [SKIP][68] ([fdo#109284] / [fdo#111827]) +17 similar issues
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-tglb1/igt@kms_color_chamelium@pipe-b-ctm-limited-range.html

  * igt@kms_color_chamelium@pipe-c-ctm-max:
    - shard-apl:          NOTRUN -> [SKIP][69] ([fdo#109271] / [fdo#111827]) +17 similar issues
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-apl1/igt@kms_color_chamelium@pipe-c-ctm-max.html

  * igt@kms_content_protection@uevent:
    - shard-kbl:          NOTRUN -> [FAIL][70] ([i915#2105])
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-kbl6/igt@kms_content_protection@uevent.html
    - shard-tglb:         NOTRUN -> [SKIP][71] ([i915#1063])
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-tglb3/igt@kms_content_protection@uevent.html
    - shard-iclb:         NOTRUN -> [SKIP][72] ([fdo#109300] / [fdo#111066])
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-iclb1/igt@kms_content_protection@uevent.html

  * igt@kms_cursor_crc@pipe-a-cursor-32x32-sliding:
    - shard-tglb:         NOTRUN -> [SKIP][73] ([i915#3319]) +3 similar issues
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-tglb7/igt@kms_cursor_crc@pipe-a-cursor-32x32-sliding.html

  * igt@kms_cursor_crc@pipe-b-cursor-512x170-offscreen:
    - shard-iclb:         NOTRUN -> [SKIP][74] ([fdo#109278] / [fdo#109279]) +3 similar issues
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-iclb5/igt@kms_cursor_crc@pipe-b-cursor-512x170-offscreen.html

  * igt@kms_cursor_crc@pipe-c-cursor-max-size-offscreen:
    - shard-tglb:         NOTRUN -> [SKIP][75] ([i915#3359]) +5 similar issues
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-tglb6/igt@kms_cursor_crc@pipe-c-cursor-max-size-offscreen.html

  * igt@kms_cursor_crc@pipe-d-cursor-512x170-offscreen:
    - shard-tglb:         NOTRUN -> [SKIP][76] ([fdo#109279] / [i915#3359]) +8 similar issues
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-tglb2/igt@kms_cursor_crc@pipe-d-cursor-512x170-offscreen.html

  * igt@kms_cursor_legacy@cursora-vs-flipb-atomic:
    - shard-tglb:         NOTRUN -> [SKIP][77] ([fdo#109274] / [fdo#111825]) +13 similar issues
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-tglb7/igt@kms_cursor_legacy@cursora-vs-flipb-atomic.html

  * igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions:
    - shard-iclb:         NOTRUN -> [SKIP][78] ([fdo#109274] / [fdo#109278]) +6 similar issues
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-iclb5/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
    - shard-iclb:         [PASS][79] -> [FAIL][80] ([i915#2346])
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/shard-iclb4/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-iclb7/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions:
    - shard-tglb:         NOTRUN -> [SKIP][81] ([i915#4103]) +1 similar issue
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-tglb3/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html

  * igt@kms_dp_tiled_display@basic-test-pattern:
    - shard-iclb:         NOTRUN -> [SKIP][82] ([i915#426])
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-iclb8/igt@kms_dp_tiled_display@basic-test-pattern.html
    - shard-tglb:         NOTRUN -> [SKIP][83] ([i915#426])
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-tglb6/igt@kms_dp_tiled_display@basic-test-pattern.html

  * igt@kms_flip@2x-flip-vs-expired-vblank@ab-hdmi-a1-hdmi-a2:
    - shard-glk:          [PASS][84] -> [FAIL][85] ([i915#2122])
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/shard-glk9/igt@kms_flip@2x-flip-vs-expired-vblank@ab-hdmi-a1-hdmi-a2.html
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-glk6/igt@kms_flip@2x-flip-vs-expired-vblank@ab-hdmi-a1-hdmi-a2.html

  * igt@kms_flip@2x-plain-flip-fb-recreate:
    - shard-iclb:         NOTRUN -> [SKIP][86] ([fdo#109274]) +3 similar issues
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-iclb1/igt@kms_flip@2x-plain-flip-fb-recreate.html

  * igt@kms_flip@flip-vs-suspend-interruptible@c-dp1:
    - shard-apl:          NOTRUN -> [DMESG-WARN][87] ([i915#180]) +3 similar issues
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-apl1/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html

  * igt@kms_flip@flip-vs-suspend@c-dp1:
    - shard-apl:          [PASS][88] -> [DMESG-WARN][89] ([i915#180]) +1 similar issue
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/shard-apl3/igt@kms_flip@flip-vs-suspend@c-dp1.html
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-apl7/igt@kms_flip@flip-vs-suspend@c-dp1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling:
    - shard-iclb:         NOTRUN -> [SKIP][90] ([i915#2587])
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-iclb7/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling:
    - shard-tglb:         NOTRUN -> [SKIP][91] ([i915#2587])
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-tglb2/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-cpu:
    - shard-iclb:         NOTRUN -> [SKIP][92] ([fdo#109280]) +22 similar issues
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-iclb3/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-cpu.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-plflip-blt:
    - shard-tglb:         NOTRUN -> [SKIP][93] ([fdo#109280] / [fdo#111825]) +40 similar issues
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-tglb5/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-wc:
    - shard-kbl:          NOTRUN -> [SKIP][94] ([fdo#109271]) +141 similar issues
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-kbl4/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-wc.html

  * igt@kms_hdr@bpc-switch-suspend:
    - shard-kbl:          [PASS][95] -> [DMESG-WARN][96] ([i915#180]) +2 similar issues
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/shard-kbl7/igt@kms_hdr@bpc-switch-suspend.html
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-kbl7/igt@kms_hdr@bpc-switch-suspend.html

  * igt@kms_invalid_mode@clock-too-high:
    - shard-tglb:         NOTRUN -> [SKIP][97] ([i915#4278])
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-tglb6/igt@kms_invalid_mode@clock-too-high.html
    - shard-iclb:         NOTRUN -> [SKIP][98] ([i915#4278])
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-iclb8/igt@kms_invalid_mode@clock-too-high.html

  * igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
    - shard-iclb:         NOTRUN -> [SKIP][99] ([i915#1839])
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-iclb3/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html

  * igt@kms_pipe_crc_basic@disable-crc-after-crtc-pipe-d:
    - shard-glk:          NOTRUN -> [SKIP][100] ([fdo#109271] / [i915#533])
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-glk1/igt@kms_pipe_crc_basic@disable-crc-after-crtc-pipe-d.html
    - shard-apl:          NOTRUN -> [SKIP][101] ([fdo#109271] / [i915#533]) +1 similar issue
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-apl3/igt@kms_pipe_crc_basic@disable-crc-after-crtc-pipe-d.html
    - shard-kbl:          NOTRUN -> [SKIP][102] ([fdo#109271] / [i915#533]) +1 similar issue
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-kbl7/igt@kms_pipe_crc_basic@disable-crc-after-crtc-pipe-d.html

  * igt@kms_pipe_crc_basic@read-crc-pipe-d-frame-sequence:
    - shard-iclb:         NOTRUN -> [SKIP][103] ([fdo#109278]) +26 similar issues
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-iclb2/igt@kms_pipe_crc_basic@read-crc-pipe-d-frame-sequence.html

  * igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b-planes:
    - shard-iclb:         NOTRUN -> [DMESG-WARN][104] ([i915#2867])
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-iclb6/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b-planes.html

  * igt@kms_plane_alpha_blend@pipe-c-alpha-7efc:
    - shard-kbl:          NOTRUN -> [FAIL][105] ([fdo#108145] / [i915#265]) +2 similar issues
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-kbl4/igt@kms_plane_alpha_blend@pipe-c-alpha-7efc.html
    - shard-apl:          NOTRUN -> [FAIL][106] ([fdo#108145] / [i915#265]) +1 similar issue
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-apl4/igt@kms_plane_alpha_blend@pipe-c-alpha-7efc.html

  * igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb:
    - shard-glk:          NOTRUN -> [FAIL][107] ([i915#265])
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-glk5/igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb.html
    - shard-apl:          NOTRUN -> [FAIL][108] ([i915#265])
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-apl3/igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb.html
    - shard-kbl:          NOTRUN -> [FAIL][109] ([i915#265])
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-kbl4/igt@kms_plane_alpha_blend@pipe-c-alpha-transparent-fb.html

  * igt@kms_plane_lowres@pipe-b-tiling-yf:
    - shard-iclb:         NOTRUN -> [SKIP][110] ([i915#3536])
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-iclb5/igt@kms_plane_lowres@pipe-b-tiling-yf.html

  * igt@kms_plane_lowres@pipe-d-tiling-yf:
    - shard-tglb:         NOTRUN -> [SKIP][111] ([fdo#111615] / [fdo#112054]) +2 similar issues
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-tglb6/igt@kms_plane_lowres@pipe-d-tiling-yf.html

  * igt@kms_psr2_su@page_flip-p010:
    - shard-tglb:         NOTRUN -> [SKIP][112] ([i915#1911])
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-tglb3/igt@kms_psr2_su@page_flip-p010.html
    - shard-kbl:          NOTRUN -> [SKIP][113] ([fdo#109271] / [i915#658])
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-kbl6/igt@kms_psr2_su@page_flip-p010.html
    - shard-glk:          NOTRUN -> [SKIP][114] ([fdo#109271] / [i915#658])
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-glk2/igt@kms_psr2_su@page_flip-p010.html
    - shard-iclb:         NOTRUN -> [SKIP][115] ([fdo#109642] / [fdo#111068] / [i915#658])
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-iclb6/igt@kms_psr2_su@page_flip-p010.html
    - shard-apl:          NOTRUN -> [SKIP][116] ([fdo#109271] / [i915#658])
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-apl1/igt@kms_psr2_su@page_flip-p010.html

  * igt@kms_psr@psr2_cursor_mmap_gtt:
    - shard-tglb:         NOTRUN -> [FAIL][117] ([i915#132] / [i915#3467]) +3 similar issues
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-tglb1/igt@kms_psr@psr2_cursor_mmap_gtt.html

  * igt@kms_psr@psr2_no_drrs:
    - shard-iclb:         NOTRUN -> [SKIP][118] ([fdo#109441]) +1 similar issue
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-iclb3/igt@kms_psr@psr2_no_drrs.html

  * igt@kms_psr@psr2_sprite_mmap_gtt:
    - shard-iclb:         [PASS][119] -> [SKIP][120] ([fdo#109441])
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11330/shard-iclb2/igt@kms_psr@psr2_sprite_mmap_gtt.html
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-iclb4/igt@kms_psr@psr2_sprite_mmap_gtt.html

  * igt@kms_scaling_modes@scaling-mode-none@edp-1-pipe-a:
    - shard-tglb:         NOTRUN -> [SKIP][121] ([i915#5030]) +3 similar issues
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-tglb1/igt@kms_scaling_modes@scaling-mode-none@edp-1-pipe-a.html

  * igt@kms_scaling_modes@scaling-mode-none@edp-1-pipe-c:
    - shard-iclb:         NOTRUN -> [SKIP][122] ([i915#5030]) +2 similar issues
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-iclb5/igt@kms_scaling_modes@scaling-mode-none@edp-1-pipe-c.html

  * igt@kms_writeback@writeback-fb-id:
    - shard-glk:          NOTRUN -> [SKIP][123] ([fdo#109271] / [i915#2437])
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-glk7/igt@kms_writeback@writeback-fb-id.html
    - shard-apl:          NOTRUN -> [SKIP][124] ([fdo#109271] / [i915#2437]) +1 similar issue
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-apl1/igt@kms_writeback@writeback-fb-id.html
    - shard-kbl:          NOTRUN -> [SKIP][125] ([fdo#109271] / [i915#2437])
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-kbl1/igt@kms_writeback@writeback-fb-id.html
    - shard-tglb:         NOTRUN -> [SKIP][126] ([i915#2437]) +1 similar issue
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-tglb7/igt@kms_writeback@writeback-fb-id.html

  * igt@kms_writeback@writeback-pixel-formats:
    - shard-iclb:         NOTRUN -> [SKIP][127] ([i915#2437]) +1 similar issue
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/shard-iclb6/igt@kms_writeback@writeback-pixel-formats.html

  * igt@nouveau_crc@pipe-

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_6742/index.html

[-- Attachment #2: Type: text/html, Size: 33921 bytes --]

^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [igt-dev] [i-g-t, v4] tests/amdgpu: new test for Freesync-Video Mode
  2022-03-05  4:12 [igt-dev] [PATCH i-g-t v4] tests/amdgpu: new test for Freesync-Video Mode Solomon Chiu
  2022-03-05  5:02 ` [igt-dev] ✓ Fi.CI.BAT: success for tests/amdgpu: new test for Freesync-Video Mode (rev5) Patchwork
  2022-03-05  9:59 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
@ 2022-03-07 16:05 ` Lin, Wayne
  2 siblings, 0 replies; 4+ messages in thread
From: Lin, Wayne @ 2022-03-07 16:05 UTC (permalink / raw)
  To: Chiu, Solomon, igt-dev

[Public]

This patch is
Reviewed-by: Wayne Lin <Wayne.Lin@amd.com>

> -----Original Message-----
> From: Solomon Chiu <solomon.chiu@amd.com>
> Sent: Saturday, March 5, 2022 12:13 PM
> To: igt-dev@lists.freedesktop.org
> Subject: [i-g-t,v4] tests/amdgpu: new test for Freesync-Video Mode
>
> This tests transition between normal and FreeSync-Video modes and measures the FPS to ensure vblank events are happening at the
> expected rate. A SMPTE test pattern is displayed in the first mode, and then a simple animation is displayed in the second mode, in order to
> help the user to check if there are blanking with mode transition.
>
> v4: Rebase and refine commit message
> v3: Remove conditional debugging calls and some comments.
> v2: Rebase
> ---
>  tests/amdgpu/amd_freesync_video_mode.c | 872 +++++++++++++++++++++++++
>  1 file changed, 872 insertions(+)
>  create mode 100644 tests/amdgpu/amd_freesync_video_mode.c
>
> diff --git a/tests/amdgpu/amd_freesync_video_mode.c b/tests/amdgpu/amd_freesync_video_mode.c
> new file mode 100644
> index 00000000..579d2443
> --- /dev/null
> +++ b/tests/amdgpu/amd_freesync_video_mode.c
> @@ -0,0 +1,872 @@
> +/*
> + * Copyright 2022 Advanced Micro Devices, Inc.
> + *
> + * Permission is hereby granted, free of charge, to any person
> +obtaining a
> + * copy of this software and associated documentation files (the
> +"Software"),
> + * to deal in the Software without restriction, including without
> +limitation
> + * the rights to use, copy, modify, merge, publish, distribute,
> +sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom
> +the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice shall be
> +included in
> + * all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> +EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
> +MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT
> +SHALL
> + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM,
> +DAMAGES OR
> + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
> +OTHERWISE,
> + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE
> +OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + */
> +
> +#include "igt.h"
> +#include "sw_sync.h"
> +#include <fcntl.h>
> +#include <signal.h>
> +
> +#define NSECS_PER_SEC                (1000000000ull)
> +#define TEST_DURATION_NS     (10 * NSECS_PER_SEC)
> +
> +#define BYTES_PER_PIXEL         4
> +#define MK_COLOR(r, g, b)    ((0 << 24) | (r << 16) | (g << 8) | b)
> +
> +/*
> + * The Display Core of amdgpu will add a set of modes derived from the
> + * base FreeSync video mode into the corresponding connector’s mode
> +list based
> + * on commonly used refresh rates and VRR range of the connected display.
> + * From the userspace's perspective, they can see a seamless mode
> +change
> + * experience when the change between different refresh rates under the
> +same
> + * resolution. Additionally, userspace applications such as Video
> +playback can
> + * read this modeset list and change the refresh rate based on the
> +video frame
> + * rate. Finally, the userspace can also derive an appropriate mode for
> + * a particular refresh rate based on the FreeSync Mode and add it to
> +the
> + * connector’s mode list.
> +*/
> +IGT_TEST_DESCRIPTION("This tests transition between normal and FreeSync-Video"
> +                  "modes and measures the FPS to ensure vblank events are"
> +                  "happening at the expected rate."); typedef struct range {
> +     unsigned int min;
> +     unsigned int max;
> +} range_t;
> +
> +typedef struct data {
> +     int             drm_fd;
> +     igt_display_t   display;
> +     igt_plane_t     *primary;
> +     igt_fb_t        fbs[2];
> +     uint32_t        *fb_mem[2];
> +     int             front;
> +     bool            fb_initialized;
> +     range_t         range;
> +
> +     drmModeConnector *connector;
> +     drmModeModeInfo *modes;
> +     int             count_modes;
> +
> +     uint32_t        preferred_mode_index;
> +        uint32_t     base_mode_index;
> +     uint32_t        hdisplay;
> +     uint32_t        vdisplay;
> +} data_t;
> +
> +struct fsv_sprite {
> +        uint32_t        w;
> +     uint32_t        h;
> +        uint32_t        *data;
> +};
> +static struct fsv_sprite cicle_sprite;
> +
> +enum {
> +        FSV_PREFERRED_MODE,
> +        FSV_BASE_MODE,
> +        FSV_FREESYNC_VIDEO_MODE,
> +        FSV_NON_FREESYNC_VIDEO_MODE,
> +};
> +
> +enum {
> +     ANIM_TYPE_SMPTE,
> +     ANIM_TYPE_CIRCLE_WAVE,
> +
> +     ANIM_TYPE_COUNT,
> +};
> +
> +enum {
> +     SCENE_BASE_MODE_TO_VARIOUS_FSV_MODE ,
> +     SCENE_LOWER_FSV_MODE_TO_HIGHER_FSV_MODE ,
> +     SCENE_NON_FSV_MODE_TO_FSV_MODE ,
> +     SCENE_BASE_MODE_TO_CUSTUM_MODE ,
> +     SCENE_NON_FSV_MODE_TO_NON_FSV_MODE,
> +
> +     SCENE_COUNT,
> +};
> +
> +/*---------------------------------------------------------------------
> +-------*/
> +
> +/* Converts a timespec structure to nanoseconds. */ static uint64_t
> +timespec_to_ns(struct timespec *ts) {
> +     return ts->tv_sec * NSECS_PER_SEC + ts->tv_nsec; }
> +
> +/*
> + * Gets an event from DRM and returns its timestamp in nanoseconds.
> + * Asserts if the event from DRM is not matched with requested one.
> + *
> + * This blocks until the event is received.
> + */
> +static uint64_t get_kernel_event_ns(data_t *data, uint32_t event) {
> +     struct drm_event_vblank ev;
> +
> +     igt_set_timeout(1, "Waiting for an event\n");
> +     igt_assert_eq(read(data->drm_fd, &ev, sizeof(ev)), sizeof(ev));
> +     igt_assert_eq(ev.base.type, event);
> +     igt_reset_timeout();
> +
> +     return ev.tv_sec * NSECS_PER_SEC + ev.tv_usec * 1000ull; }
> +
> +/*
> + * Returns the current CLOCK_MONOTONIC time in nanoseconds.
> + * The regular IGT helpers can't be used since they default to
> + * CLOCK_MONOTONIC_RAW - which isn't what the kernel uses for its timestamps.
> + */
> +static uint64_t get_time_ns(void)
> +{
> +     struct timespec ts;
> +     memset(&ts, 0, sizeof(ts));
> +     errno = 0;
> +
> +     if (!clock_gettime(CLOCK_MONOTONIC, &ts))
> +             return timespec_to_ns(&ts);
> +
> +     igt_warn("Could not read monotonic time: %s\n", strerror(errno));
> +     igt_fail(-errno);
> +
> +     return 0;
> +}
> +
> +static void fbmem_draw_rect(
> +             uint32_t *fbmem,
> +             uint32_t stride,
> +             uint32_t x,
> +             uint32_t y,
> +             uint32_t w,
> +             uint32_t h,
> +             uint32_t color)
> +{
> +        uint32_t offset = y * stride + x;
> +
> +        for (uint32_t j = 0; j < h; j++) {
> +                for (uint32_t i = 0; i < w; i++) {
> +                        fbmem[offset + i] = color;
> +                }
> +                offset += stride;
> +        }
> +}
> +
> +static void fbmem_draw_smpte_pattern(uint32_t *fbmem, int width, int
> +height) {
> +     uint32_t x, y;
> +        uint32_t colors_top[] = {
> +                MK_COLOR(192, 192, 192), /* grey */
> +                MK_COLOR(192, 192, 0),   /* yellow */
> +                MK_COLOR(0, 192, 192),   /* cyan */
> +                MK_COLOR(0, 192, 0),     /* green */
> +                MK_COLOR(192, 0, 192),   /* magenta */
> +                MK_COLOR(192, 0, 0),     /* red */
> +                MK_COLOR(0, 0, 192),     /* blue */
> +        };
> +        uint32_t colors_middle[] = {
> +                MK_COLOR(0, 0, 192),     /* blue */
> +                MK_COLOR(19, 19, 19),    /* black */
> +                MK_COLOR(192, 0, 192),   /* magenta */
> +                MK_COLOR(19, 19, 19),    /* black */
> +                MK_COLOR(0, 192, 192),   /* cyan */
> +                MK_COLOR(19, 19, 19),    /* black */
> +                MK_COLOR(192, 192, 192), /* grey */
> +        };
> +        uint32_t colors_bottom[] = {
> +                MK_COLOR(0, 33, 76),     /* in-phase */
> +                MK_COLOR(255, 255, 255), /* super white */
> +                MK_COLOR(50, 0, 106),    /* quadrature */
> +                MK_COLOR(19, 19, 19),    /* black */
> +                MK_COLOR(9, 9, 9),       /* 3.5% */
> +                MK_COLOR(19, 19, 19),    /* 7.5% */
> +                MK_COLOR(29, 29, 29),    /* 11.5% */
> +                MK_COLOR(19, 19, 19),    /* black */
> +        };
> +
> +        for (y = 0; y < height * 6 / 9; ++y) {
> +                for (x = 0; x < width; ++x)
> +                        fbmem[x] =
> +                                colors_top[x * 7 / width];
> +                fbmem += width;
> +        }
> +
> +        for (; y < height * 7 / 9; ++y) {
> +                for (x = 0; x < width; ++x)
> +                        fbmem[x] =
> +                                colors_middle[x * 7 / width];
> +                fbmem += width;
> +        }
> +
> +        for (; y < height; ++y) {
> +                for (x = 0; x < width * 5 / 7; ++x)
> +                        fbmem[x] =
> +                                colors_bottom[x * 4 / (width * 5 / 7)];
> +                for (; x < width * 6 / 7; ++x)
> +                        fbmem[x] =
> +                                colors_bottom[(x - width * 5 / 7) * 3
> +                                              / (width / 7) + 4];
> +                for (; x < width; ++x)
> +                        fbmem[x] = colors_bottom[7];
> +                fbmem += width;
> +        }
> +}
> +
> +static void sprite_init(
> +             struct fsv_sprite *sprite,
> +             uint32_t w,
> +             uint32_t h)
> +{
> +        igt_assert(sprite);
> +
> +        sprite->data = (uint32_t *)malloc(w * h * BYTES_PER_PIXEL);
> +        igt_assert(sprite->data);
> +
> +        sprite->w = w;
> +        sprite->h = h;
> +}
> +
> +static void sprite_paste(
> +             uint32_t *fbmem,
> +             uint32_t fb_stride,
> +             struct fsv_sprite *sprite,
> +             uint32_t x,
> +             uint32_t y)
> +{
> +        uint32_t fb_offset = y * fb_stride + x;
> +        uint32_t sprite_offset = 0;
> +
> +        for (int j = 0; j < sprite->h; j++) {
> +                memcpy(fbmem + fb_offset, sprite->data + sprite_offset, sprite->w * 4);
> +                sprite_offset += sprite->w;
> +                fb_offset += fb_stride;
> +        }
> +}
> +
> +static void sprite_draw_rect(
> +             struct fsv_sprite *sprite,
> +             uint32_t x,
> +             uint32_t y,
> +             uint32_t w,
> +             uint32_t h,
> +             uint32_t color)
> +{
> +        uint32_t offset = y * sprite->w + x;
> +        uint32_t *addr = (uint32_t *)sprite->data;
> +
> +        for (uint32_t j = 0; j < h; j++) {
> +                addr = (uint32_t *)(sprite->data + offset);
> +                for (uint32_t i = 0; i < w; i++) {
> +                        addr[i] = color;
> +                }
> +                offset += sprite->w;
> +        }
> +}
> +
> +/* drawing horizontal line in the sprite */ static void
> +sprite_draw_hline(
> +             struct fsv_sprite *sprite,
> +             uint32_t x1,
> +             uint32_t y1,
> +             uint32_t x2,
> +             uint32_t color)
> +{
> +     uint32_t offset = y1 * sprite->w;
> +        for (int x = x1 ; x < x2; x++) {
> +                sprite->data[offset + x] = color;
> +        }
> +}
> +
> +/* drawing filled circle with Bresenham's algorithm */ static void
> +sprite_draw_circle(
> +             struct fsv_sprite *sprite,
> +             uint32_t x,
> +             uint32_t y,
> +             uint32_t radius,
> +             uint32_t color)
> +{
> +        int offsetx = 0, offsety = radius, d = radius -1;
> +
> +        while (offsety >= offsetx) {
> +                sprite_draw_hline(sprite, x - offsety, y + offsetx,
> +                                x + offsety, color);
> +                sprite_draw_hline(sprite, x - offsetx, y + offsety,
> +                                x + offsetx, color);
> +                sprite_draw_hline(sprite, x - offsetx, y - offsety,
> +                                x + offsetx, color);
> +                sprite_draw_hline(sprite, x - offsety, y - offsetx,
> +                                x + offsety, color);
> +
> +                if (d >= 2 * offsetx) {
> +                        d -= 2 * offsetx + 1;
> +                        offsetx += 1;
> +                } else if (d < 2 * (radius - offsety)) {
> +                        d += 2 * offsety - 1;
> +                        offsety -= 1;
> +                } else {
> +                        d += 2 * (offsety - offsetx - 1);
> +                        offsety -= 1;
> +                        offsetx += 1;
> +                }
> +        }
> +}
> +
> +static void sprite_anim_init(void)
> +{
> +        memset(&cicle_sprite, 0, sizeof(cicle_sprite));
> +        sprite_init(&cicle_sprite, 100, 100);
> +
> +        sprite_draw_rect(&cicle_sprite, 0, 0, 100, 100, MK_COLOR(128, 128, 128));
> +     /* draw filled circle with center (50, 50), radius 50. */
> +        sprite_draw_circle(&cicle_sprite, 50, 50, 50, MK_COLOR(0, 0,
> +255)); }
> +
> +static void sprite_anim(data_t *data, uint32_t *addr) {
> +        struct timeval tv1, tv2, tv_delta;
> +        uint64_t frame_ns = get_time_ns();
> +        double now = frame_ns / (double)NSECS_PER_SEC;
> +
> +        gettimeofday(&tv1, NULL);
> +
> +        fbmem_draw_rect(addr, data->hdisplay, 0, 0,
> +                     data->hdisplay, data->vdisplay, MK_COLOR(128, 128, 128));
> +     /* red rectangle for checking tearing effect*/
> +        if (data->front) {
> +                fbmem_draw_rect(addr, data->hdisplay, 0, 0,
> +                     30, data->vdisplay, MK_COLOR(191, 0, 0));
> +        }
> +
> +     /* draw 16 filled circles */
> +        for (int i = 0; i < 16; ++i) {
> +                double tv = now + i * 0.25;
> +                float x, y;
> +                x = data->hdisplay - 10.0f - 118.0f * i - 100.0f;
> +                y = data->vdisplay * 0.5f + cos(tv) * data->vdisplay * 0.35;
> +                sprite_paste(addr, data->hdisplay, &cicle_sprite, (uint32_t)x, (uint32_t)y);
> +        }
> +
> +        gettimeofday(&tv2, NULL);
> +        timersub(&tv2, &tv1, &tv_delta);
> +
> +        igt_debug("time of drawing: %ld ms\n", tv_delta.tv_usec /
> +1000); }
> +
> +/*---------------------------------------------------------------------
> +-------*/
> +
> +/* The freesync video modes is derived from the base mode(the mode with the
> +   highest clock rate, and has the same resolution with preferred mode) by
> +   amdgpu driver. They have the same clock rate with base mode, and the
> +   type of mode has been set as DRM_MODE_TYPE_DRIVER"
> +*/
> +static bool is_freesync_video_mode(data_t *data, drmModeModeInfo *mode)
> +{
> +        drmModeModeInfo *base_mode = &data->modes[data->base_mode_index];
> +        uint32_t bm_clock = base_mode->clock;
> +
> +        if (    mode->hdisplay == data->hdisplay &&
> +                mode->vdisplay == data->vdisplay &&
> +                mode->clock == bm_clock &&
> +             mode->type & DRM_MODE_TYPE_DRIVER) {
> +                return true;
> +        }
> +
> +        return false;
> +}
> +
> +static drmModeModeInfo* select_mode(
> +        data_t *data,
> +        uint32_t mode_type,
> +        int refresh_rate)
> +{
> +     int i;
> +        int index;
> +        drmModeModeInfo *mode = NULL;
> +     igt_debug("select_mode: type=%d, refresh_rate=%d\n", mode_type,
> +refresh_rate);
> +
> +        switch (mode_type) {
> +        case FSV_BASE_MODE:
> +                index = data->base_mode_index;
> +                mode = &data->modes[index];
> +                break;
> +
> +        case FSV_PREFERRED_MODE:
> +                index = data->preferred_mode_index;
> +                mode = &data->modes[index];
> +                break;
> +
> +        case FSV_FREESYNC_VIDEO_MODE:
> +                for (i = 0; i < data->count_modes; i++) {
> +                        mode = &data->modes[i];
> +                        if (    mode->vrefresh == refresh_rate &&
> +                                is_freesync_video_mode(data, mode)) {
> +                                break;
> +                        }
> +                }
> +             if (i == data->count_modes)
> +                     mode = NULL;
> +                break;
> +
> +        case FSV_NON_FREESYNC_VIDEO_MODE:
> +                for (i = 0; i < data->count_modes; i++) {
> +                        mode = &data->modes[i];
> +                        if (    mode->vrefresh == refresh_rate &&
> +                                !is_freesync_video_mode(data, mode)) {
> +                                break;
> +                        }
> +                }
> +             if (i == data->count_modes)
> +                     mode = NULL;
> +                break;
> +
> +        default:
> +                igt_assert("Cannot find mode with specified rate and type.");
> +                break;
> +        }
> +
> +     if (mode) {
> +             igt_info("selected mode:\n");
> +             kmstest_dump_mode(mode);
> +     }
> +
> +        return mode;
> +}
> +
> +static int prepare_custom_mode(
> +        data_t *data,
> +     drmModeModeInfo *custom_mode,
> +     uint32_t refresh_rate)
> +{
> +     uint64_t num, den;
> +     uint64_t target_vtotal, target_vtotal_diff;
> +     drmModeModeInfo *base_mode;
> +
> +     igt_info("prepare custom mode:\n");
> +
> +     base_mode = &data->modes[data->base_mode_index];
> +     if (base_mode->vrefresh < refresh_rate) {
> +             igt_warn("The given refresh rate is large than base mode's one:" \
> +                             " base_mode->vrefresh=%d, refresh_rate=%u\n",
> +                             base_mode->vrefresh, refresh_rate);
> +             return -1;
> +     }
> +
> +     if (refresh_rate < data->range.min ||
> +                     refresh_rate > data->range.max) {
> +             igt_warn("The given refresh rate(%u) should be between the rage of: min=%d, max=%d\n",
> +                             refresh_rate, data->range.min, data->range.max);
> +             return -1;
> +     }
> +
> +     num = (unsigned long long)base_mode->clock * 1000 * 1000;
> +     den = refresh_rate * 1000 * (unsigned long long)base_mode->htotal;
> +     target_vtotal = num / den;
> +     target_vtotal_diff = target_vtotal - base_mode->vtotal;
> +     igt_debug("num=%lu, den=%lu, " \
> +                  "target_vtotal=%lu, target_vtotal_diff=%lu, base_mode->vtotal=%d\n",
> +               num, den, target_vtotal, target_vtotal_diff, base_mode->vtotal
> +             );
> +
> +     /* Check for illegal modes */
> +     if (base_mode->vsync_start + target_vtotal_diff < base_mode->vdisplay ||
> +                     base_mode->vsync_end + target_vtotal_diff < base_mode->vsync_start ||
> +                     base_mode->vtotal + target_vtotal_diff < base_mode->vsync_end)
> +             return -1;
> +
> +     *custom_mode = *base_mode;
> +     custom_mode->vtotal += (uint16_t)target_vtotal_diff;
> +     custom_mode->vsync_start += (uint16_t)target_vtotal_diff;
> +     custom_mode->vsync_end += (uint16_t)target_vtotal_diff;
> +     custom_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
> +     custom_mode->type |= DRM_MODE_TYPE_DRIVER;
> +     custom_mode->vrefresh = refresh_rate;
> +
> +     igt_info("custom mode:\n");
> +     kmstest_dump_mode(custom_mode);
> +
> +     return 0;
> +}
> +
> +/* Returns the rate duration in nanoseconds for the given refresh rate.
> +*/ static uint64_t nsec_per_frame(uint64_t refresh) {
> +     return NSECS_PER_SEC / refresh;
> +}
> +
> +/* Read min and max vrr range from the connector debugfs. */ static
> +range_t get_vrr_range(data_t *data, igt_output_t *output) {
> +     char buf[256];
> +     char *start_loc;
> +     int fd, res;
> +     range_t range;
> +
> +     fd = igt_debugfs_connector_dir(data->drm_fd, output->name, O_RDONLY);
> +     igt_assert(fd >= 0);
> +
> +     res = igt_debugfs_simple_read(fd, "vrr_range", buf, sizeof(buf));
> +     igt_require(res > 0);
> +
> +     close(fd);
> +
> +     igt_assert(start_loc = strstr(buf, "Min: "));
> +     igt_assert_eq(sscanf(start_loc, "Min: %u", &range.min), 1);
> +
> +     igt_assert(start_loc = strstr(buf, "Max: "));
> +     igt_assert_eq(sscanf(start_loc, "Max: %u", &range.max), 1);
> +
> +     return range;
> +}
> +
> +/* Returns true if an output supports VRR. */ static bool
> +has_vrr(igt_output_t *output) {
> +     return igt_output_has_prop(output, IGT_CONNECTOR_VRR_CAPABLE) &&
> +            igt_output_get_prop(output, IGT_CONNECTOR_VRR_CAPABLE); }
> +
> +/* Toggles variable refresh rate on the pipe. */ static void
> +set_vrr_on_pipe(data_t *data, enum pipe pipe, bool enabled) {
> +     igt_pipe_set_prop_value(&data->display, pipe, IGT_CRTC_VRR_ENABLED,
> +                             enabled);
> +     igt_display_commit2(&data->display, COMMIT_ATOMIC); }
> +
> +static void prepare_test(
> +             data_t *data,
> +             igt_output_t *output,
> +             enum pipe pipe,
> +             drmModeModeInfo *mode)
> +{
> +     /* Reset output */
> +     igt_display_reset(&data->display);
> +     igt_output_set_pipe(output, pipe);
> +
> +     igt_output_override_mode(output, mode);
> +
> +     /* Prepare resources */
> +     if (!data->fb_initialized) {
> +             igt_create_fb(data->drm_fd, mode->hdisplay, mode->vdisplay,
> +                             DRM_FORMAT_XRGB8888, DRM_FORMAT_MOD_LINEAR, &data->fbs[0]);
> +
> +             igt_create_fb(data->drm_fd, mode->hdisplay, mode->vdisplay,
> +                             DRM_FORMAT_XRGB8888, DRM_FORMAT_MOD_LINEAR, &data->fbs[1]);
> +             data->fb_mem[0] = igt_fb_map_buffer(data->drm_fd, &data->fbs[0]);
> +             data->fb_mem[1] = igt_fb_map_buffer(data->drm_fd, &data->fbs[1]);
> +             data->fb_initialized = true;
> +     }
> +
> +     fbmem_draw_smpte_pattern(data->fb_mem[0], data->hdisplay, data->vdisplay);
> +     fbmem_draw_smpte_pattern(data->fb_mem[1], data->hdisplay,
> +data->vdisplay);
> +
> +     /* Take care of any required modesetting before the test begins. */
> +     data->primary = igt_output_get_plane_type(output, DRM_PLANE_TYPE_PRIMARY);
> +     igt_plane_set_fb(data->primary, &data->fbs[0]);
> +
> +     /* Clear vrr_enabled state before enabling it, because
> +      * it might be left enabled if the previous test fails.
> +      */
> +     igt_pipe_set_prop_value(&data->display, pipe, IGT_CRTC_VRR_ENABLED,
> +0);
> +
> +     igt_display_commit2(&data->display, COMMIT_ATOMIC); }
> +
> +/* Performs an atomic non-blocking page-flip on a pipe. */ static void
> +do_flip(data_t *data) {
> +     int ret;
> +     igt_fb_t *fb = &(data->fbs[data->front]);
> +
> +     igt_set_timeout(1, "Scheduling page flip\n");
> +     igt_plane_set_fb(data->primary, fb);
> +
> +     do {
> +             ret = igt_display_try_commit_atomic(&data->display,
> +                               DRM_MODE_ATOMIC_NONBLOCK |
> +                               DRM_MODE_PAGE_FLIP_EVENT,
> +                               data);
> +     } while (ret == -EBUSY);
> +
> +     igt_assert_eq(ret, 0);
> +     igt_reset_timeout();
> +}
> +
> +/*
> + * Flips at the given rate and measures against the expected value.
> + * Returns the pass rate as a percentage from 0 - 100.
> + *
> + * The VRR API is quite flexible in terms of definition - the driver
> + * can arbitrarily restrict the bounds further than the absolute
> + * min and max range. But VRR is really about extending the flip
> + * to prevent stuttering or to match a source content rate.
> + */
> +static uint32_t
> +flip_and_measure(
> +             data_t *data,
> +             igt_output_t *output,
> +             enum pipe pipe,
> +             uint64_t interval_ns,
> +             uint64_t duration_ns,
> +             int anim_type)
> +{
> +     uint64_t start_ns, last_event_ns, target_ns;
> +     uint32_t total_flip = 0, total_pass = 0;
> +
> +     /* Align with the flip completion event to speed up convergence. */
> +     do_flip(data);
> +     start_ns = last_event_ns = target_ns = get_kernel_event_ns(data,
> +                                                     DRM_EVENT_FLIP_COMPLETE);
> +     igt_info("interval_ns=%lu\n", interval_ns);
> +
> +     for (;;) {
> +             uint64_t event_ns;
> +             int64_t diff_ns;
> +
> +             data->front = !data->front;
> +             if (anim_type == ANIM_TYPE_CIRCLE_WAVE)
> +                     sprite_anim(data, data->fb_mem[data->front]);
> +             do_flip(data);
> +
> +             /* We need to capture flip event instead of vblank event,
> +              * because vblank is triggered after each frame, but depending
> +              * on the vblank evasion time flip might or might not happen in
> +              * that same frame.
> +              */
> +             event_ns = get_kernel_event_ns(data, DRM_EVENT_FLIP_COMPLETE);
> +             igt_debug("event_ns - last_event_ns: %"PRIu64"\n",
> +                                             (event_ns - last_event_ns));
> +
> +             /*
> +              * Check if the difference between the two flip timestamps
> +              * was within the required threshold from the expected rate.
> +              *
> +              * A ~50us threshold is arbitrary, but it's roughly the
> +              * difference between 144Hz and 143Hz which should give this
> +              * enough accuracy for most use cases.
> +              */
> +             diff_ns = interval_ns;
> +             diff_ns -= event_ns - last_event_ns;
> +             if (llabs(diff_ns) < 50000ll)
> +                     total_pass += 1;
> +
> +             last_event_ns = event_ns;
> +             total_flip += 1;
> +
> +             if (event_ns - start_ns > duration_ns)
> +                     break;
> +     }
> +
> +     igt_info("Completed %u flips, %u were in threshold for (%llu Hz) %"PRIu64"ns.\n",
> +              total_flip, total_pass, (NSECS_PER_SEC / interval_ns), interval_ns);
> +
> +     return total_flip ? ((total_pass * 100) / total_flip) : 0; }
> +
> +static void init_data(data_t *data, igt_output_t *output) {
> +     int i;
> +     uint32_t pm_hdisplay, pm_vdisplay, max_clk = 0;
> +     drmModeModeInfo *preferred_mode;
> +     drmModeConnector *connector;
> +
> +     connector = data->connector = output->config.connector;
> +     data->count_modes = connector->count_modes;
> +     data->modes = (drmModeModeInfo *)malloc(sizeof(drmModeModeInfo) *
> +data->count_modes);
> +
> +     for (i = 0; i < data->count_modes; i++) {
> +             data->modes[i] = connector->modes[i]; #ifdef FSV_DEBUG
> +             igt_info("mode %d:", i);
> +             kmstest_dump_mode(&data->modes[i]);
> +#endif
> +     }
> +
> +     /* searching the preferred mode */
> +        for (i = 0; i < connector->count_modes; i++) {
> +                drmModeModeInfo *mode = &connector->modes[i];
> +
> +                if (mode->type & DRM_MODE_TYPE_PREFERRED) {
> +                        data->preferred_mode_index = i;
> +                     data->hdisplay = mode->hdisplay;
> +                     data->vdisplay = mode->vdisplay;
> +                     pm_hdisplay = preferred_mode->hdisplay;
> +                     pm_vdisplay = preferred_mode->vdisplay;
> +                     break;
> +                }
> +        }
> +
> +        /* searching the base mode; */
> +        for (i = 0; i < connector->count_modes; i++) {
> +                drmModeModeInfo *mode = &connector->modes[i];
> +                if (mode->hdisplay == pm_hdisplay && mode->vdisplay == pm_vdisplay) {
> +                        if (mode->clock > max_clk) {
> +                                max_clk = mode->clock;
> +                                data->base_mode_index = i;
> +                        }
> +                }
> +        }
> +        igt_info("preferred=%d, base=%d\n", data->preferred_mode_index,
> + data->base_mode_index);
> +
> +        for (i = 0; i < connector->count_modes; i++) {
> +                drmModeModeInfo *mode = &connector->modes[i];
> +                if (is_freesync_video_mode(data, mode))
> +                        igt_debug("mode[%d] is freesync video mode.\n", i);
> +        }
> +
> +     data->range = get_vrr_range(data, output); }
> +
> +static void finish_test(data_t *data, enum pipe pipe, igt_output_t
> +*output) {
> +     set_vrr_on_pipe(data, pipe, 0);
> +     igt_plane_set_fb(data->primary, NULL);
> +     igt_output_set_pipe(output, PIPE_NONE);
> +     igt_output_override_mode(output, NULL);
> +     igt_display_commit2(&data->display, COMMIT_ATOMIC);
> +
> +     igt_fb_unmap_buffer(&data->fbs[1], data->fb_mem[1]);
> +     igt_fb_unmap_buffer(&data->fbs[0], data->fb_mem[0]);
> +     igt_remove_fb(data->drm_fd, &data->fbs[1]);
> +     igt_remove_fb(data->drm_fd, &data->fbs[0]); }
> +
> +static void
> +mode_transition(data_t *data, enum pipe pipe, igt_output_t *output,
> +uint32_t scene) {
> +     uint32_t result;
> +     uint64_t interval;
> +     drmModeModeInfo *mode_start = NULL, *mode_playback = NULL,
> +mode_custom;
> +
> +     init_data(data, output);
> +     sprite_anim_init();
> +
> +     igt_info("stage-1:\n");
> +     switch(scene) {
> +        case SCENE_BASE_MODE_TO_VARIOUS_FSV_MODE:
> +             mode_start = select_mode(data, FSV_BASE_MODE, 0);
> +                mode_playback  = select_mode(data, FSV_FREESYNC_VIDEO_MODE, 60);
> +             break;
> +        case SCENE_LOWER_FSV_MODE_TO_HIGHER_FSV_MODE:
> +             mode_start = select_mode(data, FSV_FREESYNC_VIDEO_MODE, 60);
> +                mode_playback = select_mode(data, FSV_FREESYNC_VIDEO_MODE, 120);
> +             break;
> +        case SCENE_NON_FSV_MODE_TO_FSV_MODE:
> +             mode_start = select_mode(data, FSV_NON_FREESYNC_VIDEO_MODE, 60);
> +                mode_playback = select_mode(data, FSV_FREESYNC_VIDEO_MODE, 60);
> +             break;
> +        case SCENE_BASE_MODE_TO_CUSTUM_MODE:
> +             mode_start = select_mode(data, FSV_BASE_MODE, 0);
> +             prepare_custom_mode(data, &mode_custom, 72);
> +             mode_playback = &mode_custom;
> +             break;
> +     case SCENE_NON_FSV_MODE_TO_NON_FSV_MODE:
> +             mode_start = select_mode(data, FSV_NON_FREESYNC_VIDEO_MODE, 120);
> +             mode_playback = select_mode(data, FSV_NON_FREESYNC_VIDEO_MODE, 100);
> +             break;
> +     default:
> +             igt_warn("Undefined test scene: %d", scene);
> +             break;
> +     }
> +     igt_assert_f(mode_start && mode_playback,
> +                     "Failure on selecting mode with given type and refresh rate.\n");
> +     prepare_test(data, output, pipe, mode_start);
> +     interval = nsec_per_frame(mode_start->vrefresh) ;
> +     set_vrr_on_pipe(data, pipe, 1);
> +     result = flip_and_measure(data, output, pipe, interval,
> +TEST_DURATION_NS, ANIM_TYPE_SMPTE);
> +
> +     igt_info("stage-2: simple animation as video playback\n");
> +     prepare_test(data, output, pipe, mode_playback);
> +     interval = nsec_per_frame(mode_playback->vrefresh) ;
> +     result = flip_and_measure(data, output, pipe, interval, TEST_DURATION_NS, ANIM_TYPE_CIRCLE_WAVE);
> +     igt_assert_f(result > 90, "Target refresh rate not
> +meet(result=%d%%\n", result);
> +
> +     finish_test(data, pipe, output);
> +}
> +
> +static void
> +run_test(data_t *data, uint32_t scene)
> +{
> +     igt_output_t *output;
> +     bool found = false;
> +
> +     for_each_connected_output(&data->display, output) {
> +             enum pipe pipe;
> +
> +             if (!has_vrr(output))
> +                     continue;
> +
> +             for_each_pipe(&data->display, pipe)
> +                     if (igt_pipe_connector_valid(pipe, output)) {
> +                             mode_transition(data, pipe, output, scene);
> +                             found = true;
> +                             break;
> +                     }
> +     }
> +
> +     if (!found)
> +             igt_skip("No vrr capable outputs found.\n"); }
> +
> +igt_main
> +{
> +     data_t data = {};
> +     memset(&data, 0, sizeof(data));
> +
> +     igt_fixture {
> +             data.drm_fd = drm_open_driver_master(DRIVER_AMDGPU);
> +             if (data.drm_fd == -1) {
> +                     igt_skip("Not an amdgpu driver.\n");
> +             }
> +             kmstest_set_vt_graphics_mode();
> +             igt_display_require(&data.display, data.drm_fd);
> +             igt_require(data.display.is_atomic);
> +             igt_display_require_output(&data.display);
> +     }
> +
> +     /* Expectation: Modeset happens instantaneously without blanking */
> +        igt_describe("Test switch from base freesync mode to " \
> +                     "various freesync video modes");
> +        igt_subtest("freesync-base-to-various")
> +             run_test(&data, SCENE_BASE_MODE_TO_VARIOUS_FSV_MODE);
> +
> +     /* Expectation: Modeset happens instantaneously without blanking */
> +        igt_describe("Test switching from lower refresh freesync mode to " \
> +                     "another freesync mode with higher refresh rate");
> +        igt_subtest("freesync-lower-to-higher")
> +             run_test(&data, SCENE_LOWER_FSV_MODE_TO_HIGHER_FSV_MODE);
> +
> +     /* Expectation: Full modeset is triggered. */
> +        igt_describe("Test switching from non preferred video mode to " \
> +                     "one of freesync video mode");
> +        igt_subtest("freesync-non-preferred-to-freesync")
> +             run_test(&data, SCENE_NON_FSV_MODE_TO_FSV_MODE);
> +
> +     /* Expectation: Modeset happens instantaneously without blanking */
> +        igt_describe("Add custom mode through xrandr based on " \
> +                     "base freesync mode and apply the new mode");
> +        igt_subtest("freesync-custom-mode")
> +             run_test(&data, SCENE_BASE_MODE_TO_CUSTUM_MODE);
> +
> +        igt_info("end of test\n");
> +
> +     igt_fixture {
> +             igt_display_fini(&data.display);
> +     }
> +}

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2022-03-07 16:05 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-03-05  4:12 [igt-dev] [PATCH i-g-t v4] tests/amdgpu: new test for Freesync-Video Mode Solomon Chiu
2022-03-05  5:02 ` [igt-dev] ✓ Fi.CI.BAT: success for tests/amdgpu: new test for Freesync-Video Mode (rev5) Patchwork
2022-03-05  9:59 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork
2022-03-07 16:05 ` [igt-dev] [i-g-t, v4] tests/amdgpu: new test for Freesync-Video Mode Lin, Wayne

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