* [Intel-gfx] [PATCH] drm/i915/dmc: Add DMC_EVT_HTP and DMC_EVT_CTL programming
@ 2022-03-28 15:34 Anusha Srivatsa
2022-03-28 22:51 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
` (4 more replies)
0 siblings, 5 replies; 6+ messages in thread
From: Anusha Srivatsa @ 2022-03-28 15:34 UTC (permalink / raw)
To: intel-gfx
We need add some checks around DMC reloading to
prevents the rare possibility of some adversary
writing to a random mmio register
BSpec: 49193
Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
.../drm/i915/display/intel_display_power.c | 23 +++++++++++++++++++
drivers/gpu/drm/i915/i915_reg.h | 10 ++++++++
2 files changed, 33 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 3dc859032bac..81cc4c658e3f 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -29,6 +29,8 @@
#include "intel_vga.h"
#include "vlv_sideband.h"
+#define DMC_EVT_HTP_CTL_MAX 8
+
const char *
intel_display_power_domain_str(enum intel_display_power_domain domain)
{
@@ -1101,6 +1103,26 @@ static void gen9_assert_dbuf_enabled(struct drm_i915_private *dev_priv)
enabled_dbuf_slices);
}
+static void tgl_dmc_mmio_prog(struct drm_i915_private *dev_priv)
+{
+ struct intel_dmc *dmc = &dev_priv->dmc;
+ int i, id;
+
+ for (i = 0; i <= DMC_EVT_HTP_CTL_MAX; i++) {
+ intel_de_write(dev_priv, TGL_MAIN_DMC_EVT_CTL(i), DMC_EVT_CTL_VAL);
+ intel_de_write(dev_priv, TGL_MAIN_DMC_EVT_HTP(i), DMC_EVT_HTP_VAL);
+ }
+ /* Pipe DMC MMIOs */
+ for (id = 1; i <= DMC_FW_MAX; id++) {
+ for (i = 0; i <= DMC_EVT_HTP_CTL_MAX; i++) {
+ intel_de_write(dev_priv, PIPEDMC_EVT_CTL_OFFSET(dmc->dmc_info[id].start_mmioaddr, i),
+ DMC_EVT_CTL_VAL);
+ intel_de_write(dev_priv, PIPEDMC_EVT_HTP_OFFSET(dmc->dmc_info[id].start_mmioaddr, i),
+ DMC_EVT_HTP_VAL);
+ }
+ }
+}
+
static void gen9_disable_dc_states(struct drm_i915_private *dev_priv)
{
struct intel_cdclk_config cdclk_config = {};
@@ -1139,6 +1161,7 @@ static void gen9_dc_off_power_well_enable(struct drm_i915_private *dev_priv,
struct i915_power_well *power_well)
{
gen9_disable_dc_states(dev_priv);
+ tgl_dmc_mmio_prog(dev_priv);
}
static void gen9_dc_off_power_well_disable(struct drm_i915_private *dev_priv,
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index a0d652f19ff9..7e3ef777c26d 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -5525,6 +5525,16 @@
#define TGL_DMC_DEBUG3 _MMIO(0x101090)
#define DG1_DMC_DEBUG3 _MMIO(0x13415c)
+/* Main DMC EVT_HTP and EVT_CTL registers */
+#define DMC_EVT_CTL_VAL 0x00030100
+#define DMC_EVT_HTP_VAL 0x00000000
+#define TGL_MAIN_DMC_EVT_HTP(n) _MMIO(0x8F004 + (n) * 4)
+#define TGL_MAIN_DMC_EVT_CTL(n) _MMIO(0x8F034 + (n) * 4)
+#define PIPEDMC_EVT_HTP_BASE 0x00004
+#define PIPEDMC_EVT_CTL_BASE 0x00034
+#define PIPEDMC_EVT_HTP_OFFSET(addr, i) _MMIO(addr + PIPEDMC_EVT_HTP_BASE + (i * 4))
+#define PIPEDMC_EVT_CTL_OFFSET(addr, i) _MMIO(addr + PIPEDMC_EVT_CTL_BASE + (i * 4))
+
/* Display Internal Timeout Register */
#define RM_TIMEOUT _MMIO(0x42060)
#define MMIO_TIMEOUT_US(us) ((us) << 0)
--
2.25.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/dmc: Add DMC_EVT_HTP and DMC_EVT_CTL programming
2022-03-28 15:34 [Intel-gfx] [PATCH] drm/i915/dmc: Add DMC_EVT_HTP and DMC_EVT_CTL programming Anusha Srivatsa
@ 2022-03-28 22:51 ` Patchwork
2022-03-28 22:52 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
` (3 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2022-03-28 22:51 UTC (permalink / raw)
To: Anusha Srivatsa; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/dmc: Add DMC_EVT_HTP and DMC_EVT_CTL programming
URL : https://patchwork.freedesktop.org/series/101891/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
b4b5cbd62645 drm/i915/dmc: Add DMC_EVT_HTP and DMC_EVT_CTL programming
-:44: WARNING:LONG_LINE: line length of 109 exceeds 100 columns
#44: FILE: drivers/gpu/drm/i915/display/intel_display_power.c:1118:
+ intel_de_write(dev_priv, PIPEDMC_EVT_CTL_OFFSET(dmc->dmc_info[id].start_mmioaddr, i),
-:45: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#45: FILE: drivers/gpu/drm/i915/display/intel_display_power.c:1119:
+ intel_de_write(dev_priv, PIPEDMC_EVT_CTL_OFFSET(dmc->dmc_info[id].start_mmioaddr, i),
+ DMC_EVT_CTL_VAL);
-:46: WARNING:LONG_LINE: line length of 109 exceeds 100 columns
#46: FILE: drivers/gpu/drm/i915/display/intel_display_power.c:1120:
+ intel_de_write(dev_priv, PIPEDMC_EVT_HTP_OFFSET(dmc->dmc_info[id].start_mmioaddr, i),
-:47: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#47: FILE: drivers/gpu/drm/i915/display/intel_display_power.c:1121:
+ intel_de_write(dev_priv, PIPEDMC_EVT_HTP_OFFSET(dmc->dmc_info[id].start_mmioaddr, i),
+ DMC_EVT_HTP_VAL);
-:78: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'addr' may be better as '(addr)' to avoid precedence issues
#78: FILE: drivers/gpu/drm/i915/i915_reg.h:5535:
+#define PIPEDMC_EVT_HTP_OFFSET(addr, i) _MMIO(addr + PIPEDMC_EVT_HTP_BASE + (i * 4))
-:78: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'i' may be better as '(i)' to avoid precedence issues
#78: FILE: drivers/gpu/drm/i915/i915_reg.h:5535:
+#define PIPEDMC_EVT_HTP_OFFSET(addr, i) _MMIO(addr + PIPEDMC_EVT_HTP_BASE + (i * 4))
-:79: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'addr' may be better as '(addr)' to avoid precedence issues
#79: FILE: drivers/gpu/drm/i915/i915_reg.h:5536:
+#define PIPEDMC_EVT_CTL_OFFSET(addr, i) _MMIO(addr + PIPEDMC_EVT_CTL_BASE + (i * 4))
-:79: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'i' may be better as '(i)' to avoid precedence issues
#79: FILE: drivers/gpu/drm/i915/i915_reg.h:5536:
+#define PIPEDMC_EVT_CTL_OFFSET(addr, i) _MMIO(addr + PIPEDMC_EVT_CTL_BASE + (i * 4))
total: 0 errors, 2 warnings, 6 checks, 57 lines checked
^ permalink raw reply [flat|nested] 6+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/dmc: Add DMC_EVT_HTP and DMC_EVT_CTL programming
2022-03-28 15:34 [Intel-gfx] [PATCH] drm/i915/dmc: Add DMC_EVT_HTP and DMC_EVT_CTL programming Anusha Srivatsa
2022-03-28 22:51 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
@ 2022-03-28 22:52 ` Patchwork
2022-03-28 22:56 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
` (2 subsequent siblings)
4 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2022-03-28 22:52 UTC (permalink / raw)
To: Anusha Srivatsa; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/dmc: Add DMC_EVT_HTP and DMC_EVT_CTL programming
URL : https://patchwork.freedesktop.org/series/101891/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
^ permalink raw reply [flat|nested] 6+ messages in thread
* [Intel-gfx] ✗ Fi.CI.DOCS: warning for drm/i915/dmc: Add DMC_EVT_HTP and DMC_EVT_CTL programming
2022-03-28 15:34 [Intel-gfx] [PATCH] drm/i915/dmc: Add DMC_EVT_HTP and DMC_EVT_CTL programming Anusha Srivatsa
2022-03-28 22:51 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2022-03-28 22:52 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
@ 2022-03-28 22:56 ` Patchwork
2022-03-28 23:09 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2022-04-01 12:47 ` [Intel-gfx] [PATCH] " Jani Nikula
4 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2022-03-28 22:56 UTC (permalink / raw)
To: Anusha Srivatsa; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/dmc: Add DMC_EVT_HTP and DMC_EVT_CTL programming
URL : https://patchwork.freedesktop.org/series/101891/
State : warning
== Summary ==
$ make htmldocs 2>&1 > /dev/null | grep i915
./drivers/gpu/drm/i915/display/intel_drrs.c:1: warning: 'intel_drrs_enable' not found
./drivers/gpu/drm/i915/display/intel_drrs.c:1: warning: 'intel_drrs_disable' not found
^ permalink raw reply [flat|nested] 6+ messages in thread
* [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/dmc: Add DMC_EVT_HTP and DMC_EVT_CTL programming
2022-03-28 15:34 [Intel-gfx] [PATCH] drm/i915/dmc: Add DMC_EVT_HTP and DMC_EVT_CTL programming Anusha Srivatsa
` (2 preceding siblings ...)
2022-03-28 22:56 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
@ 2022-03-28 23:09 ` Patchwork
2022-04-01 12:47 ` [Intel-gfx] [PATCH] " Jani Nikula
4 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2022-03-28 23:09 UTC (permalink / raw)
To: Anusha Srivatsa; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 13220 bytes --]
== Series Details ==
Series: drm/i915/dmc: Add DMC_EVT_HTP and DMC_EVT_CTL programming
URL : https://patchwork.freedesktop.org/series/101891/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11415 -> Patchwork_22702
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_22702 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_22702, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22702/index.html
Participating hosts (43 -> 31)
------------------------------
Missing (12): fi-bdw-samus bat-dg1-6 bat-dg2-8 bat-dg2-9 fi-bsw-cyan bat-adlp-6 bat-adlp-4 fi-pnv-d510 bat-rpls-1 bat-rpls-2 bat-jsl-2 bat-jsl-1
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_22702:
### IGT changes ###
#### Possible regressions ####
* igt@runner@aborted:
- fi-rkl-guc: NOTRUN -> [FAIL][1]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22702/fi-rkl-guc/igt@runner@aborted.html
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@runner@aborted:
- {fi-rkl-11600}: [FAIL][2] ([i915#4312]) -> [FAIL][3]
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11415/fi-rkl-11600/igt@runner@aborted.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22702/fi-rkl-11600/igt@runner@aborted.html
- {fi-jsl-1}: [FAIL][4] ([i915#4312]) -> [FAIL][5]
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11415/fi-jsl-1/igt@runner@aborted.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22702/fi-jsl-1/igt@runner@aborted.html
- {fi-adl-ddr5}: [FAIL][6] ([i915#4312]) -> [FAIL][7]
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11415/fi-adl-ddr5/igt@runner@aborted.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22702/fi-adl-ddr5/igt@runner@aborted.html
- {fi-ehl-2}: [FAIL][8] ([i915#4312]) -> [FAIL][9]
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11415/fi-ehl-2/igt@runner@aborted.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22702/fi-ehl-2/igt@runner@aborted.html
Known issues
------------
Here are the changes found in Patchwork_22702 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@amdgpu/amd_basic@cs-gfx:
- fi-hsw-4770: NOTRUN -> [SKIP][10] ([fdo#109271] / [fdo#109315]) +17 similar issues
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22702/fi-hsw-4770/igt@amdgpu/amd_basic@cs-gfx.html
* igt@core_hotunplug@unbind-rebind:
- fi-snb-2520m: NOTRUN -> [INCOMPLETE][11] ([i915#5441])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22702/fi-snb-2520m/igt@core_hotunplug@unbind-rebind.html
* igt@gem_render_linear_blits@basic:
- fi-ilk-650: [PASS][12] -> [INCOMPLETE][13] ([i915#5441])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11415/fi-ilk-650/igt@gem_render_linear_blits@basic.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22702/fi-ilk-650/igt@gem_render_linear_blits@basic.html
* igt@gem_softpin@allocator-basic-reserve:
- fi-elk-e7500: NOTRUN -> [SKIP][14] ([fdo#109271]) +1 similar issue
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22702/fi-elk-e7500/igt@gem_softpin@allocator-basic-reserve.html
* igt@gem_tiled_blits@basic:
- fi-elk-e7500: NOTRUN -> [INCOMPLETE][15] ([i915#5441])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22702/fi-elk-e7500/igt@gem_tiled_blits@basic.html
* igt@i915_pm_backlight@basic-brightness:
- fi-hsw-4770: NOTRUN -> [SKIP][16] ([fdo#109271] / [i915#3012])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22702/fi-hsw-4770/igt@i915_pm_backlight@basic-brightness.html
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-hsw-4770: NOTRUN -> [SKIP][17] ([fdo#109271] / [fdo#111827]) +8 similar issues
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22702/fi-hsw-4770/igt@kms_chamelium@common-hpd-after-suspend.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-snb-2520m: NOTRUN -> [SKIP][18] ([fdo#109271] / [fdo#111827]) +8 similar issues
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22702/fi-snb-2520m/igt@kms_chamelium@hdmi-hpd-fast.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c:
- fi-snb-2520m: NOTRUN -> [SKIP][19] ([fdo#109271] / [i915#5341])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22702/fi-snb-2520m/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html
- fi-blb-e6850: NOTRUN -> [SKIP][20] ([fdo#109271] / [i915#5341])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22702/fi-blb-e6850/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-c.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
- fi-blb-e6850: NOTRUN -> [SKIP][21] ([fdo#109271]) +47 similar issues
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22702/fi-blb-e6850/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html
- fi-hsw-4770: NOTRUN -> [SKIP][22] ([fdo#109271] / [i915#533])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22702/fi-hsw-4770/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html
* igt@kms_psr@primary_mmap_gtt:
- fi-hsw-4770: NOTRUN -> [SKIP][23] ([fdo#109271] / [i915#1072]) +3 similar issues
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22702/fi-hsw-4770/igt@kms_psr@primary_mmap_gtt.html
* igt@kms_setmode@basic-clone-single-crtc:
- fi-snb-2520m: NOTRUN -> [SKIP][24] ([fdo#109271]) +11 similar issues
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22702/fi-snb-2520m/igt@kms_setmode@basic-clone-single-crtc.html
* igt@prime_vgem@basic-userptr:
- fi-hsw-4770: NOTRUN -> [SKIP][25] ([fdo#109271]) +2 similar issues
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22702/fi-hsw-4770/igt@prime_vgem@basic-userptr.html
* igt@runner@aborted:
- fi-kbl-guc: NOTRUN -> [FAIL][26] ([i915#5257])
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22702/fi-kbl-guc/igt@runner@aborted.html
#### Possible fixes ####
* igt@core_hotunplug@unbind-rebind:
- {fi-hsw-g3258}: [INCOMPLETE][27] ([i915#5441]) -> [PASS][28]
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11415/fi-hsw-g3258/igt@core_hotunplug@unbind-rebind.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22702/fi-hsw-g3258/igt@core_hotunplug@unbind-rebind.html
* igt@gem_render_linear_blits@basic:
- fi-elk-e7500: [INCOMPLETE][29] ([i915#5441]) -> [PASS][30]
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11415/fi-elk-e7500/igt@gem_render_linear_blits@basic.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22702/fi-elk-e7500/igt@gem_render_linear_blits@basic.html
* igt@gem_render_tiled_blits@basic:
- fi-blb-e6850: [INCOMPLETE][31] ([i915#5441]) -> [PASS][32]
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11415/fi-blb-e6850/igt@gem_render_tiled_blits@basic.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22702/fi-blb-e6850/igt@gem_render_tiled_blits@basic.html
* igt@gem_tiled_blits@basic:
- fi-hsw-4770: [INCOMPLETE][33] ([i915#5441]) -> [PASS][34]
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11415/fi-hsw-4770/igt@gem_tiled_blits@basic.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22702/fi-hsw-4770/igt@gem_tiled_blits@basic.html
- fi-snb-2520m: [INCOMPLETE][35] ([i915#5441]) -> [PASS][36]
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11415/fi-snb-2520m/igt@gem_tiled_blits@basic.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22702/fi-snb-2520m/igt@gem_tiled_blits@basic.html
#### Warnings ####
* igt@runner@aborted:
- fi-cfl-8109u: [FAIL][37] ([i915#4312]) -> [FAIL][38] ([i915#5257])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11415/fi-cfl-8109u/igt@runner@aborted.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22702/fi-cfl-8109u/igt@runner@aborted.html
- fi-glk-dsi: [FAIL][39] ([i915#4312] / [k.org#202321]) -> [FAIL][40] ([i915#5257] / [k.org#202321])
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11415/fi-glk-dsi/igt@runner@aborted.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22702/fi-glk-dsi/igt@runner@aborted.html
- fi-kbl-8809g: [FAIL][41] ([i915#4312]) -> [FAIL][42] ([i915#5257])
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11415/fi-kbl-8809g/igt@runner@aborted.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22702/fi-kbl-8809g/igt@runner@aborted.html
- fi-apl-guc: [FAIL][43] ([i915#4312]) -> [FAIL][44] ([i915#5257])
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11415/fi-apl-guc/igt@runner@aborted.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22702/fi-apl-guc/igt@runner@aborted.html
- fi-kbl-soraka: [FAIL][45] ([i915#4312]) -> [FAIL][46] ([i915#5257])
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11415/fi-kbl-soraka/igt@runner@aborted.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22702/fi-kbl-soraka/igt@runner@aborted.html
- fi-kbl-7500u: [FAIL][47] ([i915#4312]) -> [FAIL][48] ([i915#5257])
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11415/fi-kbl-7500u/igt@runner@aborted.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22702/fi-kbl-7500u/igt@runner@aborted.html
- fi-bxt-dsi: [FAIL][49] ([i915#4312]) -> [FAIL][50] ([i915#5257])
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11415/fi-bxt-dsi/igt@runner@aborted.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22702/fi-bxt-dsi/igt@runner@aborted.html
- fi-tgl-1115g4: [FAIL][51] ([i915#4312]) -> [FAIL][52] ([i915#5257])
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11415/fi-tgl-1115g4/igt@runner@aborted.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22702/fi-tgl-1115g4/igt@runner@aborted.html
- fi-cfl-guc: [FAIL][53] ([i915#4312]) -> [FAIL][54] ([i915#5257])
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11415/fi-cfl-guc/igt@runner@aborted.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22702/fi-cfl-guc/igt@runner@aborted.html
- fi-glk-j4005: [FAIL][55] ([i915#4312] / [k.org#202321]) -> [FAIL][56] ([i915#5257] / [k.org#202321])
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11415/fi-glk-j4005/igt@runner@aborted.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22702/fi-glk-j4005/igt@runner@aborted.html
- fi-kbl-7567u: [FAIL][57] ([i915#4312]) -> [FAIL][58] ([i915#5257])
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11415/fi-kbl-7567u/igt@runner@aborted.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22702/fi-kbl-7567u/igt@runner@aborted.html
- fi-skl-6700k2: [FAIL][59] ([i915#4312]) -> [FAIL][60] ([i915#5257])
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11415/fi-skl-6700k2/igt@runner@aborted.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22702/fi-skl-6700k2/igt@runner@aborted.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#3012]: https://gitlab.freedesktop.org/drm/intel/issues/3012
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#5257]: https://gitlab.freedesktop.org/drm/intel/issues/5257
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
[i915#5341]: https://gitlab.freedesktop.org/drm/intel/issues/5341
[i915#5441]: https://gitlab.freedesktop.org/drm/intel/issues/5441
[k.org#202321]: https://bugzilla.kernel.org/show_bug.cgi?id=202321
Build changes
-------------
* Linux: CI_DRM_11415 -> Patchwork_22702
CI-20190529: 20190529
CI_DRM_11415: a7a8e278572965d6f5e66a31b64b96b07f94551f @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6399: 9ba6cb16f04319226383b57975db203561c75781 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_22702: b4b5cbd6264572451b7632aa4f3384f13e7e0e08 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
b4b5cbd62645 drm/i915/dmc: Add DMC_EVT_HTP and DMC_EVT_CTL programming
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22702/index.html
[-- Attachment #2: Type: text/html, Size: 17923 bytes --]
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/dmc: Add DMC_EVT_HTP and DMC_EVT_CTL programming
2022-03-28 15:34 [Intel-gfx] [PATCH] drm/i915/dmc: Add DMC_EVT_HTP and DMC_EVT_CTL programming Anusha Srivatsa
` (3 preceding siblings ...)
2022-03-28 23:09 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
@ 2022-04-01 12:47 ` Jani Nikula
4 siblings, 0 replies; 6+ messages in thread
From: Jani Nikula @ 2022-04-01 12:47 UTC (permalink / raw)
To: Anusha Srivatsa, intel-gfx
On Mon, 28 Mar 2022, Anusha Srivatsa <anusha.srivatsa@intel.com> wrote:
> We need add some checks around DMC reloading to
> prevents the rare possibility of some adversary
> writing to a random mmio register
I've recently merged cleanup to localize all DMC register definitions to
a new file display/intel_dmc_regs.h, and all DMC register access to
intel_dmc.c.
Basically if it's about DMC, it should be in intel_dmc.c, not spread
around.
BR,
Jani.
>
> BSpec: 49193
>
> Cc: Imre Deak <imre.deak@intel.com>
> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> ---
> .../drm/i915/display/intel_display_power.c | 23 +++++++++++++++++++
> drivers/gpu/drm/i915/i915_reg.h | 10 ++++++++
> 2 files changed, 33 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> index 3dc859032bac..81cc4c658e3f 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> @@ -29,6 +29,8 @@
> #include "intel_vga.h"
> #include "vlv_sideband.h"
>
> +#define DMC_EVT_HTP_CTL_MAX 8
> +
> const char *
> intel_display_power_domain_str(enum intel_display_power_domain domain)
> {
> @@ -1101,6 +1103,26 @@ static void gen9_assert_dbuf_enabled(struct drm_i915_private *dev_priv)
> enabled_dbuf_slices);
> }
>
> +static void tgl_dmc_mmio_prog(struct drm_i915_private *dev_priv)
> +{
> + struct intel_dmc *dmc = &dev_priv->dmc;
> + int i, id;
> +
> + for (i = 0; i <= DMC_EVT_HTP_CTL_MAX; i++) {
> + intel_de_write(dev_priv, TGL_MAIN_DMC_EVT_CTL(i), DMC_EVT_CTL_VAL);
> + intel_de_write(dev_priv, TGL_MAIN_DMC_EVT_HTP(i), DMC_EVT_HTP_VAL);
> + }
> + /* Pipe DMC MMIOs */
> + for (id = 1; i <= DMC_FW_MAX; id++) {
> + for (i = 0; i <= DMC_EVT_HTP_CTL_MAX; i++) {
> + intel_de_write(dev_priv, PIPEDMC_EVT_CTL_OFFSET(dmc->dmc_info[id].start_mmioaddr, i),
> + DMC_EVT_CTL_VAL);
> + intel_de_write(dev_priv, PIPEDMC_EVT_HTP_OFFSET(dmc->dmc_info[id].start_mmioaddr, i),
> + DMC_EVT_HTP_VAL);
> + }
> + }
> +}
> +
> static void gen9_disable_dc_states(struct drm_i915_private *dev_priv)
> {
> struct intel_cdclk_config cdclk_config = {};
> @@ -1139,6 +1161,7 @@ static void gen9_dc_off_power_well_enable(struct drm_i915_private *dev_priv,
> struct i915_power_well *power_well)
> {
> gen9_disable_dc_states(dev_priv);
> + tgl_dmc_mmio_prog(dev_priv);
> }
>
> static void gen9_dc_off_power_well_disable(struct drm_i915_private *dev_priv,
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index a0d652f19ff9..7e3ef777c26d 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -5525,6 +5525,16 @@
> #define TGL_DMC_DEBUG3 _MMIO(0x101090)
> #define DG1_DMC_DEBUG3 _MMIO(0x13415c)
>
> +/* Main DMC EVT_HTP and EVT_CTL registers */
> +#define DMC_EVT_CTL_VAL 0x00030100
> +#define DMC_EVT_HTP_VAL 0x00000000
> +#define TGL_MAIN_DMC_EVT_HTP(n) _MMIO(0x8F004 + (n) * 4)
> +#define TGL_MAIN_DMC_EVT_CTL(n) _MMIO(0x8F034 + (n) * 4)
> +#define PIPEDMC_EVT_HTP_BASE 0x00004
> +#define PIPEDMC_EVT_CTL_BASE 0x00034
> +#define PIPEDMC_EVT_HTP_OFFSET(addr, i) _MMIO(addr + PIPEDMC_EVT_HTP_BASE + (i * 4))
> +#define PIPEDMC_EVT_CTL_OFFSET(addr, i) _MMIO(addr + PIPEDMC_EVT_CTL_BASE + (i * 4))
> +
> /* Display Internal Timeout Register */
> #define RM_TIMEOUT _MMIO(0x42060)
> #define MMIO_TIMEOUT_US(us) ((us) << 0)
--
Jani Nikula, Intel Open Source Graphics Center
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2022-04-01 12:47 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-03-28 15:34 [Intel-gfx] [PATCH] drm/i915/dmc: Add DMC_EVT_HTP and DMC_EVT_CTL programming Anusha Srivatsa
2022-03-28 22:51 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for " Patchwork
2022-03-28 22:52 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-03-28 22:56 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2022-03-28 23:09 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2022-04-01 12:47 ` [Intel-gfx] [PATCH] " Jani Nikula
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.