* [igt-dev] [PATCH] tests/i915/gem_huc_copy: cover reset and suspend/resume scenarios
@ 2022-04-27 21:44 Daniele Ceraolo Spurio
2022-04-27 21:58 ` Ye, Tony
` (2 more replies)
0 siblings, 3 replies; 6+ messages in thread
From: Daniele Ceraolo Spurio @ 2022-04-27 21:44 UTC (permalink / raw)
To: igt-dev
Additional subtests have been added to make sure the HuC keeps working
after GT reset and suspend/resume.
Cc: Tony Ye <tony.ye@intel.com>
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
tests/i915/gem_huc_copy.c | 118 ++++++++++++++++++++++++++++----------
1 file changed, 89 insertions(+), 29 deletions(-)
diff --git a/tests/i915/gem_huc_copy.c b/tests/i915/gem_huc_copy.c
index ea32b705..ef577824 100644
--- a/tests/i915/gem_huc_copy.c
+++ b/tests/i915/gem_huc_copy.c
@@ -40,6 +40,13 @@ IGT_TEST_DESCRIPTION("A very simple workload for the HuC.");
#define HUC_COPY_DATA_BUF_SIZE 4096
+enum operation {
+ GPU_RESET,
+ SUSPEND_RESUME,
+ HIBERNATE_RESUME,
+ SIMPLE_COPY,
+};
+
static void
compare_huc_copy_result(int drm_fd, uint32_t src_handle, uint32_t dst_handle)
{
@@ -84,12 +91,77 @@ static void test_huc_load(int fd)
igt_fail_on_f(status == 0, "HuC firmware is not running!\n");
}
+static void huc_copy_test(int drm_fd, uint64_t ahnd,
+ igt_huc_copyfunc_t huc_copy, enum operation op)
+{
+ char inputs[HUC_COPY_DATA_BUF_SIZE];
+ struct drm_i915_gem_exec_object2 obj[3];
+ uint64_t objsize[3] = { HUC_COPY_DATA_BUF_SIZE,
+ HUC_COPY_DATA_BUF_SIZE,
+ 4096 };
+
+ switch (op) {
+ case GPU_RESET:
+ igt_force_gpu_reset(drm_fd);
+ break;
+
+ case SUSPEND_RESUME:
+ igt_system_suspend_autoresume(SUSPEND_STATE_MEM,
+ SUSPEND_TEST_NONE);
+ break;
+
+ case HIBERNATE_RESUME:
+ igt_system_suspend_autoresume(SUSPEND_STATE_DISK,
+ SUSPEND_TEST_NONE);
+ break;
+
+ case SIMPLE_COPY:
+ break;
+
+ default:
+ igt_assert(0);
+ }
+
+ test_huc_load(drm_fd);
+ /* Initialize src buffer randomly */
+ srand(time(NULL));
+ for (int i = 0; i < HUC_COPY_DATA_BUF_SIZE; i++)
+ inputs[i] = (char) (rand() % 256);
+
+ memset(obj, 0, sizeof(obj));
+ /* source buffer object for storing input */
+ obj[0].handle = gem_create(drm_fd, HUC_COPY_DATA_BUF_SIZE);
+ /* destination buffer object to receive input */
+ obj[1].handle = gem_create(drm_fd, HUC_COPY_DATA_BUF_SIZE);
+ /* execution buffer object */
+ obj[2].handle = gem_create(drm_fd, 4096);
+
+ gem_write(drm_fd, obj[0].handle, 0, inputs, HUC_COPY_DATA_BUF_SIZE);
+
+ huc_copy(drm_fd, ahnd, obj, objsize);
+ compare_huc_copy_result(drm_fd, obj[0].handle, obj[1].handle);
+
+ gem_close(drm_fd, obj[0].handle);
+ gem_close(drm_fd, obj[1].handle);
+ gem_close(drm_fd, obj[2].handle);
+}
+
igt_main
{
int drm_fd = -1;
uint32_t devid;
igt_huc_copyfunc_t huc_copy;
uint64_t ahnd;
+ const struct {
+ const char *name;
+ enum operation op;
+ } ops[] = {
+ { "", SIMPLE_COPY },
+ { "-after-reset", GPU_RESET },
+ { "-after-suspend-resume", SUSPEND_RESUME },
+ { "-after-hibernate-resume", HIBERNATE_RESUME },
+ { }
+ }, *op;
igt_fixture {
drm_fd = drm_open_driver(DRIVER_INTEL);
@@ -106,35 +178,23 @@ igt_main
"by copying a char array using Huc"
"and verifying the copied result");
- igt_subtest("huc-copy") {
- char inputs[HUC_COPY_DATA_BUF_SIZE];
- struct drm_i915_gem_exec_object2 obj[3];
- uint64_t objsize[3] = { HUC_COPY_DATA_BUF_SIZE,
- HUC_COPY_DATA_BUF_SIZE,
- 4096 };
-
- test_huc_load(drm_fd);
- /* Initialize src buffer randomly */
- srand(time(NULL));
- for (int i = 0; i < HUC_COPY_DATA_BUF_SIZE; i++)
- inputs[i] = (char) (rand() % 256);
-
- memset(obj, 0, sizeof(obj));
- /* source buffer object for storing input */
- obj[0].handle = gem_create(drm_fd, HUC_COPY_DATA_BUF_SIZE);
- /* destination buffer object to receive input */
- obj[1].handle = gem_create(drm_fd, HUC_COPY_DATA_BUF_SIZE);
- /* execution buffer object */
- obj[2].handle = gem_create(drm_fd, 4096);
-
- gem_write(drm_fd, obj[0].handle, 0, inputs, HUC_COPY_DATA_BUF_SIZE);
-
- huc_copy(drm_fd, ahnd, obj, objsize);
- compare_huc_copy_result(drm_fd, obj[0].handle, obj[1].handle);
-
- gem_close(drm_fd, obj[0].handle);
- gem_close(drm_fd, obj[1].handle);
- gem_close(drm_fd, obj[2].handle);
+ for (op = ops; op->name; op++) {
+ igt_subtest_group {
+ igt_hang_t hang = {};
+
+ igt_fixture {
+ if (op->op == GPU_RESET)
+ hang = igt_allow_hang(drm_fd, 0, HANG_ALLOW_CAPTURE);
+ }
+
+ igt_subtest_f("huc-copy%s", op->name)
+ huc_copy_test(drm_fd, ahnd, huc_copy, op->op);
+
+ igt_fixture {
+ if (op->op == GPU_RESET)
+ igt_disallow_hang(drm_fd, hang);
+ }
+ }
}
igt_fixture {
--
2.25.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [igt-dev] [PATCH] tests/i915/gem_huc_copy: cover reset and suspend/resume scenarios
2022-04-27 21:44 [igt-dev] [PATCH] tests/i915/gem_huc_copy: cover reset and suspend/resume scenarios Daniele Ceraolo Spurio
@ 2022-04-27 21:58 ` Ye, Tony
2022-04-27 22:12 ` Ceraolo Spurio, Daniele
2022-04-27 22:53 ` [igt-dev] ✗ Fi.CI.BAT: failure for " Patchwork
2022-06-15 16:42 ` [igt-dev] [PATCH] " Kamil Konieczny
2 siblings, 1 reply; 6+ messages in thread
From: Ye, Tony @ 2022-04-27 21:58 UTC (permalink / raw)
To: Daniele Ceraolo Spurio, igt-dev
On 4/27/2022 2:44 PM, Daniele Ceraolo Spurio wrote:
> Additional subtests have been added to make sure the HuC keeps working
> after GT reset and suspend/resume.
>
> Cc: Tony Ye <tony.ye@intel.com>
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> ---
> tests/i915/gem_huc_copy.c | 118 ++++++++++++++++++++++++++++----------
> 1 file changed, 89 insertions(+), 29 deletions(-)
>
> diff --git a/tests/i915/gem_huc_copy.c b/tests/i915/gem_huc_copy.c
> index ea32b705..ef577824 100644
> --- a/tests/i915/gem_huc_copy.c
> +++ b/tests/i915/gem_huc_copy.c
> @@ -40,6 +40,13 @@ IGT_TEST_DESCRIPTION("A very simple workload for the HuC.");
>
> #define HUC_COPY_DATA_BUF_SIZE 4096
>
> +enum operation {
> + GPU_RESET,
> + SUSPEND_RESUME,
> + HIBERNATE_RESUME,
> + SIMPLE_COPY,
> +};
> +
> static void
> compare_huc_copy_result(int drm_fd, uint32_t src_handle, uint32_t dst_handle)
> {
> @@ -84,12 +91,77 @@ static void test_huc_load(int fd)
> igt_fail_on_f(status == 0, "HuC firmware is not running!\n");
> }
>
> +static void huc_copy_test(int drm_fd, uint64_t ahnd,
> + igt_huc_copyfunc_t huc_copy, enum operation op)
> +{
> + char inputs[HUC_COPY_DATA_BUF_SIZE];
> + struct drm_i915_gem_exec_object2 obj[3];
> + uint64_t objsize[3] = { HUC_COPY_DATA_BUF_SIZE,
> + HUC_COPY_DATA_BUF_SIZE,
> + 4096 };
> +
> + switch (op) {
> + case GPU_RESET:
> + igt_force_gpu_reset(drm_fd);
The issue in VLK-33957 is not reproducible with a forced gpu reset
through the i915_wedged debugfs. It is also not reproducible with
igt_hang_ctx(). Only a real GPU HANG can reproduce the issue.
Thanks,
Tony
> + break;
> +
> + case SUSPEND_RESUME:
> + igt_system_suspend_autoresume(SUSPEND_STATE_MEM,
> + SUSPEND_TEST_NONE);
> + break;
> +
> + case HIBERNATE_RESUME:
> + igt_system_suspend_autoresume(SUSPEND_STATE_DISK,
> + SUSPEND_TEST_NONE);
> + break;
> +
> + case SIMPLE_COPY:
> + break;
> +
> + default:
> + igt_assert(0);
> + }
> +
> + test_huc_load(drm_fd);
> + /* Initialize src buffer randomly */
> + srand(time(NULL));
> + for (int i = 0; i < HUC_COPY_DATA_BUF_SIZE; i++)
> + inputs[i] = (char) (rand() % 256);
> +
> + memset(obj, 0, sizeof(obj));
> + /* source buffer object for storing input */
> + obj[0].handle = gem_create(drm_fd, HUC_COPY_DATA_BUF_SIZE);
> + /* destination buffer object to receive input */
> + obj[1].handle = gem_create(drm_fd, HUC_COPY_DATA_BUF_SIZE);
> + /* execution buffer object */
> + obj[2].handle = gem_create(drm_fd, 4096);
> +
> + gem_write(drm_fd, obj[0].handle, 0, inputs, HUC_COPY_DATA_BUF_SIZE);
> +
> + huc_copy(drm_fd, ahnd, obj, objsize);
> + compare_huc_copy_result(drm_fd, obj[0].handle, obj[1].handle);
> +
> + gem_close(drm_fd, obj[0].handle);
> + gem_close(drm_fd, obj[1].handle);
> + gem_close(drm_fd, obj[2].handle);
> +}
> +
> igt_main
> {
> int drm_fd = -1;
> uint32_t devid;
> igt_huc_copyfunc_t huc_copy;
> uint64_t ahnd;
> + const struct {
> + const char *name;
> + enum operation op;
> + } ops[] = {
> + { "", SIMPLE_COPY },
> + { "-after-reset", GPU_RESET },
> + { "-after-suspend-resume", SUSPEND_RESUME },
> + { "-after-hibernate-resume", HIBERNATE_RESUME },
> + { }
> + }, *op;
>
> igt_fixture {
> drm_fd = drm_open_driver(DRIVER_INTEL);
> @@ -106,35 +178,23 @@ igt_main
> "by copying a char array using Huc"
> "and verifying the copied result");
>
> - igt_subtest("huc-copy") {
> - char inputs[HUC_COPY_DATA_BUF_SIZE];
> - struct drm_i915_gem_exec_object2 obj[3];
> - uint64_t objsize[3] = { HUC_COPY_DATA_BUF_SIZE,
> - HUC_COPY_DATA_BUF_SIZE,
> - 4096 };
> -
> - test_huc_load(drm_fd);
> - /* Initialize src buffer randomly */
> - srand(time(NULL));
> - for (int i = 0; i < HUC_COPY_DATA_BUF_SIZE; i++)
> - inputs[i] = (char) (rand() % 256);
> -
> - memset(obj, 0, sizeof(obj));
> - /* source buffer object for storing input */
> - obj[0].handle = gem_create(drm_fd, HUC_COPY_DATA_BUF_SIZE);
> - /* destination buffer object to receive input */
> - obj[1].handle = gem_create(drm_fd, HUC_COPY_DATA_BUF_SIZE);
> - /* execution buffer object */
> - obj[2].handle = gem_create(drm_fd, 4096);
> -
> - gem_write(drm_fd, obj[0].handle, 0, inputs, HUC_COPY_DATA_BUF_SIZE);
> -
> - huc_copy(drm_fd, ahnd, obj, objsize);
> - compare_huc_copy_result(drm_fd, obj[0].handle, obj[1].handle);
> -
> - gem_close(drm_fd, obj[0].handle);
> - gem_close(drm_fd, obj[1].handle);
> - gem_close(drm_fd, obj[2].handle);
> + for (op = ops; op->name; op++) {
> + igt_subtest_group {
> + igt_hang_t hang = {};
> +
> + igt_fixture {
> + if (op->op == GPU_RESET)
> + hang = igt_allow_hang(drm_fd, 0, HANG_ALLOW_CAPTURE);
> + }
> +
> + igt_subtest_f("huc-copy%s", op->name)
> + huc_copy_test(drm_fd, ahnd, huc_copy, op->op);
> +
> + igt_fixture {
> + if (op->op == GPU_RESET)
> + igt_disallow_hang(drm_fd, hang);
> + }
> + }
> }
>
> igt_fixture {
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [igt-dev] [PATCH] tests/i915/gem_huc_copy: cover reset and suspend/resume scenarios
2022-04-27 21:58 ` Ye, Tony
@ 2022-04-27 22:12 ` Ceraolo Spurio, Daniele
2022-04-29 6:25 ` Ye, Tony
0 siblings, 1 reply; 6+ messages in thread
From: Ceraolo Spurio, Daniele @ 2022-04-27 22:12 UTC (permalink / raw)
To: Ye, Tony, igt-dev
On 4/27/2022 2:58 PM, Ye, Tony wrote:
>
> On 4/27/2022 2:44 PM, Daniele Ceraolo Spurio wrote:
>> Additional subtests have been added to make sure the HuC keeps working
>> after GT reset and suspend/resume.
>>
>> Cc: Tony Ye <tony.ye@intel.com>
>> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
>> ---
>> tests/i915/gem_huc_copy.c | 118 ++++++++++++++++++++++++++++----------
>> 1 file changed, 89 insertions(+), 29 deletions(-)
>>
>> diff --git a/tests/i915/gem_huc_copy.c b/tests/i915/gem_huc_copy.c
>> index ea32b705..ef577824 100644
>> --- a/tests/i915/gem_huc_copy.c
>> +++ b/tests/i915/gem_huc_copy.c
>> @@ -40,6 +40,13 @@ IGT_TEST_DESCRIPTION("A very simple workload for
>> the HuC.");
>> #define HUC_COPY_DATA_BUF_SIZE 4096
>> +enum operation {
>> + GPU_RESET,
>> + SUSPEND_RESUME,
>> + HIBERNATE_RESUME,
>> + SIMPLE_COPY,
>> +};
>> +
>> static void
>> compare_huc_copy_result(int drm_fd, uint32_t src_handle, uint32_t
>> dst_handle)
>> {
>> @@ -84,12 +91,77 @@ static void test_huc_load(int fd)
>> igt_fail_on_f(status == 0, "HuC firmware is not running!\n");
>> }
>> +static void huc_copy_test(int drm_fd, uint64_t ahnd,
>> + igt_huc_copyfunc_t huc_copy, enum operation op)
>> +{
>> + char inputs[HUC_COPY_DATA_BUF_SIZE];
>> + struct drm_i915_gem_exec_object2 obj[3];
>> + uint64_t objsize[3] = { HUC_COPY_DATA_BUF_SIZE,
>> + HUC_COPY_DATA_BUF_SIZE,
>> + 4096 };
>> +
>> + switch (op) {
>> + case GPU_RESET:
>> + igt_force_gpu_reset(drm_fd);
>
> The issue in VLK-33957 is not reproducible with a forced gpu reset
> through the i915_wedged debugfs. It is also not reproducible with
> igt_hang_ctx(). Only a real GPU HANG can reproduce the issue.
The bug you're referencing is about recovery of an hung context and it
is not what these new tests are for. What I want to test here is whether
the HuC itself is working correctly after a GT reset or suspend/resume
flow. This is to make sure we don't break anything with the upcoming DG2
changes, because the flow and timing are completely different with GSC
loading the HuC. Hibernation/resume is going to be especially tricky,
because HuC load will happen after i915 resume is complete, so we'll
have to synchronize.
Daniele
>
> Thanks,
>
> Tony
>
>> + break;
>> +
>> + case SUSPEND_RESUME:
>> + igt_system_suspend_autoresume(SUSPEND_STATE_MEM,
>> + SUSPEND_TEST_NONE);
>> + break;
>> +
>> + case HIBERNATE_RESUME:
>> + igt_system_suspend_autoresume(SUSPEND_STATE_DISK,
>> + SUSPEND_TEST_NONE);
>> + break;
>> +
>> + case SIMPLE_COPY:
>> + break;
>> +
>> + default:
>> + igt_assert(0);
>> + }
>> +
>> + test_huc_load(drm_fd);
>> + /* Initialize src buffer randomly */
>> + srand(time(NULL));
>> + for (int i = 0; i < HUC_COPY_DATA_BUF_SIZE; i++)
>> + inputs[i] = (char) (rand() % 256);
>> +
>> + memset(obj, 0, sizeof(obj));
>> + /* source buffer object for storing input */
>> + obj[0].handle = gem_create(drm_fd, HUC_COPY_DATA_BUF_SIZE);
>> + /* destination buffer object to receive input */
>> + obj[1].handle = gem_create(drm_fd, HUC_COPY_DATA_BUF_SIZE);
>> + /* execution buffer object */
>> + obj[2].handle = gem_create(drm_fd, 4096);
>> +
>> + gem_write(drm_fd, obj[0].handle, 0, inputs,
>> HUC_COPY_DATA_BUF_SIZE);
>> +
>> + huc_copy(drm_fd, ahnd, obj, objsize);
>> + compare_huc_copy_result(drm_fd, obj[0].handle, obj[1].handle);
>> +
>> + gem_close(drm_fd, obj[0].handle);
>> + gem_close(drm_fd, obj[1].handle);
>> + gem_close(drm_fd, obj[2].handle);
>> +}
>> +
>> igt_main
>> {
>> int drm_fd = -1;
>> uint32_t devid;
>> igt_huc_copyfunc_t huc_copy;
>> uint64_t ahnd;
>> + const struct {
>> + const char *name;
>> + enum operation op;
>> + } ops[] = {
>> + { "", SIMPLE_COPY },
>> + { "-after-reset", GPU_RESET },
>> + { "-after-suspend-resume", SUSPEND_RESUME },
>> + { "-after-hibernate-resume", HIBERNATE_RESUME },
>> + { }
>> + }, *op;
>> igt_fixture {
>> drm_fd = drm_open_driver(DRIVER_INTEL);
>> @@ -106,35 +178,23 @@ igt_main
>> "by copying a char array using Huc"
>> "and verifying the copied result");
>> - igt_subtest("huc-copy") {
>> - char inputs[HUC_COPY_DATA_BUF_SIZE];
>> - struct drm_i915_gem_exec_object2 obj[3];
>> - uint64_t objsize[3] = { HUC_COPY_DATA_BUF_SIZE,
>> - HUC_COPY_DATA_BUF_SIZE,
>> - 4096 };
>> -
>> - test_huc_load(drm_fd);
>> - /* Initialize src buffer randomly */
>> - srand(time(NULL));
>> - for (int i = 0; i < HUC_COPY_DATA_BUF_SIZE; i++)
>> - inputs[i] = (char) (rand() % 256);
>> -
>> - memset(obj, 0, sizeof(obj));
>> - /* source buffer object for storing input */
>> - obj[0].handle = gem_create(drm_fd, HUC_COPY_DATA_BUF_SIZE);
>> - /* destination buffer object to receive input */
>> - obj[1].handle = gem_create(drm_fd, HUC_COPY_DATA_BUF_SIZE);
>> - /* execution buffer object */
>> - obj[2].handle = gem_create(drm_fd, 4096);
>> -
>> - gem_write(drm_fd, obj[0].handle, 0, inputs,
>> HUC_COPY_DATA_BUF_SIZE);
>> -
>> - huc_copy(drm_fd, ahnd, obj, objsize);
>> - compare_huc_copy_result(drm_fd, obj[0].handle, obj[1].handle);
>> -
>> - gem_close(drm_fd, obj[0].handle);
>> - gem_close(drm_fd, obj[1].handle);
>> - gem_close(drm_fd, obj[2].handle);
>> + for (op = ops; op->name; op++) {
>> + igt_subtest_group {
>> + igt_hang_t hang = {};
>> +
>> + igt_fixture {
>> + if (op->op == GPU_RESET)
>> + hang = igt_allow_hang(drm_fd, 0,
>> HANG_ALLOW_CAPTURE);
>> + }
>> +
>> + igt_subtest_f("huc-copy%s", op->name)
>> + huc_copy_test(drm_fd, ahnd, huc_copy, op->op);
>> +
>> + igt_fixture {
>> + if (op->op == GPU_RESET)
>> + igt_disallow_hang(drm_fd, hang);
>> + }
>> + }
>> }
>> igt_fixture {
^ permalink raw reply [flat|nested] 6+ messages in thread
* [igt-dev] ✗ Fi.CI.BAT: failure for tests/i915/gem_huc_copy: cover reset and suspend/resume scenarios
2022-04-27 21:44 [igt-dev] [PATCH] tests/i915/gem_huc_copy: cover reset and suspend/resume scenarios Daniele Ceraolo Spurio
2022-04-27 21:58 ` Ye, Tony
@ 2022-04-27 22:53 ` Patchwork
2022-06-15 16:42 ` [igt-dev] [PATCH] " Kamil Konieczny
2 siblings, 0 replies; 6+ messages in thread
From: Patchwork @ 2022-04-27 22:53 UTC (permalink / raw)
To: Ceraolo Spurio, Daniele; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 4597 bytes --]
== Series Details ==
Series: tests/i915/gem_huc_copy: cover reset and suspend/resume scenarios
URL : https://patchwork.freedesktop.org/series/103240/
State : failure
== Summary ==
CI Bug Log - changes from IGT_6458 -> IGTPW_7018
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with IGTPW_7018 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in IGTPW_7018, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7018/index.html
Participating hosts (43 -> 39)
------------------------------
Missing (4): bat-rpls-2 fi-bsw-cyan fi-bdw-samus fi-pnv-d510
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in IGTPW_7018:
### IGT changes ###
#### Possible regressions ####
* igt@i915_selftest@live@reset:
- fi-bdw-5557u: [PASS][1] -> [INCOMPLETE][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6458/fi-bdw-5557u/igt@i915_selftest@live@reset.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7018/fi-bdw-5557u/igt@i915_selftest@live@reset.html
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@gem_exec_suspend@basic-s0@smem:
- {fi-ehl-2}: [PASS][3] -> [DMESG-WARN][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6458/fi-ehl-2/igt@gem_exec_suspend@basic-s0@smem.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7018/fi-ehl-2/igt@gem_exec_suspend@basic-s0@smem.html
Known issues
------------
Here are the changes found in IGTPW_7018 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_pm_rpm@module-reload:
- bat-adlp-4: [PASS][5] -> [DMESG-WARN][6] ([i915#3576]) +1 similar issue
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6458/bat-adlp-4/igt@i915_pm_rpm@module-reload.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7018/bat-adlp-4/igt@i915_pm_rpm@module-reload.html
#### Possible fixes ####
* igt@i915_pm_rpm@module-reload:
- fi-cfl-8109u: [DMESG-WARN][7] ([i915#62]) -> [PASS][8] +15 similar issues
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6458/fi-cfl-8109u/igt@i915_pm_rpm@module-reload.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7018/fi-cfl-8109u/igt@i915_pm_rpm@module-reload.html
* igt@i915_selftest@live@gtt:
- fi-bdw-5557u: [DMESG-FAIL][9] ([i915#3674]) -> [PASS][10]
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6458/fi-bdw-5557u/igt@i915_selftest@live@gtt.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7018/fi-bdw-5557u/igt@i915_selftest@live@gtt.html
* igt@kms_busy@basic@flip:
- {bat-adlp-6}: [DMESG-WARN][11] ([i915#3576]) -> [PASS][12]
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_6458/bat-adlp-6/igt@kms_busy@basic@flip.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7018/bat-adlp-6/igt@kms_busy@basic@flip.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#3576]: https://gitlab.freedesktop.org/drm/intel/issues/3576
[i915#3674]: https://gitlab.freedesktop.org/drm/intel/issues/3674
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
[i915#5087]: https://gitlab.freedesktop.org/drm/intel/issues/5087
[i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
[i915#5338]: https://gitlab.freedesktop.org/drm/intel/issues/5338
[i915#62]: https://gitlab.freedesktop.org/drm/intel/issues/62
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_6458 -> IGTPW_7018
CI-20190529: 20190529
CI_DRM_11550: 56b089ae03ef8ea8ab7f474eaa70367898891ef0 @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_7018: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7018/index.html
IGT_6458: bcc26bd2b26220147b00f87d91e2ff1d4bd3ce5e @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Testlist changes
----------------
+igt@gem_huc_copy@huc-copy-after-hibernate-resume
+igt@gem_huc_copy@huc-copy-after-reset
+igt@gem_huc_copy@huc-copy-after-suspend-resume
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_7018/index.html
[-- Attachment #2: Type: text/html, Size: 5098 bytes --]
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [igt-dev] [PATCH] tests/i915/gem_huc_copy: cover reset and suspend/resume scenarios
2022-04-27 22:12 ` Ceraolo Spurio, Daniele
@ 2022-04-29 6:25 ` Ye, Tony
0 siblings, 0 replies; 6+ messages in thread
From: Ye, Tony @ 2022-04-29 6:25 UTC (permalink / raw)
To: Ceraolo Spurio, Daniele; +Cc: igt-dev
Reviewed-by: Tony Ye <tony.ye@intel.com>
Thanks,
Tony
> 在 2022年4月27日，下午3:12，Ceraolo Spurio, Daniele <daniele.ceraolospurio@intel.com> 写道：
>
>
>
>> On 4/27/2022 2:58 PM, Ye, Tony wrote:
>>
>>> On 4/27/2022 2:44 PM, Daniele Ceraolo Spurio wrote:
>>> Additional subtests have been added to make sure the HuC keeps working
>>> after GT reset and suspend/resume.
>>>
>>> Cc: Tony Ye <tony.ye@intel.com>
>>> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
>>> ---
>>> tests/i915/gem_huc_copy.c | 118 ++++++++++++++++++++++++++++----------
>>> 1 file changed, 89 insertions(+), 29 deletions(-)
>>>
>>> diff --git a/tests/i915/gem_huc_copy.c b/tests/i915/gem_huc_copy.c
>>> index ea32b705..ef577824 100644
>>> --- a/tests/i915/gem_huc_copy.c
>>> +++ b/tests/i915/gem_huc_copy.c
>>> @@ -40,6 +40,13 @@ IGT_TEST_DESCRIPTION("A very simple workload for the HuC.");
>>> #define HUC_COPY_DATA_BUF_SIZE 4096
>>> +enum operation {
>>> + GPU_RESET,
>>> + SUSPEND_RESUME,
>>> + HIBERNATE_RESUME,
>>> + SIMPLE_COPY,
>>> +};
>>> +
>>> static void
>>> compare_huc_copy_result(int drm_fd, uint32_t src_handle, uint32_t dst_handle)
>>> {
>>> @@ -84,12 +91,77 @@ static void test_huc_load(int fd)
>>> igt_fail_on_f(status == 0, "HuC firmware is not running!\n");
>>> }
>>> +static void huc_copy_test(int drm_fd, uint64_t ahnd,
>>> + igt_huc_copyfunc_t huc_copy, enum operation op)
>>> +{
>>> + char inputs[HUC_COPY_DATA_BUF_SIZE];
>>> + struct drm_i915_gem_exec_object2 obj[3];
>>> + uint64_t objsize[3] = { HUC_COPY_DATA_BUF_SIZE,
>>> + HUC_COPY_DATA_BUF_SIZE,
>>> + 4096 };
>>> +
>>> + switch (op) {
>>> + case GPU_RESET:
>>> + igt_force_gpu_reset(drm_fd);
>>
>> The issue in VLK-33957 is not reproducible with a forced gpu reset through the i915_wedged debugfs. It is also not reproducible with igt_hang_ctx(). Only a real GPU HANG can reproduce the issue.
>
> The bug you're referencing is about recovery of an hung context and it is not what these new tests are for. What I want to test here is whether the HuC itself is working correctly after a GT reset or suspend/resume flow. This is to make sure we don't break anything with the upcoming DG2 changes, because the flow and timing are completely different with GSC loading the HuC. Hibernation/resume is going to be especially tricky, because HuC load will happen after i915 resume is complete, so we'll have to synchronize.
>
> Daniele
>
>>
>> Thanks,
>>
>> Tony
>>
>>> + break;
>>> +
>>> + case SUSPEND_RESUME:
>>> + igt_system_suspend_autoresume(SUSPEND_STATE_MEM,
>>> + SUSPEND_TEST_NONE);
>>> + break;
>>> +
>>> + case HIBERNATE_RESUME:
>>> + igt_system_suspend_autoresume(SUSPEND_STATE_DISK,
>>> + SUSPEND_TEST_NONE);
>>> + break;
>>> +
>>> + case SIMPLE_COPY:
>>> + break;
>>> +
>>> + default:
>>> + igt_assert(0);
>>> + }
>>> +
>>> + test_huc_load(drm_fd);
>>> + /* Initialize src buffer randomly */
>>> + srand(time(NULL));
>>> + for (int i = 0; i < HUC_COPY_DATA_BUF_SIZE; i++)
>>> + inputs[i] = (char) (rand() % 256);
>>> +
>>> + memset(obj, 0, sizeof(obj));
>>> + /* source buffer object for storing input */
>>> + obj[0].handle = gem_create(drm_fd, HUC_COPY_DATA_BUF_SIZE);
>>> + /* destination buffer object to receive input */
>>> + obj[1].handle = gem_create(drm_fd, HUC_COPY_DATA_BUF_SIZE);
>>> + /* execution buffer object */
>>> + obj[2].handle = gem_create(drm_fd, 4096);
>>> +
>>> + gem_write(drm_fd, obj[0].handle, 0, inputs, HUC_COPY_DATA_BUF_SIZE);
>>> +
>>> + huc_copy(drm_fd, ahnd, obj, objsize);
>>> + compare_huc_copy_result(drm_fd, obj[0].handle, obj[1].handle);
>>> +
>>> + gem_close(drm_fd, obj[0].handle);
>>> + gem_close(drm_fd, obj[1].handle);
>>> + gem_close(drm_fd, obj[2].handle);
>>> +}
>>> +
>>> igt_main
>>> {
>>> int drm_fd = -1;
>>> uint32_t devid;
>>> igt_huc_copyfunc_t huc_copy;
>>> uint64_t ahnd;
>>> + const struct {
>>> + const char *name;
>>> + enum operation op;
>>> + } ops[] = {
>>> + { "", SIMPLE_COPY },
>>> + { "-after-reset", GPU_RESET },
>>> + { "-after-suspend-resume", SUSPEND_RESUME },
>>> + { "-after-hibernate-resume", HIBERNATE_RESUME },
>>> + { }
>>> + }, *op;
>>> igt_fixture {
>>> drm_fd = drm_open_driver(DRIVER_INTEL);
>>> @@ -106,35 +178,23 @@ igt_main
>>> "by copying a char array using Huc"
>>> "and verifying the copied result");
>>> - igt_subtest("huc-copy") {
>>> - char inputs[HUC_COPY_DATA_BUF_SIZE];
>>> - struct drm_i915_gem_exec_object2 obj[3];
>>> - uint64_t objsize[3] = { HUC_COPY_DATA_BUF_SIZE,
>>> - HUC_COPY_DATA_BUF_SIZE,
>>> - 4096 };
>>> -
>>> - test_huc_load(drm_fd);
>>> - /* Initialize src buffer randomly */
>>> - srand(time(NULL));
>>> - for (int i = 0; i < HUC_COPY_DATA_BUF_SIZE; i++)
>>> - inputs[i] = (char) (rand() % 256);
>>> -
>>> - memset(obj, 0, sizeof(obj));
>>> - /* source buffer object for storing input */
>>> - obj[0].handle = gem_create(drm_fd, HUC_COPY_DATA_BUF_SIZE);
>>> - /* destination buffer object to receive input */
>>> - obj[1].handle = gem_create(drm_fd, HUC_COPY_DATA_BUF_SIZE);
>>> - /* execution buffer object */
>>> - obj[2].handle = gem_create(drm_fd, 4096);
>>> -
>>> - gem_write(drm_fd, obj[0].handle, 0, inputs, HUC_COPY_DATA_BUF_SIZE);
>>> -
>>> - huc_copy(drm_fd, ahnd, obj, objsize);
>>> - compare_huc_copy_result(drm_fd, obj[0].handle, obj[1].handle);
>>> -
>>> - gem_close(drm_fd, obj[0].handle);
>>> - gem_close(drm_fd, obj[1].handle);
>>> - gem_close(drm_fd, obj[2].handle);
>>> + for (op = ops; op->name; op++) {
>>> + igt_subtest_group {
>>> + igt_hang_t hang = {};
>>> +
>>> + igt_fixture {
>>> + if (op->op == GPU_RESET)
>>> + hang = igt_allow_hang(drm_fd, 0, HANG_ALLOW_CAPTURE);
>>> + }
>>> +
>>> + igt_subtest_f("huc-copy%s", op->name)
>>> + huc_copy_test(drm_fd, ahnd, huc_copy, op->op);
>>> +
>>> + igt_fixture {
>>> + if (op->op == GPU_RESET)
>>> + igt_disallow_hang(drm_fd, hang);
>>> + }
>>> + }
>>> }
>>> igt_fixture {
>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [igt-dev] [PATCH] tests/i915/gem_huc_copy: cover reset and suspend/resume scenarios
2022-04-27 21:44 [igt-dev] [PATCH] tests/i915/gem_huc_copy: cover reset and suspend/resume scenarios Daniele Ceraolo Spurio
2022-04-27 21:58 ` Ye, Tony
2022-04-27 22:53 ` [igt-dev] ✗ Fi.CI.BAT: failure for " Patchwork
@ 2022-06-15 16:42 ` Kamil Konieczny
2 siblings, 0 replies; 6+ messages in thread
From: Kamil Konieczny @ 2022-06-15 16:42 UTC (permalink / raw)
To: igt-dev; +Cc: Alan Previn
Hi Daniele,
On 2022-04-27 at 14:44:36 -0700, Daniele Ceraolo Spurio wrote:
> Additional subtests have been added to make sure the HuC keeps working
> after GT reset and suspend/resume.
>
> Cc: Tony Ye <tony.ye@intel.com>
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> ---
> tests/i915/gem_huc_copy.c | 118 ++++++++++++++++++++++++++++----------
> 1 file changed, 89 insertions(+), 29 deletions(-)
>
> diff --git a/tests/i915/gem_huc_copy.c b/tests/i915/gem_huc_copy.c
> index ea32b705..ef577824 100644
> --- a/tests/i915/gem_huc_copy.c
> +++ b/tests/i915/gem_huc_copy.c
> @@ -40,6 +40,13 @@ IGT_TEST_DESCRIPTION("A very simple workload for the HuC.");
>
> #define HUC_COPY_DATA_BUF_SIZE 4096
>
> +enum operation {
> + GPU_RESET,
> + SUSPEND_RESUME,
> + HIBERNATE_RESUME,
> + SIMPLE_COPY,
> +};
> +
> static void
> compare_huc_copy_result(int drm_fd, uint32_t src_handle, uint32_t dst_handle)
> {
> @@ -84,12 +91,77 @@ static void test_huc_load(int fd)
> igt_fail_on_f(status == 0, "HuC firmware is not running!\n");
> }
>
> +static void huc_copy_test(int drm_fd, uint64_t ahnd,
> + igt_huc_copyfunc_t huc_copy, enum operation op)
> +{
> + char inputs[HUC_COPY_DATA_BUF_SIZE];
> + struct drm_i915_gem_exec_object2 obj[3];
> + uint64_t objsize[3] = { HUC_COPY_DATA_BUF_SIZE,
> + HUC_COPY_DATA_BUF_SIZE,
> + 4096 };
> +
> + switch (op) {
> + case GPU_RESET:
> + igt_force_gpu_reset(drm_fd);
> + break;
> +
> + case SUSPEND_RESUME:
> + igt_system_suspend_autoresume(SUSPEND_STATE_MEM,
> + SUSPEND_TEST_NONE);
> + break;
> +
> + case HIBERNATE_RESUME:
> + igt_system_suspend_autoresume(SUSPEND_STATE_DISK,
> + SUSPEND_TEST_NONE);
> + break;
> +
> + case SIMPLE_COPY:
> + break;
> +
> + default:
> + igt_assert(0);
> + }
> +
> + test_huc_load(drm_fd);
> + /* Initialize src buffer randomly */
> + srand(time(NULL));
> + for (int i = 0; i < HUC_COPY_DATA_BUF_SIZE; i++)
> + inputs[i] = (char) (rand() % 256);
> +
> + memset(obj, 0, sizeof(obj));
> + /* source buffer object for storing input */
> + obj[0].handle = gem_create(drm_fd, HUC_COPY_DATA_BUF_SIZE);
> + /* destination buffer object to receive input */
> + obj[1].handle = gem_create(drm_fd, HUC_COPY_DATA_BUF_SIZE);
> + /* execution buffer object */
> + obj[2].handle = gem_create(drm_fd, 4096);
> +
> + gem_write(drm_fd, obj[0].handle, 0, inputs, HUC_COPY_DATA_BUF_SIZE);
> +
> + huc_copy(drm_fd, ahnd, obj, objsize);
> + compare_huc_copy_result(drm_fd, obj[0].handle, obj[1].handle);
> +
> + gem_close(drm_fd, obj[0].handle);
> + gem_close(drm_fd, obj[1].handle);
> + gem_close(drm_fd, obj[2].handle);
> +}
> +
> igt_main
> {
> int drm_fd = -1;
> uint32_t devid;
> igt_huc_copyfunc_t huc_copy;
> uint64_t ahnd;
> + const struct {
> + const char *name;
> + enum operation op;
Add const char *description to this struct.
> + } ops[] = {
> + { "", SIMPLE_COPY },
> + { "-after-reset", GPU_RESET },
> + { "-after-suspend-resume", SUSPEND_RESUME },
> + { "-after-hibernate-resume", HIBERNATE_RESUME },
> + { }
> + }, *op;
>
> igt_fixture {
> drm_fd = drm_open_driver(DRIVER_INTEL);
> @@ -106,35 +178,23 @@ igt_main
> "by copying a char array using Huc"
> "and verifying the copied result");
Move this into struct (add spaces before new lines).
>
> - igt_subtest("huc-copy") {
> - char inputs[HUC_COPY_DATA_BUF_SIZE];
> - struct drm_i915_gem_exec_object2 obj[3];
> - uint64_t objsize[3] = { HUC_COPY_DATA_BUF_SIZE,
> - HUC_COPY_DATA_BUF_SIZE,
> - 4096 };
> -
> - test_huc_load(drm_fd);
> - /* Initialize src buffer randomly */
> - srand(time(NULL));
> - for (int i = 0; i < HUC_COPY_DATA_BUF_SIZE; i++)
> - inputs[i] = (char) (rand() % 256);
> -
> - memset(obj, 0, sizeof(obj));
> - /* source buffer object for storing input */
> - obj[0].handle = gem_create(drm_fd, HUC_COPY_DATA_BUF_SIZE);
> - /* destination buffer object to receive input */
> - obj[1].handle = gem_create(drm_fd, HUC_COPY_DATA_BUF_SIZE);
> - /* execution buffer object */
> - obj[2].handle = gem_create(drm_fd, 4096);
> -
> - gem_write(drm_fd, obj[0].handle, 0, inputs, HUC_COPY_DATA_BUF_SIZE);
> -
> - huc_copy(drm_fd, ahnd, obj, objsize);
> - compare_huc_copy_result(drm_fd, obj[0].handle, obj[1].handle);
> -
> - gem_close(drm_fd, obj[0].handle);
> - gem_close(drm_fd, obj[1].handle);
> - gem_close(drm_fd, obj[2].handle);
> + for (op = ops; op->name; op++) {
> + igt_subtest_group {
> + igt_hang_t hang = {};
> +
> + igt_fixture {
> + if (op->op == GPU_RESET)
> + hang = igt_allow_hang(drm_fd, 0, HANG_ALLOW_CAPTURE);
> + }
> +
Put description here with help of igt_describe_f() and op->description.
Please verify that descriptions looks sane by compiling your
code and then running with --describe option.
Regards,
Kamil
> + igt_subtest_f("huc-copy%s", op->name)
> + huc_copy_test(drm_fd, ahnd, huc_copy, op->op);
> +
> + igt_fixture {
> + if (op->op == GPU_RESET)
> + igt_disallow_hang(drm_fd, hang);
> + }
> + }
> }
>
> igt_fixture {
> --
> 2.25.1
>
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2022-06-15 16:42 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-04-27 21:44 [igt-dev] [PATCH] tests/i915/gem_huc_copy: cover reset and suspend/resume scenarios Daniele Ceraolo Spurio
2022-04-27 21:58 ` Ye, Tony
2022-04-27 22:12 ` Ceraolo Spurio, Daniele
2022-04-29 6:25 ` Ye, Tony
2022-04-27 22:53 ` [igt-dev] ✗ Fi.CI.BAT: failure for " Patchwork
2022-06-15 16:42 ` [igt-dev] [PATCH] " Kamil Konieczny
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