[PATCH v4 0/3] Clear TLB caches in all tiles when object is removed

[PATCH v4 0/3] Clear TLB caches in all tiles when object is removed

[Andi Shyti]

Hi,

Maybe I should not send patches this late at night as I end up
messing things up and spamming sleeping people. Sorry for this
version 4.

The real fix is in patch 2. The rest is a helper that adds
the with_intel_gt_pm_if_awake() (from Chris) and one more check
on the status of the engine before accessing it for clearing the
TLB.

Andi

Changelog
=========
v3 -> v4
 - Fix e-mail mismatch in author and in SoB (Sorry!).

v2 -> v3 (v2: https://patchwork.freedesktop.org/series/103835/)
 - Add missing header file that was causing a compmile error.
 - Fix wrong patch formatting.

v1 -> v2 (v1: https://patchwork.freedesktop.org/series/103831/)
 - Add with_intel_gt_pm_if_awake() macro for gt specific wakeref.
 - Check if an engine is awake before invalidating its TLB.

Andi Shyti (2):
  drm/i915/gem: Flush TLBs for all the tiles when clearing an obj
  drm/i915/gt: Skip TLB invalidation if the engine is not awake

Chris Wilson (1):
  drm/i915/gt: Ignore TLB invalidations on idle engines

 drivers/gpu/drm/i915/gem/i915_gem_pages.c | 12 +++++++++---
 drivers/gpu/drm/i915/gt/intel_gt.c        |  4 ++++
 drivers/gpu/drm/i915/gt/intel_gt_pm.h     |  4 ++++
 3 files changed, 17 insertions(+), 3 deletions(-)

-- 
2.36.1

[Intel-gfx] [PATCH v4 0/3] Clear TLB caches in all tiles when object is removed

[Andi Shyti]

Hi,

Maybe I should not send patches this late at night as I end up
messing things up and spamming sleeping people. Sorry for this
version 4.

The real fix is in patch 2. The rest is a helper that adds
the with_intel_gt_pm_if_awake() (from Chris) and one more check
on the status of the engine before accessing it for clearing the
TLB.

Andi

Changelog
=========
v3 -> v4
 - Fix e-mail mismatch in author and in SoB (Sorry!).

v2 -> v3 (v2: https://patchwork.freedesktop.org/series/103835/)
 - Add missing header file that was causing a compmile error.
 - Fix wrong patch formatting.

v1 -> v2 (v1: https://patchwork.freedesktop.org/series/103831/)
 - Add with_intel_gt_pm_if_awake() macro for gt specific wakeref.
 - Check if an engine is awake before invalidating its TLB.

Andi Shyti (2):
  drm/i915/gem: Flush TLBs for all the tiles when clearing an obj
  drm/i915/gt: Skip TLB invalidation if the engine is not awake

Chris Wilson (1):
  drm/i915/gt: Ignore TLB invalidations on idle engines

 drivers/gpu/drm/i915/gem/i915_gem_pages.c | 12 +++++++++---
 drivers/gpu/drm/i915/gt/intel_gt.c        |  4 ++++
 drivers/gpu/drm/i915/gt/intel_gt_pm.h     |  4 ++++
 3 files changed, 17 insertions(+), 3 deletions(-)

-- 
2.36.1

[PATCH v4 1/3] drm/i915/gt: Ignore TLB invalidations on idle engines

[Andi Shyti]

From: Chris Wilson <chris@chris-wilson.co.uk>

As an extension of the current skip TLB invalidations if the device is
powered down, we recognised that prior to any engine activity, all the
TLBs are explicitly invalidated. Thus anytime we know the engine is
asleep, we can skip invalidating the TLBs on that engine.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
---
 drivers/gpu/drm/i915/gt/intel_gt_pm.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.h b/drivers/gpu/drm/i915/gt/intel_gt_pm.h
index bc898df7a48cc..3b1fbce7ea369 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_pm.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.h
@@ -55,6 +55,10 @@ static inline void intel_gt_pm_might_put(struct intel_gt *gt)
 	for (tmp = 1, intel_gt_pm_get(gt); tmp; \
 	     intel_gt_pm_put(gt), tmp = 0)
 
+#define with_intel_gt_pm_if_awake(gt, tmp) \
+	for (tmp = 1, intel_gt_pm_get_if_awake(gt); tmp; \
+	     intel_gt_pm_put(gt), tmp = 0)
+
 static inline int intel_gt_pm_wait_for_idle(struct intel_gt *gt)
 {
 	return intel_wakeref_wait_for_idle(&gt->wakeref);
-- 
2.36.1

[Intel-gfx] [PATCH v4 1/3] drm/i915/gt: Ignore TLB invalidations on idle engines

[Andi Shyti]

From: Chris Wilson <chris@chris-wilson.co.uk>

As an extension of the current skip TLB invalidations if the device is
powered down, we recognised that prior to any engine activity, all the
TLBs are explicitly invalidated. Thus anytime we know the engine is
asleep, we can skip invalidating the TLBs on that engine.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
---
 drivers/gpu/drm/i915/gt/intel_gt_pm.h | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.h b/drivers/gpu/drm/i915/gt/intel_gt_pm.h
index bc898df7a48cc..3b1fbce7ea369 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_pm.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.h
@@ -55,6 +55,10 @@ static inline void intel_gt_pm_might_put(struct intel_gt *gt)
 	for (tmp = 1, intel_gt_pm_get(gt); tmp; \
 	     intel_gt_pm_put(gt), tmp = 0)
 
+#define with_intel_gt_pm_if_awake(gt, tmp) \
+	for (tmp = 1, intel_gt_pm_get_if_awake(gt); tmp; \
+	     intel_gt_pm_put(gt), tmp = 0)
+
 static inline int intel_gt_pm_wait_for_idle(struct intel_gt *gt)
 {
 	return intel_wakeref_wait_for_idle(&gt->wakeref);
-- 
2.36.1

[PATCH v4 2/3] drm/i915/gem: Flush TLBs for all the tiles when clearing an obj

[Andi Shyti]

During object cleanup we invalidate the TLBs but we do it only
for gt0. Invalidate the caches for all the tiles.

Reported-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
---
 drivers/gpu/drm/i915/gem/i915_gem_pages.c | 12 +++++++++---
 1 file changed, 9 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
index 97c820eee115a..37d23e328bd0c 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
@@ -13,6 +13,7 @@
 #include "i915_gem_mman.h"
 
 #include "gt/intel_gt.h"
+#include "gt/intel_gt_pm.h"
 
 void __i915_gem_object_set_pages(struct drm_i915_gem_object *obj,
 				 struct sg_table *pages,
@@ -217,10 +218,15 @@ __i915_gem_object_unset_pages(struct drm_i915_gem_object *obj)
 
 	if (test_and_clear_bit(I915_BO_WAS_BOUND_BIT, &obj->flags)) {
 		struct drm_i915_private *i915 = to_i915(obj->base.dev);
-		intel_wakeref_t wakeref;
+		struct intel_gt *gt;
+		int i;
 
-		with_intel_runtime_pm_if_active(&i915->runtime_pm, wakeref)
-			intel_gt_invalidate_tlbs(to_gt(i915));
+		for_each_gt(gt, i915, i) {
+			int tmp;
+
+			with_intel_gt_pm_if_awake(gt, tmp)
+				intel_gt_invalidate_tlbs(gt);
+		}
 	}
 
 	return pages;
-- 
2.36.1

[Intel-gfx] [PATCH v4 2/3] drm/i915/gem: Flush TLBs for all the tiles when clearing an obj

[Andi Shyti]

During object cleanup we invalidate the TLBs but we do it only
for gt0. Invalidate the caches for all the tiles.

Reported-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
---
 drivers/gpu/drm/i915/gem/i915_gem_pages.c | 12 +++++++++---
 1 file changed, 9 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pages.c b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
index 97c820eee115a..37d23e328bd0c 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pages.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pages.c
@@ -13,6 +13,7 @@
 #include "i915_gem_mman.h"
 
 #include "gt/intel_gt.h"
+#include "gt/intel_gt_pm.h"
 
 void __i915_gem_object_set_pages(struct drm_i915_gem_object *obj,
 				 struct sg_table *pages,
@@ -217,10 +218,15 @@ __i915_gem_object_unset_pages(struct drm_i915_gem_object *obj)
 
 	if (test_and_clear_bit(I915_BO_WAS_BOUND_BIT, &obj->flags)) {
 		struct drm_i915_private *i915 = to_i915(obj->base.dev);
-		intel_wakeref_t wakeref;
+		struct intel_gt *gt;
+		int i;
 
-		with_intel_runtime_pm_if_active(&i915->runtime_pm, wakeref)
-			intel_gt_invalidate_tlbs(to_gt(i915));
+		for_each_gt(gt, i915, i) {
+			int tmp;
+
+			with_intel_gt_pm_if_awake(gt, tmp)
+				intel_gt_invalidate_tlbs(gt);
+		}
 	}
 
 	return pages;
-- 
2.36.1

[PATCH v4 3/3] drm/i915/gt: Skip TLB invalidation if the engine is not awake

[Andi Shyti]

We want to check if the engine is awake first before invalidating
its cache.

Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
---
 drivers/gpu/drm/i915/gt/intel_gt.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
index 034182f85501b..a1dc9f4203c2b 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -12,6 +12,7 @@
 #include "i915_drv.h"
 #include "intel_context.h"
 #include "intel_engine_regs.h"
+#include "intel_engine_pm.h"
 #include "intel_gt.h"
 #include "intel_gt_buffer_pool.h"
 #include "intel_gt_clock_utils.h"
@@ -1219,6 +1220,9 @@ void intel_gt_invalidate_tlbs(struct intel_gt *gt)
 		const unsigned int timeout_ms = 4;
 		struct reg_and_bit rb;
 
+		if (!intel_engine_pm_is_awake(engine))
+			continue;
+
 		rb = get_reg_and_bit(engine, regs == gen8_regs, regs, num);
 		if (!i915_mmio_reg_offset(rb.reg))
 			continue;
-- 
2.36.1

[Intel-gfx] [PATCH v4 3/3] drm/i915/gt: Skip TLB invalidation if the engine is not awake

[Andi Shyti]

We want to check if the engine is awake first before invalidating
its cache.

Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
---
 drivers/gpu/drm/i915/gt/intel_gt.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
index 034182f85501b..a1dc9f4203c2b 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -12,6 +12,7 @@
 #include "i915_drv.h"
 #include "intel_context.h"
 #include "intel_engine_regs.h"
+#include "intel_engine_pm.h"
 #include "intel_gt.h"
 #include "intel_gt_buffer_pool.h"
 #include "intel_gt_clock_utils.h"
@@ -1219,6 +1220,9 @@ void intel_gt_invalidate_tlbs(struct intel_gt *gt)
 		const unsigned int timeout_ms = 4;
 		struct reg_and_bit rb;
 
+		if (!intel_engine_pm_is_awake(engine))
+			continue;
+
 		rb = get_reg_and_bit(engine, regs == gen8_regs, regs, num);
 		if (!i915_mmio_reg_offset(rb.reg))
 			continue;
-- 
2.36.1

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Clear TLB caches in all tiles when object is removed

[Patchwork]

== Series Details ==

Series: Clear TLB caches in all tiles when object is removed
URL   : https://patchwork.freedesktop.org/series/103846/
State : warning

== Summary ==

Error: dim checkpatch failed
f8c5bb9dff90 drm/i915/gt: Ignore TLB invalidations on idle engines
-:22: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'gt' - possible side-effects?
#22: FILE: drivers/gpu/drm/i915/gt/intel_gt_pm.h:58:
+#define with_intel_gt_pm_if_awake(gt, tmp) \
+	for (tmp = 1, intel_gt_pm_get_if_awake(gt); tmp; \
+	     intel_gt_pm_put(gt), tmp = 0)

-:22: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'tmp' - possible side-effects?
#22: FILE: drivers/gpu/drm/i915/gt/intel_gt_pm.h:58:
+#define with_intel_gt_pm_if_awake(gt, tmp) \
+	for (tmp = 1, intel_gt_pm_get_if_awake(gt); tmp; \
+	     intel_gt_pm_put(gt), tmp = 0)

total: 0 errors, 0 warnings, 2 checks, 10 lines checked
20649dd77c54 drm/i915/gem: Flush TLBs for all the tiles when clearing an obj
ce3788fd518e drm/i915/gt: Skip TLB invalidation if the engine is not awake

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Clear TLB caches in all tiles when object is removed

[Patchwork]

== Series Details ==

Series: Clear TLB caches in all tiles when object is removed
URL   : https://patchwork.freedesktop.org/series/103846/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:28:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:28:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:28:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:33:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:33:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:51:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:51:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:51:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:57:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_engine_stats.h:57:9: warning: trying to copy expression type 31
+drivers/gpu/drm/i915/gt/intel_reset.c:1391:5: warning: context imbalance in 'intel_gt_reset_trylock' - different lock contexts for basic block

[Intel-gfx] ✗ Fi.CI.BAT: failure for Clear TLB caches in all tiles when object is removed

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 11131 bytes --]

== Series Details ==

Series: Clear TLB caches in all tiles when object is removed
URL   : https://patchwork.freedesktop.org/series/103846/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_11631 -> Patchwork_103846v1
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_103846v1 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_103846v1, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/index.html

Participating hosts (43 -> 43)
------------------------------

  Additional (3): fi-kbl-soraka fi-rkl-11600 bat-dg1-6 
  Missing    (3): fi-ctg-p8600 fi-bsw-cyan fi-tgl-dsi 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_103846v1:

### IGT changes ###

#### Possible regressions ####

  * igt@gem_busy@busy@all:
    - fi-pnv-d510:        [PASS][1] -> [DMESG-WARN][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11631/fi-pnv-d510/igt@gem_busy@busy@all.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-pnv-d510/igt@gem_busy@busy@all.html
    - fi-bwr-2160:        [PASS][3] -> [DMESG-WARN][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11631/fi-bwr-2160/igt@gem_busy@busy@all.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-bwr-2160/igt@gem_busy@busy@all.html
    - fi-hsw-4770:        [PASS][5] -> [DMESG-WARN][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11631/fi-hsw-4770/igt@gem_busy@busy@all.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-hsw-4770/igt@gem_busy@busy@all.html
    - fi-ivb-3770:        [PASS][7] -> [DMESG-WARN][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11631/fi-ivb-3770/igt@gem_busy@busy@all.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-ivb-3770/igt@gem_busy@busy@all.html

  * igt@gem_close_race@basic-process:
    - fi-blb-e6850:       [PASS][9] -> [INCOMPLETE][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11631/fi-blb-e6850/igt@gem_close_race@basic-process.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-blb-e6850/igt@gem_close_race@basic-process.html

  * igt@runner@aborted:
    - fi-ilk-650:         NOTRUN -> [FAIL][11]
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-ilk-650/igt@runner@aborted.html
    - fi-elk-e7500:       NOTRUN -> [FAIL][12]
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-elk-e7500/igt@runner@aborted.html

  
Known issues
------------

  Here are the changes found in Patchwork_103846v1 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@runner@aborted:
    - fi-rkl-11600:       NOTRUN -> [FAIL][13] ([i915#5602])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-rkl-11600/igt@runner@aborted.html
    - fi-snb-2600:        NOTRUN -> [FAIL][14] ([i915#5602])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-snb-2600/igt@runner@aborted.html
    - fi-kbl-x1275:       NOTRUN -> [FAIL][15] ([i915#5602] / [i915#5917])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-kbl-x1275/igt@runner@aborted.html
    - fi-bsw-kefka:       NOTRUN -> [FAIL][16] ([i915#3690])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-bsw-kefka/igt@runner@aborted.html
    - fi-bdw-gvtdvm:      NOTRUN -> [FAIL][17] ([i915#5917])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-bdw-gvtdvm/igt@runner@aborted.html
    - fi-cfl-8700k:       NOTRUN -> [FAIL][18] ([i915#5917])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-cfl-8700k/igt@runner@aborted.html
    - fi-cfl-8109u:       NOTRUN -> [FAIL][19] ([i915#5602] / [i915#5917])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-cfl-8109u/igt@runner@aborted.html
    - fi-bsw-nick:        NOTRUN -> [FAIL][20] ([i915#3690])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-bsw-nick/igt@runner@aborted.html
    - fi-kbl-8809g:       NOTRUN -> [FAIL][21] ([i915#5602] / [i915#5917])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-kbl-8809g/igt@runner@aborted.html
    - fi-snb-2520m:       NOTRUN -> [FAIL][22] ([i915#5602])
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-snb-2520m/igt@runner@aborted.html
    - fi-bdw-5557u:       NOTRUN -> [FAIL][23] ([i915#5917])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-bdw-5557u/igt@runner@aborted.html
    - fi-bwr-2160:        NOTRUN -> [FAIL][24] ([i915#4312])
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-bwr-2160/igt@runner@aborted.html
    - fi-hsw-g3258:       NOTRUN -> [FAIL][25] ([i915#5917])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-hsw-g3258/igt@runner@aborted.html
    - fi-kbl-soraka:      NOTRUN -> [FAIL][26] ([i915#5602] / [i915#5917])
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-kbl-soraka/igt@runner@aborted.html
    - fi-kbl-7500u:       NOTRUN -> [FAIL][27] ([i915#5602] / [i915#5917])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-kbl-7500u/igt@runner@aborted.html
    - fi-kbl-guc:         NOTRUN -> [FAIL][28] ([i915#5602] / [i915#5917])
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-kbl-guc/igt@runner@aborted.html
    - fi-rkl-guc:         NOTRUN -> [FAIL][29] ([i915#5602])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-rkl-guc/igt@runner@aborted.html
    - fi-ivb-3770:        NOTRUN -> [FAIL][30] ([i915#4312])
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-ivb-3770/igt@runner@aborted.html
    - fi-bxt-dsi:         NOTRUN -> [FAIL][31] ([i915#5917])
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-bxt-dsi/igt@runner@aborted.html
    - fi-adl-ddr5:        NOTRUN -> [FAIL][32] ([i915#5917])
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-adl-ddr5/igt@runner@aborted.html
    - bat-dg1-6:          NOTRUN -> [FAIL][33] ([i915#5616])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/bat-dg1-6/igt@runner@aborted.html
    - fi-cfl-guc:         NOTRUN -> [FAIL][34] ([i915#5917])
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-cfl-guc/igt@runner@aborted.html
    - fi-glk-j4005:       NOTRUN -> [FAIL][35] ([i915#5917])
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-glk-j4005/igt@runner@aborted.html
    - fi-kbl-7567u:       NOTRUN -> [FAIL][36] ([i915#5602] / [i915#5917])
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-kbl-7567u/igt@runner@aborted.html
    - fi-skl-guc:         NOTRUN -> [FAIL][37] ([i915#5602] / [i915#5917])
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-skl-guc/igt@runner@aborted.html
    - fi-skl-6700k2:      NOTRUN -> [FAIL][38] ([i915#5602] / [i915#5917])
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-skl-6700k2/igt@runner@aborted.html
    - fi-bsw-n3050:       NOTRUN -> [FAIL][39] ([i915#3690])
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-bsw-n3050/igt@runner@aborted.html

  
#### Warnings ####

  * igt@runner@aborted:
    - fi-pnv-d510:        [FAIL][40] ([fdo#109271] / [i915#2403] / [i915#4312]) -> [FAIL][41] ([i915#2403] / [i915#4312])
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11631/fi-pnv-d510/igt@runner@aborted.html
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-pnv-d510/igt@runner@aborted.html
    - bat-dg1-5:          [FAIL][42] ([i915#4312] / [i915#5257]) -> [FAIL][43] ([i915#5616])
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11631/bat-dg1-5/igt@runner@aborted.html
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/bat-dg1-5/igt@runner@aborted.html
    - fi-apl-guc:         [FAIL][44] ([i915#4312]) -> [FAIL][45] ([i915#5917])
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11631/fi-apl-guc/igt@runner@aborted.html
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-apl-guc/igt@runner@aborted.html
    - fi-hsw-4770:        [FAIL][46] ([fdo#109271] / [i915#4312] / [i915#5594]) -> [FAIL][47] ([i915#4312] / [i915#5594])
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11631/fi-hsw-4770/igt@runner@aborted.html
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-hsw-4770/igt@runner@aborted.html
    - fi-tgl-1115g4:      [FAIL][48] ([i915#4312] / [i915#5257]) -> [FAIL][49] ([i915#3690])
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11631/fi-tgl-1115g4/igt@runner@aborted.html
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-tgl-1115g4/igt@runner@aborted.html
    - fi-blb-e6850:       [FAIL][50] ([fdo#109271] / [i915#2403] / [i915#4312]) -> [FAIL][51] ([i915#2403] / [i915#4312])
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11631/fi-blb-e6850/igt@runner@aborted.html
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/fi-blb-e6850/igt@runner@aborted.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [i915#2403]: https://gitlab.freedesktop.org/drm/intel/issues/2403
  [i915#3690]: https://gitlab.freedesktop.org/drm/intel/issues/3690
  [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
  [i915#4897]: https://gitlab.freedesktop.org/drm/intel/issues/4897
  [i915#5257]: https://gitlab.freedesktop.org/drm/intel/issues/5257
  [i915#5594]: https://gitlab.freedesktop.org/drm/intel/issues/5594
  [i915#5602]: https://gitlab.freedesktop.org/drm/intel/issues/5602
  [i915#5616]: https://gitlab.freedesktop.org/drm/intel/issues/5616
  [i915#5917]: https://gitlab.freedesktop.org/drm/intel/issues/5917


Build changes
-------------

  * Linux: CI_DRM_11631 -> Patchwork_103846v1

  CI-20190529: 20190529
  CI_DRM_11631: 410072c9a105aa0f2d37b8793ae5e5b43f6fa066 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_6471: 1d6816f1200520f936a799b7b0ef2e6f396abb16 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_103846v1: 410072c9a105aa0f2d37b8793ae5e5b43f6fa066 @ git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

acc4e00b934b drm/i915/gt: Skip TLB invalidation if the engine is not awake
3a16bc2a0da3 drm/i915/gem: Flush TLBs for all the tiles when clearing an obj
e0c6789a6f65 drm/i915/gt: Ignore TLB invalidations on idle engines

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103846v1/index.html

[-- Attachment #2: Type: text/html, Size: 15588 bytes --]

Re: [Intel-gfx] [PATCH v4 1/3] drm/i915/gt: Ignore TLB invalidations on idle engines

[Tvrtko Ursulin]

On 11/05/2022 02:11, Andi Shyti wrote:
> From: Chris Wilson <chris@chris-wilson.co.uk>
> 
> As an extension of the current skip TLB invalidations if the device is
> powered down, we recognised that prior to any engine activity, all the
> TLBs are explicitly invalidated. Thus anytime we know the engine is
> asleep, we can skip invalidating the TLBs on that engine.

I've only noticed this after looking at the single patch version.

The commit message here does not match the patch really and CI also says 
something is not quite right.

Otherwise the idea I think is a good one. I think it can work together 
with the optimisation I mentioned in my reply to the single patch version.

But there is no rush, for_each_gt flow is unreachable in upstream anyway.

Regards,

Tvrtko

> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
> ---
>   drivers/gpu/drm/i915/gt/intel_gt_pm.h | 4 ++++
>   1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.h b/drivers/gpu/drm/i915/gt/intel_gt_pm.h
> index bc898df7a48cc..3b1fbce7ea369 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_pm.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.h
> @@ -55,6 +55,10 @@ static inline void intel_gt_pm_might_put(struct intel_gt *gt)
>   	for (tmp = 1, intel_gt_pm_get(gt); tmp; \
>   	     intel_gt_pm_put(gt), tmp = 0)
>   
> +#define with_intel_gt_pm_if_awake(gt, tmp) \
> +	for (tmp = 1, intel_gt_pm_get_if_awake(gt); tmp; \
> +	     intel_gt_pm_put(gt), tmp = 0)
> +
>   static inline int intel_gt_pm_wait_for_idle(struct intel_gt *gt)
>   {
>   	return intel_wakeref_wait_for_idle(&gt->wakeref);