[PATCH v3 0/3] HDR aux backlight range calculation

[PATCH v3 0/3] HDR aux backlight range calculation

[Jouni Högander]

This patch set splits out static hdr metadata backlight range parsing
from gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c into gpu/drm/drm-edid.c
as a new function. This new function is then used during edid parsing
when HDR static metadata block parsing.

Calculated values are stored in a new struct drm_luminance_range
introduced into display_info. Amdgpu_dm.c and intel_dp_aux_backlight.c
are using this new data.

v3: Some clean-ups suggested by Jani Nikula
v2: Calculate the range during edid parsing and store into display_info

Cc: Roman Li <roman.li@amd.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Lyude Paul <lyude@redhat.com>
Cc: Mika Kahola <mika.kahola@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>

Jouni Högander (3):
  drm: New function to get luminance range based on static hdr metadata
  drm/amdgpu_dm: Rely on split out luminance calculation function
  drm/i915: Use luminance range calculated during edid parsing

 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 35 ++-----------
 drivers/gpu/drm/drm_edid.c                    | 52 ++++++++++++++++++-
 .../drm/i915/display/intel_dp_aux_backlight.c | 15 +++++-
 include/drm/drm_connector.h                   | 21 ++++++++
 4 files changed, 89 insertions(+), 34 deletions(-)

-- 
2.25.1

[Intel-gfx] [PATCH v3 0/3] HDR aux backlight range calculation

[Jouni Högander]

This patch set splits out static hdr metadata backlight range parsing
from gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c into gpu/drm/drm-edid.c
as a new function. This new function is then used during edid parsing
when HDR static metadata block parsing.

Calculated values are stored in a new struct drm_luminance_range
introduced into display_info. Amdgpu_dm.c and intel_dp_aux_backlight.c
are using this new data.

v3: Some clean-ups suggested by Jani Nikula
v2: Calculate the range during edid parsing and store into display_info

Cc: Roman Li <roman.li@amd.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Lyude Paul <lyude@redhat.com>
Cc: Mika Kahola <mika.kahola@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>

Jouni Högander (3):
  drm: New function to get luminance range based on static hdr metadata
  drm/amdgpu_dm: Rely on split out luminance calculation function
  drm/i915: Use luminance range calculated during edid parsing

 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 35 ++-----------
 drivers/gpu/drm/drm_edid.c                    | 52 ++++++++++++++++++-
 .../drm/i915/display/intel_dp_aux_backlight.c | 15 +++++-
 include/drm/drm_connector.h                   | 21 ++++++++
 4 files changed, 89 insertions(+), 34 deletions(-)

-- 
2.25.1

[PATCH v3 0/3] HDR aux backlight range calculation

[Jouni Högander]

This patch set splits out static hdr metadata backlight range parsing
from gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c into gpu/drm/drm-edid.c
as a new function. This new function is then used during edid parsing
when HDR static metadata block parsing.

Calculated values are stored in a new struct drm_luminance_range
introduced into display_info. Amdgpu_dm.c and intel_dp_aux_backlight.c
are using this new data.

v3: Some clean-ups suggested by Jani Nikula
v2: Calculate the range during edid parsing and store into display_info

Cc: Roman Li <roman.li@amd.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Lyude Paul <lyude@redhat.com>
Cc: Mika Kahola <mika.kahola@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>

Jouni Högander (3):
  drm: New function to get luminance range based on static hdr metadata
  drm/amdgpu_dm: Rely on split out luminance calculation function
  drm/i915: Use luminance range calculated during edid parsing

 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 35 ++-----------
 drivers/gpu/drm/drm_edid.c                    | 52 ++++++++++++++++++-
 .../drm/i915/display/intel_dp_aux_backlight.c | 15 +++++-
 include/drm/drm_connector.h                   | 21 ++++++++
 4 files changed, 89 insertions(+), 34 deletions(-)

-- 
2.25.1

[PATCH v3 1/3] drm: New function to get luminance range based on static hdr metadata

[Jouni Högander]

Split luminance min/max calculation using static hdr metadata from
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c:update_connector_ext_caps
into drm/drm_edid.c and use it during edid parsing. Calculated range is
stored into connector->display_info->luminance_range.

Add new data structure (drm_luminance_range_inf) to store luminance range
calculated using data from EDID's static hdr metadata block. Add this new
struct as a part of drm_display_info struct.

v3: Squashed adding drm_luminance_range_info patch here
v2: Calculate range during edid parsing

Cc: Roman Li <roman.li@amd.com>
Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Lyude Paul <lyude@redhat.com>
Cc: Mika Kahola <mika.kahola@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/drm_edid.c  | 52 ++++++++++++++++++++++++++++++++++++-
 include/drm/drm_connector.h | 21 +++++++++++++++
 2 files changed, 72 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index bbc25e3b7220..90a5e26eafa8 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -5165,6 +5165,51 @@ static void fixup_detailed_cea_mode_clock(struct drm_display_mode *mode)
 	mode->clock = clock;
 }
 
+static void drm_calculate_luminance_range(struct drm_connector *connector)
+{
+	struct hdr_static_metadata *hdr_metadata = &connector->hdr_sink_metadata.hdmi_type1;
+	struct drm_luminance_range_info *luminance_range =
+		&connector->display_info.luminance_range;
+	static const u8 pre_computed_values[] = {
+		50, 51, 52, 53, 55, 56, 57, 58, 59, 61, 62, 63, 65, 66, 68, 69,
+		71, 72, 74, 75, 77, 79, 81, 82, 84, 86, 88, 90, 92, 94, 96, 98
+	};
+	u32 max_avg, min_cll, max, min, q, r;
+
+	if (!(hdr_metadata->metadata_type & BIT(HDMI_STATIC_METADATA_TYPE1)))
+		return;
+
+	max_avg = hdr_metadata->max_fall;
+	min_cll = hdr_metadata->min_cll;
+
+	/*
+	 * From the specification (CTA-861-G), for calculating the maximum
+	 * luminance we need to use:
+	 *	Luminance = 50*2**(CV/32)
+	 * Where CV is a one-byte value.
+	 * For calculating this expression we may need float point precision;
+	 * to avoid this complexity level, we take advantage that CV is divided
+	 * by a constant. From the Euclids division algorithm, we know that CV
+	 * can be written as: CV = 32*q + r. Next, we replace CV in the
+	 * Luminance expression and get 50*(2**q)*(2**(r/32)), hence we just
+	 * need to pre-compute the value of r/32. For pre-computing the values
+	 * We just used the following Ruby line:
+	 *	(0...32).each {|cv| puts (50*2**(cv/32.0)).round}
+	 * The results of the above expressions can be verified at
+	 * pre_computed_values.
+	 */
+	q = max_avg >> 5;
+	r = max_avg % 32;
+	max = (1 << q) * pre_computed_values[r];
+
+	/* min luminance: maxLum * (CV/255)^2 / 100 */
+	q = DIV_ROUND_CLOSEST(min_cll, 255);
+	min = max * DIV_ROUND_CLOSEST((q * q), 100);
+
+	luminance_range->min_luminance = min;
+	luminance_range->max_luminance = max;
+}
+
 static uint8_t eotf_supported(const u8 *edid_ext)
 {
 	return edid_ext[2] &
@@ -5196,8 +5241,12 @@ drm_parse_hdr_metadata_block(struct drm_connector *connector, const u8 *db)
 		connector->hdr_sink_metadata.hdmi_type1.max_cll = db[4];
 	if (len >= 5)
 		connector->hdr_sink_metadata.hdmi_type1.max_fall = db[5];
-	if (len >= 6)
+	if (len >= 6) {
 		connector->hdr_sink_metadata.hdmi_type1.min_cll = db[6];
+
+		/* Calculate only when all values are available */
+		drm_calculate_luminance_range(connector);
+	}
 }
 
 static void
@@ -6101,6 +6150,7 @@ static void drm_reset_display_info(struct drm_connector *connector)
 
 	info->non_desktop = 0;
 	memset(&info->monitor_range, 0, sizeof(info->monitor_range));
+	memset(&info->luminance_range, 0, sizeof(info->luminance_range));
 
 	info->mso_stream_count = 0;
 	info->mso_pixel_overlap = 0;
diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h
index 2c6fa746efac..248206bbd975 100644
--- a/include/drm/drm_connector.h
+++ b/include/drm/drm_connector.h
@@ -323,6 +323,22 @@ struct drm_monitor_range_info {
 	u8 max_vfreq;
 };
 
+/**
+ * struct drm_luminance_range_info - Panel's luminance range for
+ * &drm_display_info. Calculated using data in EDID
+ *
+ * This struct is used to store a luminance range supported by panel
+ * as calculated using data from EDID's static hdr metadata.
+ *
+ * @min_luminance: This is the min supported luminance value
+ *
+ * @max_luminance: This is the max supported luminance value
+ */
+struct drm_luminance_range_info {
+	u32 min_luminance;
+	u32 max_luminance;
+};
+
 /**
  * enum drm_privacy_screen_status - privacy screen status
  *
@@ -624,6 +640,11 @@ struct drm_display_info {
 	 */
 	struct drm_monitor_range_info monitor_range;
 
+	/**
+	 * @luminance_range: Luminance range supported by panel
+	 */
+	struct drm_luminance_range_info luminance_range;
+
 	/**
 	 * @mso_stream_count: eDP Multi-SST Operation (MSO) stream count from
 	 * the DisplayID VESA vendor block. 0 for conventional Single-Stream
-- 
2.25.1

[Intel-gfx] [PATCH v3 1/3] drm: New function to get luminance range based on static hdr metadata

[Jouni Högander]

Split luminance min/max calculation using static hdr metadata from
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c:update_connector_ext_caps
into drm/drm_edid.c and use it during edid parsing. Calculated range is
stored into connector->display_info->luminance_range.

Add new data structure (drm_luminance_range_inf) to store luminance range
calculated using data from EDID's static hdr metadata block. Add this new
struct as a part of drm_display_info struct.

v3: Squashed adding drm_luminance_range_info patch here
v2: Calculate range during edid parsing

Cc: Roman Li <roman.li@amd.com>
Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Lyude Paul <lyude@redhat.com>
Cc: Mika Kahola <mika.kahola@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/drm_edid.c  | 52 ++++++++++++++++++++++++++++++++++++-
 include/drm/drm_connector.h | 21 +++++++++++++++
 2 files changed, 72 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index bbc25e3b7220..90a5e26eafa8 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -5165,6 +5165,51 @@ static void fixup_detailed_cea_mode_clock(struct drm_display_mode *mode)
 	mode->clock = clock;
 }
 
+static void drm_calculate_luminance_range(struct drm_connector *connector)
+{
+	struct hdr_static_metadata *hdr_metadata = &connector->hdr_sink_metadata.hdmi_type1;
+	struct drm_luminance_range_info *luminance_range =
+		&connector->display_info.luminance_range;
+	static const u8 pre_computed_values[] = {
+		50, 51, 52, 53, 55, 56, 57, 58, 59, 61, 62, 63, 65, 66, 68, 69,
+		71, 72, 74, 75, 77, 79, 81, 82, 84, 86, 88, 90, 92, 94, 96, 98
+	};
+	u32 max_avg, min_cll, max, min, q, r;
+
+	if (!(hdr_metadata->metadata_type & BIT(HDMI_STATIC_METADATA_TYPE1)))
+		return;
+
+	max_avg = hdr_metadata->max_fall;
+	min_cll = hdr_metadata->min_cll;
+
+	/*
+	 * From the specification (CTA-861-G), for calculating the maximum
+	 * luminance we need to use:
+	 *	Luminance = 50*2**(CV/32)
+	 * Where CV is a one-byte value.
+	 * For calculating this expression we may need float point precision;
+	 * to avoid this complexity level, we take advantage that CV is divided
+	 * by a constant. From the Euclids division algorithm, we know that CV
+	 * can be written as: CV = 32*q + r. Next, we replace CV in the
+	 * Luminance expression and get 50*(2**q)*(2**(r/32)), hence we just
+	 * need to pre-compute the value of r/32. For pre-computing the values
+	 * We just used the following Ruby line:
+	 *	(0...32).each {|cv| puts (50*2**(cv/32.0)).round}
+	 * The results of the above expressions can be verified at
+	 * pre_computed_values.
+	 */
+	q = max_avg >> 5;
+	r = max_avg % 32;
+	max = (1 << q) * pre_computed_values[r];
+
+	/* min luminance: maxLum * (CV/255)^2 / 100 */
+	q = DIV_ROUND_CLOSEST(min_cll, 255);
+	min = max * DIV_ROUND_CLOSEST((q * q), 100);
+
+	luminance_range->min_luminance = min;
+	luminance_range->max_luminance = max;
+}
+
 static uint8_t eotf_supported(const u8 *edid_ext)
 {
 	return edid_ext[2] &
@@ -5196,8 +5241,12 @@ drm_parse_hdr_metadata_block(struct drm_connector *connector, const u8 *db)
 		connector->hdr_sink_metadata.hdmi_type1.max_cll = db[4];
 	if (len >= 5)
 		connector->hdr_sink_metadata.hdmi_type1.max_fall = db[5];
-	if (len >= 6)
+	if (len >= 6) {
 		connector->hdr_sink_metadata.hdmi_type1.min_cll = db[6];
+
+		/* Calculate only when all values are available */
+		drm_calculate_luminance_range(connector);
+	}
 }
 
 static void
@@ -6101,6 +6150,7 @@ static void drm_reset_display_info(struct drm_connector *connector)
 
 	info->non_desktop = 0;
 	memset(&info->monitor_range, 0, sizeof(info->monitor_range));
+	memset(&info->luminance_range, 0, sizeof(info->luminance_range));
 
 	info->mso_stream_count = 0;
 	info->mso_pixel_overlap = 0;
diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h
index 2c6fa746efac..248206bbd975 100644
--- a/include/drm/drm_connector.h
+++ b/include/drm/drm_connector.h
@@ -323,6 +323,22 @@ struct drm_monitor_range_info {
 	u8 max_vfreq;
 };
 
+/**
+ * struct drm_luminance_range_info - Panel's luminance range for
+ * &drm_display_info. Calculated using data in EDID
+ *
+ * This struct is used to store a luminance range supported by panel
+ * as calculated using data from EDID's static hdr metadata.
+ *
+ * @min_luminance: This is the min supported luminance value
+ *
+ * @max_luminance: This is the max supported luminance value
+ */
+struct drm_luminance_range_info {
+	u32 min_luminance;
+	u32 max_luminance;
+};
+
 /**
  * enum drm_privacy_screen_status - privacy screen status
  *
@@ -624,6 +640,11 @@ struct drm_display_info {
 	 */
 	struct drm_monitor_range_info monitor_range;
 
+	/**
+	 * @luminance_range: Luminance range supported by panel
+	 */
+	struct drm_luminance_range_info luminance_range;
+
 	/**
 	 * @mso_stream_count: eDP Multi-SST Operation (MSO) stream count from
 	 * the DisplayID VESA vendor block. 0 for conventional Single-Stream
-- 
2.25.1

[PATCH v3 1/3] drm: New function to get luminance range based on static hdr metadata

[Jouni Högander]

Split luminance min/max calculation using static hdr metadata from
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c:update_connector_ext_caps
into drm/drm_edid.c and use it during edid parsing. Calculated range is
stored into connector->display_info->luminance_range.

Add new data structure (drm_luminance_range_inf) to store luminance range
calculated using data from EDID's static hdr metadata block. Add this new
struct as a part of drm_display_info struct.

v3: Squashed adding drm_luminance_range_info patch here
v2: Calculate range during edid parsing

Cc: Roman Li <roman.li@amd.com>
Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Lyude Paul <lyude@redhat.com>
Cc: Mika Kahola <mika.kahola@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/drm_edid.c  | 52 ++++++++++++++++++++++++++++++++++++-
 include/drm/drm_connector.h | 21 +++++++++++++++
 2 files changed, 72 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index bbc25e3b7220..90a5e26eafa8 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -5165,6 +5165,51 @@ static void fixup_detailed_cea_mode_clock(struct drm_display_mode *mode)
 	mode->clock = clock;
 }
 
+static void drm_calculate_luminance_range(struct drm_connector *connector)
+{
+	struct hdr_static_metadata *hdr_metadata = &connector->hdr_sink_metadata.hdmi_type1;
+	struct drm_luminance_range_info *luminance_range =
+		&connector->display_info.luminance_range;
+	static const u8 pre_computed_values[] = {
+		50, 51, 52, 53, 55, 56, 57, 58, 59, 61, 62, 63, 65, 66, 68, 69,
+		71, 72, 74, 75, 77, 79, 81, 82, 84, 86, 88, 90, 92, 94, 96, 98
+	};
+	u32 max_avg, min_cll, max, min, q, r;
+
+	if (!(hdr_metadata->metadata_type & BIT(HDMI_STATIC_METADATA_TYPE1)))
+		return;
+
+	max_avg = hdr_metadata->max_fall;
+	min_cll = hdr_metadata->min_cll;
+
+	/*
+	 * From the specification (CTA-861-G), for calculating the maximum
+	 * luminance we need to use:
+	 *	Luminance = 50*2**(CV/32)
+	 * Where CV is a one-byte value.
+	 * For calculating this expression we may need float point precision;
+	 * to avoid this complexity level, we take advantage that CV is divided
+	 * by a constant. From the Euclids division algorithm, we know that CV
+	 * can be written as: CV = 32*q + r. Next, we replace CV in the
+	 * Luminance expression and get 50*(2**q)*(2**(r/32)), hence we just
+	 * need to pre-compute the value of r/32. For pre-computing the values
+	 * We just used the following Ruby line:
+	 *	(0...32).each {|cv| puts (50*2**(cv/32.0)).round}
+	 * The results of the above expressions can be verified at
+	 * pre_computed_values.
+	 */
+	q = max_avg >> 5;
+	r = max_avg % 32;
+	max = (1 << q) * pre_computed_values[r];
+
+	/* min luminance: maxLum * (CV/255)^2 / 100 */
+	q = DIV_ROUND_CLOSEST(min_cll, 255);
+	min = max * DIV_ROUND_CLOSEST((q * q), 100);
+
+	luminance_range->min_luminance = min;
+	luminance_range->max_luminance = max;
+}
+
 static uint8_t eotf_supported(const u8 *edid_ext)
 {
 	return edid_ext[2] &
@@ -5196,8 +5241,12 @@ drm_parse_hdr_metadata_block(struct drm_connector *connector, const u8 *db)
 		connector->hdr_sink_metadata.hdmi_type1.max_cll = db[4];
 	if (len >= 5)
 		connector->hdr_sink_metadata.hdmi_type1.max_fall = db[5];
-	if (len >= 6)
+	if (len >= 6) {
 		connector->hdr_sink_metadata.hdmi_type1.min_cll = db[6];
+
+		/* Calculate only when all values are available */
+		drm_calculate_luminance_range(connector);
+	}
 }
 
 static void
@@ -6101,6 +6150,7 @@ static void drm_reset_display_info(struct drm_connector *connector)
 
 	info->non_desktop = 0;
 	memset(&info->monitor_range, 0, sizeof(info->monitor_range));
+	memset(&info->luminance_range, 0, sizeof(info->luminance_range));
 
 	info->mso_stream_count = 0;
 	info->mso_pixel_overlap = 0;
diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h
index 2c6fa746efac..248206bbd975 100644
--- a/include/drm/drm_connector.h
+++ b/include/drm/drm_connector.h
@@ -323,6 +323,22 @@ struct drm_monitor_range_info {
 	u8 max_vfreq;
 };
 
+/**
+ * struct drm_luminance_range_info - Panel's luminance range for
+ * &drm_display_info. Calculated using data in EDID
+ *
+ * This struct is used to store a luminance range supported by panel
+ * as calculated using data from EDID's static hdr metadata.
+ *
+ * @min_luminance: This is the min supported luminance value
+ *
+ * @max_luminance: This is the max supported luminance value
+ */
+struct drm_luminance_range_info {
+	u32 min_luminance;
+	u32 max_luminance;
+};
+
 /**
  * enum drm_privacy_screen_status - privacy screen status
  *
@@ -624,6 +640,11 @@ struct drm_display_info {
 	 */
 	struct drm_monitor_range_info monitor_range;
 
+	/**
+	 * @luminance_range: Luminance range supported by panel
+	 */
+	struct drm_luminance_range_info luminance_range;
+
 	/**
 	 * @mso_stream_count: eDP Multi-SST Operation (MSO) stream count from
 	 * the DisplayID VESA vendor block. 0 for conventional Single-Stream
-- 
2.25.1

[PATCH v3 2/3] drm/amdgpu_dm: Rely on split out luminance calculation function

[Jouni Högander]

Luminance range calculation was split out into drm_edid.c and is now
part of edid parsing. Rely on values calculated during edid parsing and
use these for caps->aux_max_input_signal and caps->aux_min_input_signal.

v2: Use values calculated during edid parsing

Cc: Roman Li <roman.li@amd.com>
Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Lyude Paul <lyude@redhat.com>
Cc: Mika Kahola <mika.kahola@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 35 +++----------------
 1 file changed, 4 insertions(+), 31 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 3e83fed540e8..eb7abdeb8653 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -2903,15 +2903,12 @@ static struct drm_mode_config_helper_funcs amdgpu_dm_mode_config_helperfuncs = {
 
 static void update_connector_ext_caps(struct amdgpu_dm_connector *aconnector)
 {
-	u32 max_avg, min_cll, max, min, q, r;
 	struct amdgpu_dm_backlight_caps *caps;
 	struct amdgpu_display_manager *dm;
 	struct drm_connector *conn_base;
 	struct amdgpu_device *adev;
 	struct dc_link *link = NULL;
-	static const u8 pre_computed_values[] = {
-		50, 51, 52, 53, 55, 56, 57, 58, 59, 61, 62, 63, 65, 66, 68, 69,
-		71, 72, 74, 75, 77, 79, 81, 82, 84, 86, 88, 90, 92, 94, 96, 98};
+	struct drm_luminance_range_info *luminance_range;
 	int i;
 
 	if (!aconnector || !aconnector->dc_link)
@@ -2933,8 +2930,6 @@ static void update_connector_ext_caps(struct amdgpu_dm_connector *aconnector)
 	caps = &dm->backlight_caps[i];
 	caps->ext_caps = &aconnector->dc_link->dpcd_sink_ext_caps;
 	caps->aux_support = false;
-	max_avg = conn_base->hdr_sink_metadata.hdmi_type1.max_fall;
-	min_cll = conn_base->hdr_sink_metadata.hdmi_type1.min_cll;
 
 	if (caps->ext_caps->bits.oled == 1 /*||
 	    caps->ext_caps->bits.sdr_aux_backlight_control == 1 ||
@@ -2946,31 +2941,9 @@ static void update_connector_ext_caps(struct amdgpu_dm_connector *aconnector)
 	else if (amdgpu_backlight == 1)
 		caps->aux_support = true;
 
-	/* From the specification (CTA-861-G), for calculating the maximum
-	 * luminance we need to use:
-	 *	Luminance = 50*2**(CV/32)
-	 * Where CV is a one-byte value.
-	 * For calculating this expression we may need float point precision;
-	 * to avoid this complexity level, we take advantage that CV is divided
-	 * by a constant. From the Euclids division algorithm, we know that CV
-	 * can be written as: CV = 32*q + r. Next, we replace CV in the
-	 * Luminance expression and get 50*(2**q)*(2**(r/32)), hence we just
-	 * need to pre-compute the value of r/32. For pre-computing the values
-	 * We just used the following Ruby line:
-	 *	(0...32).each {|cv| puts (50*2**(cv/32.0)).round}
-	 * The results of the above expressions can be verified at
-	 * pre_computed_values.
-	 */
-	q = max_avg >> 5;
-	r = max_avg % 32;
-	max = (1 << q) * pre_computed_values[r];
-
-	// min luminance: maxLum * (CV/255)^2 / 100
-	q = DIV_ROUND_CLOSEST(min_cll, 255);
-	min = max * DIV_ROUND_CLOSEST((q * q), 100);
-
-	caps->aux_max_input_signal = max;
-	caps->aux_min_input_signal = min;
+	luminance_range = &conn_base->display_info.luminance_range;
+	caps->aux_min_input_signal = luminance_range->min_luminance;
+	caps->aux_max_input_signal = luminance_range->max_luminance;
 }
 
 void amdgpu_dm_update_connector_after_detect(
-- 
2.25.1

[Intel-gfx] [PATCH v3 2/3] drm/amdgpu_dm: Rely on split out luminance calculation function

[Jouni Högander]

Luminance range calculation was split out into drm_edid.c and is now
part of edid parsing. Rely on values calculated during edid parsing and
use these for caps->aux_max_input_signal and caps->aux_min_input_signal.

v2: Use values calculated during edid parsing

Cc: Roman Li <roman.li@amd.com>
Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Lyude Paul <lyude@redhat.com>
Cc: Mika Kahola <mika.kahola@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 35 +++----------------
 1 file changed, 4 insertions(+), 31 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 3e83fed540e8..eb7abdeb8653 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -2903,15 +2903,12 @@ static struct drm_mode_config_helper_funcs amdgpu_dm_mode_config_helperfuncs = {
 
 static void update_connector_ext_caps(struct amdgpu_dm_connector *aconnector)
 {
-	u32 max_avg, min_cll, max, min, q, r;
 	struct amdgpu_dm_backlight_caps *caps;
 	struct amdgpu_display_manager *dm;
 	struct drm_connector *conn_base;
 	struct amdgpu_device *adev;
 	struct dc_link *link = NULL;
-	static const u8 pre_computed_values[] = {
-		50, 51, 52, 53, 55, 56, 57, 58, 59, 61, 62, 63, 65, 66, 68, 69,
-		71, 72, 74, 75, 77, 79, 81, 82, 84, 86, 88, 90, 92, 94, 96, 98};
+	struct drm_luminance_range_info *luminance_range;
 	int i;
 
 	if (!aconnector || !aconnector->dc_link)
@@ -2933,8 +2930,6 @@ static void update_connector_ext_caps(struct amdgpu_dm_connector *aconnector)
 	caps = &dm->backlight_caps[i];
 	caps->ext_caps = &aconnector->dc_link->dpcd_sink_ext_caps;
 	caps->aux_support = false;
-	max_avg = conn_base->hdr_sink_metadata.hdmi_type1.max_fall;
-	min_cll = conn_base->hdr_sink_metadata.hdmi_type1.min_cll;
 
 	if (caps->ext_caps->bits.oled == 1 /*||
 	    caps->ext_caps->bits.sdr_aux_backlight_control == 1 ||
@@ -2946,31 +2941,9 @@ static void update_connector_ext_caps(struct amdgpu_dm_connector *aconnector)
 	else if (amdgpu_backlight == 1)
 		caps->aux_support = true;
 
-	/* From the specification (CTA-861-G), for calculating the maximum
-	 * luminance we need to use:
-	 *	Luminance = 50*2**(CV/32)
-	 * Where CV is a one-byte value.
-	 * For calculating this expression we may need float point precision;
-	 * to avoid this complexity level, we take advantage that CV is divided
-	 * by a constant. From the Euclids division algorithm, we know that CV
-	 * can be written as: CV = 32*q + r. Next, we replace CV in the
-	 * Luminance expression and get 50*(2**q)*(2**(r/32)), hence we just
-	 * need to pre-compute the value of r/32. For pre-computing the values
-	 * We just used the following Ruby line:
-	 *	(0...32).each {|cv| puts (50*2**(cv/32.0)).round}
-	 * The results of the above expressions can be verified at
-	 * pre_computed_values.
-	 */
-	q = max_avg >> 5;
-	r = max_avg % 32;
-	max = (1 << q) * pre_computed_values[r];
-
-	// min luminance: maxLum * (CV/255)^2 / 100
-	q = DIV_ROUND_CLOSEST(min_cll, 255);
-	min = max * DIV_ROUND_CLOSEST((q * q), 100);
-
-	caps->aux_max_input_signal = max;
-	caps->aux_min_input_signal = min;
+	luminance_range = &conn_base->display_info.luminance_range;
+	caps->aux_min_input_signal = luminance_range->min_luminance;
+	caps->aux_max_input_signal = luminance_range->max_luminance;
 }
 
 void amdgpu_dm_update_connector_after_detect(
-- 
2.25.1

[PATCH v3 2/3] drm/amdgpu_dm: Rely on split out luminance calculation function

[Jouni Högander]

Luminance range calculation was split out into drm_edid.c and is now
part of edid parsing. Rely on values calculated during edid parsing and
use these for caps->aux_max_input_signal and caps->aux_min_input_signal.

v2: Use values calculated during edid parsing

Cc: Roman Li <roman.li@amd.com>
Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Lyude Paul <lyude@redhat.com>
Cc: Mika Kahola <mika.kahola@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 35 +++----------------
 1 file changed, 4 insertions(+), 31 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 3e83fed540e8..eb7abdeb8653 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -2903,15 +2903,12 @@ static struct drm_mode_config_helper_funcs amdgpu_dm_mode_config_helperfuncs = {
 
 static void update_connector_ext_caps(struct amdgpu_dm_connector *aconnector)
 {
-	u32 max_avg, min_cll, max, min, q, r;
 	struct amdgpu_dm_backlight_caps *caps;
 	struct amdgpu_display_manager *dm;
 	struct drm_connector *conn_base;
 	struct amdgpu_device *adev;
 	struct dc_link *link = NULL;
-	static const u8 pre_computed_values[] = {
-		50, 51, 52, 53, 55, 56, 57, 58, 59, 61, 62, 63, 65, 66, 68, 69,
-		71, 72, 74, 75, 77, 79, 81, 82, 84, 86, 88, 90, 92, 94, 96, 98};
+	struct drm_luminance_range_info *luminance_range;
 	int i;
 
 	if (!aconnector || !aconnector->dc_link)
@@ -2933,8 +2930,6 @@ static void update_connector_ext_caps(struct amdgpu_dm_connector *aconnector)
 	caps = &dm->backlight_caps[i];
 	caps->ext_caps = &aconnector->dc_link->dpcd_sink_ext_caps;
 	caps->aux_support = false;
-	max_avg = conn_base->hdr_sink_metadata.hdmi_type1.max_fall;
-	min_cll = conn_base->hdr_sink_metadata.hdmi_type1.min_cll;
 
 	if (caps->ext_caps->bits.oled == 1 /*||
 	    caps->ext_caps->bits.sdr_aux_backlight_control == 1 ||
@@ -2946,31 +2941,9 @@ static void update_connector_ext_caps(struct amdgpu_dm_connector *aconnector)
 	else if (amdgpu_backlight == 1)
 		caps->aux_support = true;
 
-	/* From the specification (CTA-861-G), for calculating the maximum
-	 * luminance we need to use:
-	 *	Luminance = 50*2**(CV/32)
-	 * Where CV is a one-byte value.
-	 * For calculating this expression we may need float point precision;
-	 * to avoid this complexity level, we take advantage that CV is divided
-	 * by a constant. From the Euclids division algorithm, we know that CV
-	 * can be written as: CV = 32*q + r. Next, we replace CV in the
-	 * Luminance expression and get 50*(2**q)*(2**(r/32)), hence we just
-	 * need to pre-compute the value of r/32. For pre-computing the values
-	 * We just used the following Ruby line:
-	 *	(0...32).each {|cv| puts (50*2**(cv/32.0)).round}
-	 * The results of the above expressions can be verified at
-	 * pre_computed_values.
-	 */
-	q = max_avg >> 5;
-	r = max_avg % 32;
-	max = (1 << q) * pre_computed_values[r];
-
-	// min luminance: maxLum * (CV/255)^2 / 100
-	q = DIV_ROUND_CLOSEST(min_cll, 255);
-	min = max * DIV_ROUND_CLOSEST((q * q), 100);
-
-	caps->aux_max_input_signal = max;
-	caps->aux_min_input_signal = min;
+	luminance_range = &conn_base->display_info.luminance_range;
+	caps->aux_min_input_signal = luminance_range->min_luminance;
+	caps->aux_max_input_signal = luminance_range->max_luminance;
 }
 
 void amdgpu_dm_update_connector_after_detect(
-- 
2.25.1

[PATCH v3 3/3] drm/i915: Use luminance range calculated during edid parsing

[Jouni Högander]

Instead of using fixed 0 - 512 range use luminance range calculated
as a part of edid parsing. As a backup fall back to static 0 - 512.

v3: Clean-ups suggested by Jani Nikula
v2: Use values calculated during edid parsing

Cc: Lyude Paul <lyude@redhat.com>
Cc: Mika Kahola <mika.kahola@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 .../gpu/drm/i915/display/intel_dp_aux_backlight.c | 15 +++++++++++++--
 1 file changed, 13 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
index c92d5bb2326a..83af95bce98d 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
@@ -278,6 +278,8 @@ intel_dp_aux_hdr_setup_backlight(struct intel_connector *connector, enum pipe pi
 {
 	struct drm_i915_private *i915 = to_i915(connector->base.dev);
 	struct intel_panel *panel = &connector->panel;
+	struct drm_luminance_range_info *luminance_range =
+		&connector->base.display_info.luminance_range;
 	int ret;
 
 	if (panel->backlight.edp.intel.sdr_uses_aux) {
@@ -293,8 +295,17 @@ intel_dp_aux_hdr_setup_backlight(struct intel_connector *connector, enum pipe pi
 		}
 	}
 
-	panel->backlight.max = 512;
-	panel->backlight.min = 0;
+	if (luminance_range->max_luminance) {
+		panel->backlight.max = luminance_range->max_luminance;
+		panel->backlight.min = luminance_range->min_luminance;
+	} else {
+		panel->backlight.max = 512;
+		panel->backlight.min = 0;
+	}
+
+	drm_dbg_kms(&i915->drm, "Using backlight range %d..%d\n", panel->backlight.min,
+		    panel->backlight.max);
+
 	panel->backlight.level = intel_dp_aux_hdr_get_backlight(connector, pipe);
 	panel->backlight.enabled = panel->backlight.level != 0;
 
-- 
2.25.1

[Intel-gfx] [PATCH v3 3/3] drm/i915: Use luminance range calculated during edid parsing

[Jouni Högander]

Instead of using fixed 0 - 512 range use luminance range calculated
as a part of edid parsing. As a backup fall back to static 0 - 512.

v3: Clean-ups suggested by Jani Nikula
v2: Use values calculated during edid parsing

Cc: Lyude Paul <lyude@redhat.com>
Cc: Mika Kahola <mika.kahola@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 .../gpu/drm/i915/display/intel_dp_aux_backlight.c | 15 +++++++++++++--
 1 file changed, 13 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
index c92d5bb2326a..83af95bce98d 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
@@ -278,6 +278,8 @@ intel_dp_aux_hdr_setup_backlight(struct intel_connector *connector, enum pipe pi
 {
 	struct drm_i915_private *i915 = to_i915(connector->base.dev);
 	struct intel_panel *panel = &connector->panel;
+	struct drm_luminance_range_info *luminance_range =
+		&connector->base.display_info.luminance_range;
 	int ret;
 
 	if (panel->backlight.edp.intel.sdr_uses_aux) {
@@ -293,8 +295,17 @@ intel_dp_aux_hdr_setup_backlight(struct intel_connector *connector, enum pipe pi
 		}
 	}
 
-	panel->backlight.max = 512;
-	panel->backlight.min = 0;
+	if (luminance_range->max_luminance) {
+		panel->backlight.max = luminance_range->max_luminance;
+		panel->backlight.min = luminance_range->min_luminance;
+	} else {
+		panel->backlight.max = 512;
+		panel->backlight.min = 0;
+	}
+
+	drm_dbg_kms(&i915->drm, "Using backlight range %d..%d\n", panel->backlight.min,
+		    panel->backlight.max);
+
 	panel->backlight.level = intel_dp_aux_hdr_get_backlight(connector, pipe);
 	panel->backlight.enabled = panel->backlight.level != 0;
 
-- 
2.25.1

[Intel-gfx] ✓ Fi.CI.BAT: success for HDR aux backlight range calculation

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 8745 bytes --]

== Series Details ==

Series: HDR aux backlight range calculation
URL   : https://patchwork.freedesktop.org/series/106475/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_11922 -> Patchwork_106475v1
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/index.html

Participating hosts (37 -> 36)
------------------------------

  Missing    (1): bat-adln-1 

Known issues
------------

  Here are the changes found in Patchwork_106475v1 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_huc_copy@huc-copy:
    - fi-icl-u2:          NOTRUN -> [SKIP][1] ([i915#2190])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/fi-icl-u2/igt@gem_huc_copy@huc-copy.html

  * igt@gem_lmem_swapping@random-engines:
    - fi-icl-u2:          NOTRUN -> [SKIP][2] ([i915#4613]) +3 similar issues
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/fi-icl-u2/igt@gem_lmem_swapping@random-engines.html

  * igt@i915_selftest@live@gem:
    - fi-pnv-d510:        NOTRUN -> [DMESG-FAIL][3] ([i915#4528])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/fi-pnv-d510/igt@i915_selftest@live@gem.html

  * igt@i915_selftest@live@reset:
    - bat-adlp-4:         [PASS][4] -> [DMESG-FAIL][5] ([i915#4983])
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/bat-adlp-4/igt@i915_selftest@live@reset.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/bat-adlp-4/igt@i915_selftest@live@reset.html

  * igt@i915_suspend@basic-s3-without-i915:
    - fi-icl-u2:          NOTRUN -> [SKIP][6] ([i915#5903])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/fi-icl-u2/igt@i915_suspend@basic-s3-without-i915.html

  * igt@kms_chamelium@common-hpd-after-suspend:
    - fi-blb-e6850:       NOTRUN -> [SKIP][7] ([fdo#109271])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/fi-blb-e6850/igt@kms_chamelium@common-hpd-after-suspend.html

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-icl-u2:          NOTRUN -> [SKIP][8] ([fdo#111827]) +8 similar issues
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/fi-icl-u2/igt@kms_chamelium@hdmi-hpd-fast.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor:
    - fi-icl-u2:          NOTRUN -> [SKIP][9] ([i915#4103])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/fi-icl-u2/igt@kms_cursor_legacy@basic-busy-flip-before-cursor.html

  * igt@kms_force_connector_basic@force-connector-state:
    - fi-icl-u2:          NOTRUN -> [WARN][10] ([i915#6008])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/fi-icl-u2/igt@kms_force_connector_basic@force-connector-state.html

  * igt@kms_force_connector_basic@force-load-detect:
    - fi-icl-u2:          NOTRUN -> [SKIP][11] ([fdo#109285])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/fi-icl-u2/igt@kms_force_connector_basic@force-load-detect.html

  * igt@kms_setmode@basic-clone-single-crtc:
    - fi-icl-u2:          NOTRUN -> [SKIP][12] ([i915#3555])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/fi-icl-u2/igt@kms_setmode@basic-clone-single-crtc.html

  * igt@prime_vgem@basic-userptr:
    - fi-icl-u2:          NOTRUN -> [SKIP][13] ([fdo#109295] / [i915#3301])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/fi-icl-u2/igt@prime_vgem@basic-userptr.html

  * igt@runner@aborted:
    - bat-adlp-4:         NOTRUN -> [FAIL][14] ([i915#4312])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/bat-adlp-4/igt@runner@aborted.html

  
#### Possible fixes ####

  * igt@fbdev@read:
    - {bat-rpls-2}:       [SKIP][15] ([i915#2582]) -> [PASS][16] +4 similar issues
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/bat-rpls-2/igt@fbdev@read.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/bat-rpls-2/igt@fbdev@read.html

  * igt@gem_ctx_create@basic-files:
    - fi-icl-u2:          [DMESG-FAIL][17] -> [PASS][18]
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/fi-icl-u2/igt@gem_ctx_create@basic-files.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/fi-icl-u2/igt@gem_ctx_create@basic-files.html

  * igt@i915_selftest@live@hangcheck:
    - bat-dg1-5:          [DMESG-FAIL][19] ([i915#4494] / [i915#4957]) -> [PASS][20]
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/bat-dg1-5/igt@i915_selftest@live@hangcheck.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/bat-dg1-5/igt@i915_selftest@live@hangcheck.html

  * igt@i915_selftest@live@hugepages:
    - {bat-rpls-1}:       [DMESG-WARN][21] ([i915#5278]) -> [PASS][22]
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/bat-rpls-1/igt@i915_selftest@live@hugepages.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/bat-rpls-1/igt@i915_selftest@live@hugepages.html

  * igt@i915_selftest@live@requests:
    - fi-blb-e6850:       [DMESG-FAIL][23] ([i915#4528]) -> [PASS][24]
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/fi-blb-e6850/igt@i915_selftest@live@requests.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/fi-blb-e6850/igt@i915_selftest@live@requests.html
    - fi-pnv-d510:        [DMESG-FAIL][25] ([i915#4528]) -> [PASS][26]
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/fi-pnv-d510/igt@i915_selftest@live@requests.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/fi-pnv-d510/igt@i915_selftest@live@requests.html

  * igt@i915_selftest@live@reset:
    - {bat-rpls-1}:       [DMESG-FAIL][27] ([i915#4983]) -> [PASS][28]
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/bat-rpls-1/igt@i915_selftest@live@reset.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/bat-rpls-1/igt@i915_selftest@live@reset.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
  [i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
  [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
  [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
  [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
  [i915#4494]: https://gitlab.freedesktop.org/drm/intel/issues/4494
  [i915#4528]: https://gitlab.freedesktop.org/drm/intel/issues/4528
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#4957]: https://gitlab.freedesktop.org/drm/intel/issues/4957
  [i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
  [i915#5122]: https://gitlab.freedesktop.org/drm/intel/issues/5122
  [i915#5278]: https://gitlab.freedesktop.org/drm/intel/issues/5278
  [i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
  [i915#5537]: https://gitlab.freedesktop.org/drm/intel/issues/5537
  [i915#5763]: https://gitlab.freedesktop.org/drm/intel/issues/5763
  [i915#5903]: https://gitlab.freedesktop.org/drm/intel/issues/5903
  [i915#5950]: https://gitlab.freedesktop.org/drm/intel/issues/5950
  [i915#6008]: https://gitlab.freedesktop.org/drm/intel/issues/6008
  [i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
  [i915#6407]: https://gitlab.freedesktop.org/drm/intel/issues/6407


Build changes
-------------

  * Linux: CI_DRM_11922 -> Patchwork_106475v1

  CI-20190529: 20190529
  CI_DRM_11922: 778142c0a2a41283658704530b41ac65c4844ad3 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_6592: d7c0659613199a5dcf535ed3add68ed1991ead7e @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_106475v1: 778142c0a2a41283658704530b41ac65c4844ad3 @ git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

418bd25ade05 drm/i915: Use luminance range calculated during edid parsing
84869651cf85 drm/amdgpu_dm: Rely on split out luminance calculation function
a91876ecd4fc drm: New function to get luminance range based on static hdr metadata

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/index.html

[-- Attachment #2: Type: text/html, Size: 9525 bytes --]

[Intel-gfx] ✗ Fi.CI.IGT: failure for HDR aux backlight range calculation

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 73545 bytes --]

== Series Details ==

Series: HDR aux backlight range calculation
URL   : https://patchwork.freedesktop.org/series/106475/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_11922_full -> Patchwork_106475v1_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_106475v1_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_106475v1_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (10 -> 13)
------------------------------

  Additional (3): shard-rkl shard-dg1 shard-tglu 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_106475v1_full:

### IGT changes ###

#### Possible regressions ####

  * igt@kms_big_fb@y-tiled-32bpp-rotate-0:
    - shard-skl:          [PASS][1] -> [TIMEOUT][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-skl4/igt@kms_big_fb@y-tiled-32bpp-rotate-0.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-skl10/igt@kms_big_fb@y-tiled-32bpp-rotate-0.html

  
#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@kms_async_flips@alternate-sync-async-flip@pipe-c-hdmi-a-1:
    - {shard-dg1}:        NOTRUN -> [FAIL][3]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-dg1-13/igt@kms_async_flips@alternate-sync-async-flip@pipe-c-hdmi-a-1.html

  
New tests
---------

  New tests have been introduced between CI_DRM_11922_full and Patchwork_106475v1_full:

### New IGT tests (127) ###

  * igt@kms_atomic_interruptible@legacy-cursor@hdmi-a-4-pipe-a:
    - Statuses : 1 pass(s)
    - Exec time: [6.15] s

  * igt@kms_atomic_transition@plane-use-after-nonblocking-unbind@hdmi-a-4-pipe-a:
    - Statuses : 1 pass(s)
    - Exec time: [0.08] s

  * igt@kms_atomic_transition@plane-use-after-nonblocking-unbind@hdmi-a-4-pipe-b:
    - Statuses : 1 pass(s)
    - Exec time: [0.15] s

  * igt@kms_color@ctm-0-50@pipe-a-hdmi-a-4:
    - Statuses : 1 pass(s)
    - Exec time: [0.60] s

  * igt@kms_color@ctm-0-50@pipe-b-hdmi-a-4:
    - Statuses : 1 pass(s)
    - Exec time: [0.44] s

  * igt@kms_color@ctm-0-50@pipe-c-hdmi-a-4:
    - Statuses : 1 pass(s)
    - Exec time: [0.42] s

  * igt@kms_color@ctm-0-50@pipe-d-hdmi-a-4:
    - Statuses : 1 pass(s)
    - Exec time: [0.43] s

  * igt@kms_flip@flip-vs-dpms-off-vs-modeset@a-hdmi-a4:
    - Statuses : 1 pass(s)
    - Exec time: [0.70] s

  * igt@kms_flip@flip-vs-dpms-off-vs-modeset@b-hdmi-a4:
    - Statuses : 1 pass(s)
    - Exec time: [0.61] s

  * igt@kms_flip@flip-vs-dpms-off-vs-modeset@c-hdmi-a4:
    - Statuses : 1 pass(s)
    - Exec time: [0.67] s

  * igt@kms_flip@flip-vs-dpms-off-vs-modeset@d-hdmi-a4:
    - Statuses : 1 pass(s)
    - Exec time: [0.64] s

  * igt@kms_flip@plain-flip-fb-recreate@a-hdmi-a4:
    - Statuses : 1 pass(s)
    - Exec time: [8.02] s

  * igt@kms_flip@plain-flip-fb-recreate@b-hdmi-a4:
    - Statuses : 1 pass(s)
    - Exec time: [7.95] s

  * igt@kms_flip@plain-flip-fb-recreate@c-hdmi-a4:
    - Statuses : 1 pass(s)
    - Exec time: [7.97] s

  * igt@kms_flip@plain-flip-fb-recreate@d-hdmi-a4:
    - Statuses : 1 pass(s)
    - Exec time: [7.97] s

  * igt@kms_flip@single-buffer-flip-vs-dpms-off-vs-modeset-interruptible@a-hdmi-a4:
    - Statuses : 1 pass(s)
    - Exec time: [0.69] s

  * igt@kms_flip@single-buffer-flip-vs-dpms-off-vs-modeset-interruptible@b-hdmi-a4:
    - Statuses : 1 pass(s)
    - Exec time: [0.60] s

  * igt@kms_flip@single-buffer-flip-vs-dpms-off-vs-modeset-interruptible@c-hdmi-a4:
    - Statuses : 1 pass(s)
    - Exec time: [0.66] s

  * igt@kms_flip@single-buffer-flip-vs-dpms-off-vs-modeset-interruptible@d-hdmi-a4:
    - Statuses : 1 pass(s)
    - Exec time: [0.62] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-a-linear-to-linear:
    - Statuses : 1 pass(s)
    - Exec time: [0.18] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-a-linear-to-x:
    - Statuses : 1 pass(s)
    - Exec time: [0.20] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-a-linear-to-y:
    - Statuses : 1 pass(s)
    - Exec time: [0.20] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-a-linear-to-y-rc_ccs:
    - Statuses : 1 pass(s)
    - Exec time: [0.17] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-a-linear-to-y-rc_ccs-cc:
    - Statuses : 1 pass(s)
    - Exec time: [0.18] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-a-x-to-linear:
    - Statuses : 1 pass(s)
    - Exec time: [0.22] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-a-x-to-x:
    - Statuses : 1 pass(s)
    - Exec time: [0.15] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-a-x-to-y:
    - Statuses : 1 pass(s)
    - Exec time: [0.17] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-a-x-to-y-rc_ccs:
    - Statuses : 1 pass(s)
    - Exec time: [0.20] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-a-x-to-y-rc_ccs-cc:
    - Statuses : 1 pass(s)
    - Exec time: [0.18] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-a-y-rc_ccs-cc-to-linear:
    - Statuses : 1 pass(s)
    - Exec time: [0.20] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-a-y-rc_ccs-cc-to-x:
    - Statuses : 1 pass(s)
    - Exec time: [0.17] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-a-y-rc_ccs-cc-to-y:
    - Statuses : 1 pass(s)
    - Exec time: [0.15] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-a-y-rc_ccs-cc-to-y-rc_ccs:
    - Statuses : 1 pass(s)
    - Exec time: [0.18] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-a-y-rc_ccs-cc-to-y-rc_ccs-cc:
    - Statuses : 1 pass(s)
    - Exec time: [0.18] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-a-y-rc_ccs-to-linear:
    - Statuses : 1 pass(s)
    - Exec time: [0.20] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-a-y-rc_ccs-to-x:
    - Statuses : 1 pass(s)
    - Exec time: [0.17] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-a-y-rc_ccs-to-y:
    - Statuses : 1 pass(s)
    - Exec time: [0.20] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-a-y-rc_ccs-to-y-rc_ccs:
    - Statuses : 1 pass(s)
    - Exec time: [0.24] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-a-y-rc_ccs-to-y-rc_ccs-cc:
    - Statuses : 1 pass(s)
    - Exec time: [0.15] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-a-y-to-linear:
    - Statuses : 1 pass(s)
    - Exec time: [0.20] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-a-y-to-x:
    - Statuses : 1 pass(s)
    - Exec time: [0.22] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-a-y-to-y:
    - Statuses : 1 pass(s)
    - Exec time: [0.13] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-a-y-to-y-rc_ccs:
    - Statuses : 1 pass(s)
    - Exec time: [0.20] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-a-y-to-y-rc_ccs-cc:
    - Statuses : 1 pass(s)
    - Exec time: [0.15] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-b-linear-to-linear:
    - Statuses : 1 pass(s)
    - Exec time: [0.17] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-b-linear-to-x:
    - Statuses : 1 pass(s)
    - Exec time: [0.15] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-b-linear-to-y:
    - Statuses : 1 pass(s)
    - Exec time: [0.17] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-b-linear-to-y-rc_ccs:
    - Statuses : 1 pass(s)
    - Exec time: [0.17] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-b-linear-to-y-rc_ccs-cc:
    - Statuses : 1 pass(s)
    - Exec time: [0.17] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-b-x-to-linear:
    - Statuses : 1 pass(s)
    - Exec time: [0.13] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-b-x-to-x:
    - Statuses : 1 pass(s)
    - Exec time: [0.13] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-b-x-to-y:
    - Statuses : 1 pass(s)
    - Exec time: [0.13] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-b-x-to-y-rc_ccs:
    - Statuses : 1 pass(s)
    - Exec time: [0.13] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-b-x-to-y-rc_ccs-cc:
    - Statuses : 1 pass(s)
    - Exec time: [0.17] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-b-y-rc_ccs-cc-to-linear:
    - Statuses : 1 pass(s)
    - Exec time: [0.17] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-b-y-rc_ccs-cc-to-x:
    - Statuses : 1 pass(s)
    - Exec time: [0.13] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-b-y-rc_ccs-cc-to-y:
    - Statuses : 1 pass(s)
    - Exec time: [0.15] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-b-y-rc_ccs-cc-to-y-rc_ccs:
    - Statuses : 1 pass(s)
    - Exec time: [0.13] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-b-y-rc_ccs-cc-to-y-rc_ccs-cc:
    - Statuses : 1 pass(s)
    - Exec time: [0.17] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-b-y-rc_ccs-to-linear:
    - Statuses : 1 pass(s)
    - Exec time: [0.13] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-b-y-rc_ccs-to-x:
    - Statuses : 1 pass(s)
    - Exec time: [0.13] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-b-y-rc_ccs-to-y:
    - Statuses : 1 pass(s)
    - Exec time: [0.13] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-b-y-rc_ccs-to-y-rc_ccs:
    - Statuses : 1 pass(s)
    - Exec time: [0.25] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-b-y-rc_ccs-to-y-rc_ccs-cc:
    - Statuses : 1 pass(s)
    - Exec time: [0.13] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-b-y-to-linear:
    - Statuses : 1 pass(s)
    - Exec time: [0.12] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-b-y-to-x:
    - Statuses : 1 pass(s)
    - Exec time: [0.15] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-b-y-to-y:
    - Statuses : 1 pass(s)
    - Exec time: [0.13] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-b-y-to-y-rc_ccs:
    - Statuses : 1 pass(s)
    - Exec time: [0.15] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-b-y-to-y-rc_ccs-cc:
    - Statuses : 1 pass(s)
    - Exec time: [0.13] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-c-linear-to-linear:
    - Statuses : 1 pass(s)
    - Exec time: [0.15] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-c-linear-to-x:
    - Statuses : 1 pass(s)
    - Exec time: [0.12] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-c-linear-to-y:
    - Statuses : 1 pass(s)
    - Exec time: [0.17] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-c-linear-to-y-rc_ccs:
    - Statuses : 1 pass(s)
    - Exec time: [0.15] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-c-linear-to-y-rc_ccs-cc:
    - Statuses : 1 pass(s)
    - Exec time: [0.15] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-c-x-to-linear:
    - Statuses : 1 pass(s)
    - Exec time: [0.17] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-c-x-to-x:
    - Statuses : 1 pass(s)
    - Exec time: [0.13] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-c-x-to-y:
    - Statuses : 1 pass(s)
    - Exec time: [0.15] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-c-x-to-y-rc_ccs:
    - Statuses : 1 pass(s)
    - Exec time: [0.13] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-c-x-to-y-rc_ccs-cc:
    - Statuses : 1 pass(s)
    - Exec time: [0.17] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-c-y-rc_ccs-cc-to-linear:
    - Statuses : 1 pass(s)
    - Exec time: [0.17] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-c-y-rc_ccs-cc-to-x:
    - Statuses : 1 pass(s)
    - Exec time: [0.17] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-c-y-rc_ccs-cc-to-y:
    - Statuses : 1 pass(s)
    - Exec time: [0.17] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-c-y-rc_ccs-cc-to-y-rc_ccs:
    - Statuses : 1 pass(s)
    - Exec time: [0.13] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-c-y-rc_ccs-cc-to-y-rc_ccs-cc:
    - Statuses : 1 pass(s)
    - Exec time: [0.15] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-c-y-rc_ccs-to-linear:
    - Statuses : 1 pass(s)
    - Exec time: [0.13] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-c-y-rc_ccs-to-x:
    - Statuses : 1 pass(s)
    - Exec time: [0.12] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-c-y-rc_ccs-to-y:
    - Statuses : 1 pass(s)
    - Exec time: [0.12] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-c-y-rc_ccs-to-y-rc_ccs:
    - Statuses : 1 pass(s)
    - Exec time: [0.23] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-c-y-rc_ccs-to-y-rc_ccs-cc:
    - Statuses : 1 pass(s)
    - Exec time: [0.13] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-c-y-to-linear:
    - Statuses : 1 pass(s)
    - Exec time: [0.12] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-c-y-to-x:
    - Statuses : 1 pass(s)
    - Exec time: [0.17] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-c-y-to-y:
    - Statuses : 1 pass(s)
    - Exec time: [0.13] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-c-y-to-y-rc_ccs:
    - Statuses : 1 pass(s)
    - Exec time: [0.15] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-c-y-to-y-rc_ccs-cc:
    - Statuses : 1 pass(s)
    - Exec time: [0.13] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-d-linear-to-linear:
    - Statuses : 1 pass(s)
    - Exec time: [0.15] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-d-linear-to-x:
    - Statuses : 1 pass(s)
    - Exec time: [0.12] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-d-linear-to-y:
    - Statuses : 1 pass(s)
    - Exec time: [0.17] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-d-linear-to-y-rc_ccs:
    - Statuses : 1 pass(s)
    - Exec time: [0.13] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-d-linear-to-y-rc_ccs-cc:
    - Statuses : 1 pass(s)
    - Exec time: [0.17] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-d-x-to-linear:
    - Statuses : 1 pass(s)
    - Exec time: [0.13] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-d-x-to-x:
    - Statuses : 1 pass(s)
    - Exec time: [0.13] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-d-x-to-y:
    - Statuses : 1 pass(s)
    - Exec time: [0.17] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-d-x-to-y-rc_ccs:
    - Statuses : 1 pass(s)
    - Exec time: [0.13] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-d-x-to-y-rc_ccs-cc:
    - Statuses : 1 pass(s)
    - Exec time: [0.17] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-d-y-rc_ccs-cc-to-linear:
    - Statuses : 1 pass(s)
    - Exec time: [0.17] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-d-y-rc_ccs-cc-to-x:
    - Statuses : 1 pass(s)
    - Exec time: [0.13] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-d-y-rc_ccs-cc-to-y:
    - Statuses : 1 pass(s)
    - Exec time: [0.17] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-d-y-rc_ccs-cc-to-y-rc_ccs:
    - Statuses : 1 pass(s)
    - Exec time: [0.17] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-d-y-rc_ccs-cc-to-y-rc_ccs-cc:
    - Statuses : 1 pass(s)
    - Exec time: [0.13] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-d-y-rc_ccs-to-linear:
    - Statuses : 1 pass(s)
    - Exec time: [0.13] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-d-y-rc_ccs-to-x:
    - Statuses : 1 pass(s)
    - Exec time: [0.13] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-d-y-rc_ccs-to-y:
    - Statuses : 1 pass(s)
    - Exec time: [0.13] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-d-y-rc_ccs-to-y-rc_ccs:
    - Statuses : 1 pass(s)
    - Exec time: [0.27] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-d-y-rc_ccs-to-y-rc_ccs-cc:
    - Statuses : 1 pass(s)
    - Exec time: [0.13] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-d-y-to-linear:
    - Statuses : 1 pass(s)
    - Exec time: [0.13] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-d-y-to-x:
    - Statuses : 1 pass(s)
    - Exec time: [0.17] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-d-y-to-y:
    - Statuses : 1 pass(s)
    - Exec time: [0.13] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-d-y-to-y-rc_ccs:
    - Statuses : 1 pass(s)
    - Exec time: [0.15] s

  * igt@kms_flip_tiling@flip-change-tiling@hdmi-a-4-pipe-d-y-to-y-rc_ccs-cc:
    - Statuses : 1 pass(s)
    - Exec time: [0.13] s

  * igt@kms_plane_scaling@plane-downscale-with-modifiers-factor-0-5@pipe-a-hdmi-a-4:
    - Statuses : 1 skip(s)
    - Exec time: [0.04] s

  * igt@kms_plane_scaling@plane-downscale-with-modifiers-factor-0-5@pipe-b-hdmi-a-4:
    - Statuses : 1 skip(s)
    - Exec time: [0.04] s

  * igt@kms_plane_scaling@plane-downscale-with-modifiers-factor-0-5@pipe-c-hdmi-a-4:
    - Statuses : 1 skip(s)
    - Exec time: [0.04] s

  * igt@kms_plane_scaling@plane-downscale-with-modifiers-factor-0-5@pipe-d-hdmi-a-4:
    - Statuses : 1 skip(s)
    - Exec time: [0.04] s

  * igt@kms_plane_scaling@plane-upscale-with-modifiers-20x20@pipe-a-hdmi-a-4:
    - Statuses : 1 pass(s)
    - Exec time: [0.40] s

  * igt@kms_plane_scaling@plane-upscale-with-modifiers-20x20@pipe-b-hdmi-a-4:
    - Statuses : 1 pass(s)
    - Exec time: [0.41] s

  * igt@kms_plane_scaling@plane-upscale-with-modifiers-20x20@pipe-c-hdmi-a-4:
    - Statuses : 1 pass(s)
    - Exec time: [0.41] s

  * igt@kms_plane_scaling@plane-upscale-with-modifiers-20x20@pipe-d-hdmi-a-4:
    - Statuses : 1 pass(s)
    - Exec time: [0.40] s

  

Known issues
------------

  Here are the changes found in Patchwork_106475v1_full that come from known issues:

### CI changes ###

#### Issues hit ####

  * boot:
    - shard-apl:          ([PASS][4], [PASS][5], [PASS][6], [PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12], [PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18], [PASS][19], [PASS][20], [PASS][21], [PASS][22], [PASS][23], [PASS][24], [PASS][25], [PASS][26], [PASS][27], [PASS][28]) -> ([PASS][29], [PASS][30], [PASS][31], [PASS][32], [PASS][33], [FAIL][34], [PASS][35], [PASS][36], [PASS][37], [PASS][38], [PASS][39], [PASS][40], [PASS][41], [PASS][42], [PASS][43], [PASS][44], [PASS][45], [PASS][46], [PASS][47], [PASS][48], [PASS][49], [PASS][50], [PASS][51], [PASS][52], [PASS][53]) ([i915#4386])
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-apl4/boot.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-apl8/boot.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-apl8/boot.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-apl8/boot.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-apl7/boot.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-apl7/boot.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-apl2/boot.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-apl2/boot.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-apl7/boot.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-apl6/boot.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-apl3/boot.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-apl3/boot.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-apl3/boot.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-apl3/boot.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-apl4/boot.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-apl6/boot.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-apl6/boot.html
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-apl6/boot.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-apl4/boot.html
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-apl4/boot.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-apl1/boot.html
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-apl1/boot.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-apl1/boot.html
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-apl1/boot.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-apl2/boot.html
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-apl1/boot.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-apl1/boot.html
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-apl1/boot.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-apl2/boot.html
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-apl2/boot.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-apl2/boot.html
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-apl2/boot.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-apl3/boot.html
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-apl3/boot.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-apl3/boot.html
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-apl4/boot.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-apl4/boot.html
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-apl4/boot.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-apl6/boot.html
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-apl6/boot.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-apl6/boot.html
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-apl6/boot.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-apl7/boot.html
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-apl7/boot.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-apl7/boot.html
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-apl7/boot.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-apl8/boot.html
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-apl8/boot.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-apl8/boot.html
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-apl8/boot.html

  

### IGT changes ###

#### Issues hit ####

  * igt@feature_discovery@psr2:
    - shard-iclb:         [PASS][54] -> [SKIP][55] ([i915#658])
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-iclb2/igt@feature_discovery@psr2.html
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-iclb7/igt@feature_discovery@psr2.html

  * igt@gem_ctx_sseu@engines:
    - shard-tglb:         NOTRUN -> [SKIP][56] ([i915#280])
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-tglb1/igt@gem_ctx_sseu@engines.html

  * igt@gem_eio@reset-stress:
    - shard-skl:          [PASS][57] -> [FAIL][58] ([i915#6340])
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-skl1/igt@gem_eio@reset-stress.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-skl6/igt@gem_eio@reset-stress.html

  * igt@gem_exec_balancer@parallel-keep-in-fence:
    - shard-iclb:         NOTRUN -> [SKIP][59] ([i915#4525])
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-iclb6/igt@gem_exec_balancer@parallel-keep-in-fence.html

  * igt@gem_exec_fair@basic-deadline:
    - shard-glk:          [PASS][60] -> [FAIL][61] ([i915#2846])
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-glk9/igt@gem_exec_fair@basic-deadline.html
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-glk7/igt@gem_exec_fair@basic-deadline.html

  * igt@gem_exec_fair@basic-flow@rcs0:
    - shard-tglb:         [PASS][62] -> [FAIL][63] ([i915#2842])
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-tglb8/igt@gem_exec_fair@basic-flow@rcs0.html
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-tglb1/igt@gem_exec_fair@basic-flow@rcs0.html

  * igt@gem_exec_fair@basic-none-rrul@rcs0:
    - shard-kbl:          [PASS][64] -> [FAIL][65] ([i915#2842])
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-kbl6/igt@gem_exec_fair@basic-none-rrul@rcs0.html
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-kbl4/igt@gem_exec_fair@basic-none-rrul@rcs0.html

  * igt@gem_exec_fair@basic-none-share@rcs0:
    - shard-kbl:          [PASS][66] -> [SKIP][67] ([fdo#109271])
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-kbl1/igt@gem_exec_fair@basic-none-share@rcs0.html
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-kbl6/igt@gem_exec_fair@basic-none-share@rcs0.html

  * igt@gem_exec_fair@basic-pace@rcs0:
    - shard-kbl:          NOTRUN -> [FAIL][68] ([i915#2842]) +2 similar issues
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-kbl6/igt@gem_exec_fair@basic-pace@rcs0.html

  * igt@gem_exec_fair@basic-pace@vecs0:
    - shard-iclb:         [PASS][69] -> [FAIL][70] ([i915#2842])
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-iclb5/igt@gem_exec_fair@basic-pace@vecs0.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-iclb3/igt@gem_exec_fair@basic-pace@vecs0.html

  * igt@gem_lmem_swapping@basic:
    - shard-kbl:          NOTRUN -> [SKIP][71] ([fdo#109271] / [i915#4613])
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-kbl6/igt@gem_lmem_swapping@basic.html

  * igt@gem_lmem_swapping@heavy-verify-multi-ccs:
    - shard-skl:          NOTRUN -> [SKIP][72] ([fdo#109271] / [i915#4613])
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-skl4/igt@gem_lmem_swapping@heavy-verify-multi-ccs.html

  * igt@gem_lmem_swapping@verify-random-ccs:
    - shard-iclb:         NOTRUN -> [SKIP][73] ([i915#4613])
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-iclb6/igt@gem_lmem_swapping@verify-random-ccs.html

  * igt@gem_pxp@create-regular-context-2:
    - shard-iclb:         NOTRUN -> [SKIP][74] ([i915#4270])
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-iclb6/igt@gem_pxp@create-regular-context-2.html

  * igt@gem_pxp@reject-modify-context-protection-off-2:
    - shard-tglb:         NOTRUN -> [SKIP][75] ([i915#4270])
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-tglb1/igt@gem_pxp@reject-modify-context-protection-off-2.html

  * igt@gem_render_copy@y-tiled-ccs-to-y-tiled-mc-ccs:
    - shard-iclb:         NOTRUN -> [SKIP][76] ([i915#768])
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-iclb6/igt@gem_render_copy@y-tiled-ccs-to-y-tiled-mc-ccs.html

  * igt@gem_softpin@evict-snoop:
    - shard-iclb:         NOTRUN -> [SKIP][77] ([fdo#109312])
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-iclb6/igt@gem_softpin@evict-snoop.html

  * igt@gem_userptr_blits@coherency-sync:
    - shard-tglb:         NOTRUN -> [SKIP][78] ([fdo#110542])
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-tglb1/igt@gem_userptr_blits@coherency-sync.html

  * igt@gen9_exec_parse@bb-oversize:
    - shard-iclb:         NOTRUN -> [SKIP][79] ([i915#2856]) +1 similar issue
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-iclb6/igt@gen9_exec_parse@bb-oversize.html

  * igt@i915_pm_dc@dc6-dpms:
    - shard-iclb:         [PASS][80] -> [FAIL][81] ([i915#454])
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-iclb4/igt@i915_pm_dc@dc6-dpms.html
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-iclb3/igt@i915_pm_dc@dc6-dpms.html

  * igt@i915_pm_lpsp@screens-disabled:
    - shard-iclb:         NOTRUN -> [SKIP][82] ([i915#1902])
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-iclb6/igt@i915_pm_lpsp@screens-disabled.html

  * igt@i915_suspend@fence-restore-tiled2untiled:
    - shard-apl:          [PASS][83] -> [DMESG-WARN][84] ([i915#180]) +3 similar issues
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-apl2/igt@i915_suspend@fence-restore-tiled2untiled.html
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-apl6/igt@i915_suspend@fence-restore-tiled2untiled.html

  * igt@kms_addfb_basic@invalid-smem-bo-on-discrete:
    - shard-tglb:         NOTRUN -> [SKIP][85] ([i915#3826])
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-tglb1/igt@kms_addfb_basic@invalid-smem-bo-on-discrete.html

  * igt@kms_async_flips@alternate-sync-async-flip@pipe-a-edp-1:
    - shard-skl:          [PASS][86] -> [FAIL][87] ([i915#2521])
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-skl1/igt@kms_async_flips@alternate-sync-async-flip@pipe-a-edp-1.html
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-skl6/igt@kms_async_flips@alternate-sync-async-flip@pipe-a-edp-1.html

  * igt@kms_big_fb@4-tiled-8bpp-rotate-270:
    - shard-iclb:         NOTRUN -> [SKIP][88] ([i915#5286])
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-iclb6/igt@kms_big_fb@4-tiled-8bpp-rotate-270.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0:
    - shard-tglb:         NOTRUN -> [SKIP][89] ([i915#5286]) +1 similar issue
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-tglb1/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0.html

  * igt@kms_big_fb@yf-tiled-64bpp-rotate-180:
    - shard-iclb:         NOTRUN -> [SKIP][90] ([fdo#110723])
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-iclb6/igt@kms_big_fb@yf-tiled-64bpp-rotate-180.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-async-flip:
    - shard-tglb:         NOTRUN -> [SKIP][91] ([fdo#111615])
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-tglb1/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html

  * igt@kms_big_joiner@invalid-modeset:
    - shard-iclb:         NOTRUN -> [SKIP][92] ([i915#2705])
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-iclb6/igt@kms_big_joiner@invalid-modeset.html

  * igt@kms_ccs@pipe-b-bad-aux-stride-y_tiled_gen12_mc_ccs:
    - shard-tglb:         NOTRUN -> [SKIP][93] ([i915#3689] / [i915#3886]) +1 similar issue
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-tglb1/igt@kms_ccs@pipe-b-bad-aux-stride-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-c-bad-aux-stride-y_tiled_gen12_mc_ccs:
    - shard-kbl:          NOTRUN -> [SKIP][94] ([fdo#109271] / [i915#3886]) +1 similar issue
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-kbl6/igt@kms_ccs@pipe-c-bad-aux-stride-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-c-bad-pixel-format-4_tiled_dg2_rc_ccs_cc:
    - shard-tglb:         NOTRUN -> [SKIP][95] ([i915#3689] / [i915#6095])
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-tglb1/igt@kms_ccs@pipe-c-bad-pixel-format-4_tiled_dg2_rc_ccs_cc.html

  * igt@kms_ccs@pipe-c-crc-primary-basic-y_tiled_ccs:
    - shard-tglb:         NOTRUN -> [SKIP][96] ([i915#3689]) +2 similar issues
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-tglb1/igt@kms_ccs@pipe-c-crc-primary-basic-y_tiled_ccs.html

  * igt@kms_ccs@pipe-c-crc-primary-basic-y_tiled_gen12_mc_ccs:
    - shard-iclb:         NOTRUN -> [SKIP][97] ([fdo#109278] / [i915#3886])
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-iclb6/igt@kms_ccs@pipe-c-crc-primary-basic-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-c-missing-ccs-buffer-yf_tiled_ccs:
    - shard-tglb:         NOTRUN -> [SKIP][98] ([fdo#111615] / [i915#3689])
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-tglb1/igt@kms_ccs@pipe-c-missing-ccs-buffer-yf_tiled_ccs.html

  * igt@kms_ccs@pipe-c-random-ccs-data-4_tiled_dg2_rc_ccs:
    - shard-iclb:         NOTRUN -> [SKIP][99] ([fdo#109278]) +9 similar issues
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-iclb6/igt@kms_ccs@pipe-c-random-ccs-data-4_tiled_dg2_rc_ccs.html

  * igt@kms_chamelium@vga-hpd-for-each-pipe:
    - shard-kbl:          NOTRUN -> [SKIP][100] ([fdo#109271] / [fdo#111827]) +2 similar issues
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-kbl6/igt@kms_chamelium@vga-hpd-for-each-pipe.html

  * igt@kms_color_chamelium@pipe-b-ctm-green-to-red:
    - shard-iclb:         NOTRUN -> [SKIP][101] ([fdo#109284] / [fdo#111827]) +2 similar issues
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-iclb6/igt@kms_color_chamelium@pipe-b-ctm-green-to-red.html

  * igt@kms_color_chamelium@pipe-c-ctm-red-to-blue:
    - shard-tglb:         NOTRUN -> [SKIP][102] ([fdo#109284] / [fdo#111827]) +4 similar issues
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-tglb1/igt@kms_color_chamelium@pipe-c-ctm-red-to-blue.html

  * igt@kms_content_protection@atomic:
    - shard-kbl:          NOTRUN -> [TIMEOUT][103] ([i915#1319])
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-kbl6/igt@kms_content_protection@atomic.html

  * igt@kms_content_protection@mei_interface:
    - shard-iclb:         NOTRUN -> [SKIP][104] ([fdo#109300] / [fdo#111066])
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-iclb6/igt@kms_content_protection@mei_interface.html

  * igt@kms_cursor_crc@cursor-suspend@pipe-b-dp-1:
    - shard-kbl:          [PASS][105] -> [DMESG-WARN][106] ([i915#180]) +2 similar issues
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-kbl1/igt@kms_cursor_crc@cursor-suspend@pipe-b-dp-1.html
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-kbl7/igt@kms_cursor_crc@cursor-suspend@pipe-b-dp-1.html

  * igt@kms_cursor_crc@cursor-suspend@pipe-c-edp-1:
    - shard-iclb:         [PASS][107] -> [DMESG-WARN][108] ([i915#2867])
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-iclb6/igt@kms_cursor_crc@cursor-suspend@pipe-c-edp-1.html
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-iclb1/igt@kms_cursor_crc@cursor-suspend@pipe-c-edp-1.html

  * igt@kms_cursor_legacy@cursorb-vs-flipb@varying-size:
    - shard-kbl:          NOTRUN -> [SKIP][109] ([fdo#109271]) +50 similar issues
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-kbl6/igt@kms_cursor_legacy@cursorb-vs-flipb@varying-size.html

  * igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions:
    - shard-glk:          [PASS][110] -> [FAIL][111] ([i915#2346])
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-glk1/igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions.html
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-glk2/igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions.html

  * igt@kms_draw_crc@draw-method-xrgb2101010-render-4tiled:
    - shard-iclb:         NOTRUN -> [SKIP][112] ([i915#5287])
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-iclb6/igt@kms_draw_crc@draw-method-xrgb2101010-render-4tiled.html

  * igt@kms_fbcon_fbt@fbc-suspend:
    - shard-apl:          [PASS][113] -> [FAIL][114] ([i915#4767])
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-apl2/igt@kms_fbcon_fbt@fbc-suspend.html
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-apl6/igt@kms_fbcon_fbt@fbc-suspend.html

  * igt@kms_fbcon_fbt@psr-suspend:
    - shard-skl:          [PASS][115] -> [FAIL][116] ([i915#4767])
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-skl4/igt@kms_fbcon_fbt@psr-suspend.html
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-skl10/igt@kms_fbcon_fbt@psr-suspend.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@c-hdmi-a2:
    - shard-glk:          [PASS][117] -> [FAIL][118] ([i915#79])
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-glk6/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-hdmi-a2.html
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-glk5/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-hdmi-a2.html

  * igt@kms_flip@plain-flip-ts-check-interruptible@b-edp1:
    - shard-skl:          [PASS][119] -> [FAIL][120] ([i915#2122]) +1 similar issue
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-skl9/igt@kms_flip@plain-flip-ts-check-interruptible@b-edp1.html
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-skl9/igt@kms_flip@plain-flip-ts-check-interruptible@b-edp1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling@pipe-a-valid-mode:
    - shard-iclb:         NOTRUN -> [SKIP][121] ([i915#2672]) +9 similar issues
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-iclb6/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling@pipe-a-default-mode:
    - shard-iclb:         NOTRUN -> [SKIP][122] ([i915#6375])
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-iclb2/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling@pipe-a-default-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-upscaling@pipe-a-valid-mode:
    - shard-tglb:         NOTRUN -> [SKIP][123] ([i915#2672]) +1 similar issue
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-tglb1/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-upscaling@pipe-a-valid-mode.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-wc:
    - shard-iclb:         NOTRUN -> [SKIP][124] ([fdo#109280]) +12 similar issues
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-iclb6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-mmap-wc:
    - shard-tglb:         NOTRUN -> [FAIL][125] ([i915#160]) +1 similar issue
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-tglb1/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-pwrite:
    - shard-tglb:         NOTRUN -> [SKIP][126] ([fdo#109280] / [fdo#111825]) +6 similar issues
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-tglb1/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-pwrite.html

  * igt@kms_hdr@bpc-switch-dpms@pipe-a-dp-1:
    - shard-kbl:          [PASS][127] -> [FAIL][128] ([i915#1188])
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-kbl7/igt@kms_hdr@bpc-switch-dpms@pipe-a-dp-1.html
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-kbl6/igt@kms_hdr@bpc-switch-dpms@pipe-a-dp-1.html

  * igt@kms_hdr@static-toggle:
    - shard-iclb:         NOTRUN -> [SKIP][129] ([i915#3555]) +2 similar issues
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-iclb6/igt@kms_hdr@static-toggle.html

  * igt@kms_hdr@static-toggle-dpms:
    - shard-skl:          NOTRUN -> [SKIP][130] ([fdo#109271]) +5 similar issues
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-skl4/igt@kms_hdr@static-toggle-dpms.html

  * igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
    - shard-iclb:         NOTRUN -> [SKIP][131] ([i915#1839])
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-iclb6/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html

  * igt@kms_plane_alpha_blend@pipe-b-alpha-transparent-fb:
    - shard-kbl:          NOTRUN -> [FAIL][132] ([i915#265])
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-kbl6/igt@kms_plane_alpha_blend@pipe-b-alpha-transparent-fb.html

  * igt@kms_plane_scaling@2x-scaler-multi-pipe:
    - shard-tglb:         NOTRUN -> [SKIP][133] ([fdo#109274] / [fdo#111825]) +1 similar issue
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-tglb1/igt@kms_plane_scaling@2x-scaler-multi-pipe.html

  * {igt@kms_plane_scaling@plane-downscale-with-modifiers-factor-0-5@pipe-c-hdmi-a-4} (NEW):
    - {shard-dg1}:        NOTRUN -> [SKIP][134] ([i915#5176]) +3 similar issues
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-dg1-15/igt@kms_plane_scaling@plane-downscale-with-modifiers-factor-0-5@pipe-c-hdmi-a-4.html

  * igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-pixel-formats@pipe-b-edp-1:
    - shard-iclb:         [PASS][135] -> [SKIP][136] ([i915#5176]) +1 similar issue
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-iclb5/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-pixel-formats@pipe-b-edp-1.html
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-iclb3/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-pixel-formats@pipe-b-edp-1.html

  * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-c-edp-1:
    - shard-tglb:         NOTRUN -> [SKIP][137] ([i915#5235]) +3 similar issues
   [137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-tglb1/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-c-edp-1.html

  * igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-sf:
    - shard-iclb:         NOTRUN -> [SKIP][138] ([i915#658])
   [138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-iclb6/igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-sf.html

  * igt@kms_psr2_su@frontbuffer-xrgb8888:
    - shard-kbl:          NOTRUN -> [SKIP][139] ([fdo#109271] / [i915#658])
   [139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-kbl6/igt@kms_psr2_su@frontbuffer-xrgb8888.html

  * igt@kms_psr@psr2_primary_blt:
    - shard-iclb:         NOTRUN -> [SKIP][140] ([fdo#109441])
   [140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-iclb6/igt@kms_psr@psr2_primary_blt.html

  * igt@kms_psr@psr2_sprite_blt:
    - shard-iclb:         [PASS][141] -> [SKIP][142] ([fdo#109441]) +1 similar issue
   [141]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-iclb2/igt@kms_psr@psr2_sprite_blt.html
   [142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-iclb6/igt@kms_psr@psr2_sprite_blt.html

  * igt@nouveau_crc@pipe-b-ctx-flip-skip-current-frame:
    - shard-iclb:         NOTRUN -> [SKIP][143] ([i915#2530])
   [143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-iclb6/igt@nouveau_crc@pipe-b-ctx-flip-skip-current-frame.html

  * igt@nouveau_crc@pipe-d-ctx-flip-skip-current-frame:
    - shard-tglb:         NOTRUN -> [SKIP][144] ([i915#2530])
   [144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-tglb1/igt@nouveau_crc@pipe-d-ctx-flip-skip-current-frame.html

  * igt@perf@blocking:
    - shard-skl:          [PASS][145] -> [FAIL][146] ([i915#1542])
   [145]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-skl6/igt@perf@blocking.html
   [146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-skl6/igt@perf@blocking.html

  * igt@perf@gen12-unprivileged-single-ctx-counters:
    - shard-iclb:         NOTRUN -> [SKIP][147] ([fdo#109289])
   [147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-iclb6/igt@perf@gen12-unprivileged-single-ctx-counters.html

  * igt@perf@polling-parameterized:
    - shard-iclb:         [PASS][148] -> [FAIL][149] ([i915#5639])
   [148]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-iclb2/igt@perf@polling-parameterized.html
   [149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-iclb6/igt@perf@polling-parameterized.html

  * igt@prime_nv_test@i915_import_cpu_mmap:
    - shard-iclb:         NOTRUN -> [SKIP][150] ([fdo#109291])
   [150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-iclb6/igt@prime_nv_test@i915_import_cpu_mmap.html

  
#### Possible fixes ####

  * igt@gem_ctx_exec@basic-nohangcheck:
    - shard-tglb:         [FAIL][151] ([i915#6268]) -> [PASS][152]
   [151]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-tglb3/igt@gem_ctx_exec@basic-nohangcheck.html
   [152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-tglb5/igt@gem_ctx_exec@basic-nohangcheck.html

  * igt@gem_eio@kms:
    - shard-tglb:         [FAIL][153] ([i915#5784]) -> [PASS][154]
   [153]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-tglb8/igt@gem_eio@kms.html
   [154]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-tglb7/igt@gem_eio@kms.html

  * igt@gem_exec_balancer@parallel:
    - shard-iclb:         [SKIP][155] ([i915#4525]) -> [PASS][156]
   [155]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-iclb6/igt@gem_exec_balancer@parallel.html
   [156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-iclb1/igt@gem_exec_balancer@parallel.html

  * igt@gem_exec_fair@basic-none@vcs0:
    - shard-kbl:          [FAIL][157] ([i915#2842]) -> [PASS][158] +2 similar issues
   [157]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-kbl7/igt@gem_exec_fair@basic-none@vcs0.html
   [158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-kbl7/igt@gem_exec_fair@basic-none@vcs0.html

  * igt@gem_exec_fair@basic-pace-share@rcs0:
    - shard-glk:          [FAIL][159] ([i915#2842]) -> [PASS][160]
   [159]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-glk1/igt@gem_exec_fair@basic-pace-share@rcs0.html
   [160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-glk1/igt@gem_exec_fair@basic-pace-share@rcs0.html

  * igt@gem_exec_fair@basic-sync@rcs0:
    - shard-kbl:          [SKIP][161] ([fdo#109271]) -> [PASS][162]
   [161]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-kbl1/igt@gem_exec_fair@basic-sync@rcs0.html
   [162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-kbl7/igt@gem_exec_fair@basic-sync@rcs0.html

  * igt@gem_ppgtt@flink-and-close-vma-leak:
    - shard-glk:          [FAIL][163] ([i915#644]) -> [PASS][164]
   [163]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-glk5/igt@gem_ppgtt@flink-and-close-vma-leak.html
   [164]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-glk6/igt@gem_ppgtt@flink-and-close-vma-leak.html

  * igt@gem_workarounds@suspend-resume-fd:
    - shard-kbl:          [DMESG-WARN][165] ([i915#180]) -> [PASS][166] +1 similar issue
   [165]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-kbl7/igt@gem_workarounds@suspend-resume-fd.html
   [166]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-kbl7/igt@gem_workarounds@suspend-resume-fd.html

  * igt@i915_pm_dc@dc6-psr:
    - shard-iclb:         [FAIL][167] ([i915#454]) -> [PASS][168]
   [167]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-iclb7/igt@i915_pm_dc@dc6-psr.html
   [168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-iclb5/igt@i915_pm_dc@dc6-psr.html

  * igt@i915_pm_rc6_residency@rc6-idle@vcs0:
    - shard-glk:          [WARN][169] ([i915#6405]) -> [PASS][170]
   [169]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-glk3/igt@i915_pm_rc6_residency@rc6-idle@vcs0.html
   [170]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-glk6/igt@i915_pm_rc6_residency@rc6-idle@vcs0.html

  * igt@i915_selftest@live@late_gt_pm:
    - shard-skl:          [INCOMPLETE][171] -> [PASS][172]
   [171]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-skl6/igt@i915_selftest@live@late_gt_pm.html
   [172]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-skl9/igt@i915_selftest@live@late_gt_pm.html

  * igt@kms_color@ctm-blue-to-red@pipe-d-edp-1:
    - shard-tglb:         [INCOMPLETE][173] -> [PASS][174]
   [173]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-tglb8/igt@kms_color@ctm-blue-to-red@pipe-d-edp-1.html
   [174]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-tglb1/igt@kms_color@ctm-blue-to-red@pipe-d-edp-1.html

  * igt@kms_cursor_legacy@flip-vs-cursor@legacy:
    - shard-skl:          [FAIL][175] ([i915#2346]) -> [PASS][176]
   [175]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-skl9/igt@kms_cursor_legacy@flip-vs-cursor@legacy.html
   [176]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-skl4/igt@kms_cursor_legacy@flip-vs-cursor@legacy.html

  * igt@kms_cursor_legacy@flip-vs-cursor@toggle:
    - shard-iclb:         [FAIL][177] ([i915#2346]) -> [PASS][178] +3 similar issues
   [177]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-iclb7/igt@kms_cursor_legacy@flip-vs-cursor@toggle.html
   [178]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-iclb5/igt@kms_cursor_legacy@flip-vs-cursor@toggle.html

  * igt@kms_cursor_legacy@short-flip-before-cursor@legacy:
    - shard-skl:          [FAIL][179] -> [PASS][180]
   [179]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-skl1/igt@kms_cursor_legacy@short-flip-before-cursor@legacy.html
   [180]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-skl6/igt@kms_cursor_legacy@short-flip-before-cursor@legacy.html

  * igt@kms_display_modes@extended-mode-basic@pipe-bc:
    - shard-glk:          [DMESG-WARN][181] ([i915#118]) -> [PASS][182]
   [181]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-glk8/igt@kms_display_modes@extended-mode-basic@pipe-bc.html
   [182]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-glk1/igt@kms_display_modes@extended-mode-basic@pipe-bc.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1:
    - shard-skl:          [FAIL][183] ([i915#79]) -> [PASS][184]
   [183]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-skl4/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1.html
   [184]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-skl10/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1.html

  * igt@kms_flip@wf_vblank-ts-check-interruptible@c-edp1:
    - shard-skl:          [FAIL][185] ([i915#2122]) -> [PASS][186] +1 similar issue
   [185]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-skl9/igt@kms_flip@wf_vblank-ts-check-interruptible@c-edp1.html
   [186]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-skl4/igt@kms_flip@wf_vblank-ts-check-interruptible@c-edp1.html

  * igt@kms_hdr@bpc-switch@pipe-a-dp-1:
    - shard-kbl:          [FAIL][187] ([i915#1188]) -> [PASS][188]
   [187]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-kbl4/igt@kms_hdr@bpc-switch@pipe-a-dp-1.html
   [188]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-kbl1/igt@kms_hdr@bpc-switch@pipe-a-dp-1.html

  * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
    - shard-skl:          [FAIL][189] ([fdo#108145] / [i915#265]) -> [PASS][190]
   [189]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-skl6/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
   [190]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-skl9/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html

  * igt@kms_plane_scaling@plane-downscale-with-pixel-format-factor-0-5@pipe-b-edp-1:
    - shard-iclb:         [SKIP][191] ([i915#5176]) -> [PASS][192] +2 similar issues
   [191]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-iclb2/igt@kms_plane_scaling@plane-downscale-with-pixel-format-factor-0-5@pipe-b-edp-1.html
   [192]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-iclb7/igt@kms_plane_scaling@plane-downscale-with-pixel-format-factor-0-5@pipe-b-edp-1.html

  * igt@kms_psr@psr2_cursor_blt:
    - shard-iclb:         [SKIP][193] ([fdo#109441]) -> [PASS][194] +2 similar issues
   [193]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-iclb1/igt@kms_psr@psr2_cursor_blt.html
   [194]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-iclb2/igt@kms_psr@psr2_cursor_blt.html

  * igt@kms_vblank@pipe-b-wait-busy:
    - shard-skl:          [DMESG-WARN][195] ([i915#1982]) -> [PASS][196]
   [195]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-skl6/igt@kms_vblank@pipe-b-wait-busy.html
   [196]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-skl6/igt@kms_vblank@pipe-b-wait-busy.html

  
#### Warnings ####

  * igt@gem_eio@unwedge-stress:
    - shard-tglb:         [TIMEOUT][197] ([i915#3063]) -> [FAIL][198] ([i915#5784])
   [197]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-tglb7/igt@gem_eio@unwedge-stress.html
   [198]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-tglb5/igt@gem_eio@unwedge-stress.html

  * igt@gem_exec_balancer@parallel-ordering:
    - shard-iclb:         [FAIL][199] ([i915#6117]) -> [SKIP][200] ([i915#4525])
   [199]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-iclb4/igt@gem_exec_balancer@parallel-ordering.html
   [200]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-iclb3/igt@gem_exec_balancer@parallel-ordering.html

  * igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_gen12_rc_ccs_cc:
    - shard-skl:          [SKIP][201] ([fdo#109271] / [i915#1888] / [i915#3886]) -> [SKIP][202] ([fdo#109271] / [i915#3886])
   [201]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-skl9/igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_gen12_rc_ccs_cc.html
   [202]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-skl9/igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_gen12_rc_ccs_cc.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-pwrite:
    - shard-skl:          [SKIP][203] ([fdo#109271] / [i915#1888]) -> [SKIP][204] ([fdo#109271]) +3 similar issues
   [203]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-skl9/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-pwrite.html
   [204]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-skl9/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-pwrite.html

  * igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area:
    - shard-iclb:         [SKIP][205] ([fdo#111068] / [i915#658]) -> [SKIP][206] ([i915#2920])
   [205]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-iclb1/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area.html
   [206]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-iclb2/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area.html

  * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-big-fb:
    - shard-iclb:         [SKIP][207] ([i915#658]) -> [SKIP][208] ([i915#2920]) +1 similar issue
   [207]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-iclb3/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-big-fb.html
   [208]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-iclb2/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-big-fb.html

  * igt@kms_psr2_su@page_flip-p010:
    - shard-iclb:         [FAIL][209] ([i915#5939]) -> [SKIP][210] ([fdo#109642] / [fdo#111068] / [i915#658])
   [209]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-iclb2/igt@kms_psr2_su@page_flip-p010.html
   [210]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-iclb7/igt@kms_psr2_su@page_flip-p010.html

  * igt@kms_rotation_crc@primary-4-tiled-reflect-x-180:
    - shard-skl:          [SKIP][211] ([fdo#109271]) -> [SKIP][212] ([fdo#109271] / [i915#1888]) +1 similar issue
   [211]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-skl9/igt@kms_rotation_crc@primary-4-tiled-reflect-x-180.html
   [212]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-skl4/igt@kms_rotation_crc@primary-4-tiled-reflect-x-180.html

  * igt@runner@aborted:
    - shard-kbl:          ([FAIL][213], [FAIL][214], [FAIL][215], [FAIL][216]) ([i915#180] / [i915#3002] / [i915#4312] / [i915#5257]) -> ([FAIL][217], [FAIL][218], [FAIL][219]) ([i915#3002] / [i915#4312] / [i915#5257])
   [213]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-kbl7/igt@runner@aborted.html
   [214]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-kbl7/igt@runner@aborted.html
   [215]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-kbl7/igt@runner@aborted.html
   [216]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11922/shard-kbl7/igt@runner@aborted.html
   [217]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-kbl7/igt@runner@aborted.html
   [218]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-kbl6/igt@runner@aborted.html
   [219]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/shard-kbl1/igt@runner@aborted.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [IGT#2]: https://gitlab.freedesktop.org/drm/igt-gpu-tools/issues/2
  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
  [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
  [fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
  [fdo#109283]: https://bugs.freedesktop.org/show_bug.cgi?id=109283
  [fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
  [fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291
  [fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
  [fdo#109300]: https://bugs.freedesktop.org/show_bug.cgi?id=109300
  [fdo#109302]: https://bugs.freedesktop.org/show_bug.cgi?id=109302
  [fdo#109303]: https://bugs.freedesktop.org/show_bug.cgi?id=109303
  [fdo#109307]: https://bugs.freedesktop.org/show_bug.cgi?id=109307
  [fdo#109308]: https://bugs.freedesktop.org/show_bug.cgi?id=109308
  [fdo#109309]: https://bugs.freedesktop.org/show_bug.cgi?id=109309
  [fdo#109312]: https://bugs.freedesktop.org/show_bug.cgi?id=109312
  [fdo#109314]: https://bugs.freedesktop.org/show_bug.cgi?id=109314
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506
  [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
  [fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
  [fdo#110542]: https://bugs.freedesktop.org/show_bug.cgi?id=110542
  [fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723
  [fdo#111066]: https://bugs.freedesktop.org/show_bug.cgi?id=111066
  [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
  [fdo#111314]: https://bugs.freedesktop.org/show_bug.cgi?id=111314
  [fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
  [fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
  [fdo#111644]: https://bugs.freedesktop.org/show_bug.cgi?id=111644
  [fdo#111656]: https://bugs.freedesktop.org/show_bug.cgi?id=111656
  [fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [fdo#112054]: https://bugs.freedesktop.org/show_bug.cgi?id=112054
  [fdo#112283]: https://bugs.freedesktop.org/show_bug.cgi?id=112283
  [i915#1063]: https://gitlab.freedesktop.org/drm/intel/issues/1063
  [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
  [i915#1155]: https://gitlab.freedesktop.org/drm/intel/issues/1155
  [i915#118]: https://gitlab.freedesktop.org/drm/intel/issues/118
  [i915#1188]: https://gitlab.freedesktop.org/drm/intel/issues/1188
  [i915#1257]: https://gitlab.freedesktop.org/drm/intel/issues/1257
  [i915#1319]: https://gitlab.freedesktop.org/drm/intel/issues/1319
  [i915#132]: https://gitlab.freedesktop.org/drm/intel/issues/132
  [i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
  [i915#1542]: https://gitlab.freedesktop.org/drm/intel/issues/1542
  [i915#160]: https://gitlab.freedesktop.org/drm/intel/issues/160
  [i915#1722]: https://gitlab.freedesktop.org/drm/intel/issues/1722
  [i915#1769]: https://gitlab.freedesktop.org/drm/intel/issues/1769
  [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
  [i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825
  [i915#1836]: https://gitlab.freedesktop.org/drm/intel/issues/1836
  [i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839
  [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
  [i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
  [i915#1850]: https://gitlab.freedesktop.org/drm/intel/issues/1850
  [i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888
  [i915#1902]: https://gitlab.freedesktop.org/drm/intel/issues/1902
  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#2029]: https://gitlab.freedesktop.org/drm/intel/issues/2029
  [i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
  [i915#2410]: https://gitlab.freedesktop.org/drm/intel/issues/2410
  [i915#2433]: https://gitlab.freedesktop.org/drm/intel/issues/2433
  [i915#2434]: https://gitlab.freedesktop.org/drm/intel/issues/2434
  [i915#2435]: https://gitlab.freedesktop.org/drm/intel/issues/2435
  [i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
  [i915#2521]: https://gitlab.freedesktop.org/drm/intel/issues/2521
  [i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
  [i915#2530]: https://gitlab.freedesktop.org/drm/intel/issues/2530
  [i915#2532]: https://gitlab.freedesktop.org/drm/intel/issues/2532
  [i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
  [i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
  [i915#2658]: https://gitlab.freedesktop.org/drm/intel/issues/2658
  [i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
  [i915#2681]: https://gitlab.freedesktop.org/drm/intel/issues/2681
  [i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705
  [i915#280]: https://gitlab.freedesktop.org/drm/intel/issues/280
  [i915#284]: https://gitlab.freedesktop.org/drm/intel/issues/284
  [i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
  [i915#2846]: https://gitlab.freedesktop.org/drm/intel/issues/2846
  [i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
  [i915#2867]: https://gitlab.freedesktop.org/drm/intel/issues/2867
  [i915#2920]: https://gitlab.freedesktop.org/drm/intel/issues/2920
  [i915#2994]: https://gitlab.freedesktop.org/drm/intel/issues/2994
  [i915#3002]: https://gitlab.freedesktop.org/drm/intel/issues/3002
  [i915#3012]: https://gitlab.freedesktop.org/drm/intel/issues/3012
  [i915#3063]: https://gitlab.freedesktop.org/drm/intel/issues/3063
  [i915#3116]: https://gitlab.freedesktop.org/drm/intel/issues/3116
  [i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
  [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
  [i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
  [i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
  [i915#3299]: https://gitlab.freedesktop.org/drm/intel/issues/3299
  [i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
  [i915#3318]: https://gitlab.freedesktop.org/drm/intel/issues/3318
  [i915#3323]: https://gitlab.freedesktop.org/drm/intel/issues/3323
  [i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
  [i915#3361]: https://gitlab.freedesktop.org/drm/intel/issues/3361
  [i915#3376]: https://gitlab.freedesktop.org/drm/intel/issues/3376
  [i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
  [i915#3469]: https://gitlab.freedesktop.org/drm/intel/issues/3469
  [i915#3528]: https://gitlab.freedesktop.org/drm/intel/issues/3528
  [i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
  [i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
  [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
  [i915#3558]: https://gitlab.freedesktop.org/drm/intel/issues/3558
  [i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
  [i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
  [i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
  [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
  [i915#3734]: https://gitlab.freedesktop.org/drm/intel/issues/3734
  [i915#3742]: https://gitlab.freedesktop.org/drm/intel/issues/3742
  [i915#3804]: https://gitlab.freedesktop.org/drm/intel/issues/3804
  [i915#3810]: https://gitlab.freedesktop.org/drm/intel/issues/3810
  [i915#3826]: https://gitlab.freedesktop.org/drm/intel/issues/3826
  [i915#3828]: https://gitlab.freedesktop.org/drm/intel/issues/3828
  [i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
  [i915#3936]: https://gitlab.freedesktop.org/drm/intel/issues/3936
  [i915#3938]: https://gitlab.freedesktop.org/drm/intel/issues/3938
  [i915#3952]: https://gitlab.freedesktop.org/drm/intel/issues/3952
  [i915#3955]: https://gitlab.freedesktop.org/drm/intel/issues/3955
  [i915#3966]: https://gitlab.freedesktop.org/drm/intel/issues/3966
  [i915#3987]: https://gitlab.freedesktop.org/drm/intel/issues/3987
  [i915#3989]: https://gitlab.freedesktop.org/drm/intel/issues/3989
  [i915#4016]: https://gitlab.freedesktop.org/drm/intel/issues/4016
  [i915#404]: https://gitlab.freedesktop.org/drm/intel/issues/404
  [i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
  [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
  [i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
  [i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
  [i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
  [i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
  [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
  [i915#4171]: https://gitlab.freedesktop.org/drm/intel/issues/4171
  [i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
  [i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
  [i915#426]: https://gitlab.freedesktop.org/drm/intel/issues/426
  [i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
  [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
  [i915#4349]: https://gitlab.freedesktop.org/drm/intel/issues/4349
  [i915#4369]: https://gitlab.freedesktop.org/drm/intel/issues/4369
  [i915#4386]: https://gitlab.freedesktop.org/drm/intel/issues/4386
  [i915#4387]: https://gitlab.freedesktop.org/drm/intel/issues/4387
  [i915#4462]: https://gitlab.freedesktop.org/drm/intel/issues/4462
  [i915#4494]: https://gitlab.freedesktop.org/drm/intel/issues/4494
  [i915#4525]: https://gitlab.freedesktop.org/drm/intel/issues/4525
  [i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
  [i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
  [i915#4565]: https://gitlab.freedesktop.org/drm/intel/issues/4565
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#4767]: https://gitlab.freedesktop.org/drm/intel/issues/4767
  [i915#4771]: https://gitlab.freedesktop.org/drm/intel/issues/4771
  [i915#4812]: https://gitlab.freedesktop.org/drm/intel/issues/4812
  [i915#4818]: https://gitlab.freedesktop.org/drm/intel/issues/4818
  [i915#4833]: https://gitlab.freedesktop.org/drm/intel/issues/4833
  [i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852
  [i915#4853]: https://gitlab.freedesktop.org/drm/intel/issues/4853
  [i915#4854]: https://gitlab.freedesktop.org/drm/intel/issues/4854
  [i915#4855]: https://gitlab.freedesktop.org/drm/intel/issues/4855
  [i915#4859]: https://gitlab.freedesktop.org/drm/intel/issues/4859
  [i915#4860]: https://gitlab.freedesktop.org/drm/intel/issues/4860
  [i915#4873]: https://gitlab.freedesktop.org/drm/intel/issues/4873
  [i915#4877]: https://gitlab.freedesktop.org/drm/intel/issues/4877
  [i915#4880]: https://gitlab.freedesktop.org/drm/intel/issues/4880
  [i915#4883]: https://gitlab.freedesktop.org/drm/intel/issues/4883
  [i915#4884]: https://gitlab.freedesktop.org/drm/intel/issues/4884
  [i915#4885]: https://gitlab.freedesktop.org/drm/intel/issues/4885
  [i915#4893]: https://gitlab.freedesktop.org/drm/intel/issues/4893
  [i915#4904]: https://gitlab.freedesktop.org/drm/intel/issues/4904
  [i915#4941]: https://gitlab.freedesktop.org/drm/intel/issues/4941
  [i915#4957]: https://gitlab.freedesktop.org/drm/intel/issues/4957
  [i915#4958]: https://gitlab.freedesktop.org/drm/intel/issues/4958
  [i915#4991]: https://gitlab.freedesktop.org/drm/intel/issues/4991
  [i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
  [i915#5182]: https://gitlab.freedesktop.org/drm/intel/issues/5182
  [i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
  [i915#5257]: https://gitlab.freedesktop.org/drm/intel/issues/5257
  [i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
  [i915#5287]: https://gitlab.freedesktop.org/drm/intel/issues/5287
  [i915#5288]: https://gitlab.freedesktop.org/drm/intel/issues/5288
  [i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289
  [i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325
  [i915#5327]: https://gitlab.freedesktop.org/drm/intel/issues/5327
  [i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
  [i915#5439]: https://gitlab.freedesktop.org/drm/intel/issues/5439
  [i915#5461]: https://gitlab.freedesktop.org/drm/intel/issues/5461
  [i915#5563]: https://gitlab.freedesktop.org/drm/intel/issues/5563
  [i915#5639]: https://gitlab.freedesktop.org/drm/intel/issues/5639
  [i915#5723]: https://gitlab.freedesktop.org/drm/intel/issues/5723
  [i915#5784]: https://gitlab.freedesktop.org/drm/intel/issues/5784
  [i915#5939]: https://gitlab.freedesktop.org/drm/intel/issues/5939
  [i915#6011]: https://gitlab.freedesktop.org/drm/intel/issues/6011
  [i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
  [i915#6117]: https://gitlab.freedesktop.org/drm/intel/issues/6117
  [i915#6227]: https://gitlab.freedesktop.org/drm/intel/issues/6227
  [i915#6230]: https://gitlab.freedesktop.org/drm/intel/issues/6230
  [i915#6245]: https://gitlab.freedesktop.org/drm/intel/issues/6245
  [i915#6247]: https://gitlab.freedesktop.org/drm/intel/issues/6247
  [i915#6248]: https://gitlab.freedesktop.org/drm/intel/issues/6248
  [i915#6258]: https://gitlab.freedesktop.org/drm/intel/issues/6258
  [i915#6268]: https://gitlab.freedesktop.org/drm/intel/issues/6268
  [i915#6331]: https://gitlab.freedesktop.org/drm/intel/issues/6331
  [i915#6334]: https://gitlab.freedesktop.org/drm/intel/issues/6334
  [i915#6335]: https://gitlab.freedesktop.org/drm/intel/issues/6335
  [i915#6340]: https://gitlab.freedesktop.org/drm/intel/issues/6340
  [i915#6344]: https://gitlab.freedesktop.org/drm/intel/issues/6344
  [i915#6375]: https://gitlab.freedesktop.org/drm/intel/issues/6375
  [i915#6405]: https://gitlab.freedesktop.org/drm/intel/issues/6405
  [i915#6433]: https://gitlab.freedesktop.org/drm/intel/issues/6433
  [i915#644]: https://gitlab.freedesktop.org/drm/intel/issues/644
  [i915#6463]: https://gitlab.freedesktop.org/drm/intel/issues/6463
  [i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
  [i915#768]: https://gitlab.freedesktop.org/drm/intel/issues/768
  [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79


Build changes
-------------

  * Linux: CI_DRM_11922 -> Patchwork_106475v1

  CI-20190529: 20190529
  CI_DRM_11922: 778142c0a2a41283658704530b41ac65c4844ad3 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_6592: d7c0659613199a5dcf535ed3add68ed1991ead7e @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_106475v1: 778142c0a2a41283658704530b41ac65c4844ad3 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_106475v1/index.html

[-- Attachment #2: Type: text/html, Size: 76883 bytes --]

Re: [Intel-gfx] [PATCH v3 2/3] drm/amdgpu_dm: Rely on split out luminance calculation function

[Jani Nikula]

On Tue, 19 Jul 2022, Jouni Högander <jouni.hogander@intel.com> wrote:
> Luminance range calculation was split out into drm_edid.c and is now
> part of edid parsing. Rely on values calculated during edid parsing and
> use these for caps->aux_max_input_signal and caps->aux_min_input_signal.

Harry, I'll merge patches 1 & 3 in this series through drm-misc-next,
because I think they're good to go, and fix stuff in i915.

Can I get your rb/ack to merge this patch as well, or do you want to
take this later via your tree?

BR,
Jani.


>
> v2: Use values calculated during edid parsing
>
> Cc: Roman Li <roman.li@amd.com>
> Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
> Cc: Harry Wentland <harry.wentland@amd.com>
> Cc: Lyude Paul <lyude@redhat.com>
> Cc: Mika Kahola <mika.kahola@intel.com>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: Manasi Navare <manasi.d.navare@intel.com>
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
>  .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 35 +++----------------
>  1 file changed, 4 insertions(+), 31 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index 3e83fed540e8..eb7abdeb8653 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -2903,15 +2903,12 @@ static struct drm_mode_config_helper_funcs amdgpu_dm_mode_config_helperfuncs = {
>  
>  static void update_connector_ext_caps(struct amdgpu_dm_connector *aconnector)
>  {
> -	u32 max_avg, min_cll, max, min, q, r;
>  	struct amdgpu_dm_backlight_caps *caps;
>  	struct amdgpu_display_manager *dm;
>  	struct drm_connector *conn_base;
>  	struct amdgpu_device *adev;
>  	struct dc_link *link = NULL;
> -	static const u8 pre_computed_values[] = {
> -		50, 51, 52, 53, 55, 56, 57, 58, 59, 61, 62, 63, 65, 66, 68, 69,
> -		71, 72, 74, 75, 77, 79, 81, 82, 84, 86, 88, 90, 92, 94, 96, 98};
> +	struct drm_luminance_range_info *luminance_range;
>  	int i;
>  
>  	if (!aconnector || !aconnector->dc_link)
> @@ -2933,8 +2930,6 @@ static void update_connector_ext_caps(struct amdgpu_dm_connector *aconnector)
>  	caps = &dm->backlight_caps[i];
>  	caps->ext_caps = &aconnector->dc_link->dpcd_sink_ext_caps;
>  	caps->aux_support = false;
> -	max_avg = conn_base->hdr_sink_metadata.hdmi_type1.max_fall;
> -	min_cll = conn_base->hdr_sink_metadata.hdmi_type1.min_cll;
>  
>  	if (caps->ext_caps->bits.oled == 1 /*||
>  	    caps->ext_caps->bits.sdr_aux_backlight_control == 1 ||
> @@ -2946,31 +2941,9 @@ static void update_connector_ext_caps(struct amdgpu_dm_connector *aconnector)
>  	else if (amdgpu_backlight == 1)
>  		caps->aux_support = true;
>  
> -	/* From the specification (CTA-861-G), for calculating the maximum
> -	 * luminance we need to use:
> -	 *	Luminance = 50*2**(CV/32)
> -	 * Where CV is a one-byte value.
> -	 * For calculating this expression we may need float point precision;
> -	 * to avoid this complexity level, we take advantage that CV is divided
> -	 * by a constant. From the Euclids division algorithm, we know that CV
> -	 * can be written as: CV = 32*q + r. Next, we replace CV in the
> -	 * Luminance expression and get 50*(2**q)*(2**(r/32)), hence we just
> -	 * need to pre-compute the value of r/32. For pre-computing the values
> -	 * We just used the following Ruby line:
> -	 *	(0...32).each {|cv| puts (50*2**(cv/32.0)).round}
> -	 * The results of the above expressions can be verified at
> -	 * pre_computed_values.
> -	 */
> -	q = max_avg >> 5;
> -	r = max_avg % 32;
> -	max = (1 << q) * pre_computed_values[r];
> -
> -	// min luminance: maxLum * (CV/255)^2 / 100
> -	q = DIV_ROUND_CLOSEST(min_cll, 255);
> -	min = max * DIV_ROUND_CLOSEST((q * q), 100);
> -
> -	caps->aux_max_input_signal = max;
> -	caps->aux_min_input_signal = min;
> +	luminance_range = &conn_base->display_info.luminance_range;
> +	caps->aux_min_input_signal = luminance_range->min_luminance;
> +	caps->aux_max_input_signal = luminance_range->max_luminance;
>  }
>  
>  void amdgpu_dm_update_connector_after_detect(

-- 
Jani Nikula, Intel Open Source Graphics Center

Re: [PATCH v3 2/3] drm/amdgpu_dm: Rely on split out luminance calculation function

[Jani Nikula]

On Tue, 19 Jul 2022, Jouni Högander <jouni.hogander@intel.com> wrote:
> Luminance range calculation was split out into drm_edid.c and is now
> part of edid parsing. Rely on values calculated during edid parsing and
> use these for caps->aux_max_input_signal and caps->aux_min_input_signal.

Harry, I'll merge patches 1 & 3 in this series through drm-misc-next,
because I think they're good to go, and fix stuff in i915.

Can I get your rb/ack to merge this patch as well, or do you want to
take this later via your tree?

BR,
Jani.


>
> v2: Use values calculated during edid parsing
>
> Cc: Roman Li <roman.li@amd.com>
> Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
> Cc: Harry Wentland <harry.wentland@amd.com>
> Cc: Lyude Paul <lyude@redhat.com>
> Cc: Mika Kahola <mika.kahola@intel.com>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: Manasi Navare <manasi.d.navare@intel.com>
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
>  .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 35 +++----------------
>  1 file changed, 4 insertions(+), 31 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index 3e83fed540e8..eb7abdeb8653 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -2903,15 +2903,12 @@ static struct drm_mode_config_helper_funcs amdgpu_dm_mode_config_helperfuncs = {
>  
>  static void update_connector_ext_caps(struct amdgpu_dm_connector *aconnector)
>  {
> -	u32 max_avg, min_cll, max, min, q, r;
>  	struct amdgpu_dm_backlight_caps *caps;
>  	struct amdgpu_display_manager *dm;
>  	struct drm_connector *conn_base;
>  	struct amdgpu_device *adev;
>  	struct dc_link *link = NULL;
> -	static const u8 pre_computed_values[] = {
> -		50, 51, 52, 53, 55, 56, 57, 58, 59, 61, 62, 63, 65, 66, 68, 69,
> -		71, 72, 74, 75, 77, 79, 81, 82, 84, 86, 88, 90, 92, 94, 96, 98};
> +	struct drm_luminance_range_info *luminance_range;
>  	int i;
>  
>  	if (!aconnector || !aconnector->dc_link)
> @@ -2933,8 +2930,6 @@ static void update_connector_ext_caps(struct amdgpu_dm_connector *aconnector)
>  	caps = &dm->backlight_caps[i];
>  	caps->ext_caps = &aconnector->dc_link->dpcd_sink_ext_caps;
>  	caps->aux_support = false;
> -	max_avg = conn_base->hdr_sink_metadata.hdmi_type1.max_fall;
> -	min_cll = conn_base->hdr_sink_metadata.hdmi_type1.min_cll;
>  
>  	if (caps->ext_caps->bits.oled == 1 /*||
>  	    caps->ext_caps->bits.sdr_aux_backlight_control == 1 ||
> @@ -2946,31 +2941,9 @@ static void update_connector_ext_caps(struct amdgpu_dm_connector *aconnector)
>  	else if (amdgpu_backlight == 1)
>  		caps->aux_support = true;
>  
> -	/* From the specification (CTA-861-G), for calculating the maximum
> -	 * luminance we need to use:
> -	 *	Luminance = 50*2**(CV/32)
> -	 * Where CV is a one-byte value.
> -	 * For calculating this expression we may need float point precision;
> -	 * to avoid this complexity level, we take advantage that CV is divided
> -	 * by a constant. From the Euclids division algorithm, we know that CV
> -	 * can be written as: CV = 32*q + r. Next, we replace CV in the
> -	 * Luminance expression and get 50*(2**q)*(2**(r/32)), hence we just
> -	 * need to pre-compute the value of r/32. For pre-computing the values
> -	 * We just used the following Ruby line:
> -	 *	(0...32).each {|cv| puts (50*2**(cv/32.0)).round}
> -	 * The results of the above expressions can be verified at
> -	 * pre_computed_values.
> -	 */
> -	q = max_avg >> 5;
> -	r = max_avg % 32;
> -	max = (1 << q) * pre_computed_values[r];
> -
> -	// min luminance: maxLum * (CV/255)^2 / 100
> -	q = DIV_ROUND_CLOSEST(min_cll, 255);
> -	min = max * DIV_ROUND_CLOSEST((q * q), 100);
> -
> -	caps->aux_max_input_signal = max;
> -	caps->aux_min_input_signal = min;
> +	luminance_range = &conn_base->display_info.luminance_range;
> +	caps->aux_min_input_signal = luminance_range->min_luminance;
> +	caps->aux_max_input_signal = luminance_range->max_luminance;
>  }
>  
>  void amdgpu_dm_update_connector_after_detect(

-- 
Jani Nikula, Intel Open Source Graphics Center

Re: [PATCH v3 2/3] drm/amdgpu_dm: Rely on split out luminance calculation function

[Jani Nikula]

On Tue, 19 Jul 2022, Jouni Högander <jouni.hogander@intel.com> wrote:
> Luminance range calculation was split out into drm_edid.c and is now
> part of edid parsing. Rely on values calculated during edid parsing and
> use these for caps->aux_max_input_signal and caps->aux_min_input_signal.

Harry, I'll merge patches 1 & 3 in this series through drm-misc-next,
because I think they're good to go, and fix stuff in i915.

Can I get your rb/ack to merge this patch as well, or do you want to
take this later via your tree?

BR,
Jani.


>
> v2: Use values calculated during edid parsing
>
> Cc: Roman Li <roman.li@amd.com>
> Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
> Cc: Harry Wentland <harry.wentland@amd.com>
> Cc: Lyude Paul <lyude@redhat.com>
> Cc: Mika Kahola <mika.kahola@intel.com>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Cc: Manasi Navare <manasi.d.navare@intel.com>
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
>  .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 35 +++----------------
>  1 file changed, 4 insertions(+), 31 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> index 3e83fed540e8..eb7abdeb8653 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> @@ -2903,15 +2903,12 @@ static struct drm_mode_config_helper_funcs amdgpu_dm_mode_config_helperfuncs = {
>  
>  static void update_connector_ext_caps(struct amdgpu_dm_connector *aconnector)
>  {
> -	u32 max_avg, min_cll, max, min, q, r;
>  	struct amdgpu_dm_backlight_caps *caps;
>  	struct amdgpu_display_manager *dm;
>  	struct drm_connector *conn_base;
>  	struct amdgpu_device *adev;
>  	struct dc_link *link = NULL;
> -	static const u8 pre_computed_values[] = {
> -		50, 51, 52, 53, 55, 56, 57, 58, 59, 61, 62, 63, 65, 66, 68, 69,
> -		71, 72, 74, 75, 77, 79, 81, 82, 84, 86, 88, 90, 92, 94, 96, 98};
> +	struct drm_luminance_range_info *luminance_range;
>  	int i;
>  
>  	if (!aconnector || !aconnector->dc_link)
> @@ -2933,8 +2930,6 @@ static void update_connector_ext_caps(struct amdgpu_dm_connector *aconnector)
>  	caps = &dm->backlight_caps[i];
>  	caps->ext_caps = &aconnector->dc_link->dpcd_sink_ext_caps;
>  	caps->aux_support = false;
> -	max_avg = conn_base->hdr_sink_metadata.hdmi_type1.max_fall;
> -	min_cll = conn_base->hdr_sink_metadata.hdmi_type1.min_cll;
>  
>  	if (caps->ext_caps->bits.oled == 1 /*||
>  	    caps->ext_caps->bits.sdr_aux_backlight_control == 1 ||
> @@ -2946,31 +2941,9 @@ static void update_connector_ext_caps(struct amdgpu_dm_connector *aconnector)
>  	else if (amdgpu_backlight == 1)
>  		caps->aux_support = true;
>  
> -	/* From the specification (CTA-861-G), for calculating the maximum
> -	 * luminance we need to use:
> -	 *	Luminance = 50*2**(CV/32)
> -	 * Where CV is a one-byte value.
> -	 * For calculating this expression we may need float point precision;
> -	 * to avoid this complexity level, we take advantage that CV is divided
> -	 * by a constant. From the Euclids division algorithm, we know that CV
> -	 * can be written as: CV = 32*q + r. Next, we replace CV in the
> -	 * Luminance expression and get 50*(2**q)*(2**(r/32)), hence we just
> -	 * need to pre-compute the value of r/32. For pre-computing the values
> -	 * We just used the following Ruby line:
> -	 *	(0...32).each {|cv| puts (50*2**(cv/32.0)).round}
> -	 * The results of the above expressions can be verified at
> -	 * pre_computed_values.
> -	 */
> -	q = max_avg >> 5;
> -	r = max_avg % 32;
> -	max = (1 << q) * pre_computed_values[r];
> -
> -	// min luminance: maxLum * (CV/255)^2 / 100
> -	q = DIV_ROUND_CLOSEST(min_cll, 255);
> -	min = max * DIV_ROUND_CLOSEST((q * q), 100);
> -
> -	caps->aux_max_input_signal = max;
> -	caps->aux_min_input_signal = min;
> +	luminance_range = &conn_base->display_info.luminance_range;
> +	caps->aux_min_input_signal = luminance_range->min_luminance;
> +	caps->aux_max_input_signal = luminance_range->max_luminance;
>  }
>  
>  void amdgpu_dm_update_connector_after_detect(

-- 
Jani Nikula, Intel Open Source Graphics Center

Re: [Intel-gfx] [PATCH v3 2/3] drm/amdgpu_dm: Rely on split out luminance calculation function

[Deucher, Alexander]

[Public]

> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Jani
> Nikula
> Sent: Thursday, August 4, 2022 5:55 AM
> To: Jouni Högander <jouni.hogander@intel.com>; dri-
> devel@lists.freedesktop.org; intel-gfx@lists.freedesktop.org; amd-
> gfx@lists.freedesktop.org
> Cc: Siqueira, Rodrigo <Rodrigo.Siqueira@amd.com>; Li, Roman
> <Roman.Li@amd.com>; Manasi Navare <manasi.d.navare@intel.com>; Mika
> Kahola <mika.kahola@intel.com>; Jouni Högander
> <jouni.hogander@intel.com>; Wentland, Harry
> <Harry.Wentland@amd.com>
> Subject: Re: [PATCH v3 2/3] drm/amdgpu_dm: Rely on split out luminance
> calculation function
> 
> On Tue, 19 Jul 2022, Jouni Högander <jouni.hogander@intel.com> wrote:
> > Luminance range calculation was split out into drm_edid.c and is now
> > part of edid parsing. Rely on values calculated during edid parsing
> > and use these for caps->aux_max_input_signal and caps-
> >aux_min_input_signal.
> 
> Harry, I'll merge patches 1 & 3 in this series through drm-misc-next, because I
> think they're good to go, and fix stuff in i915.
> 
> Can I get your rb/ack to merge this patch as well, or do you want to take this
> later via your tree?

You can take this via drm-misc.
Acked-by: Alex Deucher <alexander.deucher@amd.com>


> 
> BR,
> Jani.
> 
> 
> >
> > v2: Use values calculated during edid parsing
> >
> > Cc: Roman Li <roman.li@amd.com>
> > Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
> > Cc: Harry Wentland <harry.wentland@amd.com>
> > Cc: Lyude Paul <lyude@redhat.com>
> > Cc: Mika Kahola <mika.kahola@intel.com>
> > Cc: Jani Nikula <jani.nikula@intel.com>
> > Cc: Manasi Navare <manasi.d.navare@intel.com>
> > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > ---
> >  .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 35
> > +++----------------
> >  1 file changed, 4 insertions(+), 31 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> > b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> > index 3e83fed540e8..eb7abdeb8653 100644
> > --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> > +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> > @@ -2903,15 +2903,12 @@ static struct drm_mode_config_helper_funcs
> > amdgpu_dm_mode_config_helperfuncs = {
> >
> >  static void update_connector_ext_caps(struct amdgpu_dm_connector
> > *aconnector)  {
> > -	u32 max_avg, min_cll, max, min, q, r;
> >  	struct amdgpu_dm_backlight_caps *caps;
> >  	struct amdgpu_display_manager *dm;
> >  	struct drm_connector *conn_base;
> >  	struct amdgpu_device *adev;
> >  	struct dc_link *link = NULL;
> > -	static const u8 pre_computed_values[] = {
> > -		50, 51, 52, 53, 55, 56, 57, 58, 59, 61, 62, 63, 65, 66, 68, 69,
> > -		71, 72, 74, 75, 77, 79, 81, 82, 84, 86, 88, 90, 92, 94, 96, 98};
> > +	struct drm_luminance_range_info *luminance_range;
> >  	int i;
> >
> >  	if (!aconnector || !aconnector->dc_link) @@ -2933,8 +2930,6 @@
> > static void update_connector_ext_caps(struct amdgpu_dm_connector
> *aconnector)
> >  	caps = &dm->backlight_caps[i];
> >  	caps->ext_caps = &aconnector->dc_link->dpcd_sink_ext_caps;
> >  	caps->aux_support = false;
> > -	max_avg = conn_base->hdr_sink_metadata.hdmi_type1.max_fall;
> > -	min_cll = conn_base->hdr_sink_metadata.hdmi_type1.min_cll;
> >
> >  	if (caps->ext_caps->bits.oled == 1 /*||
> >  	    caps->ext_caps->bits.sdr_aux_backlight_control == 1 || @@
> > -2946,31 +2941,9 @@ static void update_connector_ext_caps(struct
> amdgpu_dm_connector *aconnector)
> >  	else if (amdgpu_backlight == 1)
> >  		caps->aux_support = true;
> >
> > -	/* From the specification (CTA-861-G), for calculating the maximum
> > -	 * luminance we need to use:
> > -	 *	Luminance = 50*2**(CV/32)
> > -	 * Where CV is a one-byte value.
> > -	 * For calculating this expression we may need float point precision;
> > -	 * to avoid this complexity level, we take advantage that CV is divided
> > -	 * by a constant. From the Euclids division algorithm, we know that
> CV
> > -	 * can be written as: CV = 32*q + r. Next, we replace CV in the
> > -	 * Luminance expression and get 50*(2**q)*(2**(r/32)), hence we
> just
> > -	 * need to pre-compute the value of r/32. For pre-computing the
> values
> > -	 * We just used the following Ruby line:
> > -	 *	(0...32).each {|cv| puts (50*2**(cv/32.0)).round}
> > -	 * The results of the above expressions can be verified at
> > -	 * pre_computed_values.
> > -	 */
> > -	q = max_avg >> 5;
> > -	r = max_avg % 32;
> > -	max = (1 << q) * pre_computed_values[r];
> > -
> > -	// min luminance: maxLum * (CV/255)^2 / 100
> > -	q = DIV_ROUND_CLOSEST(min_cll, 255);
> > -	min = max * DIV_ROUND_CLOSEST((q * q), 100);
> > -
> > -	caps->aux_max_input_signal = max;
> > -	caps->aux_min_input_signal = min;
> > +	luminance_range = &conn_base->display_info.luminance_range;
> > +	caps->aux_min_input_signal = luminance_range->min_luminance;
> > +	caps->aux_max_input_signal = luminance_range->max_luminance;
> >  }
> >
> >  void amdgpu_dm_update_connector_after_detect(
> 
> --
> Jani Nikula, Intel Open Source Graphics Center

RE: [PATCH v3 2/3] drm/amdgpu_dm: Rely on split out luminance calculation function

[Deucher, Alexander]

[Public]

> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Jani
> Nikula
> Sent: Thursday, August 4, 2022 5:55 AM
> To: Jouni Högander <jouni.hogander@intel.com>; dri-
> devel@lists.freedesktop.org; intel-gfx@lists.freedesktop.org; amd-
> gfx@lists.freedesktop.org
> Cc: Siqueira, Rodrigo <Rodrigo.Siqueira@amd.com>; Li, Roman
> <Roman.Li@amd.com>; Manasi Navare <manasi.d.navare@intel.com>; Mika
> Kahola <mika.kahola@intel.com>; Jouni Högander
> <jouni.hogander@intel.com>; Wentland, Harry
> <Harry.Wentland@amd.com>
> Subject: Re: [PATCH v3 2/3] drm/amdgpu_dm: Rely on split out luminance
> calculation function
> 
> On Tue, 19 Jul 2022, Jouni Högander <jouni.hogander@intel.com> wrote:
> > Luminance range calculation was split out into drm_edid.c and is now
> > part of edid parsing. Rely on values calculated during edid parsing
> > and use these for caps->aux_max_input_signal and caps-
> >aux_min_input_signal.
> 
> Harry, I'll merge patches 1 & 3 in this series through drm-misc-next, because I
> think they're good to go, and fix stuff in i915.
> 
> Can I get your rb/ack to merge this patch as well, or do you want to take this
> later via your tree?

You can take this via drm-misc.
Acked-by: Alex Deucher <alexander.deucher@amd.com>


> 
> BR,
> Jani.
> 
> 
> >
> > v2: Use values calculated during edid parsing
> >
> > Cc: Roman Li <roman.li@amd.com>
> > Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
> > Cc: Harry Wentland <harry.wentland@amd.com>
> > Cc: Lyude Paul <lyude@redhat.com>
> > Cc: Mika Kahola <mika.kahola@intel.com>
> > Cc: Jani Nikula <jani.nikula@intel.com>
> > Cc: Manasi Navare <manasi.d.navare@intel.com>
> > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > ---
> >  .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 35
> > +++----------------
> >  1 file changed, 4 insertions(+), 31 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> > b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> > index 3e83fed540e8..eb7abdeb8653 100644
> > --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> > +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> > @@ -2903,15 +2903,12 @@ static struct drm_mode_config_helper_funcs
> > amdgpu_dm_mode_config_helperfuncs = {
> >
> >  static void update_connector_ext_caps(struct amdgpu_dm_connector
> > *aconnector)  {
> > -	u32 max_avg, min_cll, max, min, q, r;
> >  	struct amdgpu_dm_backlight_caps *caps;
> >  	struct amdgpu_display_manager *dm;
> >  	struct drm_connector *conn_base;
> >  	struct amdgpu_device *adev;
> >  	struct dc_link *link = NULL;
> > -	static const u8 pre_computed_values[] = {
> > -		50, 51, 52, 53, 55, 56, 57, 58, 59, 61, 62, 63, 65, 66, 68, 69,
> > -		71, 72, 74, 75, 77, 79, 81, 82, 84, 86, 88, 90, 92, 94, 96, 98};
> > +	struct drm_luminance_range_info *luminance_range;
> >  	int i;
> >
> >  	if (!aconnector || !aconnector->dc_link) @@ -2933,8 +2930,6 @@
> > static void update_connector_ext_caps(struct amdgpu_dm_connector
> *aconnector)
> >  	caps = &dm->backlight_caps[i];
> >  	caps->ext_caps = &aconnector->dc_link->dpcd_sink_ext_caps;
> >  	caps->aux_support = false;
> > -	max_avg = conn_base->hdr_sink_metadata.hdmi_type1.max_fall;
> > -	min_cll = conn_base->hdr_sink_metadata.hdmi_type1.min_cll;
> >
> >  	if (caps->ext_caps->bits.oled == 1 /*||
> >  	    caps->ext_caps->bits.sdr_aux_backlight_control == 1 || @@
> > -2946,31 +2941,9 @@ static void update_connector_ext_caps(struct
> amdgpu_dm_connector *aconnector)
> >  	else if (amdgpu_backlight == 1)
> >  		caps->aux_support = true;
> >
> > -	/* From the specification (CTA-861-G), for calculating the maximum
> > -	 * luminance we need to use:
> > -	 *	Luminance = 50*2**(CV/32)
> > -	 * Where CV is a one-byte value.
> > -	 * For calculating this expression we may need float point precision;
> > -	 * to avoid this complexity level, we take advantage that CV is divided
> > -	 * by a constant. From the Euclids division algorithm, we know that
> CV
> > -	 * can be written as: CV = 32*q + r. Next, we replace CV in the
> > -	 * Luminance expression and get 50*(2**q)*(2**(r/32)), hence we
> just
> > -	 * need to pre-compute the value of r/32. For pre-computing the
> values
> > -	 * We just used the following Ruby line:
> > -	 *	(0...32).each {|cv| puts (50*2**(cv/32.0)).round}
> > -	 * The results of the above expressions can be verified at
> > -	 * pre_computed_values.
> > -	 */
> > -	q = max_avg >> 5;
> > -	r = max_avg % 32;
> > -	max = (1 << q) * pre_computed_values[r];
> > -
> > -	// min luminance: maxLum * (CV/255)^2 / 100
> > -	q = DIV_ROUND_CLOSEST(min_cll, 255);
> > -	min = max * DIV_ROUND_CLOSEST((q * q), 100);
> > -
> > -	caps->aux_max_input_signal = max;
> > -	caps->aux_min_input_signal = min;
> > +	luminance_range = &conn_base->display_info.luminance_range;
> > +	caps->aux_min_input_signal = luminance_range->min_luminance;
> > +	caps->aux_max_input_signal = luminance_range->max_luminance;
> >  }
> >
> >  void amdgpu_dm_update_connector_after_detect(
> 
> --
> Jani Nikula, Intel Open Source Graphics Center

RE: [PATCH v3 2/3] drm/amdgpu_dm: Rely on split out luminance calculation function

[Deucher, Alexander]

[Public]

> -----Original Message-----
> From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Jani
> Nikula
> Sent: Thursday, August 4, 2022 5:55 AM
> To: Jouni Högander <jouni.hogander@intel.com>; dri-
> devel@lists.freedesktop.org; intel-gfx@lists.freedesktop.org; amd-
> gfx@lists.freedesktop.org
> Cc: Siqueira, Rodrigo <Rodrigo.Siqueira@amd.com>; Li, Roman
> <Roman.Li@amd.com>; Manasi Navare <manasi.d.navare@intel.com>; Mika
> Kahola <mika.kahola@intel.com>; Jouni Högander
> <jouni.hogander@intel.com>; Wentland, Harry
> <Harry.Wentland@amd.com>
> Subject: Re: [PATCH v3 2/3] drm/amdgpu_dm: Rely on split out luminance
> calculation function
> 
> On Tue, 19 Jul 2022, Jouni Högander <jouni.hogander@intel.com> wrote:
> > Luminance range calculation was split out into drm_edid.c and is now
> > part of edid parsing. Rely on values calculated during edid parsing
> > and use these for caps->aux_max_input_signal and caps-
> >aux_min_input_signal.
> 
> Harry, I'll merge patches 1 & 3 in this series through drm-misc-next, because I
> think they're good to go, and fix stuff in i915.
> 
> Can I get your rb/ack to merge this patch as well, or do you want to take this
> later via your tree?

You can take this via drm-misc.
Acked-by: Alex Deucher <alexander.deucher@amd.com>


> 
> BR,
> Jani.
> 
> 
> >
> > v2: Use values calculated during edid parsing
> >
> > Cc: Roman Li <roman.li@amd.com>
> > Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
> > Cc: Harry Wentland <harry.wentland@amd.com>
> > Cc: Lyude Paul <lyude@redhat.com>
> > Cc: Mika Kahola <mika.kahola@intel.com>
> > Cc: Jani Nikula <jani.nikula@intel.com>
> > Cc: Manasi Navare <manasi.d.navare@intel.com>
> > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > ---
> >  .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 35
> > +++----------------
> >  1 file changed, 4 insertions(+), 31 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> > b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> > index 3e83fed540e8..eb7abdeb8653 100644
> > --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> > +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
> > @@ -2903,15 +2903,12 @@ static struct drm_mode_config_helper_funcs
> > amdgpu_dm_mode_config_helperfuncs = {
> >
> >  static void update_connector_ext_caps(struct amdgpu_dm_connector
> > *aconnector)  {
> > -	u32 max_avg, min_cll, max, min, q, r;
> >  	struct amdgpu_dm_backlight_caps *caps;
> >  	struct amdgpu_display_manager *dm;
> >  	struct drm_connector *conn_base;
> >  	struct amdgpu_device *adev;
> >  	struct dc_link *link = NULL;
> > -	static const u8 pre_computed_values[] = {
> > -		50, 51, 52, 53, 55, 56, 57, 58, 59, 61, 62, 63, 65, 66, 68, 69,
> > -		71, 72, 74, 75, 77, 79, 81, 82, 84, 86, 88, 90, 92, 94, 96, 98};
> > +	struct drm_luminance_range_info *luminance_range;
> >  	int i;
> >
> >  	if (!aconnector || !aconnector->dc_link) @@ -2933,8 +2930,6 @@
> > static void update_connector_ext_caps(struct amdgpu_dm_connector
> *aconnector)
> >  	caps = &dm->backlight_caps[i];
> >  	caps->ext_caps = &aconnector->dc_link->dpcd_sink_ext_caps;
> >  	caps->aux_support = false;
> > -	max_avg = conn_base->hdr_sink_metadata.hdmi_type1.max_fall;
> > -	min_cll = conn_base->hdr_sink_metadata.hdmi_type1.min_cll;
> >
> >  	if (caps->ext_caps->bits.oled == 1 /*||
> >  	    caps->ext_caps->bits.sdr_aux_backlight_control == 1 || @@
> > -2946,31 +2941,9 @@ static void update_connector_ext_caps(struct
> amdgpu_dm_connector *aconnector)
> >  	else if (amdgpu_backlight == 1)
> >  		caps->aux_support = true;
> >
> > -	/* From the specification (CTA-861-G), for calculating the maximum
> > -	 * luminance we need to use:
> > -	 *	Luminance = 50*2**(CV/32)
> > -	 * Where CV is a one-byte value.
> > -	 * For calculating this expression we may need float point precision;
> > -	 * to avoid this complexity level, we take advantage that CV is divided
> > -	 * by a constant. From the Euclids division algorithm, we know that
> CV
> > -	 * can be written as: CV = 32*q + r. Next, we replace CV in the
> > -	 * Luminance expression and get 50*(2**q)*(2**(r/32)), hence we
> just
> > -	 * need to pre-compute the value of r/32. For pre-computing the
> values
> > -	 * We just used the following Ruby line:
> > -	 *	(0...32).each {|cv| puts (50*2**(cv/32.0)).round}
> > -	 * The results of the above expressions can be verified at
> > -	 * pre_computed_values.
> > -	 */
> > -	q = max_avg >> 5;
> > -	r = max_avg % 32;
> > -	max = (1 << q) * pre_computed_values[r];
> > -
> > -	// min luminance: maxLum * (CV/255)^2 / 100
> > -	q = DIV_ROUND_CLOSEST(min_cll, 255);
> > -	min = max * DIV_ROUND_CLOSEST((q * q), 100);
> > -
> > -	caps->aux_max_input_signal = max;
> > -	caps->aux_min_input_signal = min;
> > +	luminance_range = &conn_base->display_info.luminance_range;
> > +	caps->aux_min_input_signal = luminance_range->min_luminance;
> > +	caps->aux_max_input_signal = luminance_range->max_luminance;
> >  }
> >
> >  void amdgpu_dm_update_connector_after_detect(
> 
> --
> Jani Nikula, Intel Open Source Graphics Center

RE: [PATCH v3 2/3] drm/amdgpu_dm: Rely on split out luminance calculation function

[Jani Nikula]

On Thu, 11 Aug 2022, "Deucher, Alexander" <Alexander.Deucher@amd.com> wrote:
> [Public]
>
>> -----Original Message-----
>> From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Jani
>> Nikula
>> Sent: Thursday, August 4, 2022 5:55 AM
>> To: Jouni Högander <jouni.hogander@intel.com>; dri-
>> devel@lists.freedesktop.org; intel-gfx@lists.freedesktop.org; amd-
>> gfx@lists.freedesktop.org
>> Cc: Siqueira, Rodrigo <Rodrigo.Siqueira@amd.com>; Li, Roman
>> <Roman.Li@amd.com>; Manasi Navare <manasi.d.navare@intel.com>; Mika
>> Kahola <mika.kahola@intel.com>; Jouni Högander
>> <jouni.hogander@intel.com>; Wentland, Harry
>> <Harry.Wentland@amd.com>
>> Subject: Re: [PATCH v3 2/3] drm/amdgpu_dm: Rely on split out luminance
>> calculation function
>> 
>> On Tue, 19 Jul 2022, Jouni Högander <jouni.hogander@intel.com> wrote:
>> > Luminance range calculation was split out into drm_edid.c and is now
>> > part of edid parsing. Rely on values calculated during edid parsing
>> > and use these for caps->aux_max_input_signal and caps-
>> >aux_min_input_signal.
>> 
>> Harry, I'll merge patches 1 & 3 in this series through drm-misc-next, because I
>> think they're good to go, and fix stuff in i915.
>> 
>> Can I get your rb/ack to merge this patch as well, or do you want to take this
>> later via your tree?
>
> You can take this via drm-misc.
> Acked-by: Alex Deucher <alexander.deucher@amd.com>

Thanks, pushed the series to drm-misc-next.

BR,
Jani.

>
>
>> 
>> BR,
>> Jani.
>> 
>> 
>> >
>> > v2: Use values calculated during edid parsing
>> >
>> > Cc: Roman Li <roman.li@amd.com>
>> > Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
>> > Cc: Harry Wentland <harry.wentland@amd.com>
>> > Cc: Lyude Paul <lyude@redhat.com>
>> > Cc: Mika Kahola <mika.kahola@intel.com>
>> > Cc: Jani Nikula <jani.nikula@intel.com>
>> > Cc: Manasi Navare <manasi.d.navare@intel.com>
>> > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
>> > ---
>> >  .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 35
>> > +++----------------
>> >  1 file changed, 4 insertions(+), 31 deletions(-)
>> >
>> > diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
>> > b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
>> > index 3e83fed540e8..eb7abdeb8653 100644
>> > --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
>> > +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
>> > @@ -2903,15 +2903,12 @@ static struct drm_mode_config_helper_funcs
>> > amdgpu_dm_mode_config_helperfuncs = {
>> >
>> >  static void update_connector_ext_caps(struct amdgpu_dm_connector
>> > *aconnector)  {
>> > -	u32 max_avg, min_cll, max, min, q, r;
>> >  	struct amdgpu_dm_backlight_caps *caps;
>> >  	struct amdgpu_display_manager *dm;
>> >  	struct drm_connector *conn_base;
>> >  	struct amdgpu_device *adev;
>> >  	struct dc_link *link = NULL;
>> > -	static const u8 pre_computed_values[] = {
>> > -		50, 51, 52, 53, 55, 56, 57, 58, 59, 61, 62, 63, 65, 66, 68, 69,
>> > -		71, 72, 74, 75, 77, 79, 81, 82, 84, 86, 88, 90, 92, 94, 96, 98};
>> > +	struct drm_luminance_range_info *luminance_range;
>> >  	int i;
>> >
>> >  	if (!aconnector || !aconnector->dc_link) @@ -2933,8 +2930,6 @@
>> > static void update_connector_ext_caps(struct amdgpu_dm_connector
>> *aconnector)
>> >  	caps = &dm->backlight_caps[i];
>> >  	caps->ext_caps = &aconnector->dc_link->dpcd_sink_ext_caps;
>> >  	caps->aux_support = false;
>> > -	max_avg = conn_base->hdr_sink_metadata.hdmi_type1.max_fall;
>> > -	min_cll = conn_base->hdr_sink_metadata.hdmi_type1.min_cll;
>> >
>> >  	if (caps->ext_caps->bits.oled == 1 /*||
>> >  	    caps->ext_caps->bits.sdr_aux_backlight_control == 1 || @@
>> > -2946,31 +2941,9 @@ static void update_connector_ext_caps(struct
>> amdgpu_dm_connector *aconnector)
>> >  	else if (amdgpu_backlight == 1)
>> >  		caps->aux_support = true;
>> >
>> > -	/* From the specification (CTA-861-G), for calculating the maximum
>> > -	 * luminance we need to use:
>> > -	 *	Luminance = 50*2**(CV/32)
>> > -	 * Where CV is a one-byte value.
>> > -	 * For calculating this expression we may need float point precision;
>> > -	 * to avoid this complexity level, we take advantage that CV is divided
>> > -	 * by a constant. From the Euclids division algorithm, we know that
>> CV
>> > -	 * can be written as: CV = 32*q + r. Next, we replace CV in the
>> > -	 * Luminance expression and get 50*(2**q)*(2**(r/32)), hence we
>> just
>> > -	 * need to pre-compute the value of r/32. For pre-computing the
>> values
>> > -	 * We just used the following Ruby line:
>> > -	 *	(0...32).each {|cv| puts (50*2**(cv/32.0)).round}
>> > -	 * The results of the above expressions can be verified at
>> > -	 * pre_computed_values.
>> > -	 */
>> > -	q = max_avg >> 5;
>> > -	r = max_avg % 32;
>> > -	max = (1 << q) * pre_computed_values[r];
>> > -
>> > -	// min luminance: maxLum * (CV/255)^2 / 100
>> > -	q = DIV_ROUND_CLOSEST(min_cll, 255);
>> > -	min = max * DIV_ROUND_CLOSEST((q * q), 100);
>> > -
>> > -	caps->aux_max_input_signal = max;
>> > -	caps->aux_min_input_signal = min;
>> > +	luminance_range = &conn_base->display_info.luminance_range;
>> > +	caps->aux_min_input_signal = luminance_range->min_luminance;
>> > +	caps->aux_max_input_signal = luminance_range->max_luminance;
>> >  }
>> >
>> >  void amdgpu_dm_update_connector_after_detect(
>> 
>> --
>> Jani Nikula, Intel Open Source Graphics Center

-- 
Jani Nikula, Intel Open Source Graphics Center

Re: [Intel-gfx] [PATCH v3 2/3] drm/amdgpu_dm: Rely on split out luminance calculation function

[Jani Nikula]

On Thu, 11 Aug 2022, "Deucher, Alexander" <Alexander.Deucher@amd.com> wrote:
> [Public]
>
>> -----Original Message-----
>> From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Jani
>> Nikula
>> Sent: Thursday, August 4, 2022 5:55 AM
>> To: Jouni Högander <jouni.hogander@intel.com>; dri-
>> devel@lists.freedesktop.org; intel-gfx@lists.freedesktop.org; amd-
>> gfx@lists.freedesktop.org
>> Cc: Siqueira, Rodrigo <Rodrigo.Siqueira@amd.com>; Li, Roman
>> <Roman.Li@amd.com>; Manasi Navare <manasi.d.navare@intel.com>; Mika
>> Kahola <mika.kahola@intel.com>; Jouni Högander
>> <jouni.hogander@intel.com>; Wentland, Harry
>> <Harry.Wentland@amd.com>
>> Subject: Re: [PATCH v3 2/3] drm/amdgpu_dm: Rely on split out luminance
>> calculation function
>> 
>> On Tue, 19 Jul 2022, Jouni Högander <jouni.hogander@intel.com> wrote:
>> > Luminance range calculation was split out into drm_edid.c and is now
>> > part of edid parsing. Rely on values calculated during edid parsing
>> > and use these for caps->aux_max_input_signal and caps-
>> >aux_min_input_signal.
>> 
>> Harry, I'll merge patches 1 & 3 in this series through drm-misc-next, because I
>> think they're good to go, and fix stuff in i915.
>> 
>> Can I get your rb/ack to merge this patch as well, or do you want to take this
>> later via your tree?
>
> You can take this via drm-misc.
> Acked-by: Alex Deucher <alexander.deucher@amd.com>

Thanks, pushed the series to drm-misc-next.

BR,
Jani.

>
>
>> 
>> BR,
>> Jani.
>> 
>> 
>> >
>> > v2: Use values calculated during edid parsing
>> >
>> > Cc: Roman Li <roman.li@amd.com>
>> > Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
>> > Cc: Harry Wentland <harry.wentland@amd.com>
>> > Cc: Lyude Paul <lyude@redhat.com>
>> > Cc: Mika Kahola <mika.kahola@intel.com>
>> > Cc: Jani Nikula <jani.nikula@intel.com>
>> > Cc: Manasi Navare <manasi.d.navare@intel.com>
>> > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
>> > ---
>> >  .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 35
>> > +++----------------
>> >  1 file changed, 4 insertions(+), 31 deletions(-)
>> >
>> > diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
>> > b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
>> > index 3e83fed540e8..eb7abdeb8653 100644
>> > --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
>> > +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
>> > @@ -2903,15 +2903,12 @@ static struct drm_mode_config_helper_funcs
>> > amdgpu_dm_mode_config_helperfuncs = {
>> >
>> >  static void update_connector_ext_caps(struct amdgpu_dm_connector
>> > *aconnector)  {
>> > -	u32 max_avg, min_cll, max, min, q, r;
>> >  	struct amdgpu_dm_backlight_caps *caps;
>> >  	struct amdgpu_display_manager *dm;
>> >  	struct drm_connector *conn_base;
>> >  	struct amdgpu_device *adev;
>> >  	struct dc_link *link = NULL;
>> > -	static const u8 pre_computed_values[] = {
>> > -		50, 51, 52, 53, 55, 56, 57, 58, 59, 61, 62, 63, 65, 66, 68, 69,
>> > -		71, 72, 74, 75, 77, 79, 81, 82, 84, 86, 88, 90, 92, 94, 96, 98};
>> > +	struct drm_luminance_range_info *luminance_range;
>> >  	int i;
>> >
>> >  	if (!aconnector || !aconnector->dc_link) @@ -2933,8 +2930,6 @@
>> > static void update_connector_ext_caps(struct amdgpu_dm_connector
>> *aconnector)
>> >  	caps = &dm->backlight_caps[i];
>> >  	caps->ext_caps = &aconnector->dc_link->dpcd_sink_ext_caps;
>> >  	caps->aux_support = false;
>> > -	max_avg = conn_base->hdr_sink_metadata.hdmi_type1.max_fall;
>> > -	min_cll = conn_base->hdr_sink_metadata.hdmi_type1.min_cll;
>> >
>> >  	if (caps->ext_caps->bits.oled == 1 /*||
>> >  	    caps->ext_caps->bits.sdr_aux_backlight_control == 1 || @@
>> > -2946,31 +2941,9 @@ static void update_connector_ext_caps(struct
>> amdgpu_dm_connector *aconnector)
>> >  	else if (amdgpu_backlight == 1)
>> >  		caps->aux_support = true;
>> >
>> > -	/* From the specification (CTA-861-G), for calculating the maximum
>> > -	 * luminance we need to use:
>> > -	 *	Luminance = 50*2**(CV/32)
>> > -	 * Where CV is a one-byte value.
>> > -	 * For calculating this expression we may need float point precision;
>> > -	 * to avoid this complexity level, we take advantage that CV is divided
>> > -	 * by a constant. From the Euclids division algorithm, we know that
>> CV
>> > -	 * can be written as: CV = 32*q + r. Next, we replace CV in the
>> > -	 * Luminance expression and get 50*(2**q)*(2**(r/32)), hence we
>> just
>> > -	 * need to pre-compute the value of r/32. For pre-computing the
>> values
>> > -	 * We just used the following Ruby line:
>> > -	 *	(0...32).each {|cv| puts (50*2**(cv/32.0)).round}
>> > -	 * The results of the above expressions can be verified at
>> > -	 * pre_computed_values.
>> > -	 */
>> > -	q = max_avg >> 5;
>> > -	r = max_avg % 32;
>> > -	max = (1 << q) * pre_computed_values[r];
>> > -
>> > -	// min luminance: maxLum * (CV/255)^2 / 100
>> > -	q = DIV_ROUND_CLOSEST(min_cll, 255);
>> > -	min = max * DIV_ROUND_CLOSEST((q * q), 100);
>> > -
>> > -	caps->aux_max_input_signal = max;
>> > -	caps->aux_min_input_signal = min;
>> > +	luminance_range = &conn_base->display_info.luminance_range;
>> > +	caps->aux_min_input_signal = luminance_range->min_luminance;
>> > +	caps->aux_max_input_signal = luminance_range->max_luminance;
>> >  }
>> >
>> >  void amdgpu_dm_update_connector_after_detect(
>> 
>> --
>> Jani Nikula, Intel Open Source Graphics Center

-- 
Jani Nikula, Intel Open Source Graphics Center

RE: [PATCH v3 2/3] drm/amdgpu_dm: Rely on split out luminance calculation function

[Jani Nikula]

On Thu, 11 Aug 2022, "Deucher, Alexander" <Alexander.Deucher@amd.com> wrote:
> [Public]
>
>> -----Original Message-----
>> From: amd-gfx <amd-gfx-bounces@lists.freedesktop.org> On Behalf Of Jani
>> Nikula
>> Sent: Thursday, August 4, 2022 5:55 AM
>> To: Jouni Högander <jouni.hogander@intel.com>; dri-
>> devel@lists.freedesktop.org; intel-gfx@lists.freedesktop.org; amd-
>> gfx@lists.freedesktop.org
>> Cc: Siqueira, Rodrigo <Rodrigo.Siqueira@amd.com>; Li, Roman
>> <Roman.Li@amd.com>; Manasi Navare <manasi.d.navare@intel.com>; Mika
>> Kahola <mika.kahola@intel.com>; Jouni Högander
>> <jouni.hogander@intel.com>; Wentland, Harry
>> <Harry.Wentland@amd.com>
>> Subject: Re: [PATCH v3 2/3] drm/amdgpu_dm: Rely on split out luminance
>> calculation function
>> 
>> On Tue, 19 Jul 2022, Jouni Högander <jouni.hogander@intel.com> wrote:
>> > Luminance range calculation was split out into drm_edid.c and is now
>> > part of edid parsing. Rely on values calculated during edid parsing
>> > and use these for caps->aux_max_input_signal and caps-
>> >aux_min_input_signal.
>> 
>> Harry, I'll merge patches 1 & 3 in this series through drm-misc-next, because I
>> think they're good to go, and fix stuff in i915.
>> 
>> Can I get your rb/ack to merge this patch as well, or do you want to take this
>> later via your tree?
>
> You can take this via drm-misc.
> Acked-by: Alex Deucher <alexander.deucher@amd.com>

Thanks, pushed the series to drm-misc-next.

BR,
Jani.

>
>
>> 
>> BR,
>> Jani.
>> 
>> 
>> >
>> > v2: Use values calculated during edid parsing
>> >
>> > Cc: Roman Li <roman.li@amd.com>
>> > Cc: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
>> > Cc: Harry Wentland <harry.wentland@amd.com>
>> > Cc: Lyude Paul <lyude@redhat.com>
>> > Cc: Mika Kahola <mika.kahola@intel.com>
>> > Cc: Jani Nikula <jani.nikula@intel.com>
>> > Cc: Manasi Navare <manasi.d.navare@intel.com>
>> > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
>> > ---
>> >  .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 35
>> > +++----------------
>> >  1 file changed, 4 insertions(+), 31 deletions(-)
>> >
>> > diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
>> > b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
>> > index 3e83fed540e8..eb7abdeb8653 100644
>> > --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
>> > +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
>> > @@ -2903,15 +2903,12 @@ static struct drm_mode_config_helper_funcs
>> > amdgpu_dm_mode_config_helperfuncs = {
>> >
>> >  static void update_connector_ext_caps(struct amdgpu_dm_connector
>> > *aconnector)  {
>> > -	u32 max_avg, min_cll, max, min, q, r;
>> >  	struct amdgpu_dm_backlight_caps *caps;
>> >  	struct amdgpu_display_manager *dm;
>> >  	struct drm_connector *conn_base;
>> >  	struct amdgpu_device *adev;
>> >  	struct dc_link *link = NULL;
>> > -	static const u8 pre_computed_values[] = {
>> > -		50, 51, 52, 53, 55, 56, 57, 58, 59, 61, 62, 63, 65, 66, 68, 69,
>> > -		71, 72, 74, 75, 77, 79, 81, 82, 84, 86, 88, 90, 92, 94, 96, 98};
>> > +	struct drm_luminance_range_info *luminance_range;
>> >  	int i;
>> >
>> >  	if (!aconnector || !aconnector->dc_link) @@ -2933,8 +2930,6 @@
>> > static void update_connector_ext_caps(struct amdgpu_dm_connector
>> *aconnector)
>> >  	caps = &dm->backlight_caps[i];
>> >  	caps->ext_caps = &aconnector->dc_link->dpcd_sink_ext_caps;
>> >  	caps->aux_support = false;
>> > -	max_avg = conn_base->hdr_sink_metadata.hdmi_type1.max_fall;
>> > -	min_cll = conn_base->hdr_sink_metadata.hdmi_type1.min_cll;
>> >
>> >  	if (caps->ext_caps->bits.oled == 1 /*||
>> >  	    caps->ext_caps->bits.sdr_aux_backlight_control == 1 || @@
>> > -2946,31 +2941,9 @@ static void update_connector_ext_caps(struct
>> amdgpu_dm_connector *aconnector)
>> >  	else if (amdgpu_backlight == 1)
>> >  		caps->aux_support = true;
>> >
>> > -	/* From the specification (CTA-861-G), for calculating the maximum
>> > -	 * luminance we need to use:
>> > -	 *	Luminance = 50*2**(CV/32)
>> > -	 * Where CV is a one-byte value.
>> > -	 * For calculating this expression we may need float point precision;
>> > -	 * to avoid this complexity level, we take advantage that CV is divided
>> > -	 * by a constant. From the Euclids division algorithm, we know that
>> CV
>> > -	 * can be written as: CV = 32*q + r. Next, we replace CV in the
>> > -	 * Luminance expression and get 50*(2**q)*(2**(r/32)), hence we
>> just
>> > -	 * need to pre-compute the value of r/32. For pre-computing the
>> values
>> > -	 * We just used the following Ruby line:
>> > -	 *	(0...32).each {|cv| puts (50*2**(cv/32.0)).round}
>> > -	 * The results of the above expressions can be verified at
>> > -	 * pre_computed_values.
>> > -	 */
>> > -	q = max_avg >> 5;
>> > -	r = max_avg % 32;
>> > -	max = (1 << q) * pre_computed_values[r];
>> > -
>> > -	// min luminance: maxLum * (CV/255)^2 / 100
>> > -	q = DIV_ROUND_CLOSEST(min_cll, 255);
>> > -	min = max * DIV_ROUND_CLOSEST((q * q), 100);
>> > -
>> > -	caps->aux_max_input_signal = max;
>> > -	caps->aux_min_input_signal = min;
>> > +	luminance_range = &conn_base->display_info.luminance_range;
>> > +	caps->aux_min_input_signal = luminance_range->min_luminance;
>> > +	caps->aux_max_input_signal = luminance_range->max_luminance;
>> >  }
>> >
>> >  void amdgpu_dm_update_connector_after_detect(
>> 
>> --
>> Jani Nikula, Intel Open Source Graphics Center

-- 
Jani Nikula, Intel Open Source Graphics Center