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* [Intel-gfx] [PATCH] drm/i915/display: Don't disable DDI/Transcoder when setting phy test pattern
@ 2022-09-16  6:37 Khaled Almahallawy
  2022-09-16  8:07 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
                   ` (3 more replies)
  0 siblings, 4 replies; 9+ messages in thread
From: Khaled Almahallawy @ 2022-09-16  6:37 UTC (permalink / raw)
  To: intel-gfx; +Cc: Or Cochvi

Spec:50482 updated recently to remove the restriction to disable
DDI/Transcoder before setting PHY test pattern. This update is to
address PHY compliance test failures observed on a port with LTTPR.
The issue is that when Transc. is disabled, the main link signals fed
to LTTPR will be dropped invalidating link training, which will affect
the quality of the phy test pattern when the transcoder is enabled again.

This specs change also exists in Windows driver since very long time
and proved to work in legacy linux phy compliance solution since Gen9.

Cc: Imre Deak <imre.deak@intel.com>
Cc: Clint Taylor <clinton.a.taylor@intel.com>
Cc: Or Cochvi <or.cochvi@intel.com>
Tested-by: Khaled Almahallawy <khaled.almahallawy@intel.com>
Signed-off-by: Khaled Almahallawy <khaled.almahallawy@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 59 -------------------------
 1 file changed, 59 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index c9be61d2348e..2bf323f3f155 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -3675,61 +3675,6 @@ static void intel_dp_phy_pattern_update(struct intel_dp *intel_dp,
 	}
 }
 
-static void
-intel_dp_autotest_phy_ddi_disable(struct intel_dp *intel_dp,
-				  const struct intel_crtc_state *crtc_state)
-{
-	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
-	struct drm_device *dev = dig_port->base.base.dev;
-	struct drm_i915_private *dev_priv = to_i915(dev);
-	struct intel_crtc *crtc = to_intel_crtc(dig_port->base.base.crtc);
-	enum pipe pipe = crtc->pipe;
-	u32 trans_ddi_func_ctl_value, trans_conf_value, dp_tp_ctl_value;
-
-	trans_ddi_func_ctl_value = intel_de_read(dev_priv,
-						 TRANS_DDI_FUNC_CTL(pipe));
-	trans_conf_value = intel_de_read(dev_priv, PIPECONF(pipe));
-	dp_tp_ctl_value = intel_de_read(dev_priv, TGL_DP_TP_CTL(pipe));
-
-	trans_ddi_func_ctl_value &= ~(TRANS_DDI_FUNC_ENABLE |
-				      TGL_TRANS_DDI_PORT_MASK);
-	trans_conf_value &= ~PIPECONF_ENABLE;
-	dp_tp_ctl_value &= ~DP_TP_CTL_ENABLE;
-
-	intel_de_write(dev_priv, PIPECONF(pipe), trans_conf_value);
-	intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(pipe),
-		       trans_ddi_func_ctl_value);
-	intel_de_write(dev_priv, TGL_DP_TP_CTL(pipe), dp_tp_ctl_value);
-}
-
-static void
-intel_dp_autotest_phy_ddi_enable(struct intel_dp *intel_dp,
-				 const struct intel_crtc_state *crtc_state)
-{
-	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
-	struct drm_device *dev = dig_port->base.base.dev;
-	struct drm_i915_private *dev_priv = to_i915(dev);
-	enum port port = dig_port->base.port;
-	struct intel_crtc *crtc = to_intel_crtc(dig_port->base.base.crtc);
-	enum pipe pipe = crtc->pipe;
-	u32 trans_ddi_func_ctl_value, trans_conf_value, dp_tp_ctl_value;
-
-	trans_ddi_func_ctl_value = intel_de_read(dev_priv,
-						 TRANS_DDI_FUNC_CTL(pipe));
-	trans_conf_value = intel_de_read(dev_priv, PIPECONF(pipe));
-	dp_tp_ctl_value = intel_de_read(dev_priv, TGL_DP_TP_CTL(pipe));
-
-	trans_ddi_func_ctl_value |= TRANS_DDI_FUNC_ENABLE |
-				    TGL_TRANS_DDI_SELECT_PORT(port);
-	trans_conf_value |= PIPECONF_ENABLE;
-	dp_tp_ctl_value |= DP_TP_CTL_ENABLE;
-
-	intel_de_write(dev_priv, PIPECONF(pipe), trans_conf_value);
-	intel_de_write(dev_priv, TGL_DP_TP_CTL(pipe), dp_tp_ctl_value);
-	intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(pipe),
-		       trans_ddi_func_ctl_value);
-}
-
 static void intel_dp_process_phy_request(struct intel_dp *intel_dp,
 					 const struct intel_crtc_state *crtc_state)
 {
@@ -3748,14 +3693,10 @@ static void intel_dp_process_phy_request(struct intel_dp *intel_dp,
 	intel_dp_get_adjust_train(intel_dp, crtc_state, DP_PHY_DPRX,
 				  link_status);
 
-	intel_dp_autotest_phy_ddi_disable(intel_dp, crtc_state);
-
 	intel_dp_set_signal_levels(intel_dp, crtc_state, DP_PHY_DPRX);
 
 	intel_dp_phy_pattern_update(intel_dp, crtc_state);
 
-	intel_dp_autotest_phy_ddi_enable(intel_dp, crtc_state);
-
 	drm_dp_dpcd_write(&intel_dp->aux, DP_TRAINING_LANE0_SET,
 			  intel_dp->train_set, crtc_state->lane_count);
 
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 9+ messages in thread

* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/display: Don't disable DDI/Transcoder when setting phy test pattern
  2022-09-16  6:37 [Intel-gfx] [PATCH] drm/i915/display: Don't disable DDI/Transcoder when setting phy test pattern Khaled Almahallawy
@ 2022-09-16  8:07 ` Patchwork
  2022-09-16 11:35 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
                   ` (2 subsequent siblings)
  3 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2022-09-16  8:07 UTC (permalink / raw)
  To: Khaled Almahallawy; +Cc: intel-gfx

[-- Attachment #1: Type: text/plain, Size: 8721 bytes --]

== Series Details ==

Series: drm/i915/display: Don't disable DDI/Transcoder when setting phy test pattern
URL   : https://patchwork.freedesktop.org/series/108636/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_12144 -> Patchwork_108636v1
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/index.html

Participating hosts (35 -> 39)
------------------------------

  Additional (7): fi-bxt-dsi bat-dg2-8 bat-adlm-1 bat-dg2-9 bat-adlp-6 bat-adln-1 bat-rpls-1 
  Missing    (3): fi-ctg-p8600 fi-rkl-11600 fi-hsw-4200u 

Known issues
------------

  Here are the changes found in Patchwork_108636v1 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_huc_copy@huc-copy:
    - fi-bxt-dsi:         NOTRUN -> [SKIP][1] ([fdo#109271] / [i915#2190])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/fi-bxt-dsi/igt@gem_huc_copy@huc-copy.html

  * igt@gem_lmem_swapping@random-engines:
    - fi-icl-u2:          NOTRUN -> [SKIP][2] ([i915#4613]) +3 similar issues
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/fi-icl-u2/igt@gem_lmem_swapping@random-engines.html

  * igt@gem_lmem_swapping@verify-random:
    - fi-bxt-dsi:         NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#4613]) +3 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/fi-bxt-dsi/igt@gem_lmem_swapping@verify-random.html

  * igt@gem_tiled_blits@basic:
    - fi-bxt-dsi:         NOTRUN -> [SKIP][4] ([fdo#109271]) +12 similar issues
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/fi-bxt-dsi/igt@gem_tiled_blits@basic.html

  * igt@i915_selftest@live@requests:
    - fi-pnv-d510:        [PASS][5] -> [DMESG-FAIL][6] ([i915#4528])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12144/fi-pnv-d510/igt@i915_selftest@live@requests.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/fi-pnv-d510/igt@i915_selftest@live@requests.html

  * igt@kms_chamelium@common-hpd-after-suspend:
    - fi-ivb-3770:        NOTRUN -> [SKIP][7] ([fdo#109271] / [fdo#111827])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/fi-ivb-3770/igt@kms_chamelium@common-hpd-after-suspend.html
    - fi-bdw-5557u:       NOTRUN -> [SKIP][8] ([fdo#109271] / [fdo#111827])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/fi-bdw-5557u/igt@kms_chamelium@common-hpd-after-suspend.html
    - fi-snb-2600:        NOTRUN -> [SKIP][9] ([fdo#109271] / [fdo#111827])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/fi-snb-2600/igt@kms_chamelium@common-hpd-after-suspend.html
    - fi-icl-u2:          NOTRUN -> [SKIP][10] ([fdo#111827])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/fi-icl-u2/igt@kms_chamelium@common-hpd-after-suspend.html

  * igt@kms_chamelium@hdmi-edid-read:
    - fi-bxt-dsi:         NOTRUN -> [SKIP][11] ([fdo#109271] / [fdo#111827]) +8 similar issues
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/fi-bxt-dsi/igt@kms_chamelium@hdmi-edid-read.html

  * igt@kms_psr@cursor_plane_move:
    - fi-tgl-u2:          [PASS][12] -> [SKIP][13] ([i915#668]) +3 similar issues
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12144/fi-tgl-u2/igt@kms_psr@cursor_plane_move.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/fi-tgl-u2/igt@kms_psr@cursor_plane_move.html

  * igt@prime_vgem@basic-userptr:
    - fi-icl-u2:          NOTRUN -> [SKIP][14] ([fdo#109295] / [i915#3301])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/fi-icl-u2/igt@prime_vgem@basic-userptr.html

  
#### Possible fixes ####

  * igt@fbdev@read:
    - {fi-tgl-mst}:       [SKIP][15] ([i915#2582]) -> [PASS][16] +2 similar issues
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12144/fi-tgl-mst/igt@fbdev@read.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/fi-tgl-mst/igt@fbdev@read.html

  * igt@i915_pm_rpm@basic-rte:
    - fi-icl-u2:          [INCOMPLETE][17] ([i915#4185] / [i915#4890]) -> [PASS][18]
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12144/fi-icl-u2/igt@i915_pm_rpm@basic-rte.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/fi-icl-u2/igt@i915_pm_rpm@basic-rte.html

  * igt@i915_selftest@live@hangcheck:
    - fi-ivb-3770:        [INCOMPLETE][19] ([i915#3303] / [i915#5370]) -> [PASS][20]
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12144/fi-ivb-3770/igt@i915_selftest@live@hangcheck.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/fi-ivb-3770/igt@i915_selftest@live@hangcheck.html
    - fi-snb-2600:        [INCOMPLETE][21] ([i915#3921]) -> [PASS][22]
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12144/fi-snb-2600/igt@i915_selftest@live@hangcheck.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/fi-snb-2600/igt@i915_selftest@live@hangcheck.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
  [i915#1155]: https://gitlab.freedesktop.org/drm/intel/issues/1155
  [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
  [i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
  [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
  [i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
  [i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
  [i915#3303]: https://gitlab.freedesktop.org/drm/intel/issues/3303
  [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
  [i915#3595]: https://gitlab.freedesktop.org/drm/intel/issues/3595
  [i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
  [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
  [i915#3921]: https://gitlab.freedesktop.org/drm/intel/issues/3921
  [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
  [i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
  [i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
  [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
  [i915#4185]: https://gitlab.freedesktop.org/drm/intel/issues/4185
  [i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
  [i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
  [i915#4215]: https://gitlab.freedesktop.org/drm/intel/issues/4215
  [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
  [i915#4528]: https://gitlab.freedesktop.org/drm/intel/issues/4528
  [i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#4873]: https://gitlab.freedesktop.org/drm/intel/issues/4873
  [i915#4890]: https://gitlab.freedesktop.org/drm/intel/issues/4890
  [i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190
  [i915#5274]: https://gitlab.freedesktop.org/drm/intel/issues/5274
  [i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
  [i915#5370]: https://gitlab.freedesktop.org/drm/intel/issues/5370
  [i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
  [i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
  [i915#6641]: https://gitlab.freedesktop.org/drm/intel/issues/6641
  [i915#6645]: https://gitlab.freedesktop.org/drm/intel/issues/6645
  [i915#668]: https://gitlab.freedesktop.org/drm/intel/issues/668


Build changes
-------------

  * Linux: CI_DRM_12144 -> Patchwork_108636v1

  CI-20190529: 20190529
  CI_DRM_12144: 55937d402fd885fe101cdd028dcc48df6d7f6b35 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_6656: 24100c4e181c50e3678aeca9c641b8a43555ad73 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_108636v1: 55937d402fd885fe101cdd028dcc48df6d7f6b35 @ git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

87f81e8de821 drm/i915/display: Don't disable DDI/Transcoder when setting phy test pattern

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/index.html

[-- Attachment #2: Type: text/html, Size: 8513 bytes --]

^ permalink raw reply	[flat|nested] 9+ messages in thread

* [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/display: Don't disable DDI/Transcoder when setting phy test pattern
  2022-09-16  6:37 [Intel-gfx] [PATCH] drm/i915/display: Don't disable DDI/Transcoder when setting phy test pattern Khaled Almahallawy
  2022-09-16  8:07 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
@ 2022-09-16 11:35 ` Patchwork
  2022-09-16 21:25 ` [Intel-gfx] [PATCH v2] " Khaled Almahallawy
  2022-09-16 23:06 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/display: Don't disable DDI/Transcoder when setting phy test pattern (rev3) Patchwork
  3 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2022-09-16 11:35 UTC (permalink / raw)
  To: Khaled Almahallawy; +Cc: intel-gfx

[-- Attachment #1: Type: text/plain, Size: 21636 bytes --]

== Series Details ==

Series: drm/i915/display: Don't disable DDI/Transcoder when setting phy test pattern
URL   : https://patchwork.freedesktop.org/series/108636/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_12144_full -> Patchwork_108636v1_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (11 -> 11)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in Patchwork_108636v1_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_balancer@parallel-bb-first:
    - shard-iclb:         [PASS][1] -> [SKIP][2] ([i915#4525])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12144/shard-iclb4/igt@gem_exec_balancer@parallel-bb-first.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/shard-iclb8/igt@gem_exec_balancer@parallel-bb-first.html

  * igt@gem_exec_fair@basic-deadline:
    - shard-glk:          [PASS][3] -> [FAIL][4] ([i915#2846])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12144/shard-glk7/igt@gem_exec_fair@basic-deadline.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/shard-glk7/igt@gem_exec_fair@basic-deadline.html

  * igt@gem_exec_fair@basic-none-solo@rcs0:
    - shard-apl:          [PASS][5] -> [FAIL][6] ([i915#2842]) +1 similar issue
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12144/shard-apl6/igt@gem_exec_fair@basic-none-solo@rcs0.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/shard-apl3/igt@gem_exec_fair@basic-none-solo@rcs0.html

  * igt@gem_lmem_swapping@verify-random:
    - shard-apl:          NOTRUN -> [SKIP][7] ([fdo#109271] / [i915#4613])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/shard-apl7/igt@gem_lmem_swapping@verify-random.html

  * igt@gem_pxp@reject-modify-context-protection-off-3:
    - shard-apl:          NOTRUN -> [SKIP][8] ([fdo#109271]) +33 similar issues
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/shard-apl7/igt@gem_pxp@reject-modify-context-protection-off-3.html

  * igt@kms_ccs@pipe-b-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs:
    - shard-apl:          NOTRUN -> [SKIP][9] ([fdo#109271] / [i915#3886]) +2 similar issues
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/shard-apl7/igt@kms_ccs@pipe-b-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs.html

  * igt@kms_chamelium@dp-hpd-with-enabled-mode:
    - shard-apl:          NOTRUN -> [SKIP][10] ([fdo#109271] / [fdo#111827])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/shard-apl7/igt@kms_chamelium@dp-hpd-with-enabled-mode.html

  * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy:
    - shard-glk:          [PASS][11] -> [FAIL][12] ([i915#72])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12144/shard-glk2/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/shard-glk6/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html

  * igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions-varying-size:
    - shard-iclb:         [PASS][13] -> [FAIL][14] ([i915#2346]) +1 similar issue
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12144/shard-iclb8/igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions-varying-size.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/shard-iclb7/igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions-varying-size.html

  * igt@kms_fbcon_fbt@fbc-suspend:
    - shard-apl:          [PASS][15] -> [FAIL][16] ([i915#4767])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12144/shard-apl4/igt@kms_fbcon_fbt@fbc-suspend.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/shard-apl1/igt@kms_fbcon_fbt@fbc-suspend.html

  * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-hdmi-a1-hdmi-a2:
    - shard-glk:          [PASS][17] -> [FAIL][18] ([i915#2122])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12144/shard-glk9/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-hdmi-a1-hdmi-a2.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/shard-glk7/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-hdmi-a1-hdmi-a2.html

  * igt@kms_flip@2x-flip-vs-expired-vblank@bc-hdmi-a1-hdmi-a2:
    - shard-glk:          [PASS][19] -> [FAIL][20] ([i915#79])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12144/shard-glk6/igt@kms_flip@2x-flip-vs-expired-vblank@bc-hdmi-a1-hdmi-a2.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/shard-glk2/igt@kms_flip@2x-flip-vs-expired-vblank@bc-hdmi-a1-hdmi-a2.html

  * igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling@pipe-a-valid-mode:
    - shard-iclb:         NOTRUN -> [SKIP][21] ([i915#2587] / [i915#2672]) +6 similar issues
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/shard-iclb6/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling@pipe-a-default-mode:
    - shard-iclb:         NOTRUN -> [SKIP][22] ([i915#6375])
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/shard-iclb2/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling@pipe-a-default-mode.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling@pipe-a-default-mode:
    - shard-iclb:         NOTRUN -> [SKIP][23] ([i915#3555])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/shard-iclb2/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling@pipe-a-default-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-upscaling@pipe-a-default-mode:
    - shard-iclb:         NOTRUN -> [SKIP][24] ([i915#2672]) +5 similar issues
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/shard-iclb2/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-upscaling@pipe-a-default-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling@pipe-a-default-mode:
    - shard-iclb:         NOTRUN -> [SKIP][25] ([i915#2672] / [i915#3555])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/shard-iclb3/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling@pipe-a-default-mode.html

  * igt@kms_plane_lowres@tiling-y@pipe-a-hdmi-a-2:
    - shard-glk:          [PASS][26] -> [DMESG-WARN][27] ([i915#118] / [i915#1888])
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12144/shard-glk3/igt@kms_plane_lowres@tiling-y@pipe-a-hdmi-a-2.html
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/shard-glk1/igt@kms_plane_lowres@tiling-y@pipe-a-hdmi-a-2.html

  * igt@kms_plane_scaling@plane-downscale-with-pixel-format-factor-0-5@pipe-b-edp-1:
    - shard-iclb:         [PASS][28] -> [SKIP][29] ([i915#5176]) +2 similar issues
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12144/shard-iclb4/igt@kms_plane_scaling@plane-downscale-with-pixel-format-factor-0-5@pipe-b-edp-1.html
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/shard-iclb2/igt@kms_plane_scaling@plane-downscale-with-pixel-format-factor-0-5@pipe-b-edp-1.html

  * igt@kms_psr2_su@frontbuffer-xrgb8888:
    - shard-apl:          NOTRUN -> [SKIP][30] ([fdo#109271] / [i915#658])
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/shard-apl7/igt@kms_psr2_su@frontbuffer-xrgb8888.html

  * igt@kms_psr@psr2_basic:
    - shard-iclb:         [PASS][31] -> [SKIP][32] ([fdo#109441]) +2 similar issues
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12144/shard-iclb2/igt@kms_psr@psr2_basic.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/shard-iclb8/igt@kms_psr@psr2_basic.html

  * igt@kms_vblank@pipe-b-ts-continuation-suspend:
    - shard-apl:          [PASS][33] -> [DMESG-WARN][34] ([i915#180]) +2 similar issues
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12144/shard-apl7/igt@kms_vblank@pipe-b-ts-continuation-suspend.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/shard-apl7/igt@kms_vblank@pipe-b-ts-continuation-suspend.html

  * igt@nouveau_crc@pipe-b-ctx-flip-detection:
    - shard-glk:          NOTRUN -> [SKIP][35] ([fdo#109271]) +1 similar issue
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/shard-glk9/igt@nouveau_crc@pipe-b-ctx-flip-detection.html

  
#### Possible fixes ####

  * igt@feature_discovery@psr2:
    - shard-iclb:         [SKIP][36] ([i915#658]) -> [PASS][37]
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12144/shard-iclb4/igt@feature_discovery@psr2.html
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/shard-iclb2/igt@feature_discovery@psr2.html

  * igt@gem_busy@close-race:
    - shard-glk:          [TIMEOUT][38] ([i915#6016]) -> [PASS][39]
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12144/shard-glk2/igt@gem_busy@close-race.html
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/shard-glk9/igt@gem_busy@close-race.html

  * igt@gem_exec_balancer@parallel-contexts:
    - shard-iclb:         [SKIP][40] ([i915#4525]) -> [PASS][41] +1 similar issue
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12144/shard-iclb6/igt@gem_exec_balancer@parallel-contexts.html
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/shard-iclb4/igt@gem_exec_balancer@parallel-contexts.html

  * igt@gem_exec_fair@basic-none-share@rcs0:
    - shard-tglb:         [FAIL][42] ([i915#2842]) -> [PASS][43]
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12144/shard-tglb1/igt@gem_exec_fair@basic-none-share@rcs0.html
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/shard-tglb6/igt@gem_exec_fair@basic-none-share@rcs0.html

  * igt@gem_exec_schedule@wide@rcs0:
    - {shard-tglu}:       [INCOMPLETE][44] ([i915#6772]) -> [PASS][45]
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12144/shard-tglu-1/igt@gem_exec_schedule@wide@rcs0.html
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/shard-tglu-3/igt@gem_exec_schedule@wide@rcs0.html

  * igt@i915_pm_dc@dc6-dpms:
    - {shard-rkl}:        [SKIP][46] ([i915#3361]) -> [PASS][47]
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12144/shard-rkl-5/igt@i915_pm_dc@dc6-dpms.html
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/shard-rkl-1/igt@i915_pm_dc@dc6-dpms.html

  * igt@i915_pm_dc@dc9-dpms:
    - shard-iclb:         [SKIP][48] ([i915#4281]) -> [PASS][49]
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12144/shard-iclb3/igt@i915_pm_dc@dc9-dpms.html
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/shard-iclb1/igt@i915_pm_dc@dc9-dpms.html

  * igt@kms_flip@flip-vs-suspend-interruptible@b-dp1:
    - shard-apl:          [DMESG-WARN][50] ([i915#180]) -> [PASS][51]
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12144/shard-apl8/igt@kms_flip@flip-vs-suspend-interruptible@b-dp1.html
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/shard-apl7/igt@kms_flip@flip-vs-suspend-interruptible@b-dp1.html

  * igt@kms_plane_lowres@tiling-y@pipe-c-hdmi-a-2:
    - shard-glk:          [FAIL][52] ([i915#1036] / [i915#1888]) -> [PASS][53]
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12144/shard-glk3/igt@kms_plane_lowres@tiling-y@pipe-c-hdmi-a-2.html
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/shard-glk1/igt@kms_plane_lowres@tiling-y@pipe-c-hdmi-a-2.html

  * igt@kms_psr@psr2_cursor_blt:
    - shard-iclb:         [SKIP][54] ([fdo#109441]) -> [PASS][55] +3 similar issues
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12144/shard-iclb4/igt@kms_psr@psr2_cursor_blt.html
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/shard-iclb2/igt@kms_psr@psr2_cursor_blt.html

  * igt@perf@gen12-unprivileged-single-ctx-counters:
    - {shard-rkl}:        [SKIP][56] ([fdo#109289]) -> [PASS][57]
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12144/shard-rkl-5/igt@perf@gen12-unprivileged-single-ctx-counters.html
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/shard-rkl-1/igt@perf@gen12-unprivileged-single-ctx-counters.html

  * igt@perf@polling-parameterized:
    - shard-apl:          [FAIL][58] ([i915#5639]) -> [PASS][59]
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12144/shard-apl6/igt@perf@polling-parameterized.html
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/shard-apl8/igt@perf@polling-parameterized.html

  
#### Warnings ####

  * igt@gem_exec_balancer@parallel-ordering:
    - shard-iclb:         [FAIL][60] ([i915#6117]) -> [SKIP][61] ([i915#4525])
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12144/shard-iclb4/igt@gem_exec_balancer@parallel-ordering.html
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/shard-iclb3/igt@gem_exec_balancer@parallel-ordering.html

  * igt@gem_exec_fair@basic-pace@bcs0:
    - shard-tglb:         [FAIL][62] ([i915#2876]) -> [FAIL][63] ([i915#2842])
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12144/shard-tglb6/igt@gem_exec_fair@basic-pace@bcs0.html
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/shard-tglb7/igt@gem_exec_fair@basic-pace@bcs0.html

  * igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-sf:
    - shard-iclb:         [SKIP][64] ([i915#658]) -> [SKIP][65] ([i915#2920]) +1 similar issue
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12144/shard-iclb1/igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-sf.html
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/shard-iclb2/igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-sf.html

  * igt@kms_psr2_sf@overlay-plane-update-continuous-sf:
    - shard-iclb:         [SKIP][66] ([i915#2920]) -> [SKIP][67] ([fdo#111068] / [i915#658])
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12144/shard-iclb2/igt@kms_psr2_sf@overlay-plane-update-continuous-sf.html
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/shard-iclb6/igt@kms_psr2_sf@overlay-plane-update-continuous-sf.html

  * igt@kms_psr2_sf@primary-plane-update-sf-dmg-area:
    - shard-iclb:         [SKIP][68] ([fdo#111068] / [i915#658]) -> [SKIP][69] ([i915#2920]) +1 similar issue
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12144/shard-iclb7/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area.html
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/shard-iclb2/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area.html

  * igt@runner@aborted:
    - shard-apl:          ([FAIL][70], [FAIL][71], [FAIL][72], [FAIL][73]) ([i915#180] / [i915#3002] / [i915#4312] / [i915#5257] / [i915#6599]) -> ([FAIL][74], [FAIL][75], [FAIL][76], [FAIL][77], [FAIL][78]) ([fdo#109271] / [i915#180] / [i915#3002] / [i915#4312] / [i915#5257] / [i915#6599])
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12144/shard-apl6/igt@runner@aborted.html
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12144/shard-apl1/igt@runner@aborted.html
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12144/shard-apl3/igt@runner@aborted.html
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12144/shard-apl8/igt@runner@aborted.html
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/shard-apl2/igt@runner@aborted.html
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/shard-apl8/igt@runner@aborted.html
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/shard-apl3/igt@runner@aborted.html
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/shard-apl3/igt@runner@aborted.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/shard-apl7/igt@runner@aborted.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
  [fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
  [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
  [fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291
  [fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506
  [fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
  [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
  [fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
  [fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
  [fdo#111656]: https://bugs.freedesktop.org/show_bug.cgi?id=111656
  [fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1036]: https://gitlab.freedesktop.org/drm/intel/issues/1036
  [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
  [i915#118]: https://gitlab.freedesktop.org/drm/intel/issues/118
  [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
  [i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839
  [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
  [i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
  [i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888
  [i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122
  [i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
  [i915#2436]: https://gitlab.freedesktop.org/drm/intel/issues/2436
  [i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
  [i915#2530]: https://gitlab.freedesktop.org/drm/intel/issues/2530
  [i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
  [i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
  [i915#2681]: https://gitlab.freedesktop.org/drm/intel/issues/2681
  [i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705
  [i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
  [i915#2846]: https://gitlab.freedesktop.org/drm/intel/issues/2846
  [i915#2876]: https://gitlab.freedesktop.org/drm/intel/issues/2876
  [i915#2920]: https://gitlab.freedesktop.org/drm/intel/issues/2920
  [i915#2994]: https://gitlab.freedesktop.org/drm/intel/issues/2994
  [i915#3002]: https://gitlab.freedesktop.org/drm/intel/issues/3002
  [i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
  [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
  [i915#3361]: https://gitlab.freedesktop.org/drm/intel/issues/3361
  [i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
  [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
  [i915#3558]: https://gitlab.freedesktop.org/drm/intel/issues/3558
  [i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
  [i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
  [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
  [i915#3742]: https://gitlab.freedesktop.org/drm/intel/issues/3742
  [i915#3826]: https://gitlab.freedesktop.org/drm/intel/issues/3826
  [i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
  [i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
  [i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
  [i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
  [i915#4281]: https://gitlab.freedesktop.org/drm/intel/issues/4281
  [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
  [i915#4525]: https://gitlab.freedesktop.org/drm/intel/issues/4525
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#4767]: https://gitlab.freedesktop.org/drm/intel/issues/4767
  [i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
  [i915#5257]: https://gitlab.freedesktop.org/drm/intel/issues/5257
  [i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
  [i915#5639]: https://gitlab.freedesktop.org/drm/intel/issues/5639
  [i915#6016]: https://gitlab.freedesktop.org/drm/intel/issues/6016
  [i915#6117]: https://gitlab.freedesktop.org/drm/intel/issues/6117
  [i915#6268]: https://gitlab.freedesktop.org/drm/intel/issues/6268
  [i915#6375]: https://gitlab.freedesktop.org/drm/intel/issues/6375
  [i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
  [i915#6599]: https://gitlab.freedesktop.org/drm/intel/issues/6599
  [i915#6772]: https://gitlab.freedesktop.org/drm/intel/issues/6772
  [i915#72]: https://gitlab.freedesktop.org/drm/intel/issues/72
  [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79


Build changes
-------------

  * Linux: CI_DRM_12144 -> Patchwork_108636v1

  CI-20190529: 20190529
  CI_DRM_12144: 55937d402fd885fe101cdd028dcc48df6d7f6b35 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_6656: 24100c4e181c50e3678aeca9c641b8a43555ad73 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_108636v1: 55937d402fd885fe101cdd028dcc48df6d7f6b35 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108636v1/index.html

[-- Attachment #2: Type: text/html, Size: 23149 bytes --]

^ permalink raw reply	[flat|nested] 9+ messages in thread

* [Intel-gfx] [PATCH v2] drm/i915/display: Don't disable DDI/Transcoder when setting phy test pattern
  2022-09-16  6:37 [Intel-gfx] [PATCH] drm/i915/display: Don't disable DDI/Transcoder when setting phy test pattern Khaled Almahallawy
  2022-09-16  8:07 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
  2022-09-16 11:35 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
@ 2022-09-16 21:25 ` Khaled Almahallawy
  2022-09-16 21:29   ` Taylor, Clinton A
  2022-09-26 16:48   ` Jani Nikula
  2022-09-16 23:06 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/display: Don't disable DDI/Transcoder when setting phy test pattern (rev3) Patchwork
  3 siblings, 2 replies; 9+ messages in thread
From: Khaled Almahallawy @ 2022-09-16 21:25 UTC (permalink / raw)
  To: intel-gfx

Bspecs has updated recently to remove the restriction to disable
DDI/Transcoder before setting PHY test pattern. This update is to
address PHY compliance test failures observed on a port with LTTPR.
The issue is that when Transc. is disabled, the main link signals fed
to LTTPR will be dropped invalidating link training, which will affect
the quality of the phy test pattern when the transcoder is enabled again.

v2: Update commit message (Clint)

Bspec: 50482
Cc: Imre Deak <imre.deak@intel.com>
Cc: Clint Taylor <clinton.a.taylor@intel.com>
Cc: Or Cochvi <or.cochvi@intel.com>
Tested-by: Khaled Almahallawy <khaled.almahallawy@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 59 -------------------------
 1 file changed, 59 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index c9be61d2348e..2bf323f3f155 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -3675,61 +3675,6 @@ static void intel_dp_phy_pattern_update(struct intel_dp *intel_dp,
 	}
 }
 
-static void
-intel_dp_autotest_phy_ddi_disable(struct intel_dp *intel_dp,
-				  const struct intel_crtc_state *crtc_state)
-{
-	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
-	struct drm_device *dev = dig_port->base.base.dev;
-	struct drm_i915_private *dev_priv = to_i915(dev);
-	struct intel_crtc *crtc = to_intel_crtc(dig_port->base.base.crtc);
-	enum pipe pipe = crtc->pipe;
-	u32 trans_ddi_func_ctl_value, trans_conf_value, dp_tp_ctl_value;
-
-	trans_ddi_func_ctl_value = intel_de_read(dev_priv,
-						 TRANS_DDI_FUNC_CTL(pipe));
-	trans_conf_value = intel_de_read(dev_priv, PIPECONF(pipe));
-	dp_tp_ctl_value = intel_de_read(dev_priv, TGL_DP_TP_CTL(pipe));
-
-	trans_ddi_func_ctl_value &= ~(TRANS_DDI_FUNC_ENABLE |
-				      TGL_TRANS_DDI_PORT_MASK);
-	trans_conf_value &= ~PIPECONF_ENABLE;
-	dp_tp_ctl_value &= ~DP_TP_CTL_ENABLE;
-
-	intel_de_write(dev_priv, PIPECONF(pipe), trans_conf_value);
-	intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(pipe),
-		       trans_ddi_func_ctl_value);
-	intel_de_write(dev_priv, TGL_DP_TP_CTL(pipe), dp_tp_ctl_value);
-}
-
-static void
-intel_dp_autotest_phy_ddi_enable(struct intel_dp *intel_dp,
-				 const struct intel_crtc_state *crtc_state)
-{
-	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
-	struct drm_device *dev = dig_port->base.base.dev;
-	struct drm_i915_private *dev_priv = to_i915(dev);
-	enum port port = dig_port->base.port;
-	struct intel_crtc *crtc = to_intel_crtc(dig_port->base.base.crtc);
-	enum pipe pipe = crtc->pipe;
-	u32 trans_ddi_func_ctl_value, trans_conf_value, dp_tp_ctl_value;
-
-	trans_ddi_func_ctl_value = intel_de_read(dev_priv,
-						 TRANS_DDI_FUNC_CTL(pipe));
-	trans_conf_value = intel_de_read(dev_priv, PIPECONF(pipe));
-	dp_tp_ctl_value = intel_de_read(dev_priv, TGL_DP_TP_CTL(pipe));
-
-	trans_ddi_func_ctl_value |= TRANS_DDI_FUNC_ENABLE |
-				    TGL_TRANS_DDI_SELECT_PORT(port);
-	trans_conf_value |= PIPECONF_ENABLE;
-	dp_tp_ctl_value |= DP_TP_CTL_ENABLE;
-
-	intel_de_write(dev_priv, PIPECONF(pipe), trans_conf_value);
-	intel_de_write(dev_priv, TGL_DP_TP_CTL(pipe), dp_tp_ctl_value);
-	intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(pipe),
-		       trans_ddi_func_ctl_value);
-}
-
 static void intel_dp_process_phy_request(struct intel_dp *intel_dp,
 					 const struct intel_crtc_state *crtc_state)
 {
@@ -3748,14 +3693,10 @@ static void intel_dp_process_phy_request(struct intel_dp *intel_dp,
 	intel_dp_get_adjust_train(intel_dp, crtc_state, DP_PHY_DPRX,
 				  link_status);
 
-	intel_dp_autotest_phy_ddi_disable(intel_dp, crtc_state);
-
 	intel_dp_set_signal_levels(intel_dp, crtc_state, DP_PHY_DPRX);
 
 	intel_dp_phy_pattern_update(intel_dp, crtc_state);
 
-	intel_dp_autotest_phy_ddi_enable(intel_dp, crtc_state);
-
 	drm_dp_dpcd_write(&intel_dp->aux, DP_TRAINING_LANE0_SET,
 			  intel_dp->train_set, crtc_state->lane_count);
 
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 9+ messages in thread

* Re: [Intel-gfx] [PATCH v2] drm/i915/display: Don't disable DDI/Transcoder when setting phy test pattern
  2022-09-16 21:25 ` [Intel-gfx] [PATCH v2] " Khaled Almahallawy
@ 2022-09-16 21:29   ` Taylor, Clinton A
  2022-09-26 16:48   ` Jani Nikula
  1 sibling, 0 replies; 9+ messages in thread
From: Taylor, Clinton A @ 2022-09-16 21:29 UTC (permalink / raw)
  To: Almahallawy, Khaled, intel-gfx

[-- Attachment #1: Type: text/plain, Size: 5031 bytes --]

Reviewed-by: Clint Taylor <Clinton.A.Taylor@intel.com>

-Clint


________________________________
From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> on behalf of Khaled Almahallawy <khaled.almahallawy@intel.com>
Sent: Friday, September 16, 2022 2:25 PM
To: intel-gfx@lists.freedesktop.org <intel-gfx@lists.freedesktop.org>
Subject: [Intel-gfx] [PATCH v2] drm/i915/display: Don't disable DDI/Transcoder when setting phy test pattern

Bspecs has updated recently to remove the restriction to disable
DDI/Transcoder before setting PHY test pattern. This update is to
address PHY compliance test failures observed on a port with LTTPR.
The issue is that when Transc. is disabled, the main link signals fed
to LTTPR will be dropped invalidating link training, which will affect
the quality of the phy test pattern when the transcoder is enabled again.

v2: Update commit message (Clint)

Bspec: 50482
Cc: Imre Deak <imre.deak@intel.com>
Cc: Clint Taylor <clinton.a.taylor@intel.com>
Cc: Or Cochvi <or.cochvi@intel.com>
Tested-by: Khaled Almahallawy <khaled.almahallawy@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dp.c | 59 -------------------------
 1 file changed, 59 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index c9be61d2348e..2bf323f3f155 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -3675,61 +3675,6 @@ static void intel_dp_phy_pattern_update(struct intel_dp *intel_dp,
         }
 }

-static void
-intel_dp_autotest_phy_ddi_disable(struct intel_dp *intel_dp,
-                                 const struct intel_crtc_state *crtc_state)
-{
-       struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
-       struct drm_device *dev = dig_port->base.base.dev;
-       struct drm_i915_private *dev_priv = to_i915(dev);
-       struct intel_crtc *crtc = to_intel_crtc(dig_port->base.base.crtc);
-       enum pipe pipe = crtc->pipe;
-       u32 trans_ddi_func_ctl_value, trans_conf_value, dp_tp_ctl_value;
-
-       trans_ddi_func_ctl_value = intel_de_read(dev_priv,
-                                                TRANS_DDI_FUNC_CTL(pipe));
-       trans_conf_value = intel_de_read(dev_priv, PIPECONF(pipe));
-       dp_tp_ctl_value = intel_de_read(dev_priv, TGL_DP_TP_CTL(pipe));
-
-       trans_ddi_func_ctl_value &= ~(TRANS_DDI_FUNC_ENABLE |
-                                     TGL_TRANS_DDI_PORT_MASK);
-       trans_conf_value &= ~PIPECONF_ENABLE;
-       dp_tp_ctl_value &= ~DP_TP_CTL_ENABLE;
-
-       intel_de_write(dev_priv, PIPECONF(pipe), trans_conf_value);
-       intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(pipe),
-                      trans_ddi_func_ctl_value);
-       intel_de_write(dev_priv, TGL_DP_TP_CTL(pipe), dp_tp_ctl_value);
-}
-
-static void
-intel_dp_autotest_phy_ddi_enable(struct intel_dp *intel_dp,
-                                const struct intel_crtc_state *crtc_state)
-{
-       struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
-       struct drm_device *dev = dig_port->base.base.dev;
-       struct drm_i915_private *dev_priv = to_i915(dev);
-       enum port port = dig_port->base.port;
-       struct intel_crtc *crtc = to_intel_crtc(dig_port->base.base.crtc);
-       enum pipe pipe = crtc->pipe;
-       u32 trans_ddi_func_ctl_value, trans_conf_value, dp_tp_ctl_value;
-
-       trans_ddi_func_ctl_value = intel_de_read(dev_priv,
-                                                TRANS_DDI_FUNC_CTL(pipe));
-       trans_conf_value = intel_de_read(dev_priv, PIPECONF(pipe));
-       dp_tp_ctl_value = intel_de_read(dev_priv, TGL_DP_TP_CTL(pipe));
-
-       trans_ddi_func_ctl_value |= TRANS_DDI_FUNC_ENABLE |
-                                   TGL_TRANS_DDI_SELECT_PORT(port);
-       trans_conf_value |= PIPECONF_ENABLE;
-       dp_tp_ctl_value |= DP_TP_CTL_ENABLE;
-
-       intel_de_write(dev_priv, PIPECONF(pipe), trans_conf_value);
-       intel_de_write(dev_priv, TGL_DP_TP_CTL(pipe), dp_tp_ctl_value);
-       intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(pipe),
-                      trans_ddi_func_ctl_value);
-}
-
 static void intel_dp_process_phy_request(struct intel_dp *intel_dp,
                                          const struct intel_crtc_state *crtc_state)
 {
@@ -3748,14 +3693,10 @@ static void intel_dp_process_phy_request(struct intel_dp *intel_dp,
         intel_dp_get_adjust_train(intel_dp, crtc_state, DP_PHY_DPRX,
                                   link_status);

-       intel_dp_autotest_phy_ddi_disable(intel_dp, crtc_state);
-
         intel_dp_set_signal_levels(intel_dp, crtc_state, DP_PHY_DPRX);

         intel_dp_phy_pattern_update(intel_dp, crtc_state);

-       intel_dp_autotest_phy_ddi_enable(intel_dp, crtc_state);
-
         drm_dp_dpcd_write(&intel_dp->aux, DP_TRAINING_LANE0_SET,
                           intel_dp->train_set, crtc_state->lane_count);

--
2.25.1


[-- Attachment #2: Type: text/html, Size: 10077 bytes --]

^ permalink raw reply related	[flat|nested] 9+ messages in thread

* [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/display: Don't disable DDI/Transcoder when setting phy test pattern (rev3)
  2022-09-16  6:37 [Intel-gfx] [PATCH] drm/i915/display: Don't disable DDI/Transcoder when setting phy test pattern Khaled Almahallawy
                   ` (2 preceding siblings ...)
  2022-09-16 21:25 ` [Intel-gfx] [PATCH v2] " Khaled Almahallawy
@ 2022-09-16 23:06 ` Patchwork
  3 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2022-09-16 23:06 UTC (permalink / raw)
  To: Taylor, Clinton A; +Cc: intel-gfx

== Series Details ==

Series: drm/i915/display: Don't disable DDI/Transcoder when setting phy test pattern (rev3)
URL   : https://patchwork.freedesktop.org/series/108636/
State : failure

== Summary ==

Error: patch https://patchwork.freedesktop.org/api/1.0/series/108636/revisions/3/mbox/ not applied
Applying: drm/i915/display: Don't disable DDI/Transcoder when setting phy test pattern
error: patch failed: drivers/gpu/drm/i915/display/intel_dp.c:3675
error: drivers/gpu/drm/i915/display/intel_dp.c: patch does not apply
error: Did you hand edit your patch?
It does not apply to blobs recorded in its index.
hint: Use 'git am --show-current-patch=diff' to see the failed patch
Using index info to reconstruct a base tree...
Patch failed at 0001 drm/i915/display: Don't disable DDI/Transcoder when setting phy test pattern
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".



^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: [Intel-gfx] [PATCH v2] drm/i915/display: Don't disable DDI/Transcoder when setting phy test pattern
  2022-09-16 21:25 ` [Intel-gfx] [PATCH v2] " Khaled Almahallawy
  2022-09-16 21:29   ` Taylor, Clinton A
@ 2022-09-26 16:48   ` Jani Nikula
  2022-09-27 20:02     ` Almahallawy, Khaled
  1 sibling, 1 reply; 9+ messages in thread
From: Jani Nikula @ 2022-09-26 16:48 UTC (permalink / raw)
  To: Khaled Almahallawy, intel-gfx

On Fri, 16 Sep 2022, Khaled Almahallawy <khaled.almahallawy@intel.com> wrote:
> Bspecs has updated recently to remove the restriction to disable
> DDI/Transcoder before setting PHY test pattern. This update is to
> address PHY compliance test failures observed on a port with LTTPR.
> The issue is that when Transc. is disabled, the main link signals fed
> to LTTPR will be dropped invalidating link training, which will affect
> the quality of the phy test pattern when the transcoder is enabled again.

And how about platforms prior to display 12? The requirement is still
there AFAICT.

BR,
Jani.


>
> v2: Update commit message (Clint)
>
> Bspec: 50482
> Cc: Imre Deak <imre.deak@intel.com>
> Cc: Clint Taylor <clinton.a.taylor@intel.com>
> Cc: Or Cochvi <or.cochvi@intel.com>
> Tested-by: Khaled Almahallawy <khaled.almahallawy@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_dp.c | 59 -------------------------
>  1 file changed, 59 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index c9be61d2348e..2bf323f3f155 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -3675,61 +3675,6 @@ static void intel_dp_phy_pattern_update(struct intel_dp *intel_dp,
>  	}
>  }
>  
> -static void
> -intel_dp_autotest_phy_ddi_disable(struct intel_dp *intel_dp,
> -				  const struct intel_crtc_state *crtc_state)
> -{
> -	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> -	struct drm_device *dev = dig_port->base.base.dev;
> -	struct drm_i915_private *dev_priv = to_i915(dev);
> -	struct intel_crtc *crtc = to_intel_crtc(dig_port->base.base.crtc);
> -	enum pipe pipe = crtc->pipe;
> -	u32 trans_ddi_func_ctl_value, trans_conf_value, dp_tp_ctl_value;
> -
> -	trans_ddi_func_ctl_value = intel_de_read(dev_priv,
> -						 TRANS_DDI_FUNC_CTL(pipe));
> -	trans_conf_value = intel_de_read(dev_priv, PIPECONF(pipe));
> -	dp_tp_ctl_value = intel_de_read(dev_priv, TGL_DP_TP_CTL(pipe));
> -
> -	trans_ddi_func_ctl_value &= ~(TRANS_DDI_FUNC_ENABLE |
> -				      TGL_TRANS_DDI_PORT_MASK);
> -	trans_conf_value &= ~PIPECONF_ENABLE;
> -	dp_tp_ctl_value &= ~DP_TP_CTL_ENABLE;
> -
> -	intel_de_write(dev_priv, PIPECONF(pipe), trans_conf_value);
> -	intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(pipe),
> -		       trans_ddi_func_ctl_value);
> -	intel_de_write(dev_priv, TGL_DP_TP_CTL(pipe), dp_tp_ctl_value);
> -}
> -
> -static void
> -intel_dp_autotest_phy_ddi_enable(struct intel_dp *intel_dp,
> -				 const struct intel_crtc_state *crtc_state)
> -{
> -	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> -	struct drm_device *dev = dig_port->base.base.dev;
> -	struct drm_i915_private *dev_priv = to_i915(dev);
> -	enum port port = dig_port->base.port;
> -	struct intel_crtc *crtc = to_intel_crtc(dig_port->base.base.crtc);
> -	enum pipe pipe = crtc->pipe;
> -	u32 trans_ddi_func_ctl_value, trans_conf_value, dp_tp_ctl_value;
> -
> -	trans_ddi_func_ctl_value = intel_de_read(dev_priv,
> -						 TRANS_DDI_FUNC_CTL(pipe));
> -	trans_conf_value = intel_de_read(dev_priv, PIPECONF(pipe));
> -	dp_tp_ctl_value = intel_de_read(dev_priv, TGL_DP_TP_CTL(pipe));
> -
> -	trans_ddi_func_ctl_value |= TRANS_DDI_FUNC_ENABLE |
> -				    TGL_TRANS_DDI_SELECT_PORT(port);
> -	trans_conf_value |= PIPECONF_ENABLE;
> -	dp_tp_ctl_value |= DP_TP_CTL_ENABLE;
> -
> -	intel_de_write(dev_priv, PIPECONF(pipe), trans_conf_value);
> -	intel_de_write(dev_priv, TGL_DP_TP_CTL(pipe), dp_tp_ctl_value);
> -	intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(pipe),
> -		       trans_ddi_func_ctl_value);
> -}
> -
>  static void intel_dp_process_phy_request(struct intel_dp *intel_dp,
>  					 const struct intel_crtc_state *crtc_state)
>  {
> @@ -3748,14 +3693,10 @@ static void intel_dp_process_phy_request(struct intel_dp *intel_dp,
>  	intel_dp_get_adjust_train(intel_dp, crtc_state, DP_PHY_DPRX,
>  				  link_status);
>  
> -	intel_dp_autotest_phy_ddi_disable(intel_dp, crtc_state);
> -
>  	intel_dp_set_signal_levels(intel_dp, crtc_state, DP_PHY_DPRX);
>  
>  	intel_dp_phy_pattern_update(intel_dp, crtc_state);
>  
> -	intel_dp_autotest_phy_ddi_enable(intel_dp, crtc_state);
> -
>  	drm_dp_dpcd_write(&intel_dp->aux, DP_TRAINING_LANE0_SET,
>  			  intel_dp->train_set, crtc_state->lane_count);

-- 
Jani Nikula, Intel Open Source Graphics Center

^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: [Intel-gfx] [PATCH v2] drm/i915/display: Don't disable DDI/Transcoder when setting phy test pattern
  2022-09-26 16:48   ` Jani Nikula
@ 2022-09-27 20:02     ` Almahallawy, Khaled
  2022-09-28  9:34       ` Jani Nikula
  0 siblings, 1 reply; 9+ messages in thread
From: Almahallawy, Khaled @ 2022-09-27 20:02 UTC (permalink / raw)
  To: intel-gfx, jani.nikula

On Mon, 2022-09-26 at 19:48 +0300, Jani Nikula wrote:
> On Fri, 16 Sep 2022, Khaled Almahallawy <khaled.almahallawy@intel.com
> > wrote:
> > Bspecs has updated recently to remove the restriction to disable
> > DDI/Transcoder before setting PHY test pattern. This update is to
> > address PHY compliance test failures observed on a port with LTTPR.
> > The issue is that when Transc. is disabled, the main link signals
> > fed
> > to LTTPR will be dropped invalidating link training, which will
> > affect
> > the quality of the phy test pattern when the transcoder is enabled
> > again.
> 
> And how about platforms prior to display 12? The requirement is still
> there AFAICT.

This restriction is not needed as well for earlier platforms. We are
able to set PHY patterns without these restrictions using legacy shell
script solution we used for compliance since SKL and that what we do
currently for eDP PHY CTS up to RPL. 
Also windows driver doesn't have this restriction on their code for all
generations. 
 
Simply just setting DP_COMP_CTL will trigger the phy test pattern
needed. 

Thanks
Khaled
> 


> BR,
> Jani.
> 
> 
> > v2: Update commit message (Clint)
> > 
> > Bspec: 50482
> > Cc: Imre Deak <imre.deak@intel.com>
> > Cc: Clint Taylor <clinton.a.taylor@intel.com>
> > Cc: Or Cochvi <or.cochvi@intel.com>
> > Tested-by: Khaled Almahallawy <khaled.almahallawy@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_dp.c | 59 -------------------
> > ------
> >  1 file changed, 59 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> > b/drivers/gpu/drm/i915/display/intel_dp.c
> > index c9be61d2348e..2bf323f3f155 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> > @@ -3675,61 +3675,6 @@ static void
> > intel_dp_phy_pattern_update(struct intel_dp *intel_dp,
> >  	}
> >  }
> >  
> > -static void
> > -intel_dp_autotest_phy_ddi_disable(struct intel_dp *intel_dp,
> > -				  const struct intel_crtc_state
> > *crtc_state)
> > -{
> > -	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> > -	struct drm_device *dev = dig_port->base.base.dev;
> > -	struct drm_i915_private *dev_priv = to_i915(dev);
> > -	struct intel_crtc *crtc = to_intel_crtc(dig_port-
> > >base.base.crtc);
> > -	enum pipe pipe = crtc->pipe;
> > -	u32 trans_ddi_func_ctl_value, trans_conf_value,
> > dp_tp_ctl_value;
> > -
> > -	trans_ddi_func_ctl_value = intel_de_read(dev_priv,
> > -						 TRANS_DDI_FUNC_CTL(pip
> > e));
> > -	trans_conf_value = intel_de_read(dev_priv, PIPECONF(pipe));
> > -	dp_tp_ctl_value = intel_de_read(dev_priv, TGL_DP_TP_CTL(pipe));
> > -
> > -	trans_ddi_func_ctl_value &= ~(TRANS_DDI_FUNC_ENABLE |
> > -				      TGL_TRANS_DDI_PORT_MASK);
> > -	trans_conf_value &= ~PIPECONF_ENABLE;
> > -	dp_tp_ctl_value &= ~DP_TP_CTL_ENABLE;
> > -
> > -	intel_de_write(dev_priv, PIPECONF(pipe), trans_conf_value);
> > -	intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(pipe),
> > -		       trans_ddi_func_ctl_value);
> > -	intel_de_write(dev_priv, TGL_DP_TP_CTL(pipe), dp_tp_ctl_value);
> > -}
> > -
> > -static void
> > -intel_dp_autotest_phy_ddi_enable(struct intel_dp *intel_dp,
> > -				 const struct intel_crtc_state
> > *crtc_state)
> > -{
> > -	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> > -	struct drm_device *dev = dig_port->base.base.dev;
> > -	struct drm_i915_private *dev_priv = to_i915(dev);
> > -	enum port port = dig_port->base.port;
> > -	struct intel_crtc *crtc = to_intel_crtc(dig_port-
> > >base.base.crtc);
> > -	enum pipe pipe = crtc->pipe;
> > -	u32 trans_ddi_func_ctl_value, trans_conf_value,
> > dp_tp_ctl_value;
> > -
> > -	trans_ddi_func_ctl_value = intel_de_read(dev_priv,
> > -						 TRANS_DDI_FUNC_CTL(pip
> > e));
> > -	trans_conf_value = intel_de_read(dev_priv, PIPECONF(pipe));
> > -	dp_tp_ctl_value = intel_de_read(dev_priv, TGL_DP_TP_CTL(pipe));
> > -
> > -	trans_ddi_func_ctl_value |= TRANS_DDI_FUNC_ENABLE |
> > -				    TGL_TRANS_DDI_SELECT_PORT(port);
> > -	trans_conf_value |= PIPECONF_ENABLE;
> > -	dp_tp_ctl_value |= DP_TP_CTL_ENABLE;
> > -
> > -	intel_de_write(dev_priv, PIPECONF(pipe), trans_conf_value);
> > -	intel_de_write(dev_priv, TGL_DP_TP_CTL(pipe), dp_tp_ctl_value);
> > -	intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(pipe),
> > -		       trans_ddi_func_ctl_value);
> > -}
> > -
> >  static void intel_dp_process_phy_request(struct intel_dp
> > *intel_dp,
> >  					 const struct intel_crtc_state
> > *crtc_state)
> >  {
> > @@ -3748,14 +3693,10 @@ static void
> > intel_dp_process_phy_request(struct intel_dp *intel_dp,
> >  	intel_dp_get_adjust_train(intel_dp, crtc_state, DP_PHY_DPRX,
> >  				  link_status);
> >  
> > -	intel_dp_autotest_phy_ddi_disable(intel_dp, crtc_state);
> > -
> >  	intel_dp_set_signal_levels(intel_dp, crtc_state, DP_PHY_DPRX);
> >  
> >  	intel_dp_phy_pattern_update(intel_dp, crtc_state);
> >  
> > -	intel_dp_autotest_phy_ddi_enable(intel_dp, crtc_state);
> > -
> >  	drm_dp_dpcd_write(&intel_dp->aux, DP_TRAINING_LANE0_SET,
> >  			  intel_dp->train_set, crtc_state->lane_count);

^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: [Intel-gfx] [PATCH v2] drm/i915/display: Don't disable DDI/Transcoder when setting phy test pattern
  2022-09-27 20:02     ` Almahallawy, Khaled
@ 2022-09-28  9:34       ` Jani Nikula
  0 siblings, 0 replies; 9+ messages in thread
From: Jani Nikula @ 2022-09-28  9:34 UTC (permalink / raw)
  To: Almahallawy, Khaled, intel-gfx

On Tue, 27 Sep 2022, "Almahallawy, Khaled" <khaled.almahallawy@intel.com> wrote:
> On Mon, 2022-09-26 at 19:48 +0300, Jani Nikula wrote:
>> On Fri, 16 Sep 2022, Khaled Almahallawy <khaled.almahallawy@intel.com
>> > wrote:
>> > Bspecs has updated recently to remove the restriction to disable
>> > DDI/Transcoder before setting PHY test pattern. This update is to
>> > address PHY compliance test failures observed on a port with LTTPR.
>> > The issue is that when Transc. is disabled, the main link signals
>> > fed
>> > to LTTPR will be dropped invalidating link training, which will
>> > affect
>> > the quality of the phy test pattern when the transcoder is enabled
>> > again.
>> 
>> And how about platforms prior to display 12? The requirement is still
>> there AFAICT.
>
> This restriction is not needed as well for earlier platforms. We are
> able to set PHY patterns without these restrictions using legacy shell
> script solution we used for compliance since SKL and that what we do
> currently for eDP PHY CTS up to RPL. 
> Also windows driver doesn't have this restriction on their code for all
> generations. 
>  
> Simply just setting DP_COMP_CTL will trigger the phy test pattern
> needed. 

Sadly bspec disagrees. :(

Anyway, please repost as new thread to get fresh CI results.

BR,
Jani.


>
> Thanks
> Khaled
>> 
>
>
>> BR,
>> Jani.
>> 
>> 
>> > v2: Update commit message (Clint)
>> > 
>> > Bspec: 50482
>> > Cc: Imre Deak <imre.deak@intel.com>
>> > Cc: Clint Taylor <clinton.a.taylor@intel.com>
>> > Cc: Or Cochvi <or.cochvi@intel.com>
>> > Tested-by: Khaled Almahallawy <khaled.almahallawy@intel.com>
>> > ---
>> >  drivers/gpu/drm/i915/display/intel_dp.c | 59 -------------------
>> > ------
>> >  1 file changed, 59 deletions(-)
>> > 
>> > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
>> > b/drivers/gpu/drm/i915/display/intel_dp.c
>> > index c9be61d2348e..2bf323f3f155 100644
>> > --- a/drivers/gpu/drm/i915/display/intel_dp.c
>> > +++ b/drivers/gpu/drm/i915/display/intel_dp.c
>> > @@ -3675,61 +3675,6 @@ static void
>> > intel_dp_phy_pattern_update(struct intel_dp *intel_dp,
>> >  	}
>> >  }
>> >  
>> > -static void
>> > -intel_dp_autotest_phy_ddi_disable(struct intel_dp *intel_dp,
>> > -				  const struct intel_crtc_state
>> > *crtc_state)
>> > -{
>> > -	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
>> > -	struct drm_device *dev = dig_port->base.base.dev;
>> > -	struct drm_i915_private *dev_priv = to_i915(dev);
>> > -	struct intel_crtc *crtc = to_intel_crtc(dig_port-
>> > >base.base.crtc);
>> > -	enum pipe pipe = crtc->pipe;
>> > -	u32 trans_ddi_func_ctl_value, trans_conf_value,
>> > dp_tp_ctl_value;
>> > -
>> > -	trans_ddi_func_ctl_value = intel_de_read(dev_priv,
>> > -						 TRANS_DDI_FUNC_CTL(pip
>> > e));
>> > -	trans_conf_value = intel_de_read(dev_priv, PIPECONF(pipe));
>> > -	dp_tp_ctl_value = intel_de_read(dev_priv, TGL_DP_TP_CTL(pipe));
>> > -
>> > -	trans_ddi_func_ctl_value &= ~(TRANS_DDI_FUNC_ENABLE |
>> > -				      TGL_TRANS_DDI_PORT_MASK);
>> > -	trans_conf_value &= ~PIPECONF_ENABLE;
>> > -	dp_tp_ctl_value &= ~DP_TP_CTL_ENABLE;
>> > -
>> > -	intel_de_write(dev_priv, PIPECONF(pipe), trans_conf_value);
>> > -	intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(pipe),
>> > -		       trans_ddi_func_ctl_value);
>> > -	intel_de_write(dev_priv, TGL_DP_TP_CTL(pipe), dp_tp_ctl_value);
>> > -}
>> > -
>> > -static void
>> > -intel_dp_autotest_phy_ddi_enable(struct intel_dp *intel_dp,
>> > -				 const struct intel_crtc_state
>> > *crtc_state)
>> > -{
>> > -	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
>> > -	struct drm_device *dev = dig_port->base.base.dev;
>> > -	struct drm_i915_private *dev_priv = to_i915(dev);
>> > -	enum port port = dig_port->base.port;
>> > -	struct intel_crtc *crtc = to_intel_crtc(dig_port-
>> > >base.base.crtc);
>> > -	enum pipe pipe = crtc->pipe;
>> > -	u32 trans_ddi_func_ctl_value, trans_conf_value,
>> > dp_tp_ctl_value;
>> > -
>> > -	trans_ddi_func_ctl_value = intel_de_read(dev_priv,
>> > -						 TRANS_DDI_FUNC_CTL(pip
>> > e));
>> > -	trans_conf_value = intel_de_read(dev_priv, PIPECONF(pipe));
>> > -	dp_tp_ctl_value = intel_de_read(dev_priv, TGL_DP_TP_CTL(pipe));
>> > -
>> > -	trans_ddi_func_ctl_value |= TRANS_DDI_FUNC_ENABLE |
>> > -				    TGL_TRANS_DDI_SELECT_PORT(port);
>> > -	trans_conf_value |= PIPECONF_ENABLE;
>> > -	dp_tp_ctl_value |= DP_TP_CTL_ENABLE;
>> > -
>> > -	intel_de_write(dev_priv, PIPECONF(pipe), trans_conf_value);
>> > -	intel_de_write(dev_priv, TGL_DP_TP_CTL(pipe), dp_tp_ctl_value);
>> > -	intel_de_write(dev_priv, TRANS_DDI_FUNC_CTL(pipe),
>> > -		       trans_ddi_func_ctl_value);
>> > -}
>> > -
>> >  static void intel_dp_process_phy_request(struct intel_dp
>> > *intel_dp,
>> >  					 const struct intel_crtc_state
>> > *crtc_state)
>> >  {
>> > @@ -3748,14 +3693,10 @@ static void
>> > intel_dp_process_phy_request(struct intel_dp *intel_dp,
>> >  	intel_dp_get_adjust_train(intel_dp, crtc_state, DP_PHY_DPRX,
>> >  				  link_status);
>> >  
>> > -	intel_dp_autotest_phy_ddi_disable(intel_dp, crtc_state);
>> > -
>> >  	intel_dp_set_signal_levels(intel_dp, crtc_state, DP_PHY_DPRX);
>> >  
>> >  	intel_dp_phy_pattern_update(intel_dp, crtc_state);
>> >  
>> > -	intel_dp_autotest_phy_ddi_enable(intel_dp, crtc_state);
>> > -
>> >  	drm_dp_dpcd_write(&intel_dp->aux, DP_TRAINING_LANE0_SET,
>> >  			  intel_dp->train_set, crtc_state->lane_count);

-- 
Jani Nikula, Intel Open Source Graphics Center

^ permalink raw reply	[flat|nested] 9+ messages in thread

end of thread, other threads:[~2022-09-28  9:34 UTC | newest]

Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-09-16  6:37 [Intel-gfx] [PATCH] drm/i915/display: Don't disable DDI/Transcoder when setting phy test pattern Khaled Almahallawy
2022-09-16  8:07 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2022-09-16 11:35 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2022-09-16 21:25 ` [Intel-gfx] [PATCH v2] " Khaled Almahallawy
2022-09-16 21:29   ` Taylor, Clinton A
2022-09-26 16:48   ` Jani Nikula
2022-09-27 20:02     ` Almahallawy, Khaled
2022-09-28  9:34       ` Jani Nikula
2022-09-16 23:06 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for drm/i915/display: Don't disable DDI/Transcoder when setting phy test pattern (rev3) Patchwork

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