* [Intel-gfx] [PATCH 0/6] Introduce struct cdclk_step
@ 2022-09-17 0:43 Anusha Srivatsa
2022-09-17 0:43 ` [Intel-gfx] [PATCH 1/6] drm/i915/display Add dg2_prog_squash_ctl() helper Anusha Srivatsa
` (13 more replies)
0 siblings, 14 replies; 38+ messages in thread
From: Anusha Srivatsa @ 2022-09-17 0:43 UTC (permalink / raw)
To: intel-gfx; +Cc: Rodrigo Vivi
This is a prep series for the actual cdclk refactoring
that will be sent following this. Idea is to have a
struct - cdclk_step that holds the following:
- cdclk action (squash, crawl or modeset)
- cdclk frequency
which gets populated in atomic check. Driver
uses the populated values during atomic commit
to do the suitable sequence of actions like
programming squash ctl registers in case of squashing
or PLL sequence incase of modeset and so on.
This series just addresses the initial idea. The actual plumming
in the atomic commit phase will be sent shortly.
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Uma Shankar <uma.shankar@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Anusha Srivatsa (6):
drm/i915/display Add dg2_prog_squash_ctl() helper
drm/i915/display: add cdclk action struct to cdclk_config
drm/i915/display: Embed the new struct steps for squashing
drm/i915/display: Embed the new struct steps for crawling
drm/i915/display: Embed the new struct steps for modeset
drm/i915/display: Dump the new cdclk config values
drivers/gpu/drm/i915/display/intel_cdclk.c | 77 +++++++++++++++++-----
drivers/gpu/drm/i915/display/intel_cdclk.h | 16 ++++-
2 files changed, 74 insertions(+), 19 deletions(-)
--
2.25.1
^ permalink raw reply [flat|nested] 38+ messages in thread
* [Intel-gfx] [PATCH 1/6] drm/i915/display Add dg2_prog_squash_ctl() helper
2022-09-17 0:43 [Intel-gfx] [PATCH 0/6] Introduce struct cdclk_step Anusha Srivatsa
@ 2022-09-17 0:43 ` Anusha Srivatsa
2022-09-17 0:44 ` [Intel-gfx] [PATCH 2/6] drm/i915/display: add cdclk action struct to cdclk_config Anusha Srivatsa
` (12 subsequent siblings)
13 siblings, 0 replies; 38+ messages in thread
From: Anusha Srivatsa @ 2022-09-17 0:43 UTC (permalink / raw)
To: intel-gfx
Modularising steps and moving them out of
bxt_set_cdclk().
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 23 +++++++++++++---------
1 file changed, 14 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index ed05070b7307..220d32adbd12 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -1689,6 +1689,18 @@ static u32 cdclk_squash_waveform(struct drm_i915_private *dev_priv,
return 0xffff;
}
+static void dg2_prog_squash_ctl(struct drm_i915_private *i915, u16 waveform)
+{
+ u32 squash_ctl = 0;
+
+ if (waveform) {
+ squash_ctl |= CDCLK_SQUASH_ENABLE;
+ squash_ctl |= CDCLK_SQUASH_WINDOW_SIZE(0xf) | waveform;
+ }
+
+ intel_de_write(i915, CDCLK_SQUASH_CTL, squash_ctl);
+}
+
static void bxt_set_cdclk(struct drm_i915_private *dev_priv,
const struct intel_cdclk_config *cdclk_config,
enum pipe pipe)
@@ -1747,15 +1759,8 @@ static void bxt_set_cdclk(struct drm_i915_private *dev_priv,
else
clock = cdclk;
- if (has_cdclk_squasher(dev_priv)) {
- u32 squash_ctl = 0;
-
- if (waveform)
- squash_ctl = CDCLK_SQUASH_ENABLE |
- CDCLK_SQUASH_WINDOW_SIZE(0xf) | waveform;
-
- intel_de_write(dev_priv, CDCLK_SQUASH_CTL, squash_ctl);
- }
+ if (has_cdclk_squasher(dev_priv))
+ dg2_prog_squash_ctl(dev_priv, waveform);
val = bxt_cdclk_cd2x_div_sel(dev_priv, clock, vco) |
bxt_cdclk_cd2x_pipe(dev_priv, pipe) |
--
2.25.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [Intel-gfx] [PATCH 2/6] drm/i915/display: add cdclk action struct to cdclk_config
2022-09-17 0:43 [Intel-gfx] [PATCH 0/6] Introduce struct cdclk_step Anusha Srivatsa
2022-09-17 0:43 ` [Intel-gfx] [PATCH 1/6] drm/i915/display Add dg2_prog_squash_ctl() helper Anusha Srivatsa
@ 2022-09-17 0:44 ` Anusha Srivatsa
2022-09-19 9:26 ` Jani Nikula
2022-09-17 0:44 ` [Intel-gfx] [PATCH 3/6] drm/i915/display: Embed the new struct steps for squashing Anusha Srivatsa
` (11 subsequent siblings)
13 siblings, 1 reply; 38+ messages in thread
From: Anusha Srivatsa @ 2022-09-17 0:44 UTC (permalink / raw)
To: intel-gfx
The struct has the action to be performed - squash, crawl
or modeset and the corresponding cdclk which is the desired
cdclk. This is the structure that gets populated during
atomic check once it is determined what the cdclk change looks
like
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
drivers/gpu/drm/i915/display/intel_cdclk.h | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.h b/drivers/gpu/drm/i915/display/intel_cdclk.h
index c674879a84a5..3869f93e8ad2 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.h
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.h
@@ -11,13 +11,27 @@
#include "intel_display.h"
#include "intel_global_state.h"
+#define MAX_CDCLK_ACTIONS 1
+
struct drm_i915_private;
struct intel_atomic_state;
struct intel_crtc_state;
+enum cdclk_sequence {
+ CDCLK_INVALID_ACTION = -1,
+
+ CDCLK_SQUASH_ONLY = 0,
+ CDCLK_CRAWL_ONLY,
+ CDCLK_LEGACY,
+};
+
struct intel_cdclk_config {
unsigned int cdclk, vco, ref, bypass;
u8 voltage_level;
+ struct cdclk_step {
+ enum cdclk_sequence action;
+ u32 cdclk;
+ } steps[MAX_CDCLK_ACTIONS];
};
struct intel_cdclk_state {
--
2.25.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [Intel-gfx] [PATCH 3/6] drm/i915/display: Embed the new struct steps for squashing
2022-09-17 0:43 [Intel-gfx] [PATCH 0/6] Introduce struct cdclk_step Anusha Srivatsa
2022-09-17 0:43 ` [Intel-gfx] [PATCH 1/6] drm/i915/display Add dg2_prog_squash_ctl() helper Anusha Srivatsa
2022-09-17 0:44 ` [Intel-gfx] [PATCH 2/6] drm/i915/display: add cdclk action struct to cdclk_config Anusha Srivatsa
@ 2022-09-17 0:44 ` Anusha Srivatsa
2022-09-19 9:27 ` Jani Nikula
2022-09-17 0:44 ` [Intel-gfx] [PATCH 4/6] drm/i915/display: Embed the new struct steps for crawling Anusha Srivatsa
` (10 subsequent siblings)
13 siblings, 1 reply; 38+ messages in thread
From: Anusha Srivatsa @ 2022-09-17 0:44 UTC (permalink / raw)
To: intel-gfx
Populate the new struct steps for squash case.
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 220d32adbd12..d2e81134b6f2 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -1973,8 +1973,9 @@ static bool intel_cdclk_can_crawl(struct drm_i915_private *dev_priv,
static bool intel_cdclk_can_squash(struct drm_i915_private *dev_priv,
const struct intel_cdclk_config *a,
- const struct intel_cdclk_config *b)
+ struct intel_cdclk_config *b)
{
+ struct cdclk_step *cdclk_transition = b->steps;
/*
* FIXME should store a bit more state in intel_cdclk_config
* to differentiate squasher vs. cd2x divider properly. For
@@ -1984,6 +1985,12 @@ static bool intel_cdclk_can_squash(struct drm_i915_private *dev_priv,
if (!has_cdclk_squasher(dev_priv))
return false;
+ if (a->cdclk != b->cdclk && a->vco != 0 &&
+ a->vco == b->vco && a->ref == b->ref) {
+ cdclk_transition->action = CDCLK_SQUASH_ONLY;
+ cdclk_transition->cdclk = b->cdclk;
+ }
+
return a->cdclk != b->cdclk &&
a->vco != 0 &&
a->vco == b->vco &&
--
2.25.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [Intel-gfx] [PATCH 4/6] drm/i915/display: Embed the new struct steps for crawling
2022-09-17 0:43 [Intel-gfx] [PATCH 0/6] Introduce struct cdclk_step Anusha Srivatsa
` (2 preceding siblings ...)
2022-09-17 0:44 ` [Intel-gfx] [PATCH 3/6] drm/i915/display: Embed the new struct steps for squashing Anusha Srivatsa
@ 2022-09-17 0:44 ` Anusha Srivatsa
2022-09-19 9:28 ` Jani Nikula
2022-09-17 0:44 ` [Intel-gfx] [PATCH 5/6] drm/i915/display: Embed the new struct steps for modeset Anusha Srivatsa
` (9 subsequent siblings)
13 siblings, 1 reply; 38+ messages in thread
From: Anusha Srivatsa @ 2022-09-17 0:44 UTC (permalink / raw)
To: intel-gfx
Populate the new struct steps for crawl case.
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index d2e81134b6f2..bb5bbb1ad982 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -1951,8 +1951,9 @@ void intel_cdclk_uninit_hw(struct drm_i915_private *i915)
static bool intel_cdclk_can_crawl(struct drm_i915_private *dev_priv,
const struct intel_cdclk_config *a,
- const struct intel_cdclk_config *b)
+ struct intel_cdclk_config *b)
{
+ struct cdclk_step *cdclk_transition = b->steps;
int a_div, b_div;
if (!HAS_CDCLK_CRAWL(dev_priv))
@@ -1965,6 +1966,12 @@ static bool intel_cdclk_can_crawl(struct drm_i915_private *dev_priv,
a_div = DIV_ROUND_CLOSEST(a->vco, a->cdclk);
b_div = DIV_ROUND_CLOSEST(b->vco, b->cdclk);
+ if (a->vco != 0 && b->vco != 0 && a->vco != b->vco &&
+ a_div == b_div && a->ref == b->ref) {
+ cdclk_transition->action = CDCLK_CRAWL_ONLY;
+ cdclk_transition->cdclk = b->cdclk;
+ }
+
return a->vco != 0 && b->vco != 0 &&
a->vco != b->vco &&
a_div == b_div &&
--
2.25.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [Intel-gfx] [PATCH 5/6] drm/i915/display: Embed the new struct steps for modeset
2022-09-17 0:43 [Intel-gfx] [PATCH 0/6] Introduce struct cdclk_step Anusha Srivatsa
` (3 preceding siblings ...)
2022-09-17 0:44 ` [Intel-gfx] [PATCH 4/6] drm/i915/display: Embed the new struct steps for crawling Anusha Srivatsa
@ 2022-09-17 0:44 ` Anusha Srivatsa
2022-09-17 0:44 ` [Intel-gfx] [PATCH 6/6] drm/i915/display: Dump the new cdclk config values Anusha Srivatsa
` (8 subsequent siblings)
13 siblings, 0 replies; 38+ messages in thread
From: Anusha Srivatsa @ 2022-09-17 0:44 UTC (permalink / raw)
To: intel-gfx
Populate the new struct steps for the legacy modeset
case.
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 18 +++++++++++++-----
drivers/gpu/drm/i915/display/intel_cdclk.h | 2 +-
2 files changed, 14 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index bb5bbb1ad982..bc627daade3e 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -2015,8 +2015,16 @@ static bool intel_cdclk_can_squash(struct drm_i915_private *dev_priv,
* requires all pipes to be off, false if not.
*/
bool intel_cdclk_needs_modeset(const struct intel_cdclk_config *a,
- const struct intel_cdclk_config *b)
+ struct intel_cdclk_config *b)
{
+ struct cdclk_step *cdclk_transition = b->steps;
+
+ if (a->cdclk != b->cdclk || a->vco != b->vco ||
+ a->ref != b->ref) {
+ cdclk_transition->action = CDCLK_LEGACY;
+ cdclk_transition->cdclk = b->cdclk;
+ }
+
return a->cdclk != b->cdclk ||
a->vco != b->vco ||
a->ref != b->ref;
@@ -2065,7 +2073,7 @@ static bool intel_cdclk_can_cd2x_update(struct drm_i915_private *dev_priv,
* True if the CDCLK configurations don't match, false if they do.
*/
static bool intel_cdclk_changed(const struct intel_cdclk_config *a,
- const struct intel_cdclk_config *b)
+ struct intel_cdclk_config *b)
{
return intel_cdclk_needs_modeset(a, b) ||
a->voltage_level != b->voltage_level;
@@ -2091,7 +2099,7 @@ void intel_cdclk_dump_config(struct drm_i915_private *i915,
* if necessary.
*/
static void intel_set_cdclk(struct drm_i915_private *dev_priv,
- const struct intel_cdclk_config *cdclk_config,
+ struct intel_cdclk_config *cdclk_config,
enum pipe pipe)
{
struct intel_encoder *encoder;
@@ -2163,7 +2171,7 @@ intel_set_cdclk_pre_plane_update(struct intel_atomic_state *state)
struct drm_i915_private *dev_priv = to_i915(state->base.dev);
const struct intel_cdclk_state *old_cdclk_state =
intel_atomic_get_old_cdclk_state(state);
- const struct intel_cdclk_state *new_cdclk_state =
+ struct intel_cdclk_state *new_cdclk_state =
intel_atomic_get_new_cdclk_state(state);
enum pipe pipe = new_cdclk_state->pipe;
@@ -2192,7 +2200,7 @@ intel_set_cdclk_post_plane_update(struct intel_atomic_state *state)
struct drm_i915_private *dev_priv = to_i915(state->base.dev);
const struct intel_cdclk_state *old_cdclk_state =
intel_atomic_get_old_cdclk_state(state);
- const struct intel_cdclk_state *new_cdclk_state =
+ struct intel_cdclk_state *new_cdclk_state =
intel_atomic_get_new_cdclk_state(state);
enum pipe pipe = new_cdclk_state->pipe;
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.h b/drivers/gpu/drm/i915/display/intel_cdclk.h
index 3869f93e8ad2..442dd580c0c7 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.h
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.h
@@ -75,7 +75,7 @@ void intel_update_max_cdclk(struct drm_i915_private *dev_priv);
void intel_update_cdclk(struct drm_i915_private *dev_priv);
u32 intel_read_rawclk(struct drm_i915_private *dev_priv);
bool intel_cdclk_needs_modeset(const struct intel_cdclk_config *a,
- const struct intel_cdclk_config *b);
+ struct intel_cdclk_config *b);
void intel_set_cdclk_pre_plane_update(struct intel_atomic_state *state);
void intel_set_cdclk_post_plane_update(struct intel_atomic_state *state);
void intel_cdclk_dump_config(struct drm_i915_private *i915,
--
2.25.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [Intel-gfx] [PATCH 6/6] drm/i915/display: Dump the new cdclk config values
2022-09-17 0:43 [Intel-gfx] [PATCH 0/6] Introduce struct cdclk_step Anusha Srivatsa
` (4 preceding siblings ...)
2022-09-17 0:44 ` [Intel-gfx] [PATCH 5/6] drm/i915/display: Embed the new struct steps for modeset Anusha Srivatsa
@ 2022-09-17 0:44 ` Anusha Srivatsa
2022-09-19 19:46 ` Navare, Manasi
2022-09-20 7:27 ` Jani Nikula
2022-09-17 1:13 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Introduce struct cdclk_step Patchwork
` (7 subsequent siblings)
13 siblings, 2 replies; 38+ messages in thread
From: Anusha Srivatsa @ 2022-09-17 0:44 UTC (permalink / raw)
To: intel-gfx
Add a helper function to get stringify values of the
desired cdclk action and dump it with rest of the
cdclk config values
Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
---
drivers/gpu/drm/i915/display/intel_cdclk.c | 18 ++++++++++++++++--
1 file changed, 16 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index bc627daade3e..12f5e4d23245 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -1688,6 +1688,19 @@ static u32 cdclk_squash_waveform(struct drm_i915_private *dev_priv,
return 0xffff;
}
+static const char *cdclk_sequence_to_string(enum cdclk_sequence cdclk_sequence)
+{
+ switch (cdclk_sequence) {
+ case CDCLK_SQUASH_ONLY:
+ return "Squash only";
+ case CDCLK_CRAWL_ONLY:
+ return "Crawl only";
+ case CDCLK_LEGACY:
+ return "Legacy method";
+ default:
+ return "Not a valid cdclk sequence";
+ }
+}
static void dg2_prog_squash_ctl(struct drm_i915_private *i915, u16 waveform)
{
@@ -2083,10 +2096,11 @@ void intel_cdclk_dump_config(struct drm_i915_private *i915,
const struct intel_cdclk_config *cdclk_config,
const char *context)
{
- drm_dbg_kms(&i915->drm, "%s %d kHz, VCO %d kHz, ref %d kHz, bypass %d kHz, voltage level %d\n",
+ drm_dbg_kms(&i915->drm, "%s %d kHz, VCO %d kHz, ref %d kHz, bypass %d kHz, voltage level %d, %s action\n",
context, cdclk_config->cdclk, cdclk_config->vco,
cdclk_config->ref, cdclk_config->bypass,
- cdclk_config->voltage_level);
+ cdclk_config->voltage_level,
+ cdclk_sequence_to_string(cdclk_config->steps->action));
}
/**
--
2.25.1
^ permalink raw reply related [flat|nested] 38+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Introduce struct cdclk_step
2022-09-17 0:43 [Intel-gfx] [PATCH 0/6] Introduce struct cdclk_step Anusha Srivatsa
` (5 preceding siblings ...)
2022-09-17 0:44 ` [Intel-gfx] [PATCH 6/6] drm/i915/display: Dump the new cdclk config values Anusha Srivatsa
@ 2022-09-17 1:13 ` Patchwork
2022-09-17 1:13 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
` (6 subsequent siblings)
13 siblings, 0 replies; 38+ messages in thread
From: Patchwork @ 2022-09-17 1:13 UTC (permalink / raw)
To: Anusha Srivatsa; +Cc: intel-gfx
== Series Details ==
Series: Introduce struct cdclk_step
URL : https://patchwork.freedesktop.org/series/108685/
State : warning
== Summary ==
Error: dim checkpatch failed
23515dff4937 drm/i915/display Add dg2_prog_squash_ctl() helper
4380da21d9ee drm/i915/display: add cdclk action struct to cdclk_config
ca9d3bf3f74e drm/i915/display: Embed the new struct steps for squashing
abf006e4078f drm/i915/display: Embed the new struct steps for crawling
1c77fcf8d5cc drm/i915/display: Embed the new struct steps for modeset
f3329e90da5d drm/i915/display: Dump the new cdclk config values
-:20: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations
#20: FILE: drivers/gpu/drm/i915/display/intel_cdclk.c:1691:
}
+static const char *cdclk_sequence_to_string(enum cdclk_sequence cdclk_sequence)
total: 0 errors, 0 warnings, 1 checks, 32 lines checked
^ permalink raw reply [flat|nested] 38+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Introduce struct cdclk_step
2022-09-17 0:43 [Intel-gfx] [PATCH 0/6] Introduce struct cdclk_step Anusha Srivatsa
` (6 preceding siblings ...)
2022-09-17 1:13 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Introduce struct cdclk_step Patchwork
@ 2022-09-17 1:13 ` Patchwork
2022-09-17 1:35 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
` (5 subsequent siblings)
13 siblings, 0 replies; 38+ messages in thread
From: Patchwork @ 2022-09-17 1:13 UTC (permalink / raw)
To: Anusha Srivatsa; +Cc: intel-gfx
== Series Details ==
Series: Introduce struct cdclk_step
URL : https://patchwork.freedesktop.org/series/108685/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
^ permalink raw reply [flat|nested] 38+ messages in thread
* [Intel-gfx] ✗ Fi.CI.BAT: failure for Introduce struct cdclk_step
2022-09-17 0:43 [Intel-gfx] [PATCH 0/6] Introduce struct cdclk_step Anusha Srivatsa
` (7 preceding siblings ...)
2022-09-17 1:13 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
@ 2022-09-17 1:35 ` Patchwork
2022-09-17 2:08 ` Dixit, Ashutosh
2022-09-19 4:25 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
` (4 subsequent siblings)
13 siblings, 1 reply; 38+ messages in thread
From: Patchwork @ 2022-09-17 1:35 UTC (permalink / raw)
To: Anusha Srivatsa; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 8360 bytes --]
== Series Details ==
Series: Introduce struct cdclk_step
URL : https://patchwork.freedesktop.org/series/108685/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12148 -> Patchwork_108685v1
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_108685v1 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_108685v1, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/index.html
Participating hosts (43 -> 41)
------------------------------
Additional (2): fi-icl-u2 fi-pnv-d510
Missing (4): fi-ctg-p8600 fi-hsw-4200u fi-bdw-samus bat-dg1-5
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_108685v1:
### IGT changes ###
#### Possible regressions ####
* igt@debugfs_test@read_all_entries:
- fi-pnv-d510: NOTRUN -> [INCOMPLETE][1]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/fi-pnv-d510/igt@debugfs_test@read_all_entries.html
Known issues
------------
Here are the changes found in Patchwork_108685v1 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_huc_copy@huc-copy:
- fi-icl-u2: NOTRUN -> [SKIP][2] ([i915#2190])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/fi-icl-u2/igt@gem_huc_copy@huc-copy.html
* igt@gem_lmem_swapping@random-engines:
- fi-icl-u2: NOTRUN -> [SKIP][3] ([i915#4613]) +3 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/fi-icl-u2/igt@gem_lmem_swapping@random-engines.html
* igt@i915_selftest@live@requests:
- fi-blb-e6850: [PASS][4] -> [DMESG-FAIL][5] ([i915#4528])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/fi-blb-e6850/igt@i915_selftest@live@requests.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/fi-blb-e6850/igt@i915_selftest@live@requests.html
* igt@i915_suspend@basic-s3-without-i915:
- fi-bdw-5557u: [PASS][6] -> [INCOMPLETE][7] ([i915#146] / [i915#6598] / [i915#6712])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/fi-bdw-5557u/igt@i915_suspend@basic-s3-without-i915.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/fi-bdw-5557u/igt@i915_suspend@basic-s3-without-i915.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-icl-u2: NOTRUN -> [SKIP][8] ([fdo#111827]) +8 similar issues
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/fi-icl-u2/igt@kms_chamelium@hdmi-hpd-fast.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor:
- fi-icl-u2: NOTRUN -> [SKIP][9] ([i915#4103])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/fi-icl-u2/igt@kms_cursor_legacy@basic-busy-flip-before-cursor.html
* igt@kms_force_connector_basic@force-connector-state:
- fi-icl-u2: NOTRUN -> [WARN][10] ([i915#6008])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/fi-icl-u2/igt@kms_force_connector_basic@force-connector-state.html
* igt@kms_force_connector_basic@force-load-detect:
- fi-icl-u2: NOTRUN -> [SKIP][11] ([fdo#109285])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/fi-icl-u2/igt@kms_force_connector_basic@force-load-detect.html
* igt@kms_setmode@basic-clone-single-crtc:
- fi-icl-u2: NOTRUN -> [SKIP][12] ([i915#3555])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/fi-icl-u2/igt@kms_setmode@basic-clone-single-crtc.html
* igt@prime_vgem@basic-userptr:
- fi-icl-u2: NOTRUN -> [SKIP][13] ([fdo#109295] / [i915#3301])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/fi-icl-u2/igt@prime_vgem@basic-userptr.html
* igt@runner@aborted:
- fi-pnv-d510: NOTRUN -> [FAIL][14] ([i915#2403] / [i915#4312])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/fi-pnv-d510/igt@runner@aborted.html
- fi-blb-e6850: NOTRUN -> [FAIL][15] ([fdo#109271] / [i915#2403] / [i915#4312])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/fi-blb-e6850/igt@runner@aborted.html
#### Possible fixes ####
* igt@gem_exec_suspend@basic-s0@smem:
- {bat-adlm-1}: [DMESG-WARN][16] ([i915#2867]) -> [PASS][17]
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/bat-adlm-1/igt@gem_exec_suspend@basic-s0@smem.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/bat-adlm-1/igt@gem_exec_suspend@basic-s0@smem.html
* igt@i915_pm_rpm@module-reload:
- {fi-tgl-mst}: [DMESG-WARN][18] ([i915#5537]) -> [PASS][19]
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/fi-tgl-mst/igt@i915_pm_rpm@module-reload.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/fi-tgl-mst/igt@i915_pm_rpm@module-reload.html
* igt@i915_selftest@live@hangcheck:
- {bat-dg2-9}: [INCOMPLETE][20] ([i915#6668]) -> [PASS][21]
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/bat-dg2-9/igt@i915_selftest@live@hangcheck.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/bat-dg2-9/igt@i915_selftest@live@hangcheck.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#146]: https://gitlab.freedesktop.org/drm/intel/issues/146
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2403]: https://gitlab.freedesktop.org/drm/intel/issues/2403
[i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
[i915#2867]: https://gitlab.freedesktop.org/drm/intel/issues/2867
[i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#4528]: https://gitlab.freedesktop.org/drm/intel/issues/4528
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
[i915#5537]: https://gitlab.freedesktop.org/drm/intel/issues/5537
[i915#5828]: https://gitlab.freedesktop.org/drm/intel/issues/5828
[i915#5836]: https://gitlab.freedesktop.org/drm/intel/issues/5836
[i915#6008]: https://gitlab.freedesktop.org/drm/intel/issues/6008
[i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
[i915#6596]: https://gitlab.freedesktop.org/drm/intel/issues/6596
[i915#6598]: https://gitlab.freedesktop.org/drm/intel/issues/6598
[i915#6668]: https://gitlab.freedesktop.org/drm/intel/issues/6668
[i915#6712]: https://gitlab.freedesktop.org/drm/intel/issues/6712
Build changes
-------------
* Linux: CI_DRM_12148 -> Patchwork_108685v1
CI-20190529: 20190529
CI_DRM_12148: ba94ceb672ea9f99feb6df2552943dc534d087ab @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6656: 24100c4e181c50e3678aeca9c641b8a43555ad73 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_108685v1: ba94ceb672ea9f99feb6df2552943dc534d087ab @ git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
aa3831af3614 drm/i915/display: Dump the new cdclk config values
0dced7ba29f3 drm/i915/display: Embed the new struct steps for modeset
1bae5d1fe43c drm/i915/display: Embed the new struct steps for crawling
14216dfb8adf drm/i915/display: Embed the new struct steps for squashing
e364c1acdfd1 drm/i915/display: add cdclk action struct to cdclk_config
bfcdcc3c2dfb drm/i915/display Add dg2_prog_squash_ctl() helper
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/index.html
[-- Attachment #2: Type: text/html, Size: 9061 bytes --]
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for Introduce struct cdclk_step
2022-09-17 1:35 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
@ 2022-09-17 2:08 ` Dixit, Ashutosh
2022-09-19 6:35 ` Vudum, Lakshminarayana
0 siblings, 1 reply; 38+ messages in thread
From: Dixit, Ashutosh @ 2022-09-17 2:08 UTC (permalink / raw)
To: intel-gfx, Lakshminarayana Vudum
On Fri, 16 Sep 2022 18:35:13 -0700, Patchwork wrote:
>
Hi Lakshmi,
> Series: Introduce struct cdclk_step
> URL: https://patchwork.freedesktop.org/series/108685/
> State: failure
> Details: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/index.html
>
> CI Bug Log - changes from CI_DRM_12148 -> Patchwork_108685v1
>
> Summary
>
> FAILURE
>
> Serious unknown changes coming with Patchwork_108685v1 absolutely need to be
> verified manually.
>
> If you think the reported changes have nothing to do with the changes
> introduced in Patchwork_108685v1, please notify your bug team to allow them
> to document this new failure mode, which will reduce false positives in CI.
>
> External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/index.html
>
> Participating hosts (43 -> 41)
>
> Additional (2): fi-icl-u2 fi-pnv-d510
> Missing (4): fi-ctg-p8600 fi-hsw-4200u fi-bdw-samus bat-dg1-5
>
> Possible new issues
>
> Here are the unknown changes that may have been introduced in Patchwork_108685v1:
>
> IGT changes
>
> Possible regressions
>
> • igt@debugfs_test@read_all_entries:
> □ fi-pnv-d510: NOTRUN -> INCOMPLETE
This failure is unrelated and needs a new bug. Seems to be caused by:
fe5979665f640 ("drm/i915/debugfs: Add perf_limit_reasons in debugfs")
Thanks.
--
Ashutosh
^ permalink raw reply [flat|nested] 38+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for Introduce struct cdclk_step
2022-09-17 0:43 [Intel-gfx] [PATCH 0/6] Introduce struct cdclk_step Anusha Srivatsa
` (8 preceding siblings ...)
2022-09-17 1:35 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
@ 2022-09-19 4:25 ` Patchwork
2022-09-19 5:42 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
` (3 subsequent siblings)
13 siblings, 0 replies; 38+ messages in thread
From: Patchwork @ 2022-09-19 4:25 UTC (permalink / raw)
To: Anusha Srivatsa; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 7953 bytes --]
== Series Details ==
Series: Introduce struct cdclk_step
URL : https://patchwork.freedesktop.org/series/108685/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12148 -> Patchwork_108685v1
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/index.html
Participating hosts (43 -> 41)
------------------------------
Additional (2): fi-icl-u2 fi-pnv-d510
Missing (4): fi-ctg-p8600 fi-hsw-4200u fi-bdw-samus bat-dg1-5
Known issues
------------
Here are the changes found in Patchwork_108685v1 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@debugfs_test@read_all_entries:
- fi-pnv-d510: NOTRUN -> [INCOMPLETE][1] ([i915#6863])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/fi-pnv-d510/igt@debugfs_test@read_all_entries.html
* igt@gem_huc_copy@huc-copy:
- fi-icl-u2: NOTRUN -> [SKIP][2] ([i915#2190])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/fi-icl-u2/igt@gem_huc_copy@huc-copy.html
* igt@gem_lmem_swapping@random-engines:
- fi-icl-u2: NOTRUN -> [SKIP][3] ([i915#4613]) +3 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/fi-icl-u2/igt@gem_lmem_swapping@random-engines.html
* igt@i915_selftest@live@requests:
- fi-blb-e6850: [PASS][4] -> [DMESG-FAIL][5] ([i915#4528])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/fi-blb-e6850/igt@i915_selftest@live@requests.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/fi-blb-e6850/igt@i915_selftest@live@requests.html
* igt@i915_suspend@basic-s3-without-i915:
- fi-bdw-5557u: [PASS][6] -> [INCOMPLETE][7] ([i915#146] / [i915#6598] / [i915#6712])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/fi-bdw-5557u/igt@i915_suspend@basic-s3-without-i915.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/fi-bdw-5557u/igt@i915_suspend@basic-s3-without-i915.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-icl-u2: NOTRUN -> [SKIP][8] ([fdo#111827]) +8 similar issues
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/fi-icl-u2/igt@kms_chamelium@hdmi-hpd-fast.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor:
- fi-icl-u2: NOTRUN -> [SKIP][9] ([i915#4103])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/fi-icl-u2/igt@kms_cursor_legacy@basic-busy-flip-before-cursor.html
* igt@kms_force_connector_basic@force-connector-state:
- fi-icl-u2: NOTRUN -> [WARN][10] ([i915#6008])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/fi-icl-u2/igt@kms_force_connector_basic@force-connector-state.html
* igt@kms_force_connector_basic@force-load-detect:
- fi-icl-u2: NOTRUN -> [SKIP][11] ([fdo#109285])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/fi-icl-u2/igt@kms_force_connector_basic@force-load-detect.html
* igt@kms_setmode@basic-clone-single-crtc:
- fi-icl-u2: NOTRUN -> [SKIP][12] ([i915#3555])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/fi-icl-u2/igt@kms_setmode@basic-clone-single-crtc.html
* igt@prime_vgem@basic-userptr:
- fi-icl-u2: NOTRUN -> [SKIP][13] ([fdo#109295] / [i915#3301])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/fi-icl-u2/igt@prime_vgem@basic-userptr.html
* igt@runner@aborted:
- fi-pnv-d510: NOTRUN -> [FAIL][14] ([i915#2403] / [i915#4312])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/fi-pnv-d510/igt@runner@aborted.html
- fi-blb-e6850: NOTRUN -> [FAIL][15] ([fdo#109271] / [i915#2403] / [i915#4312])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/fi-blb-e6850/igt@runner@aborted.html
#### Possible fixes ####
* igt@gem_exec_suspend@basic-s0@smem:
- {bat-adlm-1}: [DMESG-WARN][16] ([i915#2867]) -> [PASS][17]
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/bat-adlm-1/igt@gem_exec_suspend@basic-s0@smem.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/bat-adlm-1/igt@gem_exec_suspend@basic-s0@smem.html
* igt@i915_pm_rpm@module-reload:
- {fi-tgl-mst}: [DMESG-WARN][18] ([i915#5537]) -> [PASS][19]
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/fi-tgl-mst/igt@i915_pm_rpm@module-reload.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/fi-tgl-mst/igt@i915_pm_rpm@module-reload.html
* igt@i915_selftest@live@hangcheck:
- {bat-dg2-9}: [INCOMPLETE][20] ([i915#6668]) -> [PASS][21]
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/bat-dg2-9/igt@i915_selftest@live@hangcheck.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/bat-dg2-9/igt@i915_selftest@live@hangcheck.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#146]: https://gitlab.freedesktop.org/drm/intel/issues/146
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2403]: https://gitlab.freedesktop.org/drm/intel/issues/2403
[i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
[i915#2867]: https://gitlab.freedesktop.org/drm/intel/issues/2867
[i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#4528]: https://gitlab.freedesktop.org/drm/intel/issues/4528
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
[i915#5537]: https://gitlab.freedesktop.org/drm/intel/issues/5537
[i915#5828]: https://gitlab.freedesktop.org/drm/intel/issues/5828
[i915#5836]: https://gitlab.freedesktop.org/drm/intel/issues/5836
[i915#6008]: https://gitlab.freedesktop.org/drm/intel/issues/6008
[i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
[i915#6596]: https://gitlab.freedesktop.org/drm/intel/issues/6596
[i915#6598]: https://gitlab.freedesktop.org/drm/intel/issues/6598
[i915#6668]: https://gitlab.freedesktop.org/drm/intel/issues/6668
[i915#6712]: https://gitlab.freedesktop.org/drm/intel/issues/6712
[i915#6863]: https://gitlab.freedesktop.org/drm/intel/issues/6863
Build changes
-------------
* Linux: CI_DRM_12148 -> Patchwork_108685v1
CI-20190529: 20190529
CI_DRM_12148: ba94ceb672ea9f99feb6df2552943dc534d087ab @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6656: 24100c4e181c50e3678aeca9c641b8a43555ad73 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_108685v1: ba94ceb672ea9f99feb6df2552943dc534d087ab @ git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
aa3831af3614 drm/i915/display: Dump the new cdclk config values
0dced7ba29f3 drm/i915/display: Embed the new struct steps for modeset
1bae5d1fe43c drm/i915/display: Embed the new struct steps for crawling
14216dfb8adf drm/i915/display: Embed the new struct steps for squashing
e364c1acdfd1 drm/i915/display: add cdclk action struct to cdclk_config
bfcdcc3c2dfb drm/i915/display Add dg2_prog_squash_ctl() helper
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/index.html
[-- Attachment #2: Type: text/html, Size: 8642 bytes --]
^ permalink raw reply [flat|nested] 38+ messages in thread
* [Intel-gfx] ✗ Fi.CI.IGT: failure for Introduce struct cdclk_step
2022-09-17 0:43 [Intel-gfx] [PATCH 0/6] Introduce struct cdclk_step Anusha Srivatsa
` (9 preceding siblings ...)
2022-09-19 4:25 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2022-09-19 5:42 ` Patchwork
2022-09-19 6:25 ` [Intel-gfx] ✓ Fi.CI.IGT: success " Patchwork
` (2 subsequent siblings)
13 siblings, 0 replies; 38+ messages in thread
From: Patchwork @ 2022-09-19 5:42 UTC (permalink / raw)
To: Anusha Srivatsa; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 26541 bytes --]
== Series Details ==
Series: Introduce struct cdclk_step
URL : https://patchwork.freedesktop.org/series/108685/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12148_full -> Patchwork_108685v1_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_108685v1_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_108685v1_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (9 -> 11)
------------------------------
Additional (2): shard-rkl shard-tglu
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_108685v1_full:
### IGT changes ###
#### Possible regressions ####
* igt@gem_exec_flush@basic-uc-set-default:
- shard-glk: [PASS][1] -> [DMESG-FAIL][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-glk7/igt@gem_exec_flush@basic-uc-set-default.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-glk8/igt@gem_exec_flush@basic-uc-set-default.html
- shard-apl: [PASS][3] -> [DMESG-FAIL][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-apl8/igt@gem_exec_flush@basic-uc-set-default.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-apl6/igt@gem_exec_flush@basic-uc-set-default.html
Known issues
------------
Here are the changes found in Patchwork_108685v1_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@feature_discovery@chamelium:
- shard-tglb: NOTRUN -> [SKIP][5] ([fdo#111827])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-tglb1/igt@feature_discovery@chamelium.html
* igt@gem_exec_fair@basic-deadline:
- shard-glk: [PASS][6] -> [FAIL][7] ([i915#2846])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-glk9/igt@gem_exec_fair@basic-deadline.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-glk9/igt@gem_exec_fair@basic-deadline.html
* igt@gem_exec_fair@basic-flow@rcs0:
- shard-tglb: [PASS][8] -> [FAIL][9] ([i915#2842])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-tglb1/igt@gem_exec_fair@basic-flow@rcs0.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-tglb1/igt@gem_exec_fair@basic-flow@rcs0.html
* igt@gem_exec_fair@basic-none@vcs0:
- shard-glk: [PASS][10] -> [FAIL][11] ([i915#2842]) +1 similar issue
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-glk5/igt@gem_exec_fair@basic-none@vcs0.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-glk3/igt@gem_exec_fair@basic-none@vcs0.html
* igt@gem_exec_fair@basic-none@vcs1:
- shard-iclb: NOTRUN -> [FAIL][12] ([i915#2842])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-iclb2/igt@gem_exec_fair@basic-none@vcs1.html
* igt@gem_exec_fair@basic-throttle@rcs0:
- shard-iclb: [PASS][13] -> [FAIL][14] ([i915#2842]) +1 similar issue
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-iclb7/igt@gem_exec_fair@basic-throttle@rcs0.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-iclb2/igt@gem_exec_fair@basic-throttle@rcs0.html
* igt@gem_exec_suspend@basic-s3@smem:
- shard-apl: [PASS][15] -> [DMESG-WARN][16] ([i915#180]) +2 similar issues
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-apl3/igt@gem_exec_suspend@basic-s3@smem.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-apl1/igt@gem_exec_suspend@basic-s3@smem.html
* igt@gem_lmem_swapping@basic:
- shard-tglb: NOTRUN -> [SKIP][17] ([i915#4613])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-tglb1/igt@gem_lmem_swapping@basic.html
* igt@gem_lmem_swapping@verify-random:
- shard-apl: NOTRUN -> [SKIP][18] ([fdo#109271] / [i915#4613]) +1 similar issue
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-apl8/igt@gem_lmem_swapping@verify-random.html
* igt@gem_render_copy@x-tiled-to-vebox-yf-tiled:
- shard-snb: NOTRUN -> [SKIP][19] ([fdo#109271]) +34 similar issues
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-snb7/igt@gem_render_copy@x-tiled-to-vebox-yf-tiled.html
* igt@gem_userptr_blits@huge-split:
- shard-glk: [PASS][20] -> [FAIL][21] ([i915#3376])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-glk5/igt@gem_userptr_blits@huge-split.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-glk7/igt@gem_userptr_blits@huge-split.html
* igt@gen9_exec_parse@secure-batches:
- shard-tglb: NOTRUN -> [SKIP][22] ([i915#2527] / [i915#2856])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-tglb1/igt@gen9_exec_parse@secure-batches.html
* igt@i915_pm_rpm@modeset-pc8-residency-stress:
- shard-tglb: NOTRUN -> [SKIP][23] ([fdo#109506] / [i915#2411])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-tglb1/igt@i915_pm_rpm@modeset-pc8-residency-stress.html
* igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-async-flip:
- shard-tglb: NOTRUN -> [SKIP][24] ([i915#5286]) +1 similar issue
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-tglb1/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip:
- shard-tglb: NOTRUN -> [SKIP][25] ([fdo#111615])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-tglb1/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html
* igt@kms_ccs@pipe-a-bad-pixel-format-4_tiled_dg2_rc_ccs_cc:
- shard-tglb: NOTRUN -> [SKIP][26] ([i915#6095]) +1 similar issue
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-tglb1/igt@kms_ccs@pipe-a-bad-pixel-format-4_tiled_dg2_rc_ccs_cc.html
* igt@kms_ccs@pipe-a-random-ccs-data-y_tiled_gen12_mc_ccs:
- shard-tglb: NOTRUN -> [SKIP][27] ([i915#3689] / [i915#3886]) +1 similar issue
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-tglb1/igt@kms_ccs@pipe-a-random-ccs-data-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-b-ccs-on-another-bo-yf_tiled_ccs:
- shard-tglb: NOTRUN -> [SKIP][28] ([fdo#111615] / [i915#3689])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-tglb1/igt@kms_ccs@pipe-b-ccs-on-another-bo-yf_tiled_ccs.html
* igt@kms_ccs@pipe-b-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs:
- shard-apl: NOTRUN -> [SKIP][29] ([fdo#109271] / [i915#3886]) +4 similar issues
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-apl8/igt@kms_ccs@pipe-b-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-d-bad-pixel-format-y_tiled_gen12_mc_ccs:
- shard-apl: NOTRUN -> [SKIP][30] ([fdo#109271]) +79 similar issues
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-apl8/igt@kms_ccs@pipe-d-bad-pixel-format-y_tiled_gen12_mc_ccs.html
* igt@kms_chamelium@dp-hpd-storm-disable:
- shard-tglb: NOTRUN -> [SKIP][31] ([fdo#109284] / [fdo#111827]) +1 similar issue
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-tglb1/igt@kms_chamelium@dp-hpd-storm-disable.html
* igt@kms_chamelium@hdmi-cmp-planar-formats:
- shard-apl: NOTRUN -> [SKIP][32] ([fdo#109271] / [fdo#111827]) +3 similar issues
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-apl8/igt@kms_chamelium@hdmi-cmp-planar-formats.html
* igt@kms_chamelium@hdmi-frame-dump:
- shard-snb: NOTRUN -> [SKIP][33] ([fdo#109271] / [fdo#111827]) +1 similar issue
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-snb7/igt@kms_chamelium@hdmi-frame-dump.html
* igt@kms_cursor_legacy@cursorb-vs-flipb@atomic:
- shard-tglb: NOTRUN -> [SKIP][34] ([fdo#109274] / [fdo#111825]) +5 similar issues
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-tglb1/igt@kms_cursor_legacy@cursorb-vs-flipb@atomic.html
* igt@kms_flip@2x-flip-vs-rmfb:
- shard-tglb: NOTRUN -> [SKIP][35] ([fdo#109274] / [fdo#111825] / [i915#3637])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-tglb1/igt@kms_flip@2x-flip-vs-rmfb.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling@pipe-a-valid-mode:
- shard-iclb: NOTRUN -> [SKIP][36] ([i915#2587] / [i915#2672]) +5 similar issues
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-iclb8/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling@pipe-a-valid-mode:
- shard-tglb: NOTRUN -> [SKIP][37] ([i915#2587] / [i915#2672])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-tglb1/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling@pipe-a-default-mode:
- shard-iclb: NOTRUN -> [SKIP][38] ([i915#2672]) +2 similar issues
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-iclb2/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling@pipe-a-default-mode:
- shard-iclb: NOTRUN -> [SKIP][39] ([i915#3555])
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-iclb2/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-default-mode:
- shard-iclb: NOTRUN -> [SKIP][40] ([i915#2672] / [i915#3555])
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-iclb2/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-default-mode.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-cpu:
- shard-tglb: NOTRUN -> [SKIP][41] ([fdo#109280] / [fdo#111825]) +5 similar issues
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-tglb1/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-gtt:
- shard-tglb: NOTRUN -> [SKIP][42] ([i915#6497]) +2 similar issues
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-tglb1/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-gtt.html
* igt@kms_plane_lowres@tiling-y@pipe-c-hdmi-a-1:
- shard-glk: [PASS][43] -> [FAIL][44] ([i915#1888])
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-glk1/igt@kms_plane_lowres@tiling-y@pipe-c-hdmi-a-1.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-glk5/igt@kms_plane_lowres@tiling-y@pipe-c-hdmi-a-1.html
* igt@kms_plane_scaling@plane-upscale-with-rotation-factor-0-25@pipe-c-edp-1:
- shard-tglb: NOTRUN -> [SKIP][45] ([i915#5176]) +3 similar issues
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-tglb1/igt@kms_plane_scaling@plane-upscale-with-rotation-factor-0-25@pipe-c-edp-1.html
* igt@kms_psr2_su@frontbuffer-xrgb8888:
- shard-apl: NOTRUN -> [SKIP][46] ([fdo#109271] / [i915#658])
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-apl8/igt@kms_psr2_su@frontbuffer-xrgb8888.html
* igt@kms_psr2_su@page_flip-nv12:
- shard-tglb: NOTRUN -> [SKIP][47] ([i915#1911])
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-tglb1/igt@kms_psr2_su@page_flip-nv12.html
* igt@kms_psr@psr2_cursor_mmap_gtt:
- shard-iclb: [PASS][48] -> [SKIP][49] ([fdo#109441]) +1 similar issue
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-iclb2/igt@kms_psr@psr2_cursor_mmap_gtt.html
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-iclb1/igt@kms_psr@psr2_cursor_mmap_gtt.html
* igt@nouveau_crc@pipe-b-source-rg:
- shard-tglb: NOTRUN -> [SKIP][50] ([i915#2530])
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-tglb1/igt@nouveau_crc@pipe-b-source-rg.html
* igt@prime_nv_pcopy@test3_4:
- shard-tglb: NOTRUN -> [SKIP][51] ([fdo#109291])
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-tglb1/igt@prime_nv_pcopy@test3_4.html
* igt@prime_vgem@coherency-gtt:
- shard-tglb: NOTRUN -> [SKIP][52] ([fdo#109295] / [fdo#111656])
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-tglb1/igt@prime_vgem@coherency-gtt.html
* igt@sysfs_clients@fair-0:
- shard-tglb: NOTRUN -> [SKIP][53] ([i915#2994])
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-tglb1/igt@sysfs_clients@fair-0.html
#### Possible fixes ####
* igt@drm_import_export@prime:
- shard-apl: [DMESG-WARN][54] -> [PASS][55]
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-apl8/igt@drm_import_export@prime.html
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-apl6/igt@drm_import_export@prime.html
* igt@gem_ctx_exec@basic-nohangcheck:
- shard-tglb: [FAIL][56] ([i915#6268]) -> [PASS][57]
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-tglb7/igt@gem_ctx_exec@basic-nohangcheck.html
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-tglb5/igt@gem_ctx_exec@basic-nohangcheck.html
* igt@gem_exec_balancer@parallel-bb-first:
- shard-iclb: [SKIP][58] ([i915#4525]) -> [PASS][59] +2 similar issues
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-iclb8/igt@gem_exec_balancer@parallel-bb-first.html
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-iclb4/igt@gem_exec_balancer@parallel-bb-first.html
* igt@gem_exec_fair@basic-none-solo@rcs0:
- shard-apl: [FAIL][60] ([i915#2842]) -> [PASS][61] +1 similar issue
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-apl6/igt@gem_exec_fair@basic-none-solo@rcs0.html
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-apl2/igt@gem_exec_fair@basic-none-solo@rcs0.html
* igt@gem_exec_fair@basic-none-vip@rcs0:
- shard-glk: [FAIL][62] ([i915#2842]) -> [PASS][63]
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-glk1/igt@gem_exec_fair@basic-none-vip@rcs0.html
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-glk5/igt@gem_exec_fair@basic-none-vip@rcs0.html
* igt@i915_module_load@reload-with-fault-injection:
- shard-snb: [DMESG-WARN][64] -> [PASS][65]
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-snb2/igt@i915_module_load@reload-with-fault-injection.html
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-snb7/igt@i915_module_load@reload-with-fault-injection.html
* igt@kms_lease@lessee_list:
- shard-snb: [SKIP][66] ([fdo#109271]) -> [PASS][67]
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-snb2/igt@kms_lease@lessee_list.html
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-snb4/igt@kms_lease@lessee_list.html
* igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b-planes:
- shard-apl: [DMESG-WARN][68] ([i915#180]) -> [PASS][69] +3 similar issues
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-apl2/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b-planes.html
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-apl8/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b-planes.html
* igt@kms_psr@psr2_primary_render:
- shard-iclb: [SKIP][70] ([fdo#109441]) -> [PASS][71] +1 similar issue
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-iclb7/igt@kms_psr@psr2_primary_render.html
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-iclb2/igt@kms_psr@psr2_primary_render.html
#### Warnings ####
* igt@gem_pxp@display-protected-crc:
- shard-tglb: [INCOMPLETE][72] -> [SKIP][73] ([i915#4270])
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-tglb8/igt@gem_pxp@display-protected-crc.html
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-tglb1/igt@gem_pxp@display-protected-crc.html
* igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-sf:
- shard-iclb: [SKIP][74] ([i915#2920]) -> [SKIP][75] ([i915#658])
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-iclb2/igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-sf.html
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-iclb1/igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-sf.html
* igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area:
- shard-iclb: [SKIP][76] ([fdo#111068] / [i915#658]) -> [SKIP][77] ([i915#2920])
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-iclb7/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area.html
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-iclb2/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area.html
* igt@kms_psr2_sf@plane-move-sf-dmg-area:
- shard-iclb: [SKIP][78] ([i915#2920]) -> [SKIP][79] ([fdo#111068] / [i915#658])
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-iclb2/igt@kms_psr2_sf@plane-move-sf-dmg-area.html
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-iclb1/igt@kms_psr2_sf@plane-move-sf-dmg-area.html
* igt@runner@aborted:
- shard-apl: ([FAIL][80], [FAIL][81], [FAIL][82], [FAIL][83], [FAIL][84], [FAIL][85]) ([i915#180] / [i915#3002] / [i915#4312] / [i915#5257] / [i915#6599]) -> ([FAIL][86], [FAIL][87], [FAIL][88], [FAIL][89], [FAIL][90]) ([fdo#109271] / [i915#180] / [i915#3002] / [i915#4312] / [i915#5257] / [i915#6599])
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-apl1/igt@runner@aborted.html
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-apl1/igt@runner@aborted.html
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-apl3/igt@runner@aborted.html
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-apl2/igt@runner@aborted.html
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-apl6/igt@runner@aborted.html
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-apl8/igt@runner@aborted.html
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-apl6/igt@runner@aborted.html
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-apl7/igt@runner@aborted.html
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-apl2/igt@runner@aborted.html
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-apl2/igt@runner@aborted.html
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-apl1/igt@runner@aborted.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109283]: https://bugs.freedesktop.org/show_bug.cgi?id=109283
[fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[fdo#109309]: https://bugs.freedesktop.org/show_bug.cgi?id=109309
[fdo#109312]: https://bugs.freedesktop.org/show_bug.cgi?id=109312
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
[fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
[fdo#111644]: https://bugs.freedesktop.org/show_bug.cgi?id=111644
[fdo#111656]: https://bugs.freedesktop.org/show_bug.cgi?id=111656
[fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1063]: https://gitlab.freedesktop.org/drm/intel/issues/1063
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
[i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888
[i915#1902]: https://gitlab.freedesktop.org/drm/intel/issues/1902
[i915#1911]: https://gitlab.freedesktop.org/drm/intel/issues/1911
[i915#2411]: https://gitlab.freedesktop.org/drm/intel/issues/2411
[i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
[i915#2530]: https://gitlab.freedesktop.org/drm/intel/issues/2530
[i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
[i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
[i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705
[i915#280]: https://gitlab.freedesktop.org/drm/intel/issues/280
[i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
[i915#2846]: https://gitlab.freedesktop.org/drm/intel/issues/2846
[i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
[i915#2920]: https://gitlab.freedesktop.org/drm/intel/issues/2920
[i915#2994]: https://gitlab.freedesktop.org/drm/intel/issues/2994
[i915#3002]: https://gitlab.freedesktop.org/drm/intel/issues/3002
[i915#3012]: https://gitlab.freedesktop.org/drm/intel/issues/3012
[i915#3116]: https://gitlab.freedesktop.org/drm/intel/issues/3116
[i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
[i915#3299]: https://gitlab.freedesktop.org/drm/intel/issues/3299
[i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
[i915#3376]: https://gitlab.freedesktop.org/drm/intel/issues/3376
[i915#3528]: https://gitlab.freedesktop.org/drm/intel/issues/3528
[i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
[i915#3742]: https://gitlab.freedesktop.org/drm/intel/issues/3742
[i915#3826]: https://gitlab.freedesktop.org/drm/intel/issues/3826
[i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840
[i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
[i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
[i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#4525]: https://gitlab.freedesktop.org/drm/intel/issues/4525
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4877]: https://gitlab.freedesktop.org/drm/intel/issues/4877
[i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
[i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
[i915#5257]: https://gitlab.freedesktop.org/drm/intel/issues/5257
[i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
[i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289
[i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
[i915#5982]: https://gitlab.freedesktop.org/drm/intel/issues/5982
[i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
[i915#6268]: https://gitlab.freedesktop.org/drm/intel/issues/6268
[i915#6334]: https://gitlab.freedesktop.org/drm/intel/issues/6334
[i915#6335]: https://gitlab.freedesktop.org/drm/intel/issues/6335
[i915#6433]: https://gitlab.freedesktop.org/drm/intel/issues/6433
[i915#6497]: https://gitlab.freedesktop.org/drm/intel/issues/6497
[i915#6524]: https://gitlab.freedesktop.org/drm/intel/issues/6524
[i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
[i915#6599]: https://gitlab.freedesktop.org/drm/intel/issues/6599
Build changes
-------------
* Linux: CI_DRM_12148 -> Patchwork_108685v1
CI-20190529: 20190529
CI_DRM_12148: ba94ceb672ea9f99feb6df2552943dc534d087ab @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6656: 24100c4e181c50e3678aeca9c641b8a43555ad73 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_108685v1: ba94ceb672ea9f99feb6df2552943dc534d087ab @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/index.html
[-- Attachment #2: Type: text/html, Size: 28828 bytes --]
^ permalink raw reply [flat|nested] 38+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for Introduce struct cdclk_step
2022-09-17 0:43 [Intel-gfx] [PATCH 0/6] Introduce struct cdclk_step Anusha Srivatsa
` (10 preceding siblings ...)
2022-09-19 5:42 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
@ 2022-09-19 6:25 ` Patchwork
2022-09-19 19:48 ` [Intel-gfx] [PATCH 0/6] " Navare, Manasi
2022-09-20 8:20 ` Ville Syrjälä
13 siblings, 0 replies; 38+ messages in thread
From: Patchwork @ 2022-09-19 6:25 UTC (permalink / raw)
To: Anusha Srivatsa; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 26147 bytes --]
== Series Details ==
Series: Introduce struct cdclk_step
URL : https://patchwork.freedesktop.org/series/108685/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12148_full -> Patchwork_108685v1_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (9 -> 11)
------------------------------
Additional (2): shard-rkl shard-tglu
Known issues
------------
Here are the changes found in Patchwork_108685v1_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@feature_discovery@chamelium:
- shard-tglb: NOTRUN -> [SKIP][1] ([fdo#111827])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-tglb1/igt@feature_discovery@chamelium.html
* igt@gem_exec_fair@basic-deadline:
- shard-glk: [PASS][2] -> [FAIL][3] ([i915#2846])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-glk9/igt@gem_exec_fair@basic-deadline.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-glk9/igt@gem_exec_fair@basic-deadline.html
* igt@gem_exec_fair@basic-flow@rcs0:
- shard-tglb: [PASS][4] -> [FAIL][5] ([i915#2842])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-tglb1/igt@gem_exec_fair@basic-flow@rcs0.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-tglb1/igt@gem_exec_fair@basic-flow@rcs0.html
* igt@gem_exec_fair@basic-none@vcs0:
- shard-glk: [PASS][6] -> [FAIL][7] ([i915#2842]) +1 similar issue
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-glk5/igt@gem_exec_fair@basic-none@vcs0.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-glk3/igt@gem_exec_fair@basic-none@vcs0.html
* igt@gem_exec_fair@basic-none@vcs1:
- shard-iclb: NOTRUN -> [FAIL][8] ([i915#2842])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-iclb2/igt@gem_exec_fair@basic-none@vcs1.html
* igt@gem_exec_fair@basic-throttle@rcs0:
- shard-iclb: [PASS][9] -> [FAIL][10] ([i915#2842]) +1 similar issue
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-iclb7/igt@gem_exec_fair@basic-throttle@rcs0.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-iclb2/igt@gem_exec_fair@basic-throttle@rcs0.html
* igt@gem_exec_flush@basic-uc-set-default:
- shard-glk: [PASS][11] -> [DMESG-FAIL][12] ([i915#6864])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-glk7/igt@gem_exec_flush@basic-uc-set-default.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-glk8/igt@gem_exec_flush@basic-uc-set-default.html
- shard-apl: [PASS][13] -> [DMESG-FAIL][14] ([i915#6864])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-apl8/igt@gem_exec_flush@basic-uc-set-default.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-apl6/igt@gem_exec_flush@basic-uc-set-default.html
* igt@gem_exec_suspend@basic-s3@smem:
- shard-apl: [PASS][15] -> [DMESG-WARN][16] ([i915#180]) +2 similar issues
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-apl3/igt@gem_exec_suspend@basic-s3@smem.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-apl1/igt@gem_exec_suspend@basic-s3@smem.html
* igt@gem_lmem_swapping@basic:
- shard-tglb: NOTRUN -> [SKIP][17] ([i915#4613])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-tglb1/igt@gem_lmem_swapping@basic.html
* igt@gem_lmem_swapping@verify-random:
- shard-apl: NOTRUN -> [SKIP][18] ([fdo#109271] / [i915#4613]) +1 similar issue
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-apl8/igt@gem_lmem_swapping@verify-random.html
* igt@gem_render_copy@x-tiled-to-vebox-yf-tiled:
- shard-snb: NOTRUN -> [SKIP][19] ([fdo#109271]) +34 similar issues
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-snb7/igt@gem_render_copy@x-tiled-to-vebox-yf-tiled.html
* igt@gem_userptr_blits@huge-split:
- shard-glk: [PASS][20] -> [FAIL][21] ([i915#3376])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-glk5/igt@gem_userptr_blits@huge-split.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-glk7/igt@gem_userptr_blits@huge-split.html
* igt@gen9_exec_parse@secure-batches:
- shard-tglb: NOTRUN -> [SKIP][22] ([i915#2527] / [i915#2856])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-tglb1/igt@gen9_exec_parse@secure-batches.html
* igt@i915_pm_rpm@modeset-pc8-residency-stress:
- shard-tglb: NOTRUN -> [SKIP][23] ([fdo#109506] / [i915#2411])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-tglb1/igt@i915_pm_rpm@modeset-pc8-residency-stress.html
* igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-async-flip:
- shard-tglb: NOTRUN -> [SKIP][24] ([i915#5286]) +1 similar issue
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-tglb1/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip:
- shard-tglb: NOTRUN -> [SKIP][25] ([fdo#111615])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-tglb1/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html
* igt@kms_ccs@pipe-a-bad-pixel-format-4_tiled_dg2_rc_ccs_cc:
- shard-tglb: NOTRUN -> [SKIP][26] ([i915#6095]) +1 similar issue
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-tglb1/igt@kms_ccs@pipe-a-bad-pixel-format-4_tiled_dg2_rc_ccs_cc.html
* igt@kms_ccs@pipe-a-random-ccs-data-y_tiled_gen12_mc_ccs:
- shard-tglb: NOTRUN -> [SKIP][27] ([i915#3689] / [i915#3886]) +1 similar issue
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-tglb1/igt@kms_ccs@pipe-a-random-ccs-data-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-b-ccs-on-another-bo-yf_tiled_ccs:
- shard-tglb: NOTRUN -> [SKIP][28] ([fdo#111615] / [i915#3689])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-tglb1/igt@kms_ccs@pipe-b-ccs-on-another-bo-yf_tiled_ccs.html
* igt@kms_ccs@pipe-b-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs:
- shard-apl: NOTRUN -> [SKIP][29] ([fdo#109271] / [i915#3886]) +4 similar issues
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-apl8/igt@kms_ccs@pipe-b-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-d-bad-pixel-format-y_tiled_gen12_mc_ccs:
- shard-apl: NOTRUN -> [SKIP][30] ([fdo#109271]) +79 similar issues
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-apl8/igt@kms_ccs@pipe-d-bad-pixel-format-y_tiled_gen12_mc_ccs.html
* igt@kms_chamelium@dp-hpd-storm-disable:
- shard-tglb: NOTRUN -> [SKIP][31] ([fdo#109284] / [fdo#111827]) +1 similar issue
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-tglb1/igt@kms_chamelium@dp-hpd-storm-disable.html
* igt@kms_chamelium@hdmi-cmp-planar-formats:
- shard-apl: NOTRUN -> [SKIP][32] ([fdo#109271] / [fdo#111827]) +3 similar issues
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-apl8/igt@kms_chamelium@hdmi-cmp-planar-formats.html
* igt@kms_chamelium@hdmi-frame-dump:
- shard-snb: NOTRUN -> [SKIP][33] ([fdo#109271] / [fdo#111827]) +1 similar issue
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-snb7/igt@kms_chamelium@hdmi-frame-dump.html
* igt@kms_cursor_legacy@cursorb-vs-flipb@atomic:
- shard-tglb: NOTRUN -> [SKIP][34] ([fdo#109274] / [fdo#111825]) +5 similar issues
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-tglb1/igt@kms_cursor_legacy@cursorb-vs-flipb@atomic.html
* igt@kms_flip@2x-flip-vs-rmfb:
- shard-tglb: NOTRUN -> [SKIP][35] ([fdo#109274] / [fdo#111825] / [i915#3637])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-tglb1/igt@kms_flip@2x-flip-vs-rmfb.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling@pipe-a-valid-mode:
- shard-iclb: NOTRUN -> [SKIP][36] ([i915#2587] / [i915#2672]) +5 similar issues
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-iclb8/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-upscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling@pipe-a-valid-mode:
- shard-tglb: NOTRUN -> [SKIP][37] ([i915#2587] / [i915#2672])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-tglb1/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling@pipe-a-default-mode:
- shard-iclb: NOTRUN -> [SKIP][38] ([i915#2672]) +2 similar issues
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-iclb2/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling@pipe-a-default-mode:
- shard-iclb: NOTRUN -> [SKIP][39] ([i915#3555])
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-iclb2/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-default-mode:
- shard-iclb: NOTRUN -> [SKIP][40] ([i915#2672] / [i915#3555])
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-iclb2/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-default-mode.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-cpu:
- shard-tglb: NOTRUN -> [SKIP][41] ([fdo#109280] / [fdo#111825]) +5 similar issues
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-tglb1/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-gtt:
- shard-tglb: NOTRUN -> [SKIP][42] ([i915#6497]) +2 similar issues
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-tglb1/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-gtt.html
* igt@kms_plane_lowres@tiling-y@pipe-c-hdmi-a-1:
- shard-glk: [PASS][43] -> [FAIL][44] ([i915#1888])
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-glk1/igt@kms_plane_lowres@tiling-y@pipe-c-hdmi-a-1.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-glk5/igt@kms_plane_lowres@tiling-y@pipe-c-hdmi-a-1.html
* igt@kms_plane_scaling@plane-upscale-with-rotation-factor-0-25@pipe-c-edp-1:
- shard-tglb: NOTRUN -> [SKIP][45] ([i915#5176]) +3 similar issues
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-tglb1/igt@kms_plane_scaling@plane-upscale-with-rotation-factor-0-25@pipe-c-edp-1.html
* igt@kms_psr2_su@frontbuffer-xrgb8888:
- shard-apl: NOTRUN -> [SKIP][46] ([fdo#109271] / [i915#658])
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-apl8/igt@kms_psr2_su@frontbuffer-xrgb8888.html
* igt@kms_psr2_su@page_flip-nv12:
- shard-tglb: NOTRUN -> [SKIP][47] ([i915#1911])
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-tglb1/igt@kms_psr2_su@page_flip-nv12.html
* igt@kms_psr@psr2_cursor_mmap_gtt:
- shard-iclb: [PASS][48] -> [SKIP][49] ([fdo#109441]) +1 similar issue
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-iclb2/igt@kms_psr@psr2_cursor_mmap_gtt.html
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-iclb1/igt@kms_psr@psr2_cursor_mmap_gtt.html
* igt@nouveau_crc@pipe-b-source-rg:
- shard-tglb: NOTRUN -> [SKIP][50] ([i915#2530])
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-tglb1/igt@nouveau_crc@pipe-b-source-rg.html
* igt@prime_nv_pcopy@test3_4:
- shard-tglb: NOTRUN -> [SKIP][51] ([fdo#109291])
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-tglb1/igt@prime_nv_pcopy@test3_4.html
* igt@prime_vgem@coherency-gtt:
- shard-tglb: NOTRUN -> [SKIP][52] ([fdo#109295] / [fdo#111656])
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-tglb1/igt@prime_vgem@coherency-gtt.html
* igt@sysfs_clients@fair-0:
- shard-tglb: NOTRUN -> [SKIP][53] ([i915#2994])
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-tglb1/igt@sysfs_clients@fair-0.html
#### Possible fixes ####
* igt@drm_import_export@prime:
- shard-apl: [DMESG-WARN][54] ([i915#6864]) -> [PASS][55]
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-apl8/igt@drm_import_export@prime.html
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-apl6/igt@drm_import_export@prime.html
* igt@gem_ctx_exec@basic-nohangcheck:
- shard-tglb: [FAIL][56] ([i915#6268]) -> [PASS][57]
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-tglb7/igt@gem_ctx_exec@basic-nohangcheck.html
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-tglb5/igt@gem_ctx_exec@basic-nohangcheck.html
* igt@gem_exec_balancer@parallel-bb-first:
- shard-iclb: [SKIP][58] ([i915#4525]) -> [PASS][59] +2 similar issues
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-iclb8/igt@gem_exec_balancer@parallel-bb-first.html
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-iclb4/igt@gem_exec_balancer@parallel-bb-first.html
* igt@gem_exec_fair@basic-none-solo@rcs0:
- shard-apl: [FAIL][60] ([i915#2842]) -> [PASS][61] +1 similar issue
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-apl6/igt@gem_exec_fair@basic-none-solo@rcs0.html
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-apl2/igt@gem_exec_fair@basic-none-solo@rcs0.html
* igt@gem_exec_fair@basic-none-vip@rcs0:
- shard-glk: [FAIL][62] ([i915#2842]) -> [PASS][63]
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-glk1/igt@gem_exec_fair@basic-none-vip@rcs0.html
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-glk5/igt@gem_exec_fair@basic-none-vip@rcs0.html
* igt@i915_module_load@reload-with-fault-injection:
- shard-snb: [DMESG-WARN][64] -> [PASS][65]
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-snb2/igt@i915_module_load@reload-with-fault-injection.html
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-snb7/igt@i915_module_load@reload-with-fault-injection.html
* igt@kms_lease@lessee_list:
- shard-snb: [SKIP][66] ([fdo#109271]) -> [PASS][67]
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-snb2/igt@kms_lease@lessee_list.html
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-snb4/igt@kms_lease@lessee_list.html
* igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b-planes:
- shard-apl: [DMESG-WARN][68] ([i915#180]) -> [PASS][69] +3 similar issues
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-apl2/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b-planes.html
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-apl8/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b-planes.html
* igt@kms_psr@psr2_primary_render:
- shard-iclb: [SKIP][70] ([fdo#109441]) -> [PASS][71] +1 similar issue
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-iclb7/igt@kms_psr@psr2_primary_render.html
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-iclb2/igt@kms_psr@psr2_primary_render.html
#### Warnings ####
* igt@gem_pxp@display-protected-crc:
- shard-tglb: [INCOMPLETE][72] -> [SKIP][73] ([i915#4270])
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-tglb8/igt@gem_pxp@display-protected-crc.html
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-tglb1/igt@gem_pxp@display-protected-crc.html
* igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-sf:
- shard-iclb: [SKIP][74] ([i915#2920]) -> [SKIP][75] ([i915#658])
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-iclb2/igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-sf.html
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-iclb1/igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-sf.html
* igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area:
- shard-iclb: [SKIP][76] ([fdo#111068] / [i915#658]) -> [SKIP][77] ([i915#2920])
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-iclb7/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area.html
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-iclb2/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area.html
* igt@kms_psr2_sf@plane-move-sf-dmg-area:
- shard-iclb: [SKIP][78] ([i915#2920]) -> [SKIP][79] ([fdo#111068] / [i915#658])
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-iclb2/igt@kms_psr2_sf@plane-move-sf-dmg-area.html
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-iclb1/igt@kms_psr2_sf@plane-move-sf-dmg-area.html
* igt@runner@aborted:
- shard-apl: ([FAIL][80], [FAIL][81], [FAIL][82], [FAIL][83], [FAIL][84], [FAIL][85]) ([i915#180] / [i915#3002] / [i915#4312] / [i915#5257] / [i915#6599]) -> ([FAIL][86], [FAIL][87], [FAIL][88], [FAIL][89], [FAIL][90]) ([fdo#109271] / [i915#180] / [i915#3002] / [i915#4312] / [i915#5257] / [i915#6599])
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-apl1/igt@runner@aborted.html
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-apl1/igt@runner@aborted.html
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-apl3/igt@runner@aborted.html
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-apl2/igt@runner@aborted.html
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-apl6/igt@runner@aborted.html
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12148/shard-apl8/igt@runner@aborted.html
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-apl7/igt@runner@aborted.html
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-apl2/igt@runner@aborted.html
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-apl6/igt@runner@aborted.html
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-apl1/igt@runner@aborted.html
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/shard-apl2/igt@runner@aborted.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109283]: https://bugs.freedesktop.org/show_bug.cgi?id=109283
[fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[fdo#109309]: https://bugs.freedesktop.org/show_bug.cgi?id=109309
[fdo#109312]: https://bugs.freedesktop.org/show_bug.cgi?id=109312
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
[fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
[fdo#111644]: https://bugs.freedesktop.org/show_bug.cgi?id=111644
[fdo#111656]: https://bugs.freedesktop.org/show_bug.cgi?id=111656
[fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1063]: https://gitlab.freedesktop.org/drm/intel/issues/1063
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
[i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888
[i915#1902]: https://gitlab.freedesktop.org/drm/intel/issues/1902
[i915#1911]: https://gitlab.freedesktop.org/drm/intel/issues/1911
[i915#2411]: https://gitlab.freedesktop.org/drm/intel/issues/2411
[i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
[i915#2530]: https://gitlab.freedesktop.org/drm/intel/issues/2530
[i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
[i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
[i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705
[i915#280]: https://gitlab.freedesktop.org/drm/intel/issues/280
[i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
[i915#2846]: https://gitlab.freedesktop.org/drm/intel/issues/2846
[i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
[i915#2920]: https://gitlab.freedesktop.org/drm/intel/issues/2920
[i915#2994]: https://gitlab.freedesktop.org/drm/intel/issues/2994
[i915#3002]: https://gitlab.freedesktop.org/drm/intel/issues/3002
[i915#3012]: https://gitlab.freedesktop.org/drm/intel/issues/3012
[i915#3116]: https://gitlab.freedesktop.org/drm/intel/issues/3116
[i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
[i915#3299]: https://gitlab.freedesktop.org/drm/intel/issues/3299
[i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
[i915#3376]: https://gitlab.freedesktop.org/drm/intel/issues/3376
[i915#3528]: https://gitlab.freedesktop.org/drm/intel/issues/3528
[i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
[i915#3742]: https://gitlab.freedesktop.org/drm/intel/issues/3742
[i915#3826]: https://gitlab.freedesktop.org/drm/intel/issues/3826
[i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840
[i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
[i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
[i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#4525]: https://gitlab.freedesktop.org/drm/intel/issues/4525
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4877]: https://gitlab.freedesktop.org/drm/intel/issues/4877
[i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
[i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
[i915#5257]: https://gitlab.freedesktop.org/drm/intel/issues/5257
[i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
[i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289
[i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
[i915#5982]: https://gitlab.freedesktop.org/drm/intel/issues/5982
[i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
[i915#6268]: https://gitlab.freedesktop.org/drm/intel/issues/6268
[i915#6334]: https://gitlab.freedesktop.org/drm/intel/issues/6334
[i915#6335]: https://gitlab.freedesktop.org/drm/intel/issues/6335
[i915#6433]: https://gitlab.freedesktop.org/drm/intel/issues/6433
[i915#6497]: https://gitlab.freedesktop.org/drm/intel/issues/6497
[i915#6524]: https://gitlab.freedesktop.org/drm/intel/issues/6524
[i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
[i915#6599]: https://gitlab.freedesktop.org/drm/intel/issues/6599
[i915#6864]: https://gitlab.freedesktop.org/drm/intel/issues/6864
Build changes
-------------
* Linux: CI_DRM_12148 -> Patchwork_108685v1
CI-20190529: 20190529
CI_DRM_12148: ba94ceb672ea9f99feb6df2552943dc534d087ab @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6656: 24100c4e181c50e3678aeca9c641b8a43555ad73 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_108685v1: ba94ceb672ea9f99feb6df2552943dc534d087ab @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/index.html
[-- Attachment #2: Type: text/html, Size: 28533 bytes --]
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for Introduce struct cdclk_step
2022-09-17 2:08 ` Dixit, Ashutosh
@ 2022-09-19 6:35 ` Vudum, Lakshminarayana
2022-09-19 16:33 ` Dixit, Ashutosh
0 siblings, 1 reply; 38+ messages in thread
From: Vudum, Lakshminarayana @ 2022-09-19 6:35 UTC (permalink / raw)
To: Dixit, Ashutosh, intel-gfx
Filed a couple of issues and re-reported.
This one Likely a regression?
https://gitlab.freedesktop.org/drm/intel/-/issues/6864
Few tests - dmesg-warn/dmesg-fail/incomplete -BUG: unable to handle page fault for address .*, #PF: supervisor read access in kernel mode, RIP: 0010:__list_add_valid, Call Trace: dma_fence_default_wait, dma_fence_add_callback
https://gitlab.freedesktop.org/drm/intel/-/issues/6863
igt@debugfs_test@read_all_entries - incomplete - BUG: unable to handle page fault for address: ffffc90000bb81a8, RIP: 0010:gen2_read32
Lakshmi.
-----Original Message-----
From: Dixit, Ashutosh <ashutosh.dixit@intel.com>
Sent: Friday, September 16, 2022 7:08 PM
To: intel-gfx@lists.freedesktop.org; Vudum, Lakshminarayana <lakshminarayana.vudum@intel.com>
Cc: Srivatsa, Anusha <anusha.srivatsa@intel.com>
Subject: Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for Introduce struct cdclk_step
On Fri, 16 Sep 2022 18:35:13 -0700, Patchwork wrote:
>
Hi Lakshmi,
> Series: Introduce struct cdclk_step
> URL: https://patchwork.freedesktop.org/series/108685/
> State: failure
> Details:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/index.html
>
> CI Bug Log - changes from CI_DRM_12148 -> Patchwork_108685v1
>
> Summary
>
> FAILURE
>
> Serious unknown changes coming with Patchwork_108685v1 absolutely need
> to be verified manually.
>
> If you think the reported changes have nothing to do with the changes
> introduced in Patchwork_108685v1, please notify your bug team to allow
> them to document this new failure mode, which will reduce false positives in CI.
>
> External URL:
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/index.html
>
> Participating hosts (43 -> 41)
>
> Additional (2): fi-icl-u2 fi-pnv-d510
> Missing (4): fi-ctg-p8600 fi-hsw-4200u fi-bdw-samus bat-dg1-5
>
> Possible new issues
>
> Here are the unknown changes that may have been introduced in Patchwork_108685v1:
>
> IGT changes
>
> Possible regressions
>
> • igt@debugfs_test@read_all_entries:
> □ fi-pnv-d510: NOTRUN -> INCOMPLETE
This failure is unrelated and needs a new bug. Seems to be caused by:
fe5979665f640 ("drm/i915/debugfs: Add perf_limit_reasons in debugfs")
Thanks.
--
Ashutosh
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [Intel-gfx] [PATCH 2/6] drm/i915/display: add cdclk action struct to cdclk_config
2022-09-17 0:44 ` [Intel-gfx] [PATCH 2/6] drm/i915/display: add cdclk action struct to cdclk_config Anusha Srivatsa
@ 2022-09-19 9:26 ` Jani Nikula
2022-09-19 19:32 ` Navare, Manasi
0 siblings, 1 reply; 38+ messages in thread
From: Jani Nikula @ 2022-09-19 9:26 UTC (permalink / raw)
To: Anusha Srivatsa, intel-gfx
On Fri, 16 Sep 2022, Anusha Srivatsa <anusha.srivatsa@intel.com> wrote:
> The struct has the action to be performed - squash, crawl
> or modeset and the corresponding cdclk which is the desired
> cdclk. This is the structure that gets populated during
> atomic check once it is determined what the cdclk change looks
> like
>
> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_cdclk.h | 14 ++++++++++++++
> 1 file changed, 14 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.h b/drivers/gpu/drm/i915/display/intel_cdclk.h
> index c674879a84a5..3869f93e8ad2 100644
> --- a/drivers/gpu/drm/i915/display/intel_cdclk.h
> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.h
> @@ -11,13 +11,27 @@
> #include "intel_display.h"
> #include "intel_global_state.h"
>
> +#define MAX_CDCLK_ACTIONS 1
Okay, this review is just nitpicks, but they'll need to get fixed
eventually so here goes.
No tab after #define.
> +
> struct drm_i915_private;
> struct intel_atomic_state;
> struct intel_crtc_state;
>
> +enum cdclk_sequence {
Needs to be named intel_ something.
> + CDCLK_INVALID_ACTION = -1,
> +
> + CDCLK_SQUASH_ONLY = 0,
> + CDCLK_CRAWL_ONLY,
> + CDCLK_LEGACY,
> +};
> +
> struct intel_cdclk_config {
> unsigned int cdclk, vco, ref, bypass;
> u8 voltage_level;
> + struct cdclk_step {
Needs to be named intel_ something.
Since this is used independently, I'd prefer it to be defined outside of
struct intel_cdclk_config.
> + enum cdclk_sequence action;
> + u32 cdclk;
> + } steps[MAX_CDCLK_ACTIONS];
> };
>
> struct intel_cdclk_state {
--
Jani Nikula, Intel Open Source Graphics Center
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [Intel-gfx] [PATCH 3/6] drm/i915/display: Embed the new struct steps for squashing
2022-09-17 0:44 ` [Intel-gfx] [PATCH 3/6] drm/i915/display: Embed the new struct steps for squashing Anusha Srivatsa
@ 2022-09-19 9:27 ` Jani Nikula
2022-09-19 19:39 ` Navare, Manasi
0 siblings, 1 reply; 38+ messages in thread
From: Jani Nikula @ 2022-09-19 9:27 UTC (permalink / raw)
To: Anusha Srivatsa, intel-gfx
On Fri, 16 Sep 2022, Anusha Srivatsa <anusha.srivatsa@intel.com> wrote:
> Populate the new struct steps for squash case.
>
> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_cdclk.c | 9 ++++++++-
> 1 file changed, 8 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
> index 220d32adbd12..d2e81134b6f2 100644
> --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> @@ -1973,8 +1973,9 @@ static bool intel_cdclk_can_crawl(struct drm_i915_private *dev_priv,
>
> static bool intel_cdclk_can_squash(struct drm_i915_private *dev_priv,
> const struct intel_cdclk_config *a,
> - const struct intel_cdclk_config *b)
> + struct intel_cdclk_config *b)
Why are you dropping const?
> {
> + struct cdclk_step *cdclk_transition = b->steps;
The type name has step, the array is named steps, why is the variable
"transition"?
> /*
> * FIXME should store a bit more state in intel_cdclk_config
> * to differentiate squasher vs. cd2x divider properly. For
> @@ -1984,6 +1985,12 @@ static bool intel_cdclk_can_squash(struct drm_i915_private *dev_priv,
> if (!has_cdclk_squasher(dev_priv))
> return false;
>
> + if (a->cdclk != b->cdclk && a->vco != 0 &&
> + a->vco == b->vco && a->ref == b->ref) {
> + cdclk_transition->action = CDCLK_SQUASH_ONLY;
> + cdclk_transition->cdclk = b->cdclk;
> + }
> +
> return a->cdclk != b->cdclk &&
> a->vco != 0 &&
> a->vco == b->vco &&
--
Jani Nikula, Intel Open Source Graphics Center
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [Intel-gfx] [PATCH 4/6] drm/i915/display: Embed the new struct steps for crawling
2022-09-17 0:44 ` [Intel-gfx] [PATCH 4/6] drm/i915/display: Embed the new struct steps for crawling Anusha Srivatsa
@ 2022-09-19 9:28 ` Jani Nikula
0 siblings, 0 replies; 38+ messages in thread
From: Jani Nikula @ 2022-09-19 9:28 UTC (permalink / raw)
To: Anusha Srivatsa, intel-gfx
On Fri, 16 Sep 2022, Anusha Srivatsa <anusha.srivatsa@intel.com> wrote:
> Populate the new struct steps for crawl case.
>
> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_cdclk.c | 9 ++++++++-
> 1 file changed, 8 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
> index d2e81134b6f2..bb5bbb1ad982 100644
> --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> @@ -1951,8 +1951,9 @@ void intel_cdclk_uninit_hw(struct drm_i915_private *i915)
>
> static bool intel_cdclk_can_crawl(struct drm_i915_private *dev_priv,
> const struct intel_cdclk_config *a,
> - const struct intel_cdclk_config *b)
> + struct intel_cdclk_config *b)
Same here, why are you dropping const?
> {
> + struct cdclk_step *cdclk_transition = b->steps;
Same here about naming.
> int a_div, b_div;
>
> if (!HAS_CDCLK_CRAWL(dev_priv))
> @@ -1965,6 +1966,12 @@ static bool intel_cdclk_can_crawl(struct drm_i915_private *dev_priv,
> a_div = DIV_ROUND_CLOSEST(a->vco, a->cdclk);
> b_div = DIV_ROUND_CLOSEST(b->vco, b->cdclk);
>
> + if (a->vco != 0 && b->vco != 0 && a->vco != b->vco &&
> + a_div == b_div && a->ref == b->ref) {
> + cdclk_transition->action = CDCLK_CRAWL_ONLY;
> + cdclk_transition->cdclk = b->cdclk;
> + }
> +
> return a->vco != 0 && b->vco != 0 &&
> a->vco != b->vco &&
> a_div == b_div &&
--
Jani Nikula, Intel Open Source Graphics Center
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for Introduce struct cdclk_step
2022-09-19 6:35 ` Vudum, Lakshminarayana
@ 2022-09-19 16:33 ` Dixit, Ashutosh
0 siblings, 0 replies; 38+ messages in thread
From: Dixit, Ashutosh @ 2022-09-19 16:33 UTC (permalink / raw)
To: Vudum, Lakshminarayana; +Cc: intel-gfx
On Sun, 18 Sep 2022 23:35:56 -0700, Vudum, Lakshminarayana wrote:
>
Hi Lakshmi,
> Filed a couple of issues and re-reported.
>
> This one Likely a regression?
> https://gitlab.freedesktop.org/drm/intel/-/issues/6864
> Few tests - dmesg-warn/dmesg-fail/incomplete -BUG: unable to handle page fault for address .*, #PF: supervisor read access in kernel mode, RIP: 0010:__list_add_valid, Call Trace: dma_fence_default_wait, dma_fence_add_callback
>
> https://gitlab.freedesktop.org/drm/intel/-/issues/6863
> igt@debugfs_test@read_all_entries - incomplete - BUG: unable to handle page fault for address: ffffc90000bb81a8, RIP: 0010:gen2_read32
Not sure about https://gitlab.freedesktop.org/drm/intel/-/issues/6864, I
didn't see it.
I was mentioning
https://gitlab.freedesktop.org/drm/intel/-/issues/6863. This is a
regression. I have already submitted a fix for it:
https://patchwork.freedesktop.org/series/108747/
Thanks.
--
Ashutosh
> Lakshmi.
>
> -----Original Message-----
> From: Dixit, Ashutosh <ashutosh.dixit@intel.com>
> Sent: Friday, September 16, 2022 7:08 PM
> To: intel-gfx@lists.freedesktop.org; Vudum, Lakshminarayana <lakshminarayana.vudum@intel.com>
> Cc: Srivatsa, Anusha <anusha.srivatsa@intel.com>
> Subject: Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for Introduce struct cdclk_step
>
> On Fri, 16 Sep 2022 18:35:13 -0700, Patchwork wrote:
> >
>
> Hi Lakshmi,
>
> > Series: Introduce struct cdclk_step
> > URL: https://patchwork.freedesktop.org/series/108685/
> > State: failure
> > Details:
> > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/index.html
> >
> > CI Bug Log - changes from CI_DRM_12148 -> Patchwork_108685v1
> >
> > Summary
> >
> > FAILURE
> >
> > Serious unknown changes coming with Patchwork_108685v1 absolutely need
> > to be verified manually.
> >
> > If you think the reported changes have nothing to do with the changes
> > introduced in Patchwork_108685v1, please notify your bug team to allow
> > them to document this new failure mode, which will reduce false positives in CI.
> >
> > External URL:
> > https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_108685v1/index.html
> >
> > Participating hosts (43 -> 41)
> >
> > Additional (2): fi-icl-u2 fi-pnv-d510
> > Missing (4): fi-ctg-p8600 fi-hsw-4200u fi-bdw-samus bat-dg1-5
> >
> > Possible new issues
> >
> > Here are the unknown changes that may have been introduced in Patchwork_108685v1:
> >
> > IGT changes
> >
> > Possible regressions
> >
> > • igt@debugfs_test@read_all_entries:
> > □ fi-pnv-d510: NOTRUN -> INCOMPLETE
>
> This failure is unrelated and needs a new bug. Seems to be caused by:
>
> fe5979665f640 ("drm/i915/debugfs: Add perf_limit_reasons in debugfs")
>
> Thanks.
> --
> Ashutosh
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [Intel-gfx] [PATCH 2/6] drm/i915/display: add cdclk action struct to cdclk_config
2022-09-19 9:26 ` Jani Nikula
@ 2022-09-19 19:32 ` Navare, Manasi
2022-09-19 22:42 ` Srivatsa, Anusha
0 siblings, 1 reply; 38+ messages in thread
From: Navare, Manasi @ 2022-09-19 19:32 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx
On Mon, Sep 19, 2022 at 12:26:19PM +0300, Jani Nikula wrote:
> On Fri, 16 Sep 2022, Anusha Srivatsa <anusha.srivatsa@intel.com> wrote:
> > The struct has the action to be performed - squash, crawl
> > or modeset and the corresponding cdclk which is the desired
> > cdclk. This is the structure that gets populated during
> > atomic check once it is determined what the cdclk change looks
> > like
> >
> > Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_cdclk.h | 14 ++++++++++++++
> > 1 file changed, 14 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.h b/drivers/gpu/drm/i915/display/intel_cdclk.h
> > index c674879a84a5..3869f93e8ad2 100644
> > --- a/drivers/gpu/drm/i915/display/intel_cdclk.h
> > +++ b/drivers/gpu/drm/i915/display/intel_cdclk.h
> > @@ -11,13 +11,27 @@
> > #include "intel_display.h"
> > #include "intel_global_state.h"
> >
> > +#define MAX_CDCLK_ACTIONS 1
>
> Okay, this review is just nitpicks, but they'll need to get fixed
> eventually so here goes.
>
> No tab after #define.
>
> > +
> > struct drm_i915_private;
> > struct intel_atomic_state;
> > struct intel_crtc_state;
> >
> > +enum cdclk_sequence {
>
> Needs to be named intel_ something.
Agree here
>
> > + CDCLK_INVALID_ACTION = -1,
> > +
> > + CDCLK_SQUASH_ONLY = 0,
> > + CDCLK_CRAWL_ONLY,
> > + CDCLK_LEGACY,
> > +};
> > +
> > struct intel_cdclk_config {
> > unsigned int cdclk, vco, ref, bypass;
> > u8 voltage_level;
> > + struct cdclk_step {
>
> Needs to be named intel_ something.
>
> Since this is used independently, I'd prefer it to be defined outside of
> struct intel_cdclk_config.
I think the point of having it as part of intel_cdclk_config is that
because we already pass cdclk_config to set_cdclk where these actions
are going to get used.
Manasi
>
> > + enum cdclk_sequence action;
> > + u32 cdclk;
> > + } steps[MAX_CDCLK_ACTIONS];
> > };
> >
> > struct intel_cdclk_state {
>
> --
> Jani Nikula, Intel Open Source Graphics Center
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [Intel-gfx] [PATCH 3/6] drm/i915/display: Embed the new struct steps for squashing
2022-09-19 9:27 ` Jani Nikula
@ 2022-09-19 19:39 ` Navare, Manasi
2022-09-19 22:54 ` Srivatsa, Anusha
0 siblings, 1 reply; 38+ messages in thread
From: Navare, Manasi @ 2022-09-19 19:39 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx
On Mon, Sep 19, 2022 at 12:27:55PM +0300, Jani Nikula wrote:
> On Fri, 16 Sep 2022, Anusha Srivatsa <anusha.srivatsa@intel.com> wrote:
> > Populate the new struct steps for squash case.
> >
> > Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_cdclk.c | 9 ++++++++-
> > 1 file changed, 8 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
> > index 220d32adbd12..d2e81134b6f2 100644
> > --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> > +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> > @@ -1973,8 +1973,9 @@ static bool intel_cdclk_can_crawl(struct drm_i915_private *dev_priv,
> >
> > static bool intel_cdclk_can_squash(struct drm_i915_private *dev_priv,
> > const struct intel_cdclk_config *a,
> > - const struct intel_cdclk_config *b)
> > + struct intel_cdclk_config *b)
>
> Why are you dropping const?
>
> > {
> > + struct cdclk_step *cdclk_transition = b->steps;
>
> The type name has step, the array is named steps, why is the variable
> "transition"?
Yes I agree that the name cdclk_tranistion is confusing rather having
cdclk_transition is unnecessary.
Why cant you directly access b->steps->action, b->steps->cdclk
Manasi
>
> > /*
> > * FIXME should store a bit more state in intel_cdclk_config
> > * to differentiate squasher vs. cd2x divider properly. For
> > @@ -1984,6 +1985,12 @@ static bool intel_cdclk_can_squash(struct drm_i915_private *dev_priv,
> > if (!has_cdclk_squasher(dev_priv))
> > return false;
> >
> > + if (a->cdclk != b->cdclk && a->vco != 0 &&
> > + a->vco == b->vco && a->ref == b->ref) {
> > + cdclk_transition->action = CDCLK_SQUASH_ONLY;
> > + cdclk_transition->cdclk = b->cdclk;
> > + }
> > +
> > return a->cdclk != b->cdclk &&
> > a->vco != 0 &&
> > a->vco == b->vco &&
>
> --
> Jani Nikula, Intel Open Source Graphics Center
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [Intel-gfx] [PATCH 6/6] drm/i915/display: Dump the new cdclk config values
2022-09-17 0:44 ` [Intel-gfx] [PATCH 6/6] drm/i915/display: Dump the new cdclk config values Anusha Srivatsa
@ 2022-09-19 19:46 ` Navare, Manasi
2022-09-19 21:10 ` Rodrigo Vivi
2022-09-20 7:27 ` Jani Nikula
1 sibling, 1 reply; 38+ messages in thread
From: Navare, Manasi @ 2022-09-19 19:46 UTC (permalink / raw)
To: Anusha Srivatsa; +Cc: intel-gfx
On Fri, Sep 16, 2022 at 05:44:04PM -0700, Anusha Srivatsa wrote:
> Add a helper function to get stringify values of the
> desired cdclk action and dump it with rest of the
> cdclk config values
>
> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
Please add Suggested-by: field to give proper credits as per our
discussion. This applies to other patches as well to add proper credits
to other folks who suggested design changes/ fixes.
This needs to be followed as per the upstream patch review methodology.
> ---
> drivers/gpu/drm/i915/display/intel_cdclk.c | 18 ++++++++++++++++--
> 1 file changed, 16 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
> index bc627daade3e..12f5e4d23245 100644
> --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> @@ -1688,6 +1688,19 @@ static u32 cdclk_squash_waveform(struct drm_i915_private *dev_priv,
>
> return 0xffff;
> }
Missing newline causing checkpatch error
Manasi
> +static const char *cdclk_sequence_to_string(enum cdclk_sequence cdclk_sequence)
> +{
> + switch (cdclk_sequence) {
> + case CDCLK_SQUASH_ONLY:
> + return "Squash only";
> + case CDCLK_CRAWL_ONLY:
> + return "Crawl only";
> + case CDCLK_LEGACY:
> + return "Legacy method";
> + default:
> + return "Not a valid cdclk sequence";
> + }
> +}
>
> static void dg2_prog_squash_ctl(struct drm_i915_private *i915, u16 waveform)
> {
> @@ -2083,10 +2096,11 @@ void intel_cdclk_dump_config(struct drm_i915_private *i915,
> const struct intel_cdclk_config *cdclk_config,
> const char *context)
> {
> - drm_dbg_kms(&i915->drm, "%s %d kHz, VCO %d kHz, ref %d kHz, bypass %d kHz, voltage level %d\n",
> + drm_dbg_kms(&i915->drm, "%s %d kHz, VCO %d kHz, ref %d kHz, bypass %d kHz, voltage level %d, %s action\n",
> context, cdclk_config->cdclk, cdclk_config->vco,
> cdclk_config->ref, cdclk_config->bypass,
> - cdclk_config->voltage_level);
> + cdclk_config->voltage_level,
> + cdclk_sequence_to_string(cdclk_config->steps->action));
> }
>
> /**
> --
> 2.25.1
>
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [Intel-gfx] [PATCH 0/6] Introduce struct cdclk_step
2022-09-17 0:43 [Intel-gfx] [PATCH 0/6] Introduce struct cdclk_step Anusha Srivatsa
` (11 preceding siblings ...)
2022-09-19 6:25 ` [Intel-gfx] ✓ Fi.CI.IGT: success " Patchwork
@ 2022-09-19 19:48 ` Navare, Manasi
2022-09-20 8:20 ` Ville Syrjälä
13 siblings, 0 replies; 38+ messages in thread
From: Navare, Manasi @ 2022-09-19 19:48 UTC (permalink / raw)
To: Anusha Srivatsa; +Cc: intel-gfx, Rodrigo Vivi
Please find the review commenst for the respective patches.
Also as a general rule, please add/ copy all folks nvolved in offline
discussions/ triage help in order to accelerate reviews and get feedback
from all.
Manasi
On Fri, Sep 16, 2022 at 05:43:58PM -0700, Anusha Srivatsa wrote:
> This is a prep series for the actual cdclk refactoring
> that will be sent following this. Idea is to have a
> struct - cdclk_step that holds the following:
> - cdclk action (squash, crawl or modeset)
> - cdclk frequency
> which gets populated in atomic check. Driver
> uses the populated values during atomic commit
> to do the suitable sequence of actions like
> programming squash ctl registers in case of squashing
> or PLL sequence incase of modeset and so on.
>
> This series just addresses the initial idea. The actual plumming
> in the atomic commit phase will be sent shortly.
>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Uma Shankar <uma.shankar@intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
>
> Anusha Srivatsa (6):
> drm/i915/display Add dg2_prog_squash_ctl() helper
> drm/i915/display: add cdclk action struct to cdclk_config
> drm/i915/display: Embed the new struct steps for squashing
> drm/i915/display: Embed the new struct steps for crawling
> drm/i915/display: Embed the new struct steps for modeset
> drm/i915/display: Dump the new cdclk config values
>
> drivers/gpu/drm/i915/display/intel_cdclk.c | 77 +++++++++++++++++-----
> drivers/gpu/drm/i915/display/intel_cdclk.h | 16 ++++-
> 2 files changed, 74 insertions(+), 19 deletions(-)
>
> --
> 2.25.1
>
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [Intel-gfx] [PATCH 6/6] drm/i915/display: Dump the new cdclk config values
2022-09-19 19:46 ` Navare, Manasi
@ 2022-09-19 21:10 ` Rodrigo Vivi
2022-09-19 22:35 ` Navare, Manasi
0 siblings, 1 reply; 38+ messages in thread
From: Rodrigo Vivi @ 2022-09-19 21:10 UTC (permalink / raw)
To: Navare, Manasi; +Cc: intel-gfx
On Mon, Sep 19, 2022 at 12:46:45PM -0700, Navare, Manasi wrote:
> On Fri, Sep 16, 2022 at 05:44:04PM -0700, Anusha Srivatsa wrote:
> > Add a helper function to get stringify values of the
> > desired cdclk action and dump it with rest of the
> > cdclk config values
> >
> > Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
>
> Please add Suggested-by: field to give proper credits as per our
> discussion. This applies to other patches as well to add proper credits
> to other folks who suggested design changes/ fixes.
> This needs to be followed as per the upstream patch review methodology.
Having the suggested by is a good way to give the proper credits when the whole
big idea and design was co authored, or started by the other developer.
We really need to mind about it. However it is not a very good thing for all
of the patches we have. Many ideas come out of conversation with many folks
and we cannot simply start adding the suggested by list with all the names
involved.
There's always a threshold there that we should mind. And the official rule
as reference is this one:
"A Suggested-by: tag indicates that the patch idea is suggested by the person
named and ensures credit to the person for the idea. Please note that this tag
should not be added without the reporter’s permission, especially if the idea
was not posted in a public forum." [1]
As a reference we don't keep adding official suggested-by tags for any and all
of the suggestions we receive during reviews. The simple name version in the
commit message is what we traditionally uses for small things.
Looking to the history of this series here I see that this patch looks like
an evolution of the previous series with small increment and suggestions from
multiple folks. Not sure if it is really worthwhile to have to add the official
tag and start to ping everyone to get the ack if it is okay or not to add it.
[1] - https://www.kernel.org/doc/html/latest/process/submitting-patches.html#using-reported-by-tested-by-reviewed-by-suggested-by-and-fixes
>
> > ---
> > drivers/gpu/drm/i915/display/intel_cdclk.c | 18 ++++++++++++++++--
> > 1 file changed, 16 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
> > index bc627daade3e..12f5e4d23245 100644
> > --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> > +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> > @@ -1688,6 +1688,19 @@ static u32 cdclk_squash_waveform(struct drm_i915_private *dev_priv,
> >
> > return 0xffff;
> > }
>
> Missing newline causing checkpatch error
>
> Manasi
>
> > +static const char *cdclk_sequence_to_string(enum cdclk_sequence cdclk_sequence)
> > +{
> > + switch (cdclk_sequence) {
> > + case CDCLK_SQUASH_ONLY:
> > + return "Squash only";
> > + case CDCLK_CRAWL_ONLY:
> > + return "Crawl only";
> > + case CDCLK_LEGACY:
> > + return "Legacy method";
> > + default:
> > + return "Not a valid cdclk sequence";
> > + }
> > +}
> >
> > static void dg2_prog_squash_ctl(struct drm_i915_private *i915, u16 waveform)
> > {
> > @@ -2083,10 +2096,11 @@ void intel_cdclk_dump_config(struct drm_i915_private *i915,
> > const struct intel_cdclk_config *cdclk_config,
> > const char *context)
> > {
> > - drm_dbg_kms(&i915->drm, "%s %d kHz, VCO %d kHz, ref %d kHz, bypass %d kHz, voltage level %d\n",
> > + drm_dbg_kms(&i915->drm, "%s %d kHz, VCO %d kHz, ref %d kHz, bypass %d kHz, voltage level %d, %s action\n",
> > context, cdclk_config->cdclk, cdclk_config->vco,
> > cdclk_config->ref, cdclk_config->bypass,
> > - cdclk_config->voltage_level);
> > + cdclk_config->voltage_level,
> > + cdclk_sequence_to_string(cdclk_config->steps->action));
> > }
> >
> > /**
> > --
> > 2.25.1
> >
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [Intel-gfx] [PATCH 6/6] drm/i915/display: Dump the new cdclk config values
2022-09-19 21:10 ` Rodrigo Vivi
@ 2022-09-19 22:35 ` Navare, Manasi
0 siblings, 0 replies; 38+ messages in thread
From: Navare, Manasi @ 2022-09-19 22:35 UTC (permalink / raw)
To: Rodrigo Vivi; +Cc: intel-gfx
On Mon, Sep 19, 2022 at 05:10:47PM -0400, Rodrigo Vivi wrote:
> On Mon, Sep 19, 2022 at 12:46:45PM -0700, Navare, Manasi wrote:
> > On Fri, Sep 16, 2022 at 05:44:04PM -0700, Anusha Srivatsa wrote:
> > > Add a helper function to get stringify values of the
> > > desired cdclk action and dump it with rest of the
> > > cdclk config values
> > >
> > > Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> >
> > Please add Suggested-by: field to give proper credits as per our
> > discussion. This applies to other patches as well to add proper credits
> > to other folks who suggested design changes/ fixes.
> > This needs to be followed as per the upstream patch review methodology.
>
> Having the suggested by is a good way to give the proper credits when the whole
> big idea and design was co authored, or started by the other developer.
>
> We really need to mind about it. However it is not a very good thing for all
> of the patches we have. Many ideas come out of conversation with many folks
> and we cannot simply start adding the suggested by list with all the names
> involved.
>
> There's always a threshold there that we should mind. And the official rule
> as reference is this one:
>
> "A Suggested-by: tag indicates that the patch idea is suggested by the person
> named and ensures credit to the person for the idea. Please note that this tag
> should not be added without the reporter’s permission, especially if the idea
> was not posted in a public forum." [1]
>
> As a reference we don't keep adding official suggested-by tags for any and all
> of the suggestions we receive during reviews. The simple name version in the
> commit message is what we traditionally uses for small things.
Thanks Rodrigo for the inputs. I agree with you in terms of not having
this for all patches. But particularly this patch was a suggestion that
came up through our offline discussion.
And in cases like this it is a good idea to be mindful about and give
respectful credits. For internal folks its not a big deal, but
Just want to make sure we dont lose the credibility in the community if
this is missed for external folks. People do spend time reviewing and
suggesting and improving codebase so it is good to be respectful and add
the tags for patches that are entirely someone else's suggestion.
Manasi
>
> Looking to the history of this series here I see that this patch looks like
> an evolution of the previous series with small increment and suggestions from
> multiple folks. Not sure if it is really worthwhile to have to add the official
> tag and start to ping everyone to get the ack if it is okay or not to add it.
>
> [1] - https://www.kernel.org/doc/html/latest/process/submitting-patches.html#using-reported-by-tested-by-reviewed-by-suggested-by-and-fixes
>
> >
> > > ---
> > > drivers/gpu/drm/i915/display/intel_cdclk.c | 18 ++++++++++++++++--
> > > 1 file changed, 16 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
> > > index bc627daade3e..12f5e4d23245 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> > > @@ -1688,6 +1688,19 @@ static u32 cdclk_squash_waveform(struct drm_i915_private *dev_priv,
> > >
> > > return 0xffff;
> > > }
> >
> > Missing newline causing checkpatch error
> >
> > Manasi
> >
> > > +static const char *cdclk_sequence_to_string(enum cdclk_sequence cdclk_sequence)
> > > +{
> > > + switch (cdclk_sequence) {
> > > + case CDCLK_SQUASH_ONLY:
> > > + return "Squash only";
> > > + case CDCLK_CRAWL_ONLY:
> > > + return "Crawl only";
> > > + case CDCLK_LEGACY:
> > > + return "Legacy method";
> > > + default:
> > > + return "Not a valid cdclk sequence";
> > > + }
> > > +}
> > >
> > > static void dg2_prog_squash_ctl(struct drm_i915_private *i915, u16 waveform)
> > > {
> > > @@ -2083,10 +2096,11 @@ void intel_cdclk_dump_config(struct drm_i915_private *i915,
> > > const struct intel_cdclk_config *cdclk_config,
> > > const char *context)
> > > {
> > > - drm_dbg_kms(&i915->drm, "%s %d kHz, VCO %d kHz, ref %d kHz, bypass %d kHz, voltage level %d\n",
> > > + drm_dbg_kms(&i915->drm, "%s %d kHz, VCO %d kHz, ref %d kHz, bypass %d kHz, voltage level %d, %s action\n",
> > > context, cdclk_config->cdclk, cdclk_config->vco,
> > > cdclk_config->ref, cdclk_config->bypass,
> > > - cdclk_config->voltage_level);
> > > + cdclk_config->voltage_level,
> > > + cdclk_sequence_to_string(cdclk_config->steps->action));
> > > }
> > >
> > > /**
> > > --
> > > 2.25.1
> > >
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [Intel-gfx] [PATCH 2/6] drm/i915/display: add cdclk action struct to cdclk_config
2022-09-19 19:32 ` Navare, Manasi
@ 2022-09-19 22:42 ` Srivatsa, Anusha
2022-09-20 6:55 ` Jani Nikula
0 siblings, 1 reply; 38+ messages in thread
From: Srivatsa, Anusha @ 2022-09-19 22:42 UTC (permalink / raw)
To: Navare, Manasi D, Jani Nikula; +Cc: intel-gfx
> -----Original Message-----
> From: Navare, Manasi D <manasi.d.navare@intel.com>
> Sent: Monday, September 19, 2022 12:33 PM
> To: Jani Nikula <jani.nikula@linux.intel.com>
> Cc: Srivatsa, Anusha <anusha.srivatsa@intel.com>; intel-
> gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 2/6] drm/i915/display: add cdclk action struct
> to cdclk_config
>
> On Mon, Sep 19, 2022 at 12:26:19PM +0300, Jani Nikula wrote:
> > On Fri, 16 Sep 2022, Anusha Srivatsa <anusha.srivatsa@intel.com> wrote:
> > > The struct has the action to be performed - squash, crawl or modeset
> > > and the corresponding cdclk which is the desired cdclk. This is the
> > > structure that gets populated during atomic check once it is
> > > determined what the cdclk change looks like
> > >
> > > Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> > > ---
> > > drivers/gpu/drm/i915/display/intel_cdclk.h | 14 ++++++++++++++
> > > 1 file changed, 14 insertions(+)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.h
> > > b/drivers/gpu/drm/i915/display/intel_cdclk.h
> > > index c674879a84a5..3869f93e8ad2 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_cdclk.h
> > > +++ b/drivers/gpu/drm/i915/display/intel_cdclk.h
> > > @@ -11,13 +11,27 @@
> > > #include "intel_display.h"
> > > #include "intel_global_state.h"
> > >
> > > +#define MAX_CDCLK_ACTIONS 1
> >
> > Okay, this review is just nitpicks, but they'll need to get fixed
> > eventually so here goes.
> >
> > No tab after #define.
> >
> > > +
> > > struct drm_i915_private;
> > > struct intel_atomic_state;
> > > struct intel_crtc_state;
> > >
> > > +enum cdclk_sequence {
> >
> > Needs to be named intel_ something.
>
> Agree here
Agree with all the above. Will make the suitable changes.
> >
> > > + CDCLK_INVALID_ACTION = -1,
> > > +
> > > + CDCLK_SQUASH_ONLY = 0,
> > > + CDCLK_CRAWL_ONLY,
> > > + CDCLK_LEGACY,
> > > +};
> > > +
> > > struct intel_cdclk_config {
> > > unsigned int cdclk, vco, ref, bypass;
> > > u8 voltage_level;
> > > + struct cdclk_step {
> >
> > Needs to be named intel_ something.
> >
> > Since this is used independently, I'd prefer it to be defined outside
> > of struct intel_cdclk_config.
>
> I think the point of having it as part of intel_cdclk_config is that because we
> already pass cdclk_config to set_cdclk where these actions are going to get
> used.
Yes. That is correct. This eventually gets used in bxt_set_cdclk() and we are already passing cdclk_config there. Having this new struct embedded in cdclk_config makes the fields - action and cdclk to be accessible without having to change the function signature of set_cdclk()
Anusha
> Manasi
>
> >
> > > + enum cdclk_sequence action;
> > > + u32 cdclk;
> > > + } steps[MAX_CDCLK_ACTIONS];
> > > };
> > >
> > > struct intel_cdclk_state {
> >
> > --
> > Jani Nikula, Intel Open Source Graphics Center
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [Intel-gfx] [PATCH 3/6] drm/i915/display: Embed the new struct steps for squashing
2022-09-19 19:39 ` Navare, Manasi
@ 2022-09-19 22:54 ` Srivatsa, Anusha
0 siblings, 0 replies; 38+ messages in thread
From: Srivatsa, Anusha @ 2022-09-19 22:54 UTC (permalink / raw)
To: Navare, Manasi D, Jani Nikula; +Cc: intel-gfx
> -----Original Message-----
> From: Navare, Manasi D <manasi.d.navare@intel.com>
> Sent: Monday, September 19, 2022 12:39 PM
> To: Jani Nikula <jani.nikula@linux.intel.com>
> Cc: Srivatsa, Anusha <anusha.srivatsa@intel.com>; intel-
> gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 3/6] drm/i915/display: Embed the new struct
> steps for squashing
>
> On Mon, Sep 19, 2022 at 12:27:55PM +0300, Jani Nikula wrote:
> > On Fri, 16 Sep 2022, Anusha Srivatsa <anusha.srivatsa@intel.com> wrote:
> > > Populate the new struct steps for squash case.
> > >
> > > Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> > > ---
> > > drivers/gpu/drm/i915/display/intel_cdclk.c | 9 ++++++++-
> > > 1 file changed, 8 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c
> > > b/drivers/gpu/drm/i915/display/intel_cdclk.c
> > > index 220d32adbd12..d2e81134b6f2 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> > > @@ -1973,8 +1973,9 @@ static bool intel_cdclk_can_crawl(struct
> > > drm_i915_private *dev_priv,
> > >
> > > static bool intel_cdclk_can_squash(struct drm_i915_private *dev_priv,
> > > const struct intel_cdclk_config *a,
> > > - const struct intel_cdclk_config *b)
> > > + struct intel_cdclk_config *b)
> >
> > Why are you dropping const?
@Jani Nikula @Navare, Manasi D
Looking at intel_modeset_calc_cdclk() from where this function is called, new_cdclk_state is not a const. Since we are going to be populating it in intel_cdclk_can_squash() and in intel_cdclk_can_crawl() in the next patch, keeping it non-const made sense.
> >
> > > {
> > > + struct cdclk_step *cdclk_transition = b->steps;
> >
> > The type name has step, the array is named steps, why is the variable
> > "transition"?
>
> Yes I agree that the name cdclk_tranistion is confusing rather having
> cdclk_transition is unnecessary.
> Why cant you directly access b->steps->action, b->steps->cdclk
>
Now that I look at it again, I see that cdclk_transition might be confusing. I will either rename it or directly access it as Manasi suggested.
Anusha
> Manasi
>
> >
> > > /*
> > > * FIXME should store a bit more state in intel_cdclk_config
> > > * to differentiate squasher vs. cd2x divider properly. For @@
> > > -1984,6 +1985,12 @@ static bool intel_cdclk_can_squash(struct
> drm_i915_private *dev_priv,
> > > if (!has_cdclk_squasher(dev_priv))
> > > return false;
> > >
> > > + if (a->cdclk != b->cdclk && a->vco != 0 &&
> > > + a->vco == b->vco && a->ref == b->ref) {
> > > + cdclk_transition->action = CDCLK_SQUASH_ONLY;
> > > + cdclk_transition->cdclk = b->cdclk;
> > > + }
> > > +
> > > return a->cdclk != b->cdclk &&
> > > a->vco != 0 &&
> > > a->vco == b->vco &&
> >
> > --
> > Jani Nikula, Intel Open Source Graphics Center
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [Intel-gfx] [PATCH 2/6] drm/i915/display: add cdclk action struct to cdclk_config
2022-09-19 22:42 ` Srivatsa, Anusha
@ 2022-09-20 6:55 ` Jani Nikula
0 siblings, 0 replies; 38+ messages in thread
From: Jani Nikula @ 2022-09-20 6:55 UTC (permalink / raw)
To: Srivatsa, Anusha, Navare, Manasi D; +Cc: intel-gfx
On Mon, 19 Sep 2022, "Srivatsa, Anusha" <anusha.srivatsa@intel.com> wrote:
>> -----Original Message-----
>> From: Navare, Manasi D <manasi.d.navare@intel.com>
>> Sent: Monday, September 19, 2022 12:33 PM
>> To: Jani Nikula <jani.nikula@linux.intel.com>
>> Cc: Srivatsa, Anusha <anusha.srivatsa@intel.com>; intel-
>> gfx@lists.freedesktop.org
>> Subject: Re: [Intel-gfx] [PATCH 2/6] drm/i915/display: add cdclk action struct
>> to cdclk_config
>>
>> On Mon, Sep 19, 2022 at 12:26:19PM +0300, Jani Nikula wrote:
>> > On Fri, 16 Sep 2022, Anusha Srivatsa <anusha.srivatsa@intel.com> wrote:
>> > > The struct has the action to be performed - squash, crawl or modeset
>> > > and the corresponding cdclk which is the desired cdclk. This is the
>> > > structure that gets populated during atomic check once it is
>> > > determined what the cdclk change looks like
>> > >
>> > > Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
>> > > ---
>> > > drivers/gpu/drm/i915/display/intel_cdclk.h | 14 ++++++++++++++
>> > > 1 file changed, 14 insertions(+)
>> > >
>> > > diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.h
>> > > b/drivers/gpu/drm/i915/display/intel_cdclk.h
>> > > index c674879a84a5..3869f93e8ad2 100644
>> > > --- a/drivers/gpu/drm/i915/display/intel_cdclk.h
>> > > +++ b/drivers/gpu/drm/i915/display/intel_cdclk.h
>> > > @@ -11,13 +11,27 @@
>> > > #include "intel_display.h"
>> > > #include "intel_global_state.h"
>> > >
>> > > +#define MAX_CDCLK_ACTIONS 1
>> >
>> > Okay, this review is just nitpicks, but they'll need to get fixed
>> > eventually so here goes.
>> >
>> > No tab after #define.
>> >
>> > > +
>> > > struct drm_i915_private;
>> > > struct intel_atomic_state;
>> > > struct intel_crtc_state;
>> > >
>> > > +enum cdclk_sequence {
>> >
>> > Needs to be named intel_ something.
>>
>> Agree here
>
> Agree with all the above. Will make the suitable changes.
>
>> >
>> > > + CDCLK_INVALID_ACTION = -1,
>> > > +
>> > > + CDCLK_SQUASH_ONLY = 0,
>> > > + CDCLK_CRAWL_ONLY,
>> > > + CDCLK_LEGACY,
>> > > +};
>> > > +
>> > > struct intel_cdclk_config {
>> > > unsigned int cdclk, vco, ref, bypass;
>> > > u8 voltage_level;
>> > > + struct cdclk_step {
>> >
>> > Needs to be named intel_ something.
>> >
>> > Since this is used independently, I'd prefer it to be defined outside
>> > of struct intel_cdclk_config.
>>
>> I think the point of having it as part of intel_cdclk_config is that because we
>> already pass cdclk_config to set_cdclk where these actions are going to get
>> used.
>
> Yes. That is correct. This eventually gets used in bxt_set_cdclk() and
> we are already passing cdclk_config there. Having this new struct
> embedded in cdclk_config makes the fields - action and cdclk to be
> accessible without having to change the function signature of
> set_cdclk()
I referred to defining the *type* outside of struct intel_cdclk_config.
Contrast
struct foo {
struct bar {
...
} baz;
};
with
struct bar {
...
};
struct foo {
struct bar baz;
};
when you actually use struct bar for parameters and local variables.
BR,
Jani.
>
> Anusha
>> Manasi
>>
>> >
>> > > + enum cdclk_sequence action;
>> > > + u32 cdclk;
>> > > + } steps[MAX_CDCLK_ACTIONS];
>> > > };
>> > >
>> > > struct intel_cdclk_state {
>> >
>> > --
>> > Jani Nikula, Intel Open Source Graphics Center
--
Jani Nikula, Intel Open Source Graphics Center
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [Intel-gfx] [PATCH 6/6] drm/i915/display: Dump the new cdclk config values
2022-09-17 0:44 ` [Intel-gfx] [PATCH 6/6] drm/i915/display: Dump the new cdclk config values Anusha Srivatsa
2022-09-19 19:46 ` Navare, Manasi
@ 2022-09-20 7:27 ` Jani Nikula
2022-09-20 18:47 ` Srivatsa, Anusha
1 sibling, 1 reply; 38+ messages in thread
From: Jani Nikula @ 2022-09-20 7:27 UTC (permalink / raw)
To: Anusha Srivatsa, intel-gfx
On Fri, 16 Sep 2022, Anusha Srivatsa <anusha.srivatsa@intel.com> wrote:
> Add a helper function to get stringify values of the
> desired cdclk action and dump it with rest of the
> cdclk config values
>
> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_cdclk.c | 18 ++++++++++++++++--
> 1 file changed, 16 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
> index bc627daade3e..12f5e4d23245 100644
> --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> @@ -1688,6 +1688,19 @@ static u32 cdclk_squash_waveform(struct drm_i915_private *dev_priv,
>
> return 0xffff;
> }
> +static const char *cdclk_sequence_to_string(enum cdclk_sequence cdclk_sequence)
For any enum foobar, this would be customarily called foobar_name(),
i.e. cdclk_sequence_name(). (Though the enum should probably be renamed
as mentioned earlier.)
> +{
> + switch (cdclk_sequence) {
> + case CDCLK_SQUASH_ONLY:
> + return "Squash only";
> + case CDCLK_CRAWL_ONLY:
> + return "Crawl only";
> + case CDCLK_LEGACY:
> + return "Legacy method";
> + default:
> + return "Not a valid cdclk sequence";
> + }
> +}
>
> static void dg2_prog_squash_ctl(struct drm_i915_private *i915, u16 waveform)
> {
> @@ -2083,10 +2096,11 @@ void intel_cdclk_dump_config(struct drm_i915_private *i915,
> const struct intel_cdclk_config *cdclk_config,
> const char *context)
> {
> - drm_dbg_kms(&i915->drm, "%s %d kHz, VCO %d kHz, ref %d kHz, bypass %d kHz, voltage level %d\n",
> + drm_dbg_kms(&i915->drm, "%s %d kHz, VCO %d kHz, ref %d kHz, bypass %d kHz, voltage level %d, %s action\n",
"%s action" leads to:
Squash only action
Crawl only action
Legacy method action
Not a valid cdclk sequence action
A bit odd perhaps. *shrug*
BR,
Jani.
> context, cdclk_config->cdclk, cdclk_config->vco,
> cdclk_config->ref, cdclk_config->bypass,
> - cdclk_config->voltage_level);
> + cdclk_config->voltage_level,
> + cdclk_sequence_to_string(cdclk_config->steps->action));
> }
>
> /**
--
Jani Nikula, Intel Open Source Graphics Center
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [Intel-gfx] [PATCH 0/6] Introduce struct cdclk_step
2022-09-17 0:43 [Intel-gfx] [PATCH 0/6] Introduce struct cdclk_step Anusha Srivatsa
` (12 preceding siblings ...)
2022-09-19 19:48 ` [Intel-gfx] [PATCH 0/6] " Navare, Manasi
@ 2022-09-20 8:20 ` Ville Syrjälä
2022-09-20 18:48 ` Srivatsa, Anusha
13 siblings, 1 reply; 38+ messages in thread
From: Ville Syrjälä @ 2022-09-20 8:20 UTC (permalink / raw)
To: Anusha Srivatsa; +Cc: intel-gfx, Rodrigo Vivi
On Fri, Sep 16, 2022 at 05:43:58PM -0700, Anusha Srivatsa wrote:
> This is a prep series for the actual cdclk refactoring
> that will be sent following this. Idea is to have a
> struct - cdclk_step that holds the following:
> - cdclk action (squash, crawl or modeset)
> - cdclk frequency
> which gets populated in atomic check. Driver
> uses the populated values during atomic commit
> to do the suitable sequence of actions like
> programming squash ctl registers in case of squashing
> or PLL sequence incase of modeset and so on.
>
> This series just addresses the initial idea. The actual plumming
> in the atomic commit phase will be sent shortly.
OK, people keep ignoring what I say so I just typed up the
code quickly. This to me seems like the most straightforward
way to do what we need:
https://github.com/vsyrjala/linux.git cdclk_crawl_and_squash
Totally untested ofc, apart from me doing a quick scan
through our cdclk tables for the crawl+squahs platforms
to make sure that this approach should produce sane values.
>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Uma Shankar <uma.shankar@intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
>
> Anusha Srivatsa (6):
> drm/i915/display Add dg2_prog_squash_ctl() helper
> drm/i915/display: add cdclk action struct to cdclk_config
> drm/i915/display: Embed the new struct steps for squashing
> drm/i915/display: Embed the new struct steps for crawling
> drm/i915/display: Embed the new struct steps for modeset
> drm/i915/display: Dump the new cdclk config values
>
> drivers/gpu/drm/i915/display/intel_cdclk.c | 77 +++++++++++++++++-----
> drivers/gpu/drm/i915/display/intel_cdclk.h | 16 ++++-
> 2 files changed, 74 insertions(+), 19 deletions(-)
>
> --
> 2.25.1
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [Intel-gfx] [PATCH 6/6] drm/i915/display: Dump the new cdclk config values
2022-09-20 7:27 ` Jani Nikula
@ 2022-09-20 18:47 ` Srivatsa, Anusha
0 siblings, 0 replies; 38+ messages in thread
From: Srivatsa, Anusha @ 2022-09-20 18:47 UTC (permalink / raw)
To: Jani Nikula, intel-gfx
> -----Original Message-----
> From: Jani Nikula <jani.nikula@linux.intel.com>
> Sent: Tuesday, September 20, 2022 12:27 AM
> To: Srivatsa, Anusha <anusha.srivatsa@intel.com>; intel-
> gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH 6/6] drm/i915/display: Dump the new cdclk
> config values
>
> On Fri, 16 Sep 2022, Anusha Srivatsa <anusha.srivatsa@intel.com> wrote:
> > Add a helper function to get stringify values of the desired cdclk
> > action and dump it with rest of the cdclk config values
> >
> > Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_cdclk.c | 18 ++++++++++++++++--
> > 1 file changed, 16 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c
> > b/drivers/gpu/drm/i915/display/intel_cdclk.c
> > index bc627daade3e..12f5e4d23245 100644
> > --- a/drivers/gpu/drm/i915/display/intel_cdclk.c
> > +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
> > @@ -1688,6 +1688,19 @@ static u32 cdclk_squash_waveform(struct
> > drm_i915_private *dev_priv,
> >
> > return 0xffff;
> > }
> > +static const char *cdclk_sequence_to_string(enum cdclk_sequence
> > +cdclk_sequence)
>
> For any enum foobar, this would be customarily called foobar_name(), i.e.
> cdclk_sequence_name(). (Though the enum should probably be renamed as
> mentioned earlier.)
Will do. The initial change and then change here.
> > +{
> > + switch (cdclk_sequence) {
> > + case CDCLK_SQUASH_ONLY:
> > + return "Squash only";
> > + case CDCLK_CRAWL_ONLY:
> > + return "Crawl only";
> > + case CDCLK_LEGACY:
> > + return "Legacy method";
> > + default:
> > + return "Not a valid cdclk sequence";
> > + }
> > +}
> >
> > static void dg2_prog_squash_ctl(struct drm_i915_private *i915, u16
> > waveform) { @@ -2083,10 +2096,11 @@ void
> > intel_cdclk_dump_config(struct drm_i915_private *i915,
> > const struct intel_cdclk_config *cdclk_config,
> > const char *context)
> > {
> > - drm_dbg_kms(&i915->drm, "%s %d kHz, VCO %d kHz, ref %d kHz,
> bypass %d kHz, voltage level %d\n",
> > + drm_dbg_kms(&i915->drm, "%s %d kHz, VCO %d kHz, ref %d kHz,
> bypass
> > +%d kHz, voltage level %d, %s action\n",
>
> "%s action" leads to:
>
> Squash only action
> Crawl only action
> Legacy method action
> Not a valid cdclk sequence action
>
> A bit odd perhaps. *shrug*
Yeah now I see it.
Will thin over what can be a better replacement.
Anusha
> BR,
> Jani.
>
> > context, cdclk_config->cdclk, cdclk_config->vco,
> > cdclk_config->ref, cdclk_config->bypass,
> > - cdclk_config->voltage_level);
> > + cdclk_config->voltage_level,
> > + cdclk_sequence_to_string(cdclk_config->steps->action));
> > }
> >
> > /**
>
> --
> Jani Nikula, Intel Open Source Graphics Center
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [Intel-gfx] [PATCH 0/6] Introduce struct cdclk_step
2022-09-20 8:20 ` Ville Syrjälä
@ 2022-09-20 18:48 ` Srivatsa, Anusha
2022-09-20 21:59 ` Ville Syrjälä
0 siblings, 1 reply; 38+ messages in thread
From: Srivatsa, Anusha @ 2022-09-20 18:48 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx, Vivi, Rodrigo
> -----Original Message-----
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Sent: Tuesday, September 20, 2022 1:20 AM
> To: Srivatsa, Anusha <anusha.srivatsa@intel.com>
> Cc: intel-gfx@lists.freedesktop.org; Shankar, Uma
> <uma.shankar@intel.com>; Vivi, Rodrigo <rodrigo.vivi@intel.com>
> Subject: Re: [PATCH 0/6] Introduce struct cdclk_step
>
> On Fri, Sep 16, 2022 at 05:43:58PM -0700, Anusha Srivatsa wrote:
> > This is a prep series for the actual cdclk refactoring that will be
> > sent following this. Idea is to have a struct - cdclk_step that holds
> > the following:
> > - cdclk action (squash, crawl or modeset)
> > - cdclk frequency
> > which gets populated in atomic check. Driver uses the populated values
> > during atomic commit to do the suitable sequence of actions like
> > programming squash ctl registers in case of squashing or PLL sequence
> > incase of modeset and so on.
> >
> > This series just addresses the initial idea. The actual plumming in
> > the atomic commit phase will be sent shortly.
>
> OK, people keep ignoring what I say so I just typed up the code quickly. This
> to me seems like the most straightforward way to do what we need:
> https://github.com/vsyrjala/linux.git cdclk_crawl_and_squash
>
> Totally untested ofc, apart from me doing a quick scan through our cdclk
> tables for the crawl+squahs platforms to make sure that this approach
> should produce sane values.
Ville,
Why have a mid cdclk_config? Cant we use the new-cdclk-config for this purpose?
Anusha
> >
> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Cc: Uma Shankar <uma.shankar@intel.com>
> > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> >
> > Anusha Srivatsa (6):
> > drm/i915/display Add dg2_prog_squash_ctl() helper
> > drm/i915/display: add cdclk action struct to cdclk_config
> > drm/i915/display: Embed the new struct steps for squashing
> > drm/i915/display: Embed the new struct steps for crawling
> > drm/i915/display: Embed the new struct steps for modeset
> > drm/i915/display: Dump the new cdclk config values
> >
> > drivers/gpu/drm/i915/display/intel_cdclk.c | 77
> > +++++++++++++++++----- drivers/gpu/drm/i915/display/intel_cdclk.h |
> > 16 ++++-
> > 2 files changed, 74 insertions(+), 19 deletions(-)
> >
> > --
> > 2.25.1
>
> --
> Ville Syrjälä
> Intel
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [Intel-gfx] [PATCH 0/6] Introduce struct cdclk_step
2022-09-20 18:48 ` Srivatsa, Anusha
@ 2022-09-20 21:59 ` Ville Syrjälä
2022-09-23 16:56 ` Srivatsa, Anusha
0 siblings, 1 reply; 38+ messages in thread
From: Ville Syrjälä @ 2022-09-20 21:59 UTC (permalink / raw)
To: Srivatsa, Anusha; +Cc: intel-gfx, Vivi, Rodrigo
On Tue, Sep 20, 2022 at 06:48:46PM +0000, Srivatsa, Anusha wrote:
>
>
> > -----Original Message-----
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Sent: Tuesday, September 20, 2022 1:20 AM
> > To: Srivatsa, Anusha <anusha.srivatsa@intel.com>
> > Cc: intel-gfx@lists.freedesktop.org; Shankar, Uma
> > <uma.shankar@intel.com>; Vivi, Rodrigo <rodrigo.vivi@intel.com>
> > Subject: Re: [PATCH 0/6] Introduce struct cdclk_step
> >
> > On Fri, Sep 16, 2022 at 05:43:58PM -0700, Anusha Srivatsa wrote:
> > > This is a prep series for the actual cdclk refactoring that will be
> > > sent following this. Idea is to have a struct - cdclk_step that holds
> > > the following:
> > > - cdclk action (squash, crawl or modeset)
> > > - cdclk frequency
> > > which gets populated in atomic check. Driver uses the populated values
> > > during atomic commit to do the suitable sequence of actions like
> > > programming squash ctl registers in case of squashing or PLL sequence
> > > incase of modeset and so on.
> > >
> > > This series just addresses the initial idea. The actual plumming in
> > > the atomic commit phase will be sent shortly.
> >
> > OK, people keep ignoring what I say so I just typed up the code quickly. This
> > to me seems like the most straightforward way to do what we need:
> > https://github.com/vsyrjala/linux.git cdclk_crawl_and_squash
> >
> > Totally untested ofc, apart from me doing a quick scan through our cdclk
> > tables for the crawl+squahs platforms to make sure that this approach
> > should produce sane values.
> Ville,
> Why have a mid cdclk_config? Cant we use the new-cdclk-config for this purpose?
You either
- start at old, crawl to mid, then squash to new
- start at old, squash to mid, then crawl to new
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [Intel-gfx] [PATCH 0/6] Introduce struct cdclk_step
2022-09-20 21:59 ` Ville Syrjälä
@ 2022-09-23 16:56 ` Srivatsa, Anusha
2022-09-23 19:04 ` Ville Syrjälä
0 siblings, 1 reply; 38+ messages in thread
From: Srivatsa, Anusha @ 2022-09-23 16:56 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx, Vivi, Rodrigo
> -----Original Message-----
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Sent: Tuesday, September 20, 2022 2:59 PM
> To: Srivatsa, Anusha <anusha.srivatsa@intel.com>
> Cc: intel-gfx@lists.freedesktop.org; Shankar, Uma
> <uma.shankar@intel.com>; Vivi, Rodrigo <rodrigo.vivi@intel.com>
> Subject: Re: [PATCH 0/6] Introduce struct cdclk_step
>
> On Tue, Sep 20, 2022 at 06:48:46PM +0000, Srivatsa, Anusha wrote:
> >
> >
> > > -----Original Message-----
> > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > Sent: Tuesday, September 20, 2022 1:20 AM
> > > To: Srivatsa, Anusha <anusha.srivatsa@intel.com>
> > > Cc: intel-gfx@lists.freedesktop.org; Shankar, Uma
> > > <uma.shankar@intel.com>; Vivi, Rodrigo <rodrigo.vivi@intel.com>
> > > Subject: Re: [PATCH 0/6] Introduce struct cdclk_step
> > >
> > > On Fri, Sep 16, 2022 at 05:43:58PM -0700, Anusha Srivatsa wrote:
> > > > This is a prep series for the actual cdclk refactoring that will
> > > > be sent following this. Idea is to have a struct - cdclk_step that
> > > > holds the following:
> > > > - cdclk action (squash, crawl or modeset)
> > > > - cdclk frequency
> > > > which gets populated in atomic check. Driver uses the populated
> > > > values during atomic commit to do the suitable sequence of actions
> > > > like programming squash ctl registers in case of squashing or PLL
> > > > sequence incase of modeset and so on.
> > > >
> > > > This series just addresses the initial idea. The actual plumming
> > > > in the atomic commit phase will be sent shortly.
> > >
> > > OK, people keep ignoring what I say so I just typed up the code
> > > quickly. This to me seems like the most straightforward way to do what
> we need:
> > > https://github.com/vsyrjala/linux.git cdclk_crawl_and_squash
> > >
> > > Totally untested ofc, apart from me doing a quick scan through our
> > > cdclk tables for the crawl+squahs platforms to make sure that this
> > > approach should produce sane values.
> > Ville,
> > Why have a mid cdclk_config? Cant we use the new-cdclk-config for this
> purpose?
>
> You either
> - start at old, crawl to mid, then squash to new
> - start at old, squash to mid, then crawl to new
Tested the changes on TGL(legacy) and DG2(squash). Took some time to understand the code but the mid cdclk config logic works. @Ville Syrjälä does replacing the intel_cdclk_can_squash() and intel_cdclk_can_crawl() with your new cdclk_crawl_and_squash in atomic check make sense?
Anusha
> --
> Ville Syrjälä
> Intel
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [Intel-gfx] [PATCH 0/6] Introduce struct cdclk_step
2022-09-23 16:56 ` Srivatsa, Anusha
@ 2022-09-23 19:04 ` Ville Syrjälä
2022-09-26 17:21 ` Srivatsa, Anusha
0 siblings, 1 reply; 38+ messages in thread
From: Ville Syrjälä @ 2022-09-23 19:04 UTC (permalink / raw)
To: Srivatsa, Anusha; +Cc: intel-gfx, Vivi, Rodrigo
On Fri, Sep 23, 2022 at 04:56:53PM +0000, Srivatsa, Anusha wrote:
>
>
> > -----Original Message-----
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Sent: Tuesday, September 20, 2022 2:59 PM
> > To: Srivatsa, Anusha <anusha.srivatsa@intel.com>
> > Cc: intel-gfx@lists.freedesktop.org; Shankar, Uma
> > <uma.shankar@intel.com>; Vivi, Rodrigo <rodrigo.vivi@intel.com>
> > Subject: Re: [PATCH 0/6] Introduce struct cdclk_step
> >
> > On Tue, Sep 20, 2022 at 06:48:46PM +0000, Srivatsa, Anusha wrote:
> > >
> > >
> > > > -----Original Message-----
> > > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > > Sent: Tuesday, September 20, 2022 1:20 AM
> > > > To: Srivatsa, Anusha <anusha.srivatsa@intel.com>
> > > > Cc: intel-gfx@lists.freedesktop.org; Shankar, Uma
> > > > <uma.shankar@intel.com>; Vivi, Rodrigo <rodrigo.vivi@intel.com>
> > > > Subject: Re: [PATCH 0/6] Introduce struct cdclk_step
> > > >
> > > > On Fri, Sep 16, 2022 at 05:43:58PM -0700, Anusha Srivatsa wrote:
> > > > > This is a prep series for the actual cdclk refactoring that will
> > > > > be sent following this. Idea is to have a struct - cdclk_step that
> > > > > holds the following:
> > > > > - cdclk action (squash, crawl or modeset)
> > > > > - cdclk frequency
> > > > > which gets populated in atomic check. Driver uses the populated
> > > > > values during atomic commit to do the suitable sequence of actions
> > > > > like programming squash ctl registers in case of squashing or PLL
> > > > > sequence incase of modeset and so on.
> > > > >
> > > > > This series just addresses the initial idea. The actual plumming
> > > > > in the atomic commit phase will be sent shortly.
> > > >
> > > > OK, people keep ignoring what I say so I just typed up the code
> > > > quickly. This to me seems like the most straightforward way to do what
> > we need:
> > > > https://github.com/vsyrjala/linux.git cdclk_crawl_and_squash
> > > >
> > > > Totally untested ofc, apart from me doing a quick scan through our
> > > > cdclk tables for the crawl+squahs platforms to make sure that this
> > > > approach should produce sane values.
> > > Ville,
> > > Why have a mid cdclk_config? Cant we use the new-cdclk-config for this
> > purpose?
> >
> > You either
> > - start at old, crawl to mid, then squash to new
> > - start at old, squash to mid, then crawl to new
>
> Tested the changes on TGL(legacy) and DG2(squash). Took some time to understand the code but the mid cdclk config logic works. @Ville Syrjälä does replacing the intel_cdclk_can_squash() and intel_cdclk_can_crawl() with your new cdclk_crawl_and_squash in atomic check make sense?
I don't think we should need any real logic at that point.
If we can squash and crawl then I think we can always do
the cdclk change w/o a modeset, at least with what we
currently have defined in the cdclk tables.
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [Intel-gfx] [PATCH 0/6] Introduce struct cdclk_step
2022-09-23 19:04 ` Ville Syrjälä
@ 2022-09-26 17:21 ` Srivatsa, Anusha
2022-09-26 17:29 ` Ville Syrjälä
0 siblings, 1 reply; 38+ messages in thread
From: Srivatsa, Anusha @ 2022-09-26 17:21 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx, Vivi, Rodrigo
> -----Original Message-----
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Sent: Friday, September 23, 2022 12:04 PM
> To: Srivatsa, Anusha <anusha.srivatsa@intel.com>
> Cc: intel-gfx@lists.freedesktop.org; Shankar, Uma
> <uma.shankar@intel.com>; Vivi, Rodrigo <rodrigo.vivi@intel.com>; Navare,
> Manasi D <manasi.d.navare@intel.com>; Roper, Matthew D
> <matthew.d.roper@intel.com>
> Subject: Re: [PATCH 0/6] Introduce struct cdclk_step
>
> On Fri, Sep 23, 2022 at 04:56:53PM +0000, Srivatsa, Anusha wrote:
> >
> >
> > > -----Original Message-----
> > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > Sent: Tuesday, September 20, 2022 2:59 PM
> > > To: Srivatsa, Anusha <anusha.srivatsa@intel.com>
> > > Cc: intel-gfx@lists.freedesktop.org; Shankar, Uma
> > > <uma.shankar@intel.com>; Vivi, Rodrigo <rodrigo.vivi@intel.com>
> > > Subject: Re: [PATCH 0/6] Introduce struct cdclk_step
> > >
> > > On Tue, Sep 20, 2022 at 06:48:46PM +0000, Srivatsa, Anusha wrote:
> > > >
> > > >
> > > > > -----Original Message-----
> > > > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > > > Sent: Tuesday, September 20, 2022 1:20 AM
> > > > > To: Srivatsa, Anusha <anusha.srivatsa@intel.com>
> > > > > Cc: intel-gfx@lists.freedesktop.org; Shankar, Uma
> > > > > <uma.shankar@intel.com>; Vivi, Rodrigo <rodrigo.vivi@intel.com>
> > > > > Subject: Re: [PATCH 0/6] Introduce struct cdclk_step
> > > > >
> > > > > On Fri, Sep 16, 2022 at 05:43:58PM -0700, Anusha Srivatsa wrote:
> > > > > > This is a prep series for the actual cdclk refactoring that
> > > > > > will be sent following this. Idea is to have a struct -
> > > > > > cdclk_step that holds the following:
> > > > > > - cdclk action (squash, crawl or modeset)
> > > > > > - cdclk frequency
> > > > > > which gets populated in atomic check. Driver uses the
> > > > > > populated values during atomic commit to do the suitable
> > > > > > sequence of actions like programming squash ctl registers in
> > > > > > case of squashing or PLL sequence incase of modeset and so on.
> > > > > >
> > > > > > This series just addresses the initial idea. The actual
> > > > > > plumming in the atomic commit phase will be sent shortly.
> > > > >
> > > > > OK, people keep ignoring what I say so I just typed up the code
> > > > > quickly. This to me seems like the most straightforward way to
> > > > > do what
> > > we need:
> > > > > https://github.com/vsyrjala/linux.git cdclk_crawl_and_squash
> > > > >
> > > > > Totally untested ofc, apart from me doing a quick scan through
> > > > > our cdclk tables for the crawl+squahs platforms to make sure
> > > > > that this approach should produce sane values.
> > > > Ville,
> > > > Why have a mid cdclk_config? Cant we use the new-cdclk-config for
> > > > this
> > > purpose?
> > >
> > > You either
> > > - start at old, crawl to mid, then squash to new
> > > - start at old, squash to mid, then crawl to new
> >
> > Tested the changes on TGL(legacy) and DG2(squash). Took some time to
> understand the code but the mid cdclk config logic works. @Ville Syrjälä does
> replacing the intel_cdclk_can_squash() and intel_cdclk_can_crawl() with your
> new cdclk_crawl_and_squash in atomic check make sense?
>
> I don't think we should need any real logic at that point.
> If we can squash and crawl then I think we can always do the cdclk change
> w/o a modeset, at least with what we currently have defined in the cdclk
> tables.
@Ville Syrjälä is this patch in your radar to be sending out to the ML? Or should I send it on your behalf?
Anusha
> --
> Ville Syrjälä
> Intel
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [Intel-gfx] [PATCH 0/6] Introduce struct cdclk_step
2022-09-26 17:21 ` Srivatsa, Anusha
@ 2022-09-26 17:29 ` Ville Syrjälä
2022-09-26 17:55 ` Srivatsa, Anusha
0 siblings, 1 reply; 38+ messages in thread
From: Ville Syrjälä @ 2022-09-26 17:29 UTC (permalink / raw)
To: Srivatsa, Anusha; +Cc: intel-gfx, Vivi, Rodrigo
On Mon, Sep 26, 2022 at 05:21:40PM +0000, Srivatsa, Anusha wrote:
>
>
> > -----Original Message-----
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > Sent: Friday, September 23, 2022 12:04 PM
> > To: Srivatsa, Anusha <anusha.srivatsa@intel.com>
> > Cc: intel-gfx@lists.freedesktop.org; Shankar, Uma
> > <uma.shankar@intel.com>; Vivi, Rodrigo <rodrigo.vivi@intel.com>; Navare,
> > Manasi D <manasi.d.navare@intel.com>; Roper, Matthew D
> > <matthew.d.roper@intel.com>
> > Subject: Re: [PATCH 0/6] Introduce struct cdclk_step
> >
> > On Fri, Sep 23, 2022 at 04:56:53PM +0000, Srivatsa, Anusha wrote:
> > >
> > >
> > > > -----Original Message-----
> > > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > > Sent: Tuesday, September 20, 2022 2:59 PM
> > > > To: Srivatsa, Anusha <anusha.srivatsa@intel.com>
> > > > Cc: intel-gfx@lists.freedesktop.org; Shankar, Uma
> > > > <uma.shankar@intel.com>; Vivi, Rodrigo <rodrigo.vivi@intel.com>
> > > > Subject: Re: [PATCH 0/6] Introduce struct cdclk_step
> > > >
> > > > On Tue, Sep 20, 2022 at 06:48:46PM +0000, Srivatsa, Anusha wrote:
> > > > >
> > > > >
> > > > > > -----Original Message-----
> > > > > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > > > > Sent: Tuesday, September 20, 2022 1:20 AM
> > > > > > To: Srivatsa, Anusha <anusha.srivatsa@intel.com>
> > > > > > Cc: intel-gfx@lists.freedesktop.org; Shankar, Uma
> > > > > > <uma.shankar@intel.com>; Vivi, Rodrigo <rodrigo.vivi@intel.com>
> > > > > > Subject: Re: [PATCH 0/6] Introduce struct cdclk_step
> > > > > >
> > > > > > On Fri, Sep 16, 2022 at 05:43:58PM -0700, Anusha Srivatsa wrote:
> > > > > > > This is a prep series for the actual cdclk refactoring that
> > > > > > > will be sent following this. Idea is to have a struct -
> > > > > > > cdclk_step that holds the following:
> > > > > > > - cdclk action (squash, crawl or modeset)
> > > > > > > - cdclk frequency
> > > > > > > which gets populated in atomic check. Driver uses the
> > > > > > > populated values during atomic commit to do the suitable
> > > > > > > sequence of actions like programming squash ctl registers in
> > > > > > > case of squashing or PLL sequence incase of modeset and so on.
> > > > > > >
> > > > > > > This series just addresses the initial idea. The actual
> > > > > > > plumming in the atomic commit phase will be sent shortly.
> > > > > >
> > > > > > OK, people keep ignoring what I say so I just typed up the code
> > > > > > quickly. This to me seems like the most straightforward way to
> > > > > > do what
> > > > we need:
> > > > > > https://github.com/vsyrjala/linux.git cdclk_crawl_and_squash
> > > > > >
> > > > > > Totally untested ofc, apart from me doing a quick scan through
> > > > > > our cdclk tables for the crawl+squahs platforms to make sure
> > > > > > that this approach should produce sane values.
> > > > > Ville,
> > > > > Why have a mid cdclk_config? Cant we use the new-cdclk-config for
> > > > > this
> > > > purpose?
> > > >
> > > > You either
> > > > - start at old, crawl to mid, then squash to new
> > > > - start at old, squash to mid, then crawl to new
> > >
> > > Tested the changes on TGL(legacy) and DG2(squash). Took some time to
> > understand the code but the mid cdclk config logic works. @Ville Syrjälä does
> > replacing the intel_cdclk_can_squash() and intel_cdclk_can_crawl() with your
> > new cdclk_crawl_and_squash in atomic check make sense?
> >
> > I don't think we should need any real logic at that point.
> > If we can squash and crawl then I think we can always do the cdclk change
> > w/o a modeset, at least with what we currently have defined in the cdclk
> > tables.
>
> @Ville Syrjälä is this patch in your radar to be sending out to the ML? Or should I send it on your behalf?
You can take over again if you want.
--
Ville Syrjälä
Intel
^ permalink raw reply [flat|nested] 38+ messages in thread
* Re: [Intel-gfx] [PATCH 0/6] Introduce struct cdclk_step
2022-09-26 17:29 ` Ville Syrjälä
@ 2022-09-26 17:55 ` Srivatsa, Anusha
0 siblings, 0 replies; 38+ messages in thread
From: Srivatsa, Anusha @ 2022-09-26 17:55 UTC (permalink / raw)
To: Ville Syrjälä; +Cc: intel-gfx, Vivi, Rodrigo
> -----Original Message-----
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Sent: Monday, September 26, 2022 10:30 AM
> To: Srivatsa, Anusha <anusha.srivatsa@intel.com>
> Cc: intel-gfx@lists.freedesktop.org; Shankar, Uma
> <uma.shankar@intel.com>; Vivi, Rodrigo <rodrigo.vivi@intel.com>; Navare,
> Manasi D <manasi.d.navare@intel.com>; Roper, Matthew D
> <matthew.d.roper@intel.com>
> Subject: Re: [PATCH 0/6] Introduce struct cdclk_step
>
> On Mon, Sep 26, 2022 at 05:21:40PM +0000, Srivatsa, Anusha wrote:
> >
> >
> > > -----Original Message-----
> > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > Sent: Friday, September 23, 2022 12:04 PM
> > > To: Srivatsa, Anusha <anusha.srivatsa@intel.com>
> > > Cc: intel-gfx@lists.freedesktop.org; Shankar, Uma
> > > <uma.shankar@intel.com>; Vivi, Rodrigo <rodrigo.vivi@intel.com>;
> > > Navare, Manasi D <manasi.d.navare@intel.com>; Roper, Matthew D
> > > <matthew.d.roper@intel.com>
> > > Subject: Re: [PATCH 0/6] Introduce struct cdclk_step
> > >
> > > On Fri, Sep 23, 2022 at 04:56:53PM +0000, Srivatsa, Anusha wrote:
> > > >
> > > >
> > > > > -----Original Message-----
> > > > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > > > Sent: Tuesday, September 20, 2022 2:59 PM
> > > > > To: Srivatsa, Anusha <anusha.srivatsa@intel.com>
> > > > > Cc: intel-gfx@lists.freedesktop.org; Shankar, Uma
> > > > > <uma.shankar@intel.com>; Vivi, Rodrigo <rodrigo.vivi@intel.com>
> > > > > Subject: Re: [PATCH 0/6] Introduce struct cdclk_step
> > > > >
> > > > > On Tue, Sep 20, 2022 at 06:48:46PM +0000, Srivatsa, Anusha wrote:
> > > > > >
> > > > > >
> > > > > > > -----Original Message-----
> > > > > > > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > > > > > > Sent: Tuesday, September 20, 2022 1:20 AM
> > > > > > > To: Srivatsa, Anusha <anusha.srivatsa@intel.com>
> > > > > > > Cc: intel-gfx@lists.freedesktop.org; Shankar, Uma
> > > > > > > <uma.shankar@intel.com>; Vivi, Rodrigo
> > > > > > > <rodrigo.vivi@intel.com>
> > > > > > > Subject: Re: [PATCH 0/6] Introduce struct cdclk_step
> > > > > > >
> > > > > > > On Fri, Sep 16, 2022 at 05:43:58PM -0700, Anusha Srivatsa wrote:
> > > > > > > > This is a prep series for the actual cdclk refactoring
> > > > > > > > that will be sent following this. Idea is to have a struct
> > > > > > > > - cdclk_step that holds the following:
> > > > > > > > - cdclk action (squash, crawl or modeset)
> > > > > > > > - cdclk frequency
> > > > > > > > which gets populated in atomic check. Driver uses the
> > > > > > > > populated values during atomic commit to do the suitable
> > > > > > > > sequence of actions like programming squash ctl registers
> > > > > > > > in case of squashing or PLL sequence incase of modeset and so
> on.
> > > > > > > >
> > > > > > > > This series just addresses the initial idea. The actual
> > > > > > > > plumming in the atomic commit phase will be sent shortly.
> > > > > > >
> > > > > > > OK, people keep ignoring what I say so I just typed up the
> > > > > > > code quickly. This to me seems like the most straightforward
> > > > > > > way to do what
> > > > > we need:
> > > > > > > https://github.com/vsyrjala/linux.git cdclk_crawl_and_squash
> > > > > > >
> > > > > > > Totally untested ofc, apart from me doing a quick scan
> > > > > > > through our cdclk tables for the crawl+squahs platforms to
> > > > > > > make sure that this approach should produce sane values.
> > > > > > Ville,
> > > > > > Why have a mid cdclk_config? Cant we use the new-cdclk-config
> > > > > > for this
> > > > > purpose?
> > > > >
> > > > > You either
> > > > > - start at old, crawl to mid, then squash to new
> > > > > - start at old, squash to mid, then crawl to new
> > > >
> > > > Tested the changes on TGL(legacy) and DG2(squash). Took some time
> > > > to
> > > understand the code but the mid cdclk config logic works. @Ville
> > > Syrjälä does replacing the intel_cdclk_can_squash() and
> > > intel_cdclk_can_crawl() with your new cdclk_crawl_and_squash in atomic
> check make sense?
> > >
> > > I don't think we should need any real logic at that point.
> > > If we can squash and crawl then I think we can always do the cdclk
> > > change w/o a modeset, at least with what we currently have defined
> > > in the cdclk tables.
> >
> > @Ville Syrjälä is this patch in your radar to be sending out to the ML? Or
> should I send it on your behalf?
>
> You can take over again if you want.
Will do. Thanks Ville!
Anusha
> --
> Ville Syrjälä
> Intel
^ permalink raw reply [flat|nested] 38+ messages in thread
end of thread, other threads:[~2022-09-26 17:55 UTC | newest]
Thread overview: 38+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-09-17 0:43 [Intel-gfx] [PATCH 0/6] Introduce struct cdclk_step Anusha Srivatsa
2022-09-17 0:43 ` [Intel-gfx] [PATCH 1/6] drm/i915/display Add dg2_prog_squash_ctl() helper Anusha Srivatsa
2022-09-17 0:44 ` [Intel-gfx] [PATCH 2/6] drm/i915/display: add cdclk action struct to cdclk_config Anusha Srivatsa
2022-09-19 9:26 ` Jani Nikula
2022-09-19 19:32 ` Navare, Manasi
2022-09-19 22:42 ` Srivatsa, Anusha
2022-09-20 6:55 ` Jani Nikula
2022-09-17 0:44 ` [Intel-gfx] [PATCH 3/6] drm/i915/display: Embed the new struct steps for squashing Anusha Srivatsa
2022-09-19 9:27 ` Jani Nikula
2022-09-19 19:39 ` Navare, Manasi
2022-09-19 22:54 ` Srivatsa, Anusha
2022-09-17 0:44 ` [Intel-gfx] [PATCH 4/6] drm/i915/display: Embed the new struct steps for crawling Anusha Srivatsa
2022-09-19 9:28 ` Jani Nikula
2022-09-17 0:44 ` [Intel-gfx] [PATCH 5/6] drm/i915/display: Embed the new struct steps for modeset Anusha Srivatsa
2022-09-17 0:44 ` [Intel-gfx] [PATCH 6/6] drm/i915/display: Dump the new cdclk config values Anusha Srivatsa
2022-09-19 19:46 ` Navare, Manasi
2022-09-19 21:10 ` Rodrigo Vivi
2022-09-19 22:35 ` Navare, Manasi
2022-09-20 7:27 ` Jani Nikula
2022-09-20 18:47 ` Srivatsa, Anusha
2022-09-17 1:13 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Introduce struct cdclk_step Patchwork
2022-09-17 1:13 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-09-17 1:35 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2022-09-17 2:08 ` Dixit, Ashutosh
2022-09-19 6:35 ` Vudum, Lakshminarayana
2022-09-19 16:33 ` Dixit, Ashutosh
2022-09-19 4:25 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-09-19 5:42 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-09-19 6:25 ` [Intel-gfx] ✓ Fi.CI.IGT: success " Patchwork
2022-09-19 19:48 ` [Intel-gfx] [PATCH 0/6] " Navare, Manasi
2022-09-20 8:20 ` Ville Syrjälä
2022-09-20 18:48 ` Srivatsa, Anusha
2022-09-20 21:59 ` Ville Syrjälä
2022-09-23 16:56 ` Srivatsa, Anusha
2022-09-23 19:04 ` Ville Syrjälä
2022-09-26 17:21 ` Srivatsa, Anusha
2022-09-26 17:29 ` Ville Syrjälä
2022-09-26 17:55 ` Srivatsa, Anusha
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