* [Intel-gfx] [PATCH v2 0/6] drm/i915: Fix watermark calculations with various CCS modifiers
@ 2022-10-03 11:15 Ville Syrjala
2022-10-03 11:15 ` [Intel-gfx] " Ville Syrjala
` (7 more replies)
0 siblings, 8 replies; 14+ messages in thread
From: Ville Syrjala @ 2022-10-03 11:15 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
We are neglegting to consider all the new CCS modifiers as
Y-tiled in the watermark calculations. So we are incorrectrly
calculation the watermarks as if dealing with a linear surface.
v2: Fix tgl RC CCS vs. MC CCS to separate patches since they
need separate fixes tags
Ville Syrjälä (6):
drm/i915: Fix watermark calculations for gen12+ RC CCS modifier
drm/i915: Fix watermark calculations for gen12+ MC CCS modifier
drm/i915: Fix watermark calculations for gen12+ CCS+CC modifier
drm/i915: Fix watermark calculations for DG2 CCS modifiers
drm/i915: Fix watermark calculations for DG2 CCS+CC modifier
drm/i915: Simplify modifier lookup in watermark code
drivers/gpu/drm/i915/display/intel_fb.c | 13 +++++++++++++
drivers/gpu/drm/i915/display/intel_fb.h | 1 +
drivers/gpu/drm/i915/display/skl_watermark.c | 10 +++-------
3 files changed, 17 insertions(+), 7 deletions(-)
--
2.35.1
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v2 1/6] drm/i915: Fix watermark calculations for gen12+ RC CCS modifier
2022-10-03 11:15 [Intel-gfx] [PATCH v2 0/6] drm/i915: Fix watermark calculations with various CCS modifiers Ville Syrjala
@ 2022-10-03 11:15 ` Ville Syrjala
2022-10-03 11:15 ` [Intel-gfx] " Ville Syrjala
` (6 subsequent siblings)
7 siblings, 0 replies; 14+ messages in thread
From: Ville Syrjala @ 2022-10-03 11:15 UTC (permalink / raw)
To: intel-gfx; +Cc: stable, Juha-Pekka Heikkila
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Take the gen12+ RC CCS modifier into account when calculating the
watermarks. Othwerwise we'll calculate the watermarks thinking this
Y-tiled modifier is linear.
The rc_surface part is actually a nop since that is not used
for any glk+ platform.
v2: Split RC CCS vs. MC CCS to separate patches
Cc: stable@vger.kernel.org
Fixes: b3e57bccd68a ("drm/i915/tgl: Gen-12 render decompression")
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/skl_watermark.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 59e4fc6191f1..6ce1213c18b3 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -1710,10 +1710,12 @@ skl_compute_wm_params(const struct intel_crtc_state *crtc_state,
modifier == I915_FORMAT_MOD_4_TILED ||
modifier == I915_FORMAT_MOD_Yf_TILED ||
modifier == I915_FORMAT_MOD_Y_TILED_CCS ||
- modifier == I915_FORMAT_MOD_Yf_TILED_CCS;
+ modifier == I915_FORMAT_MOD_Yf_TILED_CCS ||
+ modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS;
wp->x_tiled = modifier == I915_FORMAT_MOD_X_TILED;
wp->rc_surface = modifier == I915_FORMAT_MOD_Y_TILED_CCS ||
- modifier == I915_FORMAT_MOD_Yf_TILED_CCS;
+ modifier == I915_FORMAT_MOD_Yf_TILED_CCS ||
+ modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS;
wp->is_planar = intel_format_info_is_yuv_semiplanar(format, modifier);
wp->width = width;
--
2.35.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [Intel-gfx] [PATCH v2 1/6] drm/i915: Fix watermark calculations for gen12+ RC CCS modifier
@ 2022-10-03 11:15 ` Ville Syrjala
0 siblings, 0 replies; 14+ messages in thread
From: Ville Syrjala @ 2022-10-03 11:15 UTC (permalink / raw)
To: intel-gfx; +Cc: stable
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Take the gen12+ RC CCS modifier into account when calculating the
watermarks. Othwerwise we'll calculate the watermarks thinking this
Y-tiled modifier is linear.
The rc_surface part is actually a nop since that is not used
for any glk+ platform.
v2: Split RC CCS vs. MC CCS to separate patches
Cc: stable@vger.kernel.org
Fixes: b3e57bccd68a ("drm/i915/tgl: Gen-12 render decompression")
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/skl_watermark.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 59e4fc6191f1..6ce1213c18b3 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -1710,10 +1710,12 @@ skl_compute_wm_params(const struct intel_crtc_state *crtc_state,
modifier == I915_FORMAT_MOD_4_TILED ||
modifier == I915_FORMAT_MOD_Yf_TILED ||
modifier == I915_FORMAT_MOD_Y_TILED_CCS ||
- modifier == I915_FORMAT_MOD_Yf_TILED_CCS;
+ modifier == I915_FORMAT_MOD_Yf_TILED_CCS ||
+ modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS;
wp->x_tiled = modifier == I915_FORMAT_MOD_X_TILED;
wp->rc_surface = modifier == I915_FORMAT_MOD_Y_TILED_CCS ||
- modifier == I915_FORMAT_MOD_Yf_TILED_CCS;
+ modifier == I915_FORMAT_MOD_Yf_TILED_CCS ||
+ modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS;
wp->is_planar = intel_format_info_is_yuv_semiplanar(format, modifier);
wp->width = width;
--
2.35.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v2 2/6] drm/i915: Fix watermark calculations for gen12+ MC CCS modifier
2022-10-03 11:15 [Intel-gfx] [PATCH v2 0/6] drm/i915: Fix watermark calculations with various CCS modifiers Ville Syrjala
@ 2022-10-03 11:15 ` Ville Syrjala
2022-10-03 11:15 ` [Intel-gfx] " Ville Syrjala
` (6 subsequent siblings)
7 siblings, 0 replies; 14+ messages in thread
From: Ville Syrjala @ 2022-10-03 11:15 UTC (permalink / raw)
To: intel-gfx; +Cc: stable, Juha-Pekka Heikkila
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Take the gen12+ MC CCS modifier into account when calculating the
watermarks. Othwerwise we'll calculate the watermarks thinking this
Y-tiled modifier is linear.
The rc_surface part is actually a nop since that is not used
for any glk+ platform.
v2: Split RC CCS vs. MC CCS to separate patches
Cc: stable@vger.kernel.org
Fixes: 2dfbf9d2873a ("drm/i915/tgl: Gen-12 display can decompress surfaces compressed by the media engine")
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/skl_watermark.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 6ce1213c18b3..1b8f5970cbf7 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -1711,11 +1711,13 @@ skl_compute_wm_params(const struct intel_crtc_state *crtc_state,
modifier == I915_FORMAT_MOD_Yf_TILED ||
modifier == I915_FORMAT_MOD_Y_TILED_CCS ||
modifier == I915_FORMAT_MOD_Yf_TILED_CCS ||
- modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS;
+ modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS ||
+ modifier == I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS;
wp->x_tiled = modifier == I915_FORMAT_MOD_X_TILED;
wp->rc_surface = modifier == I915_FORMAT_MOD_Y_TILED_CCS ||
modifier == I915_FORMAT_MOD_Yf_TILED_CCS ||
- modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS;
+ modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS ||
+ modifier == I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS;
wp->is_planar = intel_format_info_is_yuv_semiplanar(format, modifier);
wp->width = width;
--
2.35.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [Intel-gfx] [PATCH v2 2/6] drm/i915: Fix watermark calculations for gen12+ MC CCS modifier
@ 2022-10-03 11:15 ` Ville Syrjala
0 siblings, 0 replies; 14+ messages in thread
From: Ville Syrjala @ 2022-10-03 11:15 UTC (permalink / raw)
To: intel-gfx; +Cc: stable
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Take the gen12+ MC CCS modifier into account when calculating the
watermarks. Othwerwise we'll calculate the watermarks thinking this
Y-tiled modifier is linear.
The rc_surface part is actually a nop since that is not used
for any glk+ platform.
v2: Split RC CCS vs. MC CCS to separate patches
Cc: stable@vger.kernel.org
Fixes: 2dfbf9d2873a ("drm/i915/tgl: Gen-12 display can decompress surfaces compressed by the media engine")
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/skl_watermark.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 6ce1213c18b3..1b8f5970cbf7 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -1711,11 +1711,13 @@ skl_compute_wm_params(const struct intel_crtc_state *crtc_state,
modifier == I915_FORMAT_MOD_Yf_TILED ||
modifier == I915_FORMAT_MOD_Y_TILED_CCS ||
modifier == I915_FORMAT_MOD_Yf_TILED_CCS ||
- modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS;
+ modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS ||
+ modifier == I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS;
wp->x_tiled = modifier == I915_FORMAT_MOD_X_TILED;
wp->rc_surface = modifier == I915_FORMAT_MOD_Y_TILED_CCS ||
modifier == I915_FORMAT_MOD_Yf_TILED_CCS ||
- modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS;
+ modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS ||
+ modifier == I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS;
wp->is_planar = intel_format_info_is_yuv_semiplanar(format, modifier);
wp->width = width;
--
2.35.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v2 3/6] drm/i915: Fix watermark calculations for gen12+ CCS+CC modifier
2022-10-03 11:15 [Intel-gfx] [PATCH v2 0/6] drm/i915: Fix watermark calculations with various CCS modifiers Ville Syrjala
@ 2022-10-03 11:15 ` Ville Syrjala
2022-10-03 11:15 ` [Intel-gfx] " Ville Syrjala
` (6 subsequent siblings)
7 siblings, 0 replies; 14+ messages in thread
From: Ville Syrjala @ 2022-10-03 11:15 UTC (permalink / raw)
To: intel-gfx; +Cc: stable, Juha-Pekka Heikkila
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Take the gen12+ CCS+CC modifier into account when calculating the
watermarks. Othwerwise we'll calculate the watermarks thinking this
Y-tiled modifier is linear.
The rc_surface part is actually a nop since that is not used
for any glk+ platform.
Cc: stable@vger.kernel.org
Fixes: d1e2775e9b96 ("drm/i915/tgl: Add Clear Color support for TGL Render Decompression")
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/skl_watermark.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 1b8f5970cbf7..0ff3ece166fe 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -1712,12 +1712,14 @@ skl_compute_wm_params(const struct intel_crtc_state *crtc_state,
modifier == I915_FORMAT_MOD_Y_TILED_CCS ||
modifier == I915_FORMAT_MOD_Yf_TILED_CCS ||
modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS ||
- modifier == I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS;
+ modifier == I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS ||
+ modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC;
wp->x_tiled = modifier == I915_FORMAT_MOD_X_TILED;
wp->rc_surface = modifier == I915_FORMAT_MOD_Y_TILED_CCS ||
modifier == I915_FORMAT_MOD_Yf_TILED_CCS ||
modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS ||
- modifier == I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS;
+ modifier == I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS ||
+ modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC;
wp->is_planar = intel_format_info_is_yuv_semiplanar(format, modifier);
wp->width = width;
--
2.35.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [Intel-gfx] [PATCH v2 3/6] drm/i915: Fix watermark calculations for gen12+ CCS+CC modifier
@ 2022-10-03 11:15 ` Ville Syrjala
0 siblings, 0 replies; 14+ messages in thread
From: Ville Syrjala @ 2022-10-03 11:15 UTC (permalink / raw)
To: intel-gfx; +Cc: stable
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Take the gen12+ CCS+CC modifier into account when calculating the
watermarks. Othwerwise we'll calculate the watermarks thinking this
Y-tiled modifier is linear.
The rc_surface part is actually a nop since that is not used
for any glk+ platform.
Cc: stable@vger.kernel.org
Fixes: d1e2775e9b96 ("drm/i915/tgl: Add Clear Color support for TGL Render Decompression")
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/skl_watermark.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 1b8f5970cbf7..0ff3ece166fe 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -1712,12 +1712,14 @@ skl_compute_wm_params(const struct intel_crtc_state *crtc_state,
modifier == I915_FORMAT_MOD_Y_TILED_CCS ||
modifier == I915_FORMAT_MOD_Yf_TILED_CCS ||
modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS ||
- modifier == I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS;
+ modifier == I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS ||
+ modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC;
wp->x_tiled = modifier == I915_FORMAT_MOD_X_TILED;
wp->rc_surface = modifier == I915_FORMAT_MOD_Y_TILED_CCS ||
modifier == I915_FORMAT_MOD_Yf_TILED_CCS ||
modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS ||
- modifier == I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS;
+ modifier == I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS ||
+ modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC;
wp->is_planar = intel_format_info_is_yuv_semiplanar(format, modifier);
wp->width = width;
--
2.35.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v2 4/6] drm/i915: Fix watermark calculations for DG2 CCS modifiers
2022-10-03 11:15 [Intel-gfx] [PATCH v2 0/6] drm/i915: Fix watermark calculations with various CCS modifiers Ville Syrjala
@ 2022-10-03 11:15 ` Ville Syrjala
2022-10-03 11:15 ` [Intel-gfx] " Ville Syrjala
` (6 subsequent siblings)
7 siblings, 0 replies; 14+ messages in thread
From: Ville Syrjala @ 2022-10-03 11:15 UTC (permalink / raw)
To: intel-gfx; +Cc: stable, Juha-Pekka Heikkila
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Take the DG2 CCS modifiers into account when calculating the
watermarks. Othwerwise we'll calculate the watermarks thinking these
tile-4 modifiers are linear.
The rc_surface part is actually a nop since that is not used
for any glk+ platform.
Cc: stable@vger.kernel.org
Fixes: 4c3afa72138c ("drm/i915/dg2: Add support for DG2 render and media compression")
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/skl_watermark.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 0ff3ece166fe..070357da40e4 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -1713,13 +1713,17 @@ skl_compute_wm_params(const struct intel_crtc_state *crtc_state,
modifier == I915_FORMAT_MOD_Yf_TILED_CCS ||
modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS ||
modifier == I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS ||
- modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC;
+ modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC ||
+ modifier == I915_FORMAT_MOD_4_TILED_DG2_RC_CCS ||
+ modifier == I915_FORMAT_MOD_4_TILED_DG2_MC_CCS;
wp->x_tiled = modifier == I915_FORMAT_MOD_X_TILED;
wp->rc_surface = modifier == I915_FORMAT_MOD_Y_TILED_CCS ||
modifier == I915_FORMAT_MOD_Yf_TILED_CCS ||
modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS ||
modifier == I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS ||
- modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC;
+ modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC ||
+ modifier == I915_FORMAT_MOD_4_TILED_DG2_RC_CCS ||
+ modifier == I915_FORMAT_MOD_4_TILED_DG2_MC_CCS;
wp->is_planar = intel_format_info_is_yuv_semiplanar(format, modifier);
wp->width = width;
--
2.35.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [Intel-gfx] [PATCH v2 4/6] drm/i915: Fix watermark calculations for DG2 CCS modifiers
@ 2022-10-03 11:15 ` Ville Syrjala
0 siblings, 0 replies; 14+ messages in thread
From: Ville Syrjala @ 2022-10-03 11:15 UTC (permalink / raw)
To: intel-gfx; +Cc: stable
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Take the DG2 CCS modifiers into account when calculating the
watermarks. Othwerwise we'll calculate the watermarks thinking these
tile-4 modifiers are linear.
The rc_surface part is actually a nop since that is not used
for any glk+ platform.
Cc: stable@vger.kernel.org
Fixes: 4c3afa72138c ("drm/i915/dg2: Add support for DG2 render and media compression")
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/skl_watermark.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 0ff3ece166fe..070357da40e4 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -1713,13 +1713,17 @@ skl_compute_wm_params(const struct intel_crtc_state *crtc_state,
modifier == I915_FORMAT_MOD_Yf_TILED_CCS ||
modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS ||
modifier == I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS ||
- modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC;
+ modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC ||
+ modifier == I915_FORMAT_MOD_4_TILED_DG2_RC_CCS ||
+ modifier == I915_FORMAT_MOD_4_TILED_DG2_MC_CCS;
wp->x_tiled = modifier == I915_FORMAT_MOD_X_TILED;
wp->rc_surface = modifier == I915_FORMAT_MOD_Y_TILED_CCS ||
modifier == I915_FORMAT_MOD_Yf_TILED_CCS ||
modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS ||
modifier == I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS ||
- modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC;
+ modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC ||
+ modifier == I915_FORMAT_MOD_4_TILED_DG2_RC_CCS ||
+ modifier == I915_FORMAT_MOD_4_TILED_DG2_MC_CCS;
wp->is_planar = intel_format_info_is_yuv_semiplanar(format, modifier);
wp->width = width;
--
2.35.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v2 5/6] drm/i915: Fix watermark calculations for DG2 CCS+CC modifier
2022-10-03 11:15 [Intel-gfx] [PATCH v2 0/6] drm/i915: Fix watermark calculations with various CCS modifiers Ville Syrjala
@ 2022-10-03 11:15 ` Ville Syrjala
2022-10-03 11:15 ` [Intel-gfx] " Ville Syrjala
` (6 subsequent siblings)
7 siblings, 0 replies; 14+ messages in thread
From: Ville Syrjala @ 2022-10-03 11:15 UTC (permalink / raw)
To: intel-gfx; +Cc: stable, Juha-Pekka Heikkila
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Take the DG2 CCS+CC modifier into account when calculating the
watermarks. Othwerwise we'll calculate the watermarks thinking this
tile-4 modifier is linear.
The rc_surface part is actually a nop since that is not used
for any glk+ platform.
Cc: stable@vger.kernel.org
Fixes: 680025dcc400 ("drm/i915/dg2: Add support for DG2 clear color compression")
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/skl_watermark.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 070357da40e4..aac0980a0c9d 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -1715,7 +1715,8 @@ skl_compute_wm_params(const struct intel_crtc_state *crtc_state,
modifier == I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS ||
modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC ||
modifier == I915_FORMAT_MOD_4_TILED_DG2_RC_CCS ||
- modifier == I915_FORMAT_MOD_4_TILED_DG2_MC_CCS;
+ modifier == I915_FORMAT_MOD_4_TILED_DG2_MC_CCS ||
+ modifier == I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC;
wp->x_tiled = modifier == I915_FORMAT_MOD_X_TILED;
wp->rc_surface = modifier == I915_FORMAT_MOD_Y_TILED_CCS ||
modifier == I915_FORMAT_MOD_Yf_TILED_CCS ||
@@ -1723,7 +1724,8 @@ skl_compute_wm_params(const struct intel_crtc_state *crtc_state,
modifier == I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS ||
modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC ||
modifier == I915_FORMAT_MOD_4_TILED_DG2_RC_CCS ||
- modifier == I915_FORMAT_MOD_4_TILED_DG2_MC_CCS;
+ modifier == I915_FORMAT_MOD_4_TILED_DG2_MC_CCS ||
+ modifier == I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC;
wp->is_planar = intel_format_info_is_yuv_semiplanar(format, modifier);
wp->width = width;
--
2.35.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [Intel-gfx] [PATCH v2 5/6] drm/i915: Fix watermark calculations for DG2 CCS+CC modifier
@ 2022-10-03 11:15 ` Ville Syrjala
0 siblings, 0 replies; 14+ messages in thread
From: Ville Syrjala @ 2022-10-03 11:15 UTC (permalink / raw)
To: intel-gfx; +Cc: stable
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Take the DG2 CCS+CC modifier into account when calculating the
watermarks. Othwerwise we'll calculate the watermarks thinking this
tile-4 modifier is linear.
The rc_surface part is actually a nop since that is not used
for any glk+ platform.
Cc: stable@vger.kernel.org
Fixes: 680025dcc400 ("drm/i915/dg2: Add support for DG2 clear color compression")
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/skl_watermark.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 070357da40e4..aac0980a0c9d 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -1715,7 +1715,8 @@ skl_compute_wm_params(const struct intel_crtc_state *crtc_state,
modifier == I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS ||
modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC ||
modifier == I915_FORMAT_MOD_4_TILED_DG2_RC_CCS ||
- modifier == I915_FORMAT_MOD_4_TILED_DG2_MC_CCS;
+ modifier == I915_FORMAT_MOD_4_TILED_DG2_MC_CCS ||
+ modifier == I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC;
wp->x_tiled = modifier == I915_FORMAT_MOD_X_TILED;
wp->rc_surface = modifier == I915_FORMAT_MOD_Y_TILED_CCS ||
modifier == I915_FORMAT_MOD_Yf_TILED_CCS ||
@@ -1723,7 +1724,8 @@ skl_compute_wm_params(const struct intel_crtc_state *crtc_state,
modifier == I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS ||
modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC ||
modifier == I915_FORMAT_MOD_4_TILED_DG2_RC_CCS ||
- modifier == I915_FORMAT_MOD_4_TILED_DG2_MC_CCS;
+ modifier == I915_FORMAT_MOD_4_TILED_DG2_MC_CCS ||
+ modifier == I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC;
wp->is_planar = intel_format_info_is_yuv_semiplanar(format, modifier);
wp->width = width;
--
2.35.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [Intel-gfx] [PATCH v2 6/6] drm/i915: Simplify modifier lookup in watermark code
2022-10-03 11:15 [Intel-gfx] [PATCH v2 0/6] drm/i915: Fix watermark calculations with various CCS modifiers Ville Syrjala
` (4 preceding siblings ...)
2022-10-03 11:15 ` [Intel-gfx] " Ville Syrjala
@ 2022-10-03 11:15 ` Ville Syrjala
2022-10-03 12:46 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Fix watermark calculations with various CCS modifiers (rev2) Patchwork
2022-10-03 14:07 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
7 siblings, 0 replies; 14+ messages in thread
From: Ville Syrjala @ 2022-10-03 11:15 UTC (permalink / raw)
To: intel-gfx
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Replace the huge modifier lists in the watermark code with
a few calls to intel_fb.c.
Reviewed-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com>
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_fb.c | 13 ++++++++++++
drivers/gpu/drm/i915/display/intel_fb.h | 1 +
drivers/gpu/drm/i915/display/skl_watermark.c | 22 +++-----------------
3 files changed, 17 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
index eefa33c555ac..63137ae5ab21 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -300,6 +300,19 @@ static bool plane_caps_contain_all(u8 caps, u8 mask)
return (caps & mask) == mask;
}
+/**
+ * intel_fb_is_tiled_modifier: Check if a modifier is a tiled modifier type
+ * @modifier: Modifier to check
+ *
+ * Returns:
+ * Returns %true if @modifier is a tiled modifier.
+ */
+bool intel_fb_is_tiled_modifier(u64 modifier)
+{
+ return plane_caps_contain_any(lookup_modifier(modifier)->plane_caps,
+ INTEL_PLANE_CAP_TILING_MASK);
+}
+
/**
* intel_fb_is_ccs_modifier: Check if a modifier is a CCS modifier type
* @modifier: Modifier to check
diff --git a/drivers/gpu/drm/i915/display/intel_fb.h b/drivers/gpu/drm/i915/display/intel_fb.h
index 12386f13a4e0..4662b812b934 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.h
+++ b/drivers/gpu/drm/i915/display/intel_fb.h
@@ -29,6 +29,7 @@ struct intel_plane_state;
#define INTEL_PLANE_CAP_TILING_Yf BIT(5)
#define INTEL_PLANE_CAP_TILING_4 BIT(6)
+bool intel_fb_is_tiled_modifier(u64 modifier);
bool intel_fb_is_ccs_modifier(u64 modifier);
bool intel_fb_is_rc_ccs_cc_modifier(u64 modifier);
bool intel_fb_is_mc_ccs_modifier(u64 modifier);
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index aac0980a0c9d..d58e667016e4 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -1706,26 +1706,10 @@ skl_compute_wm_params(const struct intel_crtc_state *crtc_state,
return -EINVAL;
}
- wp->y_tiled = modifier == I915_FORMAT_MOD_Y_TILED ||
- modifier == I915_FORMAT_MOD_4_TILED ||
- modifier == I915_FORMAT_MOD_Yf_TILED ||
- modifier == I915_FORMAT_MOD_Y_TILED_CCS ||
- modifier == I915_FORMAT_MOD_Yf_TILED_CCS ||
- modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS ||
- modifier == I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS ||
- modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC ||
- modifier == I915_FORMAT_MOD_4_TILED_DG2_RC_CCS ||
- modifier == I915_FORMAT_MOD_4_TILED_DG2_MC_CCS ||
- modifier == I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC;
wp->x_tiled = modifier == I915_FORMAT_MOD_X_TILED;
- wp->rc_surface = modifier == I915_FORMAT_MOD_Y_TILED_CCS ||
- modifier == I915_FORMAT_MOD_Yf_TILED_CCS ||
- modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS ||
- modifier == I915_FORMAT_MOD_Y_TILED_GEN12_MC_CCS ||
- modifier == I915_FORMAT_MOD_Y_TILED_GEN12_RC_CCS_CC ||
- modifier == I915_FORMAT_MOD_4_TILED_DG2_RC_CCS ||
- modifier == I915_FORMAT_MOD_4_TILED_DG2_MC_CCS ||
- modifier == I915_FORMAT_MOD_4_TILED_DG2_RC_CCS_CC;
+ wp->y_tiled = modifier != I915_FORMAT_MOD_X_TILED &&
+ intel_fb_is_tiled_modifier(modifier);
+ wp->rc_surface = intel_fb_is_ccs_modifier(modifier);
wp->is_planar = intel_format_info_is_yuv_semiplanar(format, modifier);
wp->width = width;
--
2.35.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Fix watermark calculations with various CCS modifiers (rev2)
2022-10-03 11:15 [Intel-gfx] [PATCH v2 0/6] drm/i915: Fix watermark calculations with various CCS modifiers Ville Syrjala
` (5 preceding siblings ...)
2022-10-03 11:15 ` [Intel-gfx] [PATCH v2 6/6] drm/i915: Simplify modifier lookup in watermark code Ville Syrjala
@ 2022-10-03 12:46 ` Patchwork
2022-10-03 14:07 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
7 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2022-10-03 12:46 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 9938 bytes --]
== Series Details ==
Series: drm/i915: Fix watermark calculations with various CCS modifiers (rev2)
URL : https://patchwork.freedesktop.org/series/109303/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12204 -> Patchwork_109303v2
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/index.html
Participating hosts (48 -> 42)
------------------------------
Additional (2): bat-dg2-11 fi-rkl-11600
Missing (8): fi-tgl-u2 fi-hsw-4200u fi-glk-dsi fi-icl-u2 bat-dg2-9 fi-ctg-p8600 fi-bsw-nick fi-bdw-samus
Known issues
------------
Here are the changes found in Patchwork_109303v2 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_huc_copy@huc-copy:
- fi-rkl-11600: NOTRUN -> [SKIP][1] ([i915#2190])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/fi-rkl-11600/igt@gem_huc_copy@huc-copy.html
* igt@gem_lmem_swapping@basic:
- fi-bdw-gvtdvm: NOTRUN -> [SKIP][2] ([fdo#109271]) +19 similar issues
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/fi-bdw-gvtdvm/igt@gem_lmem_swapping@basic.html
- fi-rkl-11600: NOTRUN -> [SKIP][3] ([i915#4613]) +3 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/fi-rkl-11600/igt@gem_lmem_swapping@basic.html
* igt@gem_tiled_pread_basic:
- fi-rkl-11600: NOTRUN -> [SKIP][4] ([i915#3282])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/fi-rkl-11600/igt@gem_tiled_pread_basic.html
* igt@i915_pm_backlight@basic-brightness:
- fi-rkl-11600: NOTRUN -> [SKIP][5] ([i915#3012])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/fi-rkl-11600/igt@i915_pm_backlight@basic-brightness.html
* igt@i915_suspend@basic-s2idle-without-i915:
- fi-bdw-gvtdvm: NOTRUN -> [INCOMPLETE][6] ([i915#4817])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/fi-bdw-gvtdvm/igt@i915_suspend@basic-s2idle-without-i915.html
* igt@i915_suspend@basic-s3-without-i915:
- fi-rkl-11600: NOTRUN -> [INCOMPLETE][7] ([i915#5982])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/fi-rkl-11600/igt@i915_suspend@basic-s3-without-i915.html
* igt@kms_chamelium@hdmi-edid-read:
- fi-rkl-11600: NOTRUN -> [SKIP][8] ([fdo#111827]) +7 similar issues
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/fi-rkl-11600/igt@kms_chamelium@hdmi-edid-read.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor:
- fi-rkl-11600: NOTRUN -> [SKIP][9] ([i915#4103])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/fi-rkl-11600/igt@kms_cursor_legacy@basic-busy-flip-before-cursor.html
* igt@kms_force_connector_basic@force-load-detect:
- fi-rkl-11600: NOTRUN -> [SKIP][10] ([fdo#109285] / [i915#4098])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/fi-rkl-11600/igt@kms_force_connector_basic@force-load-detect.html
* igt@kms_psr@primary_page_flip:
- fi-rkl-11600: NOTRUN -> [SKIP][11] ([i915#1072]) +3 similar issues
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/fi-rkl-11600/igt@kms_psr@primary_page_flip.html
* igt@kms_setmode@basic-clone-single-crtc:
- fi-rkl-11600: NOTRUN -> [SKIP][12] ([i915#3555] / [i915#4098])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/fi-rkl-11600/igt@kms_setmode@basic-clone-single-crtc.html
* igt@prime_vgem@basic-read:
- fi-rkl-11600: NOTRUN -> [SKIP][13] ([fdo#109295] / [i915#3291] / [i915#3708]) +2 similar issues
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/fi-rkl-11600/igt@prime_vgem@basic-read.html
* igt@prime_vgem@basic-userptr:
- fi-rkl-11600: NOTRUN -> [SKIP][14] ([fdo#109295] / [i915#3301] / [i915#3708])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/fi-rkl-11600/igt@prime_vgem@basic-userptr.html
#### Possible fixes ####
* igt@gem_exec_suspend@basic-s0@smem:
- {bat-adlm-1}: [DMESG-WARN][15] ([i915#2867]) -> [PASS][16]
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12204/bat-adlm-1/igt@gem_exec_suspend@basic-s0@smem.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/bat-adlm-1/igt@gem_exec_suspend@basic-s0@smem.html
* igt@i915_module_load@load:
- fi-bdw-gvtdvm: [DMESG-WARN][17] ([i915#6540]) -> [PASS][18]
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12204/fi-bdw-gvtdvm/igt@i915_module_load@load.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/fi-bdw-gvtdvm/igt@i915_module_load@load.html
* igt@i915_selftest@live@mman:
- fi-rkl-guc: [INCOMPLETE][19] ([i915#6794]) -> [PASS][20]
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12204/fi-rkl-guc/igt@i915_selftest@live@mman.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/fi-rkl-guc/igt@i915_selftest@live@mman.html
* igt@i915_selftest@live@reset:
- {bat-rpls-1}: [DMESG-FAIL][21] ([i915#4983]) -> [PASS][22]
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12204/bat-rpls-1/igt@i915_selftest@live@reset.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/bat-rpls-1/igt@i915_selftest@live@reset.html
* igt@i915_suspend@basic-s2idle-without-i915:
- {bat-rpls-2}: [FAIL][23] ([i915#6559]) -> [PASS][24]
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12204/bat-rpls-2/igt@i915_suspend@basic-s2idle-without-i915.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/bat-rpls-2/igt@i915_suspend@basic-s2idle-without-i915.html
* igt@kms_force_connector_basic@force-connector-state:
- fi-bdw-gvtdvm: [DMESG-WARN][25] ([i915#5922]) -> [PASS][26]
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12204/fi-bdw-gvtdvm/igt@kms_force_connector_basic@force-connector-state.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/fi-bdw-gvtdvm/igt@kms_force_connector_basic@force-connector-state.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1155]: https://gitlab.freedesktop.org/drm/intel/issues/1155
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2867]: https://gitlab.freedesktop.org/drm/intel/issues/2867
[i915#3012]: https://gitlab.freedesktop.org/drm/intel/issues/3012
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
[i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3595]: https://gitlab.freedesktop.org/drm/intel/issues/3595
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
[i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
[i915#4215]: https://gitlab.freedesktop.org/drm/intel/issues/4215
[i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4817]: https://gitlab.freedesktop.org/drm/intel/issues/4817
[i915#4873]: https://gitlab.freedesktop.org/drm/intel/issues/4873
[i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
[i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190
[i915#5274]: https://gitlab.freedesktop.org/drm/intel/issues/5274
[i915#5922]: https://gitlab.freedesktop.org/drm/intel/issues/5922
[i915#5982]: https://gitlab.freedesktop.org/drm/intel/issues/5982
[i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
[i915#6540]: https://gitlab.freedesktop.org/drm/intel/issues/6540
[i915#6559]: https://gitlab.freedesktop.org/drm/intel/issues/6559
[i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
[i915#6794]: https://gitlab.freedesktop.org/drm/intel/issues/6794
[i915#6816]: https://gitlab.freedesktop.org/drm/intel/issues/6816
Build changes
-------------
* Linux: CI_DRM_12204 -> Patchwork_109303v2
CI-20190529: 20190529
CI_DRM_12204: fd2f9b9a4178e667adad268a662eb8a9c0ddc8f8 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6670: d618e9865fe5cbaf511ca43503abad442605d0a5 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_109303v2: fd2f9b9a4178e667adad268a662eb8a9c0ddc8f8 @ git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
440111b34ae4 drm/i915: Simplify modifier lookup in watermark code
ceef03fa0576 drm/i915: Fix watermark calculations for DG2 CCS+CC modifier
1329578da321 drm/i915: Fix watermark calculations for DG2 CCS modifiers
1e216bc68c80 drm/i915: Fix watermark calculations for gen12+ CCS+CC modifier
9a3e98bc30c7 drm/i915: Fix watermark calculations for gen12+ MC CCS modifier
afe639db8451 drm/i915: Fix watermark calculations for gen12+ RC CCS modifier
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/index.html
[-- Attachment #2: Type: text/html, Size: 10252 bytes --]
^ permalink raw reply [flat|nested] 14+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Fix watermark calculations with various CCS modifiers (rev2)
2022-10-03 11:15 [Intel-gfx] [PATCH v2 0/6] drm/i915: Fix watermark calculations with various CCS modifiers Ville Syrjala
` (6 preceding siblings ...)
2022-10-03 12:46 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Fix watermark calculations with various CCS modifiers (rev2) Patchwork
@ 2022-10-03 14:07 ` Patchwork
7 siblings, 0 replies; 14+ messages in thread
From: Patchwork @ 2022-10-03 14:07 UTC (permalink / raw)
To: Ville Syrjala; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 17893 bytes --]
== Series Details ==
Series: drm/i915: Fix watermark calculations with various CCS modifiers (rev2)
URL : https://patchwork.freedesktop.org/series/109303/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12204_full -> Patchwork_109303v2_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (9 -> 9)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in Patchwork_109303v2_full that come from known issues:
### CI changes ###
#### Possible fixes ####
* boot:
- shard-apl: ([PASS][1], [PASS][2], [PASS][3], [PASS][4], [PASS][5], [PASS][6], [PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12], [PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18], [PASS][19], [PASS][20], [FAIL][21], [PASS][22], [PASS][23], [PASS][24], [PASS][25]) ([i915#4386]) -> ([PASS][26], [PASS][27], [PASS][28], [PASS][29], [PASS][30], [PASS][31], [PASS][32], [PASS][33], [PASS][34], [PASS][35], [PASS][36], [PASS][37], [PASS][38], [PASS][39], [PASS][40], [PASS][41], [PASS][42], [PASS][43], [PASS][44], [PASS][45], [PASS][46], [PASS][47], [PASS][48], [PASS][49], [PASS][50])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12204/shard-apl3/boot.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12204/shard-apl8/boot.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12204/shard-apl8/boot.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12204/shard-apl8/boot.html
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12204/shard-apl8/boot.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12204/shard-apl1/boot.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12204/shard-apl1/boot.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12204/shard-apl7/boot.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12204/shard-apl1/boot.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12204/shard-apl1/boot.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12204/shard-apl1/boot.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12204/shard-apl7/boot.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12204/shard-apl2/boot.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12204/shard-apl7/boot.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12204/shard-apl7/boot.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12204/shard-apl7/boot.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12204/shard-apl6/boot.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12204/shard-apl6/boot.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12204/shard-apl6/boot.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12204/shard-apl3/boot.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12204/shard-apl2/boot.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12204/shard-apl2/boot.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12204/shard-apl2/boot.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12204/shard-apl3/boot.html
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12204/shard-apl3/boot.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/shard-apl8/boot.html
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/shard-apl8/boot.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/shard-apl1/boot.html
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/shard-apl2/boot.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/shard-apl1/boot.html
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/shard-apl2/boot.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/shard-apl2/boot.html
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/shard-apl2/boot.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/shard-apl1/boot.html
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/shard-apl7/boot.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/shard-apl7/boot.html
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/shard-apl7/boot.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/shard-apl7/boot.html
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/shard-apl6/boot.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/shard-apl6/boot.html
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/shard-apl6/boot.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/shard-apl6/boot.html
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/shard-apl6/boot.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/shard-apl6/boot.html
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/shard-apl8/boot.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/shard-apl3/boot.html
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/shard-apl3/boot.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/shard-apl3/boot.html
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/shard-apl1/boot.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/shard-apl3/boot.html
### IGT changes ###
#### Issues hit ####
* igt@gem_create@create-massive:
- shard-apl: NOTRUN -> [DMESG-WARN][51] ([i915#4991])
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/shard-apl2/igt@gem_create@create-massive.html
* igt@gem_exec_balancer@parallel-bb-first:
- shard-iclb: [PASS][52] -> [SKIP][53] ([i915#4525]) +1 similar issue
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12204/shard-iclb2/igt@gem_exec_balancer@parallel-bb-first.html
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/shard-iclb8/igt@gem_exec_balancer@parallel-bb-first.html
* igt@gem_workarounds@suspend-resume:
- shard-apl: [PASS][54] -> [DMESG-WARN][55] ([i915#180]) +3 similar issues
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12204/shard-apl2/igt@gem_workarounds@suspend-resume.html
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/shard-apl2/igt@gem_workarounds@suspend-resume.html
* igt@kms_chamelium@vga-frame-dump:
- shard-apl: NOTRUN -> [SKIP][56] ([fdo#109271] / [fdo#111827]) +2 similar issues
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/shard-apl2/igt@kms_chamelium@vga-frame-dump.html
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-apl: [PASS][57] -> [INCOMPLETE][58] ([i915#180] / [i915#1982] / [i915#4939])
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12204/shard-apl7/igt@kms_fbcon_fbt@fbc-suspend.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/shard-apl6/igt@kms_fbcon_fbt@fbc-suspend.html
* igt@kms_flip@plain-flip-ts-check@a-dp1:
- shard-apl: [PASS][59] -> [FAIL][60] ([i915#2122])
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12204/shard-apl6/igt@kms_flip@plain-flip-ts-check@a-dp1.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/shard-apl8/igt@kms_flip@plain-flip-ts-check@a-dp1.html
* igt@kms_flip@plain-flip-ts-check@b-hdmi-a1:
- shard-glk: [PASS][61] -> [FAIL][62] ([i915#2122])
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12204/shard-glk9/igt@kms_flip@plain-flip-ts-check@b-hdmi-a1.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/shard-glk7/igt@kms_flip@plain-flip-ts-check@b-hdmi-a1.html
* igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling@pipe-a-valid-mode:
- shard-iclb: NOTRUN -> [SKIP][63] ([i915#2587] / [i915#2672]) +2 similar issues
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/shard-iclb7/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-64bpp-4tile-downscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-default-mode:
- shard-iclb: NOTRUN -> [SKIP][64] ([i915#2672]) +6 similar issues
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/shard-iclb3/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling@pipe-a-default-mode:
- shard-iclb: NOTRUN -> [SKIP][65] ([i915#2672] / [i915#3555])
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/shard-iclb3/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling@pipe-a-default-mode.html
* igt@kms_plane_scaling@plane-downscale-with-modifiers-factor-0-5@pipe-a-dp-1:
- shard-apl: NOTRUN -> [SKIP][66] ([fdo#109271]) +26 similar issues
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/shard-apl1/igt@kms_plane_scaling@plane-downscale-with-modifiers-factor-0-5@pipe-a-dp-1.html
* igt@kms_psr@psr2_primary_mmap_cpu:
- shard-iclb: [PASS][67] -> [SKIP][68] ([fdo#109441]) +2 similar issues
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12204/shard-iclb2/igt@kms_psr@psr2_primary_mmap_cpu.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/shard-iclb7/igt@kms_psr@psr2_primary_mmap_cpu.html
* igt@kms_psr_stress_test@flip-primary-invalidate-overlay:
- shard-tglb: [PASS][69] -> [SKIP][70] ([i915#5519])
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12204/shard-tglb8/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/shard-tglb1/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html
* igt@perf@stress-open-close:
- shard-glk: [PASS][71] -> [INCOMPLETE][72] ([i915#5213])
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12204/shard-glk8/igt@perf@stress-open-close.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/shard-glk1/igt@perf@stress-open-close.html
#### Possible fixes ####
* igt@gem_ctx_isolation@preservation-s3@rcs0:
- shard-apl: [DMESG-WARN][73] ([i915#180]) -> [PASS][74]
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12204/shard-apl7/igt@gem_ctx_isolation@preservation-s3@rcs0.html
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/shard-apl1/igt@gem_ctx_isolation@preservation-s3@rcs0.html
* igt@gen9_exec_parse@bb-large:
- shard-apl: [TIMEOUT][75] ([i915#4639]) -> [PASS][76]
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12204/shard-apl2/igt@gen9_exec_parse@bb-large.html
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/shard-apl1/igt@gen9_exec_parse@bb-large.html
* igt@kms_addfb_basic@legacy-format:
- shard-tglb: [INCOMPLETE][77] ([i915#6987]) -> [PASS][78]
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12204/shard-tglb3/igt@kms_addfb_basic@legacy-format.html
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/shard-tglb2/igt@kms_addfb_basic@legacy-format.html
* igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions-varying-size:
- shard-glk: [FAIL][79] ([i915#2346]) -> [PASS][80]
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12204/shard-glk2/igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions-varying-size.html
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/shard-glk8/igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions-varying-size.html
* igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5@pipe-a-edp-1:
- shard-iclb: [SKIP][81] ([i915#5235]) -> [PASS][82] +2 similar issues
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12204/shard-iclb2/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5@pipe-a-edp-1.html
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/shard-iclb8/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5@pipe-a-edp-1.html
* igt@kms_psr2_su@frontbuffer-xrgb8888:
- shard-iclb: [SKIP][83] ([fdo#109642] / [fdo#111068] / [i915#658]) -> [PASS][84]
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12204/shard-iclb1/igt@kms_psr2_su@frontbuffer-xrgb8888.html
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/shard-iclb2/igt@kms_psr2_su@frontbuffer-xrgb8888.html
* igt@kms_psr@psr2_cursor_mmap_gtt:
- shard-iclb: [SKIP][85] ([fdo#109441]) -> [PASS][86]
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12204/shard-iclb7/igt@kms_psr@psr2_cursor_mmap_gtt.html
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/shard-iclb2/igt@kms_psr@psr2_cursor_mmap_gtt.html
* igt@perf@polling-parameterized:
- shard-tglb: [FAIL][87] ([i915#5639]) -> [PASS][88]
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12204/shard-tglb7/igt@perf@polling-parameterized.html
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/shard-tglb7/igt@perf@polling-parameterized.html
#### Warnings ####
* igt@i915_pm_dc@dc3co-vpb-simulation:
- shard-iclb: [SKIP][89] ([i915#588]) -> [SKIP][90] ([i915#658])
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12204/shard-iclb2/igt@i915_pm_dc@dc3co-vpb-simulation.html
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/shard-iclb7/igt@i915_pm_dc@dc3co-vpb-simulation.html
* igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-fully-sf:
- shard-iclb: [SKIP][91] ([i915#658]) -> [SKIP][92] ([i915#2920])
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12204/shard-iclb1/igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-fully-sf.html
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/shard-iclb2/igt@kms_psr2_sf@cursor-plane-move-continuous-exceed-fully-sf.html
* igt@kms_psr2_sf@overlay-plane-update-continuous-sf:
- shard-iclb: [SKIP][93] ([fdo#111068] / [i915#658]) -> [SKIP][94] ([i915#2920])
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12204/shard-iclb4/igt@kms_psr2_sf@overlay-plane-update-continuous-sf.html
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/shard-iclb2/igt@kms_psr2_sf@overlay-plane-update-continuous-sf.html
* igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-big-fb:
- shard-iclb: [SKIP][95] ([i915#2920]) -> [SKIP][96] ([i915#658])
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12204/shard-iclb2/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-big-fb.html
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/shard-iclb8/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area-big-fb.html
* igt@kms_psr2_su@page_flip-p010:
- shard-iclb: [SKIP][97] ([fdo#109642] / [fdo#111068] / [i915#658]) -> [FAIL][98] ([i915#5939])
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12204/shard-iclb4/igt@kms_psr2_su@page_flip-p010.html
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/shard-iclb2/igt@kms_psr2_su@page_flip-p010.html
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122
[i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
[i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
[i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
[i915#2920]: https://gitlab.freedesktop.org/drm/intel/issues/2920
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#4386]: https://gitlab.freedesktop.org/drm/intel/issues/4386
[i915#4525]: https://gitlab.freedesktop.org/drm/intel/issues/4525
[i915#4639]: https://gitlab.freedesktop.org/drm/intel/issues/4639
[i915#4939]: https://gitlab.freedesktop.org/drm/intel/issues/4939
[i915#4991]: https://gitlab.freedesktop.org/drm/intel/issues/4991
[i915#5213]: https://gitlab.freedesktop.org/drm/intel/issues/5213
[i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
[i915#5519]: https://gitlab.freedesktop.org/drm/intel/issues/5519
[i915#5639]: https://gitlab.freedesktop.org/drm/intel/issues/5639
[i915#588]: https://gitlab.freedesktop.org/drm/intel/issues/588
[i915#5939]: https://gitlab.freedesktop.org/drm/intel/issues/5939
[i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
[i915#6987]: https://gitlab.freedesktop.org/drm/intel/issues/6987
Build changes
-------------
* Linux: CI_DRM_12204 -> Patchwork_109303v2
CI-20190529: 20190529
CI_DRM_12204: fd2f9b9a4178e667adad268a662eb8a9c0ddc8f8 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6670: d618e9865fe5cbaf511ca43503abad442605d0a5 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_109303v2: fd2f9b9a4178e667adad268a662eb8a9c0ddc8f8 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_109303v2/index.html
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^ permalink raw reply [flat|nested] 14+ messages in thread
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-- links below jump to the message on this page --
2022-10-03 11:15 [Intel-gfx] [PATCH v2 0/6] drm/i915: Fix watermark calculations with various CCS modifiers Ville Syrjala
2022-10-03 11:15 ` [PATCH v2 1/6] drm/i915: Fix watermark calculations for gen12+ RC CCS modifier Ville Syrjala
2022-10-03 11:15 ` [Intel-gfx] " Ville Syrjala
2022-10-03 11:15 ` [PATCH v2 2/6] drm/i915: Fix watermark calculations for gen12+ MC " Ville Syrjala
2022-10-03 11:15 ` [Intel-gfx] " Ville Syrjala
2022-10-03 11:15 ` [PATCH v2 3/6] drm/i915: Fix watermark calculations for gen12+ CCS+CC modifier Ville Syrjala
2022-10-03 11:15 ` [Intel-gfx] " Ville Syrjala
2022-10-03 11:15 ` [PATCH v2 4/6] drm/i915: Fix watermark calculations for DG2 CCS modifiers Ville Syrjala
2022-10-03 11:15 ` [Intel-gfx] " Ville Syrjala
2022-10-03 11:15 ` [PATCH v2 5/6] drm/i915: Fix watermark calculations for DG2 CCS+CC modifier Ville Syrjala
2022-10-03 11:15 ` [Intel-gfx] " Ville Syrjala
2022-10-03 11:15 ` [Intel-gfx] [PATCH v2 6/6] drm/i915: Simplify modifier lookup in watermark code Ville Syrjala
2022-10-03 12:46 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Fix watermark calculations with various CCS modifiers (rev2) Patchwork
2022-10-03 14:07 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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