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* [Intel-gfx] [PATCH] drm/i915/gsc: Only initialize GSC in tile 0
@ 2022-10-31  5:51 Alexander Usyskin
  2022-10-31  6:55 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for " Patchwork
  2022-10-31  9:35 ` [Intel-gfx] [PATCH] " Rodrigo Vivi
  0 siblings, 2 replies; 6+ messages in thread
From: Alexander Usyskin @ 2022-10-31  5:51 UTC (permalink / raw)
  To: Jani Nikula, Joonas Lahtinen, Rodrigo Vivi, David Airlie,
	Daniel Vetter, Tvrtko Ursulin
  Cc: Tomas Winkler, Alexander Usyskin, Vitaly Lubart, intel-gfx

From: José Roberto de Souza <jose.souza@intel.com>

For multi-tile setups the GSC operational only on the tile 0.
Skip GSC auxiliary device creation for all other tiles.

Cc: Tomas Winkler <tomas.winkler@intel.com>
Cc: Vitaly Lubart <vitaly.lubart@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_gt.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
index 2e796ffad911..92ad8cd45ddb 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt.c
@@ -456,7 +456,10 @@ void intel_gt_chipset_flush(struct intel_gt *gt)
 
 void intel_gt_driver_register(struct intel_gt *gt)
 {
-	intel_gsc_init(&gt->gsc, gt->i915);
+	if (gt->info.id == 0)
+		intel_gsc_init(&gt->gsc, gt->i915);
+	else
+		drm_dbg(&gt->i915->drm, "Not initializing gsc for remote tiles\n");
 
 	intel_rps_driver_register(&gt->rps);
 
@@ -787,7 +790,8 @@ void intel_gt_driver_unregister(struct intel_gt *gt)
 
 	intel_gt_sysfs_unregister(gt);
 	intel_rps_driver_unregister(&gt->rps);
-	intel_gsc_fini(&gt->gsc);
+	if (gt->info.id == 0)
+		intel_gsc_fini(&gt->gsc);
 
 	intel_pxp_fini(&gt->pxp);
 
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/gsc: Only initialize GSC in tile 0
  2022-10-31  5:51 [Intel-gfx] [PATCH] drm/i915/gsc: Only initialize GSC in tile 0 Alexander Usyskin
@ 2022-10-31  6:55 ` Patchwork
  2022-10-31  9:35 ` [Intel-gfx] [PATCH] " Rodrigo Vivi
  1 sibling, 0 replies; 6+ messages in thread
From: Patchwork @ 2022-10-31  6:55 UTC (permalink / raw)
  To: Alexander Usyskin; +Cc: intel-gfx

[-- Attachment #1: Type: text/plain, Size: 6909 bytes --]

== Series Details ==

Series: drm/i915/gsc: Only initialize GSC in tile 0
URL   : https://patchwork.freedesktop.org/series/110304/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_12320 -> Patchwork_110304v1
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_110304v1 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_110304v1, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110304v1/index.html

Participating hosts (40 -> 36)
------------------------------

  Missing    (4): fi-ctg-p8600 fi-rkl-11600 fi-bdw-samus fi-elk-e7500 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_110304v1:

### IGT changes ###

#### Possible regressions ####

  * igt@gem_exec_parallel@engines@contexts:
    - fi-bdw-gvtdvm:      [PASS][1] -> [INCOMPLETE][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12320/fi-bdw-gvtdvm/igt@gem_exec_parallel@engines@contexts.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110304v1/fi-bdw-gvtdvm/igt@gem_exec_parallel@engines@contexts.html

  
#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@i915_selftest@live@gt_timelines:
    - {fi-jsl-1}:         [PASS][3] -> [DMESG-WARN][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12320/fi-jsl-1/igt@i915_selftest@live@gt_timelines.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110304v1/fi-jsl-1/igt@i915_selftest@live@gt_timelines.html

  
Known issues
------------

  Here are the changes found in Patchwork_110304v1 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_chamelium@common-hpd-after-suspend:
    - fi-hsw-4770:        NOTRUN -> [SKIP][5] ([fdo#109271] / [fdo#111827])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110304v1/fi-hsw-4770/igt@kms_chamelium@common-hpd-after-suspend.html
    - bat-adlp-4:         NOTRUN -> [SKIP][6] ([fdo#111827])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110304v1/bat-adlp-4/igt@kms_chamelium@common-hpd-after-suspend.html

  * igt@kms_pipe_crc_basic@suspend-read-crc:
    - bat-adlp-4:         NOTRUN -> [SKIP][7] ([i915#3546])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110304v1/bat-adlp-4/igt@kms_pipe_crc_basic@suspend-read-crc.html

  * igt@runner@aborted:
    - fi-bdw-gvtdvm:      NOTRUN -> [FAIL][8] ([i915#4312])
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110304v1/fi-bdw-gvtdvm/igt@runner@aborted.html

  
#### Possible fixes ####

  * igt@gem_huc_copy@huc-copy:
    - {bat-dg2-9}:        [FAIL][9] ([i915#7029]) -> [PASS][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12320/bat-dg2-9/igt@gem_huc_copy@huc-copy.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110304v1/bat-dg2-9/igt@gem_huc_copy@huc-copy.html

  * igt@i915_selftest@live@gt_heartbeat:
    - fi-bxt-dsi:         [DMESG-FAIL][11] ([i915#5334]) -> [PASS][12]
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12320/fi-bxt-dsi/igt@i915_selftest@live@gt_heartbeat.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110304v1/fi-bxt-dsi/igt@i915_selftest@live@gt_heartbeat.html

  * igt@i915_selftest@live@guc:
    - {bat-rpls-2}:       [DMESG-WARN][13] ([i915#6471]) -> [PASS][14]
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12320/bat-rpls-2/igt@i915_selftest@live@guc.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110304v1/bat-rpls-2/igt@i915_selftest@live@guc.html

  * igt@i915_selftest@live@hangcheck:
    - fi-hsw-4770:        [INCOMPLETE][15] ([i915#4785]) -> [PASS][16]
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12320/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110304v1/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html

  * igt@i915_selftest@live@migrate:
    - bat-adlp-4:         [INCOMPLETE][17] ([i915#7308] / [i915#7348]) -> [PASS][18]
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12320/bat-adlp-4/igt@i915_selftest@live@migrate.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110304v1/bat-adlp-4/igt@i915_selftest@live@migrate.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions-varying-size:
    - fi-bsw-kefka:       [FAIL][19] ([i915#6298]) -> [PASS][20]
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12320/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions-varying-size.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110304v1/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic-transitions-varying-size.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#2867]: https://gitlab.freedesktop.org/drm/intel/issues/2867
  [i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
  [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
  [i915#4785]: https://gitlab.freedesktop.org/drm/intel/issues/4785
  [i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
  [i915#5537]: https://gitlab.freedesktop.org/drm/intel/issues/5537
  [i915#6298]: https://gitlab.freedesktop.org/drm/intel/issues/6298
  [i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
  [i915#6471]: https://gitlab.freedesktop.org/drm/intel/issues/6471
  [i915#6997]: https://gitlab.freedesktop.org/drm/intel/issues/6997
  [i915#7029]: https://gitlab.freedesktop.org/drm/intel/issues/7029
  [i915#7308]: https://gitlab.freedesktop.org/drm/intel/issues/7308
  [i915#7346]: https://gitlab.freedesktop.org/drm/intel/issues/7346
  [i915#7348]: https://gitlab.freedesktop.org/drm/intel/issues/7348


Build changes
-------------

  * Linux: CI_DRM_12320 -> Patchwork_110304v1

  CI-20190529: 20190529
  CI_DRM_12320: 4679e20be07ab65a9288fc583aa390fd244356ed @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7030: 79f028ce7a0e5003e108055e25f0333e14fd1aca @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_110304v1: 4679e20be07ab65a9288fc583aa390fd244356ed @ git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

5c6256d83b97 drm/i915/gsc: Only initialize GSC in tile 0

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_110304v1/index.html

[-- Attachment #2: Type: text/html, Size: 7557 bytes --]

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [Intel-gfx] [PATCH] drm/i915/gsc: Only initialize GSC in tile 0
  2022-10-31  5:51 [Intel-gfx] [PATCH] drm/i915/gsc: Only initialize GSC in tile 0 Alexander Usyskin
  2022-10-31  6:55 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for " Patchwork
@ 2022-10-31  9:35 ` Rodrigo Vivi
  2022-10-31  9:48   ` Winkler, Tomas
  1 sibling, 1 reply; 6+ messages in thread
From: Rodrigo Vivi @ 2022-10-31  9:35 UTC (permalink / raw)
  To: Alexander Usyskin
  Cc: David Airlie, intel-gfx, Daniel Vetter, Tomas Winkler, Vitaly Lubart

On Mon, Oct 31, 2022 at 07:51:17AM +0200, Alexander Usyskin wrote:
> From: José Roberto de Souza <jose.souza@intel.com>
> 
> For multi-tile setups the GSC operational only on the tile 0.
> Skip GSC auxiliary device creation for all other tiles.
> 
> Cc: Tomas Winkler <tomas.winkler@intel.com>
> Cc: Vitaly Lubart <vitaly.lubart@intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
> ---
>  drivers/gpu/drm/i915/gt/intel_gt.c | 8 ++++++--
>  1 file changed, 6 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c
> index 2e796ffad911..92ad8cd45ddb 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.c
> @@ -456,7 +456,10 @@ void intel_gt_chipset_flush(struct intel_gt *gt)
>  
>  void intel_gt_driver_register(struct intel_gt *gt)
>  {
> -	intel_gsc_init(&gt->gsc, gt->i915);
> +	if (gt->info.id == 0)
> +		intel_gsc_init(&gt->gsc, gt->i915);
> +	else
> +		drm_dbg(&gt->i915->drm, "Not initializing gsc for remote tiles\n");

It looks to me that we need to move the gsc out of the intel_gt
instead of workaround the initialization.

>  
>  	intel_rps_driver_register(&gt->rps);
>  
> @@ -787,7 +790,8 @@ void intel_gt_driver_unregister(struct intel_gt *gt)
>  
>  	intel_gt_sysfs_unregister(gt);
>  	intel_rps_driver_unregister(&gt->rps);
> -	intel_gsc_fini(&gt->gsc);
> +	if (gt->info.id == 0)
> +		intel_gsc_fini(&gt->gsc);
>  
>  	intel_pxp_fini(&gt->pxp);
>  
> -- 
> 2.34.1
> 

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [Intel-gfx] [PATCH] drm/i915/gsc: Only initialize GSC in tile 0
  2022-10-31  9:35 ` [Intel-gfx] [PATCH] " Rodrigo Vivi
@ 2022-10-31  9:48   ` Winkler, Tomas
  2022-10-31 10:15     ` Rodrigo Vivi
  0 siblings, 1 reply; 6+ messages in thread
From: Winkler, Tomas @ 2022-10-31  9:48 UTC (permalink / raw)
  To: Vivi, Rodrigo, Usyskin, Alexander
  Cc: David Airlie, intel-gfx, Daniel Vetter, Lubart, Vitaly


> 
> On Mon, Oct 31, 2022 at 07:51:17AM +0200, Alexander Usyskin wrote:
> > From: José Roberto de Souza <jose.souza@intel.com>
> >
> > For multi-tile setups the GSC operational only on the tile 0.
> > Skip GSC auxiliary device creation for all other tiles.
> >
> > Cc: Tomas Winkler <tomas.winkler@intel.com>
> > Cc: Vitaly Lubart <vitaly.lubart@intel.com>
> > Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> > Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
> > ---
> >  drivers/gpu/drm/i915/gt/intel_gt.c | 8 ++++++--
> >  1 file changed, 6 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c
> > b/drivers/gpu/drm/i915/gt/intel_gt.c
> > index 2e796ffad911..92ad8cd45ddb 100644
> > --- a/drivers/gpu/drm/i915/gt/intel_gt.c
> > +++ b/drivers/gpu/drm/i915/gt/intel_gt.c
> > @@ -456,7 +456,10 @@ void intel_gt_chipset_flush(struct intel_gt *gt)
> >
> >  void intel_gt_driver_register(struct intel_gt *gt)  {
> > -	intel_gsc_init(&gt->gsc, gt->i915);
> > +	if (gt->info.id == 0)
> > +		intel_gsc_init(&gt->gsc, gt->i915);
> > +	else
> > +		drm_dbg(&gt->i915->drm, "Not initializing gsc for remote
> tiles\n");
> 
> It looks to me that we need to move the gsc out of the intel_gt instead of
> workaround the initialization.

The interrupts are handled by gt, so where this should go ? 


^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [Intel-gfx] [PATCH] drm/i915/gsc: Only initialize GSC in tile 0
  2022-10-31  9:48   ` Winkler, Tomas
@ 2022-10-31 10:15     ` Rodrigo Vivi
  2022-11-09 14:56       ` Usyskin, Alexander
  0 siblings, 1 reply; 6+ messages in thread
From: Rodrigo Vivi @ 2022-10-31 10:15 UTC (permalink / raw)
  To: Winkler, Tomas
  Cc: David Airlie, intel-gfx, Usyskin, Alexander, Daniel Vetter,
	Lubart, Vitaly

On Mon, Oct 31, 2022 at 05:48:07AM -0400, Winkler, Tomas wrote:
> 
> > 
> > On Mon, Oct 31, 2022 at 07:51:17AM +0200, Alexander Usyskin wrote:
> > > From: José Roberto de Souza <jose.souza@intel.com>
> > >
> > > For multi-tile setups the GSC operational only on the tile 0.
> > > Skip GSC auxiliary device creation for all other tiles.
> > >
> > > Cc: Tomas Winkler <tomas.winkler@intel.com>
> > > Cc: Vitaly Lubart <vitaly.lubart@intel.com>
> > > Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> > > Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/gt/intel_gt.c | 8 ++++++--
> > >  1 file changed, 6 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c
> > > b/drivers/gpu/drm/i915/gt/intel_gt.c
> > > index 2e796ffad911..92ad8cd45ddb 100644
> > > --- a/drivers/gpu/drm/i915/gt/intel_gt.c
> > > +++ b/drivers/gpu/drm/i915/gt/intel_gt.c
> > > @@ -456,7 +456,10 @@ void intel_gt_chipset_flush(struct intel_gt *gt)
> > >
> > >  void intel_gt_driver_register(struct intel_gt *gt)  {
> > > -	intel_gsc_init(&gt->gsc, gt->i915);
> > > +	if (gt->info.id == 0)
> > > +		intel_gsc_init(&gt->gsc, gt->i915);
> > > +	else
> > > +		drm_dbg(&gt->i915->drm, "Not initializing gsc for remote
> > tiles\n");
> > 
> > It looks to me that we need to move the gsc out of the intel_gt instead of
> > workaround the initialization.
> 
> The interrupts are handled by gt, so where this should go ? 
> 

Ouch, I've seen it now. But still this patch brings me more doubts...

is gsc really a per-gt thing? if not why the gsc irq is in the gt domain?
if yes why the one in the second tile not operational?

if it is not a per-tile thing and only the irq is in a bad spot we could
still move it outside gt and make the irq to be redirected.

well, if it is really a per tile thing but it is fused of, do we have hw
ways to detect that?

if it is really a tile thing and we don't have better ways to identify
we might want to do with this patch, but add a bit more information on the
reasons and also double checking if by avoiding the initialization we are
sure that we are not going to reach any case of attempting to utilize the
un-initialized gsc.

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [Intel-gfx] [PATCH] drm/i915/gsc: Only initialize GSC in tile 0
  2022-10-31 10:15     ` Rodrigo Vivi
@ 2022-11-09 14:56       ` Usyskin, Alexander
  0 siblings, 0 replies; 6+ messages in thread
From: Usyskin, Alexander @ 2022-11-09 14:56 UTC (permalink / raw)
  To: Vivi, Rodrigo, Winkler, Tomas
  Cc: David Airlie, intel-gfx, Daniel Vetter, Lubart, Vitaly

> > >
> > > It looks to me that we need to move the gsc out of the intel_gt instead of
> > > workaround the initialization.
> >
> > The interrupts are handled by gt, so where this should go ?
> >
> 
> Ouch, I've seen it now. But still this patch brings me more doubts...
> 
> is gsc really a per-gt thing? if not why the gsc irq is in the gt domain?
> if yes why the one in the second tile not operational?
> 
> if it is not a per-tile thing and only the irq is in a bad spot we could
> still move it outside gt and make the irq to be redirected.
> 
> well, if it is really a per tile thing but it is fused of, do we have hw
> ways to detect that?
> 
> if it is really a tile thing and we don't have better ways to identify
> we might want to do with this patch, but add a bit more information on the
> reasons and also double checking if by avoiding the initialization we are
> sure that we are not going to reach any case of attempting to utilize the
> un-initialized gsc.

The GSC is present on all tiles but functional only on the first one.
There is no way to detect if GSC is functional per-tile.

Good point about double check, we have also interrupt handler.
Should not fire without GSC running, but better to protect here too.

We have code that skip initialization of one of the heads provided by GSC.
I'll utilize the same path to disable here, so that should be safe and already broadly tested.
Will publish new version soon.

--
Alexander (Sasha) Usyskin

CSE FW Dev - Host SW
Intel Israel (74) Limited




^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2022-11-09 14:56 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-10-31  5:51 [Intel-gfx] [PATCH] drm/i915/gsc: Only initialize GSC in tile 0 Alexander Usyskin
2022-10-31  6:55 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for " Patchwork
2022-10-31  9:35 ` [Intel-gfx] [PATCH] " Rodrigo Vivi
2022-10-31  9:48   ` Winkler, Tomas
2022-10-31 10:15     ` Rodrigo Vivi
2022-11-09 14:56       ` Usyskin, Alexander

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