* [igt-dev] [PATCH i-g-t v2 0/4] Remove libdrm remnants in i915 code
@ 2022-11-28 16:15 Zbigniew Kempczyński
2022-11-28 16:15 ` [igt-dev] [PATCH i-g-t v2 1/4] tests/prime_udl: Remove intel-libdrm dependency Zbigniew Kempczyński
` (5 more replies)
0 siblings, 6 replies; 8+ messages in thread
From: Zbigniew Kempczyński @ 2022-11-28 16:15 UTC (permalink / raw)
To: igt-dev
v2: rewrite instead of prime_udl/prime_nv_* removals.
I want finally remove all libdrm stuff, to get this I had to:
1. rewrite prime_udl test - it is not used in CI due to lack of
DisplayLink hardware and I also don't have such hardware so
this is blind rewrite
2. rewrite prime_nv_* tests - similar to prime_udl (blind rewrite)
3. rewrite intel_upload_blit_* benchmarks - I tried to mimic
behavior as much as possible but there'e some minor differences
in execution time. I think it is related to libdrm internals
(how it caches handles/mappings). I'm not sure but it shouldn't
much affect what benchmark is exercising.
4. remove all intel_batchbuffer_* code
Cc: Petri Latvala <petri.latvala@intel.com>
Zbigniew Kempczyński (4):
tests/prime_udl: Remove intel-libdrm dependency
tests/prime_nv: Remove intel-libdrm calls
benchmarks/intel_upload_blit_*: Remove libdrm in upload blits
lib/intel_batchbuffer: Get rid of libdrm batchbuffer
benchmarks/intel_upload_blit_large.c | 131 +++---
benchmarks/intel_upload_blit_large_gtt.c | 130 ++---
benchmarks/intel_upload_blit_large_map.c | 132 +++---
benchmarks/intel_upload_blit_small.c | 139 +++---
lib/intel_batchbuffer.c | 574 +----------------------
lib/intel_batchbuffer.h | 248 ----------
tests/prime_nv_api.c | 151 +++---
tests/prime_nv_pcopy.c | 107 ++---
tests/prime_nv_test.c | 162 +++----
tests/prime_udl.c | 60 +--
10 files changed, 507 insertions(+), 1327 deletions(-)
--
2.34.1
^ permalink raw reply [flat|nested] 8+ messages in thread
* [igt-dev] [PATCH i-g-t v2 1/4] tests/prime_udl: Remove intel-libdrm dependency
2022-11-28 16:15 [igt-dev] [PATCH i-g-t v2 0/4] Remove libdrm remnants in i915 code Zbigniew Kempczyński
@ 2022-11-28 16:15 ` Zbigniew Kempczyński
2022-11-28 16:15 ` [igt-dev] [PATCH i-g-t v2 2/4] tests/prime_nv: Remove intel-libdrm calls Zbigniew Kempczyński
` (4 subsequent siblings)
5 siblings, 0 replies; 8+ messages in thread
From: Zbigniew Kempczyński @ 2022-11-28 16:15 UTC (permalink / raw)
To: igt-dev
To remove all intel-libdrm code in intel_batchbuffer we need to rewrite
and drop it in all dependent code. Currently CI doesn't exercise this
test and I don't have DisplayLink hardware so this is blind rewrite
(instead of removing the test). Common xf86drmMode calls are left
intact as igt likely won't remove libdrm totally.
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Petri Latvala <petri.latvala@intel.com>
---
tests/prime_udl.c | 60 +++++++++++++++++------------------------------
1 file changed, 21 insertions(+), 39 deletions(-)
diff --git a/tests/prime_udl.c b/tests/prime_udl.c
index 582e31f5df..60e357e5d5 100644
--- a/tests/prime_udl.c
+++ b/tests/prime_udl.c
@@ -12,6 +12,7 @@
#include <xf86drmMode.h>
#include "intel_bufmgr.h"
+#include "i915/gem_create.h"
IGT_TEST_DESCRIPTION("Basic set of prime tests between Intel and DisplayLink");
@@ -78,57 +79,50 @@ static int dumb_bo_destroy(int fd, uint32_t handle)
/*
* simple share and import
*/
-static int test1(void)
+static void test1(void)
{
- drm_intel_bo *test_intel_bo;
+ uint32_t intel_handle, udl_handle;
int prime_fd;
- int ret;
- uint32_t udl_handle;
- test_intel_bo = drm_intel_bo_alloc(bufmgr, "test bo", BO_SIZE, 4096);
+ intel_handle = gem_create(intel_fd, BO_SIZE);
- drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd);
+ prime_fd = prime_handle_to_fd(intel_fd, intel_handle);
+ igt_assert(prime_fd >= 0);
- ret = drmPrimeFDToHandle(udl_fd, prime_fd, &udl_handle);
+ udl_handle = prime_fd_to_handle(udl_fd, prime_fd);
+ igt_assert(udl_handle > 0);
dumb_bo_destroy(udl_fd, udl_handle);
- drm_intel_bo_unreference(test_intel_bo);
- return ret;
+ gem_close(intel_fd, intel_handle);
}
-static int test2(void)
+static void test2(void)
{
- drm_intel_bo *test_intel_bo;
+ uint32_t intel_handle, udl_handle;
uint32_t fb_id;
drmModeClip clip;
int prime_fd;
- uint32_t udl_handle;
int ret;
- test_intel_bo = drm_intel_bo_alloc(bufmgr, "test bo", BO_SIZE, 4096);
+ intel_handle = gem_create(intel_fd, BO_SIZE);
- drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd);
+ prime_fd = prime_handle_to_fd(intel_fd, intel_handle);
+ igt_assert(prime_fd >= 0);
- ret = drmPrimeFDToHandle(udl_fd, prime_fd, &udl_handle);
- if (ret)
- goto out;
+ udl_handle = prime_fd_to_handle(udl_fd, prime_fd);
ret = drmModeAddFB(udl_fd, 640, 480, 16, 16, 640, udl_handle, &fb_id);
- if (ret)
- goto out;
+ igt_assert(ret == 0);
clip.x1 = 0;
clip.y1 = 0;
clip.x2 = 10;
clip.y2 = 10;
ret = drmModeDirtyFB(udl_fd, fb_id, &clip, 1);
- if (ret) {
- return ret;
- }
-out:
+ igt_assert(ret == 0);
+
dumb_bo_destroy(udl_fd, udl_handle);
- drm_intel_bo_unreference(test_intel_bo);
- return ret;
+ gem_close(intel_fd, intel_handle);
}
igt_simple_main
@@ -138,22 +132,10 @@ igt_simple_main
igt_skip_on(udl_fd == -1);
igt_skip_on(intel_fd == -1);
- /* set up intel bufmgr */
- bufmgr = drm_intel_bufmgr_gem_init(intel_fd, 4096);
- drm_intel_bufmgr_gem_enable_reuse(bufmgr);
-
- /* set up an intel batch buffer */
- devid = intel_get_drm_devid(intel_fd);
- intel_batch = intel_batchbuffer_alloc(bufmgr, devid);
-
/* create an object on the i915 */
- igt_assert(test1() == 0);
-
- igt_assert(test2() == 0);
-
- intel_batchbuffer_free(intel_batch);
+ test1();
- drm_intel_bufmgr_destroy(bufmgr);
+ test2();
close(intel_fd);
close(udl_fd);
--
2.34.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [igt-dev] [PATCH i-g-t v2 2/4] tests/prime_nv: Remove intel-libdrm calls
2022-11-28 16:15 [igt-dev] [PATCH i-g-t v2 0/4] Remove libdrm remnants in i915 code Zbigniew Kempczyński
2022-11-28 16:15 ` [igt-dev] [PATCH i-g-t v2 1/4] tests/prime_udl: Remove intel-libdrm dependency Zbigniew Kempczyński
@ 2022-11-28 16:15 ` Zbigniew Kempczyński
2022-11-28 16:15 ` [igt-dev] [PATCH i-g-t v2 3/4] benchmarks/intel_upload_blit_*: Remove libdrm in upload blits Zbigniew Kempczyński
` (3 subsequent siblings)
5 siblings, 0 replies; 8+ messages in thread
From: Zbigniew Kempczyński @ 2022-11-28 16:15 UTC (permalink / raw)
To: igt-dev
Replace intel-libdrm calls with already existing IGT wrappers. We need
this to completely remove intel_batchbuffer helpers.
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
Cc: Petri Latvala <petri.latvala@intel.com>
---
tests/prime_nv_api.c | 151 +++++++++++++++-----------------------
tests/prime_nv_pcopy.c | 107 +++++++++++----------------
tests/prime_nv_test.c | 162 ++++++++++++++++++-----------------------
3 files changed, 173 insertions(+), 247 deletions(-)
diff --git a/tests/prime_nv_api.c b/tests/prime_nv_api.c
index 054a1ec64a..cb3d52e8d6 100644
--- a/tests/prime_nv_api.c
+++ b/tests/prime_nv_api.c
@@ -15,18 +15,14 @@
#include <fcntl.h>
#include <sys/stat.h>
-#include "intel_bufmgr.h"
+#include "i915/gem_create.h"
#include "nouveau.h"
#define BO_SIZE (256*1024)
int intel_fd = -1, intel_fd2 = -1, nouveau_fd = -1, nouveau_fd2 = -1;
-drm_intel_bufmgr *bufmgr;
-drm_intel_bufmgr *bufmgr2;
struct nouveau_device *ndev, *ndev2;
struct nouveau_client *nclient, *nclient2;
-uint32_t devid;
-struct intel_batchbuffer *intel_batch;
static void find_and_open_devices(void)
{
@@ -69,13 +65,12 @@ static void find_and_open_devices(void)
static void test_i915_nv_import_twice(void)
{
- drm_intel_bo *test_intel_bo;
+ uint32_t intel_handle;
int prime_fd;
struct nouveau_bo *nvbo = NULL, *nvbo2 = NULL;
- test_intel_bo = drm_intel_bo_alloc(bufmgr, "test bo", BO_SIZE, 4096);
-
- igt_assert(drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd) == 0);
+ intel_handle = gem_create(intel_fd, BO_SIZE);
+ prime_fd = prime_handle_to_fd(intel_fd, intel_handle);
igt_assert(nouveau_bo_prime_handle_ref(ndev, prime_fd, &nvbo) == 0);
igt_assert(nouveau_bo_prime_handle_ref(ndev2, prime_fd, &nvbo2) == 0);
@@ -83,19 +78,18 @@ static void test_i915_nv_import_twice(void)
nouveau_bo_ref(NULL, &nvbo2);
nouveau_bo_ref(NULL, &nvbo);
- drm_intel_bo_unreference(test_intel_bo);
+ gem_close(intel_fd, intel_handle);
}
static void test_i915_nv_import_twice_check_flink_name(void)
{
- drm_intel_bo *test_intel_bo;
+ uint32_t intel_handle;
int prime_fd;
struct nouveau_bo *nvbo = NULL, *nvbo2 = NULL;
uint32_t flink_name1, flink_name2;
- test_intel_bo = drm_intel_bo_alloc(bufmgr, "test bo", BO_SIZE, 4096);
-
- igt_assert(drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd) == 0);
+ intel_handle = gem_create(intel_fd, BO_SIZE);
+ prime_fd = prime_handle_to_fd(intel_fd, intel_handle);
igt_assert(nouveau_bo_prime_handle_ref(ndev, prime_fd, &nvbo) == 0);
igt_assert(nouveau_bo_prime_handle_ref(ndev2, prime_fd, &nvbo2) == 0);
@@ -108,25 +102,24 @@ static void test_i915_nv_import_twice_check_flink_name(void)
nouveau_bo_ref(NULL, &nvbo2);
nouveau_bo_ref(NULL, &nvbo);
- drm_intel_bo_unreference(test_intel_bo);
+ gem_close(intel_fd, intel_handle);
}
static void test_i915_nv_reimport_twice_check_flink_name(void)
{
- drm_intel_bo *test_intel_bo;
+ uint32_t intel_handle;
int prime_fd;
struct nouveau_bo *nvbo = NULL, *nvbo2 = NULL;
uint32_t flink_name1, flink_name2;
- test_intel_bo = drm_intel_bo_alloc(bufmgr, "test bo", BO_SIZE, 4096);
-
- igt_assert(drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd) == 0);
+ intel_handle = gem_create(intel_fd, BO_SIZE);
+ prime_fd = prime_handle_to_fd(intel_fd, intel_handle);
igt_assert(nouveau_bo_prime_handle_ref(ndev, prime_fd, &nvbo) == 0);
/* create a new dma-buf */
close(prime_fd);
- igt_assert(drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd) == 0);
+ prime_fd = prime_handle_to_fd(intel_fd, intel_handle);
igt_assert(nouveau_bo_prime_handle_ref(ndev2, prime_fd, &nvbo2) == 0);
close(prime_fd);
@@ -138,12 +131,12 @@ static void test_i915_nv_reimport_twice_check_flink_name(void)
nouveau_bo_ref(NULL, &nvbo2);
nouveau_bo_ref(NULL, &nvbo);
- drm_intel_bo_unreference(test_intel_bo);
+ gem_close(intel_fd, intel_handle);
}
static void test_nv_i915_import_twice_check_flink_name(void)
{
- drm_intel_bo *intel_bo = NULL, *intel_bo2 = NULL;
+ uint32_t intel_handle, intel_handle2;
int prime_fd;
struct nouveau_bo *nvbo = NULL;
uint32_t flink_name1, flink_name2;
@@ -153,26 +146,23 @@ static void test_nv_i915_import_twice_check_flink_name(void)
igt_assert(nouveau_bo_set_prime(nvbo, &prime_fd) == 0);
- intel_bo = drm_intel_bo_gem_create_from_prime(bufmgr, prime_fd, BO_SIZE);
- igt_assert(intel_bo);
-
- intel_bo2 = drm_intel_bo_gem_create_from_prime(bufmgr2, prime_fd, BO_SIZE);
- igt_assert(intel_bo2);
+ intel_handle = prime_fd_to_handle(intel_fd, prime_fd);
+ intel_handle2 = prime_fd_to_handle(intel_fd2, prime_fd);
close(prime_fd);
- igt_assert(drm_intel_bo_flink(intel_bo, &flink_name1) == 0);
- igt_assert(drm_intel_bo_flink(intel_bo2, &flink_name2) == 0);
+ flink_name1 = gem_flink(intel_fd, intel_handle);
+ flink_name2 = gem_flink(intel_fd2, intel_handle2);
igt_assert_eq_u32(flink_name1, flink_name2);
nouveau_bo_ref(NULL, &nvbo);
- drm_intel_bo_unreference(intel_bo);
- drm_intel_bo_unreference(intel_bo2);
+ gem_close(intel_fd, intel_handle);
+ gem_close(intel_fd2, intel_handle2);
}
static void test_nv_i915_reimport_twice_check_flink_name(void)
{
- drm_intel_bo *intel_bo = NULL, *intel_bo2 = NULL;
+ uint32_t intel_handle, intel_handle2;
int prime_fd;
struct nouveau_bo *nvbo = NULL;
uint32_t flink_name1, flink_name2;
@@ -182,35 +172,32 @@ static void test_nv_i915_reimport_twice_check_flink_name(void)
igt_assert(nouveau_bo_set_prime(nvbo, &prime_fd) == 0);
- intel_bo = drm_intel_bo_gem_create_from_prime(bufmgr, prime_fd, BO_SIZE);
- igt_assert(intel_bo);
+ intel_handle = prime_fd_to_handle(intel_fd, prime_fd);
close(prime_fd);
+
igt_assert(nouveau_bo_set_prime(nvbo, &prime_fd) == 0);
- intel_bo2 = drm_intel_bo_gem_create_from_prime(bufmgr2, prime_fd, BO_SIZE);
- igt_assert(intel_bo2);
+ intel_handle2 = prime_fd_to_handle(intel_fd2, prime_fd);
close(prime_fd);
- igt_assert(drm_intel_bo_flink(intel_bo, &flink_name1) == 0);
- igt_assert(drm_intel_bo_flink(intel_bo2, &flink_name2) == 0);
+ flink_name1 = gem_flink(intel_fd, intel_handle);
+ flink_name2 = gem_flink(intel_fd2, intel_handle2);
igt_assert_eq_u32(flink_name1, flink_name2);
nouveau_bo_ref(NULL, &nvbo);
- drm_intel_bo_unreference(intel_bo);
- drm_intel_bo_unreference(intel_bo2);
+ gem_close(intel_fd, intel_handle);
+ gem_close(intel_fd2, intel_handle2);
}
static void test_i915_nv_import_vs_close(void)
{
- drm_intel_bo *test_intel_bo;
+ uint32_t intel_handle;
int prime_fd;
struct nouveau_bo *nvbo = NULL, *nvbo2 = NULL;
- test_intel_bo = drm_intel_bo_alloc(bufmgr, "test bo", BO_SIZE, 4096);
- igt_assert(test_intel_bo);
-
- igt_assert(drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd) == 0);
+ intel_handle = gem_create(intel_fd, BO_SIZE);
+ prime_fd = prime_handle_to_fd(intel_fd, intel_handle);
igt_assert(nouveau_bo_prime_handle_ref(ndev, prime_fd, &nvbo) == 0);
close(prime_fd);
@@ -218,20 +205,18 @@ static void test_i915_nv_import_vs_close(void)
nouveau_bo_ref(NULL, &nvbo2);
nouveau_bo_ref(NULL, &nvbo);
- drm_intel_bo_unreference(test_intel_bo);
+ gem_close(intel_fd, intel_handle);
}
/* import handle twice on one driver */
static void test_i915_nv_double_import(void)
{
- drm_intel_bo *test_intel_bo;
+ uint32_t intel_handle;
int prime_fd;
struct nouveau_bo *nvbo = NULL, *nvbo2 = NULL;
- test_intel_bo = drm_intel_bo_alloc(bufmgr, "test bo", BO_SIZE, 4096);
- igt_assert(test_intel_bo);
-
- igt_assert(drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd) == 0);
+ intel_handle = gem_create(intel_fd, BO_SIZE);
+ prime_fd = prime_handle_to_fd(intel_fd, intel_handle);
igt_assert(nouveau_bo_prime_handle_ref(ndev, prime_fd, &nvbo) == 0);
igt_assert(nouveau_bo_prime_handle_ref(ndev, prime_fd, &nvbo2) == 0);
@@ -241,23 +226,20 @@ static void test_i915_nv_double_import(void)
nouveau_bo_ref(NULL, &nvbo2);
nouveau_bo_ref(NULL, &nvbo);
- drm_intel_bo_unreference(test_intel_bo);
+ gem_close(intel_fd, intel_handle);
}
/* export handle twice from one driver - import twice
see if we get same object */
static void test_i915_nv_double_export(void)
{
- drm_intel_bo *test_intel_bo;
+ uint32_t intel_handle;
int prime_fd, prime_fd2;
struct nouveau_bo *nvbo = NULL, *nvbo2 = NULL;
- test_intel_bo = drm_intel_bo_alloc(bufmgr, "test bo", BO_SIZE, 4096);
- igt_assert(test_intel_bo);
-
- drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd);
-
- drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd2);
+ intel_handle = gem_create(intel_fd, BO_SIZE);
+ prime_fd = prime_handle_to_fd(intel_fd, intel_handle);
+ prime_fd2 = prime_handle_to_fd(intel_fd2, intel_handle);
igt_assert(nouveau_bo_prime_handle_ref(ndev, prime_fd, &nvbo) == 0);
close(prime_fd);
@@ -268,27 +250,26 @@ static void test_i915_nv_double_export(void)
nouveau_bo_ref(NULL, &nvbo2);
nouveau_bo_ref(NULL, &nvbo);
- drm_intel_bo_unreference(test_intel_bo);
+
+ gem_close(intel_fd, intel_handle);
}
/* export handle from intel driver - reimport to intel driver
see if you get same object */
static void test_i915_self_import(void)
{
- drm_intel_bo *test_intel_bo, *test_intel_bo2;
+ uint32_t intel_handle, intel_handle2;
int prime_fd;
- test_intel_bo = drm_intel_bo_alloc(bufmgr, "test bo", BO_SIZE, 4096);
+ intel_handle = gem_create(intel_fd, BO_SIZE);
+ prime_fd = prime_handle_to_fd(intel_fd, intel_handle);
- drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd);
-
- test_intel_bo2 = drm_intel_bo_gem_create_from_prime(bufmgr, prime_fd, BO_SIZE);
+ intel_handle2 = prime_fd_to_handle(intel_fd, prime_fd);
close(prime_fd);
- igt_assert(test_intel_bo2);
- igt_assert(test_intel_bo->handle == test_intel_bo2->handle);
+ igt_assert(intel_handle == intel_handle2);
- drm_intel_bo_unreference(test_intel_bo);
+ gem_close(intel_fd, intel_handle);
}
/* nouveau export reimport test */
@@ -313,19 +294,17 @@ static void test_nv_self_import(void)
see if you get same object */
static void test_i915_self_import_to_different_fd(void)
{
- drm_intel_bo *test_intel_bo, *test_intel_bo2;
+ uint32_t intel_handle, intel_handle2;
int prime_fd;
- test_intel_bo = drm_intel_bo_alloc(bufmgr, "test bo", BO_SIZE, 4096);
-
- drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd);
+ intel_handle = gem_create(intel_fd, BO_SIZE);
+ prime_fd = prime_handle_to_fd(intel_fd, intel_handle);
- test_intel_bo2 = drm_intel_bo_gem_create_from_prime(bufmgr2, prime_fd, BO_SIZE);
+ intel_handle2 = prime_fd_to_handle(intel_fd2, prime_fd);
close(prime_fd);
- igt_assert(test_intel_bo2);
- drm_intel_bo_unreference(test_intel_bo2);
- drm_intel_bo_unreference(test_intel_bo);
+ gem_close(intel_fd, intel_handle);
+ gem_close(intel_fd2, intel_handle2);
}
/* nouveau export reimport to other driver test */
@@ -356,16 +335,6 @@ igt_main
igt_require(intel_fd != -1);
igt_require(intel_fd2 != -1);
- /* set up intel bufmgr */
- bufmgr = drm_intel_bufmgr_gem_init(intel_fd, 4096);
- igt_assert(bufmgr);
- /* Do not enable reuse, we share (almost) all buffers. */
- //drm_intel_bufmgr_gem_enable_reuse(bufmgr);
-
- bufmgr2 = drm_intel_bufmgr_gem_init(intel_fd2, 4096);
- igt_assert(bufmgr2);
- drm_intel_bufmgr_gem_enable_reuse(bufmgr2);
-
/* set up nouveau bufmgr */
igt_assert(nouveau_device_wrap(nouveau_fd, 0, &ndev) >= 0);
igt_assert(nouveau_client_new(ndev, &nclient) >= 0);
@@ -374,11 +343,6 @@ igt_main
igt_assert(nouveau_device_wrap(nouveau_fd2, 0, &ndev2) >= 0);
igt_assert(nouveau_client_new(ndev2, &nclient2) >= 0);;
-
- /* set up an intel batch buffer */
- devid = intel_get_drm_devid(intel_fd);
- intel_batch = intel_batchbuffer_alloc(bufmgr, devid);
- igt_assert(intel_batch);
}
#define xtest(name) \
@@ -399,12 +363,11 @@ igt_main
xtest(nv_self_import_to_different_fd);
igt_fixture {
- intel_batchbuffer_free(intel_batch);
-
nouveau_device_del(&ndev);
- drm_intel_bufmgr_destroy(bufmgr);
close(intel_fd);
+ close(intel_fd2);
close(nouveau_fd);
+ close(nouveau_fd2);
}
}
diff --git a/tests/prime_nv_pcopy.c b/tests/prime_nv_pcopy.c
index e465e5fc03..5b2a89d809 100644
--- a/tests/prime_nv_pcopy.c
+++ b/tests/prime_nv_pcopy.c
@@ -25,15 +25,12 @@
#include <sys/ioctl.h>
#include <errno.h>
-#include "intel_bufmgr.h"
+#include "i915/gem_create.h"
#include "nouveau.h"
static int intel_fd = -1, nouveau_fd = -1;
-static drm_intel_bufmgr *bufmgr;
static struct nouveau_device *ndev;
static struct nouveau_client *nclient;
-static uint32_t devid;
-static struct intel_batchbuffer *batch;
static struct nouveau_object *nchannel, *pcopy;
static struct nouveau_bufctx *nbufctx;
static struct nouveau_pushbuf *npush;
@@ -161,16 +158,17 @@ BEGIN_NVXX(struct nouveau_pushbuf *push, int subc, int mthd, int size)
}
static void
-noop_intel(drm_intel_bo *bo)
+noop_intel(uint32_t bo_handle)
{
- BEGIN_BATCH(3, 1);
- OUT_BATCH(MI_NOOP);
- OUT_BATCH(MI_BATCH_BUFFER_END);
- OUT_RELOC(bo, I915_GEM_DOMAIN_RENDER,
- I915_GEM_DOMAIN_RENDER, 0);
- ADVANCE_BATCH();
-
- intel_batchbuffer_flush(batch);
+ struct intel_bb *ibb;
+
+ ibb = intel_bb_create(intel_fd, 4096);
+ intel_bb_out(ibb, MI_NOOP);
+ intel_bb_out(ibb, MI_BATCH_BUFFER_END);
+ intel_bb_emit_reloc(ibb, bo_handle, I915_GEM_DOMAIN_RENDER,
+ I915_GEM_DOMAIN_RENDER, 0, 0);
+ intel_bb_flush_blit(ibb);
+ intel_bb_destroy(ibb);
}
static void find_and_open_devices(void)
@@ -548,25 +546,25 @@ static void test1_micro(void)
uint32_t dst_x = 0, dst_y = 0;
uint32_t x, y, w = 256, h = 64;
- drm_intel_bo *test_intel_bo;
+ uint32_t intel_handle;
+ uint8_t *gtt_map;
int prime_fd;
- test_intel_bo = drm_intel_bo_alloc(bufmgr, "test bo", w * h, 4096);
- igt_assert(test_intel_bo);
- drm_intel_bo_set_tiling(test_intel_bo, &tiling, w);
- igt_assert(tiling == I915_TILING_Y);
- igt_assert(drm_intel_gem_bo_map_gtt(test_intel_bo) == 0);
+ intel_handle = gem_create(intel_fd, w * h);
+ gem_set_tiling(intel_fd, intel_handle, tiling, w);
- drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd);
- igt_assert_lte(0, prime_fd);
- noop_intel(test_intel_bo);
+ gtt_map = gem_mmap__gtt(intel_fd, intel_handle, w * h, PROT_READ | PROT_WRITE);
+
+ prime_fd = prime_handle_to_fd(intel_fd, intel_handle);
+
+ noop_intel(intel_handle);
nv_bo_alloc(&bo_intel, &intel, w, h, tile_intel_y, prime_fd, 0);
nv_bo_alloc(&bo_nvidia, &nvidia, w, h, 0x10, -1, NOUVEAU_BO_VRAM);
nv_bo_alloc(&bo_linear, &linear, w, h, 0, -1, NOUVEAU_BO_GART);
for (y = 0; y < linear.h; ++y) {
- uint8_t *map = bo_linear->map;
+ uint8_t *map = gtt_map;
map += y * linear.pitch;
for (x = 0; x < linear.pitch; ++x) {
uint8_t pos = x & 0x3f;
@@ -584,15 +582,16 @@ static void test1_micro(void)
if (pcopy)
perform_copy(bo_intel, &intel, dst_x, dst_y, bo_nvidia, &nvidia, src_x, src_y, w, h);
else
- swtile_y(test_intel_bo->virtual, bo_linear->map, w, h);
+ swtile_y(gtt_map, bo_linear->map, w, h);
- noop_intel(test_intel_bo);
- check1_micro(test_intel_bo->virtual, intel.pitch, intel.h, dst_x, dst_y, w, h);
+ noop_intel(intel_handle);
+ check1_micro(gtt_map, intel.pitch, intel.h, dst_x, dst_y, w, h);
nouveau_bo_ref(NULL, &bo_linear);
nouveau_bo_ref(NULL, &bo_nvidia);
nouveau_bo_ref(NULL, &bo_intel);
- drm_intel_bo_unreference(test_intel_bo);
+ gem_munmap(gtt_map, w * h);
+ gem_close(intel_fd, intel_handle);
}
/* test 2, see if we can copy from linear to intel X format safely
@@ -685,43 +684,40 @@ static void test3_base(int tile_src, int tile_dst)
uint32_t dst_x = 2 * cpp, dst_y = 26;
uint32_t w = 298 * cpp, h = 298;
- drm_intel_bo *test_intel_bo;
+ uint32_t intel_handle;
int prime_fd;
- test_intel_bo = drm_intel_bo_alloc(bufmgr, "test bo", 2048 * cpp * 768, 4096);
- igt_assert(test_intel_bo);
-
- drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd);
- igt_assert_lte(0, prime_fd);
+ intel_handle = gem_create(intel_fd, 2048 * cpp * 768);
+ prime_fd = prime_handle_to_fd(intel_fd, intel_handle);
nv_bo_alloc(&bo_intel, &intel, 2048 * cpp, 768, tile_dst, prime_fd, 0);
nv_bo_alloc(&bo_nvidia, &nvidia, 300 * cpp, 300, tile_src, -1, NOUVEAU_BO_VRAM);
nv_bo_alloc(&bo_linear, &linear, 2048 * cpp, 768, 0, -1, NOUVEAU_BO_GART);
- noop_intel(test_intel_bo);
+ noop_intel(intel_handle);
memset(bo_linear->map, 0x80, bo_linear->size);
perform_copy(bo_intel, &intel, 0, 0, bo_linear, &linear, 0, 0, linear.pitch, linear.h);
- noop_intel(test_intel_bo);
+ noop_intel(intel_handle);
memset(bo_linear->map, 0x04, bo_linear->size);
perform_copy(bo_nvidia, &nvidia, 0, 0, bo_linear, &linear, 0, 0, nvidia.pitch, nvidia.h);
/* Perform the actual sub rectangle copy */
- noop_intel(test_intel_bo);
+ noop_intel(intel_handle);
perform_copy(bo_intel, &intel, dst_x, dst_y, bo_nvidia, &nvidia, src_x, src_y, w, h);
- noop_intel(test_intel_bo);
+ noop_intel(intel_handle);
memset(bo_linear->map, 0x3, bo_linear->size);
- noop_intel(test_intel_bo);
+ noop_intel(intel_handle);
perform_copy(bo_linear, &linear, 0, 0, bo_intel, &intel, 0, 0, intel.pitch, intel.h);
- noop_intel(test_intel_bo);
+ noop_intel(intel_handle);
check3(bo_linear->map, linear.pitch, linear.h, dst_x, dst_y, w, h);
nouveau_bo_ref(NULL, &bo_linear);
nouveau_bo_ref(NULL, &bo_nvidia);
nouveau_bo_ref(NULL, &bo_intel);
- drm_intel_bo_unreference(test_intel_bo);
+ gem_close(intel_fd, intel_handle);
}
static void test3_1(void)
@@ -767,25 +763,23 @@ static void test3_5(void)
/* Test only new style semaphores, old ones are AWFUL */
static void test_semaphore(void)
{
- drm_intel_bo *test_intel_bo = NULL;
+ uint32_t intel_handle;
struct nouveau_bo *sema_bo = NULL;
int prime_fd;
- uint32_t *sema;
+ uint32_t *sema, *gtt_map;
struct nouveau_pushbuf *push = npush;
igt_skip_on(ndev->chipset < 0x84);
/* Should probably be kept in sysmem */
- test_intel_bo = drm_intel_bo_alloc(bufmgr, "semaphore bo", 4096, 4096);
- igt_assert(test_intel_bo);
+ intel_handle = gem_create(intel_fd, 4096);
+ prime_fd = prime_handle_to_fd(intel_fd, intel_handle);
- drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd);
- igt_assert_lte(0, prime_fd);
igt_assert(nouveau_bo_prime_handle_ref(ndev, prime_fd, &sema_bo) == 0);
close(prime_fd);
- igt_assert(drm_intel_gem_bo_map_gtt(test_intel_bo) == 0);
- sema = test_intel_bo->virtual;
+ gtt_map = gem_mmap__gtt(intel_fd, intel_handle, 4096, PROT_READ | PROT_WRITE);
+ sema = gtt_map;
sema++;
*sema = 0;
@@ -845,7 +839,8 @@ static void test_semaphore(void)
igt_assert(*sema == 9);
nouveau_bo_ref(NULL, &sema_bo);
- drm_intel_bo_unreference(test_intel_bo);
+ gem_munmap(gtt_map, 4096);
+ gem_close(intel_fd, intel_handle);
}
igt_main
@@ -856,19 +851,8 @@ igt_main
igt_require(nouveau_fd != -1);
igt_require(intel_fd != -1);
- /* set up intel bufmgr */
- bufmgr = drm_intel_bufmgr_gem_init(intel_fd, 4096);
- igt_assert(bufmgr);
- /* Do not enable reuse, we share (almost) all buffers. */
- //drm_intel_bufmgr_gem_enable_reuse(bufmgr);
-
/* set up nouveau bufmgr */
init_nouveau();
-
- /* set up an intel batch buffer */
- devid = intel_get_drm_devid(intel_fd);
- batch = intel_batchbuffer_alloc(bufmgr, devid);
- igt_assert(batch);
}
#define xtest(x, args...) \
@@ -893,11 +877,8 @@ igt_main
nouveau_pushbuf_del(&npush);
nouveau_object_del(&nchannel);
- intel_batchbuffer_free(batch);
-
nouveau_client_del(&nclient);
nouveau_device_del(&ndev);
- drm_intel_bufmgr_destroy(bufmgr);
close(intel_fd);
close(nouveau_fd);
diff --git a/tests/prime_nv_test.c b/tests/prime_nv_test.c
index 81d142f42e..bc2579604d 100644
--- a/tests/prime_nv_test.c
+++ b/tests/prime_nv_test.c
@@ -23,15 +23,13 @@
#include <sys/stat.h>
#include <sys/ioctl.h>
-#include "intel_bufmgr.h"
+#include "i915/gem_create.h"
#include "nouveau.h"
int intel_fd = -1, nouveau_fd = -1;
-drm_intel_bufmgr *bufmgr;
+struct buf_ops *bops;
struct nouveau_device *ndev;
struct nouveau_client *nclient;
-uint32_t devid;
-struct intel_batchbuffer *intel_batch;
#define BO_SIZE (256*1024)
@@ -83,20 +81,18 @@ static int find_and_open_devices(void)
*/
static void test_i915_nv_sharing(void)
{
- drm_intel_bo *test_intel_bo;
+ uint32_t intel_handle;
int prime_fd;
struct nouveau_bo *nvbo;
- test_intel_bo = drm_intel_bo_alloc(bufmgr, "test bo", BO_SIZE, 4096);
- igt_assert(test_intel_bo);
-
- drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd);
+ intel_handle = gem_create(intel_fd, BO_SIZE);
+ prime_fd = prime_handle_to_fd(intel_fd, intel_handle);
igt_assert(nouveau_bo_prime_handle_ref(ndev, prime_fd, &nvbo) == 0);
close(prime_fd);
nouveau_bo_ref(NULL, &nvbo);
- drm_intel_bo_unreference(test_intel_bo);
+ gem_close(intel_fd, intel_handle);
}
/*
@@ -109,7 +105,7 @@ static void test_i915_nv_sharing(void)
*/
static void test_nv_i915_sharing(void)
{
- drm_intel_bo *test_intel_bo;
+ uint32_t intel_handle;
int prime_fd;
struct nouveau_bo *nvbo;
@@ -117,12 +113,11 @@ static void test_nv_i915_sharing(void)
0, BO_SIZE, NULL, &nvbo) == 0);
igt_assert(nouveau_bo_set_prime(nvbo, &prime_fd) == 0);
- test_intel_bo = drm_intel_bo_gem_create_from_prime(bufmgr, prime_fd, BO_SIZE);
+ intel_handle = prime_fd_to_handle(intel_fd, prime_fd);
close(prime_fd);
- igt_assert(test_intel_bo);
nouveau_bo_ref(NULL, &nvbo);
- drm_intel_bo_unreference(test_intel_bo);
+ gem_close(intel_fd, intel_handle);
}
/*
@@ -131,14 +126,13 @@ static void test_nv_i915_sharing(void)
*/
static void test_nv_write_i915_cpu_mmap_read(void)
{
- drm_intel_bo *test_intel_bo;
+ uint32_t intel_handle;
int prime_fd;
struct nouveau_bo *nvbo = NULL;
uint32_t *ptr;
- test_intel_bo = drm_intel_bo_alloc(bufmgr, "test bo", BO_SIZE, 4096);
-
- drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd);
+ intel_handle = gem_create(intel_fd, BO_SIZE);
+ prime_fd = prime_handle_to_fd(intel_fd, intel_handle);
igt_assert(nouveau_bo_prime_handle_ref(ndev, prime_fd, &nvbo) == 0);
close(prime_fd);
@@ -147,13 +141,12 @@ static void test_nv_write_i915_cpu_mmap_read(void)
ptr = nvbo->map;
*ptr = 0xdeadbeef;
- drm_intel_bo_map(test_intel_bo, 1);
- ptr = test_intel_bo->virtual;
- igt_assert(ptr);
+ ptr = gem_mmap__cpu(intel_fd, intel_handle, 0, BO_SIZE, PROT_READ | PROT_WRITE);
igt_assert(*ptr == 0xdeadbeef);
nouveau_bo_ref(NULL, &nvbo);
- drm_intel_bo_unreference(test_intel_bo);
+ gem_munmap(ptr, BO_SIZE);
+ gem_close(intel_fd, intel_handle);
}
/*
@@ -162,14 +155,13 @@ static void test_nv_write_i915_cpu_mmap_read(void)
*/
static void test_nv_write_i915_gtt_mmap_read(void)
{
- drm_intel_bo *test_intel_bo;
+ uint32_t intel_handle;
int prime_fd;
struct nouveau_bo *nvbo = NULL;
uint32_t *ptr;
- test_intel_bo = drm_intel_bo_alloc(bufmgr, "test bo", BO_SIZE, 4096);
-
- drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd);
+ intel_handle = gem_create(intel_fd, BO_SIZE);
+ prime_fd = prime_handle_to_fd(intel_fd, intel_handle);
igt_assert(nouveau_bo_prime_handle_ref(ndev, prime_fd, &nvbo) == 0);
close(prime_fd);
@@ -177,14 +169,13 @@ static void test_nv_write_i915_gtt_mmap_read(void)
ptr = nvbo->map;
*ptr = 0xdeadbeef;
- drm_intel_gem_bo_map_gtt(test_intel_bo);
- ptr = test_intel_bo->virtual;
- igt_assert(ptr);
+ ptr = gem_mmap__gtt(intel_fd, intel_handle, BO_SIZE, PROT_READ | PROT_WRITE);
igt_assert(*ptr == 0xdeadbeef);
nouveau_bo_ref(NULL, &nvbo);
- drm_intel_bo_unreference(test_intel_bo);
+ gem_munmap(ptr, BO_SIZE);
+ gem_close(intel_fd, intel_handle);
}
/* test drm_intel_bo_map doesn't work properly,
@@ -192,7 +183,7 @@ static void test_nv_write_i915_gtt_mmap_read(void)
for these objects */
__noreturn static void test_i915_import_cpu_mmap(void)
{
- drm_intel_bo *test_intel_bo;
+ uint32_t intel_handle;
int prime_fd;
struct nouveau_bo *nvbo;
uint32_t *ptr;
@@ -202,22 +193,20 @@ __noreturn static void test_i915_import_cpu_mmap(void)
igt_assert(nouveau_bo_new(ndev, NOUVEAU_BO_GART | NOUVEAU_BO_MAP,
0, BO_SIZE, NULL, &nvbo) == 0);
igt_assert(nouveau_bo_set_prime(nvbo, &prime_fd) == 0);
- test_intel_bo = drm_intel_bo_gem_create_from_prime(bufmgr, prime_fd, BO_SIZE);
+ intel_handle = prime_fd_to_handle(intel_fd, prime_fd);
close(prime_fd);
- igt_assert(test_intel_bo);
igt_assert(nouveau_bo_map(nvbo, NOUVEAU_BO_RDWR, nclient) == 0);
ptr = nvbo->map;
*ptr = 0xdeadbeef;
- igt_assert(drm_intel_bo_map(test_intel_bo, 0) == 0);
- igt_assert(test_intel_bo->virtual);
- ptr = test_intel_bo->virtual;
+ ptr = gem_mmap__cpu(intel_fd, intel_handle, 0, BO_SIZE, PROT_READ);
igt_assert(*ptr == 0xdeadbeef);
nouveau_bo_ref(NULL, &nvbo);
- drm_intel_bo_unreference(test_intel_bo);
+ gem_munmap(ptr, BO_SIZE);
+ gem_close(intel_fd, intel_handle);
}
/* test drm_intel_bo_map_gtt works properly,
@@ -225,7 +214,7 @@ __noreturn static void test_i915_import_cpu_mmap(void)
for these objects */
static void test_i915_import_gtt_mmap(void)
{
- drm_intel_bo *test_intel_bo;
+ uint32_t intel_handle;
int prime_fd;
struct nouveau_bo *nvbo;
uint32_t *ptr;
@@ -234,9 +223,8 @@ static void test_i915_import_gtt_mmap(void)
0, BO_SIZE, NULL, &nvbo) == 0);
igt_assert(nouveau_bo_set_prime(nvbo, &prime_fd) == 0);
- test_intel_bo = drm_intel_bo_gem_create_from_prime(bufmgr, prime_fd, BO_SIZE);
+ intel_handle = prime_fd_to_handle(intel_fd, prime_fd);
close(prime_fd);
- igt_assert(test_intel_bo);
igt_assert(nouveau_bo_map(nvbo, NOUVEAU_BO_RDWR, nclient) == 0);
@@ -244,19 +232,18 @@ static void test_i915_import_gtt_mmap(void)
*ptr = 0xdeadbeef;
*(ptr + 1) = 0xa55a55;
- igt_assert(drm_intel_gem_bo_map_gtt(test_intel_bo) == 0);
- igt_assert(test_intel_bo->virtual);
- ptr = test_intel_bo->virtual;
+ ptr = gem_mmap__gtt(intel_fd, intel_handle, BO_SIZE, PROT_READ | PROT_WRITE);
igt_assert(*ptr == 0xdeadbeef);
nouveau_bo_ref(NULL, &nvbo);
- drm_intel_bo_unreference(test_intel_bo);
+ gem_munmap(ptr, BO_SIZE);
+ gem_close(intel_fd, intel_handle);
}
/* test 7 - import from nouveau into intel, test pread/pwrite fail */
static void test_i915_import_pread_pwrite(void)
{
- drm_intel_bo *test_intel_bo;
+ uint32_t intel_handle;
int prime_fd;
struct nouveau_bo *nvbo;
uint32_t *ptr;
@@ -266,85 +253,90 @@ static void test_i915_import_pread_pwrite(void)
0, BO_SIZE, NULL, &nvbo) == 0);
igt_assert(nouveau_bo_set_prime(nvbo, &prime_fd) == 0);
- test_intel_bo = drm_intel_bo_gem_create_from_prime(bufmgr, prime_fd, BO_SIZE);
+ intel_handle = prime_fd_to_handle(intel_fd, prime_fd);
close(prime_fd);
- igt_assert(test_intel_bo);
igt_assert(nouveau_bo_map(nvbo, NOUVEAU_BO_RDWR, nclient) == 0);
ptr = nvbo->map;
*ptr = 0xdeadbeef;
- gem_read(intel_fd, test_intel_bo->handle, 0, buf, 256);
+ gem_read(intel_fd, intel_handle, 0, buf, 256);
igt_assert(buf[0] == 0xdeadbeef);
buf[0] = 0xabcdef55;
- gem_write(intel_fd, test_intel_bo->handle, 0, buf, 4);
+ gem_write(intel_fd, intel_handle, 0, buf, 4);
igt_assert(*ptr == 0xabcdef55);
nouveau_bo_ref(NULL, &nvbo);
- drm_intel_bo_unreference(test_intel_bo);
-}
-
-static void
-set_bo(drm_intel_bo *bo, uint32_t val, int width, int height)
-{
- int size = width * height;
- uint32_t *vaddr;
-
- drm_intel_gem_bo_start_gtt_access(bo, true);
- vaddr = bo->virtual;
- while (size--)
- *vaddr++ = val;
+ gem_close(intel_fd, intel_handle);
}
-static drm_intel_bo *
-create_bo(drm_intel_bufmgr *ibufmgr, uint32_t val, int width, int height)
+static uint32_t create_bo(uint32_t val, int width, int height)
{
- drm_intel_bo *bo;
+ uint32_t intel_handle;
+ int size = width * height;
+ uint32_t *ptr, *currptr;
- bo = drm_intel_bo_alloc(ibufmgr, "bo", 4*width*height, 0);
- igt_assert(bo);
+ intel_handle = gem_create(intel_fd, 4*width*height);
+ igt_assert(intel_handle);
/* gtt map doesn't have a write parameter, so just keep the mapping
* around (to avoid the set_domain with the gtt write domain set) and
* manually tell the kernel when we start access the gtt. */
- drm_intel_gem_bo_map_gtt(bo);
+ ptr = gem_mmap__gtt(intel_fd, intel_handle, size, PROT_READ | PROT_WRITE);
+ gem_set_domain(intel_fd, intel_handle, I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
+
+ currptr = ptr;
+ while (size--)
+ *currptr++ = val;
- set_bo(bo, val, width, height);
+ gem_munmap(ptr, size);
- return bo;
+ return intel_handle;
}
/* use intel hw to fill the BO with a blit from another BO,
then readback from the nouveau bo, check value is correct */
static void test_i915_blt_fill_nv_read(void)
{
- drm_intel_bo *test_intel_bo, *src_bo;
+ uint32_t dst_handle, src_handle;
int prime_fd;
struct nouveau_bo *nvbo = NULL;
uint32_t *ptr;
+ struct intel_bb *ibb;
+ struct intel_buf src, dst;
+ int w = 256;
+ int h = 4; /* for intel_bb_copy size requirement % 4096 */
- src_bo = create_bo(bufmgr, 0xaa55aa55, 256, 1);
+ ibb = intel_bb_create(intel_fd, 4096);
- test_intel_bo = drm_intel_bo_alloc(bufmgr, "test bo", BO_SIZE, 4096);
+ src_handle = create_bo(0xaa55aa55, w, h);
+ dst_handle = gem_create(intel_fd, BO_SIZE);
- drm_intel_bo_gem_export_to_prime(test_intel_bo, &prime_fd);
+ prime_fd = prime_handle_to_fd(intel_fd, dst_handle);
igt_assert(nouveau_bo_prime_handle_ref(ndev, prime_fd, &nvbo) == 0);
close(prime_fd);
- intel_copy_bo(intel_batch, test_intel_bo, src_bo, BO_SIZE);
+ intel_buf_init_using_handle(bops, src_handle, &src, w, h, 32, 0,
+ I915_TILING_NONE, I915_COMPRESSION_NONE);
+ intel_buf_init_using_handle(bops, dst_handle, &dst, w, 256, 32, 0,
+ I915_TILING_NONE, I915_COMPRESSION_NONE);
+ intel_bb_copy_intel_buf(ibb, &dst, &src, w * h * 4);
igt_assert(nouveau_bo_map(nvbo, NOUVEAU_BO_RDWR, nclient) == 0);
- drm_intel_bo_map(test_intel_bo, 0);
-
ptr = nvbo->map;
igt_assert(*ptr == 0xaa55aa55);
nouveau_bo_ref(NULL, &nvbo);
- drm_intel_bo_unreference(test_intel_bo);
+
+ intel_buf_destroy(&src);
+ intel_buf_destroy(&dst);
+ intel_bb_destroy(ibb);
+ gem_close(intel_fd, dst_handle);
+ gem_close(intel_fd, src_handle);
}
/* test 8 use nouveau to do blit */
@@ -358,20 +350,12 @@ igt_main
igt_require(nouveau_fd != -1);
igt_require(intel_fd != -1);
-
- /* set up intel bufmgr */
- bufmgr = drm_intel_bufmgr_gem_init(intel_fd, 4096);
- igt_assert(bufmgr);
- /* Do not enable reuse, we share (almost) all buffers. */
- //drm_intel_bufmgr_gem_enable_reuse(bufmgr);
+ bops = buf_ops_create(intel_fd);
/* set up nouveau bufmgr */
igt_assert(nouveau_device_wrap(nouveau_fd, 0, &ndev) == 0);
igt_assert(nouveau_client_new(ndev, &nclient) == 0);
- /* set up an intel batch buffer */
- devid = intel_get_drm_devid(intel_fd);
- intel_batch = intel_batchbuffer_alloc(bufmgr, devid);
}
#define xtest(name) \
@@ -388,11 +372,9 @@ igt_main
xtest(i915_blt_fill_nv_read);
igt_fixture {
- intel_batchbuffer_free(intel_batch);
-
nouveau_device_del(&ndev);
- drm_intel_bufmgr_destroy(bufmgr);
+ buf_ops_destroy(bops);
close(intel_fd);
close(nouveau_fd);
}
--
2.34.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [igt-dev] [PATCH i-g-t v2 3/4] benchmarks/intel_upload_blit_*: Remove libdrm in upload blits
2022-11-28 16:15 [igt-dev] [PATCH i-g-t v2 0/4] Remove libdrm remnants in i915 code Zbigniew Kempczyński
2022-11-28 16:15 ` [igt-dev] [PATCH i-g-t v2 1/4] tests/prime_udl: Remove intel-libdrm dependency Zbigniew Kempczyński
2022-11-28 16:15 ` [igt-dev] [PATCH i-g-t v2 2/4] tests/prime_nv: Remove intel-libdrm calls Zbigniew Kempczyński
@ 2022-11-28 16:15 ` Zbigniew Kempczyński
2022-11-28 16:15 ` [igt-dev] [PATCH i-g-t v2 4/4] lib/intel_batchbuffer: Get rid of libdrm batchbuffer Zbigniew Kempczyński
` (2 subsequent siblings)
5 siblings, 0 replies; 8+ messages in thread
From: Zbigniew Kempczyński @ 2022-11-28 16:15 UTC (permalink / raw)
To: igt-dev
Few benchmarks still used libdrm so let's rewrite them to be libdrm
free. I tried to mimic the libdrm behavior as much as possible but
according how libdrm caches handles/mappings there may be some
differences in performance execution.
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
benchmarks/intel_upload_blit_large.c | 131 ++++++++++++---------
benchmarks/intel_upload_blit_large_gtt.c | 130 ++++++++++++---------
benchmarks/intel_upload_blit_large_map.c | 132 ++++++++++++---------
benchmarks/intel_upload_blit_small.c | 139 ++++++++++++++---------
4 files changed, 311 insertions(+), 221 deletions(-)
diff --git a/benchmarks/intel_upload_blit_large.c b/benchmarks/intel_upload_blit_large.c
index 12bbae3d06..af52d7a4e5 100644
--- a/benchmarks/intel_upload_blit_large.c
+++ b/benchmarks/intel_upload_blit_large.c
@@ -45,6 +45,7 @@
*/
#include "igt.h"
+#include "i915/gem_create.h"
#include <stdlib.h>
#include <stdio.h>
#include <string.h>
@@ -72,74 +73,99 @@ get_time_in_secs(void)
}
static void
-do_render(drm_intel_bufmgr *bufmgr, struct intel_batchbuffer *batch,
- drm_intel_bo *dst_bo, int width, int height)
+do_render(int i915, uint32_t dst_handle)
{
- uint32_t data[width * height];
- drm_intel_bo *src_bo;
- int i;
+ struct drm_i915_gem_execbuffer2 exec = {};
+ struct drm_i915_gem_exec_object2 obj[3] = {};
+ struct drm_i915_gem_relocation_entry reloc[2];
static uint32_t seed = 1;
+ uint32_t data[OBJECT_WIDTH * OBJECT_HEIGHT];
+ uint64_t size = OBJECT_WIDTH * OBJECT_HEIGHT * 4, bb_size = 4096;
+ uint32_t src_handle, bb_handle, *bb;
+ uint32_t gen = intel_gen(intel_get_drm_devid(i915));
+ const bool has_64b_reloc = gen >= 8;
+ int i;
+
+ bb_handle = gem_create_from_pool(i915, &bb_size, REGION_SMEM);
+ src_handle = gem_create_from_pool(i915, &size, REGION_SMEM);
- /* Generate some junk. Real workloads would be doing a lot more
- * work to generate the junk.
- */
- for (i = 0; i < width * height; i++) {
+ for (i = 0; i < OBJECT_WIDTH * OBJECT_HEIGHT; i++)
data[i] = seed++;
- }
- /* Upload the junk. */
- src_bo = drm_intel_bo_alloc(bufmgr, "src", sizeof(data), 4096);
- drm_intel_bo_subdata(src_bo, 0, sizeof(data), data);
+ gem_write(i915, src_handle, 0, data, sizeof(data));
/* Render the junk to the dst. */
- BLIT_COPY_BATCH_START(0);
- OUT_BATCH((3 << 24) | /* 32 bits */
+ bb = gem_mmap__device_coherent(i915, bb_handle, 0, bb_size, PROT_WRITE);
+ i = 0;
+ bb[i++] = XY_SRC_COPY_BLT_CMD |
+ XY_SRC_COPY_BLT_WRITE_ALPHA |
+ XY_SRC_COPY_BLT_WRITE_RGB |
+ (6 + 2*(gen >= 8));
+ bb[i++] = (3 << 24) | /* 32 bits */
(0xcc << 16) | /* copy ROP */
- (width * 4) /* dst pitch */);
- OUT_BATCH(0); /* dst x1,y1 */
- OUT_BATCH((height << 16) | width); /* dst x2,y2 */
- OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
- OUT_BATCH(0); /* src x1,y1 */
- OUT_BATCH(width * 4); /* src pitch */
- OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
- ADVANCE_BATCH();
-
- intel_batchbuffer_flush(batch);
-
- drm_intel_bo_unreference(src_bo);
+ (OBJECT_WIDTH * 4) /* dst pitch */;
+ bb[i++] = 0; /* dst x1,y1 */
+ bb[i++] = (OBJECT_HEIGHT << 16) | OBJECT_WIDTH; /* dst x2,y2 */
+
+ obj[0].handle = dst_handle;
+ obj[0].offset = dst_handle * size;
+ reloc[0].target_handle = dst_handle;
+ reloc[0].presumed_offset = obj[0].offset;
+ reloc[0].offset = sizeof(uint32_t) * i;
+ reloc[0].read_domains = I915_GEM_DOMAIN_RENDER;
+ reloc[0].write_domain = I915_GEM_DOMAIN_RENDER;
+ bb[i++] = obj[0].offset;
+ if (has_64b_reloc)
+ bb[i++] = obj[0].offset >> 32;
+
+ bb[i++] = 0; /* src x1,y1 */
+ bb[i++] = OBJECT_WIDTH * 4; /* src pitch */
+
+ obj[1].handle = src_handle;
+ obj[1].offset = src_handle * size;
+ reloc[1].target_handle = src_handle;
+ reloc[1].presumed_offset = obj[1].offset;
+ reloc[1].offset = sizeof(uint32_t) * i;
+ reloc[1].read_domains = I915_GEM_DOMAIN_RENDER;
+ reloc[1].write_domain = 0;
+ bb[i++] = obj[1].offset;
+ if (has_64b_reloc)
+ bb[i++] = obj[1].offset >> 32;
+
+ obj[2].handle = bb_handle;
+ obj[2].relocs_ptr = to_user_pointer(reloc);
+ obj[2].relocation_count = 2;
+
+ bb[i++] = MI_BATCH_BUFFER_END;
+ gem_munmap(bb, bb_size);
+
+ exec.buffers_ptr = to_user_pointer(obj);
+ exec.buffer_count = 3;
+ exec.flags = gen >= 6 ? I915_EXEC_BLT : 0 | I915_EXEC_NO_RELOC;
+
+ gem_execbuf(i915, &exec);
}
int main(int argc, char **argv)
{
- int fd;
- int object_size = OBJECT_WIDTH * OBJECT_HEIGHT * 4;
double start_time, end_time;
- drm_intel_bo *dst_bo;
- drm_intel_bufmgr *bufmgr;
- struct intel_batchbuffer *batch;
- int i;
-
- fd = drm_open_driver(DRIVER_INTEL);
+ uint32_t dst_handle;
+ int i915, i;
- bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
- drm_intel_bufmgr_gem_enable_reuse(bufmgr);
-
- batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd));
-
- dst_bo = drm_intel_bo_alloc(bufmgr, "dst", object_size, 4096);
+ i915 = drm_open_driver(DRIVER_INTEL);
+ dst_handle = gem_create(i915, OBJECT_WIDTH * OBJECT_HEIGHT * 4);
/* Prep loop to get us warmed up. */
- for (i = 0; i < 60; i++) {
- do_render(bufmgr, batch, dst_bo, OBJECT_WIDTH, OBJECT_HEIGHT);
- }
- drm_intel_bo_wait_rendering(dst_bo);
+ for (i = 0; i < 60; i++)
+ do_render(i915, dst_handle);
+ gem_sync(i915, dst_handle);
/* Do the actual timing. */
start_time = get_time_in_secs();
- for (i = 0; i < 200; i++) {
- do_render(bufmgr, batch, dst_bo, OBJECT_WIDTH, OBJECT_HEIGHT);
- }
- drm_intel_bo_wait_rendering(dst_bo);
+ for (i = 0; i < 200; i++)
+ do_render(i915, dst_handle);
+ gem_sync(i915, dst_handle);
+
end_time = get_time_in_secs();
printf("%d iterations in %.03f secs: %.01f MB/sec\n", i,
@@ -147,10 +173,5 @@ int main(int argc, char **argv)
(double)i * OBJECT_WIDTH * OBJECT_HEIGHT * 4 / 1024.0 / 1024.0 /
(end_time - start_time));
- intel_batchbuffer_free(batch);
- drm_intel_bufmgr_destroy(bufmgr);
-
- close(fd);
-
- return 0;
+ close(i915);
}
diff --git a/benchmarks/intel_upload_blit_large_gtt.c b/benchmarks/intel_upload_blit_large_gtt.c
index 0b704b57d4..1e991a6b24 100644
--- a/benchmarks/intel_upload_blit_large_gtt.c
+++ b/benchmarks/intel_upload_blit_large_gtt.c
@@ -45,6 +45,7 @@
*/
#include "igt.h"
+#include "i915/gem_create.h"
#include <stdlib.h>
#include <stdio.h>
#include <string.h>
@@ -69,74 +70,98 @@ get_time_in_secs(void)
}
static void
-do_render(drm_intel_bufmgr *bufmgr, struct intel_batchbuffer *batch,
- drm_intel_bo *dst_bo, int width, int height)
+do_render(int i915, uint32_t dst_handle)
{
- uint32_t *data;
- drm_intel_bo *src_bo;
- int i;
+ struct drm_i915_gem_execbuffer2 exec = {};
+ struct drm_i915_gem_exec_object2 obj[3] = {};
+ struct drm_i915_gem_relocation_entry reloc[2];
static uint32_t seed = 1;
+ uint64_t size = OBJECT_WIDTH * OBJECT_HEIGHT * 4, bb_size = 4096;
+ uint32_t *data, src_handle, bb_handle, *bb;
+ uint32_t gen = intel_gen(intel_get_drm_devid(i915));
+ const bool has_64b_reloc = gen >= 8;
+ int i;
- src_bo = drm_intel_bo_alloc(bufmgr, "src", width * height * 4, 4096);
-
- drm_intel_gem_bo_map_gtt(src_bo);
+ bb_handle = gem_create_from_pool(i915, &bb_size, REGION_SMEM);
+ src_handle = gem_create_from_pool(i915, &size, REGION_SMEM);
- data = src_bo->virtual;
- for (i = 0; i < width * height; i++) {
+ data = gem_mmap__gtt(i915, src_handle, size, PROT_WRITE);
+ for (i = 0; i < OBJECT_WIDTH * OBJECT_HEIGHT; i++)
data[i] = seed++;
- }
-
- drm_intel_gem_bo_unmap_gtt(src_bo);
+ gem_munmap(data, size);
/* Render the junk to the dst. */
- BLIT_COPY_BATCH_START(0);
- OUT_BATCH((3 << 24) | /* 32 bits */
+ bb = gem_mmap__device_coherent(i915, bb_handle, 0, bb_size, PROT_WRITE);
+ i = 0;
+ bb[i++] = XY_SRC_COPY_BLT_CMD |
+ XY_SRC_COPY_BLT_WRITE_ALPHA |
+ XY_SRC_COPY_BLT_WRITE_RGB |
+ (6 + 2*(gen >= 8));
+ bb[i++] = (3 << 24) | /* 32 bits */
(0xcc << 16) | /* copy ROP */
- (width * 4) /* dst pitch */);
- OUT_BATCH(0); /* dst x1,y1 */
- OUT_BATCH((height << 16) | width); /* dst x2,y2 */
- OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
- OUT_BATCH(0); /* src x1,y1 */
- OUT_BATCH(width * 4); /* src pitch */
- OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
- ADVANCE_BATCH();
-
- intel_batchbuffer_flush(batch);
-
- drm_intel_bo_unreference(src_bo);
+ (OBJECT_WIDTH * 4) /* dst pitch */;
+ bb[i++] = 0; /* dst x1,y1 */
+ bb[i++] = (OBJECT_HEIGHT << 16) | OBJECT_WIDTH; /* dst x2,y2 */
+
+ obj[0].handle = dst_handle;
+ obj[0].offset = dst_handle * size;
+ reloc[0].target_handle = dst_handle;
+ reloc[0].presumed_offset = obj[0].offset;
+ reloc[0].offset = sizeof(uint32_t) * i;
+ reloc[0].read_domains = I915_GEM_DOMAIN_RENDER;
+ reloc[0].write_domain = I915_GEM_DOMAIN_RENDER;
+ bb[i++] = obj[0].offset;
+ if (has_64b_reloc)
+ bb[i++] = obj[0].offset >> 32;
+
+ bb[i++] = 0; /* src x1,y1 */
+ bb[i++] = OBJECT_WIDTH * 4; /* src pitch */
+
+ obj[1].handle = src_handle;
+ obj[1].offset = src_handle * size;
+ reloc[1].target_handle = src_handle;
+ reloc[1].presumed_offset = obj[1].offset;
+ reloc[1].offset = sizeof(uint32_t) * i;
+ reloc[1].read_domains = I915_GEM_DOMAIN_RENDER;
+ reloc[1].write_domain = 0;
+ bb[i++] = obj[1].offset;
+ if (has_64b_reloc)
+ bb[i++] = obj[1].offset >> 32;
+
+ obj[2].handle = bb_handle;
+ obj[2].relocs_ptr = to_user_pointer(reloc);
+ obj[2].relocation_count = 2;
+
+ bb[i++] = MI_BATCH_BUFFER_END;
+ gem_munmap(bb, bb_size);
+
+ exec.buffers_ptr = to_user_pointer(obj);
+ exec.buffer_count = 3;
+ exec.flags = gen >= 6 ? I915_EXEC_BLT : 0 | I915_EXEC_NO_RELOC;
+
+ gem_execbuf(i915, &exec);
}
int main(int argc, char **argv)
{
- int fd;
- int object_size = OBJECT_WIDTH * OBJECT_HEIGHT * 4;
double start_time, end_time;
- drm_intel_bo *dst_bo;
- drm_intel_bufmgr *bufmgr;
- struct intel_batchbuffer *batch;
- int i;
-
- fd = drm_open_driver(DRIVER_INTEL);
+ uint32_t dst_handle;
+ int i915, i;
- bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
- drm_intel_bufmgr_gem_enable_reuse(bufmgr);
-
- batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd));
-
- dst_bo = drm_intel_bo_alloc(bufmgr, "dst", object_size, 4096);
+ i915 = drm_open_driver(DRIVER_INTEL);
+ dst_handle = gem_create(i915, OBJECT_WIDTH * OBJECT_HEIGHT * 4);
/* Prep loop to get us warmed up. */
- for (i = 0; i < 60; i++) {
- do_render(bufmgr, batch, dst_bo, OBJECT_WIDTH, OBJECT_HEIGHT);
- }
- drm_intel_bo_wait_rendering(dst_bo);
+ for (i = 0; i < 60; i++)
+ do_render(i915, dst_handle);
+ gem_sync(i915, dst_handle);
/* Do the actual timing. */
start_time = get_time_in_secs();
- for (i = 0; i < 200; i++) {
- do_render(bufmgr, batch, dst_bo, OBJECT_WIDTH, OBJECT_HEIGHT);
- }
- drm_intel_bo_wait_rendering(dst_bo);
+ for (i = 0; i < 200; i++)
+ do_render(i915, dst_handle);
+ gem_sync(i915, dst_handle);
+
end_time = get_time_in_secs();
printf("%d iterations in %.03f secs: %.01f MB/sec\n", i,
@@ -144,10 +169,5 @@ int main(int argc, char **argv)
(double)i * OBJECT_WIDTH * OBJECT_HEIGHT * 4 / 1024.0 / 1024.0 /
(end_time - start_time));
- intel_batchbuffer_free(batch);
- drm_intel_bufmgr_destroy(bufmgr);
-
- close(fd);
-
- return 0;
+ close(i915);
}
diff --git a/benchmarks/intel_upload_blit_large_map.c b/benchmarks/intel_upload_blit_large_map.c
index ae05434f26..6d3cd748cf 100644
--- a/benchmarks/intel_upload_blit_large_map.c
+++ b/benchmarks/intel_upload_blit_large_map.c
@@ -48,6 +48,7 @@
*/
#include "igt.h"
+#include "i915/gem_create.h"
#include <stdlib.h>
#include <stdio.h>
#include <string.h>
@@ -72,74 +73,99 @@ get_time_in_secs(void)
}
static void
-do_render(drm_intel_bufmgr *bufmgr, struct intel_batchbuffer *batch,
- drm_intel_bo *dst_bo, int width, int height)
+do_render(int i915, uint32_t dst_handle)
{
- uint32_t *data;
- drm_intel_bo *src_bo;
- int i;
+ struct drm_i915_gem_execbuffer2 exec = {};
+ struct drm_i915_gem_exec_object2 obj[3] = {};
+ struct drm_i915_gem_relocation_entry reloc[2];
static uint32_t seed = 1;
+ uint64_t size = OBJECT_WIDTH * OBJECT_HEIGHT * 4, bb_size = 4096;
+ uint32_t *data, src_handle, bb_handle, *bb;
+ uint32_t gen = intel_gen(intel_get_drm_devid(i915));
+ const bool has_64b_reloc = gen >= 8;
+ int i;
- src_bo = drm_intel_bo_alloc(bufmgr, "src", width * height * 4, 4096);
-
- drm_intel_bo_map(src_bo, 1);
+ bb_handle = gem_create_from_pool(i915, &bb_size, REGION_SMEM);
+ src_handle = gem_create_from_pool(i915, &size, REGION_SMEM);
- data = src_bo->virtual;
- for (i = 0; i < width * height; i++) {
+ data = gem_mmap__cpu(i915, src_handle, 0, size, PROT_WRITE);
+ for (i = 0; i < OBJECT_WIDTH * OBJECT_HEIGHT; i++)
data[i] = seed++;
- }
-
- drm_intel_bo_unmap(src_bo);
+ gem_set_domain(i915, src_handle, I915_GEM_DOMAIN_CPU, 0);
+ gem_munmap(data, size);
/* Render the junk to the dst. */
- BLIT_COPY_BATCH_START(0);
- OUT_BATCH((3 << 24) | /* 32 bits */
+ bb = gem_mmap__device_coherent(i915, bb_handle, 0, bb_size, PROT_WRITE);
+ i = 0;
+ bb[i++] = XY_SRC_COPY_BLT_CMD |
+ XY_SRC_COPY_BLT_WRITE_ALPHA |
+ XY_SRC_COPY_BLT_WRITE_RGB |
+ (6 + 2*(gen >= 8));
+ bb[i++] = (3 << 24) | /* 32 bits */
(0xcc << 16) | /* copy ROP */
- (width * 4) /* dst pitch */);
- OUT_BATCH(0); /* dst x1,y1 */
- OUT_BATCH((height << 16) | width); /* dst x2,y2 */
- OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
- OUT_BATCH(0); /* src x1,y1 */
- OUT_BATCH(width * 4); /* src pitch */
- OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
- ADVANCE_BATCH();
-
- intel_batchbuffer_flush(batch);
-
- drm_intel_bo_unreference(src_bo);
+ (OBJECT_WIDTH * 4) /* dst pitch */;
+ bb[i++] = 0; /* dst x1,y1 */
+ bb[i++] = (OBJECT_HEIGHT << 16) | OBJECT_WIDTH; /* dst x2,y2 */
+
+ obj[0].handle = dst_handle;
+ obj[0].offset = dst_handle * size;
+ reloc[0].target_handle = dst_handle;
+ reloc[0].presumed_offset = obj[0].offset;
+ reloc[0].offset = sizeof(uint32_t) * i;
+ reloc[0].read_domains = I915_GEM_DOMAIN_RENDER;
+ reloc[0].write_domain = I915_GEM_DOMAIN_RENDER;
+ bb[i++] = obj[0].offset;
+ if (has_64b_reloc)
+ bb[i++] = obj[0].offset >> 32;
+
+ bb[i++] = 0; /* src x1,y1 */
+ bb[i++] = OBJECT_WIDTH * 4; /* src pitch */
+
+ obj[1].handle = src_handle;
+ obj[1].offset = src_handle * size;
+ reloc[1].target_handle = src_handle;
+ reloc[1].presumed_offset = obj[1].offset;
+ reloc[1].offset = sizeof(uint32_t) * i;
+ reloc[1].read_domains = I915_GEM_DOMAIN_RENDER;
+ reloc[1].write_domain = 0;
+ bb[i++] = obj[1].offset;
+ if (has_64b_reloc)
+ bb[i++] = obj[1].offset >> 32;
+
+ obj[2].handle = bb_handle;
+ obj[2].relocs_ptr = to_user_pointer(reloc);
+ obj[2].relocation_count = 2;
+
+ bb[i++] = MI_BATCH_BUFFER_END;
+ gem_munmap(bb, bb_size);
+
+ exec.buffers_ptr = to_user_pointer(obj);
+ exec.buffer_count = 3;
+ exec.flags = gen >= 6 ? I915_EXEC_BLT : 0 | I915_EXEC_NO_RELOC;
+
+ gem_execbuf(i915, &exec);
}
int main(int argc, char **argv)
{
- int fd;
- int object_size = OBJECT_WIDTH * OBJECT_HEIGHT * 4;
double start_time, end_time;
- drm_intel_bo *dst_bo;
- drm_intel_bufmgr *bufmgr;
- struct intel_batchbuffer *batch;
- int i;
-
- fd = drm_open_driver(DRIVER_INTEL);
+ uint32_t dst_handle;
+ int i915, i;
- bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
- drm_intel_bufmgr_gem_enable_reuse(bufmgr);
-
- batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd));
-
- dst_bo = drm_intel_bo_alloc(bufmgr, "dst", object_size, 4096);
+ i915 = drm_open_driver(DRIVER_INTEL);
+ dst_handle = gem_create(i915, OBJECT_WIDTH * OBJECT_HEIGHT * 4);
/* Prep loop to get us warmed up. */
- for (i = 0; i < 60; i++) {
- do_render(bufmgr, batch, dst_bo, OBJECT_WIDTH, OBJECT_HEIGHT);
- }
- drm_intel_bo_wait_rendering(dst_bo);
+ for (i = 0; i < 60; i++)
+ do_render(i915, dst_handle);
+ gem_sync(i915, dst_handle);
/* Do the actual timing. */
start_time = get_time_in_secs();
- for (i = 0; i < 200; i++) {
- do_render(bufmgr, batch, dst_bo, OBJECT_WIDTH, OBJECT_HEIGHT);
- }
- drm_intel_bo_wait_rendering(dst_bo);
+ for (i = 0; i < 200; i++)
+ do_render(i915, dst_handle);
+ gem_sync(i915, dst_handle);
+
end_time = get_time_in_secs();
printf("%d iterations in %.03f secs: %.01f MB/sec\n", i,
@@ -147,10 +173,6 @@ int main(int argc, char **argv)
(double)i * OBJECT_WIDTH * OBJECT_HEIGHT * 4 / 1024.0 / 1024.0 /
(end_time - start_time));
- intel_batchbuffer_free(batch);
- drm_intel_bufmgr_destroy(bufmgr);
-
- close(fd);
-
- return 0;
+ close(i915);
}
+
diff --git a/benchmarks/intel_upload_blit_small.c b/benchmarks/intel_upload_blit_small.c
index 7e3346eb74..525d68e36a 100644
--- a/benchmarks/intel_upload_blit_small.c
+++ b/benchmarks/intel_upload_blit_small.c
@@ -41,6 +41,7 @@
*/
#include "igt.h"
+#include "i915/gem_create.h"
#include <stdlib.h>
#include <stdio.h>
#include <string.h>
@@ -66,21 +67,27 @@ get_time_in_secs(void)
}
static void
-do_render(drm_intel_bufmgr *bufmgr, struct intel_batchbuffer *batch,
- drm_intel_bo *dst_bo, int width, int height)
+do_render(int i915, uint32_t dst_handle)
{
- uint32_t data[64];
- drm_intel_bo *src_bo;
- int i;
+ struct drm_i915_gem_execbuffer2 exec = {};
+ struct drm_i915_gem_exec_object2 obj[3] = {};
+ struct drm_i915_gem_relocation_entry reloc[2];
static uint32_t seed = 1;
+ uint32_t data[OBJECT_WIDTH * OBJECT_HEIGHT];
+ uint64_t size = OBJECT_WIDTH * OBJECT_HEIGHT * 4, bb_size = 4096;
+ uint32_t src_handle, bb_handle, *bb;
+ uint32_t gen = intel_gen(intel_get_drm_devid(i915));
+ const bool has_64b_reloc = gen >= 8;
+ int i;
- src_bo = drm_intel_bo_alloc(bufmgr, "src", width * height * 4, 4096);
+ bb_handle = gem_create_from_pool(i915, &bb_size, REGION_SMEM);
+ src_handle = gem_create_from_pool(i915, &size, REGION_SMEM);
/* Upload some junk. Real workloads would be doing a lot more
* work to generate the junk.
*/
- for (i = 0; i < width * height;) {
- int size, j;
+ for (i = 0; i < OBJECT_WIDTH * OBJECT_HEIGHT; i++) {
+ int subsize, j;
/* Choose a size from 1 to 64 dwords to upload.
* Normal workloads have a distribution of sizes with a
@@ -88,68 +95,92 @@ do_render(drm_intel_bufmgr *bufmgr, struct intel_batchbuffer *batch,
* pile of vertices, most likely), but I'm trying to get at
* the cost of the small uploads here.
*/
- size = random() % 64 + 1;
- if (i + size > width * height)
- size = width * height - i;
+ subsize = random() % 64 + 1;
+ if (i + subsize > OBJECT_WIDTH * OBJECT_HEIGHT)
+ subsize = OBJECT_WIDTH * OBJECT_HEIGHT - i;
- for (j = 0; j < size; j++)
+ for (j = 0; j < subsize; j++)
data[j] = seed++;
/* Upload the junk. */
- drm_intel_bo_subdata(src_bo, i * 4, size * 4, data);
+ //drm_intel_bo_subdata(src_bo, i * 4, size * 4, data);
+ gem_write(i915, src_handle, i * 4, data, subsize * 4);
- i += size;
+ i += subsize;
}
/* Render the junk to the dst. */
- BLIT_COPY_BATCH_START(0);
- OUT_BATCH((3 << 24) | /* 32 bits */
+ bb = gem_mmap__device_coherent(i915, bb_handle, 0, bb_size, PROT_WRITE);
+ i = 0;
+ bb[i++] = XY_SRC_COPY_BLT_CMD |
+ XY_SRC_COPY_BLT_WRITE_ALPHA |
+ XY_SRC_COPY_BLT_WRITE_RGB |
+ (6 + 2*(gen >= 8));
+ bb[i++] = (3 << 24) | /* 32 bits */
(0xcc << 16) | /* copy ROP */
- (width * 4) /* dst pitch */);
- OUT_BATCH(0); /* dst x1,y1 */
- OUT_BATCH((height << 16) | width); /* dst x2,y2 */
- OUT_RELOC(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
- OUT_BATCH(0); /* src x1,y1 */
- OUT_BATCH(width * 4); /* src pitch */
- OUT_RELOC(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
- ADVANCE_BATCH();
-
- intel_batchbuffer_flush(batch);
-
- drm_intel_bo_unreference(src_bo);
+ (OBJECT_WIDTH * 4) /* dst pitch */;
+ bb[i++] = 0; /* dst x1,y1 */
+ bb[i++] = (OBJECT_HEIGHT << 16) | OBJECT_WIDTH; /* dst x2,y2 */
+
+ obj[0].handle = dst_handle;
+ obj[0].offset = dst_handle * size;
+ reloc[0].target_handle = dst_handle;
+ reloc[0].presumed_offset = obj[0].offset;
+ reloc[0].offset = sizeof(uint32_t) * i;
+ reloc[0].read_domains = I915_GEM_DOMAIN_RENDER;
+ reloc[0].write_domain = I915_GEM_DOMAIN_RENDER;
+ bb[i++] = obj[0].offset;
+ if (has_64b_reloc)
+ bb[i++] = obj[0].offset >> 32;
+
+ bb[i++] = 0; /* src x1,y1 */
+ bb[i++] = OBJECT_WIDTH * 4; /* src pitch */
+
+ obj[1].handle = src_handle;
+ obj[1].offset = src_handle * size;
+ reloc[1].target_handle = src_handle;
+ reloc[1].presumed_offset = obj[1].offset;
+ reloc[1].offset = sizeof(uint32_t) * i;
+ reloc[1].read_domains = I915_GEM_DOMAIN_RENDER;
+ reloc[1].write_domain = 0;
+ bb[i++] = obj[1].offset;
+ if (has_64b_reloc)
+ bb[i++] = obj[1].offset >> 32;
+
+ obj[2].handle = bb_handle;
+ obj[2].relocs_ptr = to_user_pointer(reloc);
+ obj[2].relocation_count = 2;
+
+ bb[i++] = MI_BATCH_BUFFER_END;
+ gem_munmap(bb, bb_size);
+
+ exec.buffers_ptr = to_user_pointer(obj);
+ exec.buffer_count = 3;
+ exec.flags = gen >= 6 ? I915_EXEC_BLT : 0 | I915_EXEC_NO_RELOC;
+
+ gem_execbuf(i915, &exec);
}
int main(int argc, char **argv)
{
- int fd;
- int object_size = OBJECT_WIDTH * OBJECT_HEIGHT * 4;
double start_time, end_time;
- drm_intel_bo *dst_bo;
- drm_intel_bufmgr *bufmgr;
- struct intel_batchbuffer *batch;
- int i;
-
- fd = drm_open_driver(DRIVER_INTEL);
-
- bufmgr = drm_intel_bufmgr_gem_init(fd, 4096);
- drm_intel_bufmgr_gem_enable_reuse(bufmgr);
-
- batch = intel_batchbuffer_alloc(bufmgr, intel_get_drm_devid(fd));
+ uint32_t dst_handle;
+ int i915, i;
- dst_bo = drm_intel_bo_alloc(bufmgr, "dst", object_size, 4096);
+ i915 = drm_open_driver(DRIVER_INTEL);
+ dst_handle = gem_create(i915, OBJECT_WIDTH * OBJECT_HEIGHT * 4);
/* Prep loop to get us warmed up. */
- for (i = 0; i < 20; i++) {
- do_render(bufmgr, batch, dst_bo, OBJECT_WIDTH, OBJECT_HEIGHT);
- }
- drm_intel_bo_wait_rendering(dst_bo);
+ for (i = 0; i < 60; i++)
+ do_render(i915, dst_handle);
+ gem_sync(i915, dst_handle);
/* Do the actual timing. */
start_time = get_time_in_secs();
- for (i = 0; i < 1000; i++) {
- do_render(bufmgr, batch, dst_bo, OBJECT_WIDTH, OBJECT_HEIGHT);
- }
- drm_intel_bo_wait_rendering(dst_bo);
+ for (i = 0; i < 1000; i++)
+ do_render(i915, dst_handle);
+ gem_sync(i915, dst_handle);
+
end_time = get_time_in_secs();
printf("%d iterations in %.03f secs: %.01f MB/sec\n", i,
@@ -157,10 +188,6 @@ int main(int argc, char **argv)
(double)i * OBJECT_WIDTH * OBJECT_HEIGHT * 4 / 1024.0 / 1024.0 /
(end_time - start_time));
- intel_batchbuffer_free(batch);
- drm_intel_bufmgr_destroy(bufmgr);
-
- close(fd);
-
- return 0;
+ close(i915);
}
+
--
2.34.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [igt-dev] [PATCH i-g-t v2 4/4] lib/intel_batchbuffer: Get rid of libdrm batchbuffer
2022-11-28 16:15 [igt-dev] [PATCH i-g-t v2 0/4] Remove libdrm remnants in i915 code Zbigniew Kempczyński
` (2 preceding siblings ...)
2022-11-28 16:15 ` [igt-dev] [PATCH i-g-t v2 3/4] benchmarks/intel_upload_blit_*: Remove libdrm in upload blits Zbigniew Kempczyński
@ 2022-11-28 16:15 ` Zbigniew Kempczyński
2022-11-28 17:22 ` [igt-dev] ✓ Fi.CI.BAT: success for Remove libdrm remnants in i915 code (rev2) Patchwork
2022-11-28 22:22 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork
5 siblings, 0 replies; 8+ messages in thread
From: Zbigniew Kempczyński @ 2022-11-28 16:15 UTC (permalink / raw)
To: igt-dev
As few remnants were rewritten (prime_udl, prime_nv_*, benchmarks)
we can finally remove libdrm code in intel_batchbuffer.
Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
---
lib/intel_batchbuffer.c | 574 +---------------------------------------
lib/intel_batchbuffer.h | 248 -----------------
2 files changed, 2 insertions(+), 820 deletions(-)
diff --git a/lib/intel_batchbuffer.c b/lib/intel_batchbuffer.c
index 19a1fbe4db..f046a96336 100644
--- a/lib/intel_batchbuffer.c
+++ b/lib/intel_batchbuffer.c
@@ -66,16 +66,6 @@
* @title: Batch Buffer
* @include: igt.h
*
- * This library provides some basic support for batchbuffers and using the
- * blitter engine based upon libdrm. A new batchbuffer is allocated with
- * intel_batchbuffer_alloc() and for simple blitter commands submitted with
- * intel_batchbuffer_flush().
- *
- * It also provides some convenient macros to easily emit commands into
- * batchbuffers. All those macros presume that a pointer to a #intel_batchbuffer
- * structure called batch is in scope. The basic macros are #BEGIN_BATCH,
- * #OUT_BATCH, #OUT_RELOC and #ADVANCE_BATCH.
- *
* Note that this library's header pulls in the [i-g-t core](igt-gpu-tools-i-g-t-core.html)
* library as a dependency.
*/
@@ -84,515 +74,13 @@ static bool intel_bb_do_tracking;
static IGT_LIST_HEAD(intel_bb_list);
static pthread_mutex_t intel_bb_list_lock = PTHREAD_MUTEX_INITIALIZER;
-/**
- * intel_batchbuffer_align:
- * @batch: batchbuffer object
- * @align: value in bytes to which we want to align
- *
- * Aligns the current in-batch offset to the given value.
- *
- * Returns: Batchbuffer offset aligned to the given value.
- */
-uint32_t
-intel_batchbuffer_align(struct intel_batchbuffer *batch, uint32_t align)
-{
- uint32_t offset = batch->ptr - batch->buffer;
-
- offset = ALIGN(offset, align);
- batch->ptr = batch->buffer + offset;
- return offset;
-}
-
-/**
- * intel_batchbuffer_subdata_alloc:
- * @batch: batchbuffer object
- * @size: amount of bytes need to allocate
- * @align: value in bytes to which we want to align
- *
- * Verify if sufficient @size within @batch is available to deny overflow.
- * Then allocate @size bytes within @batch.
- *
- * Returns: Offset within @batch between allocated subdata and base of @batch.
- */
-void *
-intel_batchbuffer_subdata_alloc(struct intel_batchbuffer *batch, uint32_t size,
- uint32_t align)
-{
- uint32_t offset = intel_batchbuffer_align(batch, align);
-
- igt_assert(size <= intel_batchbuffer_space(batch));
-
- batch->ptr += size;
- return memset(batch->buffer + offset, 0, size);
-}
-
-/**
- * intel_batchbuffer_subdata_offset:
- * @batch: batchbuffer object
- * @ptr: pointer to given data
- *
- * Returns: Offset within @batch between @ptr and base of @batch.
- */
-uint32_t
-intel_batchbuffer_subdata_offset(struct intel_batchbuffer *batch, void *ptr)
-{
- return (uint8_t *)ptr - batch->buffer;
-}
-
-/**
- * intel_batchbuffer_reset:
- * @batch: batchbuffer object
- *
- * Resets @batch by allocating a new gem buffer object as backing storage.
- */
-void
-intel_batchbuffer_reset(struct intel_batchbuffer *batch)
-{
- if (batch->bo != NULL) {
- drm_intel_bo_unreference(batch->bo);
- batch->bo = NULL;
- }
-
- batch->bo = drm_intel_bo_alloc(batch->bufmgr, "batchbuffer",
- BATCH_SZ, 4096);
-
- memset(batch->buffer, 0, sizeof(batch->buffer));
- batch->ctx = NULL;
-
- batch->ptr = batch->buffer;
- batch->end = NULL;
-}
-
-/**
- * intel_batchbuffer_alloc:
- * @bufmgr: libdrm buffer manager
- * @devid: pci device id of the drm device
- *
- * Allocates a new batchbuffer object. @devid must be supplied since libdrm
- * doesn't expose it directly.
- *
- * Returns: The allocated and initialized batchbuffer object.
- */
-struct intel_batchbuffer *
-intel_batchbuffer_alloc(drm_intel_bufmgr *bufmgr, uint32_t devid)
-{
- struct intel_batchbuffer *batch = calloc(sizeof(*batch), 1);
-
- batch->bufmgr = bufmgr;
- batch->devid = devid;
- batch->gen = intel_gen(devid);
- intel_batchbuffer_reset(batch);
-
- return batch;
-}
-
-/**
- * intel_batchbuffer_free:
- * @batch: batchbuffer object
- *
- * Releases all resource of the batchbuffer object @batch.
- */
-void
-intel_batchbuffer_free(struct intel_batchbuffer *batch)
-{
- drm_intel_bo_unreference(batch->bo);
- batch->bo = NULL;
- free(batch);
-}
-
#define CMD_POLY_STIPPLE_OFFSET 0x7906
-static unsigned int
-flush_on_ring_common(struct intel_batchbuffer *batch, int ring)
-{
- unsigned int used = batch->ptr - batch->buffer;
-
- if (used == 0)
- return 0;
-
- if (IS_GEN5(batch->devid)) {
- /* emit gen5 w/a without batch space checks - we reserve that
- * already. */
- *(uint32_t *) (batch->ptr) = CMD_POLY_STIPPLE_OFFSET << 16;
- batch->ptr += 4;
- *(uint32_t *) (batch->ptr) = 0;
- batch->ptr += 4;
- }
-
- /* Round batchbuffer usage to 2 DWORDs. */
- if ((used & 4) == 0) {
- *(uint32_t *) (batch->ptr) = 0; /* noop */
- batch->ptr += 4;
- }
-
- /* Mark the end of the buffer. */
- *(uint32_t *)(batch->ptr) = MI_BATCH_BUFFER_END; /* noop */
- batch->ptr += 4;
- return batch->ptr - batch->buffer;
-}
-
-/**
- * intel_batchbuffer_flush_on_ring:
- * @batch: batchbuffer object
- * @ring: execbuf ring flag
- *
- * Submits the batch for execution on @ring.
- */
-void
-intel_batchbuffer_flush_on_ring(struct intel_batchbuffer *batch, int ring)
-{
- unsigned int used = flush_on_ring_common(batch, ring);
- drm_intel_context *ctx;
-
- if (used == 0)
- return;
-
- do_or_die(drm_intel_bo_subdata(batch->bo, 0, used, batch->buffer));
-
- batch->ptr = NULL;
-
- /* XXX bad kernel API */
- ctx = batch->ctx;
- if (ring != I915_EXEC_RENDER)
- ctx = NULL;
- do_or_die(drm_intel_gem_bo_context_exec(batch->bo, ctx, used, ring));
-
- intel_batchbuffer_reset(batch);
-}
-
-void
-intel_batchbuffer_set_context(struct intel_batchbuffer *batch,
- drm_intel_context *context)
-{
- batch->ctx = context;
-}
-
-/**
- * intel_batchbuffer_flush_with_context:
- * @batch: batchbuffer object
- * @context: libdrm hardware context object
- *
- * Submits the batch for execution on the render engine with the supplied
- * hardware context.
- */
-void
-intel_batchbuffer_flush_with_context(struct intel_batchbuffer *batch,
- drm_intel_context *context)
-{
- int ret;
- unsigned int used = flush_on_ring_common(batch, I915_EXEC_RENDER);
-
- if (used == 0)
- return;
-
- ret = drm_intel_bo_subdata(batch->bo, 0, used, batch->buffer);
- igt_assert(ret == 0);
-
- batch->ptr = NULL;
-
- ret = drm_intel_gem_bo_context_exec(batch->bo, context, used,
- I915_EXEC_RENDER);
- igt_assert(ret == 0);
-
- intel_batchbuffer_reset(batch);
-}
-
-/**
- * intel_batchbuffer_flush:
- * @batch: batchbuffer object
- *
- * Submits the batch for execution on the blitter engine, selecting the right
- * ring depending upon the hardware platform.
- */
-void
-intel_batchbuffer_flush(struct intel_batchbuffer *batch)
-{
- int ring = 0;
- if (HAS_BLT_RING(batch->devid))
- ring = I915_EXEC_BLT;
- intel_batchbuffer_flush_on_ring(batch, ring);
-}
-
-
-/**
- * intel_batchbuffer_emit_reloc:
- * @batch: batchbuffer object
- * @buffer: relocation target libdrm buffer object
- * @delta: delta value to add to @buffer's gpu address
- * @read_domains: gem domain bits for the relocation
- * @write_domain: gem domain bit for the relocation
- * @fenced: whether this gpu access requires fences
- *
- * Emits both a libdrm relocation entry pointing at @buffer and the pre-computed
- * DWORD of @batch's presumed gpu address plus the supplied @delta into @batch.
- *
- * Note that @fenced is only relevant if @buffer is actually tiled.
- *
- * This is the only way buffers get added to the validate list.
- */
-void
-intel_batchbuffer_emit_reloc(struct intel_batchbuffer *batch,
- drm_intel_bo *buffer, uint64_t delta,
- uint32_t read_domains, uint32_t write_domain,
- int fenced)
-{
- uint64_t offset;
- int ret;
-
- if (batch->ptr - batch->buffer > BATCH_SZ)
- igt_info("bad relocation ptr %p map %p offset %d size %d\n",
- batch->ptr, batch->buffer,
- (int)(batch->ptr - batch->buffer), BATCH_SZ);
-
- if (fenced)
- ret = drm_intel_bo_emit_reloc_fence(batch->bo, batch->ptr - batch->buffer,
- buffer, delta,
- read_domains, write_domain);
- else
- ret = drm_intel_bo_emit_reloc(batch->bo, batch->ptr - batch->buffer,
- buffer, delta,
- read_domains, write_domain);
-
- offset = buffer->offset64;
- offset += delta;
- intel_batchbuffer_emit_dword(batch, offset);
- if (batch->gen >= 8)
- intel_batchbuffer_emit_dword(batch, offset >> 32);
- igt_assert(ret == 0);
-}
-
-/**
- * intel_batchbuffer_copy_data:
- * @batch: batchbuffer object
- * @data: pointer to the data to write into the batchbuffer
- * @bytes: number of bytes to write into the batchbuffer
- * @align: value in bytes to which we want to align
- *
- * This transfers the given @data into the batchbuffer. Note that the length
- * must be DWORD aligned, i.e. multiples of 32bits. The caller must
- * confirm that there is enough space in the batch for the data to be
- * copied.
- *
- * Returns: Offset of copied data.
- */
-uint32_t
-intel_batchbuffer_copy_data(struct intel_batchbuffer *batch,
- const void *data, unsigned int bytes,
- uint32_t align)
-{
- uint32_t *subdata;
-
- igt_assert((bytes & 3) == 0);
- subdata = intel_batchbuffer_subdata_alloc(batch, bytes, align);
- memcpy(subdata, data, bytes);
-
- return intel_batchbuffer_subdata_offset(batch, subdata);
-}
-
-#define CHECK_RANGE(x) do { \
+#define CHECK_RANGE(x) do { \
igt_assert_lte(0, (x)); \
igt_assert_lt((x), (1 << 15)); \
} while (0)
-/**
- * intel_blt_copy:
- * @batch: batchbuffer object
- * @src_bo: source libdrm buffer object
- * @src_x1: source pixel x-coordination
- * @src_y1: source pixel y-coordination
- * @src_pitch: @src_bo's pitch in bytes
- * @dst_bo: destination libdrm buffer object
- * @dst_x1: destination pixel x-coordination
- * @dst_y1: destination pixel y-coordination
- * @dst_pitch: @dst_bo's pitch in bytes
- * @width: width of the copied rectangle
- * @height: height of the copied rectangle
- * @bpp: bits per pixel
- *
- * This emits a 2D copy operation using blitter commands into the supplied batch
- * buffer object.
- */
-void
-intel_blt_copy(struct intel_batchbuffer *batch,
- drm_intel_bo *src_bo, int src_x1, int src_y1, int src_pitch,
- drm_intel_bo *dst_bo, int dst_x1, int dst_y1, int dst_pitch,
- int width, int height, int bpp)
-{
- const unsigned int gen = batch->gen;
- uint32_t src_tiling, dst_tiling, swizzle;
- uint32_t cmd_bits = 0;
- uint32_t br13_bits;
-
- igt_assert(bpp*(src_x1 + width) <= 8*src_pitch);
- igt_assert(bpp*(dst_x1 + width) <= 8*dst_pitch);
- igt_assert(src_pitch * (src_y1 + height) <= src_bo->size);
- igt_assert(dst_pitch * (dst_y1 + height) <= dst_bo->size);
-
- drm_intel_bo_get_tiling(src_bo, &src_tiling, &swizzle);
- drm_intel_bo_get_tiling(dst_bo, &dst_tiling, &swizzle);
-
- if (gen >= 4 && src_tiling != I915_TILING_NONE) {
- src_pitch /= 4;
- cmd_bits |= XY_SRC_COPY_BLT_SRC_TILED;
- }
-
- if (gen >= 4 && dst_tiling != I915_TILING_NONE) {
- dst_pitch /= 4;
- cmd_bits |= XY_SRC_COPY_BLT_DST_TILED;
- }
-
- CHECK_RANGE(src_x1); CHECK_RANGE(src_y1);
- CHECK_RANGE(dst_x1); CHECK_RANGE(dst_y1);
- CHECK_RANGE(width); CHECK_RANGE(height);
- CHECK_RANGE(src_x1 + width); CHECK_RANGE(src_y1 + height);
- CHECK_RANGE(dst_x1 + width); CHECK_RANGE(dst_y1 + height);
- CHECK_RANGE(src_pitch); CHECK_RANGE(dst_pitch);
-
- br13_bits = 0;
- switch (bpp) {
- case 8:
- break;
- case 16: /* supporting only RGB565, not ARGB1555 */
- br13_bits |= 1 << 24;
- break;
- case 32:
- br13_bits |= 3 << 24;
- cmd_bits |= XY_SRC_COPY_BLT_WRITE_ALPHA |
- XY_SRC_COPY_BLT_WRITE_RGB;
- break;
- default:
- igt_fail(IGT_EXIT_FAILURE);
- }
-
- BLIT_COPY_BATCH_START(cmd_bits);
- OUT_BATCH((br13_bits) |
- (0xcc << 16) | /* copy ROP */
- dst_pitch);
- OUT_BATCH((dst_y1 << 16) | dst_x1); /* dst x1,y1 */
- OUT_BATCH(((dst_y1 + height) << 16) | (dst_x1 + width)); /* dst x2,y2 */
- OUT_RELOC_FENCED(dst_bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, 0);
- OUT_BATCH((src_y1 << 16) | src_x1); /* src x1,y1 */
- OUT_BATCH(src_pitch);
- OUT_RELOC_FENCED(src_bo, I915_GEM_DOMAIN_RENDER, 0, 0);
- ADVANCE_BATCH();
-
-#define CMD_POLY_STIPPLE_OFFSET 0x7906
- if (gen == 5) {
- BEGIN_BATCH(2, 0);
- OUT_BATCH(CMD_POLY_STIPPLE_OFFSET << 16);
- OUT_BATCH(0);
- ADVANCE_BATCH();
- }
-
- if (gen >= 6 && src_bo == dst_bo) {
- BEGIN_BATCH(3, 0);
- OUT_BATCH(XY_SETUP_CLIP_BLT_CMD);
- OUT_BATCH(0);
- OUT_BATCH(0);
- ADVANCE_BATCH();
- }
-
- intel_batchbuffer_flush(batch);
-}
-
-/**
- * intel_copy_bo:
- * @batch: batchbuffer object
- * @src_bo: source libdrm buffer object
- * @dst_bo: destination libdrm buffer object
- * @size: size of the copy range in bytes
- *
- * This emits a copy operation using blitter commands into the supplied batch
- * buffer object. A total of @size bytes from the start of @src_bo is copied
- * over to @dst_bo. Note that @size must be page-aligned.
- */
-void
-intel_copy_bo(struct intel_batchbuffer *batch,
- drm_intel_bo *dst_bo, drm_intel_bo *src_bo,
- long int size)
-{
- igt_assert(size % 4096 == 0);
-
- intel_blt_copy(batch,
- src_bo, 0, 0, 4096,
- dst_bo, 0, 0, 4096,
- 4096/4, size/4096, 32);
-}
-
-/**
- * igt_buf_width:
- * @buf: the i-g-t buffer object
- *
- * Computes the width in 32-bit pixels of the given buffer.
- *
- * Returns:
- * The width of the buffer.
- */
-unsigned igt_buf_width(const struct igt_buf *buf)
-{
- return buf->surface[0].stride/(buf->bpp / 8);
-}
-
-/**
- * igt_buf_height:
- * @buf: the i-g-t buffer object
- *
- * Computes the height in 32-bit pixels of the given buffer.
- *
- * Returns:
- * The height of the buffer.
- */
-unsigned igt_buf_height(const struct igt_buf *buf)
-{
- return buf->surface[0].size/buf->surface[0].stride;
-}
-
-/**
- * igt_buf_intel_ccs_width:
- * @buf: the Intel i-g-t buffer object
- * @gen: device generation
- *
- * Computes the width of ccs buffer when considered as Intel surface data.
- *
- * Returns:
- * The width of the ccs buffer data.
- */
-unsigned int igt_buf_intel_ccs_width(unsigned int gen, const struct igt_buf *buf)
-{
- /*
- * GEN12+: The CCS unit size is 64 bytes mapping 4 main surface
- * tiles. Thus the width of the CCS unit is 4*32=128 pixels on the
- * main surface.
- */
- if (gen >= 12)
- return DIV_ROUND_UP(igt_buf_width(buf), 128) * 64;
-
- return DIV_ROUND_UP(igt_buf_width(buf), 1024) * 128;
-}
-
-/**
- * igt_buf_intel_ccs_height:
- * @buf: the i-g-t buffer object
- * @gen: device generation
- *
- * Computes the height of ccs buffer when considered as Intel surface data.
- *
- * Returns:
- * The height of the ccs buffer data.
- */
-unsigned int igt_buf_intel_ccs_height(unsigned int gen, const struct igt_buf *buf)
-{
- /*
- * GEN12+: The CCS unit size is 64 bytes mapping 4 main surface
- * tiles. Thus the height of the CCS unit is 32 pixel rows on the main
- * surface.
- */
- if (gen >= 12)
- return DIV_ROUND_UP(igt_buf_height(buf), 32);
-
- return DIV_ROUND_UP(igt_buf_height(buf), 512) * 32;
-}
-
/*
* pitches are in bytes if the surfaces are linear, number of dwords
* otherwise
@@ -1057,65 +545,6 @@ void igt_blitter_fast_copy__raw(int fd,
gem_close(fd, batch_handle);
}
-/**
- * igt_blitter_fast_copy:
- * @batch: batchbuffer object
- * @src: source i-g-t buffer object
- * @src_delta: offset into the source i-g-t bo
- * @src_x: source pixel x-coordination
- * @src_y: source pixel y-coordination
- * @width: width of the copied rectangle
- * @height: height of the copied rectangle
- * @dst: destination i-g-t buffer object
- * @dst_delta: offset into the destination i-g-t bo
- * @dst_x: destination pixel x-coordination
- * @dst_y: destination pixel y-coordination
- *
- * Copy @src into @dst using the gen9 fast copy blitter command.
- *
- * The source and destination surfaces cannot overlap.
- */
-void igt_blitter_fast_copy(struct intel_batchbuffer *batch,
- const struct igt_buf *src, unsigned src_delta,
- unsigned src_x, unsigned src_y,
- unsigned width, unsigned height,
- int bpp,
- const struct igt_buf *dst, unsigned dst_delta,
- unsigned dst_x, unsigned dst_y)
-{
- uint32_t src_pitch, dst_pitch;
- uint32_t dword0, dword1;
-
- igt_assert(src->bpp == dst->bpp);
-
- src_pitch = fast_copy_pitch(src->surface[0].stride, src->tiling);
- dst_pitch = fast_copy_pitch(dst->surface[0].stride, src->tiling);
- dword0 = fast_copy_dword0(src->tiling, dst->tiling);
- dword1 = fast_copy_dword1(src->tiling, dst->tiling, dst->bpp);
-
- CHECK_RANGE(src_x); CHECK_RANGE(src_y);
- CHECK_RANGE(dst_x); CHECK_RANGE(dst_y);
- CHECK_RANGE(width); CHECK_RANGE(height);
- CHECK_RANGE(src_x + width); CHECK_RANGE(src_y + height);
- CHECK_RANGE(dst_x + width); CHECK_RANGE(dst_y + height);
- CHECK_RANGE(src_pitch); CHECK_RANGE(dst_pitch);
-
- BEGIN_BATCH(10, 2);
- OUT_BATCH(dword0);
- OUT_BATCH(dword1 | dst_pitch);
- OUT_BATCH((dst_y << 16) | dst_x); /* dst x1,y1 */
- OUT_BATCH(((dst_y + height) << 16) | (dst_x + width)); /* dst x2,y2 */
- OUT_RELOC(dst->bo, I915_GEM_DOMAIN_RENDER, I915_GEM_DOMAIN_RENDER, dst_delta);
- OUT_BATCH(0); /* dst address upper bits */
- OUT_BATCH((src_y << 16) | src_x); /* src x1,y1 */
- OUT_BATCH(src_pitch);
- OUT_RELOC(src->bo, I915_GEM_DOMAIN_RENDER, 0, src_delta);
- OUT_BATCH(0); /* src address upper bits */
- ADVANCE_BATCH();
-
- intel_batchbuffer_flush(batch);
-}
-
/**
* igt_get_render_copyfunc:
* @devid: pci device id
@@ -2130,6 +1559,7 @@ __intel_bb_add_intel_buf(struct intel_bb *ibb, struct intel_buf *buf,
}
}
+ igt_info("Adding offset handle: %u, %lx\n", buf->handle, buf->addr.offset);
obj = intel_bb_add_object(ibb, buf->handle, intel_buf_bo_size(buf),
buf->addr.offset, alignment, write);
buf->addr.offset = obj->offset;
diff --git a/lib/intel_batchbuffer.h b/lib/intel_batchbuffer.h
index 2c19c39b1f..d9370610cf 100644
--- a/lib/intel_batchbuffer.h
+++ b/lib/intel_batchbuffer.h
@@ -2,7 +2,6 @@
#define INTEL_BATCHBUFFER_H
#include <stdint.h>
-#include <intel_bufmgr.h>
#include <i915_drm.h>
#include "igt_core.h"
@@ -12,194 +11,6 @@
#include "intel_allocator.h"
#define BATCH_SZ 4096
-#define BATCH_RESERVED 16
-
-struct intel_batchbuffer {
- drm_intel_bufmgr *bufmgr;
- uint32_t devid;
- unsigned int gen;
-
- drm_intel_context *ctx;
- drm_intel_bo *bo;
-
- uint8_t buffer[BATCH_SZ];
- uint8_t *ptr, *end;
-};
-
-struct intel_batchbuffer *intel_batchbuffer_alloc(drm_intel_bufmgr *bufmgr,
- uint32_t devid);
-
-void intel_batchbuffer_set_context(struct intel_batchbuffer *batch,
- drm_intel_context *ctx);
-
-
-void intel_batchbuffer_free(struct intel_batchbuffer *batch);
-
-
-void intel_batchbuffer_flush(struct intel_batchbuffer *batch);
-void intel_batchbuffer_flush_on_ring(struct intel_batchbuffer *batch, int ring);
-void intel_batchbuffer_flush_with_context(struct intel_batchbuffer *batch,
- drm_intel_context *context);
-
-void intel_batchbuffer_reset(struct intel_batchbuffer *batch);
-
-uint32_t intel_batchbuffer_copy_data(struct intel_batchbuffer *batch,
- const void *data, unsigned int bytes,
- uint32_t align);
-
-void intel_batchbuffer_emit_reloc(struct intel_batchbuffer *batch,
- drm_intel_bo *buffer,
- uint64_t delta,
- uint32_t read_domains,
- uint32_t write_domain,
- int fenced);
-
-uint32_t
-intel_batchbuffer_align(struct intel_batchbuffer *batch, uint32_t align);
-
-void *
-intel_batchbuffer_subdata_alloc(struct intel_batchbuffer *batch,
- uint32_t size, uint32_t align);
-
-uint32_t
-intel_batchbuffer_subdata_offset(struct intel_batchbuffer *batch, void *ptr);
-
-/* Inline functions - might actually be better off with these
- * non-inlined. Certainly better off switching all command packets to
- * be passed as structs rather than dwords, but that's a little bit of
- * work...
- */
-#pragma GCC diagnostic ignored "-Winline"
-static inline unsigned int
-intel_batchbuffer_space(struct intel_batchbuffer *batch)
-{
- return (BATCH_SZ - BATCH_RESERVED) - (batch->ptr - batch->buffer);
-}
-
-
-static inline void
-intel_batchbuffer_emit_dword(struct intel_batchbuffer *batch, uint32_t dword)
-{
- igt_assert(intel_batchbuffer_space(batch) >= 4);
- *(uint32_t *) (batch->ptr) = dword;
- batch->ptr += 4;
-}
-
-static inline void
-intel_batchbuffer_require_space(struct intel_batchbuffer *batch,
- unsigned int sz)
-{
- igt_assert(sz < BATCH_SZ - BATCH_RESERVED);
- if (intel_batchbuffer_space(batch) < sz)
- intel_batchbuffer_flush(batch);
-}
-
-/**
- * BEGIN_BATCH:
- * @n: number of DWORDS to emit
- * @r: number of RELOCS to emit
- *
- * Prepares a batch to emit @n DWORDS, flushing it if there's not enough space
- * available.
- *
- * This macro needs a pointer to an #intel_batchbuffer structure called batch in
- * scope.
- */
-#define BEGIN_BATCH(n, r) do { \
- int __n = (n); \
- igt_assert(batch->end == NULL); \
- if (batch->gen >= 8) __n += r; \
- __n *= 4; \
- intel_batchbuffer_require_space(batch, __n); \
- batch->end = batch->ptr + __n; \
-} while (0)
-
-/**
- * OUT_BATCH:
- * @d: DWORD to emit
- *
- * Emits @d into a batch.
- *
- * This macro needs a pointer to an #intel_batchbuffer structure called batch in
- * scope.
- */
-#define OUT_BATCH(d) intel_batchbuffer_emit_dword(batch, d)
-
-/**
- * OUT_RELOC_FENCED:
- * @buf: relocation target libdrm buffer object
- * @read_domains: gem domain bits for the relocation
- * @write_domain: gem domain bit for the relocation
- * @delta: delta value to add to @buffer's gpu address
- *
- * Emits a fenced relocation into a batch.
- *
- * This macro needs a pointer to an #intel_batchbuffer structure called batch in
- * scope.
- */
-#define OUT_RELOC_FENCED(buf, read_domains, write_domain, delta) do { \
- igt_assert((delta) >= 0); \
- intel_batchbuffer_emit_reloc(batch, buf, delta, \
- read_domains, write_domain, 1); \
-} while (0)
-
-/**
- * OUT_RELOC:
- * @buf: relocation target libdrm buffer object
- * @read_domains: gem domain bits for the relocation
- * @write_domain: gem domain bit for the relocation
- * @delta: delta value to add to @buffer's gpu address
- *
- * Emits a normal, unfenced relocation into a batch.
- *
- * This macro needs a pointer to an #intel_batchbuffer structure called batch in
- * scope.
- */
-#define OUT_RELOC(buf, read_domains, write_domain, delta) do { \
- igt_assert((delta) >= 0); \
- intel_batchbuffer_emit_reloc(batch, buf, delta, \
- read_domains, write_domain, 0); \
-} while (0)
-
-/**
- * ADVANCE_BATCH:
- *
- * Completes the batch command emission sequence started with #BEGIN_BATCH.
- *
- * This macro needs a pointer to an #intel_batchbuffer structure called batch in
- * scope.
- */
-#define ADVANCE_BATCH() do { \
- igt_assert(batch->ptr == batch->end); \
- batch->end = NULL; \
-} while(0)
-
-#define BLIT_COPY_BATCH_START(flags) do { \
- BEGIN_BATCH(8, 2); \
- OUT_BATCH(XY_SRC_COPY_BLT_CMD | \
- XY_SRC_COPY_BLT_WRITE_ALPHA | \
- XY_SRC_COPY_BLT_WRITE_RGB | \
- (flags) | \
- (6 + 2*(batch->gen >= 8))); \
-} while(0)
-
-#define COLOR_BLIT_COPY_BATCH_START(flags) do { \
- BEGIN_BATCH(6, 1); \
- OUT_BATCH(XY_COLOR_BLT_CMD_NOLEN | \
- COLOR_BLT_WRITE_ALPHA | \
- XY_COLOR_BLT_WRITE_RGB | \
- (flags) | \
- (4 + (batch->gen >= 8))); \
-} while(0)
-
-void
-intel_blt_copy(struct intel_batchbuffer *batch,
- drm_intel_bo *src_bo, int src_x1, int src_y1, int src_pitch,
- drm_intel_bo *dst_bo, int dst_x1, int dst_y1, int dst_pitch,
- int width, int height, int bpp);
-void intel_copy_bo(struct intel_batchbuffer *batch,
- drm_intel_bo *dst_bo, drm_intel_bo *src_bo,
- long int size);
/*
* Yf/Ys/4 tiling
@@ -220,57 +31,6 @@ enum i915_compression {
I915_COMPRESSION_MEDIA,
};
-/**
- * igt_buf:
- * @bo: underlying libdrm buffer object
- * @stride: stride of the buffer
- * @tiling: tiling mode bits
- * @compression: memory compression mode
- * @bpp: bits per pixel, 8, 16 or 32.
- * @data: pointer to the memory mapping of the buffer
- * @size: size of the buffer object
- *
- * This is a i-g-t buffer object wrapper structure which augments the baseline
- * libdrm buffer object with suitable data needed by the render/vebox copy and
- * the fill functions.
- */
-struct igt_buf {
- drm_intel_bo *bo;
- uint32_t tiling;
- enum i915_compression compression;
- uint32_t bpp;
- uint32_t yuv_semiplanar_bpp;
- uint32_t *data;
- bool format_is_yuv:1;
- bool format_is_yuv_semiplanar:1;
- struct {
- uint32_t offset;
- uint32_t stride;
- uint32_t size;
- } surface[2];
- struct {
- uint32_t offset;
- uint32_t stride;
- } ccs[2];
- struct {
- uint32_t offset;
- } cc;
- /*< private >*/
- unsigned num_tiles;
-};
-
-static inline bool igt_buf_compressed(const struct igt_buf *buf)
-{
- return buf->compression != I915_COMPRESSION_NONE;
-}
-
-unsigned igt_buf_width(const struct igt_buf *buf);
-unsigned igt_buf_height(const struct igt_buf *buf);
-unsigned int igt_buf_intel_ccs_width(unsigned int gen,
- const struct igt_buf *buf);
-unsigned int igt_buf_intel_ccs_height(unsigned int gen,
- const struct igt_buf *buf);
-
void igt_blitter_src_copy(int fd,
uint64_t ahnd,
uint32_t ctx,
@@ -296,14 +56,6 @@ void igt_blitter_src_copy(int fd,
uint32_t dst_x, uint32_t dst_y,
uint64_t dst_size);
-void igt_blitter_fast_copy(struct intel_batchbuffer *batch,
- const struct igt_buf *src, unsigned src_delta,
- unsigned src_x, unsigned src_y,
- unsigned width, unsigned height,
- int bpp,
- const struct igt_buf *dst, unsigned dst_delta,
- unsigned dst_x, unsigned dst_y);
-
void igt_blitter_fast_copy__raw(int fd,
uint64_t ahnd,
uint32_t ctx,
--
2.34.1
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [igt-dev] ✓ Fi.CI.BAT: success for Remove libdrm remnants in i915 code (rev2)
2022-11-28 16:15 [igt-dev] [PATCH i-g-t v2 0/4] Remove libdrm remnants in i915 code Zbigniew Kempczyński
` (3 preceding siblings ...)
2022-11-28 16:15 ` [igt-dev] [PATCH i-g-t v2 4/4] lib/intel_batchbuffer: Get rid of libdrm batchbuffer Zbigniew Kempczyński
@ 2022-11-28 17:22 ` Patchwork
2022-11-28 22:22 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork
5 siblings, 0 replies; 8+ messages in thread
From: Patchwork @ 2022-11-28 17:22 UTC (permalink / raw)
To: Zbigniew Kempczyński; +Cc: igt-dev
[-- Attachment #1: Type: text/plain, Size: 7670 bytes --]
== Series Details ==
Series: Remove libdrm remnants in i915 code (rev2)
URL : https://patchwork.freedesktop.org/series/111200/
State : success
== Summary ==
CI Bug Log - changes from IGT_7073 -> IGTPW_8161
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/index.html
Participating hosts (34 -> 33)
------------------------------
Additional (3): fi-jsl-1 fi-rkl-11600 fi-tgl-dsi
Missing (4): bat-kbl-2 bat-jsl-3 bat-adlp-4 bat-dg1-5
Known issues
------------
Here are the changes found in IGTPW_8161 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@debugfs_test@basic-hwmon:
- fi-rkl-11600: NOTRUN -> [SKIP][1] ([i915#7456])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/fi-rkl-11600/igt@debugfs_test@basic-hwmon.html
* igt@gem_exec_suspend@basic-s0@smem:
- fi-cml-u2: [PASS][2] -> [DMESG-WARN][3] ([i915#5122])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7073/fi-cml-u2/igt@gem_exec_suspend@basic-s0@smem.html
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/fi-cml-u2/igt@gem_exec_suspend@basic-s0@smem.html
* igt@gem_huc_copy@huc-copy:
- fi-rkl-11600: NOTRUN -> [SKIP][4] ([i915#2190])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/fi-rkl-11600/igt@gem_huc_copy@huc-copy.html
* igt@gem_lmem_swapping@parallel-random-engines:
- fi-rkl-11600: NOTRUN -> [SKIP][5] ([i915#4613]) +3 similar issues
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/fi-rkl-11600/igt@gem_lmem_swapping@parallel-random-engines.html
* igt@gem_tiled_pread_basic:
- fi-rkl-11600: NOTRUN -> [SKIP][6] ([i915#3282])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/fi-rkl-11600/igt@gem_tiled_pread_basic.html
* igt@i915_pm_backlight@basic-brightness:
- fi-rkl-11600: NOTRUN -> [SKIP][7] ([i915#7561])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/fi-rkl-11600/igt@i915_pm_backlight@basic-brightness.html
* igt@i915_suspend@basic-s3-without-i915:
- fi-rkl-11600: NOTRUN -> [INCOMPLETE][8] ([i915#4817])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/fi-rkl-11600/igt@i915_suspend@basic-s3-without-i915.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-rkl-11600: NOTRUN -> [SKIP][9] ([fdo#111827]) +7 similar issues
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/fi-rkl-11600/igt@kms_chamelium@hdmi-hpd-fast.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor:
- fi-rkl-11600: NOTRUN -> [SKIP][10] ([i915#4103])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/fi-rkl-11600/igt@kms_cursor_legacy@basic-busy-flip-before-cursor.html
* igt@kms_force_connector_basic@force-load-detect:
- fi-rkl-11600: NOTRUN -> [SKIP][11] ([fdo#109285] / [i915#4098])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/fi-rkl-11600/igt@kms_force_connector_basic@force-load-detect.html
* igt@kms_psr@sprite_plane_onoff:
- fi-rkl-11600: NOTRUN -> [SKIP][12] ([i915#1072]) +3 similar issues
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/fi-rkl-11600/igt@kms_psr@sprite_plane_onoff.html
* igt@kms_setmode@basic-clone-single-crtc:
- fi-rkl-11600: NOTRUN -> [SKIP][13] ([i915#3555] / [i915#4098])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/fi-rkl-11600/igt@kms_setmode@basic-clone-single-crtc.html
* igt@prime_vgem@basic-read:
- fi-rkl-11600: NOTRUN -> [SKIP][14] ([fdo#109295] / [i915#3291] / [i915#3708]) +2 similar issues
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/fi-rkl-11600/igt@prime_vgem@basic-read.html
* igt@prime_vgem@basic-userptr:
- fi-rkl-11600: NOTRUN -> [SKIP][15] ([fdo#109295] / [i915#3301] / [i915#3708])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/fi-rkl-11600/igt@prime_vgem@basic-userptr.html
* igt@runner@aborted:
- fi-cml-u2: NOTRUN -> [FAIL][16] ([i915#4312])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/fi-cml-u2/igt@runner@aborted.html
#### Possible fixes ####
* igt@gem_exec_suspend@basic-s3@smem:
- {bat-rplp-1}: [DMESG-WARN][17] ([i915#2867]) -> [PASS][18]
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7073/bat-rplp-1/igt@gem_exec_suspend@basic-s3@smem.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/bat-rplp-1/igt@gem_exec_suspend@basic-s3@smem.html
* igt@i915_selftest@live@requests:
- {bat-rpls-1}: [INCOMPLETE][19] ([i915#4983] / [i915#6257]) -> [PASS][20]
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7073/bat-rpls-1/igt@i915_selftest@live@requests.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/bat-rpls-1/igt@i915_selftest@live@requests.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1759]: https://gitlab.freedesktop.org/drm/intel/issues/1759
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
[i915#2867]: https://gitlab.freedesktop.org/drm/intel/issues/2867
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
[i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4817]: https://gitlab.freedesktop.org/drm/intel/issues/4817
[i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
[i915#5122]: https://gitlab.freedesktop.org/drm/intel/issues/5122
[i915#5278]: https://gitlab.freedesktop.org/drm/intel/issues/5278
[i915#6257]: https://gitlab.freedesktop.org/drm/intel/issues/6257
[i915#6687]: https://gitlab.freedesktop.org/drm/intel/issues/6687
[i915#7349]: https://gitlab.freedesktop.org/drm/intel/issues/7349
[i915#7456]: https://gitlab.freedesktop.org/drm/intel/issues/7456
[i915#7561]: https://gitlab.freedesktop.org/drm/intel/issues/7561
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_7073 -> IGTPW_8161
CI-20190529: 20190529
CI_DRM_12439: 1e78c0412b6cc27f0b0e3773377011966757ac38 @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_8161: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/index.html
IGT_7073: d021d66e389f4a759dc749b5f74f278ecd2e6cbf @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/index.html
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^ permalink raw reply [flat|nested] 8+ messages in thread
* [igt-dev] ✗ Fi.CI.IGT: failure for Remove libdrm remnants in i915 code (rev2)
2022-11-28 16:15 [igt-dev] [PATCH i-g-t v2 0/4] Remove libdrm remnants in i915 code Zbigniew Kempczyński
` (4 preceding siblings ...)
2022-11-28 17:22 ` [igt-dev] ✓ Fi.CI.BAT: success for Remove libdrm remnants in i915 code (rev2) Patchwork
@ 2022-11-28 22:22 ` Patchwork
2022-11-29 7:17 ` Zbigniew Kempczyński
5 siblings, 1 reply; 8+ messages in thread
From: Patchwork @ 2022-11-28 22:22 UTC (permalink / raw)
To: Zbigniew Kempczyński; +Cc: igt-dev
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== Series Details ==
Series: Remove libdrm remnants in i915 code (rev2)
URL : https://patchwork.freedesktop.org/series/111200/
State : failure
== Summary ==
CI Bug Log - changes from IGT_7073_full -> IGTPW_8161_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with IGTPW_8161_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in IGTPW_8161_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/index.html
Participating hosts (8 -> 8)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in IGTPW_8161_full:
### IGT changes ###
#### Possible regressions ####
* igt@gem_partial_pwrite_pread@writes-after-reads:
- shard-apl: [PASS][1] -> [INCOMPLETE][2] +1 similar issue
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7073/shard-apl2/igt@gem_partial_pwrite_pread@writes-after-reads.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-apl2/igt@gem_partial_pwrite_pread@writes-after-reads.html
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@kms_cursor_crc@cursor-random-256x256@pipe-d-hdmi-a-4:
- {shard-dg1}: [PASS][3] -> [FAIL][4] +3 similar issues
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7073/shard-dg1-15/igt@kms_cursor_crc@cursor-random-256x256@pipe-d-hdmi-a-4.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-dg1-13/igt@kms_cursor_crc@cursor-random-256x256@pipe-d-hdmi-a-4.html
Known issues
------------
Here are the changes found in IGTPW_8161_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_create@create-massive:
- shard-apl: NOTRUN -> [DMESG-WARN][5] ([i915#4991])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-apl1/igt@gem_create@create-massive.html
- shard-tglb: NOTRUN -> [DMESG-WARN][6] ([i915#4991])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-tglb8/igt@gem_create@create-massive.html
- shard-iclb: NOTRUN -> [DMESG-WARN][7] ([i915#4991])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-iclb1/igt@gem_create@create-massive.html
* igt@gem_exec_balancer@parallel:
- shard-iclb: [PASS][8] -> [SKIP][9] ([i915#4525]) +1 similar issue
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7073/shard-iclb1/igt@gem_exec_balancer@parallel.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-iclb5/igt@gem_exec_balancer@parallel.html
* igt@gem_exec_balancer@parallel-ordering:
- shard-tglb: NOTRUN -> [FAIL][10] ([i915#6117])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-tglb7/igt@gem_exec_balancer@parallel-ordering.html
- shard-iclb: NOTRUN -> [FAIL][11] ([i915#6117])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-iclb2/igt@gem_exec_balancer@parallel-ordering.html
* igt@gem_lmem_swapping@heavy-verify-random-ccs:
- shard-tglb: NOTRUN -> [SKIP][12] ([i915#4613]) +1 similar issue
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-tglb1/igt@gem_lmem_swapping@heavy-verify-random-ccs.html
* igt@gem_lmem_swapping@massive-random:
- shard-iclb: NOTRUN -> [SKIP][13] ([i915#4613])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-iclb2/igt@gem_lmem_swapping@massive-random.html
* igt@gem_lmem_swapping@parallel-random-verify-ccs:
- shard-apl: NOTRUN -> [SKIP][14] ([fdo#109271] / [i915#4613]) +1 similar issue
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-apl8/igt@gem_lmem_swapping@parallel-random-verify-ccs.html
* igt@gem_pxp@fail-invalid-protected-context:
- shard-iclb: NOTRUN -> [SKIP][15] ([i915#4270])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-iclb7/igt@gem_pxp@fail-invalid-protected-context.html
* igt@gem_pxp@reject-modify-context-protection-off-1:
- shard-tglb: NOTRUN -> [SKIP][16] ([i915#4270]) +3 similar issues
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-tglb3/igt@gem_pxp@reject-modify-context-protection-off-1.html
* igt@gem_userptr_blits@coherency-sync:
- shard-iclb: NOTRUN -> [SKIP][17] ([fdo#109290])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-iclb7/igt@gem_userptr_blits@coherency-sync.html
- shard-tglb: NOTRUN -> [SKIP][18] ([fdo#110542])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-tglb7/igt@gem_userptr_blits@coherency-sync.html
* igt@gem_userptr_blits@unsync-overlap:
- shard-iclb: NOTRUN -> [SKIP][19] ([i915#3297])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-iclb6/igt@gem_userptr_blits@unsync-overlap.html
- shard-tglb: NOTRUN -> [SKIP][20] ([i915#3297])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-tglb3/igt@gem_userptr_blits@unsync-overlap.html
* igt@gen3_render_linear_blits:
- shard-iclb: NOTRUN -> [SKIP][21] ([fdo#109289])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-iclb2/igt@gen3_render_linear_blits.html
- shard-tglb: NOTRUN -> [SKIP][22] ([fdo#109289])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-tglb7/igt@gen3_render_linear_blits.html
* igt@gen9_exec_parse@shadow-peek:
- shard-iclb: NOTRUN -> [SKIP][23] ([i915#2856])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-iclb7/igt@gen9_exec_parse@shadow-peek.html
* igt@i915_pm_dc@dc6-dpms:
- shard-tglb: NOTRUN -> [FAIL][24] ([i915#3989] / [i915#454])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-tglb3/igt@i915_pm_dc@dc6-dpms.html
* igt@i915_pm_lpsp@screens-disabled:
- shard-tglb: NOTRUN -> [SKIP][25] ([i915#1902])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-tglb2/igt@i915_pm_lpsp@screens-disabled.html
* igt@i915_pm_rpm@pc8-residency:
- shard-tglb: NOTRUN -> [SKIP][26] ([fdo#109506] / [i915#2411])
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-tglb8/igt@i915_pm_rpm@pc8-residency.html
* igt@i915_query@hwconfig_table:
- shard-tglb: NOTRUN -> [SKIP][27] ([i915#6245])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-tglb6/igt@i915_query@hwconfig_table.html
* igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip:
- shard-tglb: NOTRUN -> [SKIP][28] ([i915#5286]) +1 similar issue
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-tglb1/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
* igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip:
- shard-iclb: NOTRUN -> [SKIP][29] ([i915#5286])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-iclb3/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
* igt@kms_big_fb@x-tiled-16bpp-rotate-90:
- shard-iclb: NOTRUN -> [SKIP][30] ([fdo#110725] / [fdo#111614]) +1 similar issue
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-iclb6/igt@kms_big_fb@x-tiled-16bpp-rotate-90.html
* igt@kms_big_fb@y-tiled-8bpp-rotate-270:
- shard-tglb: NOTRUN -> [SKIP][31] ([fdo#111614]) +1 similar issue
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-tglb3/igt@kms_big_fb@y-tiled-8bpp-rotate-270.html
* igt@kms_big_fb@yf-tiled-8bpp-rotate-180:
- shard-iclb: NOTRUN -> [SKIP][32] ([fdo#110723])
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-iclb8/igt@kms_big_fb@yf-tiled-8bpp-rotate-180.html
- shard-tglb: NOTRUN -> [SKIP][33] ([fdo#111615])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-tglb3/igt@kms_big_fb@yf-tiled-8bpp-rotate-180.html
* igt@kms_ccs@pipe-a-bad-rotation-90-y_tiled_gen12_rc_ccs_cc:
- shard-apl: NOTRUN -> [SKIP][34] ([fdo#109271] / [i915#3886]) +3 similar issues
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-apl2/igt@kms_ccs@pipe-a-bad-rotation-90-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-a-ccs-on-another-bo-yf_tiled_ccs:
- shard-tglb: NOTRUN -> [SKIP][35] ([fdo#111615] / [i915#3689]) +3 similar issues
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-tglb8/igt@kms_ccs@pipe-a-ccs-on-another-bo-yf_tiled_ccs.html
* igt@kms_ccs@pipe-a-crc-sprite-planes-basic-y_tiled_gen12_rc_ccs:
- shard-iclb: NOTRUN -> [SKIP][36] ([fdo#109278]) +8 similar issues
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-iclb8/igt@kms_ccs@pipe-a-crc-sprite-planes-basic-y_tiled_gen12_rc_ccs.html
* igt@kms_ccs@pipe-b-bad-rotation-90-4_tiled_dg2_mc_ccs:
- shard-tglb: NOTRUN -> [SKIP][37] ([i915#6095]) +3 similar issues
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-tglb3/igt@kms_ccs@pipe-b-bad-rotation-90-4_tiled_dg2_mc_ccs.html
* igt@kms_ccs@pipe-b-crc-primary-basic-y_tiled_gen12_rc_ccs_cc:
- shard-iclb: NOTRUN -> [SKIP][38] ([fdo#109278] / [i915#3886]) +2 similar issues
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-iclb2/igt@kms_ccs@pipe-b-crc-primary-basic-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-b-crc-primary-rotation-180-4_tiled_dg2_rc_ccs:
- shard-tglb: NOTRUN -> [SKIP][39] ([i915#3689] / [i915#6095]) +3 similar issues
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-tglb5/igt@kms_ccs@pipe-b-crc-primary-rotation-180-4_tiled_dg2_rc_ccs.html
* igt@kms_ccs@pipe-c-bad-rotation-90-y_tiled_gen12_mc_ccs:
- shard-tglb: NOTRUN -> [SKIP][40] ([i915#3689] / [i915#3886])
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-tglb7/igt@kms_ccs@pipe-c-bad-rotation-90-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-d-bad-rotation-90-4_tiled_dg2_rc_ccs:
- shard-tglb: NOTRUN -> [SKIP][41] ([i915#3689]) +4 similar issues
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-tglb2/igt@kms_ccs@pipe-d-bad-rotation-90-4_tiled_dg2_rc_ccs.html
* igt@kms_cdclk@plane-scaling:
- shard-tglb: NOTRUN -> [SKIP][42] ([i915#3742])
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-tglb2/igt@kms_cdclk@plane-scaling.html
* igt@kms_chamelium@dp-crc-single:
- shard-apl: NOTRUN -> [SKIP][43] ([fdo#109271] / [fdo#111827]) +3 similar issues
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-apl3/igt@kms_chamelium@dp-crc-single.html
* igt@kms_chamelium@hdmi-crc-multiple:
- shard-iclb: NOTRUN -> [SKIP][44] ([fdo#109284] / [fdo#111827]) +1 similar issue
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-iclb2/igt@kms_chamelium@hdmi-crc-multiple.html
* igt@kms_chamelium@hdmi-hpd-storm-disable:
- shard-tglb: NOTRUN -> [SKIP][45] ([fdo#109284] / [fdo#111827]) +5 similar issues
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-tglb5/igt@kms_chamelium@hdmi-hpd-storm-disable.html
* igt@kms_color@ctm-0-75@pipe-a-edp-1:
- shard-iclb: NOTRUN -> [FAIL][46] ([i915#315] / [i915#6946]) +2 similar issues
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-iclb5/igt@kms_color@ctm-0-75@pipe-a-edp-1.html
* igt@kms_color@ctm-0-75@pipe-c-edp-1:
- shard-tglb: NOTRUN -> [FAIL][47] ([i915#315] / [i915#6946]) +3 similar issues
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-tglb6/igt@kms_color@ctm-0-75@pipe-c-edp-1.html
* igt@kms_content_protection@uevent:
- shard-iclb: NOTRUN -> [SKIP][48] ([i915#7118])
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-iclb5/igt@kms_content_protection@uevent.html
- shard-tglb: NOTRUN -> [SKIP][49] ([i915#6944] / [i915#7118])
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-tglb6/igt@kms_content_protection@uevent.html
* igt@kms_content_protection@uevent@pipe-a-dp-1:
- shard-apl: NOTRUN -> [FAIL][50] ([i915#1339])
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-apl6/igt@kms_content_protection@uevent@pipe-a-dp-1.html
* igt@kms_cursor_crc@cursor-random-32x32:
- shard-tglb: NOTRUN -> [SKIP][51] ([i915#3555]) +3 similar issues
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-tglb5/igt@kms_cursor_crc@cursor-random-32x32.html
* igt@kms_cursor_legacy@cursor-vs-flip@legacy:
- shard-iclb: [PASS][52] -> [FAIL][53] ([i915#5072])
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7073/shard-iclb8/igt@kms_cursor_legacy@cursor-vs-flip@legacy.html
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-iclb7/igt@kms_cursor_legacy@cursor-vs-flip@legacy.html
* igt@kms_cursor_legacy@cursorb-vs-flipb@atomic:
- shard-tglb: NOTRUN -> [SKIP][54] ([fdo#109274] / [fdo#111825]) +12 similar issues
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-tglb5/igt@kms_cursor_legacy@cursorb-vs-flipb@atomic.html
* igt@kms_display_modes@extended-mode-basic:
- shard-tglb: NOTRUN -> [SKIP][55] ([fdo#109274])
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-tglb2/igt@kms_display_modes@extended-mode-basic.html
* igt@kms_dp_tiled_display@basic-test-pattern-with-chamelium:
- shard-tglb: NOTRUN -> [SKIP][56] ([i915#3528])
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-tglb6/igt@kms_dp_tiled_display@basic-test-pattern-with-chamelium.html
* igt@kms_dsc@dsc-with-bpc-formats:
- shard-iclb: NOTRUN -> [SKIP][57] ([i915#3840])
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-iclb2/igt@kms_dsc@dsc-with-bpc-formats.html
- shard-apl: NOTRUN -> [SKIP][58] ([fdo#109271] / [i915#7205])
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-apl8/igt@kms_dsc@dsc-with-bpc-formats.html
* igt@kms_flip@2x-flip-vs-panning-interruptible:
- shard-tglb: NOTRUN -> [SKIP][59] ([fdo#109274] / [fdo#111825] / [i915#3637]) +1 similar issue
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-tglb2/igt@kms_flip@2x-flip-vs-panning-interruptible.html
* igt@kms_flip@2x-flip-vs-wf_vblank-interruptible:
- shard-iclb: NOTRUN -> [SKIP][60] ([fdo#109274]) +14 similar issues
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-iclb1/igt@kms_flip@2x-flip-vs-wf_vblank-interruptible.html
* igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-valid-mode:
- shard-tglb: NOTRUN -> [SKIP][61] ([i915#2587] / [i915#2672]) +1 similar issue
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-tglb1/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling@pipe-a-default-mode:
- shard-iclb: NOTRUN -> [SKIP][62] ([i915#6375])
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-iclb2/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling@pipe-a-default-mode:
- shard-iclb: NOTRUN -> [SKIP][63] ([i915#2672]) +1 similar issue
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-iclb2/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling@pipe-a-valid-mode:
- shard-iclb: NOTRUN -> [SKIP][64] ([i915#2587] / [i915#2672]) +8 similar issues
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-iclb5/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-16bpp-xtile-downscaling@pipe-a-default-mode:
- shard-iclb: NOTRUN -> [SKIP][65] ([i915#3555]) +2 similar issues
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-iclb2/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-16bpp-xtile-downscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-default-mode:
- shard-iclb: NOTRUN -> [SKIP][66] ([i915#2672] / [i915#3555])
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-iclb2/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-default-mode.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-plflip-blt:
- shard-tglb: NOTRUN -> [SKIP][67] ([i915#6497]) +6 similar issues
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-tglb2/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-cpu:
- shard-apl: NOTRUN -> [SKIP][68] ([fdo#109271]) +85 similar issues
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-apl3/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-draw-render:
- shard-tglb: NOTRUN -> [SKIP][69] ([fdo#109280] / [fdo#111825]) +19 similar issues
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-tglb2/igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-move:
- shard-iclb: NOTRUN -> [SKIP][70] ([fdo#109280]) +11 similar issues
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-iclb1/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-move.html
* igt@kms_plane_lowres@tiling-none@pipe-a-edp-1:
- shard-iclb: NOTRUN -> [SKIP][71] ([i915#3536]) +2 similar issues
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-iclb2/igt@kms_plane_lowres@tiling-none@pipe-a-edp-1.html
* igt@kms_plane_lowres@tiling-none@pipe-c-edp-1:
- shard-tglb: NOTRUN -> [SKIP][72] ([i915#3536]) +3 similar issues
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-tglb2/igt@kms_plane_lowres@tiling-none@pipe-c-edp-1.html
* igt@kms_plane_scaling@plane-downscale-with-rotation-factor-0-25@pipe-c-edp-1:
- shard-tglb: NOTRUN -> [SKIP][73] ([i915#5176]) +3 similar issues
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-tglb5/igt@kms_plane_scaling@plane-downscale-with-rotation-factor-0-25@pipe-c-edp-1.html
- shard-iclb: NOTRUN -> [SKIP][74] ([i915#5176]) +2 similar issues
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-iclb1/igt@kms_plane_scaling@plane-downscale-with-rotation-factor-0-25@pipe-c-edp-1.html
* igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area:
- shard-tglb: NOTRUN -> [SKIP][75] ([i915#2920])
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-tglb6/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area.html
* igt@kms_psr2_su@page_flip-p010:
- shard-iclb: NOTRUN -> [SKIP][76] ([fdo#109642] / [fdo#111068] / [i915#658])
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-iclb8/igt@kms_psr2_su@page_flip-p010.html
* igt@kms_psr@psr2_basic:
- shard-tglb: NOTRUN -> [FAIL][77] ([i915#132] / [i915#3467]) +1 similar issue
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-tglb3/igt@kms_psr@psr2_basic.html
- shard-iclb: NOTRUN -> [SKIP][78] ([fdo#109441])
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-iclb8/igt@kms_psr@psr2_basic.html
* igt@kms_psr@psr2_sprite_mmap_cpu:
- shard-iclb: [PASS][79] -> [SKIP][80] ([fdo#109441]) +1 similar issue
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7073/shard-iclb2/igt@kms_psr@psr2_sprite_mmap_cpu.html
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-iclb1/igt@kms_psr@psr2_sprite_mmap_cpu.html
* igt@kms_writeback@writeback-fb-id:
- shard-tglb: NOTRUN -> [SKIP][81] ([i915#2437]) +1 similar issue
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-tglb2/igt@kms_writeback@writeback-fb-id.html
- shard-iclb: NOTRUN -> [SKIP][82] ([i915#2437])
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-iclb2/igt@kms_writeback@writeback-fb-id.html
- shard-apl: NOTRUN -> [SKIP][83] ([fdo#109271] / [i915#2437])
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-apl6/igt@kms_writeback@writeback-fb-id.html
* igt@perf_pmu@event-wait@rcs0:
- shard-iclb: NOTRUN -> [SKIP][84] ([fdo#112283])
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-iclb8/igt@perf_pmu@event-wait@rcs0.html
- shard-tglb: NOTRUN -> [SKIP][85] ([fdo#112283])
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-tglb5/igt@perf_pmu@event-wait@rcs0.html
* igt@sysfs_clients@fair-0:
- shard-apl: NOTRUN -> [SKIP][86] ([fdo#109271] / [i915#2994])
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-apl8/igt@sysfs_clients@fair-0.html
- shard-tglb: NOTRUN -> [SKIP][87] ([i915#2994]) +1 similar issue
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-tglb8/igt@sysfs_clients@fair-0.html
- shard-iclb: NOTRUN -> [SKIP][88] ([i915#2994])
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-iclb3/igt@sysfs_clients@fair-0.html
#### Possible fixes ####
* igt@feature_discovery@psr2:
- shard-iclb: [SKIP][89] ([i915#658]) -> [PASS][90]
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7073/shard-iclb7/igt@feature_discovery@psr2.html
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-iclb2/igt@feature_discovery@psr2.html
* igt@gem_eio@in-flight-suspend:
- {shard-rkl}: [FAIL][91] ([fdo#103375]) -> [PASS][92]
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7073/shard-rkl-4/igt@gem_eio@in-flight-suspend.html
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-rkl-5/igt@gem_eio@in-flight-suspend.html
* igt@gem_exec_balancer@parallel-keep-in-fence:
- shard-iclb: [SKIP][93] ([i915#4525]) -> [PASS][94] +1 similar issue
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7073/shard-iclb3/igt@gem_exec_balancer@parallel-keep-in-fence.html
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-iclb2/igt@gem_exec_balancer@parallel-keep-in-fence.html
* igt@gem_exec_fair@basic-flow@rcs0:
- shard-tglb: [FAIL][95] ([i915#2842]) -> [PASS][96]
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7073/shard-tglb2/igt@gem_exec_fair@basic-flow@rcs0.html
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-tglb3/igt@gem_exec_fair@basic-flow@rcs0.html
* igt@gem_exec_fair@basic-none-solo@rcs0:
- shard-apl: [FAIL][97] ([i915#2842]) -> [PASS][98] +1 similar issue
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7073/shard-apl8/igt@gem_exec_fair@basic-none-solo@rcs0.html
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-apl8/igt@gem_exec_fair@basic-none-solo@rcs0.html
* igt@gem_exec_reloc@basic-wc-read-noreloc:
- {shard-rkl}: [SKIP][99] ([i915#3281]) -> [PASS][100] +9 similar issues
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7073/shard-rkl-6/igt@gem_exec_reloc@basic-wc-read-noreloc.html
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-rkl-5/igt@gem_exec_reloc@basic-wc-read-noreloc.html
* igt@gem_huc_copy@huc-copy:
- shard-tglb: [SKIP][101] ([i915#2190]) -> [PASS][102]
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7073/shard-tglb6/igt@gem_huc_copy@huc-copy.html
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-tglb2/igt@gem_huc_copy@huc-copy.html
* igt@gem_partial_pwrite_pread@write-display:
- {shard-rkl}: [SKIP][103] ([i915#3282]) -> [PASS][104] +1 similar issue
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7073/shard-rkl-1/igt@gem_partial_pwrite_pread@write-display.html
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-rkl-5/igt@gem_partial_pwrite_pread@write-display.html
* igt@gem_softpin@evict-single-offset:
- shard-iclb: [FAIL][105] ([i915#4171]) -> [PASS][106]
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7073/shard-iclb5/igt@gem_softpin@evict-single-offset.html
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-iclb3/igt@gem_softpin@evict-single-offset.html
* igt@gen9_exec_parse@bb-start-far:
- {shard-rkl}: [SKIP][107] ([i915#2527]) -> [PASS][108] +2 similar issues
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7073/shard-rkl-4/igt@gen9_exec_parse@bb-start-far.html
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-rkl-5/igt@gen9_exec_parse@bb-start-far.html
* igt@i915_hangman@engine-engine-error@bcs0:
- {shard-rkl}: [SKIP][109] ([i915#6258]) -> [PASS][110]
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7073/shard-rkl-5/igt@i915_hangman@engine-engine-error@bcs0.html
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-rkl-1/igt@i915_hangman@engine-engine-error@bcs0.html
* igt@i915_pm_dc@dc6-dpms:
- shard-iclb: [FAIL][111] ([i915#3989] / [i915#454]) -> [PASS][112] +1 similar issue
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7073/shard-iclb3/igt@i915_pm_dc@dc6-dpms.html
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-iclb8/igt@i915_pm_dc@dc6-dpms.html
* igt@i915_pm_rc6_residency@rc6-idle@vcs0:
- {shard-rkl}: [WARN][113] ([i915#2681]) -> [PASS][114]
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7073/shard-rkl-5/igt@i915_pm_rc6_residency@rc6-idle@vcs0.html
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-rkl-1/igt@i915_pm_rc6_residency@rc6-idle@vcs0.html
* igt@i915_pm_rpm@dpms-lpsp:
- shard-tglb: [INCOMPLETE][115] ([i915#2411]) -> [PASS][116]
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7073/shard-tglb6/igt@i915_pm_rpm@dpms-lpsp.html
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-tglb3/igt@i915_pm_rpm@dpms-lpsp.html
* igt@i915_pm_rpm@fences-dpms:
- {shard-rkl}: [SKIP][117] ([i915#1849]) -> [PASS][118]
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7073/shard-rkl-5/igt@i915_pm_rpm@fences-dpms.html
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-rkl-6/igt@i915_pm_rpm@fences-dpms.html
* igt@i915_pm_rps@engine-order:
- {shard-rkl}: [FAIL][119] ([i915#6537]) -> [PASS][120]
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7073/shard-rkl-5/igt@i915_pm_rps@engine-order.html
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-rkl-1/igt@i915_pm_rps@engine-order.html
* igt@i915_pm_sseu@full-enable:
- {shard-rkl}: [SKIP][121] ([i915#4387]) -> [PASS][122]
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7073/shard-rkl-4/igt@i915_pm_sseu@full-enable.html
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-rkl-5/igt@i915_pm_sseu@full-enable.html
* igt@kms_big_fb@y-tiled-16bpp-rotate-180:
- shard-iclb: [FAIL][123] ([i915#5138]) -> [PASS][124]
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7073/shard-iclb2/igt@kms_big_fb@y-tiled-16bpp-rotate-180.html
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-iclb6/igt@kms_big_fb@y-tiled-16bpp-rotate-180.html
* igt@kms_dp_aux_dev:
- {shard-rkl}: [SKIP][125] ([i915#1257]) -> [PASS][126]
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7073/shard-rkl-4/igt@kms_dp_aux_dev.html
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-rkl-6/igt@kms_dp_aux_dev.html
* igt@kms_flip_scaled_crc@flip-64bpp-linear-to-16bpp-linear-downscaling@pipe-a-default-mode:
- shard-iclb: [SKIP][127] ([i915#3555]) -> [PASS][128]
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7073/shard-iclb2/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-16bpp-linear-downscaling@pipe-a-default-mode.html
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-iclb3/igt@kms_flip_scaled_crc@flip-64bpp-linear-to-16bpp-linear-downscaling@pipe-a-default-mode.html
* igt@kms_frontbuffer_tracking@psr-1p-rte:
- {shard-rkl}: [SKIP][129] ([i915#1849] / [i915#4098]) -> [PASS][130] +9 similar issues
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7073/shard-rkl-5/igt@kms_frontbuffer_tracking@psr-1p-rte.html
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-1p-rte.html
* igt@kms_plane@plane-panning-bottom-right@pipe-a-planes:
- {shard-rkl}: [SKIP][131] ([i915#3558]) -> [PASS][132] +1 similar issue
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7073/shard-rkl-4/igt@kms_plane@plane-panning-bottom-right@pipe-a-planes.html
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-rkl-6/igt@kms_plane@plane-panning-bottom-right@pipe-a-planes.html
* igt@kms_plane_scaling@plane-downscale-with-pixel-format-factor-0-5@pipe-b-edp-1:
- shard-iclb: [SKIP][133] ([i915#5176]) -> [PASS][134] +4 similar issues
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7073/shard-iclb2/igt@kms_plane_scaling@plane-downscale-with-pixel-format-factor-0-5@pipe-b-edp-1.html
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-iclb5/igt@kms_plane_scaling@plane-downscale-with-pixel-format-factor-0-5@pipe-b-edp-1.html
* igt@kms_psr@cursor_render:
- {shard-rkl}: [SKIP][135] ([i915#1072]) -> [PASS][136] +1 similar issue
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7073/shard-rkl-1/igt@kms_psr@cursor_render.html
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-rkl-6/igt@kms_psr@cursor_render.html
* igt@kms_psr@psr2_sprite_render:
- shard-iclb: [SKIP][137] ([fdo#109441]) -> [PASS][138] +3 similar issues
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7073/shard-iclb5/igt@kms_psr@psr2_sprite_render.html
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-iclb2/igt@kms_psr@psr2_sprite_render.html
* igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
- shard-iclb: [SKIP][139] ([i915#5519]) -> [PASS][140]
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7073/shard-iclb6/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-iclb2/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
* igt@kms_universal_plane@disable-primary-vs-flip-pipe-b:
- {shard-rkl}: [SKIP][141] ([i915#1845] / [i915#4070] / [i915#4098]) -> [PASS][142]
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7073/shard-rkl-1/igt@kms_universal_plane@disable-primary-vs-flip-pipe-b.html
[142]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-rkl-6/igt@kms_universal_plane@disable-primary-vs-flip-pipe-b.html
* igt@kms_vblank@pipe-b-wait-idle-hang:
- {shard-rkl}: [SKIP][143] ([i915#1845] / [i915#4098]) -> [PASS][144] +10 similar issues
[143]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7073/shard-rkl-5/igt@kms_vblank@pipe-b-wait-idle-hang.html
[144]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-rkl-6/igt@kms_vblank@pipe-b-wait-idle-hang.html
* igt@perf@gen8-unprivileged-single-ctx-counters:
- {shard-rkl}: [SKIP][145] ([i915#2436]) -> [PASS][146]
[145]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7073/shard-rkl-1/igt@perf@gen8-unprivileged-single-ctx-counters.html
[146]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-rkl-5/igt@perf@gen8-unprivileged-single-ctx-counters.html
* igt@perf@mi-rpc:
- {shard-rkl}: [SKIP][147] ([i915#2434]) -> [PASS][148]
[147]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7073/shard-rkl-1/igt@perf@mi-rpc.html
[148]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-rkl-5/igt@perf@mi-rpc.html
* igt@sysfs_heartbeat_interval@precise@rcs0:
- {shard-dg1}: [FAIL][149] ([i915#1755]) -> [PASS][150] +1 similar issue
[149]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7073/shard-dg1-19/igt@sysfs_heartbeat_interval@precise@rcs0.html
[150]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-dg1-19/igt@sysfs_heartbeat_interval@precise@rcs0.html
#### Warnings ####
* igt@gem_pwrite@basic-exhaustion:
- shard-tglb: [INCOMPLETE][151] ([i915#7248]) -> [WARN][152] ([i915#2658])
[151]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7073/shard-tglb7/igt@gem_pwrite@basic-exhaustion.html
[152]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-tglb6/igt@gem_pwrite@basic-exhaustion.html
* igt@kms_psr2_sf@cursor-plane-update-sf:
- shard-iclb: [SKIP][153] ([i915#2920]) -> [SKIP][154] ([fdo#111068] / [i915#658])
[153]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7073/shard-iclb2/igt@kms_psr2_sf@cursor-plane-update-sf.html
[154]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-iclb3/igt@kms_psr2_sf@cursor-plane-update-sf.html
* igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-sf:
- shard-iclb: [SKIP][155] ([i915#2920]) -> [SKIP][156] ([i915#658])
[155]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7073/shard-iclb2/igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-sf.html
[156]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-iclb1/igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-sf.html
* igt@kms_psr2_sf@overlay-plane-move-continuous-sf:
- shard-iclb: [SKIP][157] ([i915#658]) -> [SKIP][158] ([i915#2920])
[157]: https://intel-gfx-ci.01.org/tree/drm-tip/IGT_7073/shard-iclb7/igt@kms_psr2_sf@overlay-plane-move-continuous-sf.html
[158]: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/shard-iclb2/igt@kms_psr2_sf@overlay-plane-move-continuous-sf.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109283]: https://bugs.freedesktop.org/show_bug.cgi?id=109283
[fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109290]: https://bugs.freedesktop.org/show_bug.cgi?id=109290
[fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[fdo#109307]: https://bugs.freedesktop.org/show_bug.cgi?id=109307
[fdo#109308]: https://bugs.freedesktop.org/show_bug.cgi?id=109308
[fdo#109309]: https://bugs.freedesktop.org/show_bug.cgi?id=109309
[fdo#109314]: https://bugs.freedesktop.org/show_bug.cgi?id=109314
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
[fdo#110542]: https://bugs.freedesktop.org/show_bug.cgi?id=110542
[fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723
[fdo#110725]: https://bugs.freedesktop.org/show_bug.cgi?id=110725
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
[fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
[fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[fdo#112054]: https://bugs.freedesktop.org/show_bug.cgi?id=112054
[fdo#112283]: https://bugs.freedesktop.org/show_bug.cgi?id=112283
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1257]: https://gitlab.freedesktop.org/drm/intel/issues/1257
[i915#132]: https://gitlab.freedesktop.org/drm/intel/issues/132
[i915#1339]: https://gitlab.freedesktop.org/drm/intel/issues/1339
[i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
[i915#1755]: https://gitlab.freedesktop.org/drm/intel/issues/1755
[i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825
[i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
[i915#1850]: https://gitlab.freedesktop.org/drm/intel/issues/1850
[i915#1902]: https://gitlab.freedesktop.org/drm/intel/issues/1902
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2411]: https://gitlab.freedesktop.org/drm/intel/issues/2411
[i915#2434]: https://gitlab.freedesktop.org/drm/intel/issues/2434
[i915#2436]: https://gitlab.freedesktop.org/drm/intel/issues/2436
[i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
[i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
[i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
[i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
[i915#2658]: https://gitlab.freedesktop.org/drm/intel/issues/2658
[i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
[i915#2681]: https://gitlab.freedesktop.org/drm/intel/issues/2681
[i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705
[i915#280]: https://gitlab.freedesktop.org/drm/intel/issues/280
[i915#284]: https://gitlab.freedesktop.org/drm/intel/issues/284
[i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
[i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
[i915#2920]: https://gitlab.freedesktop.org/drm/intel/issues/2920
[i915#2994]: https://gitlab.freedesktop.org/drm/intel/issues/2994
[i915#3116]: https://gitlab.freedesktop.org/drm/intel/issues/3116
[i915#315]: https://gitlab.freedesktop.org/drm/intel/issues/315
[i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
[i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
[i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
[i915#3361]: https://gitlab.freedesktop.org/drm/intel/issues/3361
[i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
[i915#3467]: https://gitlab.freedesktop.org/drm/intel/issues/3467
[i915#3469]: https://gitlab.freedesktop.org/drm/intel/issues/3469
[i915#3528]: https://gitlab.freedesktop.org/drm/intel/issues/3528
[i915#3536]: https://gitlab.freedesktop.org/drm/intel/issues/3536
[i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
[i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3558]: https://gitlab.freedesktop.org/drm/intel/issues/3558
[i915#3591]: https://gitlab.freedesktop.org/drm/intel/issues/3591
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
[i915#3639]: https://gitlab.freedesktop.org/drm/intel/issues/3639
[i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#3734]: https://gitlab.freedesktop.org/drm/intel/issues/3734
[i915#3742]: https://gitlab.freedesktop.org/drm/intel/issues/3742
[i915#3826]: https://gitlab.freedesktop.org/drm/intel/issues/3826
[i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840
[i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
[i915#3955]: https://gitlab.freedesktop.org/drm/intel/issues/3955
[i915#3989]: https://gitlab.freedesktop.org/drm/intel/issues/3989
[i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
[i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
[i915#4171]: https://gitlab.freedesktop.org/drm/intel/issues/4171
[i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
[i915#426]: https://gitlab.freedesktop.org/drm/intel/issues/426
[i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
[i915#4387]: https://gitlab.freedesktop.org/drm/intel/issues/4387
[i915#4525]: https://gitlab.freedesktop.org/drm/intel/issues/4525
[i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
[i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
[i915#4565]: https://gitlab.freedesktop.org/drm/intel/issues/4565
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4812]: https://gitlab.freedesktop.org/drm/intel/issues/4812
[i915#4833]: https://gitlab.freedesktop.org/drm/intel/issues/4833
[i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852
[i915#4859]: https://gitlab.freedesktop.org/drm/intel/issues/4859
[i915#4860]: https://gitlab.freedesktop.org/drm/intel/issues/4860
[i915#4877]: https://gitlab.freedesktop.org/drm/intel/issues/4877
[i915#4879]: https://gitlab.freedesktop.org/drm/intel/issues/4879
[i915#4991]: https://gitlab.freedesktop.org/drm/intel/issues/4991
[i915#5072]: https://gitlab.freedesktop.org/drm/intel/issues/5072
[i915#5138]: https://gitlab.freedesktop.org/drm/intel/issues/5138
[i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
[i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
[i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
[i915#5288]: https://gitlab.freedesktop.org/drm/intel/issues/5288
[i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289
[i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325
[i915#5327]: https://gitlab.freedesktop.org/drm/intel/issues/5327
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
[i915#5519]: https://gitlab.freedesktop.org/drm/intel/issues/5519
[i915#5563]: https://gitlab.freedesktop.org/drm/intel/issues/5563
[i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
[i915#6117]: https://gitlab.freedesktop.org/drm/intel/issues/6117
[i915#6227]: https://gitlab.freedesktop.org/drm/intel/issues/6227
[i915#6245]: https://gitlab.freedesktop.org/drm/intel/issues/6245
[i915#6247]: https://gitlab.freedesktop.org/drm/intel/issues/6247
[i915#6248]: https://gitlab.freedesktop.org/drm/intel/issues/6248
[i915#6258]: https://gitlab.freedesktop.org/drm/intel/issues/6258
[i915#6268]: https://gitlab.freedesktop.org/drm/intel/issues/6268
[i915#6335]: https://gitlab.freedesktop.org/drm/intel/issues/6335
[i915#6375]: https://gitlab.freedesktop.org/drm/intel/issues/6375
[i915#6433]: https://gitlab.freedesktop.org/drm/intel/issues/6433
[i915#6493]: https://gitlab.freedesktop.org/drm/intel/issues/6493
[i915#6497]: https://gitlab.freedesktop.org/drm/intel/issues/6497
[i915#6537]: https://gitlab.freedesktop.org/drm/intel/issues/6537
[i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
[i915#6590]: https://gitlab.freedesktop.org/drm/intel/issues/6590
[i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
[i915#6768]: https://gitlab.freedesktop.org/drm/intel/issues/6768
[i915#6944]: https://gitlab.freedesktop.org/drm/intel/issues/6944
[i915#6946]: https://gitlab.freedesktop.org/drm/intel/issues/6946
[i915#7037]: https://gitlab.freedesktop.org/drm/intel/issues/7037
[i915#7116]: https://gitlab.freedesktop.org/drm/intel/issues/7116
[i915#7118]: https://gitlab.freedesktop.org/drm/intel/issues/7118
[i915#7205]: https://gitlab.freedesktop.org/drm/intel/issues/7205
[i915#7248]: https://gitlab.freedesktop.org/drm/intel/issues/7248
[i915#7561]: https://gitlab.freedesktop.org/drm/intel/issues/7561
Build changes
-------------
* CI: CI-20190529 -> None
* IGT: IGT_7073 -> IGTPW_8161
CI-20190529: 20190529
CI_DRM_12439: 1e78c0412b6cc27f0b0e3773377011966757ac38 @ git://anongit.freedesktop.org/gfx-ci/linux
IGTPW_8161: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/index.html
IGT_7073: d021d66e389f4a759dc749b5f74f278ecd2e6cbf @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/index.html
[-- Attachment #2: Type: text/html, Size: 48921 bytes --]
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [igt-dev] ✗ Fi.CI.IGT: failure for Remove libdrm remnants in i915 code (rev2)
2022-11-28 22:22 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork
@ 2022-11-29 7:17 ` Zbigniew Kempczyński
0 siblings, 0 replies; 8+ messages in thread
From: Zbigniew Kempczyński @ 2022-11-29 7:17 UTC (permalink / raw)
To: igt-dev; +Cc: Lakshminarayana Vudum
On Mon, Nov 28, 2022 at 10:22:02PM +0000, Patchwork wrote:
> Patch Details
>
> Series: Remove libdrm remnants in i915 code (rev2)
> URL: https://patchwork.freedesktop.org/series/111200/
> State: failure
> Details: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/index.html
>
> CI Bug Log - changes from IGT_7073_full -> IGTPW_8161_full
>
> Summary
>
> FAILURE
>
> Serious unknown changes coming with IGTPW_8161_full absolutely need to be
> verified manually.
>
> If you think the reported changes have nothing to do with the changes
> introduced in IGTPW_8161_full, please notify your bug team to allow them
> to document this new failure mode, which will reduce false positives in
> CI.
>
> External URL:
> https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/index.html
>
> Participating hosts (8 -> 8)
>
> No changes in participating hosts
>
> Possible new issues
>
> Here are the unknown changes that may have been introduced in
> IGTPW_8161_full:
>
> IGT changes
>
> Possible regressions
>
> * igt@gem_partial_pwrite_pread@writes-after-reads:
> * shard-apl: PASS -> INCOMPLETE +1 similar issue
Regression not introduced in this series.
--
Zbigniew
>
> Suppressed
>
> The following results come from untrusted machines, tests, or statuses.
> They do not affect the overall result.
>
> * igt@kms_cursor_crc@cursor-random-256x256@pipe-d-hdmi-a-4:
> * {shard-dg1}: PASS -> FAIL +3 similar issues
>
> Known issues
>
> Here are the changes found in IGTPW_8161_full that come from known issues:
>
> IGT changes
>
> Issues hit
>
> * igt@gem_create@create-massive:
>
> * shard-apl: NOTRUN -> DMESG-WARN (i915#4991)
>
> * shard-tglb: NOTRUN -> DMESG-WARN (i915#4991)
>
> * shard-iclb: NOTRUN -> DMESG-WARN (i915#4991)
>
> * igt@gem_exec_balancer@parallel:
>
> * shard-iclb: PASS -> SKIP (i915#4525) +1 similar issue
> * igt@gem_exec_balancer@parallel-ordering:
>
> * shard-tglb: NOTRUN -> FAIL (i915#6117)
>
> * shard-iclb: NOTRUN -> FAIL (i915#6117)
>
> * igt@gem_lmem_swapping@heavy-verify-random-ccs:
>
> * shard-tglb: NOTRUN -> SKIP (i915#4613) +1 similar issue
> * igt@gem_lmem_swapping@massive-random:
>
> * shard-iclb: NOTRUN -> SKIP (i915#4613)
> * igt@gem_lmem_swapping@parallel-random-verify-ccs:
>
> * shard-apl: NOTRUN -> SKIP (fdo#109271 / i915#4613) +1 similar
> issue
> * igt@gem_pxp@fail-invalid-protected-context:
>
> * shard-iclb: NOTRUN -> SKIP (i915#4270)
> * igt@gem_pxp@reject-modify-context-protection-off-1:
>
> * shard-tglb: NOTRUN -> SKIP (i915#4270) +3 similar issues
> * igt@gem_userptr_blits@coherency-sync:
>
> * shard-iclb: NOTRUN -> SKIP (fdo#109290)
>
> * shard-tglb: NOTRUN -> SKIP (fdo#110542)
>
> * igt@gem_userptr_blits@unsync-overlap:
>
> * shard-iclb: NOTRUN -> SKIP (i915#3297)
>
> * shard-tglb: NOTRUN -> SKIP (i915#3297)
>
> * igt@gen3_render_linear_blits:
>
> * shard-iclb: NOTRUN -> SKIP (fdo#109289)
>
> * shard-tglb: NOTRUN -> SKIP (fdo#109289)
>
> * igt@gen9_exec_parse@shadow-peek:
>
> * shard-iclb: NOTRUN -> SKIP (i915#2856)
> * igt@i915_pm_dc@dc6-dpms:
>
> * shard-tglb: NOTRUN -> FAIL (i915#3989 / i915#454)
> * igt@i915_pm_lpsp@screens-disabled:
>
> * shard-tglb: NOTRUN -> SKIP (i915#1902)
> * igt@i915_pm_rpm@pc8-residency:
>
> * shard-tglb: NOTRUN -> SKIP (fdo#109506 / i915#2411)
> * igt@i915_query@hwconfig_table:
>
> * shard-tglb: NOTRUN -> SKIP (i915#6245)
> * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip:
>
> * shard-tglb: NOTRUN -> SKIP (i915#5286) +1 similar issue
> * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip:
>
> * shard-iclb: NOTRUN -> SKIP (i915#5286)
> * igt@kms_big_fb@x-tiled-16bpp-rotate-90:
>
> * shard-iclb: NOTRUN -> SKIP (fdo#110725 / fdo#111614) +1 similar
> issue
> * igt@kms_big_fb@y-tiled-8bpp-rotate-270:
>
> * shard-tglb: NOTRUN -> SKIP (fdo#111614) +1 similar issue
> * igt@kms_big_fb@yf-tiled-8bpp-rotate-180:
>
> * shard-iclb: NOTRUN -> SKIP (fdo#110723)
>
> * shard-tglb: NOTRUN -> SKIP (fdo#111615)
>
> * igt@kms_ccs@pipe-a-bad-rotation-90-y_tiled_gen12_rc_ccs_cc:
>
> * shard-apl: NOTRUN -> SKIP (fdo#109271 / i915#3886) +3 similar
> issues
> * igt@kms_ccs@pipe-a-ccs-on-another-bo-yf_tiled_ccs:
>
> * shard-tglb: NOTRUN -> SKIP (fdo#111615 / i915#3689) +3 similar
> issues
> * igt@kms_ccs@pipe-a-crc-sprite-planes-basic-y_tiled_gen12_rc_ccs:
>
> * shard-iclb: NOTRUN -> SKIP (fdo#109278) +8 similar issues
> * igt@kms_ccs@pipe-b-bad-rotation-90-4_tiled_dg2_mc_ccs:
>
> * shard-tglb: NOTRUN -> SKIP (i915#6095) +3 similar issues
> * igt@kms_ccs@pipe-b-crc-primary-basic-y_tiled_gen12_rc_ccs_cc:
>
> * shard-iclb: NOTRUN -> SKIP (fdo#109278 / i915#3886) +2 similar
> issues
> * igt@kms_ccs@pipe-b-crc-primary-rotation-180-4_tiled_dg2_rc_ccs:
>
> * shard-tglb: NOTRUN -> SKIP (i915#3689 / i915#6095) +3 similar
> issues
> * igt@kms_ccs@pipe-c-bad-rotation-90-y_tiled_gen12_mc_ccs:
>
> * shard-tglb: NOTRUN -> SKIP (i915#3689 / i915#3886)
> * igt@kms_ccs@pipe-d-bad-rotation-90-4_tiled_dg2_rc_ccs:
>
> * shard-tglb: NOTRUN -> SKIP (i915#3689) +4 similar issues
> * igt@kms_cdclk@plane-scaling:
>
> * shard-tglb: NOTRUN -> SKIP (i915#3742)
> * igt@kms_chamelium@dp-crc-single:
>
> * shard-apl: NOTRUN -> SKIP (fdo#109271 / fdo#111827) +3 similar
> issues
> * igt@kms_chamelium@hdmi-crc-multiple:
>
> * shard-iclb: NOTRUN -> SKIP (fdo#109284 / fdo#111827) +1 similar
> issue
> * igt@kms_chamelium@hdmi-hpd-storm-disable:
>
> * shard-tglb: NOTRUN -> SKIP (fdo#109284 / fdo#111827) +5 similar
> issues
> * igt@kms_color@ctm-0-75@pipe-a-edp-1:
>
> * shard-iclb: NOTRUN -> FAIL (i915#315 / i915#6946) +2 similar
> issues
> * igt@kms_color@ctm-0-75@pipe-c-edp-1:
>
> * shard-tglb: NOTRUN -> FAIL (i915#315 / i915#6946) +3 similar
> issues
> * igt@kms_content_protection@uevent:
>
> * shard-iclb: NOTRUN -> SKIP (i915#7118)
>
> * shard-tglb: NOTRUN -> SKIP (i915#6944 / i915#7118)
>
> * igt@kms_content_protection@uevent@pipe-a-dp-1:
>
> * shard-apl: NOTRUN -> FAIL (i915#1339)
> * igt@kms_cursor_crc@cursor-random-32x32:
>
> * shard-tglb: NOTRUN -> SKIP (i915#3555) +3 similar issues
> * igt@kms_cursor_legacy@cursor-vs-flip@legacy:
>
> * shard-iclb: PASS -> FAIL (i915#5072)
> * igt@kms_cursor_legacy@cursorb-vs-flipb@atomic:
>
> * shard-tglb: NOTRUN -> SKIP (fdo#109274 / fdo#111825) +12 similar
> issues
> * igt@kms_display_modes@extended-mode-basic:
>
> * shard-tglb: NOTRUN -> SKIP (fdo#109274)
> * igt@kms_dp_tiled_display@basic-test-pattern-with-chamelium:
>
> * shard-tglb: NOTRUN -> SKIP (i915#3528)
> * igt@kms_dsc@dsc-with-bpc-formats:
>
> * shard-iclb: NOTRUN -> SKIP (i915#3840)
>
> * shard-apl: NOTRUN -> SKIP (fdo#109271 / i915#7205)
>
> * igt@kms_flip@2x-flip-vs-panning-interruptible:
>
> * shard-tglb: NOTRUN -> SKIP (fdo#109274 / fdo#111825 / i915#3637)
> +1 similar issue
> * igt@kms_flip@2x-flip-vs-wf_vblank-interruptible:
>
> * shard-iclb: NOTRUN -> SKIP (fdo#109274) +14 similar issues
> * igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-valid-mode:
>
> * shard-tglb: NOTRUN -> SKIP (i915#2587 / i915#2672) +1 similar
> issue
> * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling@pipe-a-default-mode:
>
> * shard-iclb: NOTRUN -> SKIP (i915#6375)
> * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-upscaling@pipe-a-default-mode:
>
> * shard-iclb: NOTRUN -> SKIP (i915#2672) +1 similar issue
> * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling@pipe-a-valid-mode:
>
> * shard-iclb: NOTRUN -> SKIP (i915#2587 / i915#2672) +8 similar
> issues
> * igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-16bpp-xtile-downscaling@pipe-a-default-mode:
>
> * shard-iclb: NOTRUN -> SKIP (i915#3555) +2 similar issues
> * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-default-mode:
>
> * shard-iclb: NOTRUN -> SKIP (i915#2672 / i915#3555)
> * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-indfb-plflip-blt:
>
> * shard-tglb: NOTRUN -> SKIP (i915#6497) +6 similar issues
> * igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-cpu:
>
> * shard-apl: NOTRUN -> SKIP (fdo#109271) +85 similar issues
> * igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-draw-render:
>
> * shard-tglb: NOTRUN -> SKIP (fdo#109280 / fdo#111825) +19 similar
> issues
> * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-move:
>
> * shard-iclb: NOTRUN -> SKIP (fdo#109280) +11 similar issues
> * igt@kms_plane_lowres@tiling-none@pipe-a-edp-1:
>
> * shard-iclb: NOTRUN -> SKIP (i915#3536) +2 similar issues
> * igt@kms_plane_lowres@tiling-none@pipe-c-edp-1:
>
> * shard-tglb: NOTRUN -> SKIP (i915#3536) +3 similar issues
> * igt@kms_plane_scaling@plane-downscale-with-rotation-factor-0-25@pipe-c-edp-1:
>
> * shard-tglb: NOTRUN -> SKIP (i915#5176) +3 similar issues
>
> * shard-iclb: NOTRUN -> SKIP (i915#5176) +2 similar issues
>
> * igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area:
>
> * shard-tglb: NOTRUN -> SKIP (i915#2920)
> * igt@kms_psr2_su@page_flip-p010:
>
> * shard-iclb: NOTRUN -> SKIP (fdo#109642 / fdo#111068 / i915#658)
> * igt@kms_psr@psr2_basic:
>
> * shard-tglb: NOTRUN -> FAIL (i915#132 / i915#3467) +1 similar
> issue
>
> * shard-iclb: NOTRUN -> SKIP (fdo#109441)
>
> * igt@kms_psr@psr2_sprite_mmap_cpu:
>
> * shard-iclb: PASS -> SKIP (fdo#109441) +1 similar issue
> * igt@kms_writeback@writeback-fb-id:
>
> * shard-tglb: NOTRUN -> SKIP (i915#2437) +1 similar issue
>
> * shard-iclb: NOTRUN -> SKIP (i915#2437)
>
> * shard-apl: NOTRUN -> SKIP (fdo#109271 / i915#2437)
>
> * igt@perf_pmu@event-wait@rcs0:
>
> * shard-iclb: NOTRUN -> SKIP (fdo#112283)
>
> * shard-tglb: NOTRUN -> SKIP (fdo#112283)
>
> * igt@sysfs_clients@fair-0:
>
> * shard-apl: NOTRUN -> SKIP (fdo#109271 / i915#2994)
>
> * shard-tglb: NOTRUN -> SKIP (i915#2994) +1 similar issue
>
> * shard-iclb: NOTRUN -> SKIP (i915#2994)
>
> Possible fixes
>
> * igt@feature_discovery@psr2:
>
> * shard-iclb: SKIP (i915#658) -> PASS
> * igt@gem_eio@in-flight-suspend:
>
> * {shard-rkl}: FAIL (fdo#103375) -> PASS
> * igt@gem_exec_balancer@parallel-keep-in-fence:
>
> * shard-iclb: SKIP (i915#4525) -> PASS +1 similar issue
> * igt@gem_exec_fair@basic-flow@rcs0:
>
> * shard-tglb: FAIL (i915#2842) -> PASS
> * igt@gem_exec_fair@basic-none-solo@rcs0:
>
> * shard-apl: FAIL (i915#2842) -> PASS +1 similar issue
> * igt@gem_exec_reloc@basic-wc-read-noreloc:
>
> * {shard-rkl}: SKIP (i915#3281) -> PASS +9 similar issues
> * igt@gem_huc_copy@huc-copy:
>
> * shard-tglb: SKIP (i915#2190) -> PASS
> * igt@gem_partial_pwrite_pread@write-display:
>
> * {shard-rkl}: SKIP (i915#3282) -> PASS +1 similar issue
> * igt@gem_softpin@evict-single-offset:
>
> * shard-iclb: FAIL (i915#4171) -> PASS
> * igt@gen9_exec_parse@bb-start-far:
>
> * {shard-rkl}: SKIP (i915#2527) -> PASS +2 similar issues
> * igt@i915_hangman@engine-engine-error@bcs0:
>
> * {shard-rkl}: SKIP (i915#6258) -> PASS
> * igt@i915_pm_dc@dc6-dpms:
>
> * shard-iclb: FAIL (i915#3989 / i915#454) -> PASS +1 similar issue
> * igt@i915_pm_rc6_residency@rc6-idle@vcs0:
>
> * {shard-rkl}: WARN (i915#2681) -> PASS
> * igt@i915_pm_rpm@dpms-lpsp:
>
> * shard-tglb: INCOMPLETE (i915#2411) -> PASS
> * igt@i915_pm_rpm@fences-dpms:
>
> * {shard-rkl}: SKIP (i915#1849) -> PASS
> * igt@i915_pm_rps@engine-order:
>
> * {shard-rkl}: FAIL (i915#6537) -> PASS
> * igt@i915_pm_sseu@full-enable:
>
> * {shard-rkl}: SKIP (i915#4387) -> PASS
> * igt@kms_big_fb@y-tiled-16bpp-rotate-180:
>
> * shard-iclb: FAIL (i915#5138) -> PASS
> * igt@kms_dp_aux_dev:
>
> * {shard-rkl}: SKIP (i915#1257) -> PASS
> * igt@kms_flip_scaled_crc@flip-64bpp-linear-to-16bpp-linear-downscaling@pipe-a-default-mode:
>
> * shard-iclb: SKIP (i915#3555) -> PASS
> * igt@kms_frontbuffer_tracking@psr-1p-rte:
>
> * {shard-rkl}: SKIP (i915#1849 / i915#4098) -> PASS +9 similar
> issues
> * igt@kms_plane@plane-panning-bottom-right@pipe-a-planes:
>
> * {shard-rkl}: SKIP (i915#3558) -> PASS +1 similar issue
> * igt@kms_plane_scaling@plane-downscale-with-pixel-format-factor-0-5@pipe-b-edp-1:
>
> * shard-iclb: SKIP (i915#5176) -> PASS +4 similar issues
> * igt@kms_psr@cursor_render:
>
> * {shard-rkl}: SKIP (i915#1072) -> PASS +1 similar issue
> * igt@kms_psr@psr2_sprite_render:
>
> * shard-iclb: SKIP (fdo#109441) -> PASS +3 similar issues
> * igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
>
> * shard-iclb: SKIP (i915#5519) -> PASS
> * igt@kms_universal_plane@disable-primary-vs-flip-pipe-b:
>
> * {shard-rkl}: SKIP (i915#1845 / i915#4070 / i915#4098) -> PASS
> * igt@kms_vblank@pipe-b-wait-idle-hang:
>
> * {shard-rkl}: SKIP (i915#1845 / i915#4098) -> PASS +10 similar
> issues
> * igt@perf@gen8-unprivileged-single-ctx-counters:
>
> * {shard-rkl}: SKIP (i915#2436) -> PASS
> * igt@perf@mi-rpc:
>
> * {shard-rkl}: SKIP (i915#2434) -> PASS
> * igt@sysfs_heartbeat_interval@precise@rcs0:
>
> * {shard-dg1}: FAIL (i915#1755) -> PASS +1 similar issue
>
> Warnings
>
> * igt@gem_pwrite@basic-exhaustion:
>
> * shard-tglb: INCOMPLETE (i915#7248) -> WARN (i915#2658)
> * igt@kms_psr2_sf@cursor-plane-update-sf:
>
> * shard-iclb: SKIP (i915#2920) -> SKIP (fdo#111068 / i915#658)
> * igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-sf:
>
> * shard-iclb: SKIP (i915#2920) -> SKIP (i915#658)
> * igt@kms_psr2_sf@overlay-plane-move-continuous-sf:
>
> * shard-iclb: SKIP (i915#658) -> SKIP (i915#2920)
>
> {name}: This element is suppressed. This means it is ignored when
> computing
> the status of the difference (SUCCESS, WARNING, or FAILURE).
>
> Build changes
>
> * CI: CI-20190529 -> None
> * IGT: IGT_7073 -> IGTPW_8161
>
> CI-20190529: 20190529
> CI_DRM_12439: 1e78c0412b6cc27f0b0e3773377011966757ac38 @
> git://anongit.freedesktop.org/gfx-ci/linux
> IGTPW_8161: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_8161/index.html
> IGT_7073: d021d66e389f4a759dc749b5f74f278ecd2e6cbf @
> https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2022-11-29 7:18 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-11-28 16:15 [igt-dev] [PATCH i-g-t v2 0/4] Remove libdrm remnants in i915 code Zbigniew Kempczyński
2022-11-28 16:15 ` [igt-dev] [PATCH i-g-t v2 1/4] tests/prime_udl: Remove intel-libdrm dependency Zbigniew Kempczyński
2022-11-28 16:15 ` [igt-dev] [PATCH i-g-t v2 2/4] tests/prime_nv: Remove intel-libdrm calls Zbigniew Kempczyński
2022-11-28 16:15 ` [igt-dev] [PATCH i-g-t v2 3/4] benchmarks/intel_upload_blit_*: Remove libdrm in upload blits Zbigniew Kempczyński
2022-11-28 16:15 ` [igt-dev] [PATCH i-g-t v2 4/4] lib/intel_batchbuffer: Get rid of libdrm batchbuffer Zbigniew Kempczyński
2022-11-28 17:22 ` [igt-dev] ✓ Fi.CI.BAT: success for Remove libdrm remnants in i915 code (rev2) Patchwork
2022-11-28 22:22 ` [igt-dev] ✗ Fi.CI.IGT: failure " Patchwork
2022-11-29 7:17 ` Zbigniew Kempczyński
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