All of lore.kernel.org
 help / color / mirror / Atom feed
From: Palmer Dabbelt <palmer@rivosinc.com>
To: devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
	Hal Feng <hal.feng@starfivetech.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	linux-kernel@vger.kernel.org, Ben Dooks <ben.dooks@sifive.com>,
	Michael Turquette <mturquette@baylibre.com>,
	Rob Herring <robh+dt@kernel.org>, Stephen Boyd <sboyd@kernel.org>,
	Conor Dooley <conor@kernel.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Linus Walleij <linus.walleij@linaro.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Emil Renner Berthing <emil.renner.berthing@canonical.com>,
	Marc Zyngier <maz@kernel.org>
Subject: Re: [PATCH v2 8/8] RISC-V: defconfig: Enable CONFIG_SERIAL_8250_DW
Date: Fri, 02 Dec 2022 10:43:06 -0800	[thread overview]
Message-ID: <167000658679.29055.15185601584520551755.b4-ty@rivosinc.com> (raw)
In-Reply-To: <20221118011714.70877-9-hal.feng@starfivetech.com>

On Fri, 18 Nov 2022 09:17:14 +0800, Hal Feng wrote:
> Add CONFIG_SERIAL_8250_DW=y, which is a necessary option for
> StarFive JH7110 and JH7100 SoCs to boot with serial ports.
> 
> 

Applied, thanks!

[8/8] RISC-V: defconfig: Enable CONFIG_SERIAL_8250_DW
      https://git.kernel.org/palmer/c/6925ba3d9b8c

Best regards,
-- 
Palmer Dabbelt <palmer@rivosinc.com>

WARNING: multiple messages have this Message-ID (diff)
From: Palmer Dabbelt <palmer@rivosinc.com>
To: devicetree@vger.kernel.org, linux-riscv@lists.infradead.org,
	Hal Feng <hal.feng@starfivetech.com>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	linux-kernel@vger.kernel.org, Ben Dooks <ben.dooks@sifive.com>,
	Michael Turquette <mturquette@baylibre.com>,
	Rob Herring <robh+dt@kernel.org>, Stephen Boyd <sboyd@kernel.org>,
	Conor Dooley <conor@kernel.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Linus Walleij <linus.walleij@linaro.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Emil Renner Berthing <emil.renner.berthing@canonical.com>,
	Marc Zyngier <maz@kernel.org>
Subject: Re: [PATCH v2 8/8] RISC-V: defconfig: Enable CONFIG_SERIAL_8250_DW
Date: Fri, 02 Dec 2022 10:43:06 -0800	[thread overview]
Message-ID: <167000658679.29055.15185601584520551755.b4-ty@rivosinc.com> (raw)
In-Reply-To: <20221118011714.70877-9-hal.feng@starfivetech.com>

On Fri, 18 Nov 2022 09:17:14 +0800, Hal Feng wrote:
> Add CONFIG_SERIAL_8250_DW=y, which is a necessary option for
> StarFive JH7110 and JH7100 SoCs to boot with serial ports.
> 
> 

Applied, thanks!

[8/8] RISC-V: defconfig: Enable CONFIG_SERIAL_8250_DW
      https://git.kernel.org/palmer/c/6925ba3d9b8c

Best regards,
-- 
Palmer Dabbelt <palmer@rivosinc.com>

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

  parent reply	other threads:[~2022-12-02 18:52 UTC|newest]

Thread overview: 106+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-18  1:17 [PATCH v2 0/8] Basic device tree support for StarFive JH7110 RISC-V SoC Hal Feng
2022-11-18  1:17 ` Hal Feng
2022-11-18  1:17 ` [PATCH v2 1/8] dt-bindings: riscv: Add StarFive JH7110 SoC and VisionFive2 board Hal Feng
2022-11-18  1:17   ` Hal Feng
2022-11-18 11:31   ` Conor Dooley
2022-11-18 11:31     ` Conor Dooley
2022-11-18 13:13   ` Krzysztof Kozlowski
2022-11-18 13:13     ` Krzysztof Kozlowski
2022-11-18 17:28   ` Emil Renner Berthing
2022-11-18 17:28     ` Emil Renner Berthing
     [not found]   ` <202211190418.2AJ4ImtE072425@SH1-CSMTP-DB111.sundns.com>
2022-11-24  1:57     ` Hal Feng
2022-11-24  1:57       ` Hal Feng
     [not found]   ` <202211190418.2AJ4IQjc072382@SH1-CSMTP-DB111.sundns.com>
2022-11-24  5:56     ` Hal Feng
2022-11-24  5:56       ` Hal Feng
2022-11-24  9:20       ` Emil Renner Berthing
2022-11-24  9:20         ` Emil Renner Berthing
2022-11-24  9:50         ` Hal Feng
2022-11-24  9:50           ` Hal Feng
2022-11-18  1:17 ` [PATCH v2 2/8] dt-bindings: timer: Add StarFive JH7110 clint Hal Feng
2022-11-18  1:17   ` Hal Feng
2022-11-18 11:32   ` Conor Dooley
2022-11-18 11:32     ` Conor Dooley
2022-11-18  1:17 ` [PATCH v2 3/8] dt-bindings: interrupt-controller: Add StarFive JH7110 plic Hal Feng
2022-11-18  1:17   ` Hal Feng
2022-11-18 11:32   ` Conor Dooley
2022-11-18 11:32     ` Conor Dooley
2022-11-18  1:17 ` [PATCH v2 4/8] dt-bindings: sifive,ccache0: Support StarFive JH7110 SoC Hal Feng
2022-11-18  1:17   ` Hal Feng
2022-11-18 11:37   ` Conor Dooley
2022-11-18 11:37     ` Conor Dooley
2022-11-18 11:39     ` Conor Dooley
2022-11-18 11:39       ` Conor Dooley
2022-11-22  8:40       ` Hal Feng
2022-11-22  8:40         ` Hal Feng
2022-11-22  9:07         ` Conor Dooley
2022-11-22  9:07           ` Conor Dooley
2022-11-22  9:09           ` Ben Dooks
2022-11-22  9:09             ` Ben Dooks
2022-11-22  9:55           ` Hal Feng
2022-11-22  9:55             ` Hal Feng
2022-11-22 10:01             ` Conor Dooley
2022-11-22 10:01               ` Conor Dooley
2022-11-22 10:16               ` Hal Feng
2022-11-22 10:16                 ` Hal Feng
2022-11-22 10:35                 ` Emil Renner Berthing
2022-11-22 10:35                   ` Emil Renner Berthing
2022-11-22 12:51                   ` Hal Feng
2022-11-22 12:51                     ` Hal Feng
2022-11-23 22:26                   ` Rob Herring
2022-11-23 22:26                     ` Rob Herring
2022-11-18  1:17 ` [PATCH v2 5/8] soc: sifive: ccache: Add StarFive JH7110 support Hal Feng
2022-11-18  1:17   ` Hal Feng
2022-11-18 11:45   ` Conor Dooley
2022-11-18 11:45     ` Conor Dooley
2022-11-22  9:02     ` Hal Feng
2022-11-22  9:02       ` Hal Feng
2022-11-22  9:54       ` Emil Renner Berthing
2022-11-22  9:54         ` Emil Renner Berthing
2022-11-22 10:12         ` Conor Dooley
2022-11-22 10:12           ` Conor Dooley
2022-11-18 17:32   ` Emil Renner Berthing
2022-11-18 17:32     ` Emil Renner Berthing
2022-11-22  9:17     ` Hal Feng
2022-11-22  9:17       ` Hal Feng
2022-11-18  1:17 ` [PATCH v2 6/8] riscv: dts: starfive: Add initial StarFive JH7110 device tree Hal Feng
2022-11-18  1:17   ` Hal Feng
2022-11-18 12:01   ` Conor Dooley
2022-11-18 12:01     ` Conor Dooley
2022-11-18 17:39     ` Emil Renner Berthing
2022-11-18 17:39       ` Emil Renner Berthing
2022-11-23  7:11     ` Hal Feng
2022-11-23  7:11       ` Hal Feng
2022-11-18 17:41   ` Emil Renner Berthing
2022-11-18 17:41     ` Emil Renner Berthing
2022-11-23  7:20     ` Hal Feng
2022-11-23  7:20       ` Hal Feng
2022-11-18  1:17 ` [PATCH v2 7/8] riscv: dts: starfive: Add StarFive JH7110 VisionFive2 board " Hal Feng
2022-11-18  1:17   ` Hal Feng
2022-11-18 17:55   ` Emil Renner Berthing
2022-11-18 17:55     ` Emil Renner Berthing
2022-11-24  6:17     ` Hal Feng
2022-11-24  6:17       ` Hal Feng
2022-11-18  1:17 ` [PATCH v2 8/8] RISC-V: defconfig: Enable CONFIG_SERIAL_8250_DW Hal Feng
2022-11-18  1:17   ` Hal Feng
2022-11-18 12:04   ` Conor Dooley
2022-11-18 12:04     ` Conor Dooley
2022-12-02 18:00   ` Palmer Dabbelt
2022-12-02 18:00     ` Palmer Dabbelt
2022-12-02 18:07     ` Conor Dooley
2022-12-02 18:07       ` Conor Dooley
2022-12-02 18:13       ` Palmer Dabbelt
2022-12-02 18:13         ` Palmer Dabbelt
2022-12-02 18:18         ` Conor Dooley
2022-12-02 18:18           ` Conor Dooley
2022-12-02 18:24           ` Palmer Dabbelt
2022-12-02 18:24             ` Palmer Dabbelt
2022-12-02 18:43   ` Palmer Dabbelt [this message]
2022-12-02 18:43     ` Palmer Dabbelt
2022-12-04  7:20     ` Hal Feng
2022-12-04  7:20       ` Hal Feng
2022-11-18  7:28 ` [PATCH v2 0/8] Basic device tree support for StarFive JH7110 RISC-V SoC Hal Feng
2022-11-18  7:28   ` Hal Feng
2022-12-02 19:00 ` patchwork-bot+linux-riscv
2022-12-02 19:00   ` patchwork-bot+linux-riscv
2022-12-02 19:04   ` Palmer Dabbelt
2022-12-02 19:04     ` Palmer Dabbelt

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=167000658679.29055.15185601584520551755.b4-ty@rivosinc.com \
    --to=palmer@rivosinc.com \
    --cc=aou@eecs.berkeley.edu \
    --cc=ben.dooks@sifive.com \
    --cc=conor@kernel.org \
    --cc=devicetree@vger.kernel.org \
    --cc=emil.renner.berthing@canonical.com \
    --cc=hal.feng@starfivetech.com \
    --cc=krzysztof.kozlowski+dt@linaro.org \
    --cc=linus.walleij@linaro.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-riscv@lists.infradead.org \
    --cc=maz@kernel.org \
    --cc=mturquette@baylibre.com \
    --cc=p.zabel@pengutronix.de \
    --cc=palmer@dabbelt.com \
    --cc=paul.walmsley@sifive.com \
    --cc=robh+dt@kernel.org \
    --cc=sboyd@kernel.org \
    --cc=tglx@linutronix.de \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.