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From: Dave Jiang <dave.jiang@intel.com>
To: linux-cxl@vger.kernel.org, nvdimm@lists.linux.dev
Cc: vishal.l.verma@intel.com
Subject: [ndctl PATCH v2 2/4] ndctl/libndctl: Add bus_prefix for CXL
Date: Wed, 14 Dec 2022 15:00:31 -0700	[thread overview]
Message-ID: <167105523165.3034751.4940603908511673299.stgit@djiang5-desk3.ch.intel.com> (raw)
In-Reply-To: <167105505204.3034751.8113387624258581781.stgit@djiang5-desk3.ch.intel.com>

When the 'ndbus' is backed by CXL, setup the bus_prefix for dimm object
appropriately.

Signed-off-by: Dave Jiang <dave.jiang@intel.com>

---
v2:
- improve commit log. (Vishal)
---
 ndctl/lib/libndctl.c |    6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/ndctl/lib/libndctl.c b/ndctl/lib/libndctl.c
index 10422e24d38b..d2e800bc840a 100644
--- a/ndctl/lib/libndctl.c
+++ b/ndctl/lib/libndctl.c
@@ -2012,6 +2012,12 @@ static void *add_dimm(void *parent, int id, const char *dimm_base)
 			goto out;
 		}
 		rc =  add_papr_dimm(dimm, dimm_base);
+	} else if (ndctl_bus_has_cxl(bus)) {
+		dimm->bus_prefix = strdup("cxl");
+		if (!dimm->bus_prefix) {
+			rc = -ENOMEM;
+			goto out;
+		}
 	}
 
 	if (rc == -ENODEV) {



  parent reply	other threads:[~2022-12-14 22:00 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-14 22:00 [ndctl PATCH v2 0/4] ndctl: Add security test for cxl devices through nvdimm Dave Jiang
2022-12-14 22:00 ` [ndctl PATCH v2 1/4] ndctl: add CXL bus detection Dave Jiang
2022-12-15 20:38   ` Dan Williams
2022-12-15 21:18     ` Jeff Moyer
2022-12-15 22:27       ` Dan Williams
2022-12-16 17:21         ` [ndctl PATCH v3 " Dave Jiang
2022-12-16 17:23           ` Dave Jiang
2022-12-16 18:44             ` Dan Williams
2023-01-04 20:30             ` [ndctl PATCH v4 " Dave Jiang
2022-12-14 22:00 ` Dave Jiang [this message]
2022-12-14 22:00 ` [ndctl PATCH v2 3/4] ndctl/libndctl: Allow retrievng of unique_id for CXL mem dev Dave Jiang
2022-12-14 22:00 ` [ndctl PATCH v2 4/4] ndctl/test: Add CXL test for security Dave Jiang

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