* [Intel-gfx] [PATCH 0/2] We need to have additional checks for DP MST UHBR
@ 2023-01-16 11:19 Stanislav Lisovskiy
2023-01-16 11:19 ` [Intel-gfx] [PATCH 1/2] drm/i915: Add generic constraint checker when determining DP MST DSC bpp Stanislav Lisovskiy
` (3 more replies)
0 siblings, 4 replies; 11+ messages in thread
From: Stanislav Lisovskiy @ 2023-01-16 11:19 UTC (permalink / raw)
To: intel-gfx
According to BSpec UHBR might hit hw limitation which must be checked.
So this series adds first some generic checker function, which might
be used to add this or similar checks in future, then we introduce
that particular UHBR check.
Stanislav Lisovskiy (2):
drm/i915: Add generic constraint checker when determining DP MST DSC
bpp
drm/i915: Implement UHBR bandwidth check
drivers/gpu/drm/i915/display/intel_dp_mst.c | 26 +++++++++++++++++++--
1 file changed, 24 insertions(+), 2 deletions(-)
--
2.37.3
^ permalink raw reply [flat|nested] 11+ messages in thread* [Intel-gfx] [PATCH 1/2] drm/i915: Add generic constraint checker when determining DP MST DSC bpp 2023-01-16 11:19 [Intel-gfx] [PATCH 0/2] We need to have additional checks for DP MST UHBR Stanislav Lisovskiy @ 2023-01-16 11:19 ` Stanislav Lisovskiy 2023-01-16 11:19 ` [Intel-gfx] [PATCH 2/2] drm/i915: Implement UHBR bandwidth check Stanislav Lisovskiy ` (2 subsequent siblings) 3 siblings, 0 replies; 11+ messages in thread From: Stanislav Lisovskiy @ 2023-01-16 11:19 UTC (permalink / raw) To: intel-gfx There are might be multiple contraints which we need to check while determining if we can use desired compressed bpp, so might be good idea to add a special helper, so that we don't overcomplicate the main bpp calculation function. Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> --- drivers/gpu/drm/i915/display/intel_dp_mst.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index 8b0e4defa3f1..e3e7c305fece 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -45,6 +45,13 @@ #include "intel_hotplug.h" #include "skl_scaler.h" +static int intel_dp_mst_check_constraints(struct drm_i915_private *i915, int bpp, + const struct drm_display_mode *adjusted_mode, + struct intel_crtc_state *crtc_state) +{ + return 0; +} + static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder, struct intel_crtc_state *crtc_state, int max_bpp, @@ -87,6 +94,10 @@ static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder, drm_dbg_kms(&i915->drm, "Trying bpp %d\n", bpp); + ret = intel_dp_mst_check_constraints(i915, bpp, adjusted_mode, crtc_state); + if (ret) + continue; + slots = drm_dp_atomic_find_time_slots(state, &intel_dp->mst_mgr, connector->port, crtc_state->pbn); @@ -104,8 +115,8 @@ static int intel_dp_mst_find_vcpi_slots_for_bpp(struct intel_encoder *encoder, } } - /* Despite slots are non-zero, we still failed the atomic check */ - if (ret && slots >= 0) + /* We failed to find a proper bpp/timeslots, return error */ + if (ret) slots = ret; if (slots < 0) { -- 2.37.3 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* [Intel-gfx] [PATCH 2/2] drm/i915: Implement UHBR bandwidth check 2023-01-16 11:19 [Intel-gfx] [PATCH 0/2] We need to have additional checks for DP MST UHBR Stanislav Lisovskiy 2023-01-16 11:19 ` [Intel-gfx] [PATCH 1/2] drm/i915: Add generic constraint checker when determining DP MST DSC bpp Stanislav Lisovskiy @ 2023-01-16 11:19 ` Stanislav Lisovskiy 2023-01-24 18:43 ` Rodrigo Vivi 2023-01-31 15:00 ` Ville Syrjälä 2023-01-16 12:11 ` [Intel-gfx] ✓ Fi.CI.BAT: success for We need to have additional checks for DP MST UHBR Patchwork 2023-01-16 13:56 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork 3 siblings, 2 replies; 11+ messages in thread From: Stanislav Lisovskiy @ 2023-01-16 11:19 UTC (permalink / raw) To: intel-gfx According to spec, we should check if output_bpp * pixel_rate is less than DDI clock * 72, if UHBR is used. HSDES: 1406899791 BSPEC: 49259 v2: - Removed wrong comment(Rodrigo Vivi) - Added HSDES to the commit msg(Rodrigo Vivi) - Moved UHBR check to the MST specific code v3: - Changed commit subject(Rodrigo Vivi) - Fixed the error message if check fails(Rodrigo Vivi) v4: - Move UHBR check to new helper function - Now both for non-DSC/DSC we use that new check as one of the constraints, when figuring out output bpp to be used(Ville Syrjälä) Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> --- drivers/gpu/drm/i915/display/intel_dp_mst.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c index e3e7c305fece..b95051fed23d 100644 --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c @@ -47,8 +47,19 @@ static int intel_dp_mst_check_constraints(struct drm_i915_private *i915, int bpp, const struct drm_display_mode *adjusted_mode, - struct intel_crtc_state *crtc_state) + struct intel_crtc_state *pipe_config) { + if (intel_dp_is_uhbr(pipe_config)) { + int output_bpp = bpp; + + if (output_bpp * adjusted_mode->crtc_clock >= + pipe_config->port_clock * 72) { + drm_dbg_kms(&i915->drm, "UHBR check failed(required bw %d available %d)\n", + output_bpp * adjusted_mode->crtc_clock, pipe_config->port_clock * 72); + return -EINVAL; + } + } + return 0; } -- 2.37.3 ^ permalink raw reply related [flat|nested] 11+ messages in thread
* Re: [Intel-gfx] [PATCH 2/2] drm/i915: Implement UHBR bandwidth check 2023-01-16 11:19 ` [Intel-gfx] [PATCH 2/2] drm/i915: Implement UHBR bandwidth check Stanislav Lisovskiy @ 2023-01-24 18:43 ` Rodrigo Vivi 2023-01-31 15:00 ` Ville Syrjälä 1 sibling, 0 replies; 11+ messages in thread From: Rodrigo Vivi @ 2023-01-24 18:43 UTC (permalink / raw) To: Stanislav Lisovskiy; +Cc: intel-gfx On Mon, Jan 16, 2023 at 01:19:37PM +0200, Stanislav Lisovskiy wrote: > According to spec, we should check if output_bpp * pixel_rate is less > than DDI clock * 72, if UHBR is used. > > HSDES: 1406899791 > BSPEC: 49259 > > v2: - Removed wrong comment(Rodrigo Vivi) > - Added HSDES to the commit msg(Rodrigo Vivi) > - Moved UHBR check to the MST specific code > > v3: - Changed commit subject(Rodrigo Vivi) > - Fixed the error message if check fails(Rodrigo Vivi) > > v4: - Move UHBR check to new helper function > - Now both for non-DSC/DSC we use that new check as > one of the constraints, when figuring out output bpp > to be used(Ville Syrjälä) > > Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> > --- > drivers/gpu/drm/i915/display/intel_dp_mst.c | 13 ++++++++++++- > 1 file changed, 12 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c > index e3e7c305fece..b95051fed23d 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c > +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c > @@ -47,8 +47,19 @@ > > static int intel_dp_mst_check_constraints(struct drm_i915_private *i915, int bpp, > const struct drm_display_mode *adjusted_mode, > - struct intel_crtc_state *crtc_state) > + struct intel_crtc_state *pipe_config) > { > + if (intel_dp_is_uhbr(pipe_config)) { > + int output_bpp = bpp; > + > + if (output_bpp * adjusted_mode->crtc_clock >= > + pipe_config->port_clock * 72) { > + drm_dbg_kms(&i915->drm, "UHBR check failed(required bw %d available %d)\n", > + output_bpp * adjusted_mode->crtc_clock, pipe_config->port_clock * 72); > + return -EINVAL; > + } > + } > + the check looks correct to me, but let's wait for Ville to comment on the placement since he was the one who first noticed the other one during commit was too late. > return 0; > } > > -- > 2.37.3 > ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [Intel-gfx] [PATCH 2/2] drm/i915: Implement UHBR bandwidth check 2023-01-16 11:19 ` [Intel-gfx] [PATCH 2/2] drm/i915: Implement UHBR bandwidth check Stanislav Lisovskiy 2023-01-24 18:43 ` Rodrigo Vivi @ 2023-01-31 15:00 ` Ville Syrjälä 2023-01-31 15:20 ` Lisovskiy, Stanislav 1 sibling, 1 reply; 11+ messages in thread From: Ville Syrjälä @ 2023-01-31 15:00 UTC (permalink / raw) To: Stanislav Lisovskiy; +Cc: intel-gfx On Mon, Jan 16, 2023 at 01:19:37PM +0200, Stanislav Lisovskiy wrote: > According to spec, we should check if output_bpp * pixel_rate is less > than DDI clock * 72, if UHBR is used. > > HSDES: 1406899791 > BSPEC: 49259 > > v2: - Removed wrong comment(Rodrigo Vivi) > - Added HSDES to the commit msg(Rodrigo Vivi) > - Moved UHBR check to the MST specific code > > v3: - Changed commit subject(Rodrigo Vivi) > - Fixed the error message if check fails(Rodrigo Vivi) > > v4: - Move UHBR check to new helper function > - Now both for non-DSC/DSC we use that new check as > one of the constraints, when figuring out output bpp > to be used(Ville Syrjälä) > > Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> > --- > drivers/gpu/drm/i915/display/intel_dp_mst.c | 13 ++++++++++++- > 1 file changed, 12 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c > index e3e7c305fece..b95051fed23d 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c > +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c > @@ -47,8 +47,19 @@ > > static int intel_dp_mst_check_constraints(struct drm_i915_private *i915, int bpp, > const struct drm_display_mode *adjusted_mode, > - struct intel_crtc_state *crtc_state) > + struct intel_crtc_state *pipe_config) > { > + if (intel_dp_is_uhbr(pipe_config)) { > + int output_bpp = bpp; > + > + if (output_bpp * adjusted_mode->crtc_clock >= > + pipe_config->port_clock * 72) { This seems to be some DSC specific constraint, but this code appears to apply it also to uncompresed output. Also DDICLK != port_clock, so this looks to be off by quite a lot. > + drm_dbg_kms(&i915->drm, "UHBR check failed(required bw %d available %d)\n", > + output_bpp * adjusted_mode->crtc_clock, pipe_config->port_clock * 72); > + return -EINVAL; > + } > + } > + > return 0; > } > > -- > 2.37.3 -- Ville Syrjälä Intel ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [Intel-gfx] [PATCH 2/2] drm/i915: Implement UHBR bandwidth check 2023-01-31 15:00 ` Ville Syrjälä @ 2023-01-31 15:20 ` Lisovskiy, Stanislav 2023-01-31 15:41 ` Ville Syrjälä 0 siblings, 1 reply; 11+ messages in thread From: Lisovskiy, Stanislav @ 2023-01-31 15:20 UTC (permalink / raw) To: Ville Syrjälä; +Cc: intel-gfx On Tue, Jan 31, 2023 at 05:00:30PM +0200, Ville Syrjälä wrote: > On Mon, Jan 16, 2023 at 01:19:37PM +0200, Stanislav Lisovskiy wrote: > > According to spec, we should check if output_bpp * pixel_rate is less > > than DDI clock * 72, if UHBR is used. > > > > HSDES: 1406899791 > > BSPEC: 49259 > > > > v2: - Removed wrong comment(Rodrigo Vivi) > > - Added HSDES to the commit msg(Rodrigo Vivi) > > - Moved UHBR check to the MST specific code > > > > v3: - Changed commit subject(Rodrigo Vivi) > > - Fixed the error message if check fails(Rodrigo Vivi) > > > > v4: - Move UHBR check to new helper function > > - Now both for non-DSC/DSC we use that new check as > > one of the constraints, when figuring out output bpp > > to be used(Ville Syrjälä) > > > > Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> > > --- > > drivers/gpu/drm/i915/display/intel_dp_mst.c | 13 ++++++++++++- > > 1 file changed, 12 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c > > index e3e7c305fece..b95051fed23d 100644 > > --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c > > +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c > > @@ -47,8 +47,19 @@ > > > > static int intel_dp_mst_check_constraints(struct drm_i915_private *i915, int bpp, > > const struct drm_display_mode *adjusted_mode, > > - struct intel_crtc_state *crtc_state) > > + struct intel_crtc_state *pipe_config) > > { > > + if (intel_dp_is_uhbr(pipe_config)) { > > + int output_bpp = bpp; > > + > > + if (output_bpp * adjusted_mode->crtc_clock >= > > + pipe_config->port_clock * 72) { > > This seems to be some DSC specific constraint, but this code appears to > apply it also to uncompresed output. Was thinking about that. Looking at the initial HSD, also to the DSC page in the BSpec, I have a strong feeling that this applies to any output bpp, regardless if its compressed or not. So decided to make this check more generic. I think this is a just general Link BW limitation which just happened to be mentioned on DSC page. I will clarify that. > > Also DDICLK != port_clock, so this looks to be off by quite a lot. Any hints, what should I use instead?.. Stan > > > > + drm_dbg_kms(&i915->drm, "UHBR check failed(required bw %d available %d)\n", > > + output_bpp * adjusted_mode->crtc_clock, pipe_config->port_clock * 72); > > + return -EINVAL; > > + } > > + } > > + > > return 0; > > } > > > > -- > > 2.37.3 > > -- > Ville Syrjälä > Intel ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [Intel-gfx] [PATCH 2/2] drm/i915: Implement UHBR bandwidth check 2023-01-31 15:20 ` Lisovskiy, Stanislav @ 2023-01-31 15:41 ` Ville Syrjälä 2023-02-01 11:00 ` Lisovskiy, Stanislav 0 siblings, 1 reply; 11+ messages in thread From: Ville Syrjälä @ 2023-01-31 15:41 UTC (permalink / raw) To: Lisovskiy, Stanislav; +Cc: intel-gfx On Tue, Jan 31, 2023 at 05:20:44PM +0200, Lisovskiy, Stanislav wrote: > On Tue, Jan 31, 2023 at 05:00:30PM +0200, Ville Syrjälä wrote: > > On Mon, Jan 16, 2023 at 01:19:37PM +0200, Stanislav Lisovskiy wrote: > > > According to spec, we should check if output_bpp * pixel_rate is less > > > than DDI clock * 72, if UHBR is used. > > > > > > HSDES: 1406899791 > > > BSPEC: 49259 > > > > > > v2: - Removed wrong comment(Rodrigo Vivi) > > > - Added HSDES to the commit msg(Rodrigo Vivi) > > > - Moved UHBR check to the MST specific code > > > > > > v3: - Changed commit subject(Rodrigo Vivi) > > > - Fixed the error message if check fails(Rodrigo Vivi) > > > > > > v4: - Move UHBR check to new helper function > > > - Now both for non-DSC/DSC we use that new check as > > > one of the constraints, when figuring out output bpp > > > to be used(Ville Syrjälä) > > > > > > Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> > > > --- > > > drivers/gpu/drm/i915/display/intel_dp_mst.c | 13 ++++++++++++- > > > 1 file changed, 12 insertions(+), 1 deletion(-) > > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c > > > index e3e7c305fece..b95051fed23d 100644 > > > --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c > > > +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c > > > @@ -47,8 +47,19 @@ > > > > > > static int intel_dp_mst_check_constraints(struct drm_i915_private *i915, int bpp, > > > const struct drm_display_mode *adjusted_mode, > > > - struct intel_crtc_state *crtc_state) > > > + struct intel_crtc_state *pipe_config) > > > { > > > + if (intel_dp_is_uhbr(pipe_config)) { > > > + int output_bpp = bpp; > > > + > > > + if (output_bpp * adjusted_mode->crtc_clock >= > > > + pipe_config->port_clock * 72) { > > > > This seems to be some DSC specific constraint, but this code appears to > > apply it also to uncompresed output. > > Was thinking about that. Looking at the initial HSD, also to the DSC page > in the BSpec, I have a strong feeling that this applies to any output bpp, > regardless if its compressed or not. > So decided to make this check more generic. I think this is a just general > Link BW limitation which just happened to be mentioned on DSC page. > I will clarify that. > > > > > Also DDICLK != port_clock, so this looks to be off by quite a lot. > > Any hints, what should I use instead?.. DDICLK looks to be the symbol clock more or less (for 32bit symbols), so presumably you want a /32, with maybe an extra factor of 10^n in there, or not. That magic 72 is also strange. Maybe a 2*36, but dunno what that would really be either. The spec could really use some better explanations. -- Ville Syrjälä Intel ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [Intel-gfx] [PATCH 2/2] drm/i915: Implement UHBR bandwidth check 2023-01-31 15:41 ` Ville Syrjälä @ 2023-02-01 11:00 ` Lisovskiy, Stanislav 2023-02-01 12:47 ` Ville Syrjälä 0 siblings, 1 reply; 11+ messages in thread From: Lisovskiy, Stanislav @ 2023-02-01 11:00 UTC (permalink / raw) To: Ville Syrjälä; +Cc: intel-gfx On Tue, Jan 31, 2023 at 05:41:45PM +0200, Ville Syrjälä wrote: > On Tue, Jan 31, 2023 at 05:20:44PM +0200, Lisovskiy, Stanislav wrote: > > On Tue, Jan 31, 2023 at 05:00:30PM +0200, Ville Syrjälä wrote: > > > On Mon, Jan 16, 2023 at 01:19:37PM +0200, Stanislav Lisovskiy wrote: > > > > According to spec, we should check if output_bpp * pixel_rate is less > > > > than DDI clock * 72, if UHBR is used. > > > > > > > > HSDES: 1406899791 > > > > BSPEC: 49259 > > > > > > > > v2: - Removed wrong comment(Rodrigo Vivi) > > > > - Added HSDES to the commit msg(Rodrigo Vivi) > > > > - Moved UHBR check to the MST specific code > > > > > > > > v3: - Changed commit subject(Rodrigo Vivi) > > > > - Fixed the error message if check fails(Rodrigo Vivi) > > > > > > > > v4: - Move UHBR check to new helper function > > > > - Now both for non-DSC/DSC we use that new check as > > > > one of the constraints, when figuring out output bpp > > > > to be used(Ville Syrjälä) > > > > > > > > Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> > > > > --- > > > > drivers/gpu/drm/i915/display/intel_dp_mst.c | 13 ++++++++++++- > > > > 1 file changed, 12 insertions(+), 1 deletion(-) > > > > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c > > > > index e3e7c305fece..b95051fed23d 100644 > > > > --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c > > > > +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c > > > > @@ -47,8 +47,19 @@ > > > > > > > > static int intel_dp_mst_check_constraints(struct drm_i915_private *i915, int bpp, > > > > const struct drm_display_mode *adjusted_mode, > > > > - struct intel_crtc_state *crtc_state) > > > > + struct intel_crtc_state *pipe_config) > > > > { > > > > + if (intel_dp_is_uhbr(pipe_config)) { > > > > + int output_bpp = bpp; > > > > + > > > > + if (output_bpp * adjusted_mode->crtc_clock >= > > > > + pipe_config->port_clock * 72) { > > > > > > This seems to be some DSC specific constraint, but this code appears to > > > apply it also to uncompresed output. > > > > Was thinking about that. Looking at the initial HSD, also to the DSC page > > in the BSpec, I have a strong feeling that this applies to any output bpp, > > regardless if its compressed or not. > > So decided to make this check more generic. I think this is a just general > > Link BW limitation which just happened to be mentioned on DSC page. > > I will clarify that. > > > > > > > > Also DDICLK != port_clock, so this looks to be off by quite a lot. > > > > Any hints, what should I use instead?.. > > DDICLK looks to be the symbol clock more or less (for 32bit symbols), > so presumably you want a /32, with maybe an extra factor of 10^n in > there, or not. > > That magic 72 is also strange. Maybe a 2*36, but dunno what that would > really be either. The spec could really use some better explanations. There is another check mentioned right above in the same place, which I believe is related(btw, we probably need that one as well, if not added): Output bpp < Number of lanes * DDICLK frequency * Bits per lane / Pixel clock and bits per lane have to be: DisplayPort 8b/10b bits per lane = 8 DisplayPort 2 128b/132b bits per lane = 32 The check we are talking here is: Output bpp * Pixel clock < DDICLK frequency * 72 bits Which means Output bpp < (DDICLK frequency * 72 bits) / Pixel clock So I guess that means that to get DDICLK I need to divide port_clock by bits_per_lane. And 72 bits is a probably max symbol width which can be used due to some HW restrictions. Stan > > -- > Ville Syrjälä > Intel ^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [Intel-gfx] [PATCH 2/2] drm/i915: Implement UHBR bandwidth check 2023-02-01 11:00 ` Lisovskiy, Stanislav @ 2023-02-01 12:47 ` Ville Syrjälä 0 siblings, 0 replies; 11+ messages in thread From: Ville Syrjälä @ 2023-02-01 12:47 UTC (permalink / raw) To: Lisovskiy, Stanislav; +Cc: intel-gfx On Wed, Feb 01, 2023 at 01:00:59PM +0200, Lisovskiy, Stanislav wrote: > On Tue, Jan 31, 2023 at 05:41:45PM +0200, Ville Syrjälä wrote: > > On Tue, Jan 31, 2023 at 05:20:44PM +0200, Lisovskiy, Stanislav wrote: > > > On Tue, Jan 31, 2023 at 05:00:30PM +0200, Ville Syrjälä wrote: > > > > On Mon, Jan 16, 2023 at 01:19:37PM +0200, Stanislav Lisovskiy wrote: > > > > > According to spec, we should check if output_bpp * pixel_rate is less > > > > > than DDI clock * 72, if UHBR is used. > > > > > > > > > > HSDES: 1406899791 > > > > > BSPEC: 49259 > > > > > > > > > > v2: - Removed wrong comment(Rodrigo Vivi) > > > > > - Added HSDES to the commit msg(Rodrigo Vivi) > > > > > - Moved UHBR check to the MST specific code > > > > > > > > > > v3: - Changed commit subject(Rodrigo Vivi) > > > > > - Fixed the error message if check fails(Rodrigo Vivi) > > > > > > > > > > v4: - Move UHBR check to new helper function > > > > > - Now both for non-DSC/DSC we use that new check as > > > > > one of the constraints, when figuring out output bpp > > > > > to be used(Ville Syrjälä) > > > > > > > > > > Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com> > > > > > --- > > > > > drivers/gpu/drm/i915/display/intel_dp_mst.c | 13 ++++++++++++- > > > > > 1 file changed, 12 insertions(+), 1 deletion(-) > > > > > > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c > > > > > index e3e7c305fece..b95051fed23d 100644 > > > > > --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c > > > > > +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c > > > > > @@ -47,8 +47,19 @@ > > > > > > > > > > static int intel_dp_mst_check_constraints(struct drm_i915_private *i915, int bpp, > > > > > const struct drm_display_mode *adjusted_mode, > > > > > - struct intel_crtc_state *crtc_state) > > > > > + struct intel_crtc_state *pipe_config) > > > > > { > > > > > + if (intel_dp_is_uhbr(pipe_config)) { > > > > > + int output_bpp = bpp; > > > > > + > > > > > + if (output_bpp * adjusted_mode->crtc_clock >= > > > > > + pipe_config->port_clock * 72) { > > > > > > > > This seems to be some DSC specific constraint, but this code appears to > > > > apply it also to uncompresed output. > > > > > > Was thinking about that. Looking at the initial HSD, also to the DSC page > > > in the BSpec, I have a strong feeling that this applies to any output bpp, > > > regardless if its compressed or not. > > > So decided to make this check more generic. I think this is a just general > > > Link BW limitation which just happened to be mentioned on DSC page. > > > I will clarify that. > > > > > > > > > > > Also DDICLK != port_clock, so this looks to be off by quite a lot. > > > > > > Any hints, what should I use instead?.. > > > > DDICLK looks to be the symbol clock more or less (for 32bit symbols), > > so presumably you want a /32, with maybe an extra factor of 10^n in > > there, or not. > > > > That magic 72 is also strange. Maybe a 2*36, but dunno what that would > > really be either. The spec could really use some better explanations. > > There is another check mentioned right above in the same place, which > I believe is related(btw, we probably need that one as well, if not added): > > Output bpp < Number of lanes * DDICLK frequency * Bits per lane / Pixel clock > > and bits per lane have to be: > > DisplayPort 8b/10b bits per lane = 8 > DisplayPort 2 128b/132b bits per lane = 32 > > The check we are talking here is: > > Output bpp * Pixel clock < DDICLK frequency * 72 bits > > Which means > > Output bpp < (DDICLK frequency * 72 bits) / Pixel clock > > So I guess that means that to get DDICLK I need to divide port_clock by bits_per_lane. > > And 72 bits is a probably max symbol width which can be used due to some HW > restrictions. It would help if we knew what "DPT" was. It might be some max bits per clock limit of the DSC encoder, or something. Looks like it's getting doubled again in future projects. -- Ville Syrjälä Intel ^ permalink raw reply [flat|nested] 11+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for We need to have additional checks for DP MST UHBR 2023-01-16 11:19 [Intel-gfx] [PATCH 0/2] We need to have additional checks for DP MST UHBR Stanislav Lisovskiy 2023-01-16 11:19 ` [Intel-gfx] [PATCH 1/2] drm/i915: Add generic constraint checker when determining DP MST DSC bpp Stanislav Lisovskiy 2023-01-16 11:19 ` [Intel-gfx] [PATCH 2/2] drm/i915: Implement UHBR bandwidth check Stanislav Lisovskiy @ 2023-01-16 12:11 ` Patchwork 2023-01-16 13:56 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork 3 siblings, 0 replies; 11+ messages in thread From: Patchwork @ 2023-01-16 12:11 UTC (permalink / raw) To: Stanislav Lisovskiy; +Cc: intel-gfx [-- Attachment #1: Type: text/plain, Size: 6039 bytes --] == Series Details == Series: We need to have additional checks for DP MST UHBR URL : https://patchwork.freedesktop.org/series/112876/ State : success == Summary == CI Bug Log - changes from CI_DRM_12586 -> Patchwork_112876v1 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v1/index.html Participating hosts (44 -> 41) ------------------------------ Missing (3): fi-rkl-11600 bat-atsm-1 fi-snb-2520m Known issues ------------ Here are the changes found in Patchwork_112876v1 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@fbdev@write: - fi-blb-e6850: [PASS][1] -> [SKIP][2] ([fdo#109271]) +4 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12586/fi-blb-e6850/igt@fbdev@write.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v1/fi-blb-e6850/igt@fbdev@write.html * igt@i915_selftest@live@execlists: - fi-bsw-n3050: [PASS][3] -> [INCOMPLETE][4] ([i915#6972]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12586/fi-bsw-n3050/igt@i915_selftest@live@execlists.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v1/fi-bsw-n3050/igt@i915_selftest@live@execlists.html * igt@runner@aborted: - fi-bsw-n3050: NOTRUN -> [FAIL][5] ([fdo#109271] / [i915#4312]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v1/fi-bsw-n3050/igt@runner@aborted.html #### Possible fixes #### * igt@gem_exec_gttfill@basic: - fi-pnv-d510: [FAIL][6] ([i915#7229]) -> [PASS][7] [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12586/fi-pnv-d510/igt@gem_exec_gttfill@basic.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v1/fi-pnv-d510/igt@gem_exec_gttfill@basic.html * igt@gem_exec_suspend@basic-s0@smem: - {bat-rplp-1}: [DMESG-WARN][8] -> [PASS][9] +5 similar issues [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12586/bat-rplp-1/igt@gem_exec_suspend@basic-s0@smem.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v1/bat-rplp-1/igt@gem_exec_suspend@basic-s0@smem.html * igt@i915_pm_rpm@module-reload: - {bat-rplp-1}: [SKIP][10] -> [PASS][11] [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12586/bat-rplp-1/igt@i915_pm_rpm@module-reload.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v1/bat-rplp-1/igt@i915_pm_rpm@module-reload.html * igt@i915_selftest@live@hangcheck: - fi-adl-ddr5: [DMESG-WARN][12] ([i915#5591]) -> [PASS][13] [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12586/fi-adl-ddr5/igt@i915_selftest@live@hangcheck.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v1/fi-adl-ddr5/igt@i915_selftest@live@hangcheck.html - {bat-dg2-11}: [INCOMPLETE][14] ([i915#7834]) -> [PASS][15] [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12586/bat-dg2-11/igt@i915_selftest@live@hangcheck.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v1/bat-dg2-11/igt@i915_selftest@live@hangcheck.html * igt@i915_selftest@live@requests: - {bat-rpls-1}: [INCOMPLETE][16] ([i915#4983] / [i915#6257]) -> [PASS][17] [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12586/bat-rpls-1/igt@i915_selftest@live@requests.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v1/bat-rpls-1/igt@i915_selftest@live@requests.html * igt@i915_suspend@basic-s3-without-i915: - fi-apl-guc: [DMESG-WARN][18] ([i915#1982]) -> [PASS][19] [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12586/fi-apl-guc/igt@i915_suspend@basic-s3-without-i915.html [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v1/fi-apl-guc/igt@i915_suspend@basic-s3-without-i915.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic: - fi-bsw-kefka: [FAIL][20] ([i915#2346]) -> [PASS][21] [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12586/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic.html [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v1/fi-bsw-kefka/igt@kms_cursor_legacy@basic-busy-flip-before-cursor@atomic.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982 [i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346 [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312 [i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983 [i915#5591]: https://gitlab.freedesktop.org/drm/intel/issues/5591 [i915#6257]: https://gitlab.freedesktop.org/drm/intel/issues/6257 [i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367 [i915#6972]: https://gitlab.freedesktop.org/drm/intel/issues/6972 [i915#7229]: https://gitlab.freedesktop.org/drm/intel/issues/7229 [i915#7625]: https://gitlab.freedesktop.org/drm/intel/issues/7625 [i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828 [i915#7834]: https://gitlab.freedesktop.org/drm/intel/issues/7834 Build changes ------------- * Linux: CI_DRM_12586 -> Patchwork_112876v1 CI-20190529: 20190529 CI_DRM_12586: fa21fb1326b89fe3d376d82a6ce95d7cf0bcefb1 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_7119: 1e6d24e6dfa42b22f950f7d5e436b8f9acf8747f @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git Patchwork_112876v1: fa21fb1326b89fe3d376d82a6ce95d7cf0bcefb1 @ git://anongit.freedesktop.org/gfx-ci/linux ### Linux commits fc1ec7133c92 drm/i915: Implement UHBR bandwidth check 481c6c5a96b2 drm/i915: Add generic constraint checker when determining DP MST DSC bpp == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v1/index.html [-- Attachment #2: Type: text/html, Size: 6786 bytes --] ^ permalink raw reply [flat|nested] 11+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for We need to have additional checks for DP MST UHBR 2023-01-16 11:19 [Intel-gfx] [PATCH 0/2] We need to have additional checks for DP MST UHBR Stanislav Lisovskiy ` (2 preceding siblings ...) 2023-01-16 12:11 ` [Intel-gfx] ✓ Fi.CI.BAT: success for We need to have additional checks for DP MST UHBR Patchwork @ 2023-01-16 13:56 ` Patchwork 3 siblings, 0 replies; 11+ messages in thread From: Patchwork @ 2023-01-16 13:56 UTC (permalink / raw) To: Stanislav Lisovskiy; +Cc: intel-gfx [-- Attachment #1: Type: text/plain, Size: 22408 bytes --] == Series Details == Series: We need to have additional checks for DP MST UHBR URL : https://patchwork.freedesktop.org/series/112876/ State : success == Summary == CI Bug Log - changes from CI_DRM_12586_full -> Patchwork_112876v1_full ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v1/index.html Participating hosts (13 -> 10) ------------------------------ Missing (3): pig-skl-6260u pig-kbl-iris pig-glk-j5005 Known issues ------------ Here are the changes found in Patchwork_112876v1_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_exec_fair@basic-pace-share@rcs0: - shard-glk: [PASS][1] -> [FAIL][2] ([i915#2842]) +1 similar issue [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12586/shard-glk1/igt@gem_exec_fair@basic-pace-share@rcs0.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v1/shard-glk4/igt@gem_exec_fair@basic-pace-share@rcs0.html * igt@kms_ccs@pipe-c-random-ccs-data-y_tiled_ccs: - shard-glk: NOTRUN -> [SKIP][3] ([fdo#109271]) +4 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v1/shard-glk4/igt@kms_ccs@pipe-c-random-ccs-data-y_tiled_ccs.html * igt@kms_flip@flip-vs-expired-vblank-interruptible@a-hdmi-a1: - shard-glk: [PASS][4] -> [FAIL][5] ([i915#79]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12586/shard-glk6/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-hdmi-a1.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v1/shard-glk8/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-hdmi-a1.html * igt@perf@stress-open-close: - shard-glk: [PASS][6] -> [INCOMPLETE][7] ([i915#5213]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12586/shard-glk2/igt@perf@stress-open-close.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v1/shard-glk5/igt@perf@stress-open-close.html * igt@runner@aborted: - shard-glk: NOTRUN -> [FAIL][8] ([i915#4312]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v1/shard-glk5/igt@runner@aborted.html #### Possible fixes #### * igt@drm_fdinfo@idle@rcs0: - {shard-rkl}: [FAIL][9] ([i915#7742]) -> [PASS][10] [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12586/shard-rkl-4/igt@drm_fdinfo@idle@rcs0.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v1/shard-rkl-5/igt@drm_fdinfo@idle@rcs0.html * igt@fbdev@eof: - {shard-rkl}: [SKIP][11] ([i915#2582]) -> [PASS][12] [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12586/shard-rkl-1/igt@fbdev@eof.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v1/shard-rkl-6/igt@fbdev@eof.html * igt@fbdev@write: - {shard-dg1}: [FAIL][13] ([i915#7863]) -> [PASS][14] [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12586/shard-dg1-13/igt@fbdev@write.html [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v1/shard-dg1-19/igt@fbdev@write.html * igt@gem_eio@in-flight-suspend: - {shard-rkl}: [FAIL][15] ([fdo#103375]) -> [PASS][16] +1 similar issue [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12586/shard-rkl-3/igt@gem_eio@in-flight-suspend.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v1/shard-rkl-1/igt@gem_eio@in-flight-suspend.html * igt@gem_eio@suspend: - {shard-rkl}: [FAIL][17] ([i915#7052]) -> [PASS][18] +1 similar issue [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12586/shard-rkl-3/igt@gem_eio@suspend.html [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v1/shard-rkl-5/igt@gem_eio@suspend.html * igt@gem_exec_fair@basic-none-rrul@rcs0: - {shard-rkl}: [FAIL][19] ([i915#2842]) -> [PASS][20] [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12586/shard-rkl-4/igt@gem_exec_fair@basic-none-rrul@rcs0.html [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v1/shard-rkl-5/igt@gem_exec_fair@basic-none-rrul@rcs0.html * igt@gem_exec_reloc@basic-gtt-read-noreloc: - {shard-rkl}: [SKIP][21] ([i915#3281]) -> [PASS][22] +9 similar issues [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12586/shard-rkl-4/igt@gem_exec_reloc@basic-gtt-read-noreloc.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v1/shard-rkl-5/igt@gem_exec_reloc@basic-gtt-read-noreloc.html * igt@gem_pwrite@basic-self: - {shard-rkl}: [SKIP][23] ([i915#3282]) -> [PASS][24] +4 similar issues [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12586/shard-rkl-4/igt@gem_pwrite@basic-self.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v1/shard-rkl-5/igt@gem_pwrite@basic-self.html * igt@gen9_exec_parse@batch-invalid-length: - {shard-rkl}: [SKIP][25] ([i915#2527]) -> [PASS][26] +2 similar issues [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12586/shard-rkl-4/igt@gen9_exec_parse@batch-invalid-length.html [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v1/shard-rkl-5/igt@gen9_exec_parse@batch-invalid-length.html * igt@i915_hangman@engine-engine-error@bcs0: - {shard-rkl}: [SKIP][27] ([i915#6258]) -> [PASS][28] [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12586/shard-rkl-5/igt@i915_hangman@engine-engine-error@bcs0.html [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v1/shard-rkl-6/igt@i915_hangman@engine-engine-error@bcs0.html * igt@i915_pm_rpm@dpms-mode-unset-lpsp: - {shard-rkl}: [SKIP][29] ([i915#1397]) -> [PASS][30] [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12586/shard-rkl-1/igt@i915_pm_rpm@dpms-mode-unset-lpsp.html [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v1/shard-rkl-6/igt@i915_pm_rpm@dpms-mode-unset-lpsp.html * igt@i915_pm_sseu@full-enable: - {shard-rkl}: [SKIP][31] ([i915#4387]) -> [PASS][32] [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12586/shard-rkl-3/igt@i915_pm_sseu@full-enable.html [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v1/shard-rkl-5/igt@i915_pm_sseu@full-enable.html * igt@kms_atomic@crtc-invalid-params-fence: - {shard-rkl}: [SKIP][33] ([i915#1845] / [i915#4098]) -> [PASS][34] +14 similar issues [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12586/shard-rkl-5/igt@kms_atomic@crtc-invalid-params-fence.html [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v1/shard-rkl-6/igt@kms_atomic@crtc-invalid-params-fence.html * igt@kms_atomic@plane-invalid-params-fence: - {shard-tglu}: [SKIP][35] ([i915#1845] / [i915#7651]) -> [PASS][36] [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12586/shard-tglu-6/igt@kms_atomic@plane-invalid-params-fence.html [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v1/shard-tglu-4/igt@kms_atomic@plane-invalid-params-fence.html * igt@kms_ccs@pipe-c-crc-primary-rotation-180-y_tiled_gen12_rc_ccs: - {shard-tglu}: [SKIP][37] ([i915#7651]) -> [PASS][38] +7 similar issues [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12586/shard-tglu-6/igt@kms_ccs@pipe-c-crc-primary-rotation-180-y_tiled_gen12_rc_ccs.html [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v1/shard-tglu-4/igt@kms_ccs@pipe-c-crc-primary-rotation-180-y_tiled_gen12_rc_ccs.html * igt@kms_cursor_legacy@flip-vs-cursor-crc-atomic: - {shard-tglu}: [SKIP][39] ([i915#1845]) -> [PASS][40] [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12586/shard-tglu-6/igt@kms_cursor_legacy@flip-vs-cursor-crc-atomic.html [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v1/shard-tglu-4/igt@kms_cursor_legacy@flip-vs-cursor-crc-atomic.html * igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions-varying-size: - shard-glk: [FAIL][41] ([i915#2346]) -> [PASS][42] +1 similar issue [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12586/shard-glk3/igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions-varying-size.html [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v1/shard-glk3/igt@kms_cursor_legacy@flip-vs-cursor@atomic-transitions-varying-size.html * igt@kms_fbcon_fbt@psr: - {shard-rkl}: [SKIP][43] ([fdo#110189] / [i915#3955]) -> [PASS][44] [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12586/shard-rkl-1/igt@kms_fbcon_fbt@psr.html [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v1/shard-rkl-6/igt@kms_fbcon_fbt@psr.html * igt@kms_flip@flip-vs-expired-vblank@a-hdmi-a1: - shard-glk: [FAIL][45] ([i915#79]) -> [PASS][46] [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12586/shard-glk9/igt@kms_flip@flip-vs-expired-vblank@a-hdmi-a1.html [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v1/shard-glk6/igt@kms_flip@flip-vs-expired-vblank@a-hdmi-a1.html * igt@kms_flip@plain-flip-fb-recreate@b-hdmi-a1: - shard-glk: [FAIL][47] ([i915#2122]) -> [PASS][48] [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12586/shard-glk2/igt@kms_flip@plain-flip-fb-recreate@b-hdmi-a1.html [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v1/shard-glk5/igt@kms_flip@plain-flip-fb-recreate@b-hdmi-a1.html * igt@kms_frontbuffer_tracking@fbc-tiling-linear: - {shard-rkl}: [SKIP][49] ([i915#1849] / [i915#4098]) -> [PASS][50] +15 similar issues [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12586/shard-rkl-5/igt@kms_frontbuffer_tracking@fbc-tiling-linear.html [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v1/shard-rkl-6/igt@kms_frontbuffer_tracking@fbc-tiling-linear.html * igt@kms_hdmi_inject@inject-audio: - {shard-rkl}: [SKIP][51] ([i915#433]) -> [PASS][52] [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12586/shard-rkl-4/igt@kms_hdmi_inject@inject-audio.html [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v1/shard-rkl-5/igt@kms_hdmi_inject@inject-audio.html * igt@kms_properties@plane-properties-atomic: - {shard-tglu}: [SKIP][53] ([i915#1849]) -> [PASS][54] +1 similar issue [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12586/shard-tglu-6/igt@kms_properties@plane-properties-atomic.html [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v1/shard-tglu-4/igt@kms_properties@plane-properties-atomic.html * igt@kms_psr@sprite_plane_onoff: - {shard-rkl}: [SKIP][55] ([i915#1072]) -> [PASS][56] +1 similar issue [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12586/shard-rkl-5/igt@kms_psr@sprite_plane_onoff.html [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v1/shard-rkl-6/igt@kms_psr@sprite_plane_onoff.html * igt@kms_psr_stress_test@flip-primary-invalidate-overlay: - {shard-rkl}: [SKIP][57] ([i915#5461]) -> [PASS][58] [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12586/shard-rkl-1/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v1/shard-rkl-6/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html * igt@kms_universal_plane@cursor-fb-leak-pipe-d: - {shard-tglu}: [SKIP][59] ([fdo#109274]) -> [PASS][60] +1 similar issue [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12586/shard-tglu-6/igt@kms_universal_plane@cursor-fb-leak-pipe-d.html [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v1/shard-tglu-4/igt@kms_universal_plane@cursor-fb-leak-pipe-d.html * igt@perf@polling-small-buf: - {shard-rkl}: [FAIL][61] ([i915#1722]) -> [PASS][62] [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12586/shard-rkl-3/igt@perf@polling-small-buf.html [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v1/shard-rkl-1/igt@perf@polling-small-buf.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375 [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274 [fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279 [fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280 [fdo#109283]: https://bugs.freedesktop.org/show_bug.cgi?id=109283 [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285 [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289 [fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291 [fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295 [fdo#109312]: https://bugs.freedesktop.org/show_bug.cgi?id=109312 [fdo#109313]: https://bugs.freedesktop.org/show_bug.cgi?id=109313 [fdo#109314]: https://bugs.freedesktop.org/show_bug.cgi?id=109314 [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315 [fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506 [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642 [fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189 [fdo#110542]: https://bugs.freedesktop.org/show_bug.cgi?id=110542 [fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723 [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068 [fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614 [fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615 [fdo#111644]: https://bugs.freedesktop.org/show_bug.cgi?id=111644 [fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825 [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827 [fdo#112054]: https://bugs.freedesktop.org/show_bug.cgi?id=112054 [fdo#112283]: https://bugs.freedesktop.org/show_bug.cgi?id=112283 [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072 [i915#132]: https://gitlab.freedesktop.org/drm/intel/issues/132 [i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397 [i915#1722]: https://gitlab.freedesktop.org/drm/intel/issues/1722 [i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825 [i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839 [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845 [i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849 [i915#1902]: https://gitlab.freedesktop.org/drm/intel/issues/1902 [i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122 [i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346 [i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437 [i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527 [i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575 [i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582 [i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587 [i915#2658]: https://gitlab.freedesktop.org/drm/intel/issues/2658 [i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672 [i915#2681]: https://gitlab.freedesktop.org/drm/intel/issues/2681 [i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705 [i915#280]: https://gitlab.freedesktop.org/drm/intel/issues/280 [i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842 [i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856 [i915#2920]: https://gitlab.freedesktop.org/drm/intel/issues/2920 [i915#2994]: https://gitlab.freedesktop.org/drm/intel/issues/2994 [i915#3116]: https://gitlab.freedesktop.org/drm/intel/issues/3116 [i915#315]: https://gitlab.freedesktop.org/drm/intel/issues/315 [i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281 [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282 [i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291 [i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297 [i915#3299]: https://gitlab.freedesktop.org/drm/intel/issues/3299 [i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301 [i915#3318]: https://gitlab.freedesktop.org/drm/intel/issues/3318 [i915#3323]: https://gitlab.freedesktop.org/drm/intel/issues/3323 [i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359 [i915#3361]: https://gitlab.freedesktop.org/drm/intel/issues/3361 [i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458 [i915#3536]: https://gitlab.freedesktop.org/drm/intel/issues/3536 [i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539 [i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546 [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555 [i915#3558]: https://gitlab.freedesktop.org/drm/intel/issues/3558 [i915#3591]: https://gitlab.freedesktop.org/drm/intel/issues/3591 [i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637 [i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638 [i915#3639]: https://gitlab.freedesktop.org/drm/intel/issues/3639 [i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689 [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708 [i915#3734]: https://gitlab.freedesktop.org/drm/intel/issues/3734 [i915#3742]: https://gitlab.freedesktop.org/drm/intel/issues/3742 [i915#3825]: https://gitlab.freedesktop.org/drm/intel/issues/3825 [i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840 [i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886 [i915#3955]: https://gitlab.freedesktop.org/drm/intel/issues/3955 [i915#3966]: https://gitlab.freedesktop.org/drm/intel/issues/3966 [i915#404]: https://gitlab.freedesktop.org/drm/intel/issues/404 [i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070 [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077 [i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078 [i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098 [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103 [i915#426]: https://gitlab.freedesktop.org/drm/intel/issues/426 [i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270 [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312 [i915#433]: https://gitlab.freedesktop.org/drm/intel/issues/433 [i915#4387]: https://gitlab.freedesktop.org/drm/intel/issues/4387 [i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538 [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613 [i915#4767]: https://gitlab.freedesktop.org/drm/intel/issues/4767 [i915#4833]: https://gitlab.freedesktop.org/drm/intel/issues/4833 [i915#5030]: https://gitlab.freedesktop.org/drm/intel/issues/5030 [i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176 [i915#5213]: https://gitlab.freedesktop.org/drm/intel/issues/5213 [i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235 [i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286 [i915#5288]: https://gitlab.freedesktop.org/drm/intel/issues/5288 [i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289 [i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325 [i915#5327]: https://gitlab.freedesktop.org/drm/intel/issues/5327 [i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533 [i915#5439]: https://gitlab.freedesktop.org/drm/intel/issues/5439 [i915#5461]: https://gitlab.freedesktop.org/drm/intel/issues/5461 [i915#5723]: https://gitlab.freedesktop.org/drm/intel/issues/5723 [i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095 [i915#6117]: https://gitlab.freedesktop.org/drm/intel/issues/6117 [i915#6230]: https://gitlab.freedesktop.org/drm/intel/issues/6230 [i915#6245]: https://gitlab.freedesktop.org/drm/intel/issues/6245 [i915#6247]: https://gitlab.freedesktop.org/drm/intel/issues/6247 [i915#6248]: https://gitlab.freedesktop.org/drm/intel/issues/6248 [i915#6258]: https://gitlab.freedesktop.org/drm/intel/issues/6258 [i915#6301]: https://gitlab.freedesktop.org/drm/intel/issues/6301 [i915#6335]: https://gitlab.freedesktop.org/drm/intel/issues/6335 [i915#6497]: https://gitlab.freedesktop.org/drm/intel/issues/6497 [i915#6524]: https://gitlab.freedesktop.org/drm/intel/issues/6524 [i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658 [i915#6768]: https://gitlab.freedesktop.org/drm/intel/issues/6768 [i915#6944]: https://gitlab.freedesktop.org/drm/intel/issues/6944 [i915#6946]: https://gitlab.freedesktop.org/drm/intel/issues/6946 [i915#6953]: https://gitlab.freedesktop.org/drm/intel/issues/6953 [i915#7037]: https://gitlab.freedesktop.org/drm/intel/issues/7037 [i915#7052]: https://gitlab.freedesktop.org/drm/intel/issues/7052 [i915#7116]: https://gitlab.freedesktop.org/drm/intel/issues/7116 [i915#7118]: https://gitlab.freedesktop.org/drm/intel/issues/7118 [i915#7456]: https://gitlab.freedesktop.org/drm/intel/issues/7456 [i915#7561]: https://gitlab.freedesktop.org/drm/intel/issues/7561 [i915#7651]: https://gitlab.freedesktop.org/drm/intel/issues/7651 [i915#7697]: https://gitlab.freedesktop.org/drm/intel/issues/7697 [i915#7701]: https://gitlab.freedesktop.org/drm/intel/issues/7701 [i915#7707]: https://gitlab.freedesktop.org/drm/intel/issues/7707 [i915#7742]: https://gitlab.freedesktop.org/drm/intel/issues/7742 [i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828 [i915#7863]: https://gitlab.freedesktop.org/drm/intel/issues/7863 [i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79 Build changes ------------- * Linux: CI_DRM_12586 -> Patchwork_112876v1 * Piglit: piglit_4509 -> None CI-20190529: 20190529 CI_DRM_12586: fa21fb1326b89fe3d376d82a6ce95d7cf0bcefb1 @ git://anongit.freedesktop.org/gfx-ci/linux IGT_7119: 1e6d24e6dfa42b22f950f7d5e436b8f9acf8747f @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git Patchwork_112876v1: fa21fb1326b89fe3d376d82a6ce95d7cf0bcefb1 @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_112876v1/index.html [-- Attachment #2: Type: text/html, Size: 16683 bytes --] ^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2023-02-01 12:47 UTC | newest] Thread overview: 11+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2023-01-16 11:19 [Intel-gfx] [PATCH 0/2] We need to have additional checks for DP MST UHBR Stanislav Lisovskiy 2023-01-16 11:19 ` [Intel-gfx] [PATCH 1/2] drm/i915: Add generic constraint checker when determining DP MST DSC bpp Stanislav Lisovskiy 2023-01-16 11:19 ` [Intel-gfx] [PATCH 2/2] drm/i915: Implement UHBR bandwidth check Stanislav Lisovskiy 2023-01-24 18:43 ` Rodrigo Vivi 2023-01-31 15:00 ` Ville Syrjälä 2023-01-31 15:20 ` Lisovskiy, Stanislav 2023-01-31 15:41 ` Ville Syrjälä 2023-02-01 11:00 ` Lisovskiy, Stanislav 2023-02-01 12:47 ` Ville Syrjälä 2023-01-16 12:11 ` [Intel-gfx] ✓ Fi.CI.BAT: success for We need to have additional checks for DP MST UHBR Patchwork 2023-01-16 13:56 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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