* [Intel-gfx] [PATCH] drm/i915/display: add intel_display_limits.h for key enums
@ 2023-01-16 16:46 Jani Nikula
2023-01-16 17:38 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/display: add intel_display_limits.h for key enums (rev2) Patchwork
` (5 more replies)
0 siblings, 6 replies; 9+ messages in thread
From: Jani Nikula @ 2023-01-16 16:46 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
Move a handful of key enums to a new file intel_display_limits.h. These
are the enum types, and the MAX/NUM enumerations within them, that are
used in other headers. Otherwise, there's no common theme between them.
Replace intel_display.h include with intel_display_limit.h where
relevant, and add the intel_display.h include directly in the .c files
where needed.
Since intel_display.h is used almost everywhere in display/, include it
from intel_display_types.h to avoid massive changes across the
board. There are very few files that would need intel_display_types.h
but not intel_display.h so this is neglible, and further cleanup between
these headers can be left for the future.
Overall this change drops the direct and indirect dependencies on
intel_display.h from about 300 to about 100 compilation units, because
we can drop the include from i915_drv.h.
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
N.b. intel_display_limits.h is not a great name. I was hoping it was
only needed for the MAX/NUM enumerations such as I915_MAX_PIPES but
there are a number of headers that use the types for struct members as
well. intel_display_enums.h sounds too generic too. Suggestions?
---
drivers/gpu/drm/i915/display/intel_bw.h | 2 +-
drivers/gpu/drm/i915/display/intel_cdclk.h | 2 +-
drivers/gpu/drm/i915/display/intel_display.h | 115 +---------------
.../gpu/drm/i915/display/intel_display_core.h | 2 +-
.../drm/i915/display/intel_display_limits.h | 124 ++++++++++++++++++
.../i915/display/intel_display_power_map.c | 1 +
.../drm/i915/display/intel_display_types.h | 1 +
drivers/gpu/drm/i915/display/intel_dvo_dev.h | 2 +-
drivers/gpu/drm/i915/display/skl_watermark.h | 2 +-
drivers/gpu/drm/i915/gem/i915_gem_create.c | 1 +
drivers/gpu/drm/i915/gem/i915_gem_domain.c | 1 +
drivers/gpu/drm/i915/gt/intel_ggtt.c | 1 +
drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c | 1 +
drivers/gpu/drm/i915/gt/intel_rps.c | 1 +
drivers/gpu/drm/i915/gvt/cmd_parser.c | 1 +
drivers/gpu/drm/i915/gvt/display.c | 1 +
drivers/gpu/drm/i915/gvt/fb_decoder.h | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 2 +-
drivers/gpu/drm/i915/i915_pci.c | 1 +
drivers/gpu/drm/i915/i915_vma.c | 1 +
drivers/gpu/drm/i915/intel_device_info.c | 1 +
drivers/gpu/drm/i915/intel_device_info.h | 2 +-
drivers/gpu/drm/i915/intel_gvt_mmio_table.c | 1 +
drivers/gpu/drm/i915/intel_pm.c | 1 +
drivers/gpu/drm/i915/intel_pm_types.h | 2 +-
drivers/gpu/drm/i915/vlv_sideband.c | 1 +
26 files changed, 149 insertions(+), 123 deletions(-)
create mode 100644 drivers/gpu/drm/i915/display/intel_display_limits.h
diff --git a/drivers/gpu/drm/i915/display/intel_bw.h b/drivers/gpu/drm/i915/display/intel_bw.h
index cb7ee3a24a58..f20292143745 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.h
+++ b/drivers/gpu/drm/i915/display/intel_bw.h
@@ -8,7 +8,7 @@
#include <drm/drm_atomic.h>
-#include "intel_display.h"
+#include "intel_display_limits.h"
#include "intel_display_power.h"
#include "intel_global_state.h"
diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.h b/drivers/gpu/drm/i915/display/intel_cdclk.h
index c674879a84a5..51e2f6a11ce4 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.h
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.h
@@ -8,7 +8,7 @@
#include <linux/types.h>
-#include "intel_display.h"
+#include "intel_display_limits.h"
#include "intel_global_state.h"
struct drm_i915_private;
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index ef73730f32b0..cb6f520cc575 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -28,6 +28,7 @@
#include <drm/drm_util.h>
#include "i915_reg_defs.h"
+#include "intel_display_limits.h"
enum drm_scaling_filter;
struct dpll;
@@ -62,51 +63,9 @@ struct intel_remapped_info;
struct intel_rotation_info;
struct pci_dev;
-/*
- * Keep the pipe enum values fixed: the code assumes that PIPE_A=0, the
- * rest have consecutive values and match the enum values of transcoders
- * with a 1:1 transcoder -> pipe mapping.
- */
-enum pipe {
- INVALID_PIPE = -1,
-
- PIPE_A = 0,
- PIPE_B,
- PIPE_C,
- PIPE_D,
- _PIPE_EDP,
-
- I915_MAX_PIPES = _PIPE_EDP
-};
#define pipe_name(p) ((p) + 'A')
-enum transcoder {
- INVALID_TRANSCODER = -1,
- /*
- * The following transcoders have a 1:1 transcoder -> pipe mapping,
- * keep their values fixed: the code assumes that TRANSCODER_A=0, the
- * rest have consecutive values and match the enum values of the pipes
- * they map to.
- */
- TRANSCODER_A = PIPE_A,
- TRANSCODER_B = PIPE_B,
- TRANSCODER_C = PIPE_C,
- TRANSCODER_D = PIPE_D,
-
- /*
- * The following transcoders can map to any pipe, their enum value
- * doesn't need to stay fixed.
- */
- TRANSCODER_EDP,
- TRANSCODER_DSI_0,
- TRANSCODER_DSI_1,
- TRANSCODER_DSI_A = TRANSCODER_DSI_0, /* legacy DSI */
- TRANSCODER_DSI_C = TRANSCODER_DSI_1, /* legacy DSI */
-
- I915_MAX_TRANSCODERS
-};
-
static inline const char *transcoder_name(enum transcoder transcoder)
{
switch (transcoder) {
@@ -147,29 +106,6 @@ enum i9xx_plane_id {
#define plane_name(p) ((p) + 'A')
#define sprite_name(p, s) ((p) * RUNTIME_INFO(dev_priv)->num_sprites[(p)] + (s) + 'A')
-/*
- * Per-pipe plane identifier.
- * I915_MAX_PLANES in the enum below is the maximum (across all platforms)
- * number of planes per CRTC. Not all platforms really have this many planes,
- * which means some arrays of size I915_MAX_PLANES may have unused entries
- * between the topmost sprite plane and the cursor plane.
- *
- * This is expected to be passed to various register macros
- * (eg. PLANE_CTL(), PS_PLANE_SEL(), etc.) so adjust with care.
- */
-enum plane_id {
- PLANE_PRIMARY,
- PLANE_SPRITE0,
- PLANE_SPRITE1,
- PLANE_SPRITE2,
- PLANE_SPRITE3,
- PLANE_SPRITE4,
- PLANE_SPRITE5,
- PLANE_CURSOR,
-
- I915_MAX_PLANES,
-};
-
#define for_each_plane_id_on_crtc(__crtc, __p) \
for ((__p) = PLANE_PRIMARY; (__p) < I915_MAX_PLANES; (__p)++) \
for_each_if((__crtc)->plane_ids_mask & BIT(__p))
@@ -182,34 +118,6 @@ enum plane_id {
for_each_dbuf_slice((__dev_priv), (__slice)) \
for_each_if((__mask) & BIT(__slice))
-enum port {
- PORT_NONE = -1,
-
- PORT_A = 0,
- PORT_B,
- PORT_C,
- PORT_D,
- PORT_E,
- PORT_F,
- PORT_G,
- PORT_H,
- PORT_I,
-
- /* tgl+ */
- PORT_TC1 = PORT_D,
- PORT_TC2,
- PORT_TC3,
- PORT_TC4,
- PORT_TC5,
- PORT_TC6,
-
- /* XE_LPD repositions D/E offsets and bitfields */
- PORT_D_XELPD = PORT_TC5,
- PORT_E_XELPD,
-
- I915_MAX_PORTS
-};
-
#define port_name(p) ((p) + 'A')
/*
@@ -312,27 +220,6 @@ enum phy_fia {
FIA3,
};
-enum hpd_pin {
- HPD_NONE = 0,
- HPD_TV = HPD_NONE, /* TV is known to be unreliable */
- HPD_CRT,
- HPD_SDVO_B,
- HPD_SDVO_C,
- HPD_PORT_A,
- HPD_PORT_B,
- HPD_PORT_C,
- HPD_PORT_D,
- HPD_PORT_E,
- HPD_PORT_TC1,
- HPD_PORT_TC2,
- HPD_PORT_TC3,
- HPD_PORT_TC4,
- HPD_PORT_TC5,
- HPD_PORT_TC6,
-
- HPD_NUM_PINS
-};
-
#define for_each_hpd_pin(__pin) \
for ((__pin) = (HPD_NONE + 1); (__pin) < HPD_NUM_PINS; (__pin)++)
diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h
index 57ddce3ba02b..1d5d9d56fb3f 100644
--- a/drivers/gpu/drm/i915/display/intel_display_core.h
+++ b/drivers/gpu/drm/i915/display/intel_display_core.h
@@ -17,7 +17,7 @@
#include <drm/drm_modeset_lock.h>
#include "intel_cdclk.h"
-#include "intel_display.h"
+#include "intel_display_limits.h"
#include "intel_display_power.h"
#include "intel_dmc.h"
#include "intel_dpll_mgr.h"
diff --git a/drivers/gpu/drm/i915/display/intel_display_limits.h b/drivers/gpu/drm/i915/display/intel_display_limits.h
new file mode 100644
index 000000000000..5126d0b5ae5d
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_display_limits.h
@@ -0,0 +1,124 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2022 Intel Corporation
+ */
+
+#ifndef __INTEL_DISPLAY_LIMITS_H__
+#define __INTEL_DISPLAY_LIMITS_H__
+
+/*
+ * Keep the pipe enum values fixed: the code assumes that PIPE_A=0, the
+ * rest have consecutive values and match the enum values of transcoders
+ * with a 1:1 transcoder -> pipe mapping.
+ */
+enum pipe {
+ INVALID_PIPE = -1,
+
+ PIPE_A = 0,
+ PIPE_B,
+ PIPE_C,
+ PIPE_D,
+ _PIPE_EDP,
+
+ I915_MAX_PIPES = _PIPE_EDP
+};
+
+enum transcoder {
+ INVALID_TRANSCODER = -1,
+ /*
+ * The following transcoders have a 1:1 transcoder -> pipe mapping,
+ * keep their values fixed: the code assumes that TRANSCODER_A=0, the
+ * rest have consecutive values and match the enum values of the pipes
+ * they map to.
+ */
+ TRANSCODER_A = PIPE_A,
+ TRANSCODER_B = PIPE_B,
+ TRANSCODER_C = PIPE_C,
+ TRANSCODER_D = PIPE_D,
+
+ /*
+ * The following transcoders can map to any pipe, their enum value
+ * doesn't need to stay fixed.
+ */
+ TRANSCODER_EDP,
+ TRANSCODER_DSI_0,
+ TRANSCODER_DSI_1,
+ TRANSCODER_DSI_A = TRANSCODER_DSI_0, /* legacy DSI */
+ TRANSCODER_DSI_C = TRANSCODER_DSI_1, /* legacy DSI */
+
+ I915_MAX_TRANSCODERS
+};
+
+/*
+ * Per-pipe plane identifier.
+ * I915_MAX_PLANES in the enum below is the maximum (across all platforms)
+ * number of planes per CRTC. Not all platforms really have this many planes,
+ * which means some arrays of size I915_MAX_PLANES may have unused entries
+ * between the topmost sprite plane and the cursor plane.
+ *
+ * This is expected to be passed to various register macros
+ * (eg. PLANE_CTL(), PS_PLANE_SEL(), etc.) so adjust with care.
+ */
+enum plane_id {
+ PLANE_PRIMARY,
+ PLANE_SPRITE0,
+ PLANE_SPRITE1,
+ PLANE_SPRITE2,
+ PLANE_SPRITE3,
+ PLANE_SPRITE4,
+ PLANE_SPRITE5,
+ PLANE_CURSOR,
+
+ I915_MAX_PLANES,
+};
+
+enum port {
+ PORT_NONE = -1,
+
+ PORT_A = 0,
+ PORT_B,
+ PORT_C,
+ PORT_D,
+ PORT_E,
+ PORT_F,
+ PORT_G,
+ PORT_H,
+ PORT_I,
+
+ /* tgl+ */
+ PORT_TC1 = PORT_D,
+ PORT_TC2,
+ PORT_TC3,
+ PORT_TC4,
+ PORT_TC5,
+ PORT_TC6,
+
+ /* XE_LPD repositions D/E offsets and bitfields */
+ PORT_D_XELPD = PORT_TC5,
+ PORT_E_XELPD,
+
+ I915_MAX_PORTS
+};
+
+enum hpd_pin {
+ HPD_NONE = 0,
+ HPD_TV = HPD_NONE, /* TV is known to be unreliable */
+ HPD_CRT,
+ HPD_SDVO_B,
+ HPD_SDVO_C,
+ HPD_PORT_A,
+ HPD_PORT_B,
+ HPD_PORT_C,
+ HPD_PORT_D,
+ HPD_PORT_E,
+ HPD_PORT_TC1,
+ HPD_PORT_TC2,
+ HPD_PORT_TC3,
+ HPD_PORT_TC4,
+ HPD_PORT_TC5,
+ HPD_PORT_TC6,
+
+ HPD_NUM_PINS
+};
+
+#endif /* __INTEL_DISPLAY_LIMITS_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_display_power_map.c b/drivers/gpu/drm/i915/display/intel_display_power_map.c
index f5d66ca85b19..6645eb1911d8 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power_map.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power_map.c
@@ -10,6 +10,7 @@
#include "intel_display_power_map.h"
#include "intel_display_power_well.h"
+#include "intel_display_types.h"
#define __LIST_INLINE_ELEMS(__elem_type, ...) \
((__elem_type[]) { __VA_ARGS__ })
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 32e8b2fc3cc6..8f3d5d02e207 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -50,6 +50,7 @@
#include "i915_vma_types.h"
#include "intel_bios.h"
#include "intel_display.h"
+#include "intel_display_limits.h"
#include "intel_display_power.h"
#include "intel_dpll_mgr.h"
#include "intel_pm_types.h"
diff --git a/drivers/gpu/drm/i915/display/intel_dvo_dev.h b/drivers/gpu/drm/i915/display/intel_dvo_dev.h
index ea8eb7dcee38..f7e98e1c6470 100644
--- a/drivers/gpu/drm/i915/display/intel_dvo_dev.h
+++ b/drivers/gpu/drm/i915/display/intel_dvo_dev.h
@@ -25,7 +25,7 @@
#include "i915_reg_defs.h"
-#include "intel_display.h"
+#include "intel_display_limits.h"
enum drm_connector_status;
struct drm_display_mode;
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.h b/drivers/gpu/drm/i915/display/skl_watermark.h
index 7a5a4e67cd73..37954c472070 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.h
+++ b/drivers/gpu/drm/i915/display/skl_watermark.h
@@ -8,7 +8,7 @@
#include <linux/types.h>
-#include "intel_display.h"
+#include "intel_display_limits.h"
#include "intel_global_state.h"
#include "intel_pm_types.h"
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_create.c b/drivers/gpu/drm/i915/gem/i915_gem_create.c
index 005a7f842784..e76c9703680e 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_create.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_create.c
@@ -5,6 +5,7 @@
#include <drm/drm_fourcc.h>
+#include "display/intel_display.h"
#include "gem/i915_gem_ioctls.h"
#include "gem/i915_gem_lmem.h"
#include "gem/i915_gem_region.h"
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_domain.c b/drivers/gpu/drm/i915/gem/i915_gem_domain.c
index 9969e687ad85..497de40b8e68 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_domain.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_domain.c
@@ -4,6 +4,7 @@
* Copyright © 2014-2016 Intel Corporation
*/
+#include "display/intel_display.h"
#include "display/intel_frontbuffer.h"
#include "gt/intel_gt.h"
diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c b/drivers/gpu/drm/i915/gt/intel_ggtt.c
index 0c7fe360f873..b2f3f49f418f 100644
--- a/drivers/gpu/drm/i915/gt/intel_ggtt.c
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c
@@ -12,6 +12,7 @@
#include <drm/i915_drm.h>
#include <drm/intel-gtt.h>
+#include "display/intel_display.h"
#include "gem/i915_gem_lmem.h"
#include "intel_ggtt_gmch.h"
diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
index 7ac8ed13e1fe..37d0b0fe791d 100644
--- a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
+++ b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
@@ -5,6 +5,7 @@
#include <linux/highmem.h>
+#include "display/intel_display.h"
#include "i915_drv.h"
#include "i915_reg.h"
#include "i915_scatterlist.h"
diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c
index 9ad3bc7201cb..f5d7b5126433 100644
--- a/drivers/gpu/drm/i915/gt/intel_rps.c
+++ b/drivers/gpu/drm/i915/gt/intel_rps.c
@@ -7,6 +7,7 @@
#include <drm/i915_drm.h>
+#include "display/intel_display.h"
#include "i915_drv.h"
#include "i915_irq.h"
#include "intel_breadcrumbs.h"
diff --git a/drivers/gpu/drm/i915/gvt/cmd_parser.c b/drivers/gpu/drm/i915/gvt/cmd_parser.c
index 0ebf5fbf0e39..3c4ae1da0d41 100644
--- a/drivers/gpu/drm/i915/gvt/cmd_parser.c
+++ b/drivers/gpu/drm/i915/gvt/cmd_parser.c
@@ -49,6 +49,7 @@
#include "i915_pvinfo.h"
#include "trace.h"
+#include "display/intel_display.h"
#include "gem/i915_gem_context.h"
#include "gem/i915_gem_pm.h"
#include "gt/intel_context.h"
diff --git a/drivers/gpu/drm/i915/gvt/display.c b/drivers/gpu/drm/i915/gvt/display.c
index c033249e73f4..4d898b14de93 100644
--- a/drivers/gpu/drm/i915/gvt/display.c
+++ b/drivers/gpu/drm/i915/gvt/display.c
@@ -36,6 +36,7 @@
#include "i915_reg.h"
#include "gvt.h"
+#include "display/intel_display.h"
#include "display/intel_dpio_phy.h"
static int get_edp_pipe(struct intel_vgpu *vgpu)
diff --git a/drivers/gpu/drm/i915/gvt/fb_decoder.h b/drivers/gpu/drm/i915/gvt/fb_decoder.h
index 0daa3931aef7..4eff44194439 100644
--- a/drivers/gpu/drm/i915/gvt/fb_decoder.h
+++ b/drivers/gpu/drm/i915/gvt/fb_decoder.h
@@ -38,7 +38,7 @@
#include <linux/types.h>
-#include "display/intel_display.h"
+#include "display/intel_display_limits.h"
struct intel_vgpu;
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 48fd82722f12..aa7901bf484f 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -36,7 +36,7 @@
#include <drm/ttm/ttm_device.h>
-#include "display/intel_display.h"
+#include "display/intel_display_limits.h"
#include "display/intel_display_core.h"
#include "gem/i915_gem_context_types.h"
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index bc1af7e8f398..c69637bf0ad7 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -26,6 +26,7 @@
#include <drm/drm_drv.h>
#include <drm/i915_pciids.h>
+#include "display/intel_display.h"
#include "gt/intel_gt_regs.h"
#include "gt/intel_sa_media.h"
diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
index 5272e2be990e..f51fd9fd4c89 100644
--- a/drivers/gpu/drm/i915/i915_vma.c
+++ b/drivers/gpu/drm/i915/i915_vma.c
@@ -26,6 +26,7 @@
#include <linux/dma-fence-array.h>
#include <drm/drm_gem.h>
+#include "display/intel_display.h"
#include "display/intel_frontbuffer.h"
#include "gem/i915_gem_lmem.h"
#include "gem/i915_gem_tiling.h"
diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index 05e90d09b208..98769e5f2c3d 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -29,6 +29,7 @@
#include "display/intel_cdclk.h"
#include "display/intel_de.h"
+#include "display/intel_display.h"
#include "gt/intel_gt_regs.h"
#include "i915_drv.h"
#include "i915_reg.h"
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index d588e5fd2eea..80bda653d61b 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -29,7 +29,7 @@
#include "intel_step.h"
-#include "display/intel_display.h"
+#include "display/intel_display_limits.h"
#include "gt/intel_engine_types.h"
#include "gt/intel_context_types.h"
diff --git a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c
index ce6b3c3b636a..1f4805aa2b08 100644
--- a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c
+++ b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c
@@ -5,6 +5,7 @@
#include "display/intel_audio_regs.h"
#include "display/intel_backlight_regs.h"
+#include "display/intel_display_types.h"
#include "display/intel_dmc_regs.h"
#include "display/intel_dpio_phy.h"
#include "display/vlv_dsi_pll_regs.h"
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 73c88b1c9545..3fc65bd12cc1 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -26,6 +26,7 @@
*/
#include "display/intel_de.h"
+#include "display/intel_display.h"
#include "display/intel_display_trace.h"
#include "display/skl_watermark.h"
diff --git a/drivers/gpu/drm/i915/intel_pm_types.h b/drivers/gpu/drm/i915/intel_pm_types.h
index 211632f58751..93152537b420 100644
--- a/drivers/gpu/drm/i915/intel_pm_types.h
+++ b/drivers/gpu/drm/i915/intel_pm_types.h
@@ -8,7 +8,7 @@
#include <linux/types.h>
-#include "display/intel_display.h"
+#include "display/intel_display_limits.h"
enum intel_ddb_partitioning {
INTEL_DDB_PART_1_2,
diff --git a/drivers/gpu/drm/i915/vlv_sideband.c b/drivers/gpu/drm/i915/vlv_sideband.c
index 6eea6e1a99c0..b98dec3ad817 100644
--- a/drivers/gpu/drm/i915/vlv_sideband.c
+++ b/drivers/gpu/drm/i915/vlv_sideband.c
@@ -9,6 +9,7 @@
#include "vlv_sideband.h"
#include "display/intel_dpio_phy.h"
+#include "display/intel_display_types.h"
/*
* IOSF sideband, see VLV2_SidebandMsg_HAS.docx and
--
2.34.1
^ permalink raw reply related [flat|nested] 9+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/display: add intel_display_limits.h for key enums (rev2)
2023-01-16 16:46 [Intel-gfx] [PATCH] drm/i915/display: add intel_display_limits.h for key enums Jani Nikula
@ 2023-01-16 17:38 ` Patchwork
2023-01-16 18:06 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
` (4 subsequent siblings)
5 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2023-01-16 17:38 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/display: add intel_display_limits.h for key enums (rev2)
URL : https://patchwork.freedesktop.org/series/111334/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
^ permalink raw reply [flat|nested] 9+ messages in thread
* [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/display: add intel_display_limits.h for key enums (rev2)
2023-01-16 16:46 [Intel-gfx] [PATCH] drm/i915/display: add intel_display_limits.h for key enums Jani Nikula
2023-01-16 17:38 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/display: add intel_display_limits.h for key enums (rev2) Patchwork
@ 2023-01-16 18:06 ` Patchwork
2023-01-16 19:24 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/display: add intel_display_limits.h for key enums (rev3) Patchwork
` (3 subsequent siblings)
5 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2023-01-16 18:06 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 10706 bytes --]
== Series Details ==
Series: drm/i915/display: add intel_display_limits.h for key enums (rev2)
URL : https://patchwork.freedesktop.org/series/111334/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12587 -> Patchwork_111334v2
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_111334v2 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_111334v2, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111334v2/index.html
Participating hosts (41 -> 44)
------------------------------
Additional (4): fi-kbl-soraka fi-ctg-p8600 fi-rkl-11600 bat-adls-5
Missing (1): fi-snb-2520m
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_111334v2:
### IGT changes ###
#### Possible regressions ####
* igt@i915_selftest@live@gem_contexts:
- fi-bsw-kefka: [PASS][1] -> [INCOMPLETE][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12587/fi-bsw-kefka/igt@i915_selftest@live@gem_contexts.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111334v2/fi-bsw-kefka/igt@i915_selftest@live@gem_contexts.html
Known issues
------------
Here are the changes found in Patchwork_111334v2 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@debugfs_test@basic-hwmon:
- fi-rkl-11600: NOTRUN -> [SKIP][3] ([i915#7456])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111334v2/fi-rkl-11600/igt@debugfs_test@basic-hwmon.html
* igt@gem_exec_gttfill@basic:
- fi-kbl-soraka: NOTRUN -> [SKIP][4] ([fdo#109271]) +15 similar issues
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111334v2/fi-kbl-soraka/igt@gem_exec_gttfill@basic.html
* igt@gem_huc_copy@huc-copy:
- fi-kbl-soraka: NOTRUN -> [SKIP][5] ([fdo#109271] / [i915#2190])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111334v2/fi-kbl-soraka/igt@gem_huc_copy@huc-copy.html
- fi-rkl-11600: NOTRUN -> [SKIP][6] ([i915#2190])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111334v2/fi-rkl-11600/igt@gem_huc_copy@huc-copy.html
* igt@gem_lmem_swapping@basic:
- fi-kbl-soraka: NOTRUN -> [SKIP][7] ([fdo#109271] / [i915#4613]) +3 similar issues
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111334v2/fi-kbl-soraka/igt@gem_lmem_swapping@basic.html
- fi-rkl-11600: NOTRUN -> [SKIP][8] ([i915#4613]) +3 similar issues
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111334v2/fi-rkl-11600/igt@gem_lmem_swapping@basic.html
* igt@gem_tiled_pread_basic:
- fi-rkl-11600: NOTRUN -> [SKIP][9] ([i915#3282])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111334v2/fi-rkl-11600/igt@gem_tiled_pread_basic.html
* igt@i915_pm_backlight@basic-brightness:
- fi-rkl-11600: NOTRUN -> [SKIP][10] ([i915#7561])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111334v2/fi-rkl-11600/igt@i915_pm_backlight@basic-brightness.html
* igt@i915_selftest@live@gt_pm:
- fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][11] ([i915#1886])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111334v2/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html
* igt@i915_selftest@live@guc_multi_lrc:
- fi-kbl-soraka: NOTRUN -> [INCOMPLETE][12] ([i915#5334] / [i915#7640])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111334v2/fi-kbl-soraka/igt@i915_selftest@live@guc_multi_lrc.html
* igt@i915_suspend@basic-s3-without-i915:
- fi-rkl-11600: NOTRUN -> [INCOMPLETE][13] ([i915#4817])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111334v2/fi-rkl-11600/igt@i915_suspend@basic-s3-without-i915.html
* igt@kms_chamelium_frames@dp-crc-fast:
- fi-ctg-p8600: NOTRUN -> [SKIP][14] ([fdo#109271]) +31 similar issues
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111334v2/fi-ctg-p8600/igt@kms_chamelium_frames@dp-crc-fast.html
* igt@kms_chamelium_hpd@dp-hpd-fast:
- fi-rkl-11600: NOTRUN -> [SKIP][15] ([i915#7828]) +7 similar issues
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111334v2/fi-rkl-11600/igt@kms_chamelium_hpd@dp-hpd-fast.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor:
- fi-rkl-11600: NOTRUN -> [SKIP][16] ([i915#4103])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111334v2/fi-rkl-11600/igt@kms_cursor_legacy@basic-busy-flip-before-cursor.html
* igt@kms_force_connector_basic@force-load-detect:
- fi-rkl-11600: NOTRUN -> [SKIP][17] ([fdo#109285] / [i915#4098])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111334v2/fi-rkl-11600/igt@kms_force_connector_basic@force-load-detect.html
* igt@kms_psr@primary_page_flip:
- fi-rkl-11600: NOTRUN -> [SKIP][18] ([i915#1072]) +3 similar issues
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111334v2/fi-rkl-11600/igt@kms_psr@primary_page_flip.html
* igt@kms_setmode@basic-clone-single-crtc:
- fi-rkl-11600: NOTRUN -> [SKIP][19] ([i915#3555] / [i915#4098])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111334v2/fi-rkl-11600/igt@kms_setmode@basic-clone-single-crtc.html
* igt@prime_vgem@basic-read:
- fi-rkl-11600: NOTRUN -> [SKIP][20] ([fdo#109295] / [i915#3291] / [i915#3708]) +2 similar issues
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111334v2/fi-rkl-11600/igt@prime_vgem@basic-read.html
* igt@prime_vgem@basic-userptr:
- fi-rkl-11600: NOTRUN -> [SKIP][21] ([fdo#109295] / [i915#3301] / [i915#3708])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111334v2/fi-rkl-11600/igt@prime_vgem@basic-userptr.html
* igt@runner@aborted:
- fi-bsw-kefka: NOTRUN -> [FAIL][22] ([fdo#109271] / [i915#4312])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111334v2/fi-bsw-kefka/igt@runner@aborted.html
#### Possible fixes ####
* igt@i915_pm_rpm@basic-rte:
- {bat-adlp-6}: [DMESG-WARN][23] ([i915#7077]) -> [PASS][24]
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12587/bat-adlp-6/igt@i915_pm_rpm@basic-rte.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111334v2/bat-adlp-6/igt@i915_pm_rpm@basic-rte.html
* igt@i915_selftest@live@gt_heartbeat:
- fi-apl-guc: [DMESG-FAIL][25] ([i915#5334]) -> [PASS][26]
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12587/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111334v2/fi-apl-guc/igt@i915_selftest@live@gt_heartbeat.html
* igt@i915_selftest@live@gt_pm:
- {bat-rpls-2}: [DMESG-FAIL][27] ([i915#4258]) -> [PASS][28]
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12587/bat-rpls-2/igt@i915_selftest@live@gt_pm.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111334v2/bat-rpls-2/igt@i915_selftest@live@gt_pm.html
* igt@i915_selftest@live@reset:
- {bat-rpls-2}: [DMESG-FAIL][29] ([i915#4983]) -> [PASS][30]
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12587/bat-rpls-2/igt@i915_selftest@live@reset.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111334v2/bat-rpls-2/igt@i915_selftest@live@reset.html
* igt@i915_suspend@basic-s3-without-i915:
- fi-apl-guc: [DMESG-WARN][31] ([i915#1982]) -> [PASS][32]
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12587/fi-apl-guc/igt@i915_suspend@basic-s3-without-i915.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111334v2/fi-apl-guc/igt@i915_suspend@basic-s3-without-i915.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
[i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4258]: https://gitlab.freedesktop.org/drm/intel/issues/4258
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4817]: https://gitlab.freedesktop.org/drm/intel/issues/4817
[i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
[i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
[i915#5591]: https://gitlab.freedesktop.org/drm/intel/issues/5591
[i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
[i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
[i915#7077]: https://gitlab.freedesktop.org/drm/intel/issues/7077
[i915#7443]: https://gitlab.freedesktop.org/drm/intel/issues/7443
[i915#7456]: https://gitlab.freedesktop.org/drm/intel/issues/7456
[i915#7561]: https://gitlab.freedesktop.org/drm/intel/issues/7561
[i915#7640]: https://gitlab.freedesktop.org/drm/intel/issues/7640
[i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
Build changes
-------------
* Linux: CI_DRM_12587 -> Patchwork_111334v2
CI-20190529: 20190529
CI_DRM_12587: e4d10a72766332a0ca94db1fb9b4b2aa8b319172 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7120: dffabf00c79c55e0ae23b75d0a7922d55251ee5e @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_111334v2: e4d10a72766332a0ca94db1fb9b4b2aa8b319172 @ git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
17e9a36bc493 drm/i915/display: add intel_display_limits.h for key enums
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111334v2/index.html
[-- Attachment #2: Type: text/html, Size: 12293 bytes --]
^ permalink raw reply [flat|nested] 9+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/display: add intel_display_limits.h for key enums (rev3)
2023-01-16 16:46 [Intel-gfx] [PATCH] drm/i915/display: add intel_display_limits.h for key enums Jani Nikula
2023-01-16 17:38 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/display: add intel_display_limits.h for key enums (rev2) Patchwork
2023-01-16 18:06 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
@ 2023-01-16 19:24 ` Patchwork
2023-01-16 19:49 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
` (2 subsequent siblings)
5 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2023-01-16 19:24 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/display: add intel_display_limits.h for key enums (rev3)
URL : https://patchwork.freedesktop.org/series/111334/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
^ permalink raw reply [flat|nested] 9+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/display: add intel_display_limits.h for key enums (rev3)
2023-01-16 16:46 [Intel-gfx] [PATCH] drm/i915/display: add intel_display_limits.h for key enums Jani Nikula
` (2 preceding siblings ...)
2023-01-16 19:24 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/display: add intel_display_limits.h for key enums (rev3) Patchwork
@ 2023-01-16 19:49 ` Patchwork
2023-01-16 22:30 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2023-01-17 17:53 ` [Intel-gfx] [PATCH] drm/i915/display: add intel_display_limits.h for key enums Rodrigo Vivi
5 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2023-01-16 19:49 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 3923 bytes --]
== Series Details ==
Series: drm/i915/display: add intel_display_limits.h for key enums (rev3)
URL : https://patchwork.freedesktop.org/series/111334/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12588 -> Patchwork_111334v3
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111334v3/index.html
Participating hosts (45 -> 43)
------------------------------
Missing (2): fi-kbl-soraka fi-snb-2520m
Known issues
------------
Here are the changes found in Patchwork_111334v3 that come from known issues:
### IGT changes ###
#### Possible fixes ####
* igt@i915_pm_rpm@basic-rte:
- {bat-adln-1}: [DMESG-WARN][1] ([i915#7077]) -> [PASS][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12588/bat-adln-1/igt@i915_pm_rpm@basic-rte.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111334v3/bat-adln-1/igt@i915_pm_rpm@basic-rte.html
* igt@i915_selftest@live@migrate:
- {bat-dg2-11}: [DMESG-FAIL][3] -> [PASS][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12588/bat-dg2-11/igt@i915_selftest@live@migrate.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111334v3/bat-dg2-11/igt@i915_selftest@live@migrate.html
* igt@i915_selftest@live@reset:
- {bat-rpls-1}: [DMESG-FAIL][5] ([i915#4983]) -> [PASS][6]
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12588/bat-rpls-1/igt@i915_selftest@live@reset.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111334v3/bat-rpls-1/igt@i915_selftest@live@reset.html
* igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-lvds-1:
- fi-ctg-p8600: [FAIL][7] ([fdo#103375]) -> [PASS][8]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12588/fi-ctg-p8600/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-lvds-1.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111334v3/fi-ctg-p8600/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-lvds-1.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
[i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4983]: https://gitlab.freedesktop.org/drm/intel/issues/4983
[i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
[i915#6367]: https://gitlab.freedesktop.org/drm/intel/issues/6367
[i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
[i915#6997]: https://gitlab.freedesktop.org/drm/intel/issues/6997
[i915#7077]: https://gitlab.freedesktop.org/drm/intel/issues/7077
[i915#7359]: https://gitlab.freedesktop.org/drm/intel/issues/7359
[i915#7625]: https://gitlab.freedesktop.org/drm/intel/issues/7625
[i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
[i915#7834]: https://gitlab.freedesktop.org/drm/intel/issues/7834
Build changes
-------------
* Linux: CI_DRM_12588 -> Patchwork_111334v3
CI-20190529: 20190529
CI_DRM_12588: 4289f17cae840c77e9d314330a635cebe762a735 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7120: dffabf00c79c55e0ae23b75d0a7922d55251ee5e @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_111334v3: 4289f17cae840c77e9d314330a635cebe762a735 @ git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
56b675c32fe4 drm/i915/display: add intel_display_limits.h for key enums
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111334v3/index.html
[-- Attachment #2: Type: text/html, Size: 3742 bytes --]
^ permalink raw reply [flat|nested] 9+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/display: add intel_display_limits.h for key enums (rev3)
2023-01-16 16:46 [Intel-gfx] [PATCH] drm/i915/display: add intel_display_limits.h for key enums Jani Nikula
` (3 preceding siblings ...)
2023-01-16 19:49 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2023-01-16 22:30 ` Patchwork
2023-01-17 17:53 ` [Intel-gfx] [PATCH] drm/i915/display: add intel_display_limits.h for key enums Rodrigo Vivi
5 siblings, 0 replies; 9+ messages in thread
From: Patchwork @ 2023-01-16 22:30 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 15525 bytes --]
== Series Details ==
Series: drm/i915/display: add intel_display_limits.h for key enums (rev3)
URL : https://patchwork.freedesktop.org/series/111334/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12588_full -> Patchwork_111334v3_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111334v3/index.html
Participating hosts (13 -> 10)
------------------------------
Missing (3): pig-skl-6260u pig-kbl-iris pig-glk-j5005
Known issues
------------
Here are the changes found in Patchwork_111334v3_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_fair@basic-none@rcs0:
- shard-glk: [PASS][1] -> [FAIL][2] ([i915#2842])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12588/shard-glk5/igt@gem_exec_fair@basic-none@rcs0.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111334v3/shard-glk3/igt@gem_exec_fair@basic-none@rcs0.html
* igt@gem_lmem_swapping@verify-random-ccs:
- shard-glk: NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#4613]) +1 similar issue
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111334v3/shard-glk6/igt@gem_lmem_swapping@verify-random-ccs.html
* igt@gem_render_copy@y-tiled-ccs-to-y-tiled-mc-ccs:
- shard-glk: NOTRUN -> [SKIP][4] ([fdo#109271]) +26 similar issues
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111334v3/shard-glk6/igt@gem_render_copy@y-tiled-ccs-to-y-tiled-mc-ccs.html
* igt@kms_ccs@pipe-b-missing-ccs-buffer-y_tiled_gen12_mc_ccs:
- shard-glk: NOTRUN -> [SKIP][5] ([fdo#109271] / [i915#3886])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111334v3/shard-glk6/igt@kms_ccs@pipe-b-missing-ccs-buffer-y_tiled_gen12_mc_ccs.html
* igt@kms_psr2_sf@cursor-plane-update-sf:
- shard-glk: NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#658])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111334v3/shard-glk6/igt@kms_psr2_sf@cursor-plane-update-sf.html
#### Possible fixes ####
* igt@drm_fdinfo@virtual-idle:
- {shard-rkl}: [FAIL][7] ([i915#7742]) -> [PASS][8]
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12588/shard-rkl-1/igt@drm_fdinfo@virtual-idle.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111334v3/shard-rkl-3/igt@drm_fdinfo@virtual-idle.html
* igt@fbdev@read:
- {shard-rkl}: [SKIP][9] ([i915#2582]) -> [PASS][10]
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12588/shard-rkl-4/igt@fbdev@read.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111334v3/shard-rkl-6/igt@fbdev@read.html
* igt@gem_exec_fair@basic-deadline:
- {shard-rkl}: [FAIL][11] ([i915#2846]) -> [PASS][12]
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12588/shard-rkl-3/igt@gem_exec_fair@basic-deadline.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111334v3/shard-rkl-5/igt@gem_exec_fair@basic-deadline.html
* igt@gem_exec_reloc@basic-wc-read-noreloc:
- {shard-rkl}: [SKIP][13] ([i915#3281]) -> [PASS][14] +5 similar issues
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12588/shard-rkl-2/igt@gem_exec_reloc@basic-wc-read-noreloc.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111334v3/shard-rkl-5/igt@gem_exec_reloc@basic-wc-read-noreloc.html
* igt@gem_partial_pwrite_pread@write:
- {shard-rkl}: [SKIP][15] ([i915#3282]) -> [PASS][16] +1 similar issue
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12588/shard-rkl-2/igt@gem_partial_pwrite_pread@write.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111334v3/shard-rkl-5/igt@gem_partial_pwrite_pread@write.html
* igt@gen9_exec_parse@valid-registers:
- {shard-rkl}: [SKIP][17] ([i915#2527]) -> [PASS][18] +1 similar issue
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12588/shard-rkl-2/igt@gen9_exec_parse@valid-registers.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111334v3/shard-rkl-5/igt@gen9_exec_parse@valid-registers.html
* igt@i915_pm_rc6_residency@rc6-idle@vcs0:
- {shard-rkl}: [WARN][19] ([i915#2681]) -> [PASS][20]
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12588/shard-rkl-5/igt@i915_pm_rc6_residency@rc6-idle@vcs0.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111334v3/shard-rkl-6/igt@i915_pm_rc6_residency@rc6-idle@vcs0.html
* igt@i915_pm_rpm@modeset-non-lpsp:
- {shard-dg1}: [SKIP][21] ([i915#1397]) -> [PASS][22] +3 similar issues
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12588/shard-dg1-14/igt@i915_pm_rpm@modeset-non-lpsp.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111334v3/shard-dg1-16/igt@i915_pm_rpm@modeset-non-lpsp.html
* igt@kms_big_fb@linear-32bpp-rotate-0:
- {shard-rkl}: [SKIP][23] ([i915#1845] / [i915#4098]) -> [PASS][24] +18 similar issues
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12588/shard-rkl-4/igt@kms_big_fb@linear-32bpp-rotate-0.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111334v3/shard-rkl-6/igt@kms_big_fb@linear-32bpp-rotate-0.html
* igt@kms_frontbuffer_tracking@psr-rgb565-draw-render:
- {shard-rkl}: [SKIP][25] ([i915#1849] / [i915#4098]) -> [PASS][26] +12 similar issues
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12588/shard-rkl-5/igt@kms_frontbuffer_tracking@psr-rgb565-draw-render.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111334v3/shard-rkl-6/igt@kms_frontbuffer_tracking@psr-rgb565-draw-render.html
* igt@kms_plane@pixel-format-source-clamping@pipe-b-planes:
- {shard-rkl}: [SKIP][27] ([i915#1849]) -> [PASS][28] +1 similar issue
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12588/shard-rkl-4/igt@kms_plane@pixel-format-source-clamping@pipe-b-planes.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111334v3/shard-rkl-6/igt@kms_plane@pixel-format-source-clamping@pipe-b-planes.html
* igt@kms_psr@dpms:
- {shard-rkl}: [SKIP][29] ([i915#1072]) -> [PASS][30] +1 similar issue
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12588/shard-rkl-5/igt@kms_psr@dpms.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111334v3/shard-rkl-6/igt@kms_psr@dpms.html
* igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
- {shard-rkl}: [SKIP][31] ([i915#5461]) -> [PASS][32]
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_12588/shard-rkl-4/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111334v3/shard-rkl-6/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109283]: https://bugs.freedesktop.org/show_bug.cgi?id=109283
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[fdo#109303]: https://bugs.freedesktop.org/show_bug.cgi?id=109303
[fdo#109312]: https://bugs.freedesktop.org/show_bug.cgi?id=109312
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
[fdo#110542]: https://bugs.freedesktop.org/show_bug.cgi?id=110542
[fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
[fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
[fdo#111644]: https://bugs.freedesktop.org/show_bug.cgi?id=111644
[fdo#111656]: https://bugs.freedesktop.org/show_bug.cgi?id=111656
[fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[fdo#112054]: https://bugs.freedesktop.org/show_bug.cgi?id=112054
[fdo#112283]: https://bugs.freedesktop.org/show_bug.cgi?id=112283
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1257]: https://gitlab.freedesktop.org/drm/intel/issues/1257
[i915#132]: https://gitlab.freedesktop.org/drm/intel/issues/132
[i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
[i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825
[i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839
[i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
[i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
[i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
[i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
[i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
[i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
[i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
[i915#2658]: https://gitlab.freedesktop.org/drm/intel/issues/2658
[i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
[i915#2681]: https://gitlab.freedesktop.org/drm/intel/issues/2681
[i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705
[i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
[i915#2846]: https://gitlab.freedesktop.org/drm/intel/issues/2846
[i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
[i915#2920]: https://gitlab.freedesktop.org/drm/intel/issues/2920
[i915#2994]: https://gitlab.freedesktop.org/drm/intel/issues/2994
[i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
[i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
[i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
[i915#3469]: https://gitlab.freedesktop.org/drm/intel/issues/3469
[i915#3528]: https://gitlab.freedesktop.org/drm/intel/issues/3528
[i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
[i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3591]: https://gitlab.freedesktop.org/drm/intel/issues/3591
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
[i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#3734]: https://gitlab.freedesktop.org/drm/intel/issues/3734
[i915#3742]: https://gitlab.freedesktop.org/drm/intel/issues/3742
[i915#3826]: https://gitlab.freedesktop.org/drm/intel/issues/3826
[i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840
[i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
[i915#404]: https://gitlab.freedesktop.org/drm/intel/issues/404
[i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
[i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
[i915#433]: https://gitlab.freedesktop.org/drm/intel/issues/433
[i915#4525]: https://gitlab.freedesktop.org/drm/intel/issues/4525
[i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4767]: https://gitlab.freedesktop.org/drm/intel/issues/4767
[i915#4833]: https://gitlab.freedesktop.org/drm/intel/issues/4833
[i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852
[i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
[i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
[i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
[i915#5288]: https://gitlab.freedesktop.org/drm/intel/issues/5288
[i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289
[i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325
[i915#5327]: https://gitlab.freedesktop.org/drm/intel/issues/5327
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
[i915#5461]: https://gitlab.freedesktop.org/drm/intel/issues/5461
[i915#5563]: https://gitlab.freedesktop.org/drm/intel/issues/5563
[i915#5723]: https://gitlab.freedesktop.org/drm/intel/issues/5723
[i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
[i915#6248]: https://gitlab.freedesktop.org/drm/intel/issues/6248
[i915#6334]: https://gitlab.freedesktop.org/drm/intel/issues/6334
[i915#6355]: https://gitlab.freedesktop.org/drm/intel/issues/6355
[i915#6433]: https://gitlab.freedesktop.org/drm/intel/issues/6433
[i915#6497]: https://gitlab.freedesktop.org/drm/intel/issues/6497
[i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
[i915#6590]: https://gitlab.freedesktop.org/drm/intel/issues/6590
[i915#6768]: https://gitlab.freedesktop.org/drm/intel/issues/6768
[i915#6944]: https://gitlab.freedesktop.org/drm/intel/issues/6944
[i915#6946]: https://gitlab.freedesktop.org/drm/intel/issues/6946
[i915#7037]: https://gitlab.freedesktop.org/drm/intel/issues/7037
[i915#7052]: https://gitlab.freedesktop.org/drm/intel/issues/7052
[i915#7116]: https://gitlab.freedesktop.org/drm/intel/issues/7116
[i915#7118]: https://gitlab.freedesktop.org/drm/intel/issues/7118
[i915#7456]: https://gitlab.freedesktop.org/drm/intel/issues/7456
[i915#7561]: https://gitlab.freedesktop.org/drm/intel/issues/7561
[i915#7697]: https://gitlab.freedesktop.org/drm/intel/issues/7697
[i915#7701]: https://gitlab.freedesktop.org/drm/intel/issues/7701
[i915#7707]: https://gitlab.freedesktop.org/drm/intel/issues/7707
[i915#7711]: https://gitlab.freedesktop.org/drm/intel/issues/7711
[i915#7742]: https://gitlab.freedesktop.org/drm/intel/issues/7742
[i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
Build changes
-------------
* Linux: CI_DRM_12588 -> Patchwork_111334v3
* Piglit: piglit_4509 -> None
CI-20190529: 20190529
CI_DRM_12588: 4289f17cae840c77e9d314330a635cebe762a735 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7120: dffabf00c79c55e0ae23b75d0a7922d55251ee5e @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_111334v3: 4289f17cae840c77e9d314330a635cebe762a735 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_111334v3/index.html
[-- Attachment #2: Type: text/html, Size: 10259 bytes --]
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/display: add intel_display_limits.h for key enums
2023-01-16 16:46 [Intel-gfx] [PATCH] drm/i915/display: add intel_display_limits.h for key enums Jani Nikula
` (4 preceding siblings ...)
2023-01-16 22:30 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
@ 2023-01-17 17:53 ` Rodrigo Vivi
2023-01-18 9:28 ` Jani Nikula
2023-01-25 12:14 ` Jani Nikula
5 siblings, 2 replies; 9+ messages in thread
From: Rodrigo Vivi @ 2023-01-17 17:53 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx
On Mon, Jan 16, 2023 at 06:46:44PM +0200, Jani Nikula wrote:
> Move a handful of key enums to a new file intel_display_limits.h. These
> are the enum types, and the MAX/NUM enumerations within them, that are
> used in other headers. Otherwise, there's no common theme between them.
>
> Replace intel_display.h include with intel_display_limit.h where
> relevant, and add the intel_display.h include directly in the .c files
> where needed.
>
> Since intel_display.h is used almost everywhere in display/, include it
> from intel_display_types.h to avoid massive changes across the
> board. There are very few files that would need intel_display_types.h
> but not intel_display.h so this is neglible, and further cleanup between
> these headers can be left for the future.
>
> Overall this change drops the direct and indirect dependencies on
> intel_display.h from about 300 to about 100 compilation units, because
> we can drop the include from i915_drv.h.
>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
>
> ---
>
> N.b. intel_display_limits.h is not a great name. I was hoping it was
> only needed for the MAX/NUM enumerations such as I915_MAX_PIPES but
> there are a number of headers that use the types for struct members as
> well. intel_display_enums.h sounds too generic too. Suggestions?
> ---
> drivers/gpu/drm/i915/display/intel_bw.h | 2 +-
> drivers/gpu/drm/i915/display/intel_cdclk.h | 2 +-
> drivers/gpu/drm/i915/display/intel_display.h | 115 +---------------
> .../gpu/drm/i915/display/intel_display_core.h | 2 +-
> .../drm/i915/display/intel_display_limits.h | 124 ++++++++++++++++++
> .../i915/display/intel_display_power_map.c | 1 +
> .../drm/i915/display/intel_display_types.h | 1 +
> drivers/gpu/drm/i915/display/intel_dvo_dev.h | 2 +-
> drivers/gpu/drm/i915/display/skl_watermark.h | 2 +-
> drivers/gpu/drm/i915/gem/i915_gem_create.c | 1 +
> drivers/gpu/drm/i915/gem/i915_gem_domain.c | 1 +
> drivers/gpu/drm/i915/gt/intel_ggtt.c | 1 +
> drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c | 1 +
> drivers/gpu/drm/i915/gt/intel_rps.c | 1 +
> drivers/gpu/drm/i915/gvt/cmd_parser.c | 1 +
> drivers/gpu/drm/i915/gvt/display.c | 1 +
> drivers/gpu/drm/i915/gvt/fb_decoder.h | 2 +-
> drivers/gpu/drm/i915/i915_drv.h | 2 +-
> drivers/gpu/drm/i915/i915_pci.c | 1 +
> drivers/gpu/drm/i915/i915_vma.c | 1 +
> drivers/gpu/drm/i915/intel_device_info.c | 1 +
> drivers/gpu/drm/i915/intel_device_info.h | 2 +-
> drivers/gpu/drm/i915/intel_gvt_mmio_table.c | 1 +
> drivers/gpu/drm/i915/intel_pm.c | 1 +
> drivers/gpu/drm/i915/intel_pm_types.h | 2 +-
> drivers/gpu/drm/i915/vlv_sideband.c | 1 +
> 26 files changed, 149 insertions(+), 123 deletions(-)
> create mode 100644 drivers/gpu/drm/i915/display/intel_display_limits.h
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bw.h b/drivers/gpu/drm/i915/display/intel_bw.h
> index cb7ee3a24a58..f20292143745 100644
> --- a/drivers/gpu/drm/i915/display/intel_bw.h
> +++ b/drivers/gpu/drm/i915/display/intel_bw.h
> @@ -8,7 +8,7 @@
>
> #include <drm/drm_atomic.h>
>
> -#include "intel_display.h"
> +#include "intel_display_limits.h"
> #include "intel_display_power.h"
> #include "intel_global_state.h"
>
> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.h b/drivers/gpu/drm/i915/display/intel_cdclk.h
> index c674879a84a5..51e2f6a11ce4 100644
> --- a/drivers/gpu/drm/i915/display/intel_cdclk.h
> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.h
> @@ -8,7 +8,7 @@
>
> #include <linux/types.h>
>
> -#include "intel_display.h"
> +#include "intel_display_limits.h"
> #include "intel_global_state.h"
>
> struct drm_i915_private;
> diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
> index ef73730f32b0..cb6f520cc575 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.h
> +++ b/drivers/gpu/drm/i915/display/intel_display.h
> @@ -28,6 +28,7 @@
> #include <drm/drm_util.h>
>
> #include "i915_reg_defs.h"
> +#include "intel_display_limits.h"
>
> enum drm_scaling_filter;
> struct dpll;
> @@ -62,51 +63,9 @@ struct intel_remapped_info;
> struct intel_rotation_info;
> struct pci_dev;
>
> -/*
> - * Keep the pipe enum values fixed: the code assumes that PIPE_A=0, the
> - * rest have consecutive values and match the enum values of transcoders
> - * with a 1:1 transcoder -> pipe mapping.
> - */
> -enum pipe {
> - INVALID_PIPE = -1,
> -
> - PIPE_A = 0,
> - PIPE_B,
> - PIPE_C,
> - PIPE_D,
> - _PIPE_EDP,
> -
> - I915_MAX_PIPES = _PIPE_EDP
> -};
>
> #define pipe_name(p) ((p) + 'A')
>
> -enum transcoder {
> - INVALID_TRANSCODER = -1,
> - /*
> - * The following transcoders have a 1:1 transcoder -> pipe mapping,
> - * keep their values fixed: the code assumes that TRANSCODER_A=0, the
> - * rest have consecutive values and match the enum values of the pipes
> - * they map to.
> - */
> - TRANSCODER_A = PIPE_A,
> - TRANSCODER_B = PIPE_B,
> - TRANSCODER_C = PIPE_C,
> - TRANSCODER_D = PIPE_D,
> -
> - /*
> - * The following transcoders can map to any pipe, their enum value
> - * doesn't need to stay fixed.
> - */
> - TRANSCODER_EDP,
> - TRANSCODER_DSI_0,
> - TRANSCODER_DSI_1,
> - TRANSCODER_DSI_A = TRANSCODER_DSI_0, /* legacy DSI */
> - TRANSCODER_DSI_C = TRANSCODER_DSI_1, /* legacy DSI */
> -
> - I915_MAX_TRANSCODERS
> -};
> -
> static inline const char *transcoder_name(enum transcoder transcoder)
> {
> switch (transcoder) {
> @@ -147,29 +106,6 @@ enum i9xx_plane_id {
> #define plane_name(p) ((p) + 'A')
> #define sprite_name(p, s) ((p) * RUNTIME_INFO(dev_priv)->num_sprites[(p)] + (s) + 'A')
>
> -/*
> - * Per-pipe plane identifier.
> - * I915_MAX_PLANES in the enum below is the maximum (across all platforms)
> - * number of planes per CRTC. Not all platforms really have this many planes,
> - * which means some arrays of size I915_MAX_PLANES may have unused entries
> - * between the topmost sprite plane and the cursor plane.
> - *
> - * This is expected to be passed to various register macros
> - * (eg. PLANE_CTL(), PS_PLANE_SEL(), etc.) so adjust with care.
> - */
> -enum plane_id {
> - PLANE_PRIMARY,
> - PLANE_SPRITE0,
> - PLANE_SPRITE1,
> - PLANE_SPRITE2,
> - PLANE_SPRITE3,
> - PLANE_SPRITE4,
> - PLANE_SPRITE5,
> - PLANE_CURSOR,
> -
> - I915_MAX_PLANES,
> -};
> -
> #define for_each_plane_id_on_crtc(__crtc, __p) \
> for ((__p) = PLANE_PRIMARY; (__p) < I915_MAX_PLANES; (__p)++) \
> for_each_if((__crtc)->plane_ids_mask & BIT(__p))
> @@ -182,34 +118,6 @@ enum plane_id {
> for_each_dbuf_slice((__dev_priv), (__slice)) \
> for_each_if((__mask) & BIT(__slice))
>
> -enum port {
> - PORT_NONE = -1,
> -
> - PORT_A = 0,
> - PORT_B,
> - PORT_C,
> - PORT_D,
> - PORT_E,
> - PORT_F,
> - PORT_G,
> - PORT_H,
> - PORT_I,
> -
> - /* tgl+ */
> - PORT_TC1 = PORT_D,
> - PORT_TC2,
> - PORT_TC3,
> - PORT_TC4,
> - PORT_TC5,
> - PORT_TC6,
> -
> - /* XE_LPD repositions D/E offsets and bitfields */
> - PORT_D_XELPD = PORT_TC5,
> - PORT_E_XELPD,
> -
> - I915_MAX_PORTS
> -};
> -
> #define port_name(p) ((p) + 'A')
>
> /*
> @@ -312,27 +220,6 @@ enum phy_fia {
> FIA3,
> };
>
> -enum hpd_pin {
> - HPD_NONE = 0,
> - HPD_TV = HPD_NONE, /* TV is known to be unreliable */
> - HPD_CRT,
> - HPD_SDVO_B,
> - HPD_SDVO_C,
> - HPD_PORT_A,
> - HPD_PORT_B,
> - HPD_PORT_C,
> - HPD_PORT_D,
> - HPD_PORT_E,
> - HPD_PORT_TC1,
> - HPD_PORT_TC2,
> - HPD_PORT_TC3,
> - HPD_PORT_TC4,
> - HPD_PORT_TC5,
> - HPD_PORT_TC6,
> -
> - HPD_NUM_PINS
> -};
> -
> #define for_each_hpd_pin(__pin) \
> for ((__pin) = (HPD_NONE + 1); (__pin) < HPD_NUM_PINS; (__pin)++)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h
> index 57ddce3ba02b..1d5d9d56fb3f 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_core.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_core.h
> @@ -17,7 +17,7 @@
> #include <drm/drm_modeset_lock.h>
>
> #include "intel_cdclk.h"
> -#include "intel_display.h"
> +#include "intel_display_limits.h"
> #include "intel_display_power.h"
> #include "intel_dmc.h"
> #include "intel_dpll_mgr.h"
> diff --git a/drivers/gpu/drm/i915/display/intel_display_limits.h b/drivers/gpu/drm/i915/display/intel_display_limits.h
> new file mode 100644
> index 000000000000..5126d0b5ae5d
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/display/intel_display_limits.h
> @@ -0,0 +1,124 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2022 Intel Corporation
> + */
> +
> +#ifndef __INTEL_DISPLAY_LIMITS_H__
> +#define __INTEL_DISPLAY_LIMITS_H__
> +
> +/*
> + * Keep the pipe enum values fixed: the code assumes that PIPE_A=0, the
> + * rest have consecutive values and match the enum values of transcoders
> + * with a 1:1 transcoder -> pipe mapping.
> + */
> +enum pipe {
> + INVALID_PIPE = -1,
> +
> + PIPE_A = 0,
> + PIPE_B,
> + PIPE_C,
> + PIPE_D,
> + _PIPE_EDP,
> +
> + I915_MAX_PIPES = _PIPE_EDP
> +};
> +
> +enum transcoder {
> + INVALID_TRANSCODER = -1,
> + /*
> + * The following transcoders have a 1:1 transcoder -> pipe mapping,
> + * keep their values fixed: the code assumes that TRANSCODER_A=0, the
> + * rest have consecutive values and match the enum values of the pipes
> + * they map to.
> + */
> + TRANSCODER_A = PIPE_A,
> + TRANSCODER_B = PIPE_B,
> + TRANSCODER_C = PIPE_C,
> + TRANSCODER_D = PIPE_D,
> +
> + /*
> + * The following transcoders can map to any pipe, their enum value
> + * doesn't need to stay fixed.
> + */
> + TRANSCODER_EDP,
> + TRANSCODER_DSI_0,
> + TRANSCODER_DSI_1,
> + TRANSCODER_DSI_A = TRANSCODER_DSI_0, /* legacy DSI */
> + TRANSCODER_DSI_C = TRANSCODER_DSI_1, /* legacy DSI */
> +
> + I915_MAX_TRANSCODERS
> +};
> +
> +/*
> + * Per-pipe plane identifier.
> + * I915_MAX_PLANES in the enum below is the maximum (across all platforms)
> + * number of planes per CRTC. Not all platforms really have this many planes,
> + * which means some arrays of size I915_MAX_PLANES may have unused entries
> + * between the topmost sprite plane and the cursor plane.
> + *
> + * This is expected to be passed to various register macros
> + * (eg. PLANE_CTL(), PS_PLANE_SEL(), etc.) so adjust with care.
> + */
> +enum plane_id {
> + PLANE_PRIMARY,
> + PLANE_SPRITE0,
> + PLANE_SPRITE1,
> + PLANE_SPRITE2,
> + PLANE_SPRITE3,
> + PLANE_SPRITE4,
> + PLANE_SPRITE5,
> + PLANE_CURSOR,
> +
> + I915_MAX_PLANES,
> +};
> +
> +enum port {
> + PORT_NONE = -1,
> +
> + PORT_A = 0,
> + PORT_B,
> + PORT_C,
> + PORT_D,
> + PORT_E,
> + PORT_F,
> + PORT_G,
> + PORT_H,
> + PORT_I,
> +
> + /* tgl+ */
> + PORT_TC1 = PORT_D,
> + PORT_TC2,
> + PORT_TC3,
> + PORT_TC4,
> + PORT_TC5,
> + PORT_TC6,
> +
> + /* XE_LPD repositions D/E offsets and bitfields */
> + PORT_D_XELPD = PORT_TC5,
> + PORT_E_XELPD,
> +
> + I915_MAX_PORTS
> +};
> +
> +enum hpd_pin {
> + HPD_NONE = 0,
> + HPD_TV = HPD_NONE, /* TV is known to be unreliable */
> + HPD_CRT,
> + HPD_SDVO_B,
> + HPD_SDVO_C,
> + HPD_PORT_A,
> + HPD_PORT_B,
> + HPD_PORT_C,
> + HPD_PORT_D,
> + HPD_PORT_E,
> + HPD_PORT_TC1,
> + HPD_PORT_TC2,
> + HPD_PORT_TC3,
> + HPD_PORT_TC4,
> + HPD_PORT_TC5,
> + HPD_PORT_TC6,
> +
> + HPD_NUM_PINS
> +};
> +
> +#endif /* __INTEL_DISPLAY_LIMITS_H__ */
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power_map.c b/drivers/gpu/drm/i915/display/intel_display_power_map.c
> index f5d66ca85b19..6645eb1911d8 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power_map.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power_map.c
> @@ -10,6 +10,7 @@
>
> #include "intel_display_power_map.h"
> #include "intel_display_power_well.h"
> +#include "intel_display_types.h"
>
> #define __LIST_INLINE_ELEMS(__elem_type, ...) \
> ((__elem_type[]) { __VA_ARGS__ })
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 32e8b2fc3cc6..8f3d5d02e207 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -50,6 +50,7 @@
> #include "i915_vma_types.h"
> #include "intel_bios.h"
> #include "intel_display.h"
> +#include "intel_display_limits.h"
> #include "intel_display_power.h"
> #include "intel_dpll_mgr.h"
> #include "intel_pm_types.h"
> diff --git a/drivers/gpu/drm/i915/display/intel_dvo_dev.h b/drivers/gpu/drm/i915/display/intel_dvo_dev.h
> index ea8eb7dcee38..f7e98e1c6470 100644
> --- a/drivers/gpu/drm/i915/display/intel_dvo_dev.h
> +++ b/drivers/gpu/drm/i915/display/intel_dvo_dev.h
> @@ -25,7 +25,7 @@
>
> #include "i915_reg_defs.h"
>
> -#include "intel_display.h"
> +#include "intel_display_limits.h"
>
> enum drm_connector_status;
> struct drm_display_mode;
> diff --git a/drivers/gpu/drm/i915/display/skl_watermark.h b/drivers/gpu/drm/i915/display/skl_watermark.h
> index 7a5a4e67cd73..37954c472070 100644
> --- a/drivers/gpu/drm/i915/display/skl_watermark.h
> +++ b/drivers/gpu/drm/i915/display/skl_watermark.h
> @@ -8,7 +8,7 @@
>
> #include <linux/types.h>
>
> -#include "intel_display.h"
> +#include "intel_display_limits.h"
> #include "intel_global_state.h"
> #include "intel_pm_types.h"
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_create.c b/drivers/gpu/drm/i915/gem/i915_gem_create.c
> index 005a7f842784..e76c9703680e 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_create.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_create.c
> @@ -5,6 +5,7 @@
>
> #include <drm/drm_fourcc.h>
>
> +#include "display/intel_display.h"
> #include "gem/i915_gem_ioctls.h"
> #include "gem/i915_gem_lmem.h"
> #include "gem/i915_gem_region.h"
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_domain.c b/drivers/gpu/drm/i915/gem/i915_gem_domain.c
> index 9969e687ad85..497de40b8e68 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_domain.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_domain.c
> @@ -4,6 +4,7 @@
> * Copyright © 2014-2016 Intel Corporation
> */
>
> +#include "display/intel_display.h"
> #include "display/intel_frontbuffer.h"
> #include "gt/intel_gt.h"
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c b/drivers/gpu/drm/i915/gt/intel_ggtt.c
> index 0c7fe360f873..b2f3f49f418f 100644
> --- a/drivers/gpu/drm/i915/gt/intel_ggtt.c
> +++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c
> @@ -12,6 +12,7 @@
> #include <drm/i915_drm.h>
> #include <drm/intel-gtt.h>
>
> +#include "display/intel_display.h"
> #include "gem/i915_gem_lmem.h"
>
> #include "intel_ggtt_gmch.h"
> diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
> index 7ac8ed13e1fe..37d0b0fe791d 100644
> --- a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
> +++ b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
> @@ -5,6 +5,7 @@
>
> #include <linux/highmem.h>
>
> +#include "display/intel_display.h"
> #include "i915_drv.h"
> #include "i915_reg.h"
> #include "i915_scatterlist.h"
> diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c
> index 9ad3bc7201cb..f5d7b5126433 100644
> --- a/drivers/gpu/drm/i915/gt/intel_rps.c
> +++ b/drivers/gpu/drm/i915/gt/intel_rps.c
> @@ -7,6 +7,7 @@
>
> #include <drm/i915_drm.h>
>
> +#include "display/intel_display.h"
> #include "i915_drv.h"
> #include "i915_irq.h"
> #include "intel_breadcrumbs.h"
> diff --git a/drivers/gpu/drm/i915/gvt/cmd_parser.c b/drivers/gpu/drm/i915/gvt/cmd_parser.c
> index 0ebf5fbf0e39..3c4ae1da0d41 100644
> --- a/drivers/gpu/drm/i915/gvt/cmd_parser.c
> +++ b/drivers/gpu/drm/i915/gvt/cmd_parser.c
> @@ -49,6 +49,7 @@
> #include "i915_pvinfo.h"
> #include "trace.h"
>
> +#include "display/intel_display.h"
> #include "gem/i915_gem_context.h"
> #include "gem/i915_gem_pm.h"
> #include "gt/intel_context.h"
> diff --git a/drivers/gpu/drm/i915/gvt/display.c b/drivers/gpu/drm/i915/gvt/display.c
> index c033249e73f4..4d898b14de93 100644
> --- a/drivers/gpu/drm/i915/gvt/display.c
> +++ b/drivers/gpu/drm/i915/gvt/display.c
> @@ -36,6 +36,7 @@
> #include "i915_reg.h"
> #include "gvt.h"
>
> +#include "display/intel_display.h"
> #include "display/intel_dpio_phy.h"
>
> static int get_edp_pipe(struct intel_vgpu *vgpu)
> diff --git a/drivers/gpu/drm/i915/gvt/fb_decoder.h b/drivers/gpu/drm/i915/gvt/fb_decoder.h
> index 0daa3931aef7..4eff44194439 100644
> --- a/drivers/gpu/drm/i915/gvt/fb_decoder.h
> +++ b/drivers/gpu/drm/i915/gvt/fb_decoder.h
> @@ -38,7 +38,7 @@
>
> #include <linux/types.h>
>
> -#include "display/intel_display.h"
> +#include "display/intel_display_limits.h"
>
> struct intel_vgpu;
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 48fd82722f12..aa7901bf484f 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -36,7 +36,7 @@
>
> #include <drm/ttm/ttm_device.h>
>
> -#include "display/intel_display.h"
> +#include "display/intel_display_limits.h"
> #include "display/intel_display_core.h"
>
> #include "gem/i915_gem_context_types.h"
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index bc1af7e8f398..c69637bf0ad7 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -26,6 +26,7 @@
> #include <drm/drm_drv.h>
> #include <drm/i915_pciids.h>
>
> +#include "display/intel_display.h"
> #include "gt/intel_gt_regs.h"
> #include "gt/intel_sa_media.h"
>
> diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
> index 5272e2be990e..f51fd9fd4c89 100644
> --- a/drivers/gpu/drm/i915/i915_vma.c
> +++ b/drivers/gpu/drm/i915/i915_vma.c
> @@ -26,6 +26,7 @@
> #include <linux/dma-fence-array.h>
> #include <drm/drm_gem.h>
>
> +#include "display/intel_display.h"
> #include "display/intel_frontbuffer.h"
> #include "gem/i915_gem_lmem.h"
> #include "gem/i915_gem_tiling.h"
> diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
> index 05e90d09b208..98769e5f2c3d 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.c
> +++ b/drivers/gpu/drm/i915/intel_device_info.c
> @@ -29,6 +29,7 @@
>
> #include "display/intel_cdclk.h"
> #include "display/intel_de.h"
> +#include "display/intel_display.h"
> #include "gt/intel_gt_regs.h"
> #include "i915_drv.h"
> #include "i915_reg.h"
> diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
> index d588e5fd2eea..80bda653d61b 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.h
> +++ b/drivers/gpu/drm/i915/intel_device_info.h
> @@ -29,7 +29,7 @@
>
> #include "intel_step.h"
>
> -#include "display/intel_display.h"
> +#include "display/intel_display_limits.h"
>
> #include "gt/intel_engine_types.h"
> #include "gt/intel_context_types.h"
> diff --git a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c
> index ce6b3c3b636a..1f4805aa2b08 100644
> --- a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c
> +++ b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c
> @@ -5,6 +5,7 @@
>
> #include "display/intel_audio_regs.h"
> #include "display/intel_backlight_regs.h"
> +#include "display/intel_display_types.h"
> #include "display/intel_dmc_regs.h"
> #include "display/intel_dpio_phy.h"
> #include "display/vlv_dsi_pll_regs.h"
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 73c88b1c9545..3fc65bd12cc1 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -26,6 +26,7 @@
> */
>
> #include "display/intel_de.h"
> +#include "display/intel_display.h"
> #include "display/intel_display_trace.h"
> #include "display/skl_watermark.h"
>
> diff --git a/drivers/gpu/drm/i915/intel_pm_types.h b/drivers/gpu/drm/i915/intel_pm_types.h
> index 211632f58751..93152537b420 100644
> --- a/drivers/gpu/drm/i915/intel_pm_types.h
> +++ b/drivers/gpu/drm/i915/intel_pm_types.h
> @@ -8,7 +8,7 @@
>
> #include <linux/types.h>
>
> -#include "display/intel_display.h"
> +#include "display/intel_display_limits.h"
>
> enum intel_ddb_partitioning {
> INTEL_DDB_PART_1_2,
> diff --git a/drivers/gpu/drm/i915/vlv_sideband.c b/drivers/gpu/drm/i915/vlv_sideband.c
> index 6eea6e1a99c0..b98dec3ad817 100644
> --- a/drivers/gpu/drm/i915/vlv_sideband.c
> +++ b/drivers/gpu/drm/i915/vlv_sideband.c
> @@ -9,6 +9,7 @@
> #include "vlv_sideband.h"
>
> #include "display/intel_dpio_phy.h"
> +#include "display/intel_display_types.h"
>
> /*
> * IOSF sideband, see VLV2_SidebandMsg_HAS.docx and
> --
> 2.34.1
>
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/display: add intel_display_limits.h for key enums
2023-01-17 17:53 ` [Intel-gfx] [PATCH] drm/i915/display: add intel_display_limits.h for key enums Rodrigo Vivi
@ 2023-01-18 9:28 ` Jani Nikula
2023-01-25 12:14 ` Jani Nikula
1 sibling, 0 replies; 9+ messages in thread
From: Jani Nikula @ 2023-01-18 9:28 UTC (permalink / raw)
To: Rodrigo Vivi, ville.syrjala; +Cc: intel-gfx
On Tue, 17 Jan 2023, Rodrigo Vivi <rodrigo.vivi@intel.com> wrote:
> On Mon, Jan 16, 2023 at 06:46:44PM +0200, Jani Nikula wrote:
>> Move a handful of key enums to a new file intel_display_limits.h. These
>> are the enum types, and the MAX/NUM enumerations within them, that are
>> used in other headers. Otherwise, there's no common theme between them.
>>
>> Replace intel_display.h include with intel_display_limit.h where
>> relevant, and add the intel_display.h include directly in the .c files
>> where needed.
>>
>> Since intel_display.h is used almost everywhere in display/, include it
>> from intel_display_types.h to avoid massive changes across the
>> board. There are very few files that would need intel_display_types.h
>> but not intel_display.h so this is neglible, and further cleanup between
>> these headers can be left for the future.
>>
>> Overall this change drops the direct and indirect dependencies on
>> intel_display.h from about 300 to about 100 compilation units, because
>> we can drop the include from i915_drv.h.
>>
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Thanks!
I'd still like to get Ville's ack on this.
BR,
Jani.
>
>>
>> ---
>>
>> N.b. intel_display_limits.h is not a great name. I was hoping it was
>> only needed for the MAX/NUM enumerations such as I915_MAX_PIPES but
>> there are a number of headers that use the types for struct members as
>> well. intel_display_enums.h sounds too generic too. Suggestions?
>> ---
--
Jani Nikula, Intel Open Source Graphics Center
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [Intel-gfx] [PATCH] drm/i915/display: add intel_display_limits.h for key enums
2023-01-17 17:53 ` [Intel-gfx] [PATCH] drm/i915/display: add intel_display_limits.h for key enums Rodrigo Vivi
2023-01-18 9:28 ` Jani Nikula
@ 2023-01-25 12:14 ` Jani Nikula
1 sibling, 0 replies; 9+ messages in thread
From: Jani Nikula @ 2023-01-25 12:14 UTC (permalink / raw)
To: Rodrigo Vivi; +Cc: intel-gfx
On Tue, 17 Jan 2023, Rodrigo Vivi <rodrigo.vivi@intel.com> wrote:
> On Mon, Jan 16, 2023 at 06:46:44PM +0200, Jani Nikula wrote:
>> Move a handful of key enums to a new file intel_display_limits.h. These
>> are the enum types, and the MAX/NUM enumerations within them, that are
>> used in other headers. Otherwise, there's no common theme between them.
>>
>> Replace intel_display.h include with intel_display_limit.h where
>> relevant, and add the intel_display.h include directly in the .c files
>> where needed.
>>
>> Since intel_display.h is used almost everywhere in display/, include it
>> from intel_display_types.h to avoid massive changes across the
>> board. There are very few files that would need intel_display_types.h
>> but not intel_display.h so this is neglible, and further cleanup between
>> these headers can be left for the future.
>>
>> Overall this change drops the direct and indirect dependencies on
>> intel_display.h from about 300 to about 100 compilation units, because
>> we can drop the include from i915_drv.h.
>>
>> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Thanks for the review, pushed to din with Ville's IRC ack.
BR,
Jani.
>
>>
>> ---
>>
>> N.b. intel_display_limits.h is not a great name. I was hoping it was
>> only needed for the MAX/NUM enumerations such as I915_MAX_PIPES but
>> there are a number of headers that use the types for struct members as
>> well. intel_display_enums.h sounds too generic too. Suggestions?
>> ---
>> drivers/gpu/drm/i915/display/intel_bw.h | 2 +-
>> drivers/gpu/drm/i915/display/intel_cdclk.h | 2 +-
>> drivers/gpu/drm/i915/display/intel_display.h | 115 +---------------
>> .../gpu/drm/i915/display/intel_display_core.h | 2 +-
>> .../drm/i915/display/intel_display_limits.h | 124 ++++++++++++++++++
>> .../i915/display/intel_display_power_map.c | 1 +
>> .../drm/i915/display/intel_display_types.h | 1 +
>> drivers/gpu/drm/i915/display/intel_dvo_dev.h | 2 +-
>> drivers/gpu/drm/i915/display/skl_watermark.h | 2 +-
>> drivers/gpu/drm/i915/gem/i915_gem_create.c | 1 +
>> drivers/gpu/drm/i915/gem/i915_gem_domain.c | 1 +
>> drivers/gpu/drm/i915/gt/intel_ggtt.c | 1 +
>> drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c | 1 +
>> drivers/gpu/drm/i915/gt/intel_rps.c | 1 +
>> drivers/gpu/drm/i915/gvt/cmd_parser.c | 1 +
>> drivers/gpu/drm/i915/gvt/display.c | 1 +
>> drivers/gpu/drm/i915/gvt/fb_decoder.h | 2 +-
>> drivers/gpu/drm/i915/i915_drv.h | 2 +-
>> drivers/gpu/drm/i915/i915_pci.c | 1 +
>> drivers/gpu/drm/i915/i915_vma.c | 1 +
>> drivers/gpu/drm/i915/intel_device_info.c | 1 +
>> drivers/gpu/drm/i915/intel_device_info.h | 2 +-
>> drivers/gpu/drm/i915/intel_gvt_mmio_table.c | 1 +
>> drivers/gpu/drm/i915/intel_pm.c | 1 +
>> drivers/gpu/drm/i915/intel_pm_types.h | 2 +-
>> drivers/gpu/drm/i915/vlv_sideband.c | 1 +
>> 26 files changed, 149 insertions(+), 123 deletions(-)
>> create mode 100644 drivers/gpu/drm/i915/display/intel_display_limits.h
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_bw.h b/drivers/gpu/drm/i915/display/intel_bw.h
>> index cb7ee3a24a58..f20292143745 100644
>> --- a/drivers/gpu/drm/i915/display/intel_bw.h
>> +++ b/drivers/gpu/drm/i915/display/intel_bw.h
>> @@ -8,7 +8,7 @@
>>
>> #include <drm/drm_atomic.h>
>>
>> -#include "intel_display.h"
>> +#include "intel_display_limits.h"
>> #include "intel_display_power.h"
>> #include "intel_global_state.h"
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.h b/drivers/gpu/drm/i915/display/intel_cdclk.h
>> index c674879a84a5..51e2f6a11ce4 100644
>> --- a/drivers/gpu/drm/i915/display/intel_cdclk.h
>> +++ b/drivers/gpu/drm/i915/display/intel_cdclk.h
>> @@ -8,7 +8,7 @@
>>
>> #include <linux/types.h>
>>
>> -#include "intel_display.h"
>> +#include "intel_display_limits.h"
>> #include "intel_global_state.h"
>>
>> struct drm_i915_private;
>> diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
>> index ef73730f32b0..cb6f520cc575 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display.h
>> +++ b/drivers/gpu/drm/i915/display/intel_display.h
>> @@ -28,6 +28,7 @@
>> #include <drm/drm_util.h>
>>
>> #include "i915_reg_defs.h"
>> +#include "intel_display_limits.h"
>>
>> enum drm_scaling_filter;
>> struct dpll;
>> @@ -62,51 +63,9 @@ struct intel_remapped_info;
>> struct intel_rotation_info;
>> struct pci_dev;
>>
>> -/*
>> - * Keep the pipe enum values fixed: the code assumes that PIPE_A=0, the
>> - * rest have consecutive values and match the enum values of transcoders
>> - * with a 1:1 transcoder -> pipe mapping.
>> - */
>> -enum pipe {
>> - INVALID_PIPE = -1,
>> -
>> - PIPE_A = 0,
>> - PIPE_B,
>> - PIPE_C,
>> - PIPE_D,
>> - _PIPE_EDP,
>> -
>> - I915_MAX_PIPES = _PIPE_EDP
>> -};
>>
>> #define pipe_name(p) ((p) + 'A')
>>
>> -enum transcoder {
>> - INVALID_TRANSCODER = -1,
>> - /*
>> - * The following transcoders have a 1:1 transcoder -> pipe mapping,
>> - * keep their values fixed: the code assumes that TRANSCODER_A=0, the
>> - * rest have consecutive values and match the enum values of the pipes
>> - * they map to.
>> - */
>> - TRANSCODER_A = PIPE_A,
>> - TRANSCODER_B = PIPE_B,
>> - TRANSCODER_C = PIPE_C,
>> - TRANSCODER_D = PIPE_D,
>> -
>> - /*
>> - * The following transcoders can map to any pipe, their enum value
>> - * doesn't need to stay fixed.
>> - */
>> - TRANSCODER_EDP,
>> - TRANSCODER_DSI_0,
>> - TRANSCODER_DSI_1,
>> - TRANSCODER_DSI_A = TRANSCODER_DSI_0, /* legacy DSI */
>> - TRANSCODER_DSI_C = TRANSCODER_DSI_1, /* legacy DSI */
>> -
>> - I915_MAX_TRANSCODERS
>> -};
>> -
>> static inline const char *transcoder_name(enum transcoder transcoder)
>> {
>> switch (transcoder) {
>> @@ -147,29 +106,6 @@ enum i9xx_plane_id {
>> #define plane_name(p) ((p) + 'A')
>> #define sprite_name(p, s) ((p) * RUNTIME_INFO(dev_priv)->num_sprites[(p)] + (s) + 'A')
>>
>> -/*
>> - * Per-pipe plane identifier.
>> - * I915_MAX_PLANES in the enum below is the maximum (across all platforms)
>> - * number of planes per CRTC. Not all platforms really have this many planes,
>> - * which means some arrays of size I915_MAX_PLANES may have unused entries
>> - * between the topmost sprite plane and the cursor plane.
>> - *
>> - * This is expected to be passed to various register macros
>> - * (eg. PLANE_CTL(), PS_PLANE_SEL(), etc.) so adjust with care.
>> - */
>> -enum plane_id {
>> - PLANE_PRIMARY,
>> - PLANE_SPRITE0,
>> - PLANE_SPRITE1,
>> - PLANE_SPRITE2,
>> - PLANE_SPRITE3,
>> - PLANE_SPRITE4,
>> - PLANE_SPRITE5,
>> - PLANE_CURSOR,
>> -
>> - I915_MAX_PLANES,
>> -};
>> -
>> #define for_each_plane_id_on_crtc(__crtc, __p) \
>> for ((__p) = PLANE_PRIMARY; (__p) < I915_MAX_PLANES; (__p)++) \
>> for_each_if((__crtc)->plane_ids_mask & BIT(__p))
>> @@ -182,34 +118,6 @@ enum plane_id {
>> for_each_dbuf_slice((__dev_priv), (__slice)) \
>> for_each_if((__mask) & BIT(__slice))
>>
>> -enum port {
>> - PORT_NONE = -1,
>> -
>> - PORT_A = 0,
>> - PORT_B,
>> - PORT_C,
>> - PORT_D,
>> - PORT_E,
>> - PORT_F,
>> - PORT_G,
>> - PORT_H,
>> - PORT_I,
>> -
>> - /* tgl+ */
>> - PORT_TC1 = PORT_D,
>> - PORT_TC2,
>> - PORT_TC3,
>> - PORT_TC4,
>> - PORT_TC5,
>> - PORT_TC6,
>> -
>> - /* XE_LPD repositions D/E offsets and bitfields */
>> - PORT_D_XELPD = PORT_TC5,
>> - PORT_E_XELPD,
>> -
>> - I915_MAX_PORTS
>> -};
>> -
>> #define port_name(p) ((p) + 'A')
>>
>> /*
>> @@ -312,27 +220,6 @@ enum phy_fia {
>> FIA3,
>> };
>>
>> -enum hpd_pin {
>> - HPD_NONE = 0,
>> - HPD_TV = HPD_NONE, /* TV is known to be unreliable */
>> - HPD_CRT,
>> - HPD_SDVO_B,
>> - HPD_SDVO_C,
>> - HPD_PORT_A,
>> - HPD_PORT_B,
>> - HPD_PORT_C,
>> - HPD_PORT_D,
>> - HPD_PORT_E,
>> - HPD_PORT_TC1,
>> - HPD_PORT_TC2,
>> - HPD_PORT_TC3,
>> - HPD_PORT_TC4,
>> - HPD_PORT_TC5,
>> - HPD_PORT_TC6,
>> -
>> - HPD_NUM_PINS
>> -};
>> -
>> #define for_each_hpd_pin(__pin) \
>> for ((__pin) = (HPD_NONE + 1); (__pin) < HPD_NUM_PINS; (__pin)++)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h
>> index 57ddce3ba02b..1d5d9d56fb3f 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display_core.h
>> +++ b/drivers/gpu/drm/i915/display/intel_display_core.h
>> @@ -17,7 +17,7 @@
>> #include <drm/drm_modeset_lock.h>
>>
>> #include "intel_cdclk.h"
>> -#include "intel_display.h"
>> +#include "intel_display_limits.h"
>> #include "intel_display_power.h"
>> #include "intel_dmc.h"
>> #include "intel_dpll_mgr.h"
>> diff --git a/drivers/gpu/drm/i915/display/intel_display_limits.h b/drivers/gpu/drm/i915/display/intel_display_limits.h
>> new file mode 100644
>> index 000000000000..5126d0b5ae5d
>> --- /dev/null
>> +++ b/drivers/gpu/drm/i915/display/intel_display_limits.h
>> @@ -0,0 +1,124 @@
>> +/* SPDX-License-Identifier: MIT */
>> +/*
>> + * Copyright © 2022 Intel Corporation
>> + */
>> +
>> +#ifndef __INTEL_DISPLAY_LIMITS_H__
>> +#define __INTEL_DISPLAY_LIMITS_H__
>> +
>> +/*
>> + * Keep the pipe enum values fixed: the code assumes that PIPE_A=0, the
>> + * rest have consecutive values and match the enum values of transcoders
>> + * with a 1:1 transcoder -> pipe mapping.
>> + */
>> +enum pipe {
>> + INVALID_PIPE = -1,
>> +
>> + PIPE_A = 0,
>> + PIPE_B,
>> + PIPE_C,
>> + PIPE_D,
>> + _PIPE_EDP,
>> +
>> + I915_MAX_PIPES = _PIPE_EDP
>> +};
>> +
>> +enum transcoder {
>> + INVALID_TRANSCODER = -1,
>> + /*
>> + * The following transcoders have a 1:1 transcoder -> pipe mapping,
>> + * keep their values fixed: the code assumes that TRANSCODER_A=0, the
>> + * rest have consecutive values and match the enum values of the pipes
>> + * they map to.
>> + */
>> + TRANSCODER_A = PIPE_A,
>> + TRANSCODER_B = PIPE_B,
>> + TRANSCODER_C = PIPE_C,
>> + TRANSCODER_D = PIPE_D,
>> +
>> + /*
>> + * The following transcoders can map to any pipe, their enum value
>> + * doesn't need to stay fixed.
>> + */
>> + TRANSCODER_EDP,
>> + TRANSCODER_DSI_0,
>> + TRANSCODER_DSI_1,
>> + TRANSCODER_DSI_A = TRANSCODER_DSI_0, /* legacy DSI */
>> + TRANSCODER_DSI_C = TRANSCODER_DSI_1, /* legacy DSI */
>> +
>> + I915_MAX_TRANSCODERS
>> +};
>> +
>> +/*
>> + * Per-pipe plane identifier.
>> + * I915_MAX_PLANES in the enum below is the maximum (across all platforms)
>> + * number of planes per CRTC. Not all platforms really have this many planes,
>> + * which means some arrays of size I915_MAX_PLANES may have unused entries
>> + * between the topmost sprite plane and the cursor plane.
>> + *
>> + * This is expected to be passed to various register macros
>> + * (eg. PLANE_CTL(), PS_PLANE_SEL(), etc.) so adjust with care.
>> + */
>> +enum plane_id {
>> + PLANE_PRIMARY,
>> + PLANE_SPRITE0,
>> + PLANE_SPRITE1,
>> + PLANE_SPRITE2,
>> + PLANE_SPRITE3,
>> + PLANE_SPRITE4,
>> + PLANE_SPRITE5,
>> + PLANE_CURSOR,
>> +
>> + I915_MAX_PLANES,
>> +};
>> +
>> +enum port {
>> + PORT_NONE = -1,
>> +
>> + PORT_A = 0,
>> + PORT_B,
>> + PORT_C,
>> + PORT_D,
>> + PORT_E,
>> + PORT_F,
>> + PORT_G,
>> + PORT_H,
>> + PORT_I,
>> +
>> + /* tgl+ */
>> + PORT_TC1 = PORT_D,
>> + PORT_TC2,
>> + PORT_TC3,
>> + PORT_TC4,
>> + PORT_TC5,
>> + PORT_TC6,
>> +
>> + /* XE_LPD repositions D/E offsets and bitfields */
>> + PORT_D_XELPD = PORT_TC5,
>> + PORT_E_XELPD,
>> +
>> + I915_MAX_PORTS
>> +};
>> +
>> +enum hpd_pin {
>> + HPD_NONE = 0,
>> + HPD_TV = HPD_NONE, /* TV is known to be unreliable */
>> + HPD_CRT,
>> + HPD_SDVO_B,
>> + HPD_SDVO_C,
>> + HPD_PORT_A,
>> + HPD_PORT_B,
>> + HPD_PORT_C,
>> + HPD_PORT_D,
>> + HPD_PORT_E,
>> + HPD_PORT_TC1,
>> + HPD_PORT_TC2,
>> + HPD_PORT_TC3,
>> + HPD_PORT_TC4,
>> + HPD_PORT_TC5,
>> + HPD_PORT_TC6,
>> +
>> + HPD_NUM_PINS
>> +};
>> +
>> +#endif /* __INTEL_DISPLAY_LIMITS_H__ */
>> diff --git a/drivers/gpu/drm/i915/display/intel_display_power_map.c b/drivers/gpu/drm/i915/display/intel_display_power_map.c
>> index f5d66ca85b19..6645eb1911d8 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display_power_map.c
>> +++ b/drivers/gpu/drm/i915/display/intel_display_power_map.c
>> @@ -10,6 +10,7 @@
>>
>> #include "intel_display_power_map.h"
>> #include "intel_display_power_well.h"
>> +#include "intel_display_types.h"
>>
>> #define __LIST_INLINE_ELEMS(__elem_type, ...) \
>> ((__elem_type[]) { __VA_ARGS__ })
>> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
>> index 32e8b2fc3cc6..8f3d5d02e207 100644
>> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
>> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
>> @@ -50,6 +50,7 @@
>> #include "i915_vma_types.h"
>> #include "intel_bios.h"
>> #include "intel_display.h"
>> +#include "intel_display_limits.h"
>> #include "intel_display_power.h"
>> #include "intel_dpll_mgr.h"
>> #include "intel_pm_types.h"
>> diff --git a/drivers/gpu/drm/i915/display/intel_dvo_dev.h b/drivers/gpu/drm/i915/display/intel_dvo_dev.h
>> index ea8eb7dcee38..f7e98e1c6470 100644
>> --- a/drivers/gpu/drm/i915/display/intel_dvo_dev.h
>> +++ b/drivers/gpu/drm/i915/display/intel_dvo_dev.h
>> @@ -25,7 +25,7 @@
>>
>> #include "i915_reg_defs.h"
>>
>> -#include "intel_display.h"
>> +#include "intel_display_limits.h"
>>
>> enum drm_connector_status;
>> struct drm_display_mode;
>> diff --git a/drivers/gpu/drm/i915/display/skl_watermark.h b/drivers/gpu/drm/i915/display/skl_watermark.h
>> index 7a5a4e67cd73..37954c472070 100644
>> --- a/drivers/gpu/drm/i915/display/skl_watermark.h
>> +++ b/drivers/gpu/drm/i915/display/skl_watermark.h
>> @@ -8,7 +8,7 @@
>>
>> #include <linux/types.h>
>>
>> -#include "intel_display.h"
>> +#include "intel_display_limits.h"
>> #include "intel_global_state.h"
>> #include "intel_pm_types.h"
>>
>> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_create.c b/drivers/gpu/drm/i915/gem/i915_gem_create.c
>> index 005a7f842784..e76c9703680e 100644
>> --- a/drivers/gpu/drm/i915/gem/i915_gem_create.c
>> +++ b/drivers/gpu/drm/i915/gem/i915_gem_create.c
>> @@ -5,6 +5,7 @@
>>
>> #include <drm/drm_fourcc.h>
>>
>> +#include "display/intel_display.h"
>> #include "gem/i915_gem_ioctls.h"
>> #include "gem/i915_gem_lmem.h"
>> #include "gem/i915_gem_region.h"
>> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_domain.c b/drivers/gpu/drm/i915/gem/i915_gem_domain.c
>> index 9969e687ad85..497de40b8e68 100644
>> --- a/drivers/gpu/drm/i915/gem/i915_gem_domain.c
>> +++ b/drivers/gpu/drm/i915/gem/i915_gem_domain.c
>> @@ -4,6 +4,7 @@
>> * Copyright © 2014-2016 Intel Corporation
>> */
>>
>> +#include "display/intel_display.h"
>> #include "display/intel_frontbuffer.h"
>> #include "gt/intel_gt.h"
>>
>> diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c b/drivers/gpu/drm/i915/gt/intel_ggtt.c
>> index 0c7fe360f873..b2f3f49f418f 100644
>> --- a/drivers/gpu/drm/i915/gt/intel_ggtt.c
>> +++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c
>> @@ -12,6 +12,7 @@
>> #include <drm/i915_drm.h>
>> #include <drm/intel-gtt.h>
>>
>> +#include "display/intel_display.h"
>> #include "gem/i915_gem_lmem.h"
>>
>> #include "intel_ggtt_gmch.h"
>> diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
>> index 7ac8ed13e1fe..37d0b0fe791d 100644
>> --- a/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
>> +++ b/drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c
>> @@ -5,6 +5,7 @@
>>
>> #include <linux/highmem.h>
>>
>> +#include "display/intel_display.h"
>> #include "i915_drv.h"
>> #include "i915_reg.h"
>> #include "i915_scatterlist.h"
>> diff --git a/drivers/gpu/drm/i915/gt/intel_rps.c b/drivers/gpu/drm/i915/gt/intel_rps.c
>> index 9ad3bc7201cb..f5d7b5126433 100644
>> --- a/drivers/gpu/drm/i915/gt/intel_rps.c
>> +++ b/drivers/gpu/drm/i915/gt/intel_rps.c
>> @@ -7,6 +7,7 @@
>>
>> #include <drm/i915_drm.h>
>>
>> +#include "display/intel_display.h"
>> #include "i915_drv.h"
>> #include "i915_irq.h"
>> #include "intel_breadcrumbs.h"
>> diff --git a/drivers/gpu/drm/i915/gvt/cmd_parser.c b/drivers/gpu/drm/i915/gvt/cmd_parser.c
>> index 0ebf5fbf0e39..3c4ae1da0d41 100644
>> --- a/drivers/gpu/drm/i915/gvt/cmd_parser.c
>> +++ b/drivers/gpu/drm/i915/gvt/cmd_parser.c
>> @@ -49,6 +49,7 @@
>> #include "i915_pvinfo.h"
>> #include "trace.h"
>>
>> +#include "display/intel_display.h"
>> #include "gem/i915_gem_context.h"
>> #include "gem/i915_gem_pm.h"
>> #include "gt/intel_context.h"
>> diff --git a/drivers/gpu/drm/i915/gvt/display.c b/drivers/gpu/drm/i915/gvt/display.c
>> index c033249e73f4..4d898b14de93 100644
>> --- a/drivers/gpu/drm/i915/gvt/display.c
>> +++ b/drivers/gpu/drm/i915/gvt/display.c
>> @@ -36,6 +36,7 @@
>> #include "i915_reg.h"
>> #include "gvt.h"
>>
>> +#include "display/intel_display.h"
>> #include "display/intel_dpio_phy.h"
>>
>> static int get_edp_pipe(struct intel_vgpu *vgpu)
>> diff --git a/drivers/gpu/drm/i915/gvt/fb_decoder.h b/drivers/gpu/drm/i915/gvt/fb_decoder.h
>> index 0daa3931aef7..4eff44194439 100644
>> --- a/drivers/gpu/drm/i915/gvt/fb_decoder.h
>> +++ b/drivers/gpu/drm/i915/gvt/fb_decoder.h
>> @@ -38,7 +38,7 @@
>>
>> #include <linux/types.h>
>>
>> -#include "display/intel_display.h"
>> +#include "display/intel_display_limits.h"
>>
>> struct intel_vgpu;
>>
>> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
>> index 48fd82722f12..aa7901bf484f 100644
>> --- a/drivers/gpu/drm/i915/i915_drv.h
>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>> @@ -36,7 +36,7 @@
>>
>> #include <drm/ttm/ttm_device.h>
>>
>> -#include "display/intel_display.h"
>> +#include "display/intel_display_limits.h"
>> #include "display/intel_display_core.h"
>>
>> #include "gem/i915_gem_context_types.h"
>> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
>> index bc1af7e8f398..c69637bf0ad7 100644
>> --- a/drivers/gpu/drm/i915/i915_pci.c
>> +++ b/drivers/gpu/drm/i915/i915_pci.c
>> @@ -26,6 +26,7 @@
>> #include <drm/drm_drv.h>
>> #include <drm/i915_pciids.h>
>>
>> +#include "display/intel_display.h"
>> #include "gt/intel_gt_regs.h"
>> #include "gt/intel_sa_media.h"
>>
>> diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
>> index 5272e2be990e..f51fd9fd4c89 100644
>> --- a/drivers/gpu/drm/i915/i915_vma.c
>> +++ b/drivers/gpu/drm/i915/i915_vma.c
>> @@ -26,6 +26,7 @@
>> #include <linux/dma-fence-array.h>
>> #include <drm/drm_gem.h>
>>
>> +#include "display/intel_display.h"
>> #include "display/intel_frontbuffer.h"
>> #include "gem/i915_gem_lmem.h"
>> #include "gem/i915_gem_tiling.h"
>> diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
>> index 05e90d09b208..98769e5f2c3d 100644
>> --- a/drivers/gpu/drm/i915/intel_device_info.c
>> +++ b/drivers/gpu/drm/i915/intel_device_info.c
>> @@ -29,6 +29,7 @@
>>
>> #include "display/intel_cdclk.h"
>> #include "display/intel_de.h"
>> +#include "display/intel_display.h"
>> #include "gt/intel_gt_regs.h"
>> #include "i915_drv.h"
>> #include "i915_reg.h"
>> diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
>> index d588e5fd2eea..80bda653d61b 100644
>> --- a/drivers/gpu/drm/i915/intel_device_info.h
>> +++ b/drivers/gpu/drm/i915/intel_device_info.h
>> @@ -29,7 +29,7 @@
>>
>> #include "intel_step.h"
>>
>> -#include "display/intel_display.h"
>> +#include "display/intel_display_limits.h"
>>
>> #include "gt/intel_engine_types.h"
>> #include "gt/intel_context_types.h"
>> diff --git a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c
>> index ce6b3c3b636a..1f4805aa2b08 100644
>> --- a/drivers/gpu/drm/i915/intel_gvt_mmio_table.c
>> +++ b/drivers/gpu/drm/i915/intel_gvt_mmio_table.c
>> @@ -5,6 +5,7 @@
>>
>> #include "display/intel_audio_regs.h"
>> #include "display/intel_backlight_regs.h"
>> +#include "display/intel_display_types.h"
>> #include "display/intel_dmc_regs.h"
>> #include "display/intel_dpio_phy.h"
>> #include "display/vlv_dsi_pll_regs.h"
>> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
>> index 73c88b1c9545..3fc65bd12cc1 100644
>> --- a/drivers/gpu/drm/i915/intel_pm.c
>> +++ b/drivers/gpu/drm/i915/intel_pm.c
>> @@ -26,6 +26,7 @@
>> */
>>
>> #include "display/intel_de.h"
>> +#include "display/intel_display.h"
>> #include "display/intel_display_trace.h"
>> #include "display/skl_watermark.h"
>>
>> diff --git a/drivers/gpu/drm/i915/intel_pm_types.h b/drivers/gpu/drm/i915/intel_pm_types.h
>> index 211632f58751..93152537b420 100644
>> --- a/drivers/gpu/drm/i915/intel_pm_types.h
>> +++ b/drivers/gpu/drm/i915/intel_pm_types.h
>> @@ -8,7 +8,7 @@
>>
>> #include <linux/types.h>
>>
>> -#include "display/intel_display.h"
>> +#include "display/intel_display_limits.h"
>>
>> enum intel_ddb_partitioning {
>> INTEL_DDB_PART_1_2,
>> diff --git a/drivers/gpu/drm/i915/vlv_sideband.c b/drivers/gpu/drm/i915/vlv_sideband.c
>> index 6eea6e1a99c0..b98dec3ad817 100644
>> --- a/drivers/gpu/drm/i915/vlv_sideband.c
>> +++ b/drivers/gpu/drm/i915/vlv_sideband.c
>> @@ -9,6 +9,7 @@
>> #include "vlv_sideband.h"
>>
>> #include "display/intel_dpio_phy.h"
>> +#include "display/intel_display_types.h"
>>
>> /*
>> * IOSF sideband, see VLV2_SidebandMsg_HAS.docx and
>> --
>> 2.34.1
>>
--
Jani Nikula, Intel Open Source Graphics Center
^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2023-01-25 12:15 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
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2023-01-16 16:46 [Intel-gfx] [PATCH] drm/i915/display: add intel_display_limits.h for key enums Jani Nikula
2023-01-16 17:38 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/display: add intel_display_limits.h for key enums (rev2) Patchwork
2023-01-16 18:06 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2023-01-16 19:24 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/display: add intel_display_limits.h for key enums (rev3) Patchwork
2023-01-16 19:49 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-01-16 22:30 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2023-01-17 17:53 ` [Intel-gfx] [PATCH] drm/i915/display: add intel_display_limits.h for key enums Rodrigo Vivi
2023-01-18 9:28 ` Jani Nikula
2023-01-25 12:14 ` Jani Nikula
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