From: patchwork-bot+linux-riscv@kernel.org
To: Jisheng Zhang <jszhang@kernel.org>
Cc: linux-riscv@lists.infradead.org, palmer@dabbelt.com,
paul.walmsley@sifive.com, aou@eecs.berkeley.edu,
anup@brainfault.org, atishp@atishpatra.org, heiko@sntech.de,
ajones@ventanamicro.com, conor.dooley@microchip.com,
linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
kvm-riscv@lists.infradead.org
Subject: Re: [PATCH v5 00/13] riscv: improve boot time isa extensions handling
Date: Thu, 02 Feb 2023 23:40:35 +0000 [thread overview]
Message-ID: <167538123525.14322.1108858489360294941.git-patchwork-notify@kernel.org> (raw)
In-Reply-To: <20230128172856.3814-1-jszhang@kernel.org>
Hello:
This series was applied to riscv/linux.git (for-next)
by Palmer Dabbelt <palmer@rivosinc.com>:
On Sun, 29 Jan 2023 01:28:43 +0800 you wrote:
> Generally, riscv ISA extensions are fixed for any specific hardware
> platform, so a hart's features won't change after booting, this
> chacteristic makes it straightforward to use a static branch to check
> a specific ISA extension is supported or not to optimize performance.
>
> However, some ISA extensions such as SVPBMT and ZICBOM are handled
> via. the alternative sequences.
>
> [...]
Here is the summary with links:
- [v5,01/13] riscv: move riscv_noncoherent_supported() out of ZICBOM probe
https://git.kernel.org/riscv/c/abcc445acdbe
- [v5,02/13] riscv: cpufeature: detect RISCV_ALTERNATIVES_EARLY_BOOT earlier
https://git.kernel.org/riscv/c/191b27c7c0e8
- [v5,03/13] riscv: hwcap: make ISA extension ids can be used in asm
https://git.kernel.org/riscv/c/d8a3d8a75206
- [v5,04/13] riscv: cpufeature: extend riscv_cpufeature_patch_func to all ISA extensions
https://git.kernel.org/riscv/c/4bf8860760d9
- [v5,05/13] riscv: introduce riscv_has_extension_[un]likely()
https://git.kernel.org/riscv/c/bdda5d554e43
- [v5,06/13] riscv: fpu: switch has_fpu() to riscv_has_extension_likely()
https://git.kernel.org/riscv/c/702e64550b12
- [v5,07/13] riscv: module: move find_section to module.h
https://git.kernel.org/riscv/c/e0c267e03b0c
- [v5,08/13] riscv: module: Add ADD16 and SUB16 rela types
https://git.kernel.org/riscv/c/1bc400ffb52b
- [v5,09/13] riscv: switch to relative alternative entries
https://git.kernel.org/riscv/c/8d23e94a4433
- [v5,10/13] riscv: alternative: patch alternatives in the vDSO
https://git.kernel.org/riscv/c/cabfd146b371
- [v5,11/13] riscv: cpu_relax: switch to riscv_has_extension_likely()
https://git.kernel.org/riscv/c/95bc69a47be2
- [v5,12/13] riscv: KVM: Switch has_svinval() to riscv_has_extension_unlikely()
https://git.kernel.org/riscv/c/e8ad17d2b5f3
- [v5,13/13] riscv: remove riscv_isa_ext_keys[] array and related usage
https://git.kernel.org/riscv/c/03966594e117
You are awesome, thank you!
--
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html
WARNING: multiple messages have this Message-ID (diff)
From: patchwork-bot+linux-riscv@kernel.org
To: Jisheng Zhang <jszhang@kernel.org>
Cc: linux-riscv@lists.infradead.org, palmer@dabbelt.com,
paul.walmsley@sifive.com, aou@eecs.berkeley.edu,
anup@brainfault.org, atishp@atishpatra.org, heiko@sntech.de,
ajones@ventanamicro.com, conor.dooley@microchip.com,
linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
kvm-riscv@lists.infradead.org
Subject: Re: [PATCH v5 00/13] riscv: improve boot time isa extensions handling
Date: Thu, 02 Feb 2023 23:40:35 +0000 [thread overview]
Message-ID: <167538123525.14322.1108858489360294941.git-patchwork-notify@kernel.org> (raw)
In-Reply-To: <20230128172856.3814-1-jszhang@kernel.org>
Hello:
This series was applied to riscv/linux.git (for-next)
by Palmer Dabbelt <palmer@rivosinc.com>:
On Sun, 29 Jan 2023 01:28:43 +0800 you wrote:
> Generally, riscv ISA extensions are fixed for any specific hardware
> platform, so a hart's features won't change after booting, this
> chacteristic makes it straightforward to use a static branch to check
> a specific ISA extension is supported or not to optimize performance.
>
> However, some ISA extensions such as SVPBMT and ZICBOM are handled
> via. the alternative sequences.
>
> [...]
Here is the summary with links:
- [v5,01/13] riscv: move riscv_noncoherent_supported() out of ZICBOM probe
https://git.kernel.org/riscv/c/abcc445acdbe
- [v5,02/13] riscv: cpufeature: detect RISCV_ALTERNATIVES_EARLY_BOOT earlier
https://git.kernel.org/riscv/c/191b27c7c0e8
- [v5,03/13] riscv: hwcap: make ISA extension ids can be used in asm
https://git.kernel.org/riscv/c/d8a3d8a75206
- [v5,04/13] riscv: cpufeature: extend riscv_cpufeature_patch_func to all ISA extensions
https://git.kernel.org/riscv/c/4bf8860760d9
- [v5,05/13] riscv: introduce riscv_has_extension_[un]likely()
https://git.kernel.org/riscv/c/bdda5d554e43
- [v5,06/13] riscv: fpu: switch has_fpu() to riscv_has_extension_likely()
https://git.kernel.org/riscv/c/702e64550b12
- [v5,07/13] riscv: module: move find_section to module.h
https://git.kernel.org/riscv/c/e0c267e03b0c
- [v5,08/13] riscv: module: Add ADD16 and SUB16 rela types
https://git.kernel.org/riscv/c/1bc400ffb52b
- [v5,09/13] riscv: switch to relative alternative entries
https://git.kernel.org/riscv/c/8d23e94a4433
- [v5,10/13] riscv: alternative: patch alternatives in the vDSO
https://git.kernel.org/riscv/c/cabfd146b371
- [v5,11/13] riscv: cpu_relax: switch to riscv_has_extension_likely()
https://git.kernel.org/riscv/c/95bc69a47be2
- [v5,12/13] riscv: KVM: Switch has_svinval() to riscv_has_extension_unlikely()
https://git.kernel.org/riscv/c/e8ad17d2b5f3
- [v5,13/13] riscv: remove riscv_isa_ext_keys[] array and related usage
https://git.kernel.org/riscv/c/03966594e117
You are awesome, thank you!
--
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html
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next prev parent reply other threads:[~2023-02-02 23:40 UTC|newest]
Thread overview: 78+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-28 17:28 [PATCH v5 00/13] riscv: improve boot time isa extensions handling Jisheng Zhang
2023-01-28 17:28 ` Jisheng Zhang
2023-01-28 17:28 ` [PATCH v5 01/13] riscv: move riscv_noncoherent_supported() out of ZICBOM probe Jisheng Zhang
2023-01-28 17:28 ` Jisheng Zhang
2023-01-28 17:28 ` [PATCH v5 02/13] riscv: cpufeature: detect RISCV_ALTERNATIVES_EARLY_BOOT earlier Jisheng Zhang
2023-01-28 17:28 ` Jisheng Zhang
2023-01-28 17:28 ` [PATCH v5 03/13] riscv: hwcap: make ISA extension ids can be used in asm Jisheng Zhang
2023-01-28 17:28 ` Jisheng Zhang
2023-01-28 17:28 ` [PATCH v5 04/13] riscv: cpufeature: extend riscv_cpufeature_patch_func to all ISA extensions Jisheng Zhang
2023-01-28 17:28 ` Jisheng Zhang
2023-01-28 17:28 ` [PATCH v5 05/13] riscv: introduce riscv_has_extension_[un]likely() Jisheng Zhang
2023-01-28 17:28 ` Jisheng Zhang
2023-01-28 17:28 ` [PATCH v5 06/13] riscv: fpu: switch has_fpu() to riscv_has_extension_likely() Jisheng Zhang
2023-01-28 17:28 ` Jisheng Zhang
2023-03-22 12:01 ` Jason A. Donenfeld
2023-03-22 12:01 ` Jason A. Donenfeld
2023-03-22 12:09 ` [PATCH] riscv: require alternatives framework when selecting FPU support Jason A. Donenfeld
2023-03-22 12:09 ` Jason A. Donenfeld
2023-03-22 12:46 ` Andrew Jones
2023-03-22 12:46 ` Andrew Jones
2023-03-22 15:17 ` Conor Dooley
2023-03-22 15:17 ` Conor Dooley
2023-03-22 19:26 ` Andrew Jones
2023-03-22 19:26 ` Andrew Jones
2023-03-22 19:44 ` Conor Dooley
2023-03-22 19:44 ` Conor Dooley
2023-03-22 20:05 ` Conor Dooley
2023-03-22 20:05 ` Conor Dooley
2023-03-22 20:19 ` Jason A. Donenfeld
2023-03-22 20:19 ` Jason A. Donenfeld
2023-03-23 14:49 ` Conor Dooley
2023-03-23 14:49 ` Conor Dooley
2023-03-23 15:56 ` Jason A. Donenfeld
2023-03-23 15:56 ` Jason A. Donenfeld
2023-03-23 22:19 ` Conor Dooley
2023-03-23 22:19 ` Conor Dooley
2023-01-28 17:28 ` [PATCH v5 07/13] riscv: module: move find_section to module.h Jisheng Zhang
2023-01-28 17:28 ` Jisheng Zhang
2023-01-28 17:28 ` [PATCH v5 08/13] riscv: module: Add ADD16 and SUB16 rela types Jisheng Zhang
2023-01-28 17:28 ` Jisheng Zhang
2023-01-28 17:28 ` [PATCH v5 09/13] riscv: switch to relative alternative entries Jisheng Zhang
2023-01-28 17:28 ` Jisheng Zhang
2023-01-28 17:28 ` [PATCH v5 10/13] riscv: alternative: patch alternatives in the vDSO Jisheng Zhang
2023-01-28 17:28 ` Jisheng Zhang
2023-01-28 17:28 ` [PATCH v5 11/13] riscv: cpu_relax: switch to riscv_has_extension_likely() Jisheng Zhang
2023-01-28 17:28 ` Jisheng Zhang
2023-01-28 17:28 ` [PATCH v5 12/13] riscv: KVM: Switch has_svinval() to riscv_has_extension_unlikely() Jisheng Zhang
2023-01-28 17:28 ` Jisheng Zhang
2023-01-28 17:28 ` [PATCH v5 13/13] riscv: remove riscv_isa_ext_keys[] array and related usage Jisheng Zhang
2023-01-28 17:28 ` Jisheng Zhang
2023-02-02 23:39 ` [PATCH v5 00/13] riscv: improve boot time isa extensions handling Palmer Dabbelt
2023-02-02 23:39 ` Palmer Dabbelt
2023-02-02 23:40 ` patchwork-bot+linux-riscv [this message]
2023-02-02 23:40 ` patchwork-bot+linux-riscv
2023-02-12 15:43 ` Guenter Roeck
2023-02-12 15:43 ` Guenter Roeck
2023-02-12 15:59 ` Conor Dooley
2023-02-12 15:59 ` Conor Dooley
2023-02-12 16:33 ` Conor Dooley
2023-02-12 16:33 ` Conor Dooley
2023-02-12 17:06 ` Conor Dooley
2023-02-12 17:06 ` Conor Dooley
2023-02-12 18:06 ` Conor Dooley
2023-02-12 18:06 ` Conor Dooley
2023-02-12 18:14 ` Guenter Roeck
2023-02-12 18:14 ` Guenter Roeck
2023-02-12 18:20 ` Conor Dooley
2023-02-12 18:20 ` Conor Dooley
2023-02-12 18:38 ` Guenter Roeck
2023-02-12 18:38 ` Guenter Roeck
2023-02-12 18:45 ` Conor Dooley
2023-02-12 18:45 ` Conor Dooley
2023-02-12 20:27 ` Guenter Roeck
2023-02-12 20:27 ` Guenter Roeck
2023-02-12 20:39 ` Conor Dooley
2023-02-12 20:39 ` Conor Dooley
2023-02-12 22:21 ` Guenter Roeck
2023-02-12 22:21 ` Guenter Roeck
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