All of lore.kernel.org
 help / color / mirror / Atom feed
* [PATCHv1 1/1] arm64: dts: rockchip: rk3588: add cache level information
@ 2023-03-17 17:41 ` Sebastian Reichel
  0 siblings, 0 replies; 6+ messages in thread
From: Sebastian Reichel @ 2023-03-17 17:41 UTC (permalink / raw)
  To: Heiko Stuebner, linux-rockchip
  Cc: Rob Herring, Krzysztof Kozlowski, devicetree, linux-arm-kernel,
	linux-kernel, Sebastian Reichel, kernel

Add missing, mandatory cache-level information for RK3588.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
---
Fixes init_of_cache_level() returning -EINVAL
---
 arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
index 82dab5fcc3f0..0fb911704a64 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
@@ -440,6 +440,7 @@ l2_cache_l0: l2-cache-l0 {
 			cache-size = <131072>;
 			cache-line-size = <64>;
 			cache-sets = <512>;
+			cache-level = <2>;
 			next-level-cache = <&l3_cache>;
 		};
 
@@ -448,6 +449,7 @@ l2_cache_l1: l2-cache-l1 {
 			cache-size = <131072>;
 			cache-line-size = <64>;
 			cache-sets = <512>;
+			cache-level = <2>;
 			next-level-cache = <&l3_cache>;
 		};
 
@@ -456,6 +458,7 @@ l2_cache_l2: l2-cache-l2 {
 			cache-size = <131072>;
 			cache-line-size = <64>;
 			cache-sets = <512>;
+			cache-level = <2>;
 			next-level-cache = <&l3_cache>;
 		};
 
@@ -464,6 +467,7 @@ l2_cache_l3: l2-cache-l3 {
 			cache-size = <131072>;
 			cache-line-size = <64>;
 			cache-sets = <512>;
+			cache-level = <2>;
 			next-level-cache = <&l3_cache>;
 		};
 
@@ -472,6 +476,7 @@ l2_cache_b0: l2-cache-b0 {
 			cache-size = <524288>;
 			cache-line-size = <64>;
 			cache-sets = <1024>;
+			cache-level = <2>;
 			next-level-cache = <&l3_cache>;
 		};
 
@@ -480,6 +485,7 @@ l2_cache_b1: l2-cache-b1 {
 			cache-size = <524288>;
 			cache-line-size = <64>;
 			cache-sets = <1024>;
+			cache-level = <2>;
 			next-level-cache = <&l3_cache>;
 		};
 
@@ -488,6 +494,7 @@ l2_cache_b2: l2-cache-b2 {
 			cache-size = <524288>;
 			cache-line-size = <64>;
 			cache-sets = <1024>;
+			cache-level = <2>;
 			next-level-cache = <&l3_cache>;
 		};
 
@@ -496,6 +503,7 @@ l2_cache_b3: l2-cache-b3 {
 			cache-size = <524288>;
 			cache-line-size = <64>;
 			cache-sets = <1024>;
+			cache-level = <2>;
 			next-level-cache = <&l3_cache>;
 		};
 
@@ -504,6 +512,7 @@ l3_cache: l3-cache {
 			cache-size = <3145728>;
 			cache-line-size = <64>;
 			cache-sets = <4096>;
+			cache-level = <3>;
 		};
 	};
 
-- 
2.39.2


^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCHv1 1/1] arm64: dts: rockchip: rk3588: add cache level information
@ 2023-03-17 17:41 ` Sebastian Reichel
  0 siblings, 0 replies; 6+ messages in thread
From: Sebastian Reichel @ 2023-03-17 17:41 UTC (permalink / raw)
  To: Heiko Stuebner, linux-rockchip
  Cc: Rob Herring, Krzysztof Kozlowski, devicetree, linux-arm-kernel,
	linux-kernel, Sebastian Reichel, kernel

Add missing, mandatory cache-level information for RK3588.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
---
Fixes init_of_cache_level() returning -EINVAL
---
 arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
index 82dab5fcc3f0..0fb911704a64 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
@@ -440,6 +440,7 @@ l2_cache_l0: l2-cache-l0 {
 			cache-size = <131072>;
 			cache-line-size = <64>;
 			cache-sets = <512>;
+			cache-level = <2>;
 			next-level-cache = <&l3_cache>;
 		};
 
@@ -448,6 +449,7 @@ l2_cache_l1: l2-cache-l1 {
 			cache-size = <131072>;
 			cache-line-size = <64>;
 			cache-sets = <512>;
+			cache-level = <2>;
 			next-level-cache = <&l3_cache>;
 		};
 
@@ -456,6 +458,7 @@ l2_cache_l2: l2-cache-l2 {
 			cache-size = <131072>;
 			cache-line-size = <64>;
 			cache-sets = <512>;
+			cache-level = <2>;
 			next-level-cache = <&l3_cache>;
 		};
 
@@ -464,6 +467,7 @@ l2_cache_l3: l2-cache-l3 {
 			cache-size = <131072>;
 			cache-line-size = <64>;
 			cache-sets = <512>;
+			cache-level = <2>;
 			next-level-cache = <&l3_cache>;
 		};
 
@@ -472,6 +476,7 @@ l2_cache_b0: l2-cache-b0 {
 			cache-size = <524288>;
 			cache-line-size = <64>;
 			cache-sets = <1024>;
+			cache-level = <2>;
 			next-level-cache = <&l3_cache>;
 		};
 
@@ -480,6 +485,7 @@ l2_cache_b1: l2-cache-b1 {
 			cache-size = <524288>;
 			cache-line-size = <64>;
 			cache-sets = <1024>;
+			cache-level = <2>;
 			next-level-cache = <&l3_cache>;
 		};
 
@@ -488,6 +494,7 @@ l2_cache_b2: l2-cache-b2 {
 			cache-size = <524288>;
 			cache-line-size = <64>;
 			cache-sets = <1024>;
+			cache-level = <2>;
 			next-level-cache = <&l3_cache>;
 		};
 
@@ -496,6 +503,7 @@ l2_cache_b3: l2-cache-b3 {
 			cache-size = <524288>;
 			cache-line-size = <64>;
 			cache-sets = <1024>;
+			cache-level = <2>;
 			next-level-cache = <&l3_cache>;
 		};
 
@@ -504,6 +512,7 @@ l3_cache: l3-cache {
 			cache-size = <3145728>;
 			cache-line-size = <64>;
 			cache-sets = <4096>;
+			cache-level = <3>;
 		};
 	};
 
-- 
2.39.2


_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCHv1 1/1] arm64: dts: rockchip: rk3588: add cache level information
@ 2023-03-17 17:41 ` Sebastian Reichel
  0 siblings, 0 replies; 6+ messages in thread
From: Sebastian Reichel @ 2023-03-17 17:41 UTC (permalink / raw)
  To: Heiko Stuebner, linux-rockchip
  Cc: Rob Herring, Krzysztof Kozlowski, devicetree, linux-arm-kernel,
	linux-kernel, Sebastian Reichel, kernel

Add missing, mandatory cache-level information for RK3588.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
---
Fixes init_of_cache_level() returning -EINVAL
---
 arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
index 82dab5fcc3f0..0fb911704a64 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
@@ -440,6 +440,7 @@ l2_cache_l0: l2-cache-l0 {
 			cache-size = <131072>;
 			cache-line-size = <64>;
 			cache-sets = <512>;
+			cache-level = <2>;
 			next-level-cache = <&l3_cache>;
 		};
 
@@ -448,6 +449,7 @@ l2_cache_l1: l2-cache-l1 {
 			cache-size = <131072>;
 			cache-line-size = <64>;
 			cache-sets = <512>;
+			cache-level = <2>;
 			next-level-cache = <&l3_cache>;
 		};
 
@@ -456,6 +458,7 @@ l2_cache_l2: l2-cache-l2 {
 			cache-size = <131072>;
 			cache-line-size = <64>;
 			cache-sets = <512>;
+			cache-level = <2>;
 			next-level-cache = <&l3_cache>;
 		};
 
@@ -464,6 +467,7 @@ l2_cache_l3: l2-cache-l3 {
 			cache-size = <131072>;
 			cache-line-size = <64>;
 			cache-sets = <512>;
+			cache-level = <2>;
 			next-level-cache = <&l3_cache>;
 		};
 
@@ -472,6 +476,7 @@ l2_cache_b0: l2-cache-b0 {
 			cache-size = <524288>;
 			cache-line-size = <64>;
 			cache-sets = <1024>;
+			cache-level = <2>;
 			next-level-cache = <&l3_cache>;
 		};
 
@@ -480,6 +485,7 @@ l2_cache_b1: l2-cache-b1 {
 			cache-size = <524288>;
 			cache-line-size = <64>;
 			cache-sets = <1024>;
+			cache-level = <2>;
 			next-level-cache = <&l3_cache>;
 		};
 
@@ -488,6 +494,7 @@ l2_cache_b2: l2-cache-b2 {
 			cache-size = <524288>;
 			cache-line-size = <64>;
 			cache-sets = <1024>;
+			cache-level = <2>;
 			next-level-cache = <&l3_cache>;
 		};
 
@@ -496,6 +503,7 @@ l2_cache_b3: l2-cache-b3 {
 			cache-size = <524288>;
 			cache-line-size = <64>;
 			cache-sets = <1024>;
+			cache-level = <2>;
 			next-level-cache = <&l3_cache>;
 		};
 
@@ -504,6 +512,7 @@ l3_cache: l3-cache {
 			cache-size = <3145728>;
 			cache-line-size = <64>;
 			cache-sets = <4096>;
+			cache-level = <3>;
 		};
 	};
 
-- 
2.39.2


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* Re: [PATCHv1 1/1] arm64: dts: rockchip: rk3588: add cache level information
  2023-03-17 17:41 ` Sebastian Reichel
  (?)
@ 2023-03-22 23:40   ` Heiko Stuebner
  -1 siblings, 0 replies; 6+ messages in thread
From: Heiko Stuebner @ 2023-03-22 23:40 UTC (permalink / raw)
  To: Sebastian Reichel, linux-rockchip
  Cc: Heiko Stuebner, Krzysztof Kozlowski, kernel, linux-kernel,
	linux-arm-kernel, Rob Herring, devicetree

On Fri, 17 Mar 2023 18:41:02 +0100, Sebastian Reichel wrote:
> Add missing, mandatory cache-level information for RK3588.
> 
> 

Applied, thanks!

[1/1] arm64: dts: rockchip: rk3588: add cache level information
      commit: b37115b6534c4027df75854a44b485596d368171

Best regards,
-- 
Heiko Stuebner <heiko@sntech.de>

_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCHv1 1/1] arm64: dts: rockchip: rk3588: add cache level information
@ 2023-03-22 23:40   ` Heiko Stuebner
  0 siblings, 0 replies; 6+ messages in thread
From: Heiko Stuebner @ 2023-03-22 23:40 UTC (permalink / raw)
  To: Sebastian Reichel, linux-rockchip
  Cc: Heiko Stuebner, Krzysztof Kozlowski, kernel, linux-kernel,
	linux-arm-kernel, Rob Herring, devicetree

On Fri, 17 Mar 2023 18:41:02 +0100, Sebastian Reichel wrote:
> Add missing, mandatory cache-level information for RK3588.
> 
> 

Applied, thanks!

[1/1] arm64: dts: rockchip: rk3588: add cache level information
      commit: b37115b6534c4027df75854a44b485596d368171

Best regards,
-- 
Heiko Stuebner <heiko@sntech.de>

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCHv1 1/1] arm64: dts: rockchip: rk3588: add cache level information
@ 2023-03-22 23:40   ` Heiko Stuebner
  0 siblings, 0 replies; 6+ messages in thread
From: Heiko Stuebner @ 2023-03-22 23:40 UTC (permalink / raw)
  To: Sebastian Reichel, linux-rockchip
  Cc: Heiko Stuebner, Krzysztof Kozlowski, kernel, linux-kernel,
	linux-arm-kernel, Rob Herring, devicetree

On Fri, 17 Mar 2023 18:41:02 +0100, Sebastian Reichel wrote:
> Add missing, mandatory cache-level information for RK3588.
> 
> 

Applied, thanks!

[1/1] arm64: dts: rockchip: rk3588: add cache level information
      commit: b37115b6534c4027df75854a44b485596d368171

Best regards,
-- 
Heiko Stuebner <heiko@sntech.de>

^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2023-03-22 23:43 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-03-17 17:41 [PATCHv1 1/1] arm64: dts: rockchip: rk3588: add cache level information Sebastian Reichel
2023-03-17 17:41 ` Sebastian Reichel
2023-03-17 17:41 ` Sebastian Reichel
2023-03-22 23:40 ` Heiko Stuebner
2023-03-22 23:40   ` Heiko Stuebner
2023-03-22 23:40   ` Heiko Stuebner

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.