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* [Intel-xe] [PATCH] drm/xe: Use BO's GT to determine dma_offset when programming PTEs
@ 2023-03-23  8:15 Matthew Brost
  2023-03-23  8:17 ` [Intel-xe] ✗ CI.Patch_applied: failure for " Patchwork
  2023-03-23  9:21 ` [Intel-xe] [PATCH] " Thomas Hellström
  0 siblings, 2 replies; 4+ messages in thread
From: Matthew Brost @ 2023-03-23  8:15 UTC (permalink / raw)
  To: intel-xe

Rather than using the passed in GT, use the BO's GT determine dma_offset
when programming PTEs as these two GT's could differ (i.e. mapping a BO
from a remote GT). The BO's GT is correct GT to use as this where BO
resides, while the passed in GT is where the mapping is created.

Signed-off-by: Matthew Brost <matthew.brost@intel.com>
---
 drivers/gpu/drm/xe/xe_bo.c | 5 +++++
 drivers/gpu/drm/xe/xe_bo.h | 1 +
 drivers/gpu/drm/xe/xe_pt.c | 4 +++-
 3 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
index 764b3ca9fff7..8beb35aa6f15 100644
--- a/drivers/gpu/drm/xe/xe_bo.c
+++ b/drivers/gpu/drm/xe/xe_bo.c
@@ -79,6 +79,11 @@ mem_type_to_gt(struct xe_device *xe, u32 mem_type)
 	return xe_device_get_gt(xe, mem_type == XE_PL_STOLEN ? 0 : (mem_type - XE_PL_VRAM0));
 }
 
+struct xe_gt *xe_bo_to_gt(struct xe_bo *bo)
+{
+	return mem_type_to_gt(xe_bo_device(bo), bo->ttm.resource->mem_type);
+}
+
 static void try_add_system(struct xe_bo *bo, struct ttm_place *places,
 			   u32 bo_flags, u32 *c)
 {
diff --git a/drivers/gpu/drm/xe/xe_bo.h b/drivers/gpu/drm/xe/xe_bo.h
index f4303810f213..f9abd8036417 100644
--- a/drivers/gpu/drm/xe/xe_bo.h
+++ b/drivers/gpu/drm/xe/xe_bo.h
@@ -105,6 +105,7 @@ struct xe_bo *xe_bo_create_from_data(struct xe_device *xe, struct xe_gt *gt,
 
 int xe_bo_placement_for_flags(struct xe_device *xe, struct xe_bo *bo,
 			      u32 bo_flags);
+struct xe_gt *xe_bo_to_gt(struct xe_bo *bo);
 
 static inline struct xe_bo *ttm_to_xe_bo(const struct ttm_buffer_object *bo)
 {
diff --git a/drivers/gpu/drm/xe/xe_pt.c b/drivers/gpu/drm/xe/xe_pt.c
index a2e586ebd9a8..6dc31b030687 100644
--- a/drivers/gpu/drm/xe/xe_pt.c
+++ b/drivers/gpu/drm/xe/xe_pt.c
@@ -792,10 +792,12 @@ xe_pt_stage_bind(struct xe_gt *gt, struct xe_vma *vma,
 	int ret;
 
 	if (is_vram) {
+		struct xe_gt *bo_gt = xe_bo_to_gt(bo);
+
 		xe_walk.default_pte = GEN12_PPGTT_PTE_LM;
 		if (vma && vma->gpuva.flags & XE_VMA_ATOMIC_PTE_BIT)
 			xe_walk.default_pte |= GEN12_USM_PPGTT_PTE_AE;
-		xe_walk.dma_offset = gt->mem.vram.io_start -
+		xe_walk.dma_offset = bo_gt->mem.vram.io_start -
 			gt_to_xe(gt)->mem.vram.io_start;
 		xe_walk.cache = XE_CACHE_WB;
 	} else {
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 4+ messages in thread

* [Intel-xe] ✗ CI.Patch_applied: failure for drm/xe: Use BO's GT to determine dma_offset when programming PTEs
  2023-03-23  8:15 [Intel-xe] [PATCH] drm/xe: Use BO's GT to determine dma_offset when programming PTEs Matthew Brost
@ 2023-03-23  8:17 ` Patchwork
  2023-03-23  9:21 ` [Intel-xe] [PATCH] " Thomas Hellström
  1 sibling, 0 replies; 4+ messages in thread
From: Patchwork @ 2023-03-23  8:17 UTC (permalink / raw)
  To: Matthew Brost; +Cc: intel-xe

== Series Details ==

Series: drm/xe: Use BO's GT to determine dma_offset when programming PTEs
URL   : https://patchwork.freedesktop.org/series/115533/
State : failure

== Summary ==

=== Applying kernel patches on branch 'drm-xe-next' with base: ===
commit e6f9b3b9a18f2ec7b3aea2bbc7160ef5387dc878
Author:     Matthew Brost <matthew.brost@intel.com>
AuthorDate: Tue Mar 21 18:16:47 2023 -0700
Commit:     Matthew Brost <matthew.brost@intel.com>
CommitDate: Wed Mar 22 12:42:12 2023 -0700

    drm/xe: Reinstate render / compute cache invalidation in ring ops
    
    Render / compute engines have additional caches (not just TLBs) that
    need to be invalidated each batch, reinstate these invalidations in ring
    ops.
    
    Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
    Suggested-by: Matt Roper <matthew.d.roper@intel.com>
    Signed-off-by: Matthew Brost <matthew.brost@intel.com>
=== git am output follows ===
error: patch failed: drivers/gpu/drm/xe/xe_pt.c:792
error: drivers/gpu/drm/xe/xe_pt.c: patch does not apply
hint: Use 'git am --show-current-patch' to see the failed patch
Applying: drm/xe: Use BO's GT to determine dma_offset when programming PTEs
Patch failed at 0001 drm/xe: Use BO's GT to determine dma_offset when programming PTEs
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".



^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [Intel-xe] [PATCH] drm/xe: Use BO's GT to determine dma_offset when programming PTEs
  2023-03-23  8:15 [Intel-xe] [PATCH] drm/xe: Use BO's GT to determine dma_offset when programming PTEs Matthew Brost
  2023-03-23  8:17 ` [Intel-xe] ✗ CI.Patch_applied: failure for " Patchwork
@ 2023-03-23  9:21 ` Thomas Hellström
  2023-03-23 16:13   ` Matthew Brost
  1 sibling, 1 reply; 4+ messages in thread
From: Thomas Hellström @ 2023-03-23  9:21 UTC (permalink / raw)
  To: intel-xe

Hi.

Good catch. Some comments below.

On 3/23/23 09:15, Matthew Brost wrote:
> Rather than using the passed in GT, use the BO's GT determine dma_offset
> when programming PTEs as these two GT's could differ (i.e. mapping a BO
> from a remote GT). The BO's GT is correct GT to use as this where BO
> resides, while the passed in GT is where the mapping is created.
>
> Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> ---
>   drivers/gpu/drm/xe/xe_bo.c | 5 +++++
>   drivers/gpu/drm/xe/xe_bo.h | 1 +
>   drivers/gpu/drm/xe/xe_pt.c | 4 +++-
>   3 files changed, 9 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
> index 764b3ca9fff7..8beb35aa6f15 100644
> --- a/drivers/gpu/drm/xe/xe_bo.c
> +++ b/drivers/gpu/drm/xe/xe_bo.c
> @@ -79,6 +79,11 @@ mem_type_to_gt(struct xe_device *xe, u32 mem_type)
>   	return xe_device_get_gt(xe, mem_type == XE_PL_STOLEN ? 0 : (mem_type - XE_PL_VRAM0));
>   }
>   
> +struct xe_gt *xe_bo_to_gt(struct xe_bo *bo)

Kerneldoc.

> +{
XE_WARN_ON_ONCE(!vram) ?
> +	return mem_type_to_gt(xe_bo_device(bo), bo->ttm.resource->mem_type);
> +}
> +
>   static void try_add_system(struct xe_bo *bo, struct ttm_place *places,
>   			   u32 bo_flags, u32 *c)
>   {
> diff --git a/drivers/gpu/drm/xe/xe_bo.h b/drivers/gpu/drm/xe/xe_bo.h
> index f4303810f213..f9abd8036417 100644
> --- a/drivers/gpu/drm/xe/xe_bo.h
> +++ b/drivers/gpu/drm/xe/xe_bo.h
> @@ -105,6 +105,7 @@ struct xe_bo *xe_bo_create_from_data(struct xe_device *xe, struct xe_gt *gt,
>   
>   int xe_bo_placement_for_flags(struct xe_device *xe, struct xe_bo *bo,
>   			      u32 bo_flags);
Newline.
> +struct xe_gt *xe_bo_to_gt(struct xe_bo *bo);
>   
>   static inline struct xe_bo *ttm_to_xe_bo(const struct ttm_buffer_object *bo)
>   {
> diff --git a/drivers/gpu/drm/xe/xe_pt.c b/drivers/gpu/drm/xe/xe_pt.c
> index a2e586ebd9a8..6dc31b030687 100644
> --- a/drivers/gpu/drm/xe/xe_pt.c
> +++ b/drivers/gpu/drm/xe/xe_pt.c
> @@ -792,10 +792,12 @@ xe_pt_stage_bind(struct xe_gt *gt, struct xe_vma *vma,
>   	int ret;
>   
>   	if (is_vram) {
> +		struct xe_gt *bo_gt = xe_bo_to_gt(bo);
> +
>   		xe_walk.default_pte = GEN12_PPGTT_PTE_LM;
>   		if (vma && vma->gpuva.flags & XE_VMA_ATOMIC_PTE_BIT)
>   			xe_walk.default_pte |= GEN12_USM_PPGTT_PTE_AE;
> -		xe_walk.dma_offset = gt->mem.vram.io_start -
> +		xe_walk.dma_offset = bo_gt->mem.vram.io_start -
>   			gt_to_xe(gt)->mem.vram.io_start;
>   		xe_walk.cache = XE_CACHE_WB;
>   	} else {

Thanks,

Thomas



^ permalink raw reply	[flat|nested] 4+ messages in thread

* Re: [Intel-xe] [PATCH] drm/xe: Use BO's GT to determine dma_offset when programming PTEs
  2023-03-23  9:21 ` [Intel-xe] [PATCH] " Thomas Hellström
@ 2023-03-23 16:13   ` Matthew Brost
  0 siblings, 0 replies; 4+ messages in thread
From: Matthew Brost @ 2023-03-23 16:13 UTC (permalink / raw)
  To: Thomas Hellström; +Cc: intel-xe

On Thu, Mar 23, 2023 at 10:21:12AM +0100, Thomas Hellström wrote:
> Hi.
> 
> Good catch. Some comments below.
> 
> On 3/23/23 09:15, Matthew Brost wrote:
> > Rather than using the passed in GT, use the BO's GT determine dma_offset
> > when programming PTEs as these two GT's could differ (i.e. mapping a BO
> > from a remote GT). The BO's GT is correct GT to use as this where BO
> > resides, while the passed in GT is where the mapping is created.
> > 
> > Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> > ---
> >   drivers/gpu/drm/xe/xe_bo.c | 5 +++++
> >   drivers/gpu/drm/xe/xe_bo.h | 1 +
> >   drivers/gpu/drm/xe/xe_pt.c | 4 +++-
> >   3 files changed, 9 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/gpu/drm/xe/xe_bo.c b/drivers/gpu/drm/xe/xe_bo.c
> > index 764b3ca9fff7..8beb35aa6f15 100644
> > --- a/drivers/gpu/drm/xe/xe_bo.c
> > +++ b/drivers/gpu/drm/xe/xe_bo.c
> > @@ -79,6 +79,11 @@ mem_type_to_gt(struct xe_device *xe, u32 mem_type)
> >   	return xe_device_get_gt(xe, mem_type == XE_PL_STOLEN ? 0 : (mem_type - XE_PL_VRAM0));
> >   }
> > +struct xe_gt *xe_bo_to_gt(struct xe_bo *bo)
> 
> Kerneldoc.
> 

Will do.

> > +{
> XE_WARN_ON_ONCE(!vram) ?

mem_type_to_gt has a BUG_ON for this.

> > +	return mem_type_to_gt(xe_bo_device(bo), bo->ttm.resource->mem_type);
> > +}
> > +
> >   static void try_add_system(struct xe_bo *bo, struct ttm_place *places,
> >   			   u32 bo_flags, u32 *c)
> >   {
> > diff --git a/drivers/gpu/drm/xe/xe_bo.h b/drivers/gpu/drm/xe/xe_bo.h
> > index f4303810f213..f9abd8036417 100644
> > --- a/drivers/gpu/drm/xe/xe_bo.h
> > +++ b/drivers/gpu/drm/xe/xe_bo.h
> > @@ -105,6 +105,7 @@ struct xe_bo *xe_bo_create_from_data(struct xe_device *xe, struct xe_gt *gt,
> >   int xe_bo_placement_for_flags(struct xe_device *xe, struct xe_bo *bo,
> >   			      u32 bo_flags);
> Newline.

Sure.

Matt

> > +struct xe_gt *xe_bo_to_gt(struct xe_bo *bo);
> >   static inline struct xe_bo *ttm_to_xe_bo(const struct ttm_buffer_object *bo)
> >   {
> > diff --git a/drivers/gpu/drm/xe/xe_pt.c b/drivers/gpu/drm/xe/xe_pt.c
> > index a2e586ebd9a8..6dc31b030687 100644
> > --- a/drivers/gpu/drm/xe/xe_pt.c
> > +++ b/drivers/gpu/drm/xe/xe_pt.c
> > @@ -792,10 +792,12 @@ xe_pt_stage_bind(struct xe_gt *gt, struct xe_vma *vma,
> >   	int ret;
> >   	if (is_vram) {
> > +		struct xe_gt *bo_gt = xe_bo_to_gt(bo);
> > +
> >   		xe_walk.default_pte = GEN12_PPGTT_PTE_LM;
> >   		if (vma && vma->gpuva.flags & XE_VMA_ATOMIC_PTE_BIT)
> >   			xe_walk.default_pte |= GEN12_USM_PPGTT_PTE_AE;
> > -		xe_walk.dma_offset = gt->mem.vram.io_start -
> > +		xe_walk.dma_offset = bo_gt->mem.vram.io_start -
> >   			gt_to_xe(gt)->mem.vram.io_start;
> >   		xe_walk.cache = XE_CACHE_WB;
> >   	} else {
> 
> Thanks,
> 
> Thomas
> 
> 

^ permalink raw reply	[flat|nested] 4+ messages in thread

end of thread, other threads:[~2023-03-23 16:14 UTC | newest]

Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2023-03-23  8:15 [Intel-xe] [PATCH] drm/xe: Use BO's GT to determine dma_offset when programming PTEs Matthew Brost
2023-03-23  8:17 ` [Intel-xe] ✗ CI.Patch_applied: failure for " Patchwork
2023-03-23  9:21 ` [Intel-xe] [PATCH] " Thomas Hellström
2023-03-23 16:13   ` Matthew Brost

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