[PATCH v7 0/2] drm/i915: Hugepage manager and test for MTL

[PATCH v7 0/2] drm/i915: Hugepage manager and test for MTL

[Andrzej Hajda]

This patchset patches sent by Jonathan and Andi, with 
addressed CI failures:
1. Fixed checking alignment of 64K pages on both Pre-Gen12 and Gen12.
2. Fixed start alignment of 2M pages.

Regards
Andrzej

Jonathan Cavitt (2):
  drm/i915: Migrate platform-dependent mock hugepage selftests to live
  drm/i915: Use correct huge page manager for MTL

.../gpu/drm/i915/gem/selftests/huge_pages.c   | 88 +++++++++++++++----
 drivers/gpu/drm/i915/gt/gen8_ppgtt.c          |  3 +-
 2 files changed, 71 insertions(+), 20 deletions(-)

Cc: intel-gfx@lists.freedesktop.org
Cc: linux-kernel@vger.kernel.org
Cc: Jonathan Cavitt <jonathan.cavitt@intel.com>
Cc: Andrzej Hajda <andrzej.hajda@intel.com>
Cc: Matthew Auld <matthew.auld@intel.com>
-- 
2.39.2

---
Jonathan Cavitt (2):
      drm/i915: Migrate platform-dependent mock hugepage selftests to live
      drm/i915: Use correct huge page manager for MTL

 drivers/gpu/drm/i915/gem/selftests/huge_pages.c | 105 ++++++++++++++++++------
 drivers/gpu/drm/i915/gt/gen8_ppgtt.c            |   3 +-
 2 files changed, 82 insertions(+), 26 deletions(-)
---
base-commit: 4d0066a1c0763d50b6fb017e27d12b081ce21b57
change-id: 20230425-hugepage-migrate-1869aaf31a6d

Best regards,
-- 
Andrzej Hajda <andrzej.hajda@intel.com>

[PATCH v7 1/2] drm/i915: Migrate platform-dependent mock hugepage selftests to live

[Andrzej Hajda]

From: Jonathan Cavitt <jonathan.cavitt@intel.com>

Convert the igt_mock_ppgtt_huge_fill and igt_mock_ppgtt_64K mock selftests into
live selftests as their requirements have recently become platform-dependent.
Additionally, apply necessary platform dependency checks to these tests.

v8:
- handle properly 64K and 2M pages

Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
Co-developed-by: Andrzej Hajda <andrzej.hajda@intel.com>
Signed-off-by: Andrzej Hajda <andrzej.hajda@intel.com>
---
 drivers/gpu/drm/i915/gem/selftests/huge_pages.c | 105 ++++++++++++++++++------
 1 file changed, 80 insertions(+), 25 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/selftests/huge_pages.c b/drivers/gpu/drm/i915/gem/selftests/huge_pages.c
index defece0bcb811f..773e2f31fbad85 100644
--- a/drivers/gpu/drm/i915/gem/selftests/huge_pages.c
+++ b/drivers/gpu/drm/i915/gem/selftests/huge_pages.c
@@ -695,8 +695,7 @@ static int igt_mock_ppgtt_misaligned_dma(void *arg)
 	return err;
 }
 
-static void close_object_list(struct list_head *objects,
-			      struct i915_ppgtt *ppgtt)
+static void close_object_list(struct list_head *objects)
 {
 	struct drm_i915_gem_object *obj, *on;
 
@@ -710,17 +709,36 @@ static void close_object_list(struct list_head *objects,
 	}
 }
 
-static int igt_mock_ppgtt_huge_fill(void *arg)
+static int igt_ppgtt_huge_fill(void *arg)
 {
-	struct i915_ppgtt *ppgtt = arg;
-	struct drm_i915_private *i915 = ppgtt->vm.i915;
-	unsigned long max_pages = ppgtt->vm.total >> PAGE_SHIFT;
+	struct drm_i915_private *i915 = arg;
+	unsigned int supported = RUNTIME_INFO(i915)->page_sizes;
+	bool has_pte64 = GRAPHICS_VER_FULL(i915) >= IP_VER(12, 50);
+	struct i915_address_space *vm;
+	struct i915_gem_context *ctx;
+	unsigned long max_pages;
 	unsigned long page_num;
+	struct file *file;
 	bool single = false;
 	LIST_HEAD(objects);
 	IGT_TIMEOUT(end_time);
 	int err = -ENODEV;
 
+	if (supported == I915_GTT_PAGE_SIZE_4K)
+		return 0;
+
+	file = mock_file(i915);
+	if (IS_ERR(file))
+		return PTR_ERR(file);
+
+	ctx = hugepage_ctx(i915, file);
+	if (IS_ERR(ctx)) {
+		err = PTR_ERR(ctx);
+		goto out;
+	}
+	vm = i915_gem_context_get_eb_vm(ctx);
+	max_pages = vm->total >> PAGE_SHIFT;
+
 	for_each_prime_number_from(page_num, 1, max_pages) {
 		struct drm_i915_gem_object *obj;
 		u64 size = page_num << PAGE_SHIFT;
@@ -750,13 +768,14 @@ static int igt_mock_ppgtt_huge_fill(void *arg)
 
 		list_add(&obj->st_link, &objects);
 
-		vma = i915_vma_instance(obj, &ppgtt->vm, NULL);
+		vma = i915_vma_instance(obj, vm, NULL);
 		if (IS_ERR(vma)) {
 			err = PTR_ERR(vma);
 			break;
 		}
 
-		err = i915_vma_pin(vma, 0, 0, PIN_USER);
+		/* vma start must be aligned to BIT(21) to allow 2M PTEs */
+		err = i915_vma_pin(vma, 0, BIT(21), PIN_USER);
 		if (err)
 			break;
 
@@ -784,12 +803,12 @@ static int igt_mock_ppgtt_huge_fill(void *arg)
 		GEM_BUG_ON(!expected_gtt);
 		GEM_BUG_ON(size);
 
-		if (expected_gtt & I915_GTT_PAGE_SIZE_4K)
+		if (!has_pte64 && obj->base.size < I915_GTT_PAGE_SIZE_2M)
 			expected_gtt &= ~I915_GTT_PAGE_SIZE_64K;
 
 		i915_vma_unpin(vma);
 
-		if (vma->page_sizes.sg & I915_GTT_PAGE_SIZE_64K) {
+		if (!has_pte64 && vma->page_sizes.sg & I915_GTT_PAGE_SIZE_64K) {
 			if (!IS_ALIGNED(vma->node.start,
 					I915_GTT_PAGE_SIZE_2M)) {
 				pr_err("node.start(%llx) not aligned to 2M\n",
@@ -808,7 +827,7 @@ static int igt_mock_ppgtt_huge_fill(void *arg)
 		}
 
 		if (vma->resource->page_sizes_gtt != expected_gtt) {
-			pr_err("gtt=%u, expected=%u, size=%zd, single=%s\n",
+			pr_err("gtt=%#x, expected=%#x, size=0x%zd, single=%s\n",
 			       vma->resource->page_sizes_gtt, expected_gtt,
 			       obj->base.size, str_yes_no(!!single));
 			err = -EINVAL;
@@ -823,19 +842,25 @@ static int igt_mock_ppgtt_huge_fill(void *arg)
 		single = !single;
 	}
 
-	close_object_list(&objects, ppgtt);
+	close_object_list(&objects);
 
 	if (err == -ENOMEM || err == -ENOSPC)
 		err = 0;
 
+	i915_vm_put(vm);
+out:
+	fput(file);
 	return err;
 }
 
-static int igt_mock_ppgtt_64K(void *arg)
+static int igt_ppgtt_64K(void *arg)
 {
-	struct i915_ppgtt *ppgtt = arg;
-	struct drm_i915_private *i915 = ppgtt->vm.i915;
+	struct drm_i915_private *i915 = arg;
+	bool has_pte64 = GRAPHICS_VER_FULL(i915) >= IP_VER(12, 50);
 	struct drm_i915_gem_object *obj;
+	struct i915_address_space *vm;
+	struct i915_gem_context *ctx;
+	struct file *file;
 	const struct object_info {
 		unsigned int size;
 		unsigned int gtt;
@@ -907,16 +932,41 @@ static int igt_mock_ppgtt_64K(void *arg)
 	if (!HAS_PAGE_SIZES(i915, I915_GTT_PAGE_SIZE_64K))
 		return 0;
 
+	file = mock_file(i915);
+	if (IS_ERR(file))
+		return PTR_ERR(file);
+
+	ctx = hugepage_ctx(i915, file);
+	if (IS_ERR(ctx)) {
+		err = PTR_ERR(ctx);
+		goto out;
+	}
+	vm = i915_gem_context_get_eb_vm(ctx);
+
 	for (i = 0; i < ARRAY_SIZE(objects); ++i) {
 		unsigned int size = objects[i].size;
 		unsigned int expected_gtt = objects[i].gtt;
 		unsigned int offset = objects[i].offset;
 		unsigned int flags = PIN_USER;
 
+		/*
+		 * For modern GTT models, the requirements for marking a page-table
+		 * as 64K have been relaxed.  Account for this.
+		 */
+		if (has_pte64) {
+			expected_gtt = 0;
+			if (size >= SZ_64K)
+				expected_gtt |= I915_GTT_PAGE_SIZE_64K;
+			if (size & (SZ_64K - 1))
+				expected_gtt |= I915_GTT_PAGE_SIZE_4K;
+		}
+
 		for (single = 0; single <= 1; single++) {
 			obj = fake_huge_pages_object(i915, size, !!single);
-			if (IS_ERR(obj))
-				return PTR_ERR(obj);
+			if (IS_ERR(obj)) {
+				err = PTR_ERR(obj);
+				goto out_vm;
+			}
 
 			err = i915_gem_object_pin_pages_unlocked(obj);
 			if (err)
@@ -928,7 +978,7 @@ static int igt_mock_ppgtt_64K(void *arg)
 			 */
 			obj->mm.page_sizes.sg &= ~I915_GTT_PAGE_SIZE_2M;
 
-			vma = i915_vma_instance(obj, &ppgtt->vm, NULL);
+			vma = i915_vma_instance(obj, vm, NULL);
 			if (IS_ERR(vma)) {
 				err = PTR_ERR(vma);
 				goto out_object_unpin;
@@ -945,7 +995,8 @@ static int igt_mock_ppgtt_64K(void *arg)
 			if (err)
 				goto out_vma_unpin;
 
-			if (!offset && vma->page_sizes.sg & I915_GTT_PAGE_SIZE_64K) {
+			if (!has_pte64 && !offset &&
+			    vma->page_sizes.sg & I915_GTT_PAGE_SIZE_64K) {
 				if (!IS_ALIGNED(vma->node.start,
 						I915_GTT_PAGE_SIZE_2M)) {
 					pr_err("node.start(%llx) not aligned to 2M\n",
@@ -964,9 +1015,10 @@ static int igt_mock_ppgtt_64K(void *arg)
 			}
 
 			if (vma->resource->page_sizes_gtt != expected_gtt) {
-				pr_err("gtt=%u, expected=%u, i=%d, single=%s\n",
+				pr_err("gtt=%#x, expected=%#x, i=%d, single=%s offset=%#x size=%#x\n",
 				       vma->resource->page_sizes_gtt,
-				       expected_gtt, i, str_yes_no(!!single));
+				       expected_gtt, i, str_yes_no(!!single),
+				       offset, size);
 				err = -EINVAL;
 				goto out_vma_unpin;
 			}
@@ -982,7 +1034,7 @@ static int igt_mock_ppgtt_64K(void *arg)
 		}
 	}
 
-	return 0;
+	goto out_vm;
 
 out_vma_unpin:
 	i915_vma_unpin(vma);
@@ -992,7 +1044,10 @@ static int igt_mock_ppgtt_64K(void *arg)
 	i915_gem_object_unlock(obj);
 out_object_put:
 	i915_gem_object_put(obj);
-
+out_vm:
+	i915_vm_put(vm);
+out:
+	fput(file);
 	return err;
 }
 
@@ -1910,8 +1965,6 @@ int i915_gem_huge_page_mock_selftests(void)
 		SUBTEST(igt_mock_exhaust_device_supported_pages),
 		SUBTEST(igt_mock_memory_region_huge_pages),
 		SUBTEST(igt_mock_ppgtt_misaligned_dma),
-		SUBTEST(igt_mock_ppgtt_huge_fill),
-		SUBTEST(igt_mock_ppgtt_64K),
 	};
 	struct drm_i915_private *dev_priv;
 	struct i915_ppgtt *ppgtt;
@@ -1962,6 +2015,8 @@ int i915_gem_huge_page_live_selftests(struct drm_i915_private *i915)
 		SUBTEST(igt_ppgtt_sanity_check),
 		SUBTEST(igt_ppgtt_compact),
 		SUBTEST(igt_ppgtt_mixed),
+		SUBTEST(igt_ppgtt_huge_fill),
+		SUBTEST(igt_ppgtt_64K),
 	};
 
 	if (!HAS_PPGTT(i915)) {

-- 
2.34.1

[Intel-gfx] [PATCH v7 0/2] drm/i915: Hugepage manager and test for MTL

[Andrzej Hajda]

This patchset patches sent by Jonathan and Andi, with 
addressed CI failures:
1. Fixed checking alignment of 64K pages on both Pre-Gen12 and Gen12.
2. Fixed start alignment of 2M pages.

Regards
Andrzej

Jonathan Cavitt (2):
  drm/i915: Migrate platform-dependent mock hugepage selftests to live
  drm/i915: Use correct huge page manager for MTL

.../gpu/drm/i915/gem/selftests/huge_pages.c   | 88 +++++++++++++++----
 drivers/gpu/drm/i915/gt/gen8_ppgtt.c          |  3 +-
 2 files changed, 71 insertions(+), 20 deletions(-)

Cc: intel-gfx@lists.freedesktop.org
Cc: linux-kernel@vger.kernel.org
Cc: Jonathan Cavitt <jonathan.cavitt@intel.com>
Cc: Andrzej Hajda <andrzej.hajda@intel.com>
Cc: Matthew Auld <matthew.auld@intel.com>
-- 
2.39.2

---
Jonathan Cavitt (2):
      drm/i915: Migrate platform-dependent mock hugepage selftests to live
      drm/i915: Use correct huge page manager for MTL

 drivers/gpu/drm/i915/gem/selftests/huge_pages.c | 105 ++++++++++++++++++------
 drivers/gpu/drm/i915/gt/gen8_ppgtt.c            |   3 +-
 2 files changed, 82 insertions(+), 26 deletions(-)
---
base-commit: 4d0066a1c0763d50b6fb017e27d12b081ce21b57
change-id: 20230425-hugepage-migrate-1869aaf31a6d

Best regards,
-- 
Andrzej Hajda <andrzej.hajda@intel.com>

[Intel-gfx] [PATCH v7 1/2] drm/i915: Migrate platform-dependent mock hugepage selftests to live

[Andrzej Hajda]

From: Jonathan Cavitt <jonathan.cavitt@intel.com>

Convert the igt_mock_ppgtt_huge_fill and igt_mock_ppgtt_64K mock selftests into
live selftests as their requirements have recently become platform-dependent.
Additionally, apply necessary platform dependency checks to these tests.

v8:
- handle properly 64K and 2M pages

Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
Co-developed-by: Andrzej Hajda <andrzej.hajda@intel.com>
Signed-off-by: Andrzej Hajda <andrzej.hajda@intel.com>
---
 drivers/gpu/drm/i915/gem/selftests/huge_pages.c | 105 ++++++++++++++++++------
 1 file changed, 80 insertions(+), 25 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/selftests/huge_pages.c b/drivers/gpu/drm/i915/gem/selftests/huge_pages.c
index defece0bcb811f..773e2f31fbad85 100644
--- a/drivers/gpu/drm/i915/gem/selftests/huge_pages.c
+++ b/drivers/gpu/drm/i915/gem/selftests/huge_pages.c
@@ -695,8 +695,7 @@ static int igt_mock_ppgtt_misaligned_dma(void *arg)
 	return err;
 }
 
-static void close_object_list(struct list_head *objects,
-			      struct i915_ppgtt *ppgtt)
+static void close_object_list(struct list_head *objects)
 {
 	struct drm_i915_gem_object *obj, *on;
 
@@ -710,17 +709,36 @@ static void close_object_list(struct list_head *objects,
 	}
 }
 
-static int igt_mock_ppgtt_huge_fill(void *arg)
+static int igt_ppgtt_huge_fill(void *arg)
 {
-	struct i915_ppgtt *ppgtt = arg;
-	struct drm_i915_private *i915 = ppgtt->vm.i915;
-	unsigned long max_pages = ppgtt->vm.total >> PAGE_SHIFT;
+	struct drm_i915_private *i915 = arg;
+	unsigned int supported = RUNTIME_INFO(i915)->page_sizes;
+	bool has_pte64 = GRAPHICS_VER_FULL(i915) >= IP_VER(12, 50);
+	struct i915_address_space *vm;
+	struct i915_gem_context *ctx;
+	unsigned long max_pages;
 	unsigned long page_num;
+	struct file *file;
 	bool single = false;
 	LIST_HEAD(objects);
 	IGT_TIMEOUT(end_time);
 	int err = -ENODEV;
 
+	if (supported == I915_GTT_PAGE_SIZE_4K)
+		return 0;
+
+	file = mock_file(i915);
+	if (IS_ERR(file))
+		return PTR_ERR(file);
+
+	ctx = hugepage_ctx(i915, file);
+	if (IS_ERR(ctx)) {
+		err = PTR_ERR(ctx);
+		goto out;
+	}
+	vm = i915_gem_context_get_eb_vm(ctx);
+	max_pages = vm->total >> PAGE_SHIFT;
+
 	for_each_prime_number_from(page_num, 1, max_pages) {
 		struct drm_i915_gem_object *obj;
 		u64 size = page_num << PAGE_SHIFT;
@@ -750,13 +768,14 @@ static int igt_mock_ppgtt_huge_fill(void *arg)
 
 		list_add(&obj->st_link, &objects);
 
-		vma = i915_vma_instance(obj, &ppgtt->vm, NULL);
+		vma = i915_vma_instance(obj, vm, NULL);
 		if (IS_ERR(vma)) {
 			err = PTR_ERR(vma);
 			break;
 		}
 
-		err = i915_vma_pin(vma, 0, 0, PIN_USER);
+		/* vma start must be aligned to BIT(21) to allow 2M PTEs */
+		err = i915_vma_pin(vma, 0, BIT(21), PIN_USER);
 		if (err)
 			break;
 
@@ -784,12 +803,12 @@ static int igt_mock_ppgtt_huge_fill(void *arg)
 		GEM_BUG_ON(!expected_gtt);
 		GEM_BUG_ON(size);
 
-		if (expected_gtt & I915_GTT_PAGE_SIZE_4K)
+		if (!has_pte64 && obj->base.size < I915_GTT_PAGE_SIZE_2M)
 			expected_gtt &= ~I915_GTT_PAGE_SIZE_64K;
 
 		i915_vma_unpin(vma);
 
-		if (vma->page_sizes.sg & I915_GTT_PAGE_SIZE_64K) {
+		if (!has_pte64 && vma->page_sizes.sg & I915_GTT_PAGE_SIZE_64K) {
 			if (!IS_ALIGNED(vma->node.start,
 					I915_GTT_PAGE_SIZE_2M)) {
 				pr_err("node.start(%llx) not aligned to 2M\n",
@@ -808,7 +827,7 @@ static int igt_mock_ppgtt_huge_fill(void *arg)
 		}
 
 		if (vma->resource->page_sizes_gtt != expected_gtt) {
-			pr_err("gtt=%u, expected=%u, size=%zd, single=%s\n",
+			pr_err("gtt=%#x, expected=%#x, size=0x%zd, single=%s\n",
 			       vma->resource->page_sizes_gtt, expected_gtt,
 			       obj->base.size, str_yes_no(!!single));
 			err = -EINVAL;
@@ -823,19 +842,25 @@ static int igt_mock_ppgtt_huge_fill(void *arg)
 		single = !single;
 	}
 
-	close_object_list(&objects, ppgtt);
+	close_object_list(&objects);
 
 	if (err == -ENOMEM || err == -ENOSPC)
 		err = 0;
 
+	i915_vm_put(vm);
+out:
+	fput(file);
 	return err;
 }
 
-static int igt_mock_ppgtt_64K(void *arg)
+static int igt_ppgtt_64K(void *arg)
 {
-	struct i915_ppgtt *ppgtt = arg;
-	struct drm_i915_private *i915 = ppgtt->vm.i915;
+	struct drm_i915_private *i915 = arg;
+	bool has_pte64 = GRAPHICS_VER_FULL(i915) >= IP_VER(12, 50);
 	struct drm_i915_gem_object *obj;
+	struct i915_address_space *vm;
+	struct i915_gem_context *ctx;
+	struct file *file;
 	const struct object_info {
 		unsigned int size;
 		unsigned int gtt;
@@ -907,16 +932,41 @@ static int igt_mock_ppgtt_64K(void *arg)
 	if (!HAS_PAGE_SIZES(i915, I915_GTT_PAGE_SIZE_64K))
 		return 0;
 
+	file = mock_file(i915);
+	if (IS_ERR(file))
+		return PTR_ERR(file);
+
+	ctx = hugepage_ctx(i915, file);
+	if (IS_ERR(ctx)) {
+		err = PTR_ERR(ctx);
+		goto out;
+	}
+	vm = i915_gem_context_get_eb_vm(ctx);
+
 	for (i = 0; i < ARRAY_SIZE(objects); ++i) {
 		unsigned int size = objects[i].size;
 		unsigned int expected_gtt = objects[i].gtt;
 		unsigned int offset = objects[i].offset;
 		unsigned int flags = PIN_USER;
 
+		/*
+		 * For modern GTT models, the requirements for marking a page-table
+		 * as 64K have been relaxed.  Account for this.
+		 */
+		if (has_pte64) {
+			expected_gtt = 0;
+			if (size >= SZ_64K)
+				expected_gtt |= I915_GTT_PAGE_SIZE_64K;
+			if (size & (SZ_64K - 1))
+				expected_gtt |= I915_GTT_PAGE_SIZE_4K;
+		}
+
 		for (single = 0; single <= 1; single++) {
 			obj = fake_huge_pages_object(i915, size, !!single);
-			if (IS_ERR(obj))
-				return PTR_ERR(obj);
+			if (IS_ERR(obj)) {
+				err = PTR_ERR(obj);
+				goto out_vm;
+			}
 
 			err = i915_gem_object_pin_pages_unlocked(obj);
 			if (err)
@@ -928,7 +978,7 @@ static int igt_mock_ppgtt_64K(void *arg)
 			 */
 			obj->mm.page_sizes.sg &= ~I915_GTT_PAGE_SIZE_2M;
 
-			vma = i915_vma_instance(obj, &ppgtt->vm, NULL);
+			vma = i915_vma_instance(obj, vm, NULL);
 			if (IS_ERR(vma)) {
 				err = PTR_ERR(vma);
 				goto out_object_unpin;
@@ -945,7 +995,8 @@ static int igt_mock_ppgtt_64K(void *arg)
 			if (err)
 				goto out_vma_unpin;
 
-			if (!offset && vma->page_sizes.sg & I915_GTT_PAGE_SIZE_64K) {
+			if (!has_pte64 && !offset &&
+			    vma->page_sizes.sg & I915_GTT_PAGE_SIZE_64K) {
 				if (!IS_ALIGNED(vma->node.start,
 						I915_GTT_PAGE_SIZE_2M)) {
 					pr_err("node.start(%llx) not aligned to 2M\n",
@@ -964,9 +1015,10 @@ static int igt_mock_ppgtt_64K(void *arg)
 			}
 
 			if (vma->resource->page_sizes_gtt != expected_gtt) {
-				pr_err("gtt=%u, expected=%u, i=%d, single=%s\n",
+				pr_err("gtt=%#x, expected=%#x, i=%d, single=%s offset=%#x size=%#x\n",
 				       vma->resource->page_sizes_gtt,
-				       expected_gtt, i, str_yes_no(!!single));
+				       expected_gtt, i, str_yes_no(!!single),
+				       offset, size);
 				err = -EINVAL;
 				goto out_vma_unpin;
 			}
@@ -982,7 +1034,7 @@ static int igt_mock_ppgtt_64K(void *arg)
 		}
 	}
 
-	return 0;
+	goto out_vm;
 
 out_vma_unpin:
 	i915_vma_unpin(vma);
@@ -992,7 +1044,10 @@ static int igt_mock_ppgtt_64K(void *arg)
 	i915_gem_object_unlock(obj);
 out_object_put:
 	i915_gem_object_put(obj);
-
+out_vm:
+	i915_vm_put(vm);
+out:
+	fput(file);
 	return err;
 }
 
@@ -1910,8 +1965,6 @@ int i915_gem_huge_page_mock_selftests(void)
 		SUBTEST(igt_mock_exhaust_device_supported_pages),
 		SUBTEST(igt_mock_memory_region_huge_pages),
 		SUBTEST(igt_mock_ppgtt_misaligned_dma),
-		SUBTEST(igt_mock_ppgtt_huge_fill),
-		SUBTEST(igt_mock_ppgtt_64K),
 	};
 	struct drm_i915_private *dev_priv;
 	struct i915_ppgtt *ppgtt;
@@ -1962,6 +2015,8 @@ int i915_gem_huge_page_live_selftests(struct drm_i915_private *i915)
 		SUBTEST(igt_ppgtt_sanity_check),
 		SUBTEST(igt_ppgtt_compact),
 		SUBTEST(igt_ppgtt_mixed),
+		SUBTEST(igt_ppgtt_huge_fill),
+		SUBTEST(igt_ppgtt_64K),
 	};
 
 	if (!HAS_PPGTT(i915)) {

-- 
2.34.1

[PATCH v7 2/2] drm/i915: Use correct huge page manager for MTL

[Andrzej Hajda]

From: Jonathan Cavitt <jonathan.cavitt@intel.com>

MTL currently uses gen8_ppgtt_insert_huge when managing huge pages.  This is because
MTL reports as not supporting 64K pages, or more accurately, the system that reports
whether a platform has 64K pages reports false for MTL.  This is only half correct,
as the 64K page support reporting system only cares about 64K page support for LMEM,
which MTL doesn't have.

MTL should be using xehpsdv_ppgtt_insert_huge.  However, simply changing over to
using that manager doesn't resolve the issue because MTL is expecting the virtual
address space for the page table to be flushed after initialization, so we must also
add a flush statement there.

Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Signed-off-by: Andrzej Hajda <andrzej.hajda@intel.com>
---
 drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
index 4daaa6f5566888..9c571185395f49 100644
--- a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
+++ b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
@@ -570,6 +570,7 @@ xehpsdv_ppgtt_insert_huge(struct i915_address_space *vm,
 			}
 		} while (rem >= page_size && index < max);
 
+		drm_clflush_virt_range(vaddr, PAGE_SIZE);
 		vma_res->page_sizes_gtt |= page_size;
 	} while (iter->sg && sg_dma_len(iter->sg));
 }
@@ -707,7 +708,7 @@ static void gen8_ppgtt_insert(struct i915_address_space *vm,
 	struct sgt_dma iter = sgt_dma(vma_res);
 
 	if (vma_res->bi.page_sizes.sg > I915_GTT_PAGE_SIZE) {
-		if (HAS_64K_PAGES(vm->i915))
+		if (GRAPHICS_VER_FULL(vm->i915) >= IP_VER(12, 50))
 			xehpsdv_ppgtt_insert_huge(vm, vma_res, &iter, cache_level, flags);
 		else
 			gen8_ppgtt_insert_huge(vm, vma_res, &iter, cache_level, flags);

-- 
2.34.1

[Intel-gfx] [PATCH v7 2/2] drm/i915: Use correct huge page manager for MTL

[Andrzej Hajda]

From: Jonathan Cavitt <jonathan.cavitt@intel.com>

MTL currently uses gen8_ppgtt_insert_huge when managing huge pages.  This is because
MTL reports as not supporting 64K pages, or more accurately, the system that reports
whether a platform has 64K pages reports false for MTL.  This is only half correct,
as the 64K page support reporting system only cares about 64K page support for LMEM,
which MTL doesn't have.

MTL should be using xehpsdv_ppgtt_insert_huge.  However, simply changing over to
using that manager doesn't resolve the issue because MTL is expecting the virtual
address space for the page table to be flushed after initialization, so we must also
add a flush statement there.

Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Signed-off-by: Andrzej Hajda <andrzej.hajda@intel.com>
---
 drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
index 4daaa6f5566888..9c571185395f49 100644
--- a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
+++ b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
@@ -570,6 +570,7 @@ xehpsdv_ppgtt_insert_huge(struct i915_address_space *vm,
 			}
 		} while (rem >= page_size && index < max);
 
+		drm_clflush_virt_range(vaddr, PAGE_SIZE);
 		vma_res->page_sizes_gtt |= page_size;
 	} while (iter->sg && sg_dma_len(iter->sg));
 }
@@ -707,7 +708,7 @@ static void gen8_ppgtt_insert(struct i915_address_space *vm,
 	struct sgt_dma iter = sgt_dma(vma_res);
 
 	if (vma_res->bi.page_sizes.sg > I915_GTT_PAGE_SIZE) {
-		if (HAS_64K_PAGES(vm->i915))
+		if (GRAPHICS_VER_FULL(vm->i915) >= IP_VER(12, 50))
 			xehpsdv_ppgtt_insert_huge(vm, vma_res, &iter, cache_level, flags);
 		else
 			gen8_ppgtt_insert_huge(vm, vma_res, &iter, cache_level, flags);

-- 
2.34.1

RE: [PATCH v7 0/2] drm/i915: Hugepage manager and test for MTL

[Cavitt, Jonathan]

-----Original Message-----
From: Hajda, Andrzej <andrzej.hajda@intel.com> 
Sent: Wednesday, April 26, 2023 8:14 AM
To: intel-gfx@lists.freedesktop.org; linux-kernel@vger.kernel.org; Cavitt, Jonathan <jonathan.cavitt@intel.com>; Hajda, Andrzej <andrzej.hajda@intel.com>; Auld, Matthew <matthew.auld@intel.com>
Subject: [PATCH v7 0/2] drm/i915: Hugepage manager and test for MTL
>
>This patchset patches sent by Jonathan and Andi, with 
>addressed CI failures:
>1. Fixed checking alignment of 64K pages on both Pre-Gen12 and Gen12.
>2. Fixed start alignment of 2M pages.
>
>Regards
>Andrzej
>
>Jonathan Cavitt (2):
>  drm/i915: Migrate platform-dependent mock hugepage selftests to live
>  drm/i915: Use correct huge page manager for MTL
>
>.../gpu/drm/i915/gem/selftests/huge_pages.c   | 88 +++++++++++++++----
> drivers/gpu/drm/i915/gt/gen8_ppgtt.c          |  3 +-
> 2 files changed, 71 insertions(+), 20 deletions(-)
>
>Cc: intel-gfx@lists.freedesktop.org
>Cc: linux-kernel@vger.kernel.org
>Cc: Jonathan Cavitt <jonathan.cavitt@intel.com>
>Cc: Andrzej Hajda <andrzej.hajda@intel.com>
>Cc: Matthew Auld <matthew.auld@intel.com>
>-- 
>2.39.2
>
>---
>Jonathan Cavitt (2):
>      drm/i915: Migrate platform-dependent mock hugepage selftests to live
>      drm/i915: Use correct huge page manager for MTL
>
> drivers/gpu/drm/i915/gem/selftests/huge_pages.c | 105 ++++++++++++++++++------
> drivers/gpu/drm/i915/gt/gen8_ppgtt.c            |   3 +-
> 2 files changed, 82 insertions(+), 26 deletions(-)
>---
>base-commit: 4d0066a1c0763d50b6fb017e27d12b081ce21b57
>change-id: 20230425-hugepage-migrate-1869aaf31a6d
>
>Best regards,
>-- 
>Andrzej Hajda <andrzej.hajda@intel.com>


Just reviewed the changes proper.  It's been a while, so I don't remember everything
about the prior version, but I think I recognized what was changed:

- I wasn't aware a 21 bit alignment was required for 2M page sizes.  I'm glad you caught that.
- The extra debugging/error information will be helpful in the case of a failure.
- Grabbing the per-context VM instead of the ppgtt vm sounds good to me.

Everything here looks amenable.
Acked-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
Though, given I'm also one of the signed-off-bys, I don't know if me acking it is exactly above-board.
-Jonathan Cavitt


>

Re: [Intel-gfx] [PATCH v7 0/2] drm/i915: Hugepage manager and test for MTL

[Cavitt, Jonathan]

-----Original Message-----
From: Hajda, Andrzej <andrzej.hajda@intel.com> 
Sent: Wednesday, April 26, 2023 8:14 AM
To: intel-gfx@lists.freedesktop.org; linux-kernel@vger.kernel.org; Cavitt, Jonathan <jonathan.cavitt@intel.com>; Hajda, Andrzej <andrzej.hajda@intel.com>; Auld, Matthew <matthew.auld@intel.com>
Subject: [PATCH v7 0/2] drm/i915: Hugepage manager and test for MTL
>
>This patchset patches sent by Jonathan and Andi, with 
>addressed CI failures:
>1. Fixed checking alignment of 64K pages on both Pre-Gen12 and Gen12.
>2. Fixed start alignment of 2M pages.
>
>Regards
>Andrzej
>
>Jonathan Cavitt (2):
>  drm/i915: Migrate platform-dependent mock hugepage selftests to live
>  drm/i915: Use correct huge page manager for MTL
>
>.../gpu/drm/i915/gem/selftests/huge_pages.c   | 88 +++++++++++++++----
> drivers/gpu/drm/i915/gt/gen8_ppgtt.c          |  3 +-
> 2 files changed, 71 insertions(+), 20 deletions(-)
>
>Cc: intel-gfx@lists.freedesktop.org
>Cc: linux-kernel@vger.kernel.org
>Cc: Jonathan Cavitt <jonathan.cavitt@intel.com>
>Cc: Andrzej Hajda <andrzej.hajda@intel.com>
>Cc: Matthew Auld <matthew.auld@intel.com>
>-- 
>2.39.2
>
>---
>Jonathan Cavitt (2):
>      drm/i915: Migrate platform-dependent mock hugepage selftests to live
>      drm/i915: Use correct huge page manager for MTL
>
> drivers/gpu/drm/i915/gem/selftests/huge_pages.c | 105 ++++++++++++++++++------
> drivers/gpu/drm/i915/gt/gen8_ppgtt.c            |   3 +-
> 2 files changed, 82 insertions(+), 26 deletions(-)
>---
>base-commit: 4d0066a1c0763d50b6fb017e27d12b081ce21b57
>change-id: 20230425-hugepage-migrate-1869aaf31a6d
>
>Best regards,
>-- 
>Andrzej Hajda <andrzej.hajda@intel.com>


Just reviewed the changes proper.  It's been a while, so I don't remember everything
about the prior version, but I think I recognized what was changed:

- I wasn't aware a 21 bit alignment was required for 2M page sizes.  I'm glad you caught that.
- The extra debugging/error information will be helpful in the case of a failure.
- Grabbing the per-context VM instead of the ppgtt vm sounds good to me.

Everything here looks amenable.
Acked-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
Though, given I'm also one of the signed-off-bys, I don't know if me acking it is exactly above-board.
-Jonathan Cavitt


>

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Hugepage manager and test for MTL

[Patchwork]

== Series Details ==

Series: drm/i915: Hugepage manager and test for MTL
URL   : https://patchwork.freedesktop.org/series/116995/
State : warning

== Summary ==

Error: dim checkpatch failed
9bf11bf936fc drm/i915: Migrate platform-dependent mock hugepage selftests to live
-:7: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line)
#7: 
Convert the igt_mock_ppgtt_huge_fill and igt_mock_ppgtt_64K mock selftests into

-:110: ERROR:PRINTF_0XDECIMAL: Prefixing 0x with decimal output is defective
#110: FILE: drivers/gpu/drm/i915/gem/selftests/huge_pages.c:830:
+			pr_err("gtt=%#x, expected=%#x, size=0x%zd, single=%s\n",

total: 1 errors, 1 warnings, 0 checks, 223 lines checked
d43303b63fbe drm/i915: Use correct huge page manager for MTL
-:6: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line)
#6: 
MTL currently uses gen8_ppgtt_insert_huge when managing huge pages.  This is because

total: 0 errors, 1 warnings, 0 checks, 15 lines checked

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915: Hugepage manager and test for MTL

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 12630 bytes --]

== Series Details ==

Series: drm/i915: Hugepage manager and test for MTL
URL   : https://patchwork.freedesktop.org/series/116995/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_13063 -> Patchwork_116995v1
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_116995v1 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_116995v1, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116995v1/index.html

Participating hosts (38 -> 40)
------------------------------

  Additional (3): fi-kbl-soraka bat-mtlp-8 bat-mtlp-6 
  Missing    (1): fi-snb-2520m 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_116995v1:

### IGT changes ###

#### Possible regressions ####

  * igt@gem_exec_suspend@basic-s3@smem:
    - bat-rpls-1:         NOTRUN -> [ABORT][1]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116995v1/bat-rpls-1/igt@gem_exec_suspend@basic-s3@smem.html

  * igt@i915_selftest@live@gt_heartbeat:
    - fi-kbl-soraka:      NOTRUN -> [FAIL][2]
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116995v1/fi-kbl-soraka/igt@i915_selftest@live@gt_heartbeat.html

  * igt@i915_selftest@live@hangcheck:
    - fi-skl-guc:         [PASS][3] -> [FAIL][4]
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13063/fi-skl-guc/igt@i915_selftest@live@hangcheck.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116995v1/fi-skl-guc/igt@i915_selftest@live@hangcheck.html

  * igt@i915_selftest@live@hugepages:
    - bat-adlp-9:         [PASS][5] -> [FAIL][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13063/bat-adlp-9/igt@i915_selftest@live@hugepages.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116995v1/bat-adlp-9/igt@i915_selftest@live@hugepages.html
    - bat-adlp-6:         [PASS][7] -> [FAIL][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13063/bat-adlp-6/igt@i915_selftest@live@hugepages.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116995v1/bat-adlp-6/igt@i915_selftest@live@hugepages.html
    - bat-rplp-1:         [PASS][9] -> [FAIL][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13063/bat-rplp-1/igt@i915_selftest@live@hugepages.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116995v1/bat-rplp-1/igt@i915_selftest@live@hugepages.html
    - fi-rkl-11600:       [PASS][11] -> [FAIL][12]
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13063/fi-rkl-11600/igt@i915_selftest@live@hugepages.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116995v1/fi-rkl-11600/igt@i915_selftest@live@hugepages.html
    - bat-adls-5:         [PASS][13] -> [FAIL][14]
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13063/bat-adls-5/igt@i915_selftest@live@hugepages.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116995v1/bat-adls-5/igt@i915_selftest@live@hugepages.html
    - bat-dg1-5:          [PASS][15] -> [FAIL][16]
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13063/bat-dg1-5/igt@i915_selftest@live@hugepages.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116995v1/bat-dg1-5/igt@i915_selftest@live@hugepages.html
    - bat-dg1-7:          [PASS][17] -> [FAIL][18]
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13063/bat-dg1-7/igt@i915_selftest@live@hugepages.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116995v1/bat-dg1-7/igt@i915_selftest@live@hugepages.html
    - bat-jsl-3:          [PASS][19] -> [FAIL][20]
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13063/bat-jsl-3/igt@i915_selftest@live@hugepages.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116995v1/bat-jsl-3/igt@i915_selftest@live@hugepages.html
    - bat-adln-1:         [PASS][21] -> [FAIL][22]
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13063/bat-adln-1/igt@i915_selftest@live@hugepages.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116995v1/bat-adln-1/igt@i915_selftest@live@hugepages.html
    - bat-adlm-1:         [PASS][23] -> [FAIL][24]
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13063/bat-adlm-1/igt@i915_selftest@live@hugepages.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116995v1/bat-adlm-1/igt@i915_selftest@live@hugepages.html
    - bat-jsl-1:          [PASS][25] -> [FAIL][26]
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13063/bat-jsl-1/igt@i915_selftest@live@hugepages.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116995v1/bat-jsl-1/igt@i915_selftest@live@hugepages.html
    - fi-tgl-1115g4:      [PASS][27] -> [FAIL][28]
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13063/fi-tgl-1115g4/igt@i915_selftest@live@hugepages.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116995v1/fi-tgl-1115g4/igt@i915_selftest@live@hugepages.html
    - bat-rpls-1:         [PASS][29] -> [FAIL][30]
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13063/bat-rpls-1/igt@i915_selftest@live@hugepages.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116995v1/bat-rpls-1/igt@i915_selftest@live@hugepages.html

  
#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@kms_flip@basic-flip-vs-dpms:
    - {bat-mtlp-6}:       NOTRUN -> [SKIP][31] +29 similar issues
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116995v1/bat-mtlp-6/igt@kms_flip@basic-flip-vs-dpms.html

  
Known issues
------------

  Here are the changes found in Patchwork_116995v1 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_huc_copy@huc-copy:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][32] ([fdo#109271] / [i915#2190])
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116995v1/fi-kbl-soraka/igt@gem_huc_copy@huc-copy.html

  * igt@gem_lmem_swapping@basic:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][33] ([fdo#109271] / [i915#4613]) +3 similar issues
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116995v1/fi-kbl-soraka/igt@gem_lmem_swapping@basic.html

  * igt@i915_hangman@error-state-basic:
    - bat-dg2-9:          [PASS][34] -> [DMESG-WARN][35] ([i915#8396])
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13063/bat-dg2-9/igt@i915_hangman@error-state-basic.html
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116995v1/bat-dg2-9/igt@i915_hangman@error-state-basic.html

  * igt@i915_selftest@live@gt_pm:
    - fi-kbl-soraka:      NOTRUN -> [FAIL][36] ([i915#7913] / [i915#8383])
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116995v1/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html

  * igt@i915_selftest@live@migrate:
    - bat-adlp-9:         [PASS][37] -> [FAIL][38] ([i915#7913])
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13063/bat-adlp-9/igt@i915_selftest@live@migrate.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116995v1/bat-adlp-9/igt@i915_selftest@live@migrate.html

  * igt@i915_selftest@live@slpc:
    - bat-rpls-1:         NOTRUN -> [FAIL][39] ([i915#6997])
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116995v1/bat-rpls-1/igt@i915_selftest@live@slpc.html

  * igt@kms_chamelium_frames@hdmi-crc-fast:
    - fi-kbl-soraka:      NOTRUN -> [SKIP][40] ([fdo#109271]) +16 similar issues
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116995v1/fi-kbl-soraka/igt@kms_chamelium_frames@hdmi-crc-fast.html

  * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence:
    - bat-dg2-11:         NOTRUN -> [SKIP][41] ([i915#1845] / [i915#5354])
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116995v1/bat-dg2-11/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence.html

  
#### Possible fixes ####

  * igt@i915_selftest@live@reset:
    - bat-rpls-1:         [ABORT][42] ([i915#8384]) -> [PASS][43]
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13063/bat-rpls-1/igt@i915_selftest@live@reset.html
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116995v1/bat-rpls-1/igt@i915_selftest@live@reset.html

  * igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-dp-3:
    - bat-dg2-9:          [FAIL][44] ([fdo#103375]) -> [PASS][45] +2 similar issues
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13063/bat-dg2-9/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-dp-3.html
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116995v1/bat-dg2-9/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-b-dp-3.html

  * igt@kms_pipe_crc_basic@suspend-read-crc@pipe-c-dp-3:
    - bat-dg2-9:          [FAIL][46] ([fdo#103375] / [i915#7932]) -> [PASS][47]
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13063/bat-dg2-9/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-c-dp-3.html
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116995v1/bat-dg2-9/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-c-dp-3.html

  
#### Warnings ####

  * igt@i915_suspend@basic-s3-without-i915:
    - fi-tgl-1115g4:      [INCOMPLETE][48] ([i915#8102]) -> [INCOMPLETE][49] ([i915#7443] / [i915#8102])
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13063/fi-tgl-1115g4/igt@i915_suspend@basic-s3-without-i915.html
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116995v1/fi-tgl-1115g4/igt@i915_suspend@basic-s3-without-i915.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#3595]: https://gitlab.freedesktop.org/drm/intel/issues/3595
  [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
  [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
  [i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
  [i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
  [i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
  [i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
  [i915#4579]: https://gitlab.freedesktop.org/drm/intel/issues/4579
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190
  [i915#5274]: https://gitlab.freedesktop.org/drm/intel/issues/5274
  [i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
  [i915#6997]: https://gitlab.freedesktop.org/drm/intel/issues/6997
  [i915#7443]: https://gitlab.freedesktop.org/drm/intel/issues/7443
  [i915#7456]: https://gitlab.freedesktop.org/drm/intel/issues/7456
  [i915#7810]: https://gitlab.freedesktop.org/drm/intel/issues/7810
  [i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
  [i915#7913]: https://gitlab.freedesktop.org/drm/intel/issues/7913
  [i915#7920]: https://gitlab.freedesktop.org/drm/intel/issues/7920
  [i915#7932]: https://gitlab.freedesktop.org/drm/intel/issues/7932
  [i915#8102]: https://gitlab.freedesktop.org/drm/intel/issues/8102
  [i915#8346]: https://gitlab.freedesktop.org/drm/intel/issues/8346
  [i915#8368]: https://gitlab.freedesktop.org/drm/intel/issues/8368
  [i915#8383]: https://gitlab.freedesktop.org/drm/intel/issues/8383
  [i915#8384]: https://gitlab.freedesktop.org/drm/intel/issues/8384
  [i915#8396]: https://gitlab.freedesktop.org/drm/intel/issues/8396


Build changes
-------------

  * Linux: CI_DRM_13063 -> Patchwork_116995v1

  CI-20190529: 20190529
  CI_DRM_13063: d56dad364b19dce932190540edc2f30000c92760 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7271: d12d7eb92226e14745a80e6bdd95384913a43548 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_116995v1: d56dad364b19dce932190540edc2f30000c92760 @ git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

060adfc1183a drm/i915: Use correct huge page manager for MTL
91f137ac194c drm/i915: Migrate platform-dependent mock hugepage selftests to live

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_116995v1/index.html

[-- Attachment #2: Type: text/html, Size: 13045 bytes --]

Re: [PATCH v7 0/2] drm/i915: Hugepage manager and test for MTL

[Andrzej Hajda]

On 26.04.2023 17:31, Cavitt, Jonathan wrote:
> -----Original Message-----
> From: Hajda, Andrzej <andrzej.hajda@intel.com>
> Sent: Wednesday, April 26, 2023 8:14 AM
> To: intel-gfx@lists.freedesktop.org; linux-kernel@vger.kernel.org; Cavitt, Jonathan <jonathan.cavitt@intel.com>; Hajda, Andrzej <andrzej.hajda@intel.com>; Auld, Matthew <matthew.auld@intel.com>
> Subject: [PATCH v7 0/2] drm/i915: Hugepage manager and test for MTL
>> This patchset patches sent by Jonathan and Andi, with
>> addressed CI failures:
>> 1. Fixed checking alignment of 64K pages on both Pre-Gen12 and Gen12.
>> 2. Fixed start alignment of 2M pages.
>>
>> Regards
>> Andrzej
>>
>> Jonathan Cavitt (2):
>>   drm/i915: Migrate platform-dependent mock hugepage selftests to live
>>   drm/i915: Use correct huge page manager for MTL
>>
>> .../gpu/drm/i915/gem/selftests/huge_pages.c   | 88 +++++++++++++++----
>> drivers/gpu/drm/i915/gt/gen8_ppgtt.c          |  3 +-
>> 2 files changed, 71 insertions(+), 20 deletions(-)
>>
>> Cc: intel-gfx@lists.freedesktop.org
>> Cc: linux-kernel@vger.kernel.org
>> Cc: Jonathan Cavitt <jonathan.cavitt@intel.com>
>> Cc: Andrzej Hajda <andrzej.hajda@intel.com>
>> Cc: Matthew Auld <matthew.auld@intel.com>
>> -- 
>> 2.39.2
>>
>> ---
>> Jonathan Cavitt (2):
>>       drm/i915: Migrate platform-dependent mock hugepage selftests to live
>>       drm/i915: Use correct huge page manager for MTL
>>
>> drivers/gpu/drm/i915/gem/selftests/huge_pages.c | 105 ++++++++++++++++++------
>> drivers/gpu/drm/i915/gt/gen8_ppgtt.c            |   3 +-
>> 2 files changed, 82 insertions(+), 26 deletions(-)
>> ---
>> base-commit: 4d0066a1c0763d50b6fb017e27d12b081ce21b57
>> change-id: 20230425-hugepage-migrate-1869aaf31a6d
>>
>> Best regards,
>> -- 
>> Andrzej Hajda <andrzej.hajda@intel.com>
>
> Just reviewed the changes proper.  It's been a while, so I don't remember everything
> about the prior version, but I think I recognized what was changed:
>
> - I wasn't aware a 21 bit alignment was required for 2M page sizes.  I'm glad you caught that.
> - The extra debugging/error information will be helpful in the case of a failure.
> - Grabbing the per-context VM instead of the ppgtt vm sounds good to me.
>
> Everything here looks amenable.
> Acked-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
> Though, given I'm also one of the signed-off-bys, I don't know if me acking it is exactly above-board.
> -Jonathan Cavitt

Thanks for looking at it. CI spotted another issue: 2M pages are 
preferred over old-64K, if former are available.
Fixed version sent.
Regarding tags, I've kept your authorship, s-o-b, and added my 
Co-developed, if it is OK to you I will keep it this way.
If you prefer otherwise let me know.

Regards
Andrzej

>

Re: [Intel-gfx] [PATCH v7 0/2] drm/i915: Hugepage manager and test for MTL

[Andrzej Hajda]

On 26.04.2023 17:31, Cavitt, Jonathan wrote:
> -----Original Message-----
> From: Hajda, Andrzej <andrzej.hajda@intel.com>
> Sent: Wednesday, April 26, 2023 8:14 AM
> To: intel-gfx@lists.freedesktop.org; linux-kernel@vger.kernel.org; Cavitt, Jonathan <jonathan.cavitt@intel.com>; Hajda, Andrzej <andrzej.hajda@intel.com>; Auld, Matthew <matthew.auld@intel.com>
> Subject: [PATCH v7 0/2] drm/i915: Hugepage manager and test for MTL
>> This patchset patches sent by Jonathan and Andi, with
>> addressed CI failures:
>> 1. Fixed checking alignment of 64K pages on both Pre-Gen12 and Gen12.
>> 2. Fixed start alignment of 2M pages.
>>
>> Regards
>> Andrzej
>>
>> Jonathan Cavitt (2):
>>   drm/i915: Migrate platform-dependent mock hugepage selftests to live
>>   drm/i915: Use correct huge page manager for MTL
>>
>> .../gpu/drm/i915/gem/selftests/huge_pages.c   | 88 +++++++++++++++----
>> drivers/gpu/drm/i915/gt/gen8_ppgtt.c          |  3 +-
>> 2 files changed, 71 insertions(+), 20 deletions(-)
>>
>> Cc: intel-gfx@lists.freedesktop.org
>> Cc: linux-kernel@vger.kernel.org
>> Cc: Jonathan Cavitt <jonathan.cavitt@intel.com>
>> Cc: Andrzej Hajda <andrzej.hajda@intel.com>
>> Cc: Matthew Auld <matthew.auld@intel.com>
>> -- 
>> 2.39.2
>>
>> ---
>> Jonathan Cavitt (2):
>>       drm/i915: Migrate platform-dependent mock hugepage selftests to live
>>       drm/i915: Use correct huge page manager for MTL
>>
>> drivers/gpu/drm/i915/gem/selftests/huge_pages.c | 105 ++++++++++++++++++------
>> drivers/gpu/drm/i915/gt/gen8_ppgtt.c            |   3 +-
>> 2 files changed, 82 insertions(+), 26 deletions(-)
>> ---
>> base-commit: 4d0066a1c0763d50b6fb017e27d12b081ce21b57
>> change-id: 20230425-hugepage-migrate-1869aaf31a6d
>>
>> Best regards,
>> -- 
>> Andrzej Hajda <andrzej.hajda@intel.com>
>
> Just reviewed the changes proper.  It's been a while, so I don't remember everything
> about the prior version, but I think I recognized what was changed:
>
> - I wasn't aware a 21 bit alignment was required for 2M page sizes.  I'm glad you caught that.
> - The extra debugging/error information will be helpful in the case of a failure.
> - Grabbing the per-context VM instead of the ppgtt vm sounds good to me.
>
> Everything here looks amenable.
> Acked-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
> Though, given I'm also one of the signed-off-bys, I don't know if me acking it is exactly above-board.
> -Jonathan Cavitt

Thanks for looking at it. CI spotted another issue: 2M pages are 
preferred over old-64K, if former are available.
Fixed version sent.
Regarding tags, I've kept your authorship, s-o-b, and added my 
Co-developed, if it is OK to you I will keep it this way.
If you prefer otherwise let me know.

Regards
Andrzej

>

RE: [PATCH v7 0/2] drm/i915: Hugepage manager and test for MTL

[Cavitt, Jonathan]

-----Original Message-----
From: Hajda, Andrzej <andrzej.hajda@intel.com> 
Sent: Wednesday, April 26, 2023 2:37 PM
To: Cavitt, Jonathan <jonathan.cavitt@intel.com>; intel-gfx@lists.freedesktop.org; linux-kernel@vger.kernel.org; Auld, Matthew <matthew.auld@intel.com>
Subject: Re: [PATCH v7 0/2] drm/i915: Hugepage manager and test for MTL
>
>On 26.04.2023 17:31, Cavitt, Jonathan wrote:
>> -----Original Message-----
>> From: Hajda, Andrzej <andrzej.hajda@intel.com>
>> Sent: Wednesday, April 26, 2023 8:14 AM
>> To: intel-gfx@lists.freedesktop.org; linux-kernel@vger.kernel.org; Cavitt, Jonathan <jonathan.cavitt@intel.com>; Hajda, Andrzej <andrzej.hajda@intel.com>; Auld, Matthew <matthew.auld@intel.com>
>> Subject: [PATCH v7 0/2] drm/i915: Hugepage manager and test for MTL
>>> This patchset patches sent by Jonathan and Andi, with
>>> addressed CI failures:
>>> 1. Fixed checking alignment of 64K pages on both Pre-Gen12 and Gen12.
>>> 2. Fixed start alignment of 2M pages.
>>>
>>> Regards
>>> Andrzej
>>>
>>> Jonathan Cavitt (2):
>>>   drm/i915: Migrate platform-dependent mock hugepage selftests to live
>>>   drm/i915: Use correct huge page manager for MTL
>>>
>>> .../gpu/drm/i915/gem/selftests/huge_pages.c   | 88 +++++++++++++++----
>>> drivers/gpu/drm/i915/gt/gen8_ppgtt.c          |  3 +-
>>> 2 files changed, 71 insertions(+), 20 deletions(-)
>>>
>>> Cc: intel-gfx@lists.freedesktop.org
>>> Cc: linux-kernel@vger.kernel.org
>>> Cc: Jonathan Cavitt <jonathan.cavitt@intel.com>
>>> Cc: Andrzej Hajda <andrzej.hajda@intel.com>
>>> Cc: Matthew Auld <matthew.auld@intel.com>
>>> -- 
>>> 2.39.2
>>>
>>> ---
>>> Jonathan Cavitt (2):
>>>       drm/i915: Migrate platform-dependent mock hugepage selftests to live
>>>       drm/i915: Use correct huge page manager for MTL
>>>
>>> drivers/gpu/drm/i915/gem/selftests/huge_pages.c | 105 ++++++++++++++++++------
>>> drivers/gpu/drm/i915/gt/gen8_ppgtt.c            |   3 +-
>>> 2 files changed, 82 insertions(+), 26 deletions(-)
>>> ---
>>> base-commit: 4d0066a1c0763d50b6fb017e27d12b081ce21b57
>>> change-id: 20230425-hugepage-migrate-1869aaf31a6d
>>>
>>> Best regards,
>>> -- 
>>> Andrzej Hajda <andrzej.hajda@intel.com>
>>
>> Just reviewed the changes proper.  It's been a while, so I don't remember everything
>> about the prior version, but I think I recognized what was changed:
>>
>> - I wasn't aware a 21 bit alignment was required for 2M page sizes.  I'm glad you caught that.
>> - The extra debugging/error information will be helpful in the case of a failure.
>> - Grabbing the per-context VM instead of the ppgtt vm sounds good to me.
>>
>> Everything here looks amenable.
>> Acked-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
>> Though, given I'm also one of the signed-off-bys, I don't know if me acking it is exactly above-board.
>> -Jonathan Cavitt
>
>Thanks for looking at it. CI spotted another issue: 2M pages are 
>preferred over old-64K, if former are available.
>Fixed version sent.
>Regarding tags, I've kept your authorship, s-o-b, and added my 
>Co-developed, if it is OK to you I will keep it this way.
>If you prefer otherwise let me know.

That is entirely acceptable!  Thank you for your time.
-Jonathan Cavitt

>
>Regards
>Andrzej
>
>>
>
>

Re: [Intel-gfx] [PATCH v7 0/2] drm/i915: Hugepage manager and test for MTL

[Cavitt, Jonathan]

-----Original Message-----
From: Hajda, Andrzej <andrzej.hajda@intel.com> 
Sent: Wednesday, April 26, 2023 2:37 PM
To: Cavitt, Jonathan <jonathan.cavitt@intel.com>; intel-gfx@lists.freedesktop.org; linux-kernel@vger.kernel.org; Auld, Matthew <matthew.auld@intel.com>
Subject: Re: [PATCH v7 0/2] drm/i915: Hugepage manager and test for MTL
>
>On 26.04.2023 17:31, Cavitt, Jonathan wrote:
>> -----Original Message-----
>> From: Hajda, Andrzej <andrzej.hajda@intel.com>
>> Sent: Wednesday, April 26, 2023 8:14 AM
>> To: intel-gfx@lists.freedesktop.org; linux-kernel@vger.kernel.org; Cavitt, Jonathan <jonathan.cavitt@intel.com>; Hajda, Andrzej <andrzej.hajda@intel.com>; Auld, Matthew <matthew.auld@intel.com>
>> Subject: [PATCH v7 0/2] drm/i915: Hugepage manager and test for MTL
>>> This patchset patches sent by Jonathan and Andi, with
>>> addressed CI failures:
>>> 1. Fixed checking alignment of 64K pages on both Pre-Gen12 and Gen12.
>>> 2. Fixed start alignment of 2M pages.
>>>
>>> Regards
>>> Andrzej
>>>
>>> Jonathan Cavitt (2):
>>>   drm/i915: Migrate platform-dependent mock hugepage selftests to live
>>>   drm/i915: Use correct huge page manager for MTL
>>>
>>> .../gpu/drm/i915/gem/selftests/huge_pages.c   | 88 +++++++++++++++----
>>> drivers/gpu/drm/i915/gt/gen8_ppgtt.c          |  3 +-
>>> 2 files changed, 71 insertions(+), 20 deletions(-)
>>>
>>> Cc: intel-gfx@lists.freedesktop.org
>>> Cc: linux-kernel@vger.kernel.org
>>> Cc: Jonathan Cavitt <jonathan.cavitt@intel.com>
>>> Cc: Andrzej Hajda <andrzej.hajda@intel.com>
>>> Cc: Matthew Auld <matthew.auld@intel.com>
>>> -- 
>>> 2.39.2
>>>
>>> ---
>>> Jonathan Cavitt (2):
>>>       drm/i915: Migrate platform-dependent mock hugepage selftests to live
>>>       drm/i915: Use correct huge page manager for MTL
>>>
>>> drivers/gpu/drm/i915/gem/selftests/huge_pages.c | 105 ++++++++++++++++++------
>>> drivers/gpu/drm/i915/gt/gen8_ppgtt.c            |   3 +-
>>> 2 files changed, 82 insertions(+), 26 deletions(-)
>>> ---
>>> base-commit: 4d0066a1c0763d50b6fb017e27d12b081ce21b57
>>> change-id: 20230425-hugepage-migrate-1869aaf31a6d
>>>
>>> Best regards,
>>> -- 
>>> Andrzej Hajda <andrzej.hajda@intel.com>
>>
>> Just reviewed the changes proper.  It's been a while, so I don't remember everything
>> about the prior version, but I think I recognized what was changed:
>>
>> - I wasn't aware a 21 bit alignment was required for 2M page sizes.  I'm glad you caught that.
>> - The extra debugging/error information will be helpful in the case of a failure.
>> - Grabbing the per-context VM instead of the ppgtt vm sounds good to me.
>>
>> Everything here looks amenable.
>> Acked-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
>> Though, given I'm also one of the signed-off-bys, I don't know if me acking it is exactly above-board.
>> -Jonathan Cavitt
>
>Thanks for looking at it. CI spotted another issue: 2M pages are 
>preferred over old-64K, if former are available.
>Fixed version sent.
>Regarding tags, I've kept your authorship, s-o-b, and added my 
>Co-developed, if it is OK to you I will keep it this way.
>If you prefer otherwise let me know.

That is entirely acceptable!  Thank you for your time.
-Jonathan Cavitt

>
>Regards
>Andrzej
>
>>
>
>