All of lore.kernel.org
 help / color / mirror / Atom feed
From: "tip-bot2 for Thomas Gleixner" <tip-bot2@linutronix.de>
To: linux-tip-commits@vger.kernel.org
Cc: Thomas Gleixner <tglx@linutronix.de>,
	Anup Patel <apatel@ventanamicro.com>,
	x86@kernel.org, linux-kernel@vger.kernel.org
Subject: [tip: irq/msi] genirq/msi: Provide optional translation op
Date: Thu, 15 Feb 2024 19:57:00 -0000	[thread overview]
Message-ID: <170802702048.398.11225153893259740520.tip-bot2@tip-bot2> (raw)
In-Reply-To: <20240127161753.114685-8-apatel@ventanamicro.com>

The following commit has been merged into the irq/msi branch of tip:

Commit-ID:     9c78c1a85c04bdfbccc5a50588e001087d942b08
Gitweb:        https://git.kernel.org/tip/9c78c1a85c04bdfbccc5a50588e001087d942b08
Author:        Thomas Gleixner <tglx@linutronix.de>
AuthorDate:    Sat, 27 Jan 2024 21:47:35 +05:30
Committer:     Thomas Gleixner <tglx@linutronix.de>
CommitterDate: Thu, 15 Feb 2024 17:55:40 +01:00

genirq/msi: Provide optional translation op

irq_create_fwspec_mapping() requires translation of the firmware spec to a
hardware interrupt number and the trigger type information.

Wired interrupts which are connected to a wire to MSI bridge, like MBIGEN
are allocated that way. So far MBIGEN provides a regular irqdomain which
then hooks backwards into the MSI infrastructure. That's an unholy mess and
will be replaced with per device MSI domains which are regular MSI domains.

Interrupts on MSI domains are not supported by irq_create_fwspec_mapping(),
but for making the wire to MSI bridges sane it makes sense to provide a
special allocation/free interface in the MSI infrastructure. That avoids
the backdoors into the core MSI allocation code and just shares all the
regular MSI infrastructure.

Provide an optional translation callback in msi_domain_ops which can be
utilized by these wire to MSI bridges. No other MSI domain should provide a
translation callback. The default translation callback of the MSI
irqdomains will warn when it is invoked on a non-prepared MSI domain.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/r/20240127161753.114685-8-apatel@ventanamicro.com

---
 include/linux/msi.h |  5 +++++
 kernel/irq/msi.c    | 15 +++++++++++++++
 2 files changed, 20 insertions(+)

diff --git a/include/linux/msi.h b/include/linux/msi.h
index b0842ea..24a5424 100644
--- a/include/linux/msi.h
+++ b/include/linux/msi.h
@@ -412,6 +412,7 @@ bool arch_restore_msi_irqs(struct pci_dev *dev);
 struct irq_domain;
 struct irq_domain_ops;
 struct irq_chip;
+struct irq_fwspec;
 struct device_node;
 struct fwnode_handle;
 struct msi_domain_info;
@@ -431,6 +432,8 @@ struct msi_domain_info;
  *			function.
  * @msi_post_free:	Optional function which is invoked after freeing
  *			all interrupts.
+ * @msi_translate:	Optional translate callback to support the odd wire to
+ *			MSI bridges, e.g. MBIGEN
  *
  * @get_hwirq, @msi_init and @msi_free are callbacks used by the underlying
  * irqdomain.
@@ -468,6 +471,8 @@ struct msi_domain_ops {
 					    struct device *dev);
 	void		(*msi_post_free)(struct irq_domain *domain,
 					 struct device *dev);
+	int		(*msi_translate)(struct irq_domain *domain, struct irq_fwspec *fwspec,
+					 irq_hw_number_t *hwirq, unsigned int *type);
 };
 
 /**
diff --git a/kernel/irq/msi.c b/kernel/irq/msi.c
index 79b4a58..c0e7378 100644
--- a/kernel/irq/msi.c
+++ b/kernel/irq/msi.c
@@ -726,11 +726,26 @@ static void msi_domain_free(struct irq_domain *domain, unsigned int virq,
 	irq_domain_free_irqs_top(domain, virq, nr_irqs);
 }
 
+static int msi_domain_translate(struct irq_domain *domain, struct irq_fwspec *fwspec,
+				irq_hw_number_t *hwirq, unsigned int *type)
+{
+	struct msi_domain_info *info = domain->host_data;
+
+	/*
+	 * This will catch allocations through the regular irqdomain path except
+	 * for MSI domains which really support this, e.g. MBIGEN.
+	 */
+	if (!info->ops->msi_translate)
+		return -ENOTSUPP;
+	return info->ops->msi_translate(domain, fwspec, hwirq, type);
+}
+
 static const struct irq_domain_ops msi_domain_ops = {
 	.alloc		= msi_domain_alloc,
 	.free		= msi_domain_free,
 	.activate	= msi_domain_activate,
 	.deactivate	= msi_domain_deactivate,
+	.translate	= msi_domain_translate,
 };
 
 static irq_hw_number_t msi_domain_ops_get_hwirq(struct msi_domain_info *info,

  reply	other threads:[~2024-02-15 19:57 UTC|newest]

Thread overview: 277+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-01-27 16:17 [PATCH v12 00/25] Linux RISC-V AIA Support Anup Patel
2024-01-27 16:17 ` Anup Patel
2024-01-27 16:17 ` Anup Patel
2024-01-27 16:17 ` [PATCH v12 01/25] irqchip/gic-v3: Make gic_irq_domain_select() robust for zero parameter count Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-02-15 11:47   ` Marc Zyngier
2024-02-15 11:47     ` Marc Zyngier
2024-02-15 11:47     ` Marc Zyngier
2024-02-15 19:57   ` [tip: irq/msi] " tip-bot2 for Thomas Gleixner
2024-01-27 16:17 ` [PATCH v12 02/25] genirq/irqdomain: Remove the param count restriction from select() Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-02-15 19:57   ` [tip: irq/msi] " tip-bot2 for Thomas Gleixner
2024-02-19 15:50     ` Biju Das
2024-02-19 15:56   ` Marc Zyngier
2024-02-19 16:39     ` Biju Das
2024-02-19 17:39       ` Biju Das
2024-02-20  8:50     ` Thomas Gleixner
2024-02-20 16:33       ` [tip: irq/msi] irqchip/imx-intmux: Handle pure domain searches correctly tip-bot2 for Thomas Gleixner
2024-02-22 13:01   ` [PATCH v12 02/25] genirq/irqdomain: Remove the param count restriction from select() Aishwarya TCV
2024-02-22 13:01     ` Aishwarya TCV
2024-02-22 13:01     ` Aishwarya TCV
2024-02-22 16:28     ` Marc Zyngier
2024-02-22 16:28       ` Marc Zyngier
2024-02-22 16:28       ` Marc Zyngier
2024-02-22 22:59       ` Aishwarya TCV
2024-02-22 22:59         ` Aishwarya TCV
2024-02-22 22:59         ` Aishwarya TCV
     [not found]   ` <CGME20240223102258eucas1p119f38e40f769c883c0a502e9e26be888@eucas1p1.samsung.com>
2024-02-23 10:22     ` Marek Szyprowski
2024-02-23 10:22       ` Marek Szyprowski
2024-02-23 10:22       ` Marek Szyprowski
2024-02-23 10:45       ` Biju Das
2024-02-23 10:45         ` Biju Das
2024-02-23 10:45         ` Biju Das
2024-02-23 10:56         ` Marek Szyprowski
2024-02-23 10:56           ` Marek Szyprowski
2024-02-23 10:56           ` Marek Szyprowski
2024-02-23 11:01           ` Biju Das
2024-02-23 11:01             ` Biju Das
2024-02-23 11:01             ` Biju Das
2024-01-27 16:17 ` [PATCH v12 03/25] genirq/msi: Extend msi_parent_ops Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-02-15 19:57   ` [tip: irq/msi] " tip-bot2 for Thomas Gleixner
2024-01-27 16:17 ` [PATCH v12 04/25] genirq/irqdomain: Add DOMAIN_BUS_DEVICE_IMS Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-02-15 11:54   ` Marc Zyngier
2024-02-15 11:54     ` Marc Zyngier
2024-02-15 11:54     ` Marc Zyngier
2024-02-15 15:01     ` Thomas Gleixner
2024-02-15 15:01       ` Thomas Gleixner
2024-02-15 15:01       ` Thomas Gleixner
2024-02-15 19:57   ` [tip: irq/msi] genirq/irqdomain: Add DOMAIN_BUS_DEVICE_MSI tip-bot2 for Thomas Gleixner
2024-01-27 16:17 ` [PATCH v12 05/25] platform-msi: Prepare for real per device domains Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-02-15 19:57   ` [tip: irq/msi] " tip-bot2 for Thomas Gleixner
2024-01-27 16:17 ` [PATCH v12 06/25] irqchip: Convert all platform MSI users to the new API Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-02-15 19:57   ` [tip: irq/msi] " tip-bot2 for Thomas Gleixner
2024-01-27 16:17 ` [PATCH v12 07/25] genirq/msi: Provide optional translation op Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-02-15 19:57   ` tip-bot2 for Thomas Gleixner [this message]
2024-01-27 16:17 ` [PATCH v12 08/25] genirq/msi: Split msi_domain_alloc_irq_at() Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-02-15 19:56   ` [tip: irq/msi] " tip-bot2 for Thomas Gleixner
2024-01-27 16:17 ` [PATCH v12 09/25] genirq/msi: Provide DOMAIN_BUS_WIRED_TO_MSI Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-02-15 19:56   ` [tip: irq/msi] " tip-bot2 for Thomas Gleixner
2024-01-27 16:17 ` [PATCH v12 10/25] genirq/msi: Optionally use dev->fwnode for device domain Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-02-15 19:56   ` [tip: irq/msi] " tip-bot2 for Thomas Gleixner
2024-01-27 16:17 ` [PATCH v12 11/25] genirq/msi: Provide allocation/free functions for "wired" MSI interrupts Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-02-15 19:56   ` [tip: irq/msi] " tip-bot2 for Thomas Gleixner
2024-01-27 16:17 ` [PATCH v12 12/25] genirq/irqdomain: Reroute device MSI create_mapping Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-02-15 19:56   ` [tip: irq/msi] " tip-bot2 for Thomas Gleixner
2024-01-27 16:17 ` [PATCH v12 13/25] genirq/msi: Provide MSI_FLAG_PARENT_PM_DEV Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-02-15 19:56   ` [tip: irq/msi] " tip-bot2 for Thomas Gleixner
2024-01-27 16:17 ` [PATCH v12 14/25] irqchip/sifive-plic: Convert PLIC driver into a platform driver Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-02-16 15:33   ` Thomas Gleixner
2024-02-16 15:33     ` Thomas Gleixner
2024-02-16 15:33     ` Thomas Gleixner
2024-02-16 17:11     ` Anup Patel
2024-02-16 17:11       ` Anup Patel
2024-02-16 17:11       ` Anup Patel
2024-02-16 20:22       ` Thomas Gleixner
2024-02-16 20:22         ` Thomas Gleixner
2024-02-16 20:22         ` Thomas Gleixner
2024-02-17  5:42         ` Anup Patel
2024-02-17  5:42           ` Anup Patel
2024-02-17  5:42           ` Anup Patel
2024-01-27 16:17 ` [PATCH v12 15/25] irqchip/riscv-intc: Add support for RISC-V AIA Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17 ` [PATCH v12 16/25] dt-bindings: interrupt-controller: Add RISC-V incoming MSI controller Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17 ` [PATCH v12 17/25] genirq/matrix: Dynamic bitmap allocation Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17 ` [PATCH v12 18/25] irqchip: Add RISC-V incoming MSI controller early driver Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-02-07  9:43   ` Björn Töpel
2024-02-07  9:43     ` Björn Töpel
2024-02-07  9:43     ` Björn Töpel
2024-02-16 18:40   ` Thomas Gleixner
2024-02-16 18:40     ` Thomas Gleixner
2024-02-16 18:40     ` Thomas Gleixner
2024-02-18 13:16     ` Anup Patel
2024-02-18 13:16       ` Anup Patel
2024-02-18 13:16       ` Anup Patel
2024-01-27 16:17 ` [PATCH v12 19/25] irqchip/riscv-imsic: Add device MSI domain support for platform devices Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-02-06 15:36   ` Björn Töpel
2024-02-06 15:36     ` Björn Töpel
2024-02-06 15:36     ` Björn Töpel
2024-02-16 20:12   ` Thomas Gleixner
2024-02-16 20:12     ` Thomas Gleixner
2024-02-16 20:12     ` Thomas Gleixner
2024-02-19  4:10     ` Anup Patel
2024-02-19  4:10       ` Anup Patel
2024-02-19  4:10       ` Anup Patel
2024-01-27 16:17 ` [PATCH v12 20/25] irqchip/riscv-imsic: Add device MSI domain support for PCI devices Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-02-16 20:14   ` Thomas Gleixner
2024-02-16 20:14     ` Thomas Gleixner
2024-02-16 20:14     ` Thomas Gleixner
2024-02-19  4:41     ` Anup Patel
2024-02-19  4:41       ` Anup Patel
2024-02-19  4:41       ` Anup Patel
2024-01-27 16:17 ` [PATCH v12 21/25] dt-bindings: interrupt-controller: Add RISC-V advanced PLIC Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17 ` [PATCH v12 22/25] irqchip: Add RISC-V advanced PLIC driver for direct-mode Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-02-01  6:39   ` Andy Chiu
2024-02-01  6:39     ` Andy Chiu
2024-02-01  6:39     ` Andy Chiu
2024-02-19 10:28     ` Anup Patel
2024-02-19 10:28       ` Anup Patel
2024-02-19 10:28       ` Anup Patel
2024-02-02  9:29   ` Clément Léger
2024-02-02  9:29     ` Clément Léger
2024-02-02  9:29     ` Clément Léger
2024-02-02 10:30     ` Anup Patel
2024-02-02 10:30       ` Anup Patel
2024-02-02 10:30       ` Anup Patel
2024-02-02 10:33       ` Clément Léger
2024-02-02 10:33         ` Clément Léger
2024-02-02 10:33         ` Clément Léger
2024-02-16 20:50   ` Thomas Gleixner
2024-02-16 20:50     ` Thomas Gleixner
2024-02-16 20:50     ` Thomas Gleixner
2024-02-19  9:35     ` Anup Patel
2024-02-19  9:35       ` Anup Patel
2024-02-19  9:35       ` Anup Patel
2024-01-27 16:17 ` [PATCH v12 23/25] irqchip/riscv-aplic: Add support for MSI-mode Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-02-16 21:04   ` Thomas Gleixner
2024-02-16 21:04     ` Thomas Gleixner
2024-02-16 21:04     ` Thomas Gleixner
2024-02-19  9:45     ` Anup Patel
2024-02-19  9:45       ` Anup Patel
2024-02-19  9:45       ` Anup Patel
2024-01-27 16:17 ` [PATCH v12 24/25] RISC-V: Select APLIC and IMSIC drivers Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17 ` [PATCH v12 25/25] MAINTAINERS: Add entry for RISC-V AIA drivers Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:20 ` [PATCH v12 00/25] Linux RISC-V AIA Support Anup Patel
2024-01-27 16:20   ` Anup Patel
2024-01-27 16:20   ` Anup Patel
2024-02-14 19:54   ` Thomas Gleixner
2024-02-14 19:54     ` Thomas Gleixner
2024-02-14 19:54     ` Thomas Gleixner
2024-02-15  5:48     ` Anup Patel
2024-02-15  5:48       ` Anup Patel
2024-02-15  5:48       ` Anup Patel
2024-02-15 19:59       ` Thomas Gleixner
2024-02-15 19:59         ` Thomas Gleixner
2024-02-15 19:59         ` Thomas Gleixner
2024-02-16 21:05         ` Thomas Gleixner
2024-02-16 21:05           ` Thomas Gleixner
2024-02-16 21:05           ` Thomas Gleixner
2024-02-20  6:12           ` Anup Patel
2024-02-20  6:12             ` Anup Patel
2024-02-20  6:12             ` Anup Patel
2024-02-15 11:57     ` Marc Zyngier
2024-02-15 11:57       ` Marc Zyngier
2024-02-15 11:57       ` Marc Zyngier
2024-01-30  7:16 ` Björn Töpel
2024-01-30  7:16   ` Björn Töpel
2024-01-30  7:16   ` Björn Töpel
2024-01-30  7:52   ` Björn Töpel
2024-01-30  7:52     ` Björn Töpel
2024-01-30  7:52     ` Björn Töpel
2024-01-30 10:02     ` Anup Patel
2024-01-30 10:02       ` Anup Patel
2024-01-30 10:02       ` Anup Patel
2024-01-30 11:05       ` Björn Töpel
2024-01-30 11:05         ` Björn Töpel
2024-01-30 11:05         ` Björn Töpel
2024-01-30 10:23     ` Anup Patel
2024-01-30 10:23       ` Anup Patel
2024-01-30 10:23       ` Anup Patel
2024-01-30 11:46       ` Björn Töpel
2024-01-30 11:46         ` Björn Töpel
2024-01-30 11:46         ` Björn Töpel
2024-01-30 14:48         ` Björn Töpel
2024-01-30 14:48           ` Björn Töpel
2024-01-30 14:48           ` Björn Töpel
2024-01-30 15:19           ` Anup Patel
2024-01-30 15:19             ` Anup Patel
2024-01-30 15:19             ` Anup Patel
2024-01-30 15:48           ` Anup Patel
2024-01-30 15:48             ` Anup Patel
2024-01-30 15:48             ` Anup Patel
2024-01-30 17:49             ` Björn Töpel
2024-01-30 17:49               ` Björn Töpel
2024-01-30 17:49               ` Björn Töpel
2024-02-01 15:07               ` Anup Patel
2024-02-01 15:07                 ` Anup Patel
2024-02-01 15:07                 ` Anup Patel
2024-02-01 18:45                 ` Björn Töpel
2024-02-01 18:45                   ` Björn Töpel
2024-02-01 18:45                   ` Björn Töpel
2024-02-06 15:39 ` Björn Töpel
2024-02-06 15:39   ` Björn Töpel
2024-02-06 15:39   ` Björn Töpel
2024-02-06 17:39   ` Anup Patel
2024-02-06 17:39     ` Anup Patel
2024-02-06 17:39     ` Anup Patel
2024-02-07  7:27     ` Björn Töpel
2024-02-07  7:27       ` Björn Töpel
2024-02-07  7:27       ` Björn Töpel
2024-02-07  9:18       ` Anup Patel
2024-02-07  9:18         ` Anup Patel
2024-02-07  9:18         ` Anup Patel
2024-02-07  9:37         ` Björn Töpel
2024-02-07  9:37           ` Björn Töpel
2024-02-07  9:37           ` Björn Töpel
2024-02-07 12:55           ` Björn Töpel
2024-02-07 12:55             ` Björn Töpel
2024-02-07 12:55             ` Björn Töpel
2024-02-07 13:08             ` Anup Patel
2024-02-07 13:08               ` Anup Patel
2024-02-07 13:08               ` Anup Patel
2024-02-07 13:10             ` Anup Patel
2024-02-07 13:10               ` Anup Patel
2024-02-07 13:10               ` Anup Patel
2024-02-08 10:10 ` Andrea Parri
2024-02-08 10:10   ` Andrea Parri
2024-02-08 10:10   ` Andrea Parri
2024-02-16 11:33   ` Anup Patel
2024-02-16 11:33     ` Anup Patel
2024-02-16 11:33     ` Anup Patel

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=170802702048.398.11225153893259740520.tip-bot2@tip-bot2 \
    --to=tip-bot2@linutronix.de \
    --cc=apatel@ventanamicro.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-tip-commits@vger.kernel.org \
    --cc=tglx@linutronix.de \
    --cc=x86@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.