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From: Anup Patel <apatel@ventanamicro.com>
To: Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Frank Rowand <frowand.list@gmail.com>,
	Conor Dooley <conor+dt@kernel.org>
Cc: "Marc Zyngier" <maz@kernel.org>, "Björn Töpel" <bjorn@kernel.org>,
	"Atish Patra" <atishp@atishpatra.org>,
	"Andrew Jones" <ajones@ventanamicro.com>,
	"Sunil V L" <sunilvl@ventanamicro.com>,
	"Saravana Kannan" <saravanak@google.com>,
	"Anup Patel" <anup@brainfault.org>,
	linux-riscv@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	"Anup Patel" <apatel@ventanamicro.com>
Subject: [PATCH v12 11/25] genirq/msi: Provide allocation/free functions for "wired" MSI interrupts
Date: Sat, 27 Jan 2024 21:47:39 +0530	[thread overview]
Message-ID: <20240127161753.114685-12-apatel@ventanamicro.com> (raw)
In-Reply-To: <20240127161753.114685-1-apatel@ventanamicro.com>

From: Thomas Gleixner <tglx@linutronix.de>

To support wire to MSI bridges proper in the MSI core infrastructure it is
required to have separate allocation/free interfaces which can be invoked
from the regular irqdomain allocaton/free functions.

The mechanism for allocation is:
  - Allocate the next free MSI descriptor index in the domain
  - Store the hardware interrupt number and the trigger type
    which was extracted by the irqdomain core from the firmware spec
    in the MSI descriptor device cookie so it can be retrieved by
    the underlying interrupt domain and interrupt chip
  - Use the regular MSI allocation mechanism for the newly allocated
    index which returns a fully initialized Linux interrupt on succes

This works because:
  - the domains have a fixed size
  - each hardware interrupt is only allocated once
  - the underlying domain does not care about the MSI index it only cares
    about the hardware interrupt number and the trigger type

The free function looks up the MSI index in the MSI descriptor of the
provided Linux interrupt number and uses the regular index based free
functions of the MSI core.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 include/linux/irqdomain.h | 17 ++++++++++
 kernel/irq/msi.c          | 68 +++++++++++++++++++++++++++++++++++++++
 2 files changed, 85 insertions(+)

diff --git a/include/linux/irqdomain.h b/include/linux/irqdomain.h
index ee0a82c60508..21ecf582a0fe 100644
--- a/include/linux/irqdomain.h
+++ b/include/linux/irqdomain.h
@@ -619,6 +619,23 @@ static inline bool irq_domain_is_msi_device(struct irq_domain *domain)
 
 #endif	/* CONFIG_IRQ_DOMAIN_HIERARCHY */
 
+#ifdef CONFIG_GENERIC_MSI_IRQ
+int msi_device_domain_alloc_wired(struct irq_domain *domain, unsigned int hwirq,
+				  unsigned int type);
+void msi_device_domain_free_wired(struct irq_domain *domain, unsigned int virq);
+#else
+static inline int msi_device_domain_alloc_wired(struct irq_domain *domain, unsigned int hwirq,
+						unsigned int type)
+{
+	WARN_ON_ONCE(1);
+	return -EINVAL;
+}
+static inline void msi_device_domain_free_wired(struct irq_domain *domain, unsigned int virq)
+{
+	WARN_ON_ONCE(1);
+}
+#endif
+
 #else /* CONFIG_IRQ_DOMAIN */
 static inline void irq_dispose_mapping(unsigned int virq) { }
 static inline struct irq_domain *irq_find_matching_fwnode(
diff --git a/kernel/irq/msi.c b/kernel/irq/msi.c
index 5289fc2c7630..07e9daaf0657 100644
--- a/kernel/irq/msi.c
+++ b/kernel/irq/msi.c
@@ -1540,6 +1540,50 @@ struct msi_map msi_domain_alloc_irq_at(struct device *dev, unsigned int domid, u
 	return map;
 }
 
+/**
+ * msi_device_domain_alloc_wired - Allocate a "wired" interrupt on @domain
+ * @domain:	The domain to allocate on
+ * @hwirq:	The hardware interrupt number to allocate for
+ * @type:	The interrupt type
+ *
+ * This weirdness supports wire to MSI controllers like MBIGEN.
+ *
+ * @hwirq is the hardware interrupt number which is handed in from
+ * irq_create_fwspec_mapping(). As the wire to MSI domain is sparse, but
+ * sized in firmware, the hardware interrupt number cannot be used as MSI
+ * index. For the underlying irq chip the MSI index is irrelevant and
+ * all it needs is the hardware interrupt number.
+ *
+ * To handle this the MSI index is allocated with MSI_ANY_INDEX and the
+ * hardware interrupt number is stored along with the type information in
+ * msi_desc::cookie so the underlying interrupt chip and domain code can
+ * retrieve it.
+ *
+ * Return: The Linux interrupt number (> 0) or an error code
+ */
+int msi_device_domain_alloc_wired(struct irq_domain *domain, unsigned int hwirq,
+				  unsigned int type)
+{
+	unsigned int domid = MSI_DEFAULT_DOMAIN;
+	union msi_instance_cookie icookie = { };
+	struct device *dev = domain->dev;
+	struct msi_map map = { };
+
+	if (WARN_ON_ONCE(!dev || domain->bus_token != DOMAIN_BUS_WIRED_TO_MSI))
+		return -EINVAL;
+
+	icookie.value = ((u64)type << 32) | hwirq;
+
+	msi_lock_descs(dev);
+	if (WARN_ON_ONCE(msi_get_device_domain(dev, domid) != domain))
+		map.index = -EINVAL;
+	else
+		map = __msi_domain_alloc_irq_at(dev, domid, MSI_ANY_INDEX, NULL, &icookie);
+	msi_unlock_descs(dev);
+
+	return map.index >= 0 ? map.virq : map.index;
+}
+
 static void __msi_domain_free_irqs(struct device *dev, struct irq_domain *domain,
 				   struct msi_ctrl *ctrl)
 {
@@ -1665,6 +1709,30 @@ void msi_domain_free_irqs_all(struct device *dev, unsigned int domid)
 	msi_unlock_descs(dev);
 }
 
+/**
+ * msi_device_domain_free_wired - Free a wired interrupt in @domain
+ * @domain:	The domain to free the interrupt on
+ * @virq:	The Linux interrupt number to free
+ *
+ * This is the counterpart of msi_device_domain_alloc_wired() for the
+ * weird wired to MSI converting domains.
+ */
+void msi_device_domain_free_wired(struct irq_domain *domain, unsigned int virq)
+{
+	struct msi_desc *desc = irq_get_msi_desc(virq);
+	struct device *dev = domain->dev;
+
+	if (WARN_ON_ONCE(!dev || !desc || domain->bus_token != DOMAIN_BUS_WIRED_TO_MSI))
+		return;
+
+	msi_lock_descs(dev);
+	if (!WARN_ON_ONCE(msi_get_device_domain(dev, MSI_DEFAULT_DOMAIN) != domain)) {
+		msi_domain_free_irqs_range_locked(dev, MSI_DEFAULT_DOMAIN, desc->msi_index,
+						  desc->msi_index);
+	}
+	msi_unlock_descs(dev);
+}
+
 /**
  * msi_get_domain_info - Get the MSI interrupt domain info for @domain
  * @domain:	The interrupt domain to retrieve data from
-- 
2.34.1


WARNING: multiple messages have this Message-ID (diff)
From: Anup Patel <apatel@ventanamicro.com>
To: Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Frank Rowand <frowand.list@gmail.com>,
	Conor Dooley <conor+dt@kernel.org>
Cc: "Anup Patel" <apatel@ventanamicro.com>,
	devicetree@vger.kernel.org,
	"Saravana Kannan" <saravanak@google.com>,
	"Marc Zyngier" <maz@kernel.org>,
	"Anup Patel" <anup@brainfault.org>,
	linux-kernel@vger.kernel.org, "Björn Töpel" <bjorn@kernel.org>,
	"Atish Patra" <atishp@atishpatra.org>,
	linux-riscv@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org,
	"Andrew Jones" <ajones@ventanamicro.com>
Subject: [PATCH v12 11/25] genirq/msi: Provide allocation/free functions for "wired" MSI interrupts
Date: Sat, 27 Jan 2024 21:47:39 +0530	[thread overview]
Message-ID: <20240127161753.114685-12-apatel@ventanamicro.com> (raw)
In-Reply-To: <20240127161753.114685-1-apatel@ventanamicro.com>

From: Thomas Gleixner <tglx@linutronix.de>

To support wire to MSI bridges proper in the MSI core infrastructure it is
required to have separate allocation/free interfaces which can be invoked
from the regular irqdomain allocaton/free functions.

The mechanism for allocation is:
  - Allocate the next free MSI descriptor index in the domain
  - Store the hardware interrupt number and the trigger type
    which was extracted by the irqdomain core from the firmware spec
    in the MSI descriptor device cookie so it can be retrieved by
    the underlying interrupt domain and interrupt chip
  - Use the regular MSI allocation mechanism for the newly allocated
    index which returns a fully initialized Linux interrupt on succes

This works because:
  - the domains have a fixed size
  - each hardware interrupt is only allocated once
  - the underlying domain does not care about the MSI index it only cares
    about the hardware interrupt number and the trigger type

The free function looks up the MSI index in the MSI descriptor of the
provided Linux interrupt number and uses the regular index based free
functions of the MSI core.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 include/linux/irqdomain.h | 17 ++++++++++
 kernel/irq/msi.c          | 68 +++++++++++++++++++++++++++++++++++++++
 2 files changed, 85 insertions(+)

diff --git a/include/linux/irqdomain.h b/include/linux/irqdomain.h
index ee0a82c60508..21ecf582a0fe 100644
--- a/include/linux/irqdomain.h
+++ b/include/linux/irqdomain.h
@@ -619,6 +619,23 @@ static inline bool irq_domain_is_msi_device(struct irq_domain *domain)
 
 #endif	/* CONFIG_IRQ_DOMAIN_HIERARCHY */
 
+#ifdef CONFIG_GENERIC_MSI_IRQ
+int msi_device_domain_alloc_wired(struct irq_domain *domain, unsigned int hwirq,
+				  unsigned int type);
+void msi_device_domain_free_wired(struct irq_domain *domain, unsigned int virq);
+#else
+static inline int msi_device_domain_alloc_wired(struct irq_domain *domain, unsigned int hwirq,
+						unsigned int type)
+{
+	WARN_ON_ONCE(1);
+	return -EINVAL;
+}
+static inline void msi_device_domain_free_wired(struct irq_domain *domain, unsigned int virq)
+{
+	WARN_ON_ONCE(1);
+}
+#endif
+
 #else /* CONFIG_IRQ_DOMAIN */
 static inline void irq_dispose_mapping(unsigned int virq) { }
 static inline struct irq_domain *irq_find_matching_fwnode(
diff --git a/kernel/irq/msi.c b/kernel/irq/msi.c
index 5289fc2c7630..07e9daaf0657 100644
--- a/kernel/irq/msi.c
+++ b/kernel/irq/msi.c
@@ -1540,6 +1540,50 @@ struct msi_map msi_domain_alloc_irq_at(struct device *dev, unsigned int domid, u
 	return map;
 }
 
+/**
+ * msi_device_domain_alloc_wired - Allocate a "wired" interrupt on @domain
+ * @domain:	The domain to allocate on
+ * @hwirq:	The hardware interrupt number to allocate for
+ * @type:	The interrupt type
+ *
+ * This weirdness supports wire to MSI controllers like MBIGEN.
+ *
+ * @hwirq is the hardware interrupt number which is handed in from
+ * irq_create_fwspec_mapping(). As the wire to MSI domain is sparse, but
+ * sized in firmware, the hardware interrupt number cannot be used as MSI
+ * index. For the underlying irq chip the MSI index is irrelevant and
+ * all it needs is the hardware interrupt number.
+ *
+ * To handle this the MSI index is allocated with MSI_ANY_INDEX and the
+ * hardware interrupt number is stored along with the type information in
+ * msi_desc::cookie so the underlying interrupt chip and domain code can
+ * retrieve it.
+ *
+ * Return: The Linux interrupt number (> 0) or an error code
+ */
+int msi_device_domain_alloc_wired(struct irq_domain *domain, unsigned int hwirq,
+				  unsigned int type)
+{
+	unsigned int domid = MSI_DEFAULT_DOMAIN;
+	union msi_instance_cookie icookie = { };
+	struct device *dev = domain->dev;
+	struct msi_map map = { };
+
+	if (WARN_ON_ONCE(!dev || domain->bus_token != DOMAIN_BUS_WIRED_TO_MSI))
+		return -EINVAL;
+
+	icookie.value = ((u64)type << 32) | hwirq;
+
+	msi_lock_descs(dev);
+	if (WARN_ON_ONCE(msi_get_device_domain(dev, domid) != domain))
+		map.index = -EINVAL;
+	else
+		map = __msi_domain_alloc_irq_at(dev, domid, MSI_ANY_INDEX, NULL, &icookie);
+	msi_unlock_descs(dev);
+
+	return map.index >= 0 ? map.virq : map.index;
+}
+
 static void __msi_domain_free_irqs(struct device *dev, struct irq_domain *domain,
 				   struct msi_ctrl *ctrl)
 {
@@ -1665,6 +1709,30 @@ void msi_domain_free_irqs_all(struct device *dev, unsigned int domid)
 	msi_unlock_descs(dev);
 }
 
+/**
+ * msi_device_domain_free_wired - Free a wired interrupt in @domain
+ * @domain:	The domain to free the interrupt on
+ * @virq:	The Linux interrupt number to free
+ *
+ * This is the counterpart of msi_device_domain_alloc_wired() for the
+ * weird wired to MSI converting domains.
+ */
+void msi_device_domain_free_wired(struct irq_domain *domain, unsigned int virq)
+{
+	struct msi_desc *desc = irq_get_msi_desc(virq);
+	struct device *dev = domain->dev;
+
+	if (WARN_ON_ONCE(!dev || !desc || domain->bus_token != DOMAIN_BUS_WIRED_TO_MSI))
+		return;
+
+	msi_lock_descs(dev);
+	if (!WARN_ON_ONCE(msi_get_device_domain(dev, MSI_DEFAULT_DOMAIN) != domain)) {
+		msi_domain_free_irqs_range_locked(dev, MSI_DEFAULT_DOMAIN, desc->msi_index,
+						  desc->msi_index);
+	}
+	msi_unlock_descs(dev);
+}
+
 /**
  * msi_get_domain_info - Get the MSI interrupt domain info for @domain
  * @domain:	The interrupt domain to retrieve data from
-- 
2.34.1


_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

WARNING: multiple messages have this Message-ID (diff)
From: Anup Patel <apatel@ventanamicro.com>
To: Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Frank Rowand <frowand.list@gmail.com>,
	Conor Dooley <conor+dt@kernel.org>
Cc: "Marc Zyngier" <maz@kernel.org>, "Björn Töpel" <bjorn@kernel.org>,
	"Atish Patra" <atishp@atishpatra.org>,
	"Andrew Jones" <ajones@ventanamicro.com>,
	"Sunil V L" <sunilvl@ventanamicro.com>,
	"Saravana Kannan" <saravanak@google.com>,
	"Anup Patel" <anup@brainfault.org>,
	linux-riscv@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org,
	"Anup Patel" <apatel@ventanamicro.com>
Subject: [PATCH v12 11/25] genirq/msi: Provide allocation/free functions for "wired" MSI interrupts
Date: Sat, 27 Jan 2024 21:47:39 +0530	[thread overview]
Message-ID: <20240127161753.114685-12-apatel@ventanamicro.com> (raw)
In-Reply-To: <20240127161753.114685-1-apatel@ventanamicro.com>

From: Thomas Gleixner <tglx@linutronix.de>

To support wire to MSI bridges proper in the MSI core infrastructure it is
required to have separate allocation/free interfaces which can be invoked
from the regular irqdomain allocaton/free functions.

The mechanism for allocation is:
  - Allocate the next free MSI descriptor index in the domain
  - Store the hardware interrupt number and the trigger type
    which was extracted by the irqdomain core from the firmware spec
    in the MSI descriptor device cookie so it can be retrieved by
    the underlying interrupt domain and interrupt chip
  - Use the regular MSI allocation mechanism for the newly allocated
    index which returns a fully initialized Linux interrupt on succes

This works because:
  - the domains have a fixed size
  - each hardware interrupt is only allocated once
  - the underlying domain does not care about the MSI index it only cares
    about the hardware interrupt number and the trigger type

The free function looks up the MSI index in the MSI descriptor of the
provided Linux interrupt number and uses the regular index based free
functions of the MSI core.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
---
 include/linux/irqdomain.h | 17 ++++++++++
 kernel/irq/msi.c          | 68 +++++++++++++++++++++++++++++++++++++++
 2 files changed, 85 insertions(+)

diff --git a/include/linux/irqdomain.h b/include/linux/irqdomain.h
index ee0a82c60508..21ecf582a0fe 100644
--- a/include/linux/irqdomain.h
+++ b/include/linux/irqdomain.h
@@ -619,6 +619,23 @@ static inline bool irq_domain_is_msi_device(struct irq_domain *domain)
 
 #endif	/* CONFIG_IRQ_DOMAIN_HIERARCHY */
 
+#ifdef CONFIG_GENERIC_MSI_IRQ
+int msi_device_domain_alloc_wired(struct irq_domain *domain, unsigned int hwirq,
+				  unsigned int type);
+void msi_device_domain_free_wired(struct irq_domain *domain, unsigned int virq);
+#else
+static inline int msi_device_domain_alloc_wired(struct irq_domain *domain, unsigned int hwirq,
+						unsigned int type)
+{
+	WARN_ON_ONCE(1);
+	return -EINVAL;
+}
+static inline void msi_device_domain_free_wired(struct irq_domain *domain, unsigned int virq)
+{
+	WARN_ON_ONCE(1);
+}
+#endif
+
 #else /* CONFIG_IRQ_DOMAIN */
 static inline void irq_dispose_mapping(unsigned int virq) { }
 static inline struct irq_domain *irq_find_matching_fwnode(
diff --git a/kernel/irq/msi.c b/kernel/irq/msi.c
index 5289fc2c7630..07e9daaf0657 100644
--- a/kernel/irq/msi.c
+++ b/kernel/irq/msi.c
@@ -1540,6 +1540,50 @@ struct msi_map msi_domain_alloc_irq_at(struct device *dev, unsigned int domid, u
 	return map;
 }
 
+/**
+ * msi_device_domain_alloc_wired - Allocate a "wired" interrupt on @domain
+ * @domain:	The domain to allocate on
+ * @hwirq:	The hardware interrupt number to allocate for
+ * @type:	The interrupt type
+ *
+ * This weirdness supports wire to MSI controllers like MBIGEN.
+ *
+ * @hwirq is the hardware interrupt number which is handed in from
+ * irq_create_fwspec_mapping(). As the wire to MSI domain is sparse, but
+ * sized in firmware, the hardware interrupt number cannot be used as MSI
+ * index. For the underlying irq chip the MSI index is irrelevant and
+ * all it needs is the hardware interrupt number.
+ *
+ * To handle this the MSI index is allocated with MSI_ANY_INDEX and the
+ * hardware interrupt number is stored along with the type information in
+ * msi_desc::cookie so the underlying interrupt chip and domain code can
+ * retrieve it.
+ *
+ * Return: The Linux interrupt number (> 0) or an error code
+ */
+int msi_device_domain_alloc_wired(struct irq_domain *domain, unsigned int hwirq,
+				  unsigned int type)
+{
+	unsigned int domid = MSI_DEFAULT_DOMAIN;
+	union msi_instance_cookie icookie = { };
+	struct device *dev = domain->dev;
+	struct msi_map map = { };
+
+	if (WARN_ON_ONCE(!dev || domain->bus_token != DOMAIN_BUS_WIRED_TO_MSI))
+		return -EINVAL;
+
+	icookie.value = ((u64)type << 32) | hwirq;
+
+	msi_lock_descs(dev);
+	if (WARN_ON_ONCE(msi_get_device_domain(dev, domid) != domain))
+		map.index = -EINVAL;
+	else
+		map = __msi_domain_alloc_irq_at(dev, domid, MSI_ANY_INDEX, NULL, &icookie);
+	msi_unlock_descs(dev);
+
+	return map.index >= 0 ? map.virq : map.index;
+}
+
 static void __msi_domain_free_irqs(struct device *dev, struct irq_domain *domain,
 				   struct msi_ctrl *ctrl)
 {
@@ -1665,6 +1709,30 @@ void msi_domain_free_irqs_all(struct device *dev, unsigned int domid)
 	msi_unlock_descs(dev);
 }
 
+/**
+ * msi_device_domain_free_wired - Free a wired interrupt in @domain
+ * @domain:	The domain to free the interrupt on
+ * @virq:	The Linux interrupt number to free
+ *
+ * This is the counterpart of msi_device_domain_alloc_wired() for the
+ * weird wired to MSI converting domains.
+ */
+void msi_device_domain_free_wired(struct irq_domain *domain, unsigned int virq)
+{
+	struct msi_desc *desc = irq_get_msi_desc(virq);
+	struct device *dev = domain->dev;
+
+	if (WARN_ON_ONCE(!dev || !desc || domain->bus_token != DOMAIN_BUS_WIRED_TO_MSI))
+		return;
+
+	msi_lock_descs(dev);
+	if (!WARN_ON_ONCE(msi_get_device_domain(dev, MSI_DEFAULT_DOMAIN) != domain)) {
+		msi_domain_free_irqs_range_locked(dev, MSI_DEFAULT_DOMAIN, desc->msi_index,
+						  desc->msi_index);
+	}
+	msi_unlock_descs(dev);
+}
+
 /**
  * msi_get_domain_info - Get the MSI interrupt domain info for @domain
  * @domain:	The interrupt domain to retrieve data from
-- 
2.34.1


_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2024-01-27 16:19 UTC|newest]

Thread overview: 277+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-01-27 16:17 [PATCH v12 00/25] Linux RISC-V AIA Support Anup Patel
2024-01-27 16:17 ` Anup Patel
2024-01-27 16:17 ` Anup Patel
2024-01-27 16:17 ` [PATCH v12 01/25] irqchip/gic-v3: Make gic_irq_domain_select() robust for zero parameter count Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-02-15 11:47   ` Marc Zyngier
2024-02-15 11:47     ` Marc Zyngier
2024-02-15 11:47     ` Marc Zyngier
2024-02-15 19:57   ` [tip: irq/msi] " tip-bot2 for Thomas Gleixner
2024-01-27 16:17 ` [PATCH v12 02/25] genirq/irqdomain: Remove the param count restriction from select() Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-02-15 19:57   ` [tip: irq/msi] " tip-bot2 for Thomas Gleixner
2024-02-19 15:50     ` Biju Das
2024-02-19 15:56   ` Marc Zyngier
2024-02-19 16:39     ` Biju Das
2024-02-19 17:39       ` Biju Das
2024-02-20  8:50     ` Thomas Gleixner
2024-02-20 16:33       ` [tip: irq/msi] irqchip/imx-intmux: Handle pure domain searches correctly tip-bot2 for Thomas Gleixner
2024-02-22 13:01   ` [PATCH v12 02/25] genirq/irqdomain: Remove the param count restriction from select() Aishwarya TCV
2024-02-22 13:01     ` Aishwarya TCV
2024-02-22 13:01     ` Aishwarya TCV
2024-02-22 16:28     ` Marc Zyngier
2024-02-22 16:28       ` Marc Zyngier
2024-02-22 16:28       ` Marc Zyngier
2024-02-22 22:59       ` Aishwarya TCV
2024-02-22 22:59         ` Aishwarya TCV
2024-02-22 22:59         ` Aishwarya TCV
     [not found]   ` <CGME20240223102258eucas1p119f38e40f769c883c0a502e9e26be888@eucas1p1.samsung.com>
2024-02-23 10:22     ` Marek Szyprowski
2024-02-23 10:22       ` Marek Szyprowski
2024-02-23 10:22       ` Marek Szyprowski
2024-02-23 10:45       ` Biju Das
2024-02-23 10:45         ` Biju Das
2024-02-23 10:45         ` Biju Das
2024-02-23 10:56         ` Marek Szyprowski
2024-02-23 10:56           ` Marek Szyprowski
2024-02-23 10:56           ` Marek Szyprowski
2024-02-23 11:01           ` Biju Das
2024-02-23 11:01             ` Biju Das
2024-02-23 11:01             ` Biju Das
2024-01-27 16:17 ` [PATCH v12 03/25] genirq/msi: Extend msi_parent_ops Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-02-15 19:57   ` [tip: irq/msi] " tip-bot2 for Thomas Gleixner
2024-01-27 16:17 ` [PATCH v12 04/25] genirq/irqdomain: Add DOMAIN_BUS_DEVICE_IMS Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-02-15 11:54   ` Marc Zyngier
2024-02-15 11:54     ` Marc Zyngier
2024-02-15 11:54     ` Marc Zyngier
2024-02-15 15:01     ` Thomas Gleixner
2024-02-15 15:01       ` Thomas Gleixner
2024-02-15 15:01       ` Thomas Gleixner
2024-02-15 19:57   ` [tip: irq/msi] genirq/irqdomain: Add DOMAIN_BUS_DEVICE_MSI tip-bot2 for Thomas Gleixner
2024-01-27 16:17 ` [PATCH v12 05/25] platform-msi: Prepare for real per device domains Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-02-15 19:57   ` [tip: irq/msi] " tip-bot2 for Thomas Gleixner
2024-01-27 16:17 ` [PATCH v12 06/25] irqchip: Convert all platform MSI users to the new API Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-02-15 19:57   ` [tip: irq/msi] " tip-bot2 for Thomas Gleixner
2024-01-27 16:17 ` [PATCH v12 07/25] genirq/msi: Provide optional translation op Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-02-15 19:57   ` [tip: irq/msi] " tip-bot2 for Thomas Gleixner
2024-01-27 16:17 ` [PATCH v12 08/25] genirq/msi: Split msi_domain_alloc_irq_at() Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-02-15 19:56   ` [tip: irq/msi] " tip-bot2 for Thomas Gleixner
2024-01-27 16:17 ` [PATCH v12 09/25] genirq/msi: Provide DOMAIN_BUS_WIRED_TO_MSI Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-02-15 19:56   ` [tip: irq/msi] " tip-bot2 for Thomas Gleixner
2024-01-27 16:17 ` [PATCH v12 10/25] genirq/msi: Optionally use dev->fwnode for device domain Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-02-15 19:56   ` [tip: irq/msi] " tip-bot2 for Thomas Gleixner
2024-01-27 16:17 ` Anup Patel [this message]
2024-01-27 16:17   ` [PATCH v12 11/25] genirq/msi: Provide allocation/free functions for "wired" MSI interrupts Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-02-15 19:56   ` [tip: irq/msi] " tip-bot2 for Thomas Gleixner
2024-01-27 16:17 ` [PATCH v12 12/25] genirq/irqdomain: Reroute device MSI create_mapping Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-02-15 19:56   ` [tip: irq/msi] " tip-bot2 for Thomas Gleixner
2024-01-27 16:17 ` [PATCH v12 13/25] genirq/msi: Provide MSI_FLAG_PARENT_PM_DEV Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-02-15 19:56   ` [tip: irq/msi] " tip-bot2 for Thomas Gleixner
2024-01-27 16:17 ` [PATCH v12 14/25] irqchip/sifive-plic: Convert PLIC driver into a platform driver Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-02-16 15:33   ` Thomas Gleixner
2024-02-16 15:33     ` Thomas Gleixner
2024-02-16 15:33     ` Thomas Gleixner
2024-02-16 17:11     ` Anup Patel
2024-02-16 17:11       ` Anup Patel
2024-02-16 17:11       ` Anup Patel
2024-02-16 20:22       ` Thomas Gleixner
2024-02-16 20:22         ` Thomas Gleixner
2024-02-16 20:22         ` Thomas Gleixner
2024-02-17  5:42         ` Anup Patel
2024-02-17  5:42           ` Anup Patel
2024-02-17  5:42           ` Anup Patel
2024-01-27 16:17 ` [PATCH v12 15/25] irqchip/riscv-intc: Add support for RISC-V AIA Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17 ` [PATCH v12 16/25] dt-bindings: interrupt-controller: Add RISC-V incoming MSI controller Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17 ` [PATCH v12 17/25] genirq/matrix: Dynamic bitmap allocation Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17 ` [PATCH v12 18/25] irqchip: Add RISC-V incoming MSI controller early driver Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-02-07  9:43   ` Björn Töpel
2024-02-07  9:43     ` Björn Töpel
2024-02-07  9:43     ` Björn Töpel
2024-02-16 18:40   ` Thomas Gleixner
2024-02-16 18:40     ` Thomas Gleixner
2024-02-16 18:40     ` Thomas Gleixner
2024-02-18 13:16     ` Anup Patel
2024-02-18 13:16       ` Anup Patel
2024-02-18 13:16       ` Anup Patel
2024-01-27 16:17 ` [PATCH v12 19/25] irqchip/riscv-imsic: Add device MSI domain support for platform devices Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-02-06 15:36   ` Björn Töpel
2024-02-06 15:36     ` Björn Töpel
2024-02-06 15:36     ` Björn Töpel
2024-02-16 20:12   ` Thomas Gleixner
2024-02-16 20:12     ` Thomas Gleixner
2024-02-16 20:12     ` Thomas Gleixner
2024-02-19  4:10     ` Anup Patel
2024-02-19  4:10       ` Anup Patel
2024-02-19  4:10       ` Anup Patel
2024-01-27 16:17 ` [PATCH v12 20/25] irqchip/riscv-imsic: Add device MSI domain support for PCI devices Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-02-16 20:14   ` Thomas Gleixner
2024-02-16 20:14     ` Thomas Gleixner
2024-02-16 20:14     ` Thomas Gleixner
2024-02-19  4:41     ` Anup Patel
2024-02-19  4:41       ` Anup Patel
2024-02-19  4:41       ` Anup Patel
2024-01-27 16:17 ` [PATCH v12 21/25] dt-bindings: interrupt-controller: Add RISC-V advanced PLIC Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17 ` [PATCH v12 22/25] irqchip: Add RISC-V advanced PLIC driver for direct-mode Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-02-01  6:39   ` Andy Chiu
2024-02-01  6:39     ` Andy Chiu
2024-02-01  6:39     ` Andy Chiu
2024-02-19 10:28     ` Anup Patel
2024-02-19 10:28       ` Anup Patel
2024-02-19 10:28       ` Anup Patel
2024-02-02  9:29   ` Clément Léger
2024-02-02  9:29     ` Clément Léger
2024-02-02  9:29     ` Clément Léger
2024-02-02 10:30     ` Anup Patel
2024-02-02 10:30       ` Anup Patel
2024-02-02 10:30       ` Anup Patel
2024-02-02 10:33       ` Clément Léger
2024-02-02 10:33         ` Clément Léger
2024-02-02 10:33         ` Clément Léger
2024-02-16 20:50   ` Thomas Gleixner
2024-02-16 20:50     ` Thomas Gleixner
2024-02-16 20:50     ` Thomas Gleixner
2024-02-19  9:35     ` Anup Patel
2024-02-19  9:35       ` Anup Patel
2024-02-19  9:35       ` Anup Patel
2024-01-27 16:17 ` [PATCH v12 23/25] irqchip/riscv-aplic: Add support for MSI-mode Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-02-16 21:04   ` Thomas Gleixner
2024-02-16 21:04     ` Thomas Gleixner
2024-02-16 21:04     ` Thomas Gleixner
2024-02-19  9:45     ` Anup Patel
2024-02-19  9:45       ` Anup Patel
2024-02-19  9:45       ` Anup Patel
2024-01-27 16:17 ` [PATCH v12 24/25] RISC-V: Select APLIC and IMSIC drivers Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17 ` [PATCH v12 25/25] MAINTAINERS: Add entry for RISC-V AIA drivers Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:17   ` Anup Patel
2024-01-27 16:20 ` [PATCH v12 00/25] Linux RISC-V AIA Support Anup Patel
2024-01-27 16:20   ` Anup Patel
2024-01-27 16:20   ` Anup Patel
2024-02-14 19:54   ` Thomas Gleixner
2024-02-14 19:54     ` Thomas Gleixner
2024-02-14 19:54     ` Thomas Gleixner
2024-02-15  5:48     ` Anup Patel
2024-02-15  5:48       ` Anup Patel
2024-02-15  5:48       ` Anup Patel
2024-02-15 19:59       ` Thomas Gleixner
2024-02-15 19:59         ` Thomas Gleixner
2024-02-15 19:59         ` Thomas Gleixner
2024-02-16 21:05         ` Thomas Gleixner
2024-02-16 21:05           ` Thomas Gleixner
2024-02-16 21:05           ` Thomas Gleixner
2024-02-20  6:12           ` Anup Patel
2024-02-20  6:12             ` Anup Patel
2024-02-20  6:12             ` Anup Patel
2024-02-15 11:57     ` Marc Zyngier
2024-02-15 11:57       ` Marc Zyngier
2024-02-15 11:57       ` Marc Zyngier
2024-01-30  7:16 ` Björn Töpel
2024-01-30  7:16   ` Björn Töpel
2024-01-30  7:16   ` Björn Töpel
2024-01-30  7:52   ` Björn Töpel
2024-01-30  7:52     ` Björn Töpel
2024-01-30  7:52     ` Björn Töpel
2024-01-30 10:02     ` Anup Patel
2024-01-30 10:02       ` Anup Patel
2024-01-30 10:02       ` Anup Patel
2024-01-30 11:05       ` Björn Töpel
2024-01-30 11:05         ` Björn Töpel
2024-01-30 11:05         ` Björn Töpel
2024-01-30 10:23     ` Anup Patel
2024-01-30 10:23       ` Anup Patel
2024-01-30 10:23       ` Anup Patel
2024-01-30 11:46       ` Björn Töpel
2024-01-30 11:46         ` Björn Töpel
2024-01-30 11:46         ` Björn Töpel
2024-01-30 14:48         ` Björn Töpel
2024-01-30 14:48           ` Björn Töpel
2024-01-30 14:48           ` Björn Töpel
2024-01-30 15:19           ` Anup Patel
2024-01-30 15:19             ` Anup Patel
2024-01-30 15:19             ` Anup Patel
2024-01-30 15:48           ` Anup Patel
2024-01-30 15:48             ` Anup Patel
2024-01-30 15:48             ` Anup Patel
2024-01-30 17:49             ` Björn Töpel
2024-01-30 17:49               ` Björn Töpel
2024-01-30 17:49               ` Björn Töpel
2024-02-01 15:07               ` Anup Patel
2024-02-01 15:07                 ` Anup Patel
2024-02-01 15:07                 ` Anup Patel
2024-02-01 18:45                 ` Björn Töpel
2024-02-01 18:45                   ` Björn Töpel
2024-02-01 18:45                   ` Björn Töpel
2024-02-06 15:39 ` Björn Töpel
2024-02-06 15:39   ` Björn Töpel
2024-02-06 15:39   ` Björn Töpel
2024-02-06 17:39   ` Anup Patel
2024-02-06 17:39     ` Anup Patel
2024-02-06 17:39     ` Anup Patel
2024-02-07  7:27     ` Björn Töpel
2024-02-07  7:27       ` Björn Töpel
2024-02-07  7:27       ` Björn Töpel
2024-02-07  9:18       ` Anup Patel
2024-02-07  9:18         ` Anup Patel
2024-02-07  9:18         ` Anup Patel
2024-02-07  9:37         ` Björn Töpel
2024-02-07  9:37           ` Björn Töpel
2024-02-07  9:37           ` Björn Töpel
2024-02-07 12:55           ` Björn Töpel
2024-02-07 12:55             ` Björn Töpel
2024-02-07 12:55             ` Björn Töpel
2024-02-07 13:08             ` Anup Patel
2024-02-07 13:08               ` Anup Patel
2024-02-07 13:08               ` Anup Patel
2024-02-07 13:10             ` Anup Patel
2024-02-07 13:10               ` Anup Patel
2024-02-07 13:10               ` Anup Patel
2024-02-08 10:10 ` Andrea Parri
2024-02-08 10:10   ` Andrea Parri
2024-02-08 10:10   ` Andrea Parri
2024-02-16 11:33   ` Anup Patel
2024-02-16 11:33     ` Anup Patel
2024-02-16 11:33     ` Anup Patel

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