* [PATCH 0/2] sh_eth: couple of software reset bit cleanups
@ 2016-05-07 21:06 Sergei Shtylyov
2016-05-07 21:08 ` [PATCH 1/2] sh_eth: call sh_eth_tsu_write() from sh_eth_chip_reset_giga() Sergei Shtylyov
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Sergei Shtylyov @ 2016-05-07 21:06 UTC (permalink / raw)
To: netdev; +Cc: linux-renesas-soc
Hello.
Here's a set of 2 patches against DaveM's 'net-next.git' repo. We can save
on the repetitive chip reset code...
[1/2] sh_eth: call sh_eth_tsu_write() from sh_eth_chip_reset_giga()
[2/2] sh_eth: reuse sh_eth_chip_reset()
MBR, Sergei
^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH 1/2] sh_eth: call sh_eth_tsu_write() from sh_eth_chip_reset_giga()
2016-05-07 21:06 [PATCH 0/2] sh_eth: couple of software reset bit cleanups Sergei Shtylyov
@ 2016-05-07 21:08 ` Sergei Shtylyov
2016-05-07 21:09 ` [PATCH 2/2] sh_eth: reuse sh_eth_chip_reset() Sergei Shtylyov
2016-05-09 4:15 ` [PATCH 0/2] sh_eth: couple of software reset bit cleanups David Miller
2 siblings, 0 replies; 4+ messages in thread
From: Sergei Shtylyov @ 2016-05-07 21:08 UTC (permalink / raw)
To: netdev; +Cc: linux-renesas-soc
sh_eth_chip_reset_giga() doesn't really need to use direct iowrite32() when
writing to the ARSTR register, it can use sh_eth_tsu_write() as all other
chip_reset() methods.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
---
drivers/net/ethernet/renesas/sh_eth.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
Index: net-next/drivers/net/ethernet/renesas/sh_eth.c
===================================================================
--- net-next.orig/drivers/net/ethernet/renesas/sh_eth.c
+++ net-next/drivers/net/ethernet/renesas/sh_eth.c
@@ -725,8 +725,9 @@ static struct sh_eth_cpu_data sh7757_dat
#define GIGA_MAHR(port) (SH_GIGA_ETH_BASE + 0x800 * (port) + 0x05c0)
static void sh_eth_chip_reset_giga(struct net_device *ndev)
{
- int i;
+ struct sh_eth_private *mdp = netdev_priv(ndev);
u32 mahr[2], malr[2];
+ int i;
/* save MAHR and MALR */
for (i = 0; i < 2; i++) {
@@ -735,7 +736,7 @@ static void sh_eth_chip_reset_giga(struc
}
/* reset device */
- iowrite32(ARSTR_ARST, (void *)(SH_GIGA_ETH_BASE + 0x1800));
+ sh_eth_tsu_write(mdp, ARSTR_ARST, ARSTR);
mdelay(1);
/* restore MAHR and MALR */
^ permalink raw reply [flat|nested] 4+ messages in thread
* [PATCH 2/2] sh_eth: reuse sh_eth_chip_reset()
2016-05-07 21:06 [PATCH 0/2] sh_eth: couple of software reset bit cleanups Sergei Shtylyov
2016-05-07 21:08 ` [PATCH 1/2] sh_eth: call sh_eth_tsu_write() from sh_eth_chip_reset_giga() Sergei Shtylyov
@ 2016-05-07 21:09 ` Sergei Shtylyov
2016-05-09 4:15 ` [PATCH 0/2] sh_eth: couple of software reset bit cleanups David Miller
2 siblings, 0 replies; 4+ messages in thread
From: Sergei Shtylyov @ 2016-05-07 21:09 UTC (permalink / raw)
To: netdev; +Cc: linux-renesas-soc
All the chip_reset() methods repeat the code writing to the ARSTR register
and delaying for 1 ms, so that we can reuse sh_eth_chip_reset() twice.
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
---
drivers/net/ethernet/renesas/sh_eth.c | 11 ++---------
1 file changed, 2 insertions(+), 9 deletions(-)
Index: net-next/drivers/net/ethernet/renesas/sh_eth.c
===================================================================
--- net-next.orig/drivers/net/ethernet/renesas/sh_eth.c
+++ net-next/drivers/net/ethernet/renesas/sh_eth.c
@@ -537,11 +537,7 @@ static struct sh_eth_cpu_data r7s72100_d
static void sh_eth_chip_reset_r8a7740(struct net_device *ndev)
{
- struct sh_eth_private *mdp = netdev_priv(ndev);
-
- /* reset device */
- sh_eth_tsu_write(mdp, ARSTR_ARST, ARSTR);
- mdelay(1);
+ sh_eth_chip_reset(ndev);
sh_eth_select_mii(ndev);
}
@@ -725,7 +721,6 @@ static struct sh_eth_cpu_data sh7757_dat
#define GIGA_MAHR(port) (SH_GIGA_ETH_BASE + 0x800 * (port) + 0x05c0)
static void sh_eth_chip_reset_giga(struct net_device *ndev)
{
- struct sh_eth_private *mdp = netdev_priv(ndev);
u32 mahr[2], malr[2];
int i;
@@ -735,9 +730,7 @@ static void sh_eth_chip_reset_giga(struc
mahr[i] = ioread32((void *)GIGA_MAHR(i));
}
- /* reset device */
- sh_eth_tsu_write(mdp, ARSTR_ARST, ARSTR);
- mdelay(1);
+ sh_eth_chip_reset(ndev);
/* restore MAHR and MALR */
for (i = 0; i < 2; i++) {
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH 0/2] sh_eth: couple of software reset bit cleanups
2016-05-07 21:06 [PATCH 0/2] sh_eth: couple of software reset bit cleanups Sergei Shtylyov
2016-05-07 21:08 ` [PATCH 1/2] sh_eth: call sh_eth_tsu_write() from sh_eth_chip_reset_giga() Sergei Shtylyov
2016-05-07 21:09 ` [PATCH 2/2] sh_eth: reuse sh_eth_chip_reset() Sergei Shtylyov
@ 2016-05-09 4:15 ` David Miller
2 siblings, 0 replies; 4+ messages in thread
From: David Miller @ 2016-05-09 4:15 UTC (permalink / raw)
To: sergei.shtylyov; +Cc: netdev, linux-renesas-soc
From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Date: Sun, 08 May 2016 00:06:53 +0300
> Here's a set of 2 patches against DaveM's 'net-next.git' repo. We can save
> on the repetitive chip reset code...
>
> [1/2] sh_eth: call sh_eth_tsu_write() from sh_eth_chip_reset_giga()
> [2/2] sh_eth: reuse sh_eth_chip_reset()
Series applied, thanks.
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2016-05-09 4:15 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
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2016-05-07 21:06 [PATCH 0/2] sh_eth: couple of software reset bit cleanups Sergei Shtylyov
2016-05-07 21:08 ` [PATCH 1/2] sh_eth: call sh_eth_tsu_write() from sh_eth_chip_reset_giga() Sergei Shtylyov
2016-05-07 21:09 ` [PATCH 2/2] sh_eth: reuse sh_eth_chip_reset() Sergei Shtylyov
2016-05-09 4:15 ` [PATCH 0/2] sh_eth: couple of software reset bit cleanups David Miller
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