[U-Boot] [PATCH 0/5] STM32: Clean unused and factorize .h files in arch-stm32

[U-Boot] [PATCH 0/5] STM32: Clean unused and factorize .h files in arch-stm32

[patrice.chotard at st.com]

From: Patrice Chotard <patrice.chotard@st.com>

Removes unused .h files in arch/arm/include/asm/arch-stm32xx 
Factorize and clean some .h files to avoid to duplicate defines in 
separate .h files

Patrice Chotard (5):
  arch-stm32f4: Remove fmc.h file
  arch-stm32: Move gpio.h for STM32 SoCs in include/asm/
  arch-stm32: Factorize stm32.h for STM32F4 and F7
  arch-stm32: Remove stm32_periph.h
  arch-stm32: Clean arch-stm32f7/syscfg.h

 arch/arm/include/asm/arch-stm32f4/fmc.h          |  75 ------------
 arch/arm/include/asm/arch-stm32f4/gpio.h         | 146 +----------------------
 arch/arm/include/asm/arch-stm32f4/stm32.h        |  14 +--
 arch/arm/include/asm/arch-stm32f4/stm32_periph.h |  38 ------
 arch/arm/include/asm/arch-stm32f7/gpio.h         | 116 +-----------------
 arch/arm/include/asm/arch-stm32f7/stm32.h        |  45 +------
 arch/arm/include/asm/arch-stm32f7/stm32_periph.h |  23 ----
 arch/arm/include/asm/arch-stm32f7/syscfg.h       |   9 --
 arch/arm/include/asm/arch-stm32h7/gpio.h         | 115 +-----------------
 arch/arm/include/asm/stm32_gpio.h                | 115 ++++++++++++++++++
 arch/arm/include/asm/stm32f.h                    |  22 ++++
 board/st/stm32f746-disco/stm32f746-disco.c       |   1 -
 drivers/mtd/stm32_flash.c                        |   2 +-
 13 files changed, 144 insertions(+), 577 deletions(-)
 delete mode 100644 arch/arm/include/asm/arch-stm32f4/fmc.h
 delete mode 100644 arch/arm/include/asm/arch-stm32f4/stm32_periph.h
 delete mode 100644 arch/arm/include/asm/arch-stm32f7/stm32_periph.h
 create mode 100644 arch/arm/include/asm/stm32_gpio.h
 create mode 100644 arch/arm/include/asm/stm32f.h

-- 
1.9.1

[U-Boot] [PATCH 1/5] arch-stm32f4: Remove fmc.h file

[patrice.chotard at st.com]

From: Patrice Chotard <patrice.chotard@st.com>

fmc.h file is no more used, remove it.
All FMC related defines are declared in drivers/ram/stm32_sdram.c
which is common to all STM32 SoCs.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
---
 arch/arm/include/asm/arch-stm32f4/fmc.h | 75 ---------------------------------
 1 file changed, 75 deletions(-)
 delete mode 100644 arch/arm/include/asm/arch-stm32f4/fmc.h

diff --git a/arch/arm/include/asm/arch-stm32f4/fmc.h b/arch/arm/include/asm/arch-stm32f4/fmc.h
deleted file mode 100644
index 7dd5077d0c34..000000000000
--- a/arch/arm/include/asm/arch-stm32f4/fmc.h
+++ /dev/null
@@ -1,75 +0,0 @@
-/*
- * (C) Copyright 2013
- * Pavel Boldin, Emcraft Systems, paboldin at emcraft.com
- *
- * (C) Copyright 2015
- * Kamil Lulko, <kamil.lulko@gmail.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef _MACH_FMC_H_
-#define _MACH_FMC_H_
-
-struct stm32_fmc_regs {
-	u32 sdcr1;	/* Control register 1 */
-	u32 sdcr2;	/* Control register 2 */
-	u32 sdtr1;	/* Timing register 1 */
-	u32 sdtr2;	/* Timing register 2 */
-	u32 sdcmr;	/* Mode register */
-	u32 sdrtr;	/* Refresh timing register */
-	u32 sdsr;	/* Status register */
-};
-
-/*
- * FMC registers base
- */
-#define STM32_SDRAM_FMC_BASE	0xA0000140
-#define STM32_SDRAM_FMC		((struct stm32_fmc_regs *)STM32_SDRAM_FMC_BASE)
-
-/* Control register SDCR */
-#define FMC_SDCR_RPIPE_SHIFT	13	/* RPIPE bit shift */
-#define FMC_SDCR_RBURST_SHIFT	12	/* RBURST bit shift */
-#define FMC_SDCR_SDCLK_SHIFT	10	/* SDRAM clock divisor shift */
-#define FMC_SDCR_WP_SHIFT	9	/* Write protection shift */
-#define FMC_SDCR_CAS_SHIFT	7	/* CAS latency shift */
-#define FMC_SDCR_NB_SHIFT	6	/* Number of banks shift */
-#define FMC_SDCR_MWID_SHIFT	4	/* Memory width shift */
-#define FMC_SDCR_NR_SHIFT	2	/* Number of row address bits shift */
-#define FMC_SDCR_NC_SHIFT	0	/* Number of col address bits shift */
-
-/* Timings register SDTR */
-#define FMC_SDTR_TMRD_SHIFT	0	/* Load mode register to active */
-#define FMC_SDTR_TXSR_SHIFT	4	/* Exit self-refresh time */
-#define FMC_SDTR_TRAS_SHIFT	8	/* Self-refresh time */
-#define FMC_SDTR_TRC_SHIFT	12	/* Row cycle delay */
-#define FMC_SDTR_TWR_SHIFT	16	/* Recovery delay */
-#define FMC_SDTR_TRP_SHIFT	20	/* Row precharge delay */
-#define FMC_SDTR_TRCD_SHIFT	24	/* Row-to-column delay */
-
-
-#define FMC_SDCMR_NRFS_SHIFT	5
-
-#define FMC_SDCMR_MODE_NORMAL		0
-#define FMC_SDCMR_MODE_START_CLOCK	1
-#define FMC_SDCMR_MODE_PRECHARGE	2
-#define FMC_SDCMR_MODE_AUTOREFRESH	3
-#define FMC_SDCMR_MODE_WRITE_MODE	4
-#define FMC_SDCMR_MODE_SELFREFRESH	5
-#define FMC_SDCMR_MODE_POWERDOWN	6
-
-#define FMC_SDCMR_BANK_1		(1 << 4)
-#define FMC_SDCMR_BANK_2		(1 << 3)
-
-#define FMC_SDCMR_MODE_REGISTER_SHIFT	9
-
-#define FMC_SDSR_BUSY			(1 << 5)
-
-#define FMC_BUSY_WAIT()		do { \
-		__asm__ __volatile__ ("dsb" : : : "memory"); \
-		while (STM32_SDRAM_FMC->sdsr & FMC_SDSR_BUSY) \
-			; \
-	} while (0)
-
-
-#endif /* _MACH_FMC_H_ */
-- 
1.9.1

[U-Boot] [PATCH 2/5] arch-stm32: Move gpio.h for STM32 SoCs in include/asm/

[patrice.chotard at st.com]

From: Patrice Chotard <patrice.chotard@st.com>

Instead to have 3 identical gpio.h for all STM32 SoCs,
migrate them in one file in include/asm.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
---
 arch/arm/include/asm/arch-stm32f4/gpio.h | 146 +------------------------------
 arch/arm/include/asm/arch-stm32f7/gpio.h | 116 +-----------------------
 arch/arm/include/asm/arch-stm32h7/gpio.h | 115 +-----------------------
 arch/arm/include/asm/stm32_gpio.h        | 115 ++++++++++++++++++++++++
 4 files changed, 118 insertions(+), 374 deletions(-)
 create mode 100644 arch/arm/include/asm/stm32_gpio.h

diff --git a/arch/arm/include/asm/arch-stm32f4/gpio.h b/arch/arm/include/asm/arch-stm32f4/gpio.h
index 6173fa130000..bb4427e6f4ac 100644
--- a/arch/arm/include/asm/arch-stm32f4/gpio.h
+++ b/arch/arm/include/asm/arch-stm32f4/gpio.h
@@ -11,150 +11,6 @@
 #ifndef _STM32_GPIO_H_
 #define _STM32_GPIO_H_
 
-#if (CONFIG_STM32_USART == 1)
-#define STM32_GPIO_PORT_X   STM32_GPIO_PORT_A
-#define STM32_GPIO_PIN_TX   STM32_GPIO_PIN_9
-#define STM32_GPIO_PIN_RX   STM32_GPIO_PIN_10
-#define STM32_GPIO_USART    STM32_GPIO_AF7
-
-#elif (CONFIG_STM32_USART == 2)
-#define STM32_GPIO_PORT_X   STM32_GPIO_PORT_D
-#define STM32_GPIO_PIN_TX   STM32_GPIO_PIN_5
-#define STM32_GPIO_PIN_RX   STM32_GPIO_PIN_6
-#define STM32_GPIO_USART    STM32_GPIO_AF7
-
-#elif (CONFIG_STM32_USART == 3)
-#define STM32_GPIO_PORT_X   STM32_GPIO_PORT_C
-#define STM32_GPIO_PIN_TX   STM32_GPIO_PIN_10
-#define STM32_GPIO_PIN_RX   STM32_GPIO_PIN_11
-#define STM32_GPIO_USART    STM32_GPIO_AF7
-
-#elif (CONFIG_STM32_USART == 6)
-#define STM32_GPIO_PORT_X   STM32_GPIO_PORT_G
-#define STM32_GPIO_PIN_TX   STM32_GPIO_PIN_14
-#define STM32_GPIO_PIN_RX   STM32_GPIO_PIN_9
-#define STM32_GPIO_USART    STM32_GPIO_AF8
-
-#else
-#define STM32_GPIO_PORT_X   STM32_GPIO_PORT_A
-#define STM32_GPIO_PIN_TX   STM32_GPIO_PIN_9
-#define STM32_GPIO_PIN_RX   STM32_GPIO_PIN_10
-#define STM32_GPIO_USART    STM32_GPIO_AF7
-
-#endif
-
-enum stm32_gpio_port {
-	STM32_GPIO_PORT_A = 0,
-	STM32_GPIO_PORT_B,
-	STM32_GPIO_PORT_C,
-	STM32_GPIO_PORT_D,
-	STM32_GPIO_PORT_E,
-	STM32_GPIO_PORT_F,
-	STM32_GPIO_PORT_G,
-	STM32_GPIO_PORT_H,
-	STM32_GPIO_PORT_I
-};
-
-enum stm32_gpio_pin {
-	STM32_GPIO_PIN_0 = 0,
-	STM32_GPIO_PIN_1,
-	STM32_GPIO_PIN_2,
-	STM32_GPIO_PIN_3,
-	STM32_GPIO_PIN_4,
-	STM32_GPIO_PIN_5,
-	STM32_GPIO_PIN_6,
-	STM32_GPIO_PIN_7,
-	STM32_GPIO_PIN_8,
-	STM32_GPIO_PIN_9,
-	STM32_GPIO_PIN_10,
-	STM32_GPIO_PIN_11,
-	STM32_GPIO_PIN_12,
-	STM32_GPIO_PIN_13,
-	STM32_GPIO_PIN_14,
-	STM32_GPIO_PIN_15
-};
-
-enum stm32_gpio_mode {
-	STM32_GPIO_MODE_IN = 0,
-	STM32_GPIO_MODE_OUT,
-	STM32_GPIO_MODE_AF,
-	STM32_GPIO_MODE_AN
-};
-
-enum stm32_gpio_otype {
-	STM32_GPIO_OTYPE_PP = 0,
-	STM32_GPIO_OTYPE_OD
-};
-
-enum stm32_gpio_speed {
-	STM32_GPIO_SPEED_2M = 0,
-	STM32_GPIO_SPEED_25M,
-	STM32_GPIO_SPEED_50M,
-	STM32_GPIO_SPEED_100M
-};
-
-enum stm32_gpio_pupd {
-	STM32_GPIO_PUPD_NO = 0,
-	STM32_GPIO_PUPD_UP,
-	STM32_GPIO_PUPD_DOWN
-};
-
-enum stm32_gpio_af {
-	STM32_GPIO_AF0 = 0,
-	STM32_GPIO_AF1,
-	STM32_GPIO_AF2,
-	STM32_GPIO_AF3,
-	STM32_GPIO_AF4,
-	STM32_GPIO_AF5,
-	STM32_GPIO_AF6,
-	STM32_GPIO_AF7,
-	STM32_GPIO_AF8,
-	STM32_GPIO_AF9,
-	STM32_GPIO_AF10,
-	STM32_GPIO_AF11,
-	STM32_GPIO_AF12,
-	STM32_GPIO_AF13,
-	STM32_GPIO_AF14,
-	STM32_GPIO_AF15
-};
-
-struct stm32_gpio_dsc {
-	enum stm32_gpio_port	port;
-	enum stm32_gpio_pin	pin;
-};
-
-struct stm32_gpio_ctl {
-	enum stm32_gpio_mode	mode;
-	enum stm32_gpio_otype	otype;
-	enum stm32_gpio_speed	speed;
-	enum stm32_gpio_pupd	pupd;
-	enum stm32_gpio_af	af;
-};
-
-struct stm32_gpio_regs {
-	u32 moder;	/* GPIO port mode */
-	u32 otyper;	/* GPIO port output type */
-	u32 ospeedr;	/* GPIO port output speed */
-	u32 pupdr;	/* GPIO port pull-up/pull-down */
-	u32 idr;	/* GPIO port input data */
-	u32 odr;	/* GPIO port output data */
-	u32 bsrr;	/* GPIO port bit set/reset */
-	u32 lckr;	/* GPIO port configuration lock */
-	u32 afr[2];	/* GPIO alternate function */
-};
-
-struct stm32_gpio_priv {
-	struct stm32_gpio_regs *regs;
-};
-
-static inline unsigned stm32_gpio_to_port(unsigned gpio)
-{
-	return gpio / 16;
-}
-
-static inline unsigned stm32_gpio_to_pin(unsigned gpio)
-{
-	return gpio % 16;
-}
+#include <asm/stm32_gpio.h>
 
 #endif /* _STM32_GPIO_H_ */
diff --git a/arch/arm/include/asm/arch-stm32f7/gpio.h b/arch/arm/include/asm/arch-stm32f7/gpio.h
index 68ecdc89e6f3..c5de7981c0d0 100644
--- a/arch/arm/include/asm/arch-stm32f7/gpio.h
+++ b/arch/arm/include/asm/arch-stm32f7/gpio.h
@@ -7,120 +7,6 @@
 
 #ifndef _STM32_GPIO_H_
 #define _STM32_GPIO_H_
-#include <asm/gpio.h>
-
-enum stm32_gpio_port {
-	STM32_GPIO_PORT_A = 0,
-	STM32_GPIO_PORT_B,
-	STM32_GPIO_PORT_C,
-	STM32_GPIO_PORT_D,
-	STM32_GPIO_PORT_E,
-	STM32_GPIO_PORT_F,
-	STM32_GPIO_PORT_G,
-	STM32_GPIO_PORT_H,
-	STM32_GPIO_PORT_I
-};
-
-enum stm32_gpio_pin {
-	STM32_GPIO_PIN_0 = 0,
-	STM32_GPIO_PIN_1,
-	STM32_GPIO_PIN_2,
-	STM32_GPIO_PIN_3,
-	STM32_GPIO_PIN_4,
-	STM32_GPIO_PIN_5,
-	STM32_GPIO_PIN_6,
-	STM32_GPIO_PIN_7,
-	STM32_GPIO_PIN_8,
-	STM32_GPIO_PIN_9,
-	STM32_GPIO_PIN_10,
-	STM32_GPIO_PIN_11,
-	STM32_GPIO_PIN_12,
-	STM32_GPIO_PIN_13,
-	STM32_GPIO_PIN_14,
-	STM32_GPIO_PIN_15
-};
-
-enum stm32_gpio_mode {
-	STM32_GPIO_MODE_IN = 0,
-	STM32_GPIO_MODE_OUT,
-	STM32_GPIO_MODE_AF,
-	STM32_GPIO_MODE_AN
-};
-
-enum stm32_gpio_otype {
-	STM32_GPIO_OTYPE_PP = 0,
-	STM32_GPIO_OTYPE_OD
-};
-
-enum stm32_gpio_speed {
-	STM32_GPIO_SPEED_2M = 0,
-	STM32_GPIO_SPEED_25M,
-	STM32_GPIO_SPEED_50M,
-	STM32_GPIO_SPEED_100M
-};
-
-enum stm32_gpio_pupd {
-	STM32_GPIO_PUPD_NO = 0,
-	STM32_GPIO_PUPD_UP,
-	STM32_GPIO_PUPD_DOWN
-};
-
-enum stm32_gpio_af {
-	STM32_GPIO_AF0 = 0,
-	STM32_GPIO_AF1,
-	STM32_GPIO_AF2,
-	STM32_GPIO_AF3,
-	STM32_GPIO_AF4,
-	STM32_GPIO_AF5,
-	STM32_GPIO_AF6,
-	STM32_GPIO_AF7,
-	STM32_GPIO_AF8,
-	STM32_GPIO_AF9,
-	STM32_GPIO_AF10,
-	STM32_GPIO_AF11,
-	STM32_GPIO_AF12,
-	STM32_GPIO_AF13,
-	STM32_GPIO_AF14,
-	STM32_GPIO_AF15
-};
-
-struct stm32_gpio_dsc {
-	enum stm32_gpio_port	port;
-	enum stm32_gpio_pin	pin;
-};
-
-struct stm32_gpio_ctl {
-	enum stm32_gpio_mode	mode;
-	enum stm32_gpio_otype	otype;
-	enum stm32_gpio_speed	speed;
-	enum stm32_gpio_pupd	pupd;
-	enum stm32_gpio_af	af;
-};
-
-struct stm32_gpio_regs {
-	u32 moder;	/* GPIO port mode */
-	u32 otyper;	/* GPIO port output type */
-	u32 ospeedr;	/* GPIO port output speed */
-	u32 pupdr;	/* GPIO port pull-up/pull-down */
-	u32 idr;	/* GPIO port input data */
-	u32 odr;	/* GPIO port output data */
-	u32 bsrr;	/* GPIO port bit set/reset */
-	u32 lckr;	/* GPIO port configuration lock */
-	u32 afr[2];	/* GPIO alternate function */
-};
-
-struct stm32_gpio_priv {
-	struct stm32_gpio_regs *regs;
-};
-
-static inline unsigned stm32_gpio_to_port(unsigned gpio)
-{
-	return gpio / 16;
-}
-
-static inline unsigned stm32_gpio_to_pin(unsigned gpio)
-{
-	return gpio % 16;
-}
+#include <asm/stm32_gpio.h>
 
 #endif /* _STM32_GPIO_H_ */
diff --git a/arch/arm/include/asm/arch-stm32h7/gpio.h b/arch/arm/include/asm/arch-stm32h7/gpio.h
index 092bf3aaaca4..7846ff444006 100644
--- a/arch/arm/include/asm/arch-stm32h7/gpio.h
+++ b/arch/arm/include/asm/arch-stm32h7/gpio.h
@@ -7,120 +7,7 @@
 
 #ifndef _STM32_GPIO_H_
 #define _STM32_GPIO_H_
-#include <asm/gpio.h>
 
-enum stm32_gpio_port {
-	STM32_GPIO_PORT_A = 0,
-	STM32_GPIO_PORT_B,
-	STM32_GPIO_PORT_C,
-	STM32_GPIO_PORT_D,
-	STM32_GPIO_PORT_E,
-	STM32_GPIO_PORT_F,
-	STM32_GPIO_PORT_G,
-	STM32_GPIO_PORT_H,
-	STM32_GPIO_PORT_I
-};
-
-enum stm32_gpio_pin {
-	STM32_GPIO_PIN_0 = 0,
-	STM32_GPIO_PIN_1,
-	STM32_GPIO_PIN_2,
-	STM32_GPIO_PIN_3,
-	STM32_GPIO_PIN_4,
-	STM32_GPIO_PIN_5,
-	STM32_GPIO_PIN_6,
-	STM32_GPIO_PIN_7,
-	STM32_GPIO_PIN_8,
-	STM32_GPIO_PIN_9,
-	STM32_GPIO_PIN_10,
-	STM32_GPIO_PIN_11,
-	STM32_GPIO_PIN_12,
-	STM32_GPIO_PIN_13,
-	STM32_GPIO_PIN_14,
-	STM32_GPIO_PIN_15
-};
-
-enum stm32_gpio_mode {
-	STM32_GPIO_MODE_IN = 0,
-	STM32_GPIO_MODE_OUT,
-	STM32_GPIO_MODE_AF,
-	STM32_GPIO_MODE_AN
-};
-
-enum stm32_gpio_otype {
-	STM32_GPIO_OTYPE_PP = 0,
-	STM32_GPIO_OTYPE_OD
-};
-
-enum stm32_gpio_speed {
-	STM32_GPIO_SPEED_2M = 0,
-	STM32_GPIO_SPEED_25M,
-	STM32_GPIO_SPEED_50M,
-	STM32_GPIO_SPEED_100M
-};
-
-enum stm32_gpio_pupd {
-	STM32_GPIO_PUPD_NO = 0,
-	STM32_GPIO_PUPD_UP,
-	STM32_GPIO_PUPD_DOWN
-};
-
-enum stm32_gpio_af {
-	STM32_GPIO_AF0 = 0,
-	STM32_GPIO_AF1,
-	STM32_GPIO_AF2,
-	STM32_GPIO_AF3,
-	STM32_GPIO_AF4,
-	STM32_GPIO_AF5,
-	STM32_GPIO_AF6,
-	STM32_GPIO_AF7,
-	STM32_GPIO_AF8,
-	STM32_GPIO_AF9,
-	STM32_GPIO_AF10,
-	STM32_GPIO_AF11,
-	STM32_GPIO_AF12,
-	STM32_GPIO_AF13,
-	STM32_GPIO_AF14,
-	STM32_GPIO_AF15
-};
-
-struct stm32_gpio_dsc {
-	enum stm32_gpio_port	port;
-	enum stm32_gpio_pin	pin;
-};
-
-struct stm32_gpio_ctl {
-	enum stm32_gpio_mode	mode;
-	enum stm32_gpio_otype	otype;
-	enum stm32_gpio_speed	speed;
-	enum stm32_gpio_pupd	pupd;
-	enum stm32_gpio_af	af;
-};
-
-struct stm32_gpio_regs {
-	u32 moder;	/* GPIO port mode */
-	u32 otyper;	/* GPIO port output type */
-	u32 ospeedr;	/* GPIO port output speed */
-	u32 pupdr;	/* GPIO port pull-up/pull-down */
-	u32 idr;	/* GPIO port input data */
-	u32 odr;	/* GPIO port output data */
-	u32 bsrr;	/* GPIO port bit set/reset */
-	u32 lckr;	/* GPIO port configuration lock */
-	u32 afr[2];	/* GPIO alternate function */
-};
-
-struct stm32_gpio_priv {
-	struct stm32_gpio_regs *regs;
-};
-
-static inline unsigned stm32_gpio_to_port(unsigned gpio)
-{
-	return gpio / 16;
-}
-
-static inline unsigned stm32_gpio_to_pin(unsigned gpio)
-{
-	return gpio % 16;
-}
+#include <asm/stm32_gpio.h>
 
 #endif /* _STM32_GPIO_H_ */
diff --git a/arch/arm/include/asm/stm32_gpio.h b/arch/arm/include/asm/stm32_gpio.h
new file mode 100644
index 000000000000..d24e8096acfe
--- /dev/null
+++ b/arch/arm/include/asm/stm32_gpio.h
@@ -0,0 +1,115 @@
+/*
+ * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
+ * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _GPIO_H_
+#define _GPIO_H_
+
+enum stm32_gpio_port {
+	STM32_GPIO_PORT_A = 0,
+	STM32_GPIO_PORT_B,
+	STM32_GPIO_PORT_C,
+	STM32_GPIO_PORT_D,
+	STM32_GPIO_PORT_E,
+	STM32_GPIO_PORT_F,
+	STM32_GPIO_PORT_G,
+	STM32_GPIO_PORT_H,
+	STM32_GPIO_PORT_I
+};
+
+enum stm32_gpio_pin {
+	STM32_GPIO_PIN_0 = 0,
+	STM32_GPIO_PIN_1,
+	STM32_GPIO_PIN_2,
+	STM32_GPIO_PIN_3,
+	STM32_GPIO_PIN_4,
+	STM32_GPIO_PIN_5,
+	STM32_GPIO_PIN_6,
+	STM32_GPIO_PIN_7,
+	STM32_GPIO_PIN_8,
+	STM32_GPIO_PIN_9,
+	STM32_GPIO_PIN_10,
+	STM32_GPIO_PIN_11,
+	STM32_GPIO_PIN_12,
+	STM32_GPIO_PIN_13,
+	STM32_GPIO_PIN_14,
+	STM32_GPIO_PIN_15
+};
+
+enum stm32_gpio_mode {
+	STM32_GPIO_MODE_IN = 0,
+	STM32_GPIO_MODE_OUT,
+	STM32_GPIO_MODE_AF,
+	STM32_GPIO_MODE_AN
+};
+
+enum stm32_gpio_otype {
+	STM32_GPIO_OTYPE_PP = 0,
+	STM32_GPIO_OTYPE_OD
+};
+
+enum stm32_gpio_speed {
+	STM32_GPIO_SPEED_2M = 0,
+	STM32_GPIO_SPEED_25M,
+	STM32_GPIO_SPEED_50M,
+	STM32_GPIO_SPEED_100M
+};
+
+enum stm32_gpio_pupd {
+	STM32_GPIO_PUPD_NO = 0,
+	STM32_GPIO_PUPD_UP,
+	STM32_GPIO_PUPD_DOWN
+};
+
+enum stm32_gpio_af {
+	STM32_GPIO_AF0 = 0,
+	STM32_GPIO_AF1,
+	STM32_GPIO_AF2,
+	STM32_GPIO_AF3,
+	STM32_GPIO_AF4,
+	STM32_GPIO_AF5,
+	STM32_GPIO_AF6,
+	STM32_GPIO_AF7,
+	STM32_GPIO_AF8,
+	STM32_GPIO_AF9,
+	STM32_GPIO_AF10,
+	STM32_GPIO_AF11,
+	STM32_GPIO_AF12,
+	STM32_GPIO_AF13,
+	STM32_GPIO_AF14,
+	STM32_GPIO_AF15
+};
+
+struct stm32_gpio_dsc {
+	enum stm32_gpio_port	port;
+	enum stm32_gpio_pin	pin;
+};
+
+struct stm32_gpio_ctl {
+	enum stm32_gpio_mode	mode;
+	enum stm32_gpio_otype	otype;
+	enum stm32_gpio_speed	speed;
+	enum stm32_gpio_pupd	pupd;
+	enum stm32_gpio_af	af;
+};
+
+struct stm32_gpio_regs {
+	u32 moder;	/* GPIO port mode */
+	u32 otyper;	/* GPIO port output type */
+	u32 ospeedr;	/* GPIO port output speed */
+	u32 pupdr;	/* GPIO port pull-up/pull-down */
+	u32 idr;	/* GPIO port input data */
+	u32 odr;	/* GPIO port output data */
+	u32 bsrr;	/* GPIO port bit set/reset */
+	u32 lckr;	/* GPIO port configuration lock */
+	u32 afr[2];	/* GPIO alternate function */
+};
+
+struct stm32_gpio_priv {
+	struct stm32_gpio_regs *regs;
+};
+
+#endif /* _GPIO_H_ */
-- 
1.9.1

[U-Boot] [PATCH 3/5] arch-stm32: Factorize stm32.h for STM32F4 and F7

[patrice.chotard at st.com]

From: Patrice Chotard <patrice.chotard@st.com>

For STM32F4 and F7 SoCx family, a specific stm32.h file exists.
Some common defines are duplicated or even unused in each of
these stm32.h.

Factorize all common definition in arch/arm/include/asm/stm32f.h and keep
specific definitions in each arch/arm/include/asm/arch-stm32fx/stm32.h.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
---
 arch/arm/include/asm/arch-stm32f4/stm32.h | 14 ++--------
 arch/arm/include/asm/arch-stm32f7/stm32.h | 45 +------------------------------
 arch/arm/include/asm/stm32f.h             | 22 +++++++++++++++
 drivers/mtd/stm32_flash.c                 |  2 +-
 4 files changed, 26 insertions(+), 57 deletions(-)
 create mode 100644 arch/arm/include/asm/stm32f.h

diff --git a/arch/arm/include/asm/arch-stm32f4/stm32.h b/arch/arm/include/asm/arch-stm32f4/stm32.h
index 763b18cb5412..86cca059075d 100644
--- a/arch/arm/include/asm/arch-stm32f4/stm32.h
+++ b/arch/arm/include/asm/arch-stm32f4/stm32.h
@@ -11,17 +11,12 @@
 #ifndef _MACH_STM32_H_
 #define _MACH_STM32_H_
 
+#include <asm/stm32f.h>
+
 /*
  * Peripheral memory map
  */
 #define STM32_SYSMEM_BASE	0x1FFF0000
-#define STM32_PERIPH_BASE	0x40000000
-#define STM32_APB1PERIPH_BASE	(STM32_PERIPH_BASE + 0x00000000)
-#define STM32_APB2PERIPH_BASE	(STM32_PERIPH_BASE + 0x00010000)
-#define STM32_AHB1PERIPH_BASE	(STM32_PERIPH_BASE + 0x00020000)
-#define STM32_AHB2PERIPH_BASE	(STM32_PERIPH_BASE + 0x10000000)
-
-#define STM32_BUS_MASK		0xFFFF0000
 
 /*
  * Register maps
@@ -37,15 +32,10 @@ struct stm32_u_id_regs {
  */
 #define STM32_U_ID_BASE		(STM32_SYSMEM_BASE + 0x7A10)
 #define STM32_U_ID		((struct stm32_u_id_regs *)STM32_U_ID_BASE)
-
-#define FLASH_CNTL_BASE		(STM32_AHB1PERIPH_BASE + 0x3C00)
-
 static const u32 sect_sz_kb[CONFIG_SYS_MAX_FLASH_SECT] = {
 	[0 ... 3] =	16 * 1024,
 	[4] =		64 * 1024,
 	[5 ... 11] =	128 * 1024
 };
 
-void stm32_flash_latency_cfg(int latency);
-
 #endif /* _MACH_STM32_H_ */
diff --git a/arch/arm/include/asm/arch-stm32f7/stm32.h b/arch/arm/include/asm/arch-stm32f7/stm32.h
index 40df89142608..3f097548d374 100644
--- a/arch/arm/include/asm/arch-stm32f7/stm32.h
+++ b/arch/arm/include/asm/arch-stm32f7/stm32.h
@@ -8,46 +8,7 @@
 #ifndef _ASM_ARCH_HARDWARE_H
 #define _ASM_ARCH_HARDWARE_H
 
-/* STM32F746 */
-#define ITCM_FLASH_BASE		0x00200000UL
-#define AXIM_FLASH_BASE		0x08000000UL
-
-#define ITCM_SRAM_BASE		0x00000000UL
-#define DTCM_SRAM_BASE		0x20000000UL
-#define SRAM1_BASE		0x20010000UL
-#define SRAM2_BASE		0x2004C000UL
-
-#define PERIPH_BASE		0x40000000UL
-
-#define APB1_PERIPH_BASE	(PERIPH_BASE + 0x00000000)
-#define APB2_PERIPH_BASE	(PERIPH_BASE + 0x00010000)
-#define AHB1_PERIPH_BASE	(PERIPH_BASE + 0x00020000)
-#define AHB2_PERIPH_BASE	(PERIPH_BASE + 0x10000000)
-#define AHB3_PERIPH_BASE	(PERIPH_BASE + 0x20000000)
-
-#define USART2_BASE		(APB1_PERIPH_BASE + 0x4400)
-#define USART3_BASE		(APB1_PERIPH_BASE + 0x4800)
-#define PWR_BASE		(APB1_PERIPH_BASE + 0x7000)
-
-#define USART1_BASE		(APB2_PERIPH_BASE + 0x1000)
-#define USART6_BASE		(APB2_PERIPH_BASE + 0x1400)
-#define STM32_SYSCFG_BASE	(APB2_PERIPH_BASE + 0x3800)
-
-#define STM32_GPIOA_BASE	(AHB1_PERIPH_BASE + 0x0000)
-#define STM32_GPIOB_BASE	(AHB1_PERIPH_BASE + 0x0400)
-#define STM32_GPIOC_BASE	(AHB1_PERIPH_BASE + 0x0800)
-#define STM32_GPIOD_BASE	(AHB1_PERIPH_BASE + 0x0C00)
-#define STM32_GPIOE_BASE	(AHB1_PERIPH_BASE + 0x1000)
-#define STM32_GPIOF_BASE	(AHB1_PERIPH_BASE + 0x1400)
-#define STM32_GPIOG_BASE	(AHB1_PERIPH_BASE + 0x1800)
-#define STM32_GPIOH_BASE	(AHB1_PERIPH_BASE + 0x1C00)
-#define STM32_GPIOI_BASE	(AHB1_PERIPH_BASE + 0x2000)
-#define STM32_GPIOJ_BASE	(AHB1_PERIPH_BASE + 0x2400)
-#define STM32_GPIOK_BASE	(AHB1_PERIPH_BASE + 0x2800)
-#define FLASH_CNTL_BASE		(AHB1_PERIPH_BASE + 0x3C00)
-
-
-#define SDRAM_FMC_BASE		(AHB3_PERIPH_BASE + 0x40000140)
+#include <asm/stm32f.h>
 
 static const u32 sect_sz_kb[CONFIG_SYS_MAX_FLASH_SECT] = {
 	[0 ... 3] =	32 * 1024,
@@ -55,8 +16,4 @@ static const u32 sect_sz_kb[CONFIG_SYS_MAX_FLASH_SECT] = {
 	[5 ... 7] =	256 * 1024
 };
 
-#define STM32_BUS_MASK		GENMASK(31, 16)
-
-void stm32_flash_latency_cfg(int latency);
-
 #endif /* _ASM_ARCH_HARDWARE_H */
diff --git a/arch/arm/include/asm/stm32f.h b/arch/arm/include/asm/stm32f.h
new file mode 100644
index 000000000000..7bea20b4d06a
--- /dev/null
+++ b/arch/arm/include/asm/stm32f.h
@@ -0,0 +1,22 @@
+/*
+ * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
+ * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics.
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#ifndef _ASM_ARCH_STM32F_H
+#define _ASM_ARCH_STM32F_H
+
+#define STM32_PERIPH_BASE	0x40000000UL
+
+#define STM32_APB2_PERIPH_BASE	(STM32_PERIPH_BASE + 0x00010000)
+#define STM32_AHB1_PERIPH_BASE	(STM32_PERIPH_BASE + 0x00020000)
+
+#define STM32_SYSCFG_BASE	(STM32_APB2_PERIPH_BASE + 0x3800)
+#define STM32_FLASH_CNTL_BASE	(STM32_AHB1_PERIPH_BASE + 0x3C00)
+
+void stm32_flash_latency_cfg(int latency);
+
+#endif /* _ASM_ARCH_STM32F_H */
+
diff --git a/drivers/mtd/stm32_flash.c b/drivers/mtd/stm32_flash.c
index 472499d83c3b..a82814272e21 100644
--- a/drivers/mtd/stm32_flash.c
+++ b/drivers/mtd/stm32_flash.c
@@ -12,7 +12,7 @@
 
 flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
 
-#define STM32_FLASH		((struct stm32_flash_regs *)FLASH_CNTL_BASE)
+#define STM32_FLASH	((struct stm32_flash_regs *)STM32_FLASH_CNTL_BASE)
 
 void stm32_flash_latency_cfg(int latency)
 {
-- 
1.9.1

[U-Boot] [PATCH 4/5] arch-stm32: Remove stm32_periph.h

[patrice.chotard at st.com]

From: Patrice Chotard <patrice.chotard@st.com>

Remove arch/arm/include/asm/arch-stm32fx/stm32_periph.h
as all defines or enums are no more used.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
---
 arch/arm/include/asm/arch-stm32f4/stm32_periph.h | 38 ------------------------
 arch/arm/include/asm/arch-stm32f7/stm32_periph.h | 23 --------------
 board/st/stm32f746-disco/stm32f746-disco.c       |  1 -
 3 files changed, 62 deletions(-)
 delete mode 100644 arch/arm/include/asm/arch-stm32f4/stm32_periph.h
 delete mode 100644 arch/arm/include/asm/arch-stm32f7/stm32_periph.h

diff --git a/arch/arm/include/asm/arch-stm32f4/stm32_periph.h b/arch/arm/include/asm/arch-stm32f4/stm32_periph.h
deleted file mode 100644
index fa45a5c0f1cb..000000000000
--- a/arch/arm/include/asm/arch-stm32f4/stm32_periph.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/*
- * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
- * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef __ASM_ARM_ARCH_PERIPH_H
-#define __ASM_ARM_ARCH_PERIPH_H
-
-/*
- * Peripherals required for pinmux configuration. List will
- * grow with support for more devices getting added.
- * Numbering based on interrupt table.
- *
- */
-enum periph_id {
-	UART1_GPIOA_9_10 = 0,
-	UART2_GPIOD_5_6,
-};
-
-enum periph_clock {
-	USART1_CLOCK_CFG = 0,
-	USART2_CLOCK_CFG,
-	GPIO_A_CLOCK_CFG,
-	GPIO_B_CLOCK_CFG,
-	GPIO_C_CLOCK_CFG,
-	GPIO_D_CLOCK_CFG,
-	GPIO_E_CLOCK_CFG,
-	GPIO_F_CLOCK_CFG,
-	GPIO_G_CLOCK_CFG,
-	GPIO_H_CLOCK_CFG,
-	GPIO_I_CLOCK_CFG,
-	GPIO_J_CLOCK_CFG,
-	GPIO_K_CLOCK_CFG,
-};
-
-#endif /* __ASM_ARM_ARCH_PERIPH_H */
diff --git a/arch/arm/include/asm/arch-stm32f7/stm32_periph.h b/arch/arm/include/asm/arch-stm32f7/stm32_periph.h
deleted file mode 100644
index 38d4ade13d2f..000000000000
--- a/arch/arm/include/asm/arch-stm32f7/stm32_periph.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
- * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-#ifndef __ASM_ARM_ARCH_PERIPH_H
-#define __ASM_ARM_ARCH_PERIPH_H
-
-/*
- * Peripherals required for pinmux configuration. List will
- * grow with support for more devices getting added.
- * Numbering based on interrupt table.
- *
- */
-enum periph_id {
-	PERIPH_ID_USART1 = 37,
-
-	PERIPH_ID_QUADSPI = 92,
-};
-
-#endif /* __ASM_ARM_ARCH_PERIPH_H */
diff --git a/board/st/stm32f746-disco/stm32f746-disco.c b/board/st/stm32f746-disco/stm32f746-disco.c
index ec39468fb8a2..05b316fe90a4 100644
--- a/board/st/stm32f746-disco/stm32f746-disco.c
+++ b/board/st/stm32f746-disco/stm32f746-disco.c
@@ -13,7 +13,6 @@
 #include <asm/armv7m.h>
 #include <asm/arch/stm32.h>
 #include <asm/arch/gpio.h>
-#include <asm/arch/stm32_periph.h>
 #include <asm/arch/syscfg.h>
 #include <asm/gpio.h>
 
-- 
1.9.1

[U-Boot] [PATCH 5/5] arch-stm32: Clean arch-stm32f7/syscfg.h

[patrice.chotard at st.com]

From: Patrice Chotard <patrice.chotard@st.com>

Remove all unused defines

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
---
 arch/arm/include/asm/arch-stm32f7/syscfg.h | 9 ---------
 1 file changed, 9 deletions(-)

diff --git a/arch/arm/include/asm/arch-stm32f7/syscfg.h b/arch/arm/include/asm/arch-stm32f7/syscfg.h
index 49e78f203dcd..310eec584f20 100644
--- a/arch/arm/include/asm/arch-stm32f7/syscfg.h
+++ b/arch/arm/include/asm/arch-stm32f7/syscfg.h
@@ -23,16 +23,7 @@ struct stm32_syscfg_regs {
  */
 #define STM32_SYSCFG		((struct stm32_syscfg_regs *)STM32_SYSCFG_BASE)
 
-/* SYSCFG memory remap register */
-#define SYSCFG_MEMRMP_MEM_BOOT	BIT(0)
-#define SYSCFG_MEMRMP_SWP_FMC	BIT(10)
-
 /* SYSCFG peripheral mode configuration register */
-#define SYSCFG_PMC_ADCXDC2	BIT(16)
 #define SYSCFG_PMC_MII_RMII_SEL	BIT(23)
 
-/* Compensation cell control register */
-#define SYSCFG_CMPCR_CMP_PD	BIT(0)
-#define SYSCFG_CMPCR_READY	BIT(8)
-
 #endif
-- 
1.9.1

[U-Boot] [PATCH 2/5] arch-stm32: Move gpio.h for STM32 SoCs in include/asm/

[Vikas Manocha]

Hi Patrice,

On 02/07/2018 07:50 AM, patrice.chotard at st.com wrote:
> From: Patrice Chotard <patrice.chotard@st.com>
> 
> Instead to have 3 identical gpio.h for all STM32 SoCs,
> migrate them in one file in include/asm.

good move to consolidate these headers.
One comment below.

> 
> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
> ---
>  arch/arm/include/asm/arch-stm32f4/gpio.h | 146 +------------------------------
>  arch/arm/include/asm/arch-stm32f7/gpio.h | 116 +-----------------------
>  arch/arm/include/asm/arch-stm32h7/gpio.h | 115 +-----------------------
>  arch/arm/include/asm/stm32_gpio.h        | 115 ++++++++++++++++++++++++
>  4 files changed, 118 insertions(+), 374 deletions(-)
>  create mode 100644 arch/arm/include/asm/stm32_gpio.h
> 
> diff --git a/arch/arm/include/asm/arch-stm32f4/gpio.h b/arch/arm/include/asm/arch-stm32f4/gpio.h
> index 6173fa130000..bb4427e6f4ac 100644
> --- a/arch/arm/include/asm/arch-stm32f4/gpio.h
> +++ b/arch/arm/include/asm/arch-stm32f4/gpio.h
> @@ -11,150 +11,6 @@
>  #ifndef _STM32_GPIO_H_
>  #define _STM32_GPIO_H_
>  
> -#if (CONFIG_STM32_USART == 1)
> -#define STM32_GPIO_PORT_X   STM32_GPIO_PORT_A
> -#define STM32_GPIO_PIN_TX   STM32_GPIO_PIN_9
> -#define STM32_GPIO_PIN_RX   STM32_GPIO_PIN_10
> -#define STM32_GPIO_USART    STM32_GPIO_AF7
> -
> -#elif (CONFIG_STM32_USART == 2)
> -#define STM32_GPIO_PORT_X   STM32_GPIO_PORT_D
> -#define STM32_GPIO_PIN_TX   STM32_GPIO_PIN_5
> -#define STM32_GPIO_PIN_RX   STM32_GPIO_PIN_6
> -#define STM32_GPIO_USART    STM32_GPIO_AF7
> -
> -#elif (CONFIG_STM32_USART == 3)
> -#define STM32_GPIO_PORT_X   STM32_GPIO_PORT_C
> -#define STM32_GPIO_PIN_TX   STM32_GPIO_PIN_10
> -#define STM32_GPIO_PIN_RX   STM32_GPIO_PIN_11
> -#define STM32_GPIO_USART    STM32_GPIO_AF7
> -
> -#elif (CONFIG_STM32_USART == 6)
> -#define STM32_GPIO_PORT_X   STM32_GPIO_PORT_G
> -#define STM32_GPIO_PIN_TX   STM32_GPIO_PIN_14
> -#define STM32_GPIO_PIN_RX   STM32_GPIO_PIN_9
> -#define STM32_GPIO_USART    STM32_GPIO_AF8
> -
> -#else
> -#define STM32_GPIO_PORT_X   STM32_GPIO_PORT_A
> -#define STM32_GPIO_PIN_TX   STM32_GPIO_PIN_9
> -#define STM32_GPIO_PIN_RX   STM32_GPIO_PIN_10
> -#define STM32_GPIO_USART    STM32_GPIO_AF7
> -
> -#endif
> -
> -enum stm32_gpio_port {
> -	STM32_GPIO_PORT_A = 0,
> -	STM32_GPIO_PORT_B,
> -	STM32_GPIO_PORT_C,
> -	STM32_GPIO_PORT_D,
> -	STM32_GPIO_PORT_E,
> -	STM32_GPIO_PORT_F,
> -	STM32_GPIO_PORT_G,
> -	STM32_GPIO_PORT_H,
> -	STM32_GPIO_PORT_I
> -};
> -
> -enum stm32_gpio_pin {
> -	STM32_GPIO_PIN_0 = 0,
> -	STM32_GPIO_PIN_1,
> -	STM32_GPIO_PIN_2,
> -	STM32_GPIO_PIN_3,
> -	STM32_GPIO_PIN_4,
> -	STM32_GPIO_PIN_5,
> -	STM32_GPIO_PIN_6,
> -	STM32_GPIO_PIN_7,
> -	STM32_GPIO_PIN_8,
> -	STM32_GPIO_PIN_9,
> -	STM32_GPIO_PIN_10,
> -	STM32_GPIO_PIN_11,
> -	STM32_GPIO_PIN_12,
> -	STM32_GPIO_PIN_13,
> -	STM32_GPIO_PIN_14,
> -	STM32_GPIO_PIN_15
> -};
> -
> -enum stm32_gpio_mode {
> -	STM32_GPIO_MODE_IN = 0,
> -	STM32_GPIO_MODE_OUT,
> -	STM32_GPIO_MODE_AF,
> -	STM32_GPIO_MODE_AN
> -};
> -
> -enum stm32_gpio_otype {
> -	STM32_GPIO_OTYPE_PP = 0,
> -	STM32_GPIO_OTYPE_OD
> -};
> -
> -enum stm32_gpio_speed {
> -	STM32_GPIO_SPEED_2M = 0,
> -	STM32_GPIO_SPEED_25M,
> -	STM32_GPIO_SPEED_50M,
> -	STM32_GPIO_SPEED_100M
> -};
> -
> -enum stm32_gpio_pupd {
> -	STM32_GPIO_PUPD_NO = 0,
> -	STM32_GPIO_PUPD_UP,
> -	STM32_GPIO_PUPD_DOWN
> -};
> -
> -enum stm32_gpio_af {
> -	STM32_GPIO_AF0 = 0,
> -	STM32_GPIO_AF1,
> -	STM32_GPIO_AF2,
> -	STM32_GPIO_AF3,
> -	STM32_GPIO_AF4,
> -	STM32_GPIO_AF5,
> -	STM32_GPIO_AF6,
> -	STM32_GPIO_AF7,
> -	STM32_GPIO_AF8,
> -	STM32_GPIO_AF9,
> -	STM32_GPIO_AF10,
> -	STM32_GPIO_AF11,
> -	STM32_GPIO_AF12,
> -	STM32_GPIO_AF13,
> -	STM32_GPIO_AF14,
> -	STM32_GPIO_AF15
> -};
> -
> -struct stm32_gpio_dsc {
> -	enum stm32_gpio_port	port;
> -	enum stm32_gpio_pin	pin;
> -};
> -
> -struct stm32_gpio_ctl {
> -	enum stm32_gpio_mode	mode;
> -	enum stm32_gpio_otype	otype;
> -	enum stm32_gpio_speed	speed;
> -	enum stm32_gpio_pupd	pupd;
> -	enum stm32_gpio_af	af;
> -};
> -
> -struct stm32_gpio_regs {
> -	u32 moder;	/* GPIO port mode */
> -	u32 otyper;	/* GPIO port output type */
> -	u32 ospeedr;	/* GPIO port output speed */
> -	u32 pupdr;	/* GPIO port pull-up/pull-down */
> -	u32 idr;	/* GPIO port input data */
> -	u32 odr;	/* GPIO port output data */
> -	u32 bsrr;	/* GPIO port bit set/reset */
> -	u32 lckr;	/* GPIO port configuration lock */
> -	u32 afr[2];	/* GPIO alternate function */
> -};
> -
> -struct stm32_gpio_priv {
> -	struct stm32_gpio_regs *regs;
> -};
> -
> -static inline unsigned stm32_gpio_to_port(unsigned gpio)
> -{
> -	return gpio / 16;
> -}
> -
> -static inline unsigned stm32_gpio_to_pin(unsigned gpio)
> -{
> -	return gpio % 16;
> -}
> +#include <asm/stm32_gpio.h>

Hmm.. this header seems like dummy header(in all architectures f4/f7/h7) only to include gpio header here.
Also arch/arm/include/asm/ does not seems like good place for soc specific header files.

how about creating one level like arch/arm/include/asm/arch-stm32/ to include common gpio.h here. It would fix both of above points.
The same location can be used to move other commonalities in future.

Cheers,
Vikas


[...] 

>  
>  #endif /* _STM32_GPIO_H_ */
> diff --git a/arch/arm/include/asm/stm32_gpio.h b/arch/arm/include/asm/stm32_gpio.h
> new file mode 100644
> index 000000000000..d24e8096acfe
> --- /dev/null
> +++ b/arch/arm/include/asm/stm32_gpio.h
> @@ -0,0 +1,115 @@
> +/*
> + * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
> + * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
> + *
> + * SPDX-License-Identifier:	GPL-2.0+
> + */
> +
> +#ifndef _GPIO_H_
> +#define _GPIO_H_
> +
> +enum stm32_gpio_port {
> +	STM32_GPIO_PORT_A = 0,
> +	STM32_GPIO_PORT_B,
> +	STM32_GPIO_PORT_C,
> +	STM32_GPIO_PORT_D,
> +	STM32_GPIO_PORT_E,
> +	STM32_GPIO_PORT_F,
> +	STM32_GPIO_PORT_G,
> +	STM32_GPIO_PORT_H,
> +	STM32_GPIO_PORT_I
> +};
> +
> +enum stm32_gpio_pin {
> +	STM32_GPIO_PIN_0 = 0,
> +	STM32_GPIO_PIN_1,
> +	STM32_GPIO_PIN_2,
> +	STM32_GPIO_PIN_3,
> +	STM32_GPIO_PIN_4,
> +	STM32_GPIO_PIN_5,
> +	STM32_GPIO_PIN_6,
> +	STM32_GPIO_PIN_7,
> +	STM32_GPIO_PIN_8,
> +	STM32_GPIO_PIN_9,
> +	STM32_GPIO_PIN_10,
> +	STM32_GPIO_PIN_11,
> +	STM32_GPIO_PIN_12,
> +	STM32_GPIO_PIN_13,
> +	STM32_GPIO_PIN_14,
> +	STM32_GPIO_PIN_15
> +};
> +
> +enum stm32_gpio_mode {
> +	STM32_GPIO_MODE_IN = 0,
> +	STM32_GPIO_MODE_OUT,
> +	STM32_GPIO_MODE_AF,
> +	STM32_GPIO_MODE_AN
> +};
> +
> +enum stm32_gpio_otype {
> +	STM32_GPIO_OTYPE_PP = 0,
> +	STM32_GPIO_OTYPE_OD
> +};
> +
> +enum stm32_gpio_speed {
> +	STM32_GPIO_SPEED_2M = 0,
> +	STM32_GPIO_SPEED_25M,
> +	STM32_GPIO_SPEED_50M,
> +	STM32_GPIO_SPEED_100M
> +};
> +
> +enum stm32_gpio_pupd {
> +	STM32_GPIO_PUPD_NO = 0,
> +	STM32_GPIO_PUPD_UP,
> +	STM32_GPIO_PUPD_DOWN
> +};
> +
> +enum stm32_gpio_af {
> +	STM32_GPIO_AF0 = 0,
> +	STM32_GPIO_AF1,
> +	STM32_GPIO_AF2,
> +	STM32_GPIO_AF3,
> +	STM32_GPIO_AF4,
> +	STM32_GPIO_AF5,
> +	STM32_GPIO_AF6,
> +	STM32_GPIO_AF7,
> +	STM32_GPIO_AF8,
> +	STM32_GPIO_AF9,
> +	STM32_GPIO_AF10,
> +	STM32_GPIO_AF11,
> +	STM32_GPIO_AF12,
> +	STM32_GPIO_AF13,
> +	STM32_GPIO_AF14,
> +	STM32_GPIO_AF15
> +};
> +
> +struct stm32_gpio_dsc {
> +	enum stm32_gpio_port	port;
> +	enum stm32_gpio_pin	pin;
> +};
> +
> +struct stm32_gpio_ctl {
> +	enum stm32_gpio_mode	mode;
> +	enum stm32_gpio_otype	otype;
> +	enum stm32_gpio_speed	speed;
> +	enum stm32_gpio_pupd	pupd;
> +	enum stm32_gpio_af	af;
> +};
> +
> +struct stm32_gpio_regs {
> +	u32 moder;	/* GPIO port mode */
> +	u32 otyper;	/* GPIO port output type */
> +	u32 ospeedr;	/* GPIO port output speed */
> +	u32 pupdr;	/* GPIO port pull-up/pull-down */
> +	u32 idr;	/* GPIO port input data */
> +	u32 odr;	/* GPIO port output data */
> +	u32 bsrr;	/* GPIO port bit set/reset */
> +	u32 lckr;	/* GPIO port configuration lock */
> +	u32 afr[2];	/* GPIO alternate function */
> +};
> +
> +struct stm32_gpio_priv {
> +	struct stm32_gpio_regs *regs;
> +};
> +
> +#endif /* _GPIO_H_ */
> 

[U-Boot] [PATCH 3/5] arch-stm32: Factorize stm32.h for STM32F4 and F7

[Vikas Manocha]

Hi,

On 02/07/2018 07:50 AM, patrice.chotard at st.com wrote:
> From: Patrice Chotard <patrice.chotard@st.com>
> 
> For STM32F4 and F7 SoCx family, a specific stm32.h file exists.
> Some common defines are duplicated or even unused in each of
> these stm32.h.
> 
> Factorize all common definition in arch/arm/include/asm/stm32f.h and keep
> specific definitions in each arch/arm/include/asm/arch-stm32fx/stm32.h.
> 
> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
> ---
>  arch/arm/include/asm/arch-stm32f4/stm32.h | 14 ++--------
>  arch/arm/include/asm/arch-stm32f7/stm32.h | 45 +------------------------------
>  arch/arm/include/asm/stm32f.h             | 22 +++++++++++++++
>  drivers/mtd/stm32_flash.c                 |  2 +-
>  4 files changed, 26 insertions(+), 57 deletions(-)
>  create mode 100644 arch/arm/include/asm/stm32f.h
> 
> diff --git a/arch/arm/include/asm/arch-stm32f4/stm32.h b/arch/arm/include/asm/arch-stm32f4/stm32.h
> index 763b18cb5412..86cca059075d 100644
> --- a/arch/arm/include/asm/arch-stm32f4/stm32.h
> +++ b/arch/arm/include/asm/arch-stm32f4/stm32.h
> @@ -11,17 +11,12 @@
>  #ifndef _MACH_STM32_H_
>  #define _MACH_STM32_H_
>  
> +#include <asm/stm32f.h>
> +
>  /*
>   * Peripheral memory map
>   */
>  #define STM32_SYSMEM_BASE	0x1FFF0000
> -#define STM32_PERIPH_BASE	0x40000000
> -#define STM32_APB1PERIPH_BASE	(STM32_PERIPH_BASE + 0x00000000)
> -#define STM32_APB2PERIPH_BASE	(STM32_PERIPH_BASE + 0x00010000)
> -#define STM32_AHB1PERIPH_BASE	(STM32_PERIPH_BASE + 0x00020000)
> -#define STM32_AHB2PERIPH_BASE	(STM32_PERIPH_BASE + 0x10000000)
> -
> -#define STM32_BUS_MASK		0xFFFF0000
>  
>  /*
>   * Register maps
> @@ -37,15 +32,10 @@ struct stm32_u_id_regs {
>   */
>  #define STM32_U_ID_BASE		(STM32_SYSMEM_BASE + 0x7A10)
>  #define STM32_U_ID		((struct stm32_u_id_regs *)STM32_U_ID_BASE)
> -
> -#define FLASH_CNTL_BASE		(STM32_AHB1PERIPH_BASE + 0x3C00)
> -
>  static const u32 sect_sz_kb[CONFIG_SYS_MAX_FLASH_SECT] = {
>  	[0 ... 3] =	16 * 1024,
>  	[4] =		64 * 1024,
>  	[5 ... 11] =	128 * 1024
>  };
>  
> -void stm32_flash_latency_cfg(int latency);
> -
>  #endif /* _MACH_STM32_H_ */
> diff --git a/arch/arm/include/asm/arch-stm32f7/stm32.h b/arch/arm/include/asm/arch-stm32f7/stm32.h
> index 40df89142608..3f097548d374 100644
> --- a/arch/arm/include/asm/arch-stm32f7/stm32.h
> +++ b/arch/arm/include/asm/arch-stm32f7/stm32.h
> @@ -8,46 +8,7 @@
>  #ifndef _ASM_ARCH_HARDWARE_H
>  #define _ASM_ARCH_HARDWARE_H
>  
> -/* STM32F746 */
> -#define ITCM_FLASH_BASE		0x00200000UL
> -#define AXIM_FLASH_BASE		0x08000000UL
> -
> -#define ITCM_SRAM_BASE		0x00000000UL
> -#define DTCM_SRAM_BASE		0x20000000UL
> -#define SRAM1_BASE		0x20010000UL
> -#define SRAM2_BASE		0x2004C000UL
> -
> -#define PERIPH_BASE		0x40000000UL
> -
> -#define APB1_PERIPH_BASE	(PERIPH_BASE + 0x00000000)
> -#define APB2_PERIPH_BASE	(PERIPH_BASE + 0x00010000)
> -#define AHB1_PERIPH_BASE	(PERIPH_BASE + 0x00020000)
> -#define AHB2_PERIPH_BASE	(PERIPH_BASE + 0x10000000)
> -#define AHB3_PERIPH_BASE	(PERIPH_BASE + 0x20000000)
> -
> -#define USART2_BASE		(APB1_PERIPH_BASE + 0x4400)
> -#define USART3_BASE		(APB1_PERIPH_BASE + 0x4800)
> -#define PWR_BASE		(APB1_PERIPH_BASE + 0x7000)
> -
> -#define USART1_BASE		(APB2_PERIPH_BASE + 0x1000)
> -#define USART6_BASE		(APB2_PERIPH_BASE + 0x1400)
> -#define STM32_SYSCFG_BASE	(APB2_PERIPH_BASE + 0x3800)
> -
> -#define STM32_GPIOA_BASE	(AHB1_PERIPH_BASE + 0x0000)
> -#define STM32_GPIOB_BASE	(AHB1_PERIPH_BASE + 0x0400)
> -#define STM32_GPIOC_BASE	(AHB1_PERIPH_BASE + 0x0800)
> -#define STM32_GPIOD_BASE	(AHB1_PERIPH_BASE + 0x0C00)
> -#define STM32_GPIOE_BASE	(AHB1_PERIPH_BASE + 0x1000)
> -#define STM32_GPIOF_BASE	(AHB1_PERIPH_BASE + 0x1400)
> -#define STM32_GPIOG_BASE	(AHB1_PERIPH_BASE + 0x1800)
> -#define STM32_GPIOH_BASE	(AHB1_PERIPH_BASE + 0x1C00)
> -#define STM32_GPIOI_BASE	(AHB1_PERIPH_BASE + 0x2000)
> -#define STM32_GPIOJ_BASE	(AHB1_PERIPH_BASE + 0x2400)
> -#define STM32_GPIOK_BASE	(AHB1_PERIPH_BASE + 0x2800)
> -#define FLASH_CNTL_BASE		(AHB1_PERIPH_BASE + 0x3C00)
> -
> -
> -#define SDRAM_FMC_BASE		(AHB3_PERIPH_BASE + 0x40000140)
> +#include <asm/stm32f.h>
>  
>  static const u32 sect_sz_kb[CONFIG_SYS_MAX_FLASH_SECT] = {
>  	[0 ... 3] =	32 * 1024,
> @@ -55,8 +16,4 @@ static const u32 sect_sz_kb[CONFIG_SYS_MAX_FLASH_SECT] = {
>  	[5 ... 7] =	256 * 1024
>  };
>  
> -#define STM32_BUS_MASK		GENMASK(31, 16)
> -
> -void stm32_flash_latency_cfg(int latency);
> -
>  #endif /* _ASM_ARCH_HARDWARE_H */
> diff --git a/arch/arm/include/asm/stm32f.h b/arch/arm/include/asm/stm32f.h

same comment, location of this header should be ....arch-stm32/stm32f.h

Cheers,
Vikas

> new file mode 100644
> index 000000000000..7bea20b4d06a
> --- /dev/null
> +++ b/arch/arm/include/asm/stm32f.h
> @@ -0,0 +1,22 @@
> +/*
> + * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
> + * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics.
> + *
> + * SPDX-License-Identifier:	GPL-2.0+
> + */
> +
> +#ifndef _ASM_ARCH_STM32F_H
> +#define _ASM_ARCH_STM32F_H
> +
> +#define STM32_PERIPH_BASE	0x40000000UL
> +
> +#define STM32_APB2_PERIPH_BASE	(STM32_PERIPH_BASE + 0x00010000)
> +#define STM32_AHB1_PERIPH_BASE	(STM32_PERIPH_BASE + 0x00020000)
> +
> +#define STM32_SYSCFG_BASE	(STM32_APB2_PERIPH_BASE + 0x3800)
> +#define STM32_FLASH_CNTL_BASE	(STM32_AHB1_PERIPH_BASE + 0x3C00)
> +
> +void stm32_flash_latency_cfg(int latency);
> +
> +#endif /* _ASM_ARCH_STM32F_H */
> +
> diff --git a/drivers/mtd/stm32_flash.c b/drivers/mtd/stm32_flash.c
> index 472499d83c3b..a82814272e21 100644
> --- a/drivers/mtd/stm32_flash.c
> +++ b/drivers/mtd/stm32_flash.c
> @@ -12,7 +12,7 @@
>  
>  flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
>  
> -#define STM32_FLASH		((struct stm32_flash_regs *)FLASH_CNTL_BASE)
> +#define STM32_FLASH	((struct stm32_flash_regs *)STM32_FLASH_CNTL_BASE)
>  
>  void stm32_flash_latency_cfg(int latency)
>  {
> 

[U-Boot] [PATCH 2/5] arch-stm32: Move gpio.h for STM32 SoCs in include/asm/

[Patrice CHOTARD]

Hi Vikas

On 02/07/2018 08:28 PM, Vikas Manocha wrote:
> Hi Patrice,
> 
> On 02/07/2018 07:50 AM, patrice.chotard at st.com wrote:
>> From: Patrice Chotard <patrice.chotard@st.com>
>>
>> Instead to have 3 identical gpio.h for all STM32 SoCs,
>> migrate them in one file in include/asm.
> 
> good move to consolidate these headers.
> One comment below.
> 
>>
>> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>

[...]

>> -static inline unsigned stm32_gpio_to_pin(unsigned gpio)
>> -{
>> -	return gpio % 16;
>> -}
>> +#include <asm/stm32_gpio.h>
> 
> Hmm.. this header seems like dummy header(in all architectures f4/f7/h7) only to include gpio header here.
> Also arch/arm/include/asm/ does not seems like good place for soc specific header files.

Agree, but omap have put several omap_xxxx.h files too.

> 
> how about creating one level like arch/arm/include/asm/arch-stm32/ to include common gpio.h here. It would fix both of above points.
> The same location can be used to move other commonalities in future.

It's possible to create an additionnal level
arch/arm/include/asm/arch-stm32/  and put specificities to each SoCs into :

arch/arm/include/asm/arch-stm32/stm32f4
arch/arm/include/asm/arch-stm32/stm32f7
arch/arm/include/asm/arch-stm32/stm32h7

If we focus on stm32f7, this implies to modify the content of 
CONFIG_SYS_SOC from "stm32f7" to "stm32/stm32f7" in 
board/st/stm32f746-disco/Kconfig but:

1) In any case, we can't include directly files located in 
arch/arm/include/asm/arch-stm32 because SYS_SOC is used to build include 
path.

For example in drivers/gpio/gpio-uclass.c,
#include <asm/gpio.h> is in fact #include <asm/<SYS_SOC>/gpio.h

so equal to #include <asm/arch-stm32/stm32f7/gpio.h

2) Other effect, now in "soc" environment variable, we will obtain 
"stm32/stm32f7" instead of "stm32f7". This is not a big deal, but we 
must add some code to extract the soc name from "soc" environment variable.

Both solution are not perfect.

Thanks

Patrice


> 
> Cheers,
> Vikas
> 

[U-Boot] [PATCH 2/5] arch-stm32: Move gpio.h for STM32 SoCs in include/asm/

[Vikas Manocha]

Hi Patrice,

On 02/08/2018 05:35 AM, Patrice CHOTARD wrote:
> Hi Vikas
> 
> On 02/07/2018 08:28 PM, Vikas Manocha wrote:
>> Hi Patrice,
>>
>> On 02/07/2018 07:50 AM, patrice.chotard at st.com wrote:
>>> From: Patrice Chotard <patrice.chotard@st.com>
>>>
>>> Instead to have 3 identical gpio.h for all STM32 SoCs,
>>> migrate them in one file in include/asm.
>>
>> good move to consolidate these headers.
>> One comment below.
>>
>>>
>>> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
> 
> [...]
> 
>>> -static inline unsigned stm32_gpio_to_pin(unsigned gpio)
>>> -{
>>> -	return gpio % 16;
>>> -}
>>> +#include <asm/stm32_gpio.h>
>>
>> Hmm.. this header seems like dummy header(in all architectures f4/f7/h7) only to include gpio header here.
>> Also arch/arm/include/asm/ does not seems like good place for soc specific header files.
> 
> Agree, but omap have put several omap_xxxx.h files too.

I see omap files, they might be first ones to use this structure, i am not sure. But in any case, it does not look clean today.
How about creating asm/arch-stm32 to put common stuff like this gpio header.

-#include <asm/stm32_gpio.h>
+#include <asm/arch-stm32/stm32_gpio.h>

It can be done with no modification required in SYS_SOC, the point you mentioned below.
It does not remove the arch-stm32f7/f7/h7/ gpio headers but avoids include/asm cluttering with SOC files.

Cheers,
Vikas

> 
>>
>> how about creating one level like arch/arm/include/asm/arch-stm32/ to include common gpio.h here. It would fix both of above points.
>> The same location can be used to move other commonalities in future.
> 
> It's possible to create an additionnal level
> arch/arm/include/asm/arch-stm32/  and put specificities to each SoCs into :
> 
> arch/arm/include/asm/arch-stm32/stm32f4
> arch/arm/include/asm/arch-stm32/stm32f7
> arch/arm/include/asm/arch-stm32/stm32h7
> 
> If we focus on stm32f7, this implies to modify the content of 
> CONFIG_SYS_SOC from "stm32f7" to "stm32/stm32f7" in 
> board/st/stm32f746-disco/Kconfig but:
> 
> 1) In any case, we can't include directly files located in 
> arch/arm/include/asm/arch-stm32 because SYS_SOC is used to build include 
> path.
> 
> For example in drivers/gpio/gpio-uclass.c,
> #include <asm/gpio.h> is in fact #include <asm/<SYS_SOC>/gpio.h
> 
> so equal to #include <asm/arch-stm32/stm32f7/gpio.h
> 
> 2) Other effect, now in "soc" environment variable, we will obtain 
> "stm32/stm32f7" instead of "stm32f7". This is not a big deal, but we 
> must add some code to extract the soc name from "soc" environment variable.
> 
> Both solution are not perfect.
> 
> Thanks
> 
> Patrice
> 
> 
>>
>> Cheers,
>> Vikas

[U-Boot] [PATCH 2/5] arch-stm32: Move gpio.h for STM32 SoCs in include/asm/

[Patrice CHOTARD]

Hi Vikas

On 02/08/2018 11:19 PM, Vikas Manocha wrote:
> Hi Patrice,
> 
> On 02/08/2018 05:35 AM, Patrice CHOTARD wrote:
>> Hi Vikas
>>
>> On 02/07/2018 08:28 PM, Vikas Manocha wrote:
>>> Hi Patrice,
>>>
>>> On 02/07/2018 07:50 AM, patrice.chotard at st.com wrote:
>>>> From: Patrice Chotard <patrice.chotard@st.com>
>>>>
>>>> Instead to have 3 identical gpio.h for all STM32 SoCs,
>>>> migrate them in one file in include/asm.
>>>
>>> good move to consolidate these headers.
>>> One comment below.
>>>
>>>>
>>>> Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
>>
>> [...]
>>
>>>> -static inline unsigned stm32_gpio_to_pin(unsigned gpio)
>>>> -{
>>>> -	return gpio % 16;
>>>> -}
>>>> +#include <asm/stm32_gpio.h>
>>>
>>> Hmm.. this header seems like dummy header(in all architectures f4/f7/h7) only to include gpio header here.
>>> Also arch/arm/include/asm/ does not seems like good place for soc specific header files.
>>
>> Agree, but omap have put several omap_xxxx.h files too.
> 
> I see omap files, they might be first ones to use this structure, i am not sure. But in any case, it does not look clean today.
> How about creating asm/arch-stm32 to put common stuff like this gpio header.
> 
> -#include <asm/stm32_gpio.h>
> +#include <asm/arch-stm32/stm32_gpio.h>
> 
> It can be done with no modification required in SYS_SOC, the point you mentioned below.
> It does not remove the arch-stm32f7/f7/h7/ gpio headers but avoids include/asm cluttering with SOC files.

Yes agree, i will send a v2 with this update

Thanks Vikas ;-)

Patrice

> 
> Cheers,
> Vikas
> 
>>
>>>
>>> how about creating one level like arch/arm/include/asm/arch-stm32/ to include common gpio.h here. It would fix both of above points.
>>> The same location can be used to move other commonalities in future.
>>
>> It's possible to create an additionnal level
>> arch/arm/include/asm/arch-stm32/  and put specificities to each SoCs into :
>>
>> arch/arm/include/asm/arch-stm32/stm32f4
>> arch/arm/include/asm/arch-stm32/stm32f7
>> arch/arm/include/asm/arch-stm32/stm32h7
>>
>> If we focus on stm32f7, this implies to modify the content of
>> CONFIG_SYS_SOC from "stm32f7" to "stm32/stm32f7" in
>> board/st/stm32f746-disco/Kconfig but:
>>
>> 1) In any case, we can't include directly files located in
>> arch/arm/include/asm/arch-stm32 because SYS_SOC is used to build include
>> path.
>>
>> For example in drivers/gpio/gpio-uclass.c,
>> #include <asm/gpio.h> is in fact #include <asm/<SYS_SOC>/gpio.h
>>
>> so equal to #include <asm/arch-stm32/stm32f7/gpio.h
>>
>> 2) Other effect, now in "soc" environment variable, we will obtain
>> "stm32/stm32f7" instead of "stm32f7". This is not a big deal, but we
>> must add some code to extract the soc name from "soc" environment variable.
>>
>> Both solution are not perfect.
>>
>> Thanks
>>
>> Patrice
>>
>>
>>>
>>> Cheers,
>>> Vikas