From: Jan Kiszka <jan.kiszka@siemens.com> To: Thomas Gleixner <tglx@linutronix.de>, "Bouska, Zdenek" <zdenek.bouska@siemens.com>, Will Deacon <will@kernel.org>, Catalin Marinas <catalin.marinas@arm.com> Cc: "linux-arm-kernel@lists.infradead.org" <linux-arm-kernel@lists.infradead.org>, "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>, "linux-rt-users@vger.kernel.org" <linux-rt-users@vger.kernel.org>, Nishanth Menon <nm@ti.com>, Puranjay Mohan <p-mohan@ti.com> Subject: Re: Unfair qspinlocks on ARM64 without LSE atomics => 3ms delay in interrupt handling Date: Thu, 27 Apr 2023 15:14:47 +0200 [thread overview] Message-ID: <19641ab0-ab6a-9af7-8c64-34030e187848@siemens.com> (raw) In-Reply-To: <87pm7qxrg6.ffs@tglx> On 26.04.23 23:29, Thomas Gleixner wrote: > On Wed, Apr 26 2023 at 12:03, Zdenek Bouska wrote: >> following patch is my current approach for fixing this issue. I introduced >> big_cpu_relax(), which uses Will's implementation [1] on ARM64 without >> LSE atomics and original cpu_relax() on any other CPU. > > Why is this interrupt handling specific? Just because it's the place > where you observed it? > > That's a general issue for any code which uses atomics for forward > progress. LL/SC simply does not guarantee that. > > So if that helps, then this needs to be addressed globaly and not with > some crude hack in the interrupt handling code. My impression is that the retry loop of irq_finalize_oneshot is particularly susceptible to that issue due to the high acquire/relax pressure and inter-dependency between holder and waiter it generates - which does not mean it cannot occur in other places. Are we aware of other concrete case where it bites? Even with just "normal" contented spin_lock usage? > >> Anyone has a better idea how to solve this issue properly? > > Use hardware with LSE atomics :) That would generate tons of waste of current electronic devices without it - not very fashionable anymore. ;) Jan -- Siemens AG, Technology Competence Center Embedded Linux
WARNING: multiple messages have this Message-ID (diff)
From: Jan Kiszka <jan.kiszka@siemens.com> To: Thomas Gleixner <tglx@linutronix.de>, "Bouska, Zdenek" <zdenek.bouska@siemens.com>, Will Deacon <will@kernel.org>, Catalin Marinas <catalin.marinas@arm.com> Cc: "linux-arm-kernel@lists.infradead.org" <linux-arm-kernel@lists.infradead.org>, "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>, "linux-rt-users@vger.kernel.org" <linux-rt-users@vger.kernel.org>, Nishanth Menon <nm@ti.com>, Puranjay Mohan <p-mohan@ti.com> Subject: Re: Unfair qspinlocks on ARM64 without LSE atomics => 3ms delay in interrupt handling Date: Thu, 27 Apr 2023 15:14:47 +0200 [thread overview] Message-ID: <19641ab0-ab6a-9af7-8c64-34030e187848@siemens.com> (raw) In-Reply-To: <87pm7qxrg6.ffs@tglx> On 26.04.23 23:29, Thomas Gleixner wrote: > On Wed, Apr 26 2023 at 12:03, Zdenek Bouska wrote: >> following patch is my current approach for fixing this issue. I introduced >> big_cpu_relax(), which uses Will's implementation [1] on ARM64 without >> LSE atomics and original cpu_relax() on any other CPU. > > Why is this interrupt handling specific? Just because it's the place > where you observed it? > > That's a general issue for any code which uses atomics for forward > progress. LL/SC simply does not guarantee that. > > So if that helps, then this needs to be addressed globaly and not with > some crude hack in the interrupt handling code. My impression is that the retry loop of irq_finalize_oneshot is particularly susceptible to that issue due to the high acquire/relax pressure and inter-dependency between holder and waiter it generates - which does not mean it cannot occur in other places. Are we aware of other concrete case where it bites? Even with just "normal" contented spin_lock usage? > >> Anyone has a better idea how to solve this issue properly? > > Use hardware with LSE atomics :) That would generate tons of waste of current electronic devices without it - not very fashionable anymore. ;) Jan -- Siemens AG, Technology Competence Center Embedded Linux _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2023-04-27 13:15 UTC|newest] Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-04-26 12:03 Unfair qspinlocks on ARM64 without LSE atomics => 3ms delay in interrupt handling Bouska, Zdenek 2023-04-26 21:29 ` Thomas Gleixner 2023-04-26 21:29 ` Thomas Gleixner 2023-04-27 9:38 ` Bouska, Zdenek 2023-04-27 9:38 ` Bouska, Zdenek 2023-04-27 10:06 ` Will Deacon 2023-04-27 10:06 ` Will Deacon 2023-04-27 13:14 ` Jan Kiszka [this message] 2023-04-27 13:14 ` Jan Kiszka 2023-04-27 13:45 ` Kurt Kanzenbach 2023-04-27 13:45 ` Kurt Kanzenbach 2023-04-28 7:30 ` Sebastian Andrzej Siewior 2023-04-28 7:30 ` Sebastian Andrzej Siewior 2023-04-28 7:37 ` Kurt Kanzenbach 2023-04-28 7:37 ` Kurt Kanzenbach -- strict thread matches above, loose matches on Subject: below -- 2023-03-24 8:43 Bouska, Zdenek 2023-03-24 8:43 ` Bouska, Zdenek 2023-03-24 17:01 ` Catalin Marinas 2023-03-24 17:01 ` Catalin Marinas 2023-03-24 18:09 ` Will Deacon 2023-03-24 18:09 ` Will Deacon 2023-03-28 9:39 ` Bouska, Zdenek 2023-03-28 9:39 ` Bouska, Zdenek 2023-03-27 5:44 ` Bouska, Zdenek 2023-03-27 5:44 ` Bouska, Zdenek
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