[PATCH] mtd: spi-nor: Add Micron MT25QU02 support

[PATCH] mtd: spi-nor: Add Micron MT25QU02 support

[thor.thayer]

From: Thor Thayer <thor.thayer@linux.intel.com>

Add support for a new Micron 2Gb Flash memory part.
Datasheet is available: mt25q_qlkt_l_02g_cbb_0.pdf

Testing was done on a Stratix10 SoCFPGA Development Kit.

Reported-by: Sujith Chidurala <sujith.chakra.chidurala@intel.com>
Tested-by: Paul Kim <paul.kim@intel.com>
Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
---
 drivers/mtd/spi-nor/spi-nor.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
index 5bfa36e95f35..8b459766a4ca 100644
--- a/drivers/mtd/spi-nor/spi-nor.c
+++ b/drivers/mtd/spi-nor/spi-nor.c
@@ -1087,6 +1087,7 @@ static const struct flash_info spi_nor_ids[] = {
 	{ "n25q512ax3",  INFO(0x20ba20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },
 	{ "n25q00",      INFO(0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
 	{ "n25q00a",     INFO(0x20bb21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
+	{ "mt25qu02g",   INFO(0x20bb22, 0, 64 * 1024, 4096, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
 
 	/* PMC */
 	{ "pm25lv512",   INFO(0,        0, 32 * 1024,    2, SECT_4K_PMC) },
-- 
2.7.4

Re: [PATCH] mtd: spi-nor: Add Micron MT25QU02 support

[Marek Vasut]

On 04/05/2018 09:12 PM, thor.thayer@linux.intel.com wrote:
> From: Thor Thayer <thor.thayer@linux.intel.com>
> 
> Add support for a new Micron 2Gb Flash memory part.
> Datasheet is available: mt25q_qlkt_l_02g_cbb_0.pdf
> 
> Testing was done on a Stratix10 SoCFPGA Development Kit.
> 
> Reported-by: Sujith Chidurala <sujith.chakra.chidurala@intel.com>
> Tested-by: Paul Kim <paul.kim@intel.com>
> Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
> ---

Do we need this or can this be recognized as a SFDP flash ?

-- 
Best regards,
Marek Vasut

Re: [PATCH] mtd: spi-nor: Add Micron MT25QU02 support

[Thor Thayer]

Hi Marek,

On 04/05/2018 02:17 PM, Marek Vasut wrote:
> On 04/05/2018 09:12 PM, thor.thayer@linux.intel.com wrote:
>> From: Thor Thayer <thor.thayer@linux.intel.com>
>>
>> Add support for a new Micron 2Gb Flash memory part.
>> Datasheet is available: mt25q_qlkt_l_02g_cbb_0.pdf
>>
>> Testing was done on a Stratix10 SoCFPGA Development Kit.
>>
>> Reported-by: Sujith Chidurala <sujith.chakra.chidurala@intel.com>
>> Tested-by: Paul Kim <paul.kim@intel.com>
>> Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
>> ---
> 
> Do we need this or can this be recognized as a SFDP flash ?
> 
The error is
"cadence-qspi ff8d2000.spi: unrecognized JEDEC id bytes: 20, bb, 22" 
which is fixed with this table addition. Is there a better way to handle 
this?

Thanks for reviewing and the reply.

Thor

Re: [PATCH] mtd: spi-nor: Add Micron MT25QU02 support

[Marek Vasut]

On 04/10/2018 10:35 PM, Thor Thayer wrote:
> Hi Marek,
> 
> On 04/05/2018 02:17 PM, Marek Vasut wrote:
>> On 04/05/2018 09:12 PM, thor.thayer@linux.intel.com wrote:
>>> From: Thor Thayer <thor.thayer@linux.intel.com>
>>>
>>> Add support for a new Micron 2Gb Flash memory part.
>>> Datasheet is available: mt25q_qlkt_l_02g_cbb_0.pdf
>>>
>>> Testing was done on a Stratix10 SoCFPGA Development Kit.
>>>
>>> Reported-by: Sujith Chidurala <sujith.chakra.chidurala@intel.com>
>>> Tested-by: Paul Kim <paul.kim@intel.com>
>>> Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>
>>> ---
>>
>> Do we need this or can this be recognized as a SFDP flash ?
>>
> The error is
> "cadence-qspi ff8d2000.spi: unrecognized JEDEC id bytes: 20, bb, 22"
> which is fixed with this table addition. Is there a better way to handle
> this?

Seems like even with the SFDP parsing in place, we still need to track
the supported IDs, oh well.

Acked-by: Marek Vasut <marek.vasut@gmail.com>

-- 
Best regards,
Marek Vasut

Re: [PATCH] mtd: spi-nor: Add Micron MT25QU02 support

[Boris Brezillon]

On Thu,  5 Apr 2018 14:12:49 -0500
thor.thayer@linux.intel.com wrote:

> From: Thor Thayer <thor.thayer@linux.intel.com>
> 
> Add support for a new Micron 2Gb Flash memory part.
> Datasheet is available: mt25q_qlkt_l_02g_cbb_0.pdf
> 
> Testing was done on a Stratix10 SoCFPGA Development Kit.
> 
> Reported-by: Sujith Chidurala <sujith.chakra.chidurala@intel.com>
> Tested-by: Paul Kim <paul.kim@intel.com>
> Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com>

Applied to spi-nor/next.

Thanks,

Boris

> ---
>  drivers/mtd/spi-nor/spi-nor.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c
> index 5bfa36e95f35..8b459766a4ca 100644
> --- a/drivers/mtd/spi-nor/spi-nor.c
> +++ b/drivers/mtd/spi-nor/spi-nor.c
> @@ -1087,6 +1087,7 @@ static const struct flash_info spi_nor_ids[] = {
>  	{ "n25q512ax3",  INFO(0x20ba20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) },
>  	{ "n25q00",      INFO(0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
>  	{ "n25q00a",     INFO(0x20bb21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
> +	{ "mt25qu02g",   INFO(0x20bb22, 0, 64 * 1024, 4096, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) },
>  
>  	/* PMC */
>  	{ "pm25lv512",   INFO(0,        0, 32 * 1024,    2, SECT_4K_PMC) },