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From: Auger Eric <eric.auger@redhat.com>
To: Marc Zyngier <marc.zyngier@arm.com>,
	linux-arm-kernel@lists.infradead.org,
	kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org
Cc: Julien Thierry <julien.thierry@arm.com>,
	James Morse <james.morse@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Christoffer Dall <christoffer.dall@arm.com>,
	Zenghui Yu <yuzenghui@huawei.com>,
	"Raslan, KarimAllah" <karahmed@amazon.de>
Subject: Re: [PATCH 3/8] KVM: arm/arm64: vgic-its: Cache successful MSI->LPI translation
Date: Fri, 7 Jun 2019 16:29:43 +0200	[thread overview]
Message-ID: <1bf286d1-7c81-0337-66e7-6701627476c7@redhat.com> (raw)
In-Reply-To: <20190606165455.162478-4-marc.zyngier@arm.com>

Hi Marc,

On 6/6/19 6:54 PM, Marc Zyngier wrote:
> On a successful translation, preserve the parameters in the LPI
> translation cache. Each translation is reusing the last slot
> in the list, naturally evincting the least recently used entry.
evicting
> 
> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
> ---
>  virt/kvm/arm/vgic/vgic-its.c | 41 ++++++++++++++++++++++++++++++++++++
>  1 file changed, 41 insertions(+)
> 
> diff --git a/virt/kvm/arm/vgic/vgic-its.c b/virt/kvm/arm/vgic/vgic-its.c
> index 5758504fd934..bc370b6c5afa 100644
> --- a/virt/kvm/arm/vgic/vgic-its.c
> +++ b/virt/kvm/arm/vgic/vgic-its.c
> @@ -538,6 +538,45 @@ static unsigned long vgic_mmio_read_its_idregs(struct kvm *kvm,
>  	return 0;
>  }
>  
> +static void vgic_its_cache_translation(struct kvm *kvm, struct vgic_its *its,
> +				       u32 devid, u32 eventid,
> +				       struct vgic_irq *irq)
> +{
> +	struct vgic_dist *dist = &kvm->arch.vgic;
> +	struct vgic_translation_cache_entry *cte;
> +	unsigned long flags;
> +
> +	/* Do not cache a directly injected interrupt */
> +	if (irq->hw)
> +		return;
> +
> +	raw_spin_lock_irqsave(&dist->lpi_list_lock, flags);
> +
> +	/* Always reuse the last entry (LRU policy) */
> +	cte = list_last_entry(&dist->lpi_translation_cache,
> +			      typeof(*cte), entry);
> +
> +	/*
> +	 * Caching the translation implies having an extra reference
> +	 * to the interrupt, so drop the potential reference on what
> +	 * was in the cache, and increment it on the new interrupt.
> +	 */
> +	if (cte->irq)
> +		__vgic_put_lpi_locked(kvm, cte->irq);
> +
> +	vgic_get_irq_kref(irq);
> +
> +	cte->db		= its->vgic_its_base + GITS_TRANSLATER;
> +	cte->devid	= devid;
> +	cte->eventid	= eventid;
> +	cte->irq	= irq;
> +
> +	/* Move the new translation to the head of the list */
> +	list_move(&cte->entry, &dist->lpi_translation_cache);
> +
> +	raw_spin_unlock_irqrestore(&dist->lpi_list_lock, flags);
> +}
> +
>  int vgic_its_resolve_lpi(struct kvm *kvm, struct vgic_its *its,
>  			 u32 devid, u32 eventid, struct vgic_irq **irq)
>  {
> @@ -558,6 +597,8 @@ int vgic_its_resolve_lpi(struct kvm *kvm, struct vgic_its *its,
>  	if (!vcpu->arch.vgic_cpu.lpis_enabled)
>  		return -EBUSY;
>  
> +	vgic_its_cache_translation(kvm, its, devid, eventid, ite->irq);
> +
>  	*irq = ite->irq;
>  	return 0;
>  }
> 
Otherwise looks good to me.

Thanks

Eric

WARNING: multiple messages have this Message-ID (diff)
From: Auger Eric <eric.auger@redhat.com>
To: Marc Zyngier <marc.zyngier@arm.com>,
	linux-arm-kernel@lists.infradead.org,
	kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org
Cc: "Raslan, KarimAllah" <karahmed@amazon.de>
Subject: Re: [PATCH 3/8] KVM: arm/arm64: vgic-its: Cache successful MSI->LPI translation
Date: Fri, 7 Jun 2019 16:29:43 +0200	[thread overview]
Message-ID: <1bf286d1-7c81-0337-66e7-6701627476c7@redhat.com> (raw)
In-Reply-To: <20190606165455.162478-4-marc.zyngier@arm.com>

Hi Marc,

On 6/6/19 6:54 PM, Marc Zyngier wrote:
> On a successful translation, preserve the parameters in the LPI
> translation cache. Each translation is reusing the last slot
> in the list, naturally evincting the least recently used entry.
evicting
> 
> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
> ---
>  virt/kvm/arm/vgic/vgic-its.c | 41 ++++++++++++++++++++++++++++++++++++
>  1 file changed, 41 insertions(+)
> 
> diff --git a/virt/kvm/arm/vgic/vgic-its.c b/virt/kvm/arm/vgic/vgic-its.c
> index 5758504fd934..bc370b6c5afa 100644
> --- a/virt/kvm/arm/vgic/vgic-its.c
> +++ b/virt/kvm/arm/vgic/vgic-its.c
> @@ -538,6 +538,45 @@ static unsigned long vgic_mmio_read_its_idregs(struct kvm *kvm,
>  	return 0;
>  }
>  
> +static void vgic_its_cache_translation(struct kvm *kvm, struct vgic_its *its,
> +				       u32 devid, u32 eventid,
> +				       struct vgic_irq *irq)
> +{
> +	struct vgic_dist *dist = &kvm->arch.vgic;
> +	struct vgic_translation_cache_entry *cte;
> +	unsigned long flags;
> +
> +	/* Do not cache a directly injected interrupt */
> +	if (irq->hw)
> +		return;
> +
> +	raw_spin_lock_irqsave(&dist->lpi_list_lock, flags);
> +
> +	/* Always reuse the last entry (LRU policy) */
> +	cte = list_last_entry(&dist->lpi_translation_cache,
> +			      typeof(*cte), entry);
> +
> +	/*
> +	 * Caching the translation implies having an extra reference
> +	 * to the interrupt, so drop the potential reference on what
> +	 * was in the cache, and increment it on the new interrupt.
> +	 */
> +	if (cte->irq)
> +		__vgic_put_lpi_locked(kvm, cte->irq);
> +
> +	vgic_get_irq_kref(irq);
> +
> +	cte->db		= its->vgic_its_base + GITS_TRANSLATER;
> +	cte->devid	= devid;
> +	cte->eventid	= eventid;
> +	cte->irq	= irq;
> +
> +	/* Move the new translation to the head of the list */
> +	list_move(&cte->entry, &dist->lpi_translation_cache);
> +
> +	raw_spin_unlock_irqrestore(&dist->lpi_list_lock, flags);
> +}
> +
>  int vgic_its_resolve_lpi(struct kvm *kvm, struct vgic_its *its,
>  			 u32 devid, u32 eventid, struct vgic_irq **irq)
>  {
> @@ -558,6 +597,8 @@ int vgic_its_resolve_lpi(struct kvm *kvm, struct vgic_its *its,
>  	if (!vcpu->arch.vgic_cpu.lpis_enabled)
>  		return -EBUSY;
>  
> +	vgic_its_cache_translation(kvm, its, devid, eventid, ite->irq);
> +
>  	*irq = ite->irq;
>  	return 0;
>  }
> 
Otherwise looks good to me.

Thanks

Eric
_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm

WARNING: multiple messages have this Message-ID (diff)
From: Auger Eric <eric.auger@redhat.com>
To: Marc Zyngier <marc.zyngier@arm.com>,
	linux-arm-kernel@lists.infradead.org,
	kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>,
	"Raslan, KarimAllah" <karahmed@amazon.de>,
	Julien Thierry <julien.thierry@arm.com>,
	Christoffer Dall <christoffer.dall@arm.com>,
	James Morse <james.morse@arm.com>,
	Zenghui Yu <yuzenghui@huawei.com>
Subject: Re: [PATCH 3/8] KVM: arm/arm64: vgic-its: Cache successful MSI->LPI translation
Date: Fri, 7 Jun 2019 16:29:43 +0200	[thread overview]
Message-ID: <1bf286d1-7c81-0337-66e7-6701627476c7@redhat.com> (raw)
In-Reply-To: <20190606165455.162478-4-marc.zyngier@arm.com>

Hi Marc,

On 6/6/19 6:54 PM, Marc Zyngier wrote:
> On a successful translation, preserve the parameters in the LPI
> translation cache. Each translation is reusing the last slot
> in the list, naturally evincting the least recently used entry.
evicting
> 
> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
> ---
>  virt/kvm/arm/vgic/vgic-its.c | 41 ++++++++++++++++++++++++++++++++++++
>  1 file changed, 41 insertions(+)
> 
> diff --git a/virt/kvm/arm/vgic/vgic-its.c b/virt/kvm/arm/vgic/vgic-its.c
> index 5758504fd934..bc370b6c5afa 100644
> --- a/virt/kvm/arm/vgic/vgic-its.c
> +++ b/virt/kvm/arm/vgic/vgic-its.c
> @@ -538,6 +538,45 @@ static unsigned long vgic_mmio_read_its_idregs(struct kvm *kvm,
>  	return 0;
>  }
>  
> +static void vgic_its_cache_translation(struct kvm *kvm, struct vgic_its *its,
> +				       u32 devid, u32 eventid,
> +				       struct vgic_irq *irq)
> +{
> +	struct vgic_dist *dist = &kvm->arch.vgic;
> +	struct vgic_translation_cache_entry *cte;
> +	unsigned long flags;
> +
> +	/* Do not cache a directly injected interrupt */
> +	if (irq->hw)
> +		return;
> +
> +	raw_spin_lock_irqsave(&dist->lpi_list_lock, flags);
> +
> +	/* Always reuse the last entry (LRU policy) */
> +	cte = list_last_entry(&dist->lpi_translation_cache,
> +			      typeof(*cte), entry);
> +
> +	/*
> +	 * Caching the translation implies having an extra reference
> +	 * to the interrupt, so drop the potential reference on what
> +	 * was in the cache, and increment it on the new interrupt.
> +	 */
> +	if (cte->irq)
> +		__vgic_put_lpi_locked(kvm, cte->irq);
> +
> +	vgic_get_irq_kref(irq);
> +
> +	cte->db		= its->vgic_its_base + GITS_TRANSLATER;
> +	cte->devid	= devid;
> +	cte->eventid	= eventid;
> +	cte->irq	= irq;
> +
> +	/* Move the new translation to the head of the list */
> +	list_move(&cte->entry, &dist->lpi_translation_cache);
> +
> +	raw_spin_unlock_irqrestore(&dist->lpi_list_lock, flags);
> +}
> +
>  int vgic_its_resolve_lpi(struct kvm *kvm, struct vgic_its *its,
>  			 u32 devid, u32 eventid, struct vgic_irq **irq)
>  {
> @@ -558,6 +597,8 @@ int vgic_its_resolve_lpi(struct kvm *kvm, struct vgic_its *its,
>  	if (!vcpu->arch.vgic_cpu.lpis_enabled)
>  		return -EBUSY;
>  
> +	vgic_its_cache_translation(kvm, its, devid, eventid, ite->irq);
> +
>  	*irq = ite->irq;
>  	return 0;
>  }
> 
Otherwise looks good to me.

Thanks

Eric

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2019-06-07 14:29 UTC|newest]

Thread overview: 74+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-06-06 16:54 [PATCH 0/8] KVM: arm/arm64: vgic: ITS translation cache Marc Zyngier
2019-06-06 16:54 ` Marc Zyngier
2019-06-06 16:54 ` Marc Zyngier
2019-06-06 16:54 ` [PATCH 1/8] KVM: arm/arm64: vgic: Add LPI translation cache definition Marc Zyngier
2019-06-06 16:54   ` Marc Zyngier
2019-06-06 16:54   ` Marc Zyngier
2019-06-07  3:47   ` Saidi, Ali
2019-06-07  3:47     ` Saidi, Ali
2019-06-07  3:47     ` Saidi, Ali
2019-06-07  7:38     ` Marc Zyngier
2019-06-07  7:38       ` Marc Zyngier
2019-06-07  8:12   ` Julien Thierry
2019-06-07  8:12     ` Julien Thierry
2019-06-07  8:12     ` Julien Thierry
2019-06-07  8:38     ` Marc Zyngier
2019-06-07  8:38       ` Marc Zyngier
2019-06-07  8:38       ` Marc Zyngier
2019-06-07 12:09   ` Auger Eric
2019-06-07 12:09     ` Auger Eric
2019-06-07 12:09     ` Auger Eric
2019-06-07 12:44     ` Marc Zyngier
2019-06-07 12:44       ` Marc Zyngier
2019-06-07 12:44       ` Marc Zyngier
2019-06-07 14:15       ` Auger Eric
2019-06-07 14:15         ` Auger Eric
2019-06-07 14:15         ` Auger Eric
2019-06-07 15:04         ` Marc Zyngier
2019-06-07 15:04           ` Marc Zyngier
2019-06-07 15:04           ` Marc Zyngier
2019-06-06 16:54 ` [PATCH 2/8] KVM: arm/arm64: vgic: Add __vgic_put_lpi_locked primitive Marc Zyngier
2019-06-06 16:54   ` Marc Zyngier
2019-06-06 16:54   ` Marc Zyngier
2019-06-07 12:11   ` Auger Eric
2019-06-07 12:11     ` Auger Eric
2019-06-07 12:11     ` Auger Eric
2019-06-06 16:54 ` [PATCH 3/8] KVM: arm/arm64: vgic-its: Cache successful MSI->LPI translation Marc Zyngier
2019-06-06 16:54   ` Marc Zyngier
2019-06-06 16:54   ` Marc Zyngier
2019-06-07  8:35   ` Julien Thierry
2019-06-07  8:35     ` Julien Thierry
2019-06-07  8:35     ` Julien Thierry
2019-06-07  8:51     ` Marc Zyngier
2019-06-07  8:51       ` Marc Zyngier
2019-06-07  8:51       ` Marc Zyngier
2019-06-07  8:56       ` Julien Thierry
2019-06-07  8:56         ` Julien Thierry
2019-06-07  8:56         ` Julien Thierry
2019-06-07  9:16         ` Marc Zyngier
2019-06-07  9:16           ` Marc Zyngier
2019-06-07  9:16           ` Marc Zyngier
2019-06-07 14:29   ` Auger Eric [this message]
2019-06-07 14:29     ` Auger Eric
2019-06-07 14:29     ` Auger Eric
2019-06-06 16:54 ` [PATCH 4/8] KVM: arm/arm64: vgic-its: Add kvm parameter to vgic_its_free_collection Marc Zyngier
2019-06-06 16:54   ` Marc Zyngier
2019-06-06 16:54   ` Marc Zyngier
2019-06-07 14:29   ` Auger Eric
2019-06-07 14:29     ` Auger Eric
2019-06-07 14:29     ` Auger Eric
2019-06-07 14:49     ` Marc Zyngier
2019-06-07 14:49       ` Marc Zyngier
2019-06-07 14:49       ` Marc Zyngier
2019-06-06 16:54 ` [PATCH 5/8] KVM: arm/arm64: vgic-its: Invalidate MSI-LPI translation cache on specific commands Marc Zyngier
2019-06-06 16:54   ` Marc Zyngier
2019-06-06 16:54   ` Marc Zyngier
2019-06-06 16:54 ` [PATCH 6/8] KVM: arm/arm64: vgic-its: Invalidate MSI-LPI translation cache on disabling LPIs Marc Zyngier
2019-06-06 16:54   ` Marc Zyngier
2019-06-06 16:54   ` Marc Zyngier
2019-06-06 16:54 ` [PATCH 7/8] KVM: arm/arm64: vgic-its: Check the LPI translation cache on MSI injection Marc Zyngier
2019-06-06 16:54   ` Marc Zyngier
2019-06-06 16:54   ` Marc Zyngier
2019-06-06 16:54 ` [PATCH 8/8] KVM: arm/arm64: vgic-irqfd: Implement kvm_arch_set_irq_inatomic Marc Zyngier
2019-06-06 16:54   ` Marc Zyngier
2019-06-06 16:54   ` Marc Zyngier

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