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From: Konrad Dybcio <konrad.dybcio@linaro.org>
To: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
	Andy Gross <agross@kernel.org>,
	Bjorn Andersson <andersson@kernel.org>,
	Stephen Boyd <sboyd@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Taniya Das <quic_tdas@quicinc.com>
Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
	devicetree@vger.kernel.org
Subject: Re: [PATCH 10/13] clk: qcom: cpu-8996: fix ACD initialization
Date: Thu, 12 Jan 2023 15:35:21 +0100	[thread overview]
Message-ID: <1c8d38e0-2f9d-9e89-5e21-e74ac7851727@linaro.org> (raw)
In-Reply-To: <20230111192004.2509750-11-dmitry.baryshkov@linaro.org>



On 11.01.2023 20:20, Dmitry Baryshkov wrote:
> The vendor kernel applies different order while programming SSSCTL and
> L2ACDCR registers on power and performance clusters. However it was
> demonstrated that doing this upstream results in the board reset. Make
> both clusters use the same sequence, which fixes the reset.
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> ---
I think we should look for the source of why this doesn't work,
e.g. does downstream program it earlier somewhere? Are we
missing something else that may bite later?

Konrad
>  drivers/clk/qcom/clk-cpu-8996.c | 20 ++++++++------------
>  1 file changed, 8 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/clk/qcom/clk-cpu-8996.c b/drivers/clk/qcom/clk-cpu-8996.c
> index 47c58bb5f21a..1c00eb629b61 100644
> --- a/drivers/clk/qcom/clk-cpu-8996.c
> +++ b/drivers/clk/qcom/clk-cpu-8996.c
> @@ -475,9 +475,9 @@ static int qcom_cpu_clk_msm8996_register_clks(struct device *dev,
>  	return ret;
>  }
>  
> -#define CPU_AFINITY_MASK 0xFFF
> -#define PWRCL_CPU_REG_MASK 0x3
> -#define PERFCL_CPU_REG_MASK 0x103
> +#define CPU_CLUSTER_AFFINITY_MASK 0xf00
> +#define PWRCL_AFFINITY_MASK 0x000
> +#define PERFCL_AFFINITY_MASK 0x100
>  
>  #define L2ACDCR_REG 0x580ULL
>  #define L2ACDTD_REG 0x581ULL
> @@ -498,21 +498,17 @@ static void qcom_cpu_clk_msm8996_acd_init(struct regmap *regmap)
>  	if (val == 0x00006a11)
>  		goto out;
>  
> -	hwid = read_cpuid_mpidr() & CPU_AFINITY_MASK;
> -
>  	kryo_l2_set_indirect_reg(L2ACDTD_REG, 0x00006a11);
>  	kryo_l2_set_indirect_reg(L2ACDDVMRC_REG, 0x000e0f0f);
>  	kryo_l2_set_indirect_reg(L2ACDSSCR_REG, 0x00000601);
>  
> -	if (PWRCL_CPU_REG_MASK == (hwid | PWRCL_CPU_REG_MASK)) {
> -		regmap_write(regmap, PWRCL_REG_OFFSET + SSSCTL_OFFSET, 0xf);
> -		kryo_l2_set_indirect_reg(L2ACDCR_REG, 0x002c5ffd);
> -	}
> +	kryo_l2_set_indirect_reg(L2ACDCR_REG, 0x002c5ffd);
>  
> -	if (PERFCL_CPU_REG_MASK == (hwid | PERFCL_CPU_REG_MASK)) {
> -		kryo_l2_set_indirect_reg(L2ACDCR_REG, 0x002c5ffd);
> +	hwid = read_cpuid_mpidr();
> +	if ((hwid & CPU_CLUSTER_AFFINITY_MASK) == PWRCL_AFFINITY_MASK)
> +		regmap_write(regmap, PWRCL_REG_OFFSET + SSSCTL_OFFSET, 0xf);
> +	else
>  		regmap_write(regmap, PERFCL_REG_OFFSET + SSSCTL_OFFSET, 0xf);
> -	}
>  
>  out:
>  	spin_unlock_irqrestore(&qcom_clk_acd_lock, flags);

  reply	other threads:[~2023-01-12 14:49 UTC|newest]

Thread overview: 43+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-01-11 19:19 [PATCH 00/13] clk: qcom: cpu-8996: stability fixes Dmitry Baryshkov
2023-01-11 19:19 ` [PATCH 01/13] clk: qcom: clk-alpha-pll: program PLL_TEST/PLL_TEST_U if required Dmitry Baryshkov
2023-01-11 19:19 ` [PATCH 02/13] clk: qcom: cpu-8996: correct PLL programming Dmitry Baryshkov
2023-01-11 20:57   ` Konrad Dybcio
2023-01-11 19:19 ` [PATCH 03/13] clk: qcom: cpu-8996: fix the init clock rate Dmitry Baryshkov
2023-01-11 20:58   ` Konrad Dybcio
2023-01-11 21:51     ` Dmitry Baryshkov
2023-01-12 12:12       ` Konrad Dybcio
2023-01-11 19:19 ` [PATCH 04/13] clk: qcom: cpu-8996: support using GPLL0 as SMUX input Dmitry Baryshkov
2023-01-11 19:26   ` Stephen Boyd
2023-01-11 20:00     ` Dmitry Baryshkov
2023-01-11 20:59   ` Konrad Dybcio
2023-01-11 21:52     ` Dmitry Baryshkov
2023-01-12 12:16       ` Konrad Dybcio
2023-01-11 19:19 ` [PATCH 05/13] clk: qcom: cpu-8996: skip ACD init if the setup is valid Dmitry Baryshkov
2023-01-11 21:00   ` Konrad Dybcio
2023-01-11 21:55     ` Dmitry Baryshkov
2023-01-12 12:17       ` Konrad Dybcio
2023-01-11 19:19 ` [PATCH 06/13] clk: qcom: cpu-8996: simplify the cpu_clk_notifier_cb Dmitry Baryshkov
2023-01-11 21:03   ` Konrad Dybcio
2023-01-11 22:01     ` Dmitry Baryshkov
2023-01-12 14:13       ` Konrad Dybcio
2023-01-11 19:19 ` [PATCH 07/13] clk: qcom: cpu-8996: setup PLLs before registering clocks Dmitry Baryshkov
2023-01-11 21:04   ` Konrad Dybcio
2023-01-11 19:19 ` [PATCH 08/13] clk: qcom: cpu-8996: move qcom_cpu_clk_msm8996_acd_init call Dmitry Baryshkov
2023-01-12 14:26   ` Konrad Dybcio
2023-01-11 19:20 ` [PATCH 09/13] clk: qcom: cpu-8996: fix PLL configuration sequence Dmitry Baryshkov
2023-01-11 21:08   ` Konrad Dybcio
2023-01-11 22:05     ` Dmitry Baryshkov
2023-01-12 14:32       ` Konrad Dybcio
2023-01-13 11:19         ` Dmitry Baryshkov
2023-01-13 13:43           ` Konrad Dybcio
2023-01-11 19:20 ` [PATCH 10/13] clk: qcom: cpu-8996: fix ACD initialization Dmitry Baryshkov
2023-01-12 14:35   ` Konrad Dybcio [this message]
2023-01-13 10:44     ` Dmitry Baryshkov
2023-01-13 14:00       ` Konrad Dybcio
2023-01-11 19:20 ` [PATCH 11/13] clk: qcom: cpu-8996: fix PLL clock ops Dmitry Baryshkov
2023-01-12 16:10   ` Konrad Dybcio
2023-01-13 11:35     ` Dmitry Baryshkov
2023-01-13 14:02       ` Konrad Dybcio
2023-01-11 19:20 ` [PATCH 12/13] clk: qcom: cpu-8996: change setup sequence to follow vendor kernel Dmitry Baryshkov
2023-01-12 14:42   ` Konrad Dybcio
2023-01-11 19:20 ` [PATCH 13/13] arm64: dts: qcom: msm8996: support using GPLL0 as kryocc input Dmitry Baryshkov

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