[igt-dev] [RFC 0/5] Modify tests for unavailable mappable aperture

[igt-dev] [RFC 0/5] Modify tests for unavailable mappable aperture

[Antonio Argenziano]

As introduced by [1]; future platforms might not expose mappable gtt aperture.
This series tries to address that in IGT by adding a mappable gtt 'require'
to tests that need mappable aperture.

The series, as it is right now, has a large patch where I've added lots of
'require()' I think are necessary. I'm open to suggestions on how to split
it further :).

[1]: https://patchwork.freedesktop.org/series/56683/

Antonio Argenziano (4):
  tests/prime_self_import: Swap gtt mapping for cpu
  igt/lib: Add wrapper to check if gtt mapping is available
  igt/i915: Require GTT mapping to be available when needed.
  igt/lib: If mappable aperture is missing return 0 size

Kalamarz, Lukasz (1):
  lib/ioctl_wrappers: add mmap_offset support

 lib/igt_dummyload.c                     |   4 +-
 lib/igt_fb.c                            |   4 +-
 lib/ioctl_wrappers.c                    | 211 ++++++++++++++++++++----
 lib/ioctl_wrappers.h                    |  13 +-
 tests/i915/gem_concurrent_all.c         |  13 +-
 tests/i915/gem_cpu_reloc.c              |  14 +-
 tests/i915/gem_ctx_sseu.c               |   4 +-
 tests/i915/gem_exec_basic.c             |   1 +
 tests/i915/gem_exec_faulting_reloc.c    |   2 +
 tests/i915/gem_exec_flush.c             |   6 +
 tests/i915/gem_exec_reloc.c             |   7 +
 tests/i915/gem_exec_schedule.c          |   5 +-
 tests/i915/gem_fence_thrash.c           |   6 +
 tests/i915/gem_gtt_cpu_tlb.c            |   1 +
 tests/i915/gem_gtt_hog.c                |   1 +
 tests/i915/gem_gtt_speed.c              |   1 +
 tests/i915/gem_largeobject.c            |   2 +
 tests/i915/gem_madvise.c                |   4 +
 tests/i915/gem_mmap.c                   |   4 +-
 tests/i915/gem_mmap_gtt.c               |  14 +-
 tests/i915/gem_mmap_offset_exhaustion.c |   2 +
 tests/i915/gem_mmap_wc.c                |   2 +
 tests/i915/gem_persistent_relocs.c      |   2 +
 tests/i915/gem_pwrite.c                 |   4 +-
 tests/i915/gem_pwrite_pread.c           |   6 +
 tests/i915/gem_reloc_vs_gpu.c           |  21 ++-
 tests/i915/gem_render_copy.c            |   2 +
 tests/i915/gem_set_tiling_vs_gtt.c      |   2 +
 tests/i915/gem_set_tiling_vs_pwrite.c   |   2 +
 tests/i915/gem_shrink.c                 |  16 +-
 tests/i915/gem_storedw_loop.c           |   9 +
 tests/i915/gem_streaming_writes.c       |  16 +-
 tests/i915/gem_tiled_fence_blits.c      |   1 +
 tests/i915/gem_tiled_pread_basic.c      |   1 +
 tests/i915/gem_tiled_pread_pwrite.c     |   4 +-
 tests/i915/gem_tiled_swapping.c         |   2 +
 tests/i915/gem_tiled_wb.c               |   2 +
 tests/i915/gem_tiled_wc.c               |   1 +
 tests/i915/gem_tiling_max_stride.c      |   3 +-
 tests/i915/gem_userptr_blits.c          |  10 +-
 tests/i915/i915_pm_rpm.c                |   7 +-
 tests/i915/i915_suspend.c               |   2 +
 tests/kms_draw_crc.c                    |   8 +-
 tests/kms_fence_pin_leak.c              |   2 +
 tests/kms_flip.c                        |   2 +-
 tests/kms_frontbuffer_tracking.c        |   3 +
 tests/kms_psr.c                         |   4 +
 tests/prime_mmap.c                      |   9 +-
 tests/prime_mmap_coherency.c            |   1 +
 tests/prime_self_import.c               |   4 +-
 tests/prime_vgem.c                      |   5 +
 51 files changed, 390 insertions(+), 82 deletions(-)

-- 
2.20.1

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[igt-dev] [RFC 1/5] tests/prime_self_import: Swap gtt mapping for cpu

[Antonio Argenziano]

The test uses gtt mapping to check two BOs have the same content, since
it seems there is no contention on the BOs use cpu mapping to make it
compatible with platforms that do not have a mappable aperture.

Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
---
 tests/prime_self_import.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/tests/prime_self_import.c b/tests/prime_self_import.c
index 8c4f5321..905ffffb 100644
--- a/tests/prime_self_import.c
+++ b/tests/prime_self_import.c
@@ -59,8 +59,8 @@ check_bo(int fd1, uint32_t handle1, int fd2, uint32_t handle2)
 	char *ptr1, *ptr2;
 	int i;
 
-	ptr1 = gem_mmap__gtt(fd1, handle1, BO_SIZE, PROT_READ | PROT_WRITE);
-	ptr2 = gem_mmap__gtt(fd2, handle2, BO_SIZE, PROT_READ | PROT_WRITE);
+	ptr1 = gem_mmap__cpu(fd1, handle1, 0, BO_SIZE, PROT_READ | PROT_WRITE);
+	ptr2 = gem_mmap__cpu(fd2, handle2, 0, BO_SIZE, PROT_READ | PROT_WRITE);
 
 	/* check whether it's still our old object first. */
 	for (i = 0; i < BO_SIZE; i++) {
-- 
2.20.1

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[igt-dev] [RFC 2/5] lib/ioctl_wrappers: add mmap_offset support

[Antonio Argenziano]

From: "Kalamarz, Lukasz" <lukasz.kalamarz@intel.com>

With recently proposed changes, IGT need to start supporting new
way of mmaping object, which will be used from now by default.
This patch modify gem_mmap_wc and gem_mmap functions to be
in sync with those changes.

Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
Cc: Janulgue Abdiel <abdiel.janulgue@intel.com>
Cc: Matthew Auld <matthew.auld@intel.com>
Cc: Michal Winiarski <michal.winiarski@intel.com>
Cc: Antonio Argenziano <antonio.argenziano@intel.com>
Cc: Daniele Spurio Ceraolo <daniele.ceraolospurio@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---
 lib/ioctl_wrappers.c | 150 +++++++++++++++++++++++++++++++++++++------
 1 file changed, 129 insertions(+), 21 deletions(-)

diff --git a/lib/ioctl_wrappers.c b/lib/ioctl_wrappers.c
index 404c2fbf..d9b46088 100644
--- a/lib/ioctl_wrappers.c
+++ b/lib/ioctl_wrappers.c
@@ -641,6 +641,24 @@ void gem_execbuf_wr(int fd, struct drm_i915_gem_execbuffer2 *execbuf)
 	igt_assert_eq(__gem_execbuf_wr(fd, execbuf), 0);
 }
 
+static bool has_mmap_offset(int fd)
+{
+	static int has_mmap_offset = -1;
+
+	if (has_mmap_offset == -1) {
+		struct drm_i915_getparam gp;
+
+		has_mmap_offset = 0;
+
+		memset(&gp, 0, sizeof(gp));
+		gp.param = 0x24; /* I915_PARAM_MMAP_OFFSET_VERSION */
+		gp.value = &has_mmap_offset;
+		ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
+	}
+
+	return has_mmap_offset > 0;
+}
+
 /**
  * __gem_mmap__gtt:
  * @fd: open i915 drm file descriptor
@@ -702,40 +720,83 @@ int gem_munmap(void *ptr, uint64_t size)
 	return ret;
 }
 
+struct local_drm_i915_gem_mmap_offset {
+	/** Handle for the object being mapped. */
+	__u32 handle;
+	__u32 pad;
+	/**
+	 * Fake offset to use for subsequent mmap call
+	 *
+	 * This is a fixed-size type for 32/64 compatibility.
+	 */
+	__u64 offset;
+
+	/**
+	 * Flags for extended behaviour.
+	 *
+	 * It is mandatory that either one of the _WC/_WB flags
+	 * should be passed here.
+	 */
+	__u64 flags;
+};
+
+#define LOCAL_DRM_I915_GEM_MMAP_OFFSET 0x24
+#define LOCAL_I915_MMAP_OFFSET_WC (1 << 0)
+#define LOCAL_I915_MMAP_OFFSET_WB (1 << 1)
+#define LOCAL_I915_MMAP_OFFSET_UC (1 << 2)
+
+#define LOCAL_DRM_IOCTL_I915_GEM_MMAP_OFFSET \
+		DRM_IOWR(DRM_COMMAND_BASE + LOCAL_DRM_I915_GEM_MMAP_OFFSET, struct local_drm_i915_gem_mmap_offset)
+
 bool gem_mmap__has_wc(int fd)
 {
 	static int has_wc = -1;
 
 	if (has_wc == -1) {
-		struct drm_i915_getparam gp;
-		int mmap_version = -1;
-		int gtt_version = -1;
 
 		has_wc = 0;
 
-		memset(&gp, 0, sizeof(gp));
-		gp.param = I915_PARAM_MMAP_GTT_VERSION;
-		gp.value = &gtt_version;
-		ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
-
-		memset(&gp, 0, sizeof(gp));
-		gp.param = I915_PARAM_MMAP_VERSION;
-		gp.value = &mmap_version;
-		ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
-
-		/* Do we have the new mmap_ioctl with DOMAIN_WC? */
-		if (mmap_version >= 1 && gtt_version >= 2) {
-			struct drm_i915_gem_mmap arg;
+		/* Do we have the new mmap_offset ioctl? */
+		if (has_mmap_offset(fd)) {
+			struct local_drm_i915_gem_mmap_offset arg;
 
 			/* Does this device support wc-mmaps ? */
 			memset(&arg, 0, sizeof(arg));
 			arg.handle = gem_create(fd, 4096);
 			arg.offset = 0;
-			arg.size = 4096;
-			arg.flags = I915_MMAP_WC;
-			has_wc = igt_ioctl(fd, DRM_IOCTL_I915_GEM_MMAP, &arg) == 0;
+			arg.flags = LOCAL_I915_MMAP_OFFSET_WC;
+			has_wc = igt_ioctl(fd, LOCAL_DRM_IOCTL_I915_GEM_MMAP_OFFSET, &arg) == 0;
 			gem_close(fd, arg.handle);
+		} else {
+			struct drm_i915_getparam gp;
+			int mmap_version = -1;
+			int gtt_version = -1;
+
+			memset(&gp, 0, sizeof(gp));
+			gp.param = I915_PARAM_MMAP_GTT_VERSION;
+			gp.value = &gtt_version;
+			ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
+
+			memset(&gp, 0, sizeof(gp));
+			gp.param = I915_PARAM_MMAP_VERSION;
+			gp.value = &mmap_version;
+			ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
+
+			/* Do we have the mmap_ioctl with DOMAIN_WC? */
+			if (mmap_version >= 1 && gtt_version >= 2) {
+				struct drm_i915_gem_mmap arg;
+
+				/* Does this device support wc-mmaps ? */
+				memset(&arg, 0, sizeof(arg));
+				arg.handle = gem_create(fd, 4096);
+				arg.offset = 0;
+				arg.size = 4096;
+				arg.flags = I915_MMAP_WC;
+				has_wc = igt_ioctl(fd, DRM_IOCTL_I915_GEM_MMAP, &arg) == 0;
+				gem_close(fd, arg.handle);
+			}
 		}
+
 		errno = 0;
 	}
 
@@ -778,6 +839,43 @@ static void
 	return from_user_pointer(arg.addr_ptr);
 }
 
+/**
+ * __gem_mmap_offset:
+ * @fd: open i915 drm file descriptor
+ * @handle: gem buffer object handle
+ * @offset: offset in the gem buffer of the mmap arena
+ * @size: size of the mmap arena
+ * @prot: memory protection bits as used by mmap()
+ * @flags: flags used to determine caching
+ *
+ * Similar to __gem_mmap but use MMAP_OFFSET IOCTL.
+ *
+ * Returns: A pointer to the created memory mapping, NULL on failure.
+ */
+static void
+*__gem_mmap_offset(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned int prot, uint64_t flags)
+{
+	struct local_drm_i915_gem_mmap_offset arg;
+	void *ptr;
+
+	memset(&arg, 0, sizeof(arg));
+	arg.handle = handle;
+	arg.offset = offset;
+	arg.flags = flags;
+
+	if (igt_ioctl(fd, LOCAL_DRM_IOCTL_I915_GEM_MMAP_OFFSET, &arg))
+		return NULL;
+
+	ptr = mmap64(0, size, prot, MAP_SHARED, fd, arg.offset);
+
+	if (ptr == MAP_FAILED)
+		ptr = NULL;
+	else
+		errno = 0;
+
+	return ptr;
+}
+
 /**
  * __gem_mmap__wc:
  * @fd: open i915 drm file descriptor
@@ -795,7 +893,10 @@ static void
  */
 void *__gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot)
 {
-	return __gem_mmap(fd, handle, offset, size, prot, I915_MMAP_WC);
+	if (has_mmap_offset(fd))
+		return __gem_mmap_offset(fd, handle, offset, size, prot, LOCAL_I915_MMAP_OFFSET_WC);
+	else
+		return __gem_mmap(fd, handle, offset, size, prot, I915_MMAP_WC);
 }
 
 /**
@@ -832,7 +933,14 @@ void *gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsi
  */
 void *__gem_mmap__cpu(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot)
 {
-	return __gem_mmap(fd, handle, offset, size, prot, 0);
+	void *ptr;
+
+	if (has_mmap_offset(fd))
+		ptr = __gem_mmap_offset(fd, handle, offset, size, prot, LOCAL_I915_MMAP_OFFSET_WB);
+	else
+		ptr = __gem_mmap(fd, handle, offset, size, prot, 0);
+
+	return ptr;
 }
 
 /**
-- 
2.20.1

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[igt-dev] [RFC 3/5] igt/lib: Add wrapper to check if gtt mapping is available

[Antonio Argenziano]

Add wrapper to get mmap_gtt version number and another to check if
gtt mapping is at all available.

Cc: Katarzyna Dec <katarzyna.dec@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Matthew Auld <matthew.auld@intel.com>
Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
 lib/ioctl_wrappers.c | 47 ++++++++++++++++++++++++++++++++++++--------
 lib/ioctl_wrappers.h | 11 +++++++++++
 2 files changed, 50 insertions(+), 8 deletions(-)

diff --git a/lib/ioctl_wrappers.c b/lib/ioctl_wrappers.c
index d9b46088..25dd8ad3 100644
--- a/lib/ioctl_wrappers.c
+++ b/lib/ioctl_wrappers.c
@@ -659,6 +659,42 @@ static bool has_mmap_offset(int fd)
 	return has_mmap_offset > 0;
 }
 
+/**
+ * gem_mmap__gtt_version:
+ * @fd: open i915 drm file descriptor
+ *
+ * This wraps I915_PARAM_MMAP_GTT_VERSION. It will return the supported feature
+ * set for gtt mapping. Since the mappable aperture in not always present, this
+ * function will return '-1' in case there is none.
+ */
+static int gem_mmap__gtt_version(int fd)
+{
+	static int gtt_version = ~0;
+
+	if (gtt_version == ~0) {
+			struct drm_i915_getparam gp;
+
+			gtt_version = 0;
+
+			memset(&gp, 0, sizeof(gp));
+			gp.param = I915_PARAM_MMAP_GTT_VERSION;
+			gp.value = &gtt_version;
+			ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
+
+			if(errno == -ENODEV)
+				gtt_version = -1; /* No mappable aperture */
+
+			errno = 0;
+	}
+
+	return gtt_version;
+}
+
+bool gem_mmap__has_gtt(int fd)
+{
+	return gem_mmap__gtt_version(fd) >= 0;
+}
+
 /**
  * __gem_mmap__gtt:
  * @fd: open i915 drm file descriptor
@@ -753,7 +789,6 @@ bool gem_mmap__has_wc(int fd)
 	static int has_wc = -1;
 
 	if (has_wc == -1) {
-
 		has_wc = 0;
 
 		/* Do we have the new mmap_offset ioctl? */
@@ -770,12 +805,8 @@ bool gem_mmap__has_wc(int fd)
 		} else {
 			struct drm_i915_getparam gp;
 			int mmap_version = -1;
-			int gtt_version = -1;
-
-			memset(&gp, 0, sizeof(gp));
-			gp.param = I915_PARAM_MMAP_GTT_VERSION;
-			gp.value = &gtt_version;
-			ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
+			bool compatible_gtt_version =
+					(!gem_mmap__has_gtt(fd) || gem_mmap__gtt_version(fd) >= 2);
 
 			memset(&gp, 0, sizeof(gp));
 			gp.param = I915_PARAM_MMAP_VERSION;
@@ -783,7 +814,7 @@ bool gem_mmap__has_wc(int fd)
 			ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
 
 			/* Do we have the mmap_ioctl with DOMAIN_WC? */
-			if (mmap_version >= 1 && gtt_version >= 2) {
+			if (mmap_version >= 1 && compatible_gtt_version) {
 				struct drm_i915_gem_mmap arg;
 
 				/* Does this device support wc-mmaps ? */
diff --git a/lib/ioctl_wrappers.h b/lib/ioctl_wrappers.h
index b22b36b0..693020ed 100644
--- a/lib/ioctl_wrappers.h
+++ b/lib/ioctl_wrappers.h
@@ -90,6 +90,8 @@ void *gem_mmap__cpu(int fd, uint32_t handle, uint64_t offset, uint64_t size, uns
 bool gem_mmap__has_wc(int fd);
 void *gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot);
 
+bool gem_mmap__has_gtt(int fd);
+
 #ifndef I915_GEM_DOMAIN_WC
 #define I915_GEM_DOMAIN_WC 0x80
 #endif
@@ -121,6 +123,15 @@ int gem_munmap(void *ptr, uint64_t size);
  */
 #define gem_require_mmap_wc(fd) igt_require(gem_mmap__has_wc(fd))
 
+/**
+ * gem_require_mmap_gtt:
+ * @fd: open i915 drm file descriptor
+ *
+ * Feature test macro to query whether memory mappings through the  mappable
+ * aperture are available. Automatically skips through igt_require() if not.
+ */
+#define gem_require_mmap_gtt(fd) igt_require(gem_mmap__has_gtt(fd))
+
 int gem_madvise(int fd, uint32_t handle, int state);
 
 #define LOCAL_I915_GEM_USERPTR       0x33
-- 
2.20.1

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[igt-dev] [RFC 4/5] igt/i915: Require GTT mapping to be available when needed.

[Antonio Argenziano]

With the GTT aperture becoming unavailable on certain platforms, tests
that target that mapping need to skip if such mapping is not available.

Cc: Katarzyna Dec <katarzyna.dec@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Matthew Auld <matthew.auld@intel.com>
Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
---
 lib/igt_dummyload.c                     |  4 +++-
 lib/igt_fb.c                            |  4 +++-
 tests/i915/gem_concurrent_all.c         |  1 +
 tests/i915/gem_ctx_sseu.c               |  4 +++-
 tests/i915/gem_exec_basic.c             |  1 +
 tests/i915/gem_exec_faulting_reloc.c    |  2 ++
 tests/i915/gem_exec_flush.c             |  6 ++++++
 tests/i915/gem_exec_reloc.c             |  7 +++++++
 tests/i915/gem_exec_schedule.c          |  5 ++++-
 tests/i915/gem_fence_thrash.c           |  6 ++++++
 tests/i915/gem_gtt_cpu_tlb.c            |  1 +
 tests/i915/gem_gtt_hog.c                |  1 +
 tests/i915/gem_gtt_speed.c              |  1 +
 tests/i915/gem_largeobject.c            |  2 ++
 tests/i915/gem_madvise.c                |  4 ++++
 tests/i915/gem_mmap_gtt.c               |  4 +++-
 tests/i915/gem_mmap_offset_exhaustion.c |  2 ++
 tests/i915/gem_mmap_wc.c                |  2 ++
 tests/i915/gem_persistent_relocs.c      |  2 ++
 tests/i915/gem_pwrite_pread.c           |  6 ++++++
 tests/i915/gem_reloc_vs_gpu.c           | 21 ++++++++++++---------
 tests/i915/gem_render_copy.c            |  2 ++
 tests/i915/gem_set_tiling_vs_gtt.c      |  2 ++
 tests/i915/gem_set_tiling_vs_pwrite.c   |  2 ++
 tests/i915/gem_shrink.c                 | 14 +++++++++++---
 tests/i915/gem_storedw_loop.c           |  9 +++++++++
 tests/i915/gem_streaming_writes.c       | 16 ++++++++++++++--
 tests/i915/gem_tiled_fence_blits.c      |  1 +
 tests/i915/gem_tiled_pread_basic.c      |  1 +
 tests/i915/gem_tiled_pread_pwrite.c     |  4 +++-
 tests/i915/gem_tiled_swapping.c         |  2 ++
 tests/i915/gem_tiled_wb.c               |  2 ++
 tests/i915/gem_tiled_wc.c               |  1 +
 tests/i915/gem_tiling_max_stride.c      |  3 ++-
 tests/i915/gem_userptr_blits.c          | 10 +++++++++-
 tests/i915/i915_pm_rpm.c                |  5 +++++
 tests/i915/i915_suspend.c               |  2 ++
 tests/kms_draw_crc.c                    |  8 ++++++--
 tests/kms_fence_pin_leak.c              |  2 ++
 tests/kms_frontbuffer_tracking.c        |  3 +++
 tests/kms_psr.c                         |  4 ++++
 tests/prime_mmap.c                      |  2 ++
 tests/prime_mmap_coherency.c            |  1 +
 tests/prime_vgem.c                      |  5 +++++
 44 files changed, 163 insertions(+), 24 deletions(-)

diff --git a/lib/igt_dummyload.c b/lib/igt_dummyload.c
index 982906f2..a9c0ffef 100644
--- a/lib/igt_dummyload.c
+++ b/lib/igt_dummyload.c
@@ -116,9 +116,11 @@ emit_recursive_batch(igt_spin_t *spin,
 	obj[BATCH].handle = gem_create(fd, BATCH_SIZE);
 	batch = __gem_mmap__wc(fd, obj[BATCH].handle,
 			       0, BATCH_SIZE, PROT_WRITE);
-	if (!batch)
+	if (!batch) {
+		gem_require_mmap_gtt(fd);
 		batch = gem_mmap__gtt(fd, obj[BATCH].handle,
 				       	BATCH_SIZE, PROT_WRITE);
+	}
 	gem_set_domain(fd, obj[BATCH].handle,
 			I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
 	execbuf->buffer_count++;
diff --git a/lib/igt_fb.c b/lib/igt_fb.c
index 462afec2..4b561ba2 100644
--- a/lib/igt_fb.c
+++ b/lib/igt_fb.c
@@ -1559,9 +1559,11 @@ static void *map_bo(int fd, struct igt_fb *fb)
 	if (fb->is_dumb)
 		ptr = kmstest_dumb_map_buffer(fd, fb->gem_handle, fb->size,
 					      PROT_READ | PROT_WRITE);
-	else
+	else {
+		gem_require_mmap_gtt(fd);
 		ptr = gem_mmap__gtt(fd, fb->gem_handle, fb->size,
 				    PROT_READ | PROT_WRITE);
+	}
 
 	return ptr;
 }
diff --git a/tests/i915/gem_concurrent_all.c b/tests/i915/gem_concurrent_all.c
index 6049372d..1ab608ef 100644
--- a/tests/i915/gem_concurrent_all.c
+++ b/tests/i915/gem_concurrent_all.c
@@ -1422,6 +1422,7 @@ static void cpu_require(void)
 
 static void gtt_require(void)
 {
+	gem_require_mmap_gtt(fd);
 }
 
 static void bcs_require(void)
diff --git a/tests/i915/gem_ctx_sseu.c b/tests/i915/gem_ctx_sseu.c
index 3afa5c15..bf1b50d5 100644
--- a/tests/i915/gem_ctx_sseu.c
+++ b/tests/i915/gem_ctx_sseu.c
@@ -528,8 +528,10 @@ igt_main
 		igt_subtest("invalid-sseu")
 			test_invalid_sseu(fd);
 
-		igt_subtest("ggtt-args")
+		igt_subtest("ggtt-args") {
+			gem_require_mmap_gtt(fd);
 			test_ggtt_args(fd);
+		}
 
 		igt_subtest("engines")
 			test_engines(fd);
diff --git a/tests/i915/gem_exec_basic.c b/tests/i915/gem_exec_basic.c
index dcb83864..8537665f 100644
--- a/tests/i915/gem_exec_basic.c
+++ b/tests/i915/gem_exec_basic.c
@@ -93,6 +93,7 @@ static void gtt(int fd, unsigned ring)
 	struct drm_i915_gem_exec_object2 *exec;
 	uint32_t handle;
 
+	gem_require_mmap_gtt(fd);
 	gem_require_ring(fd, ring);
 
 	handle = gem_create(fd, 4096);
diff --git a/tests/i915/gem_exec_faulting_reloc.c b/tests/i915/gem_exec_faulting_reloc.c
index 6b05e43f..9db80f54 100644
--- a/tests/i915/gem_exec_faulting_reloc.c
+++ b/tests/i915/gem_exec_faulting_reloc.c
@@ -173,6 +173,8 @@ static void run(int object_size)
 
 	fd = drm_open_driver(DRIVER_INTEL);
 	igt_require_gem(fd);
+	gem_require_mmap_gtt(fd);
+
 	devid = intel_get_drm_devid(fd);
 	handle = gem_create(fd, 4096);
 	src = gem_create(fd, object_size);
diff --git a/tests/i915/gem_exec_flush.c b/tests/i915/gem_exec_flush.c
index f820b2a8..42749bc4 100644
--- a/tests/i915/gem_exec_flush.c
+++ b/tests/i915/gem_exec_flush.c
@@ -79,6 +79,9 @@ static void run(int fd, unsigned ring, int nchild, int timeout,
 {
 	const int gen = intel_gen(intel_get_drm_devid(fd));
 
+	if ((flags & COHERENT) && !(flags & WC))
+		gem_require_mmap_gtt(fd);
+
 	/* The crux of this testing is whether writes by the GPU are coherent
 	 * from the CPU.
 	 *
@@ -586,6 +589,7 @@ igt_main
 		fd = drm_open_driver(DRIVER_INTEL);
 		igt_require_gem(fd);
 		gem_require_mmap_wc(fd);
+		gem_require_mmap_gtt(fd);
 		igt_require(gem_can_store_dword(fd, 0));
 		igt_info("Has LLC? %s\n", yesno(gem_has_llc(fd)));
 
@@ -614,11 +618,13 @@ igt_main
 				      b->name,
 				      e->name)
 				batch(fd, ring, ncpus, timeout, b->mode, 0);
+
 			igt_subtest_f("%sbatch-%s-%s-wb",
 				      b == batches && e->exec_id == 0 ? "basic-" : "",
 				      b->name,
 				      e->name)
 				batch(fd, ring, ncpus, timeout, b->mode, COHERENT);
+
 			igt_subtest_f("%sbatch-%s-%s-cmd",
 				      b == batches && e->exec_id == 0 ? "basic-" : "",
 				      b->name,
diff --git a/tests/i915/gem_exec_reloc.c b/tests/i915/gem_exec_reloc.c
index 837f60a6..bb4eec31 100644
--- a/tests/i915/gem_exec_reloc.c
+++ b/tests/i915/gem_exec_reloc.c
@@ -115,6 +115,9 @@ static void from_mmap(int fd, uint64_t size, enum mode mode)
 	 */
 	intel_require_memory(2, size, CHECK_RAM);
 
+	if ((mode & ~RO) == GTT)
+		gem_require_mmap_gtt(fd);
+
 	memset(&obj, 0, sizeof(obj));
 	obj.handle = gem_create(fd, 4096);
 	gem_write(fd, obj.handle, 0, &bbe, sizeof(bbe));
@@ -342,6 +345,9 @@ static void basic_reloc(int fd, unsigned before, unsigned after, unsigned flags)
 	const uint32_t bbe = MI_BATCH_BUFFER_END;
 	unsigned int reloc_offset;
 
+	if ((before | after) & I915_GEM_DOMAIN_GTT)
+		gem_require_mmap_gtt(fd);
+
 	memset(&obj, 0, sizeof(obj));
 	obj.handle = gem_create(fd, OBJSZ);
 	obj.relocs_ptr = to_user_pointer(&reloc);
@@ -711,6 +717,7 @@ igt_main
 					      f->name) {
 					if ((m->before | m->after) & I915_GEM_DOMAIN_WC)
 						igt_require(gem_mmap__has_wc(fd));
+
 					basic_reloc(fd, m->before, m->after, f->flags);
 				}
 			}
diff --git a/tests/i915/gem_exec_schedule.c b/tests/i915/gem_exec_schedule.c
index a9383000..15c8440f 100644
--- a/tests/i915/gem_exec_schedule.c
+++ b/tests/i915/gem_exec_schedule.c
@@ -1236,6 +1236,7 @@ igt_main
 			igt_subtest_f("independent-%s", e->name) {
 				igt_require(gem_ring_has_physical_engine(fd, e->exec_id | e->flags));
 				igt_require(gem_can_store_dword(fd, e->exec_id | e->flags));
+				gem_require_mmap_gtt(fd);
 				independent(fd, e->exec_id | e->flags);
 			}
 		}
@@ -1328,8 +1329,10 @@ igt_main
 				igt_subtest_f("wide-%s", e->name)
 					wide(fd, e->exec_id | e->flags);
 
-				igt_subtest_f("reorder-wide-%s", e->name)
+				igt_subtest_f("reorder-wide-%s", e->name) {
+					gem_require_mmap_gtt(fd);
 					reorder_wide(fd, e->exec_id | e->flags);
+				}
 
 				igt_subtest_f("smoketest-%s", e->name)
 					smoketest(fd, e->exec_id | e->flags, 5);
diff --git a/tests/i915/gem_fence_thrash.c b/tests/i915/gem_fence_thrash.c
index 2d7fb2ff..5567e37e 100644
--- a/tests/i915/gem_fence_thrash.c
+++ b/tests/i915/gem_fence_thrash.c
@@ -236,6 +236,12 @@ igt_main
 {
 	igt_skip_on_simulation();
 
+	igt_fixture {
+		int fd = drm_open_driver(DRIVER_INTEL);
+		igt_require(gem_available_fences(fd) > 0); /* GTT mapping available */
+		close(fd);
+	}
+
 	igt_subtest("bo-write-verify-none")
 		igt_assert(run_test(0, bo_write_verify, I915_TILING_NONE, 80) == 0);
 
diff --git a/tests/i915/gem_gtt_cpu_tlb.c b/tests/i915/gem_gtt_cpu_tlb.c
index 8ceef44c..e9bdb185 100644
--- a/tests/i915/gem_gtt_cpu_tlb.c
+++ b/tests/i915/gem_gtt_cpu_tlb.c
@@ -78,6 +78,7 @@ igt_simple_main
 	igt_skip_on_simulation();
 
 	fd = drm_open_driver(DRIVER_INTEL);
+	gem_require_mmap_gtt(fd);
 
 	handle = gem_create(fd, OBJ_SIZE);
 
diff --git a/tests/i915/gem_gtt_hog.c b/tests/i915/gem_gtt_hog.c
index ca730649..b2eea679 100644
--- a/tests/i915/gem_gtt_hog.c
+++ b/tests/i915/gem_gtt_hog.c
@@ -161,6 +161,7 @@ igt_simple_main
 	/* check for an intel gpu before goint nuts. */
 	int fd = drm_open_driver(DRIVER_INTEL);
 	igt_require_gem(fd);
+	gem_require_mmap_gtt(fd);
 	close(fd);
 
 	igt_skip_on_simulation();
diff --git a/tests/i915/gem_gtt_speed.c b/tests/i915/gem_gtt_speed.c
index 3d726c4e..f1778370 100644
--- a/tests/i915/gem_gtt_speed.c
+++ b/tests/i915/gem_gtt_speed.c
@@ -116,6 +116,7 @@ int main(int argc, char **argv)
 	buf = malloc(size);
 	memset(buf, 0, size);
 	fd = drm_open_driver(DRIVER_INTEL);
+	gem_require_mmap_gtt(fd);
 
 	handle = gem_create(fd, size);
 	igt_assert(handle);
diff --git a/tests/i915/gem_largeobject.c b/tests/i915/gem_largeobject.c
index 518396fa..a2d47edc 100644
--- a/tests/i915/gem_largeobject.c
+++ b/tests/i915/gem_largeobject.c
@@ -84,6 +84,8 @@ igt_simple_main
 
 	fd = drm_open_driver(DRIVER_INTEL);
 
+	gem_require_mmap_gtt(fd);
+
 	test_large_object(fd);
 
 	free(data);
diff --git a/tests/i915/gem_madvise.c b/tests/i915/gem_madvise.c
index 729a4d33..f4226a84 100644
--- a/tests/i915/gem_madvise.c
+++ b/tests/i915/gem_madvise.c
@@ -61,6 +61,8 @@ dontneed_before_mmap(void)
 	uint32_t handle;
 	char *ptr;
 
+	gem_require_mmap_gtt(fd);
+
 	handle = gem_create(fd, OBJECT_SIZE);
 	gem_madvise(fd, handle, I915_MADV_DONTNEED);
 	ptr = gem_mmap__gtt(fd, handle, OBJECT_SIZE, PROT_READ | PROT_WRITE);
@@ -89,6 +91,8 @@ dontneed_after_mmap(void)
 	uint32_t handle;
 	char *ptr;
 
+	gem_require_mmap_gtt(fd);
+
 	handle = gem_create(fd, OBJECT_SIZE);
 	ptr = gem_mmap__gtt(fd, handle, OBJECT_SIZE, PROT_READ | PROT_WRITE);
 	igt_assert(ptr);
diff --git a/tests/i915/gem_mmap_gtt.c b/tests/i915/gem_mmap_gtt.c
index f6fbbe19..99da49f6 100644
--- a/tests/i915/gem_mmap_gtt.c
+++ b/tests/i915/gem_mmap_gtt.c
@@ -828,8 +828,10 @@ igt_main
 	if (igt_run_in_simulation())
 		OBJECT_SIZE = 1 * 1024 * 1024;
 
-	igt_fixture
+	igt_fixture {
 		fd = drm_open_driver(DRIVER_INTEL);
+		gem_require_mmap_gtt(fd);
+	}
 
 	igt_subtest("basic")
 		test_access(fd);
diff --git a/tests/i915/gem_mmap_offset_exhaustion.c b/tests/i915/gem_mmap_offset_exhaustion.c
index 8c8e3fa2..86464231 100644
--- a/tests/i915/gem_mmap_offset_exhaustion.c
+++ b/tests/i915/gem_mmap_offset_exhaustion.c
@@ -82,6 +82,8 @@ igt_simple_main
 
 	fd = drm_open_driver(DRIVER_INTEL);
 
+	gem_require_mmap_gtt(fd);
+
 	/* we have 32bit of address space, so try to fit one MB more
 	 * than that. */
 	for (i = 0; i < 4096 + 1; i++)
diff --git a/tests/i915/gem_mmap_wc.c b/tests/i915/gem_mmap_wc.c
index 110883eb..78089829 100644
--- a/tests/i915/gem_mmap_wc.c
+++ b/tests/i915/gem_mmap_wc.c
@@ -319,6 +319,8 @@ test_write_gtt_read_wc(int fd)
 	uint32_t handle;
 	uint32_t *src, *dst;
 
+	gem_require_mmap_gtt(fd);
+
 	handle = gem_create(fd, OBJECT_SIZE);
 	set_domain(fd, handle);
 
diff --git a/tests/i915/gem_persistent_relocs.c b/tests/i915/gem_persistent_relocs.c
index 452fe686..17266c48 100644
--- a/tests/i915/gem_persistent_relocs.c
+++ b/tests/i915/gem_persistent_relocs.c
@@ -199,6 +199,8 @@ static void do_test(int fd, bool faulting_reloc)
 	uint32_t test;
 	int i, repeat;
 
+	gem_require_mmap_gtt(fd);
+
 	if (faulting_reloc)
 		igt_disable_prefault();
 
diff --git a/tests/i915/gem_pwrite_pread.c b/tests/i915/gem_pwrite_pread.c
index f91fc7c4..43b3987a 100644
--- a/tests/i915/gem_pwrite_pread.c
+++ b/tests/i915/gem_pwrite_pread.c
@@ -182,6 +182,8 @@ static void test_as_gtt_mmap(int fd, uint32_t src, uint32_t dst, int len)
 	int i;
 	BUILD_EXEC;
 
+	gem_require_mmap_gtt(fd);
+
 	src_ptr = gem_mmap__gtt(fd, src, OBJECT_SIZE, PROT_WRITE);
 	dst_ptr = gem_mmap__gtt(fd, dst, OBJECT_SIZE, PROT_READ);
 
@@ -309,6 +311,8 @@ int main(int argc, char **argv)
 		for (count = 1; count <= 1<<17; count <<= 1) {
 			struct timeval start, end;
 
+			gem_require_mmap_gtt(fd);
+
 			gettimeofday(&start, NULL);
 			as_gtt_mmap(fd, src, dst, tmp, object_size, count);
 			gettimeofday(&end, NULL);
@@ -387,6 +391,8 @@ int main(int argc, char **argv)
 		for (count = 1; count <= 1<<17; count <<= 1) {
 			struct timeval start, end;
 
+			gem_require_mmap_gtt(fd);
+
 			gettimeofday(&start, NULL);
 			as_gtt_mmap(fd, src, dst, tmp, object_size, count);
 			gettimeofday(&end, NULL);
diff --git a/tests/i915/gem_reloc_vs_gpu.c b/tests/i915/gem_reloc_vs_gpu.c
index d421e434..e1475a1f 100644
--- a/tests/i915/gem_reloc_vs_gpu.c
+++ b/tests/i915/gem_reloc_vs_gpu.c
@@ -159,17 +159,17 @@ static void reloc_and_emit(int fd, drm_intel_bo *target_bo, bool faulting_reloc)
 	 */
 	reloc[0].presumed_offset = -1;
 
-	handle_relocs = gem_create(fd, 4096);
-	gem_write(fd, handle_relocs, 0, reloc, sizeof(reloc));
-	gtt_relocs = gem_mmap__gtt(fd, handle_relocs, 4096,
-				   PROT_READ | PROT_WRITE);
-
 	exec[1].handle = special_bo->handle;
 	exec[1].relocation_count = 1;
 	/* A newly mmap gtt bo will fault on first access. */
-	if (faulting_reloc)
+	if (faulting_reloc) {
+		handle_relocs = gem_create(fd, 4096);
+		gem_write(fd, handle_relocs, 0, reloc, sizeof(reloc));
+		gtt_relocs = gem_mmap__gtt(fd, handle_relocs, 4096,
+						PROT_READ | PROT_WRITE);
+
 		exec[1].relocs_ptr = to_user_pointer(gtt_relocs);
-	else
+	} else
 		exec[1].relocs_ptr = to_user_pointer(reloc);
 
 	execbuf.buffers_ptr = to_user_pointer(exec);
@@ -180,7 +180,8 @@ static void reloc_and_emit(int fd, drm_intel_bo *target_bo, bool faulting_reloc)
 
 	gem_execbuf(fd, &execbuf);
 
-	gem_close(fd, handle_relocs);
+	if (faulting_reloc)
+		gem_close(fd, handle_relocs);
 }
 
 static igt_hang_t no_hang(int fd)
@@ -201,8 +202,10 @@ static void do_test(int fd, bool faulting_reloc,
 	uint32_t test;
 	int i;
 
-	if (faulting_reloc)
+	if (faulting_reloc) {
+		gem_require_mmap_gtt(fd);
 		igt_disable_prefault();
+	}
 
 	act_size = 2048;
 	dummy_bo = drm_intel_bo_alloc_tiled(bufmgr, "tiled dummy_bo", act_size, act_size,
diff --git a/tests/i915/gem_render_copy.c b/tests/i915/gem_render_copy.c
index 0cd4e50f..2a785cba 100644
--- a/tests/i915/gem_render_copy.c
+++ b/tests/i915/gem_render_copy.c
@@ -424,6 +424,8 @@ static void test(data_t *data, uint32_t tiling, bool test_ccs)
 
 	int opt_dump_aub = igt_aub_dump_enabled();
 
+	gem_require_mmap_gtt(data->drm_fd);
+
 	for (int i = 0; i < ARRAY_SIZE(src); i++)
 		scratch_buf_init(data, &src[i].buf, WIDTH, HEIGHT, src[i].tiling, false);
 	scratch_buf_init(data, &dst, WIDTH, HEIGHT, tiling, false);
diff --git a/tests/i915/gem_set_tiling_vs_gtt.c b/tests/i915/gem_set_tiling_vs_gtt.c
index 2611ec55..210d5358 100644
--- a/tests/i915/gem_set_tiling_vs_gtt.c
+++ b/tests/i915/gem_set_tiling_vs_gtt.c
@@ -60,6 +60,8 @@ igt_simple_main
 
 	fd = drm_open_driver(DRIVER_INTEL);
 
+	gem_require_mmap_gtt(fd);
+
 	if (IS_GEN2(intel_get_drm_devid(fd)))
 		tile_height = 16;
 	else
diff --git a/tests/i915/gem_set_tiling_vs_pwrite.c b/tests/i915/gem_set_tiling_vs_pwrite.c
index f0126b64..d82e20b4 100644
--- a/tests/i915/gem_set_tiling_vs_pwrite.c
+++ b/tests/i915/gem_set_tiling_vs_pwrite.c
@@ -58,6 +58,8 @@ igt_simple_main
 
 	fd = drm_open_driver(DRIVER_INTEL);
 
+	gem_require_mmap_gtt(fd);
+
 	for (i = 0; i < OBJECT_SIZE/4; i++)
 		data[i] = i;
 
diff --git a/tests/i915/gem_shrink.c b/tests/i915/gem_shrink.c
index c8e05814..9c54fcb4 100644
--- a/tests/i915/gem_shrink.c
+++ b/tests/i915/gem_shrink.c
@@ -396,6 +396,8 @@ igt_main
 	uint64_t alloc_size = 0;
 	int num_processes = 0;
 
+	bool has_gtt = false;
+
 	igt_skip_on_simulation();
 
 	igt_fixture {
@@ -426,6 +428,8 @@ igt_main
 			engines[nengine++] = engine;
 		igt_require(nengine);
 
+		has_gtt = gem_mmap__has_gtt(fd);
+
 		close(fd);
 	}
 
@@ -434,9 +438,13 @@ igt_main
 
 	for(const struct test *t = tests; t->name; t++) {
 		for(const struct mode *m = modes; m->suffix; m++) {
-			igt_subtest_f("%s%s", t->name, m->suffix)
-				run_test(num_processes, alloc_size,
-					 t->func, m->flags);
+			igt_subtest_f("%s%s", t->name, m->suffix) {
+					if (t->func == mmap_gtt)
+						igt_require(has_gtt);
+
+					run_test(num_processes, alloc_size,
+						 t->func, m->flags);
+			}
 		}
 	}
 }
diff --git a/tests/i915/gem_storedw_loop.c b/tests/i915/gem_storedw_loop.c
index b00555e0..d16a1a6b 100644
--- a/tests/i915/gem_storedw_loop.c
+++ b/tests/i915/gem_storedw_loop.c
@@ -49,6 +49,12 @@ static int devid;
 
 static unsigned coherent_domain;
 
+static bool
+uses_coherent_gtt(int fd)
+{
+	return (!gem_has_llc(fd) || gem_mmap__has_wc(fd));
+}
+
 static void *
 mmap_coherent(int fd, uint32_t handle, int size)
 {
@@ -164,6 +170,9 @@ check_test_requirements(int fd, int ringid)
 {
 	gem_require_ring(fd, ringid);
 	igt_require(gem_can_store_dword(fd, ringid));
+
+	if (uses_coherent_gtt(fd))
+		gem_require_mmap_gtt(fd);
 }
 
 igt_main
diff --git a/tests/i915/gem_streaming_writes.c b/tests/i915/gem_streaming_writes.c
index e83d69de..159cb7a6 100644
--- a/tests/i915/gem_streaming_writes.c
+++ b/tests/i915/gem_streaming_writes.c
@@ -48,6 +48,8 @@
 
 #define LOCAL_I915_EXEC_HANDLE_LUT (1<<12)
 
+#define NEEDS_GTT(mode) (mode == 1)
+
 IGT_TEST_DESCRIPTION("Test of streaming writes into active GPU sources");
 
 #define SRC 0
@@ -75,6 +77,9 @@ static void test_streaming(int fd, int mode, int sync)
 	} *batch;
 	int i, n;
 
+	if (NEEDS_GTT(mode))
+		gem_require_mmap_gtt(fd);
+
 	memset(exec, 0, sizeof(exec));
 	exec[SRC].handle = gem_create(fd, OBJECT_SIZE);
 	exec[DST].handle = gem_create(fd, OBJECT_SIZE);
@@ -245,6 +250,9 @@ static void test_batch(int fd, int mode, int reverse)
 	uint32_t *base;
 	uint32_t offset;
 
+	if (NEEDS_GTT(mode))
+		gem_require_mmap_gtt(fd);
+
 	memset(exec, 0, sizeof(exec));
 	exec[DST].handle = gem_create(fd, OBJECT_SIZE);
 	exec[SRC].handle = gem_create(fd, OBJECT_SIZE);
@@ -389,14 +397,18 @@ igt_main
 
 	igt_subtest("batch-cpu")
 		test_batch(fd, 0, 0);
-	igt_subtest("batch-gtt")
+	igt_subtest("batch-gtt") {
+		gem_require_mmap_gtt(fd);
 		test_batch(fd, 1, 0);
+	}
 	igt_subtest("batch-wc")
 		test_batch(fd, 2, 0);
 	igt_subtest("batch-reverse-cpu")
 		test_batch(fd, 0, 1);
-	igt_subtest("batch-reverse-gtt")
+	igt_subtest("batch-reverse-gtt") {
+		gem_require_mmap_gtt(fd);
 		test_batch(fd, 1, 1);
+	}
 	igt_subtest("batch-reverse-wc")
 		test_batch(fd, 2, 1);
 
diff --git a/tests/i915/gem_tiled_fence_blits.c b/tests/i915/gem_tiled_fence_blits.c
index 2453bcc0..390d0cd7 100644
--- a/tests/i915/gem_tiled_fence_blits.c
+++ b/tests/i915/gem_tiled_fence_blits.c
@@ -211,6 +211,7 @@ igt_main
 	igt_fixture {
 		fd = drm_open_driver(DRIVER_INTEL);
 		igt_require_gem(fd);
+		gem_require_mmap_gtt(fd);
 	}
 
 	igt_subtest("basic")
diff --git a/tests/i915/gem_tiled_pread_basic.c b/tests/i915/gem_tiled_pread_basic.c
index 425bb07e..d2bc84d3 100644
--- a/tests/i915/gem_tiled_pread_basic.c
+++ b/tests/i915/gem_tiled_pread_basic.c
@@ -123,6 +123,7 @@ igt_simple_main
 	uint32_t devid;
 
 	fd = drm_open_driver(DRIVER_INTEL);
+	gem_require_mmap_gtt(fd);
 
 	handle = create_bo(fd);
 	igt_require(gem_get_tiling(fd, handle, &tiling, &swizzle));
diff --git a/tests/i915/gem_tiled_pread_pwrite.c b/tests/i915/gem_tiled_pread_pwrite.c
index fcf0780a..ebf06c57 100644
--- a/tests/i915/gem_tiled_pread_pwrite.c
+++ b/tests/i915/gem_tiled_pread_pwrite.c
@@ -110,8 +110,10 @@ igt_simple_main
 	uint32_t tiling, swizzle;
 	int count;
 	int fd;
-	
+
 	fd = drm_open_driver(DRIVER_INTEL);
+	gem_require_mmap_gtt(fd);
+
 	count = SLOW_QUICK(intel_get_total_ram_mb() * 9 / 10, 8) ;
 
 	for (int i = 0; i < count/2; i++) {
diff --git a/tests/i915/gem_tiled_swapping.c b/tests/i915/gem_tiled_swapping.c
index ddf2a748..29783aba 100644
--- a/tests/i915/gem_tiled_swapping.c
+++ b/tests/i915/gem_tiled_swapping.c
@@ -175,6 +175,8 @@ igt_main
 
 		fd = drm_open_driver(DRIVER_INTEL);
 
+		gem_require_mmap_gtt(fd);
+
 		intel_purge_vm_caches(fd);
 		check_memory_layout(fd);
 
diff --git a/tests/i915/gem_tiled_wb.c b/tests/i915/gem_tiled_wb.c
index 67d54bd3..9f431529 100644
--- a/tests/i915/gem_tiled_wb.c
+++ b/tests/i915/gem_tiled_wb.c
@@ -139,6 +139,8 @@ igt_simple_main
 
 	fd = drm_open_driver(DRIVER_INTEL);
 
+	gem_require_mmap_gtt(fd);
+
 	handle = create_bo(fd);
 	get_tiling(fd, handle, &tiling, &swizzle);
 
diff --git a/tests/i915/gem_tiled_wc.c b/tests/i915/gem_tiled_wc.c
index 21390729..4a67a71d 100644
--- a/tests/i915/gem_tiled_wc.c
+++ b/tests/i915/gem_tiled_wc.c
@@ -112,6 +112,7 @@ igt_simple_main
 	uint32_t handle;
 
 	fd = drm_open_driver(DRIVER_INTEL);
+	gem_require_mmap_gtt(fd);
 	gem_require_mmap_wc(fd);
 
 	handle = create_bo(fd);
diff --git a/tests/i915/gem_tiling_max_stride.c b/tests/i915/gem_tiling_max_stride.c
index a6f97a91..b5dc053d 100644
--- a/tests/i915/gem_tiling_max_stride.c
+++ b/tests/i915/gem_tiling_max_stride.c
@@ -70,8 +70,9 @@ igt_simple_main
 
 	fd = drm_open_driver(DRIVER_INTEL);
 
-	devid = intel_get_drm_devid(fd);
+	gem_require_mmap_wc(fd);
 
+	devid = intel_get_drm_devid(fd);
 	if (intel_gen(devid) >= 7)
 		stride = 256 * 1024;
 	else if (intel_gen(devid) >= 4)
diff --git a/tests/i915/gem_userptr_blits.c b/tests/i915/gem_userptr_blits.c
index 8f8ddf43..9962e539 100644
--- a/tests/i915/gem_userptr_blits.c
+++ b/tests/i915/gem_userptr_blits.c
@@ -554,6 +554,8 @@ static int test_invalid_gtt_mapping(int fd)
 	uint32_t handle;
 	char *gtt, *map;
 
+	gem_require_mmap_gtt(fd);
+
 	/* Anonymous mapping to find a hole */
 	map = mmap(NULL, sizeof(linear) + 2 * PAGE_SIZE,
 		   PROT_READ | PROT_WRITE,
@@ -616,8 +618,10 @@ static int test_invalid_gtt_mapping(int fd)
 #define PE_BUSY 0x2
 static void test_process_exit(int fd, int flags)
 {
-	if (flags & PE_GTT_MAP)
+	if (flags & PE_GTT_MAP) {
 		igt_require(gem_has_llc(fd));
+		gem_require_mmap_gtt(fd);
+	}
 
 	igt_fork(child, 1) {
 		uint32_t handle;
@@ -700,6 +704,8 @@ static int test_map_fixed_invalidate(int fd, uint32_t flags)
 	uint32_t handle[num_handles];
 	uint32_t *ptr;
 
+	gem_require_mmap_gtt(fd);
+
 	ptr = mmap(NULL, ptr_size,
 		   PROT_READ | PROT_WRITE,
 		   MAP_SHARED | MAP_ANONYMOUS,
@@ -944,6 +950,7 @@ static int test_dmabuf(void)
 	int ret;
 
 	fd1 = drm_open_driver(DRIVER_INTEL);
+	gem_require_mmap_gtt(fd1);
 
 	handle = create_userptr_bo(fd1, sizeof(linear));
 	memset(get_handle_ptr(handle), counter, sizeof(linear));
@@ -1212,6 +1219,7 @@ static void test_readonly_mmap(int i915)
 	 */
 
 	igt_require(igt_setup_clflush());
+	gem_require_mmap_gtt(i915);
 
 	sz = 16 << 12;
 	pages = mmap(NULL, sz, PROT_WRITE, MAP_ANON | MAP_PRIVATE, -1, 0);
diff --git a/tests/i915/i915_pm_rpm.c b/tests/i915/i915_pm_rpm.c
index be296f52..01ab8390 100644
--- a/tests/i915/i915_pm_rpm.c
+++ b/tests/i915/i915_pm_rpm.c
@@ -1006,6 +1006,7 @@ static void gem_mmap_subtest(bool gtt_mmap)
 	handle = gem_create(drm_fd, buf_size);
 
 	if (gtt_mmap) {
+		gem_require_mmap_gtt(drm_fd);
 		gem_buf = gem_mmap__gtt(drm_fd, handle, buf_size,
 					PROT_READ | PROT_WRITE);
 	}
@@ -1368,6 +1369,8 @@ static void gem_evict_pwrite_subtest(void)
 	unsigned int num_trash_bos, n;
 	uint32_t buf;
 
+	gem_require_mmap_gtt(drm_fd);
+
 	num_trash_bos = gem_mappable_aperture_size() / (1024*1024) + 1;
 	trash_bos = malloc(num_trash_bos * sizeof(*trash_bos));
 	igt_assert(trash_bos);
@@ -1796,6 +1799,8 @@ static void pm_test_tiling(void)
 	/* default stride value */
 	uint32_t stride = 512;
 
+	gem_require_mmap_gtt(drm_fd);
+
 	/* calculate how many objects we can map */
 	for (i = 1 << off_bit; i <= gtt_obj_max_size; i <<= 1, max_gem_objs++)
 		;
diff --git a/tests/i915/i915_suspend.c b/tests/i915/i915_suspend.c
index 84cb3b49..4cc09525 100644
--- a/tests/i915/i915_suspend.c
+++ b/tests/i915/i915_suspend.c
@@ -49,6 +49,8 @@ test_fence_restore(int fd, bool tiled2untiled, bool hibernate)
 	uint32_t *ptr1, *ptr2, *ptr_tiled;
 	int i;
 
+	gem_require_mmap_gtt(fd);
+
 	/* We wall the tiled object with untiled canary objects to make sure
 	 * that we detect tile leaking in both directions. */
 	handle1 = gem_create(fd, OBJECT_SIZE);
diff --git a/tests/kms_draw_crc.c b/tests/kms_draw_crc.c
index ea14db9a..1a2e2d4f 100644
--- a/tests/kms_draw_crc.c
+++ b/tests/kms_draw_crc.c
@@ -329,13 +329,17 @@ igt_main
 		igt_subtest_f("draw-method-%s-%s-%s",
 			      format_str(format_idx),
 			      igt_draw_get_method_name(method),
-			      tiling_str(tiling_idx))
+			      tiling_str(tiling_idx)) {
+			gem_require_mmap_gtt(drm_fd);
 			draw_method_subtest(method, format_idx,
 					    tilings[tiling_idx]);
+		}
 	} } }
 
-	igt_subtest("fill-fb")
+	igt_subtest("fill-fb") {
+		gem_require_mmap_gtt(drm_fd);
 		fill_fb_subtest();
+	}
 
 	igt_fixture
 		teardown_environment();
diff --git a/tests/kms_fence_pin_leak.c b/tests/kms_fence_pin_leak.c
index 62c52b62..ac0f605c 100644
--- a/tests/kms_fence_pin_leak.c
+++ b/tests/kms_fence_pin_leak.c
@@ -202,6 +202,8 @@ igt_simple_main
 
 	data.drm_fd = drm_open_driver_master(DRIVER_INTEL);
 
+	gem_require_mmap_gtt(data.drm_fd);
+
 	data.devid = intel_get_drm_devid(data.drm_fd);
 
 	kmstest_set_vt_graphics_mode();
diff --git a/tests/kms_frontbuffer_tracking.c b/tests/kms_frontbuffer_tracking.c
index 4d15ce1c..78299438 100644
--- a/tests/kms_frontbuffer_tracking.c
+++ b/tests/kms_frontbuffer_tracking.c
@@ -1758,6 +1758,9 @@ static void check_test_requirements(const struct test_mode *t)
 
 	if (opt.only_pipes != PIPE_COUNT)
 		igt_require(t->pipes == opt.only_pipes);
+
+	if (t->method == IGT_DRAW_MMAP_GTT)
+		gem_require_mmap_gtt(drm.fd);
 }
 
 static void set_crtc_fbs(const struct test_mode *t)
diff --git a/tests/kms_psr.c b/tests/kms_psr.c
index 3e16a6bf..66f4fcd8 100644
--- a/tests/kms_psr.c
+++ b/tests/kms_psr.c
@@ -41,6 +41,8 @@ enum operations {
 	PLANE_ONOFF,
 };
 
+#define needs_gtt(op) if (op == MMAP_GTT) {gem_require_mmap_gtt(data.drm_fd);}
+
 static const char *op_str(enum operations op)
 {
 	static const char * const name[] = {
@@ -474,6 +476,7 @@ int main(int argc, char *argv[])
 			igt_subtest_f("%sprimary_%s",
 				      append_subtest_name[data.op_psr_mode],
 				      op_str(op)) {
+				needs_gtt(op);
 				data.op = op;
 				data.test_plane_id = DRM_PLANE_TYPE_PRIMARY;
 				test_setup(&data);
@@ -486,6 +489,7 @@ int main(int argc, char *argv[])
 			igt_subtest_f("%ssprite_%s",
 				      append_subtest_name[data.op_psr_mode],
 				      op_str(op)) {
+				needs_gtt(op);
 				data.op = op;
 				data.test_plane_id = DRM_PLANE_TYPE_OVERLAY;
 				test_setup(&data);
diff --git a/tests/prime_mmap.c b/tests/prime_mmap.c
index 67a6a232..e6258651 100644
--- a/tests/prime_mmap.c
+++ b/tests/prime_mmap.c
@@ -78,6 +78,8 @@ test_correct(void)
 	char *ptr1, *ptr2;
 	uint32_t handle;
 
+	gem_require_mmap_gtt(fd);
+
 	handle = gem_create(fd, BO_SIZE);
 	fill_bo(handle, BO_SIZE);
 
diff --git a/tests/prime_mmap_coherency.c b/tests/prime_mmap_coherency.c
index 04b15ddd..9c344df9 100644
--- a/tests/prime_mmap_coherency.c
+++ b/tests/prime_mmap_coherency.c
@@ -295,6 +295,7 @@ int main(int argc, char **argv)
 	 * reproducing boils down to trial and error to hit different scenarios.
 	 * TODO: We may want to improve tests a bit by picking random subranges. */
 	igt_subtest("read") {
+		gem_require_mmap_gtt(fd);
 		igt_until_timeout(5) {
 			int stale = test_read_flush();
 			igt_fail_on_f(stale,
diff --git a/tests/prime_vgem.c b/tests/prime_vgem.c
index 60bb951c..0c60d569 100644
--- a/tests/prime_vgem.c
+++ b/tests/prime_vgem.c
@@ -125,6 +125,8 @@ static void test_fence_mmap(int i915, int vgem)
 	int dmabuf, i;
 	int master[2], slave[2];
 
+	gem_require_mmap_gtt(i915);
+
 	igt_assert(pipe(master) == 0);
 	igt_assert(pipe(slave) == 0);
 
@@ -207,6 +209,8 @@ static void test_gtt(int vgem, int i915)
 	uint32_t *ptr;
 	int dmabuf, i;
 
+	gem_require_mmap_gtt(i915);
+
 	scratch.width = 1024;
 	scratch.height = 1024;
 	scratch.bpp = 32;
@@ -282,6 +286,7 @@ static void test_gtt_interleaved(int vgem, int i915)
 	uint32_t *ptr, *gtt;
 	int dmabuf, i;
 
+	gem_require_mmap_gtt(i915);
 	igt_require(is_coherent(i915));
 
 	scratch.width = 1024;
-- 
2.20.1

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[igt-dev] [RFC 5/5] igt/lib: If mappable aperture is missing return 0 size

[Antonio Argenziano]

So far the aperture size has been read directly from the bar,
in this patch we return zero if the mappable aperture is not available
as the value stored in the bar might not be accurate. The patch also adds a
'require' when a call to gem_mappable_aperture_size() is made so that
the aperture is guaranteed to exist before checking the size.

Cc: Katarzyna Dec <katarzyna.dec@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Matthew Auld <matthew.auld@intel.com>
Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
---
 lib/ioctl_wrappers.c            | 28 +++++++++++++++++++---------
 lib/ioctl_wrappers.h            |  2 +-
 tests/i915/gem_concurrent_all.c | 12 ++++++------
 tests/i915/gem_cpu_reloc.c      | 14 ++++++++++----
 tests/i915/gem_mmap.c           |  4 ++--
 tests/i915/gem_mmap_gtt.c       | 10 +++++-----
 tests/i915/gem_pwrite.c         |  4 ++--
 tests/i915/gem_shrink.c         |  2 +-
 tests/i915/i915_pm_rpm.c        |  2 +-
 tests/kms_flip.c                |  2 +-
 tests/prime_mmap.c              |  7 +++++--
 11 files changed, 53 insertions(+), 34 deletions(-)

diff --git a/lib/ioctl_wrappers.c b/lib/ioctl_wrappers.c
index 25dd8ad3..ab7c7a5e 100644
--- a/lib/ioctl_wrappers.c
+++ b/lib/ioctl_wrappers.c
@@ -1440,19 +1440,14 @@ uint64_t gem_aperture_size(int fd)
 	return aperture_size;
 }
 
-/**
- * gem_mappable_aperture_size:
- *
- * Feature test macro to query the kernel for the mappable gpu aperture size.
- * This is the area available for GTT memory mappings.
- *
- * Returns: The mappable gtt address space size.
- */
-uint64_t gem_mappable_aperture_size(void)
+static uint64_t __gem_mappable_aperture_size(int fd)
 {
 	struct pci_device *pci_dev = intel_get_pci_device();
 	int bar;
 
+	if (!gem_mmap__has_gtt(fd))
+		return 0; /* Aperture not available */
+
 	if (intel_gen(pci_dev->device_id) < 3)
 		bar = 0;
 	else
@@ -1461,6 +1456,21 @@ uint64_t gem_mappable_aperture_size(void)
 	return pci_dev->regions[bar].size;
 }
 
+/**
+ * gem_mappable_aperture_size:
+ *
+ * Feature test macro to query the kernel for the mappable gpu aperture size.
+ * This is the area available for GTT memory mappings.
+ *
+ * Returns: The mappable gtt address space size.
+ */
+uint64_t gem_mappable_aperture_size(int fd)
+{
+	gem_require_mmap_gtt(fd);
+
+	return __gem_mappable_aperture_size(fd);
+}
+
 /**
  * gem_global_aperture_size:
  * @fd: open i915 drm file descriptor
diff --git a/lib/ioctl_wrappers.h b/lib/ioctl_wrappers.h
index 693020ed..2d4e06ed 100644
--- a/lib/ioctl_wrappers.h
+++ b/lib/ioctl_wrappers.h
@@ -169,7 +169,7 @@ uint64_t gem_total_stolen_size(int fd);
 uint64_t gem_available_aperture_size(int fd);
 uint64_t gem_aperture_size(int fd);
 uint64_t gem_global_aperture_size(int fd);
-uint64_t gem_mappable_aperture_size(void);
+uint64_t gem_mappable_aperture_size(int fd);
 bool gem_has_softpin(int fd);
 bool gem_has_exec_fence(int fd);
 
diff --git a/tests/i915/gem_concurrent_all.c b/tests/i915/gem_concurrent_all.c
index 1ab608ef..e4fc1426 100644
--- a/tests/i915/gem_concurrent_all.c
+++ b/tests/i915/gem_concurrent_all.c
@@ -1851,7 +1851,7 @@ igt_main
 				 c->name, s->name, "small");
 			igt_subtest_group {
 				igt_fixture {
-					count = num_buffers(gem_mappable_aperture_size()/4,
+					count = num_buffers(gem_mappable_aperture_size(fd)/4,
 							    s, c, CHECK_RAM);
 				}
 				run_modes(name, c, modes, s, count);
@@ -1862,7 +1862,7 @@ igt_main
 				 c->name, s->name, "thrash");
 			igt_subtest_group {
 				igt_fixture {
-					count = num_buffers(gem_mappable_aperture_size(),
+					count = num_buffers(gem_mappable_aperture_size(fd),
 							    s, c, CHECK_RAM);
 				}
 				run_modes(name, c, modes, s, count);
@@ -1894,7 +1894,7 @@ igt_main
 				 c->name, s->name, "shrink");
 			igt_subtest_group {
 				igt_fixture {
-					count = num_buffers(gem_mappable_aperture_size(),
+					count = num_buffers(gem_mappable_aperture_size(fd),
 							    s, c, CHECK_RAM);
 
 					igt_fork_shrink_helper(fd);
@@ -1910,8 +1910,8 @@ igt_main
 				 c->name, s->name, "swap");
 			igt_subtest_group {
 				igt_fixture {
-					if (intel_get_avail_ram_mb() > gem_mappable_aperture_size()/(1024*1024)) {
-						pin_sz = intel_get_avail_ram_mb() - gem_mappable_aperture_size()/(1024*1024);
+					if (intel_get_avail_ram_mb() > gem_mappable_aperture_size(fd)/(1024*1024)) {
+						pin_sz = intel_get_avail_ram_mb() - gem_mappable_aperture_size(fd)/(1024*1024);
 
 						igt_debug("Pinning %lld MiB\n", (long long)pin_sz);
 						pin_sz *= 1024 * 1024;
@@ -1925,7 +1925,7 @@ igt_main
 						igt_require(pinned);
 					}
 
-					count = num_buffers(gem_mappable_aperture_size(),
+					count = num_buffers(gem_mappable_aperture_size(fd),
 							    s, c, CHECK_RAM | CHECK_SWAP);
 				}
 				run_modes(name, c, modes, s, count);
diff --git a/tests/i915/gem_cpu_reloc.c b/tests/i915/gem_cpu_reloc.c
index 47099862..58fd4470 100644
--- a/tests/i915/gem_cpu_reloc.c
+++ b/tests/i915/gem_cpu_reloc.c
@@ -283,8 +283,11 @@ igt_main
 		run_test(i915, 1);
 
 	igt_subtest("full") {
-		uint64_t aper_size = gem_mappable_aperture_size();
-		unsigned long count = aper_size / 4096 + 1;
+		uint64_t aper_size;
+		unsigned long count;
+
+		aper_size = gem_mappable_aperture_size(i915);
+		count = aper_size / 4096 + 1;
 
 		intel_require_memory(count, 4096, CHECK_RAM);
 
@@ -292,10 +295,13 @@ igt_main
 	}
 
 	igt_subtest("forked") {
-		uint64_t aper_size = gem_mappable_aperture_size();
-		unsigned long count = aper_size / 4096 + 1;
+		uint64_t aper_size;
+		unsigned long count;
 		int ncpus = sysconf(_SC_NPROCESSORS_ONLN);
 
+		aper_size = gem_mappable_aperture_size(i915);
+		count = aper_size / 4096 + 1;
+
 		intel_require_memory(count, 4096, CHECK_RAM);
 
 		igt_fork(child, ncpus)
diff --git a/tests/i915/gem_mmap.c b/tests/i915/gem_mmap.c
index 0ed15878..4e30fec1 100644
--- a/tests/i915/gem_mmap.c
+++ b/tests/i915/gem_mmap.c
@@ -53,10 +53,10 @@ test_huge_bo(int huge)
 
 	switch (huge) {
 	case -1:
-		huge_object_size = gem_mappable_aperture_size() / 2;
+		huge_object_size = gem_mappable_aperture_size(fd) / 2;
 		break;
 	case 0:
-		huge_object_size = gem_mappable_aperture_size() + PAGE_SIZE;
+		huge_object_size = gem_mappable_aperture_size(fd) + PAGE_SIZE;
 		break;
 	case 1:
 		huge_object_size = gem_aperture_size(fd) + PAGE_SIZE;
diff --git a/tests/i915/gem_mmap_gtt.c b/tests/i915/gem_mmap_gtt.c
index 99da49f6..3add4b93 100644
--- a/tests/i915/gem_mmap_gtt.c
+++ b/tests/i915/gem_mmap_gtt.c
@@ -527,7 +527,7 @@ test_huge_bo(int fd, int huge, int tiling)
 
 	switch (huge) {
 	case -1:
-		size = gem_mappable_aperture_size() / 2;
+		size = gem_mappable_aperture_size(fd) / 2;
 
 		/* Power of two fence size, natural fence
 		 * alignment, and the guard page at the end
@@ -542,7 +542,7 @@ test_huge_bo(int fd, int huge, int tiling)
 			size /= 2;
 		break;
 	case 0:
-		size = gem_mappable_aperture_size() + PAGE_SIZE;
+		size = gem_mappable_aperture_size(fd) + PAGE_SIZE;
 		break;
 	default:
 		size = gem_global_aperture_size(fd) + PAGE_SIZE;
@@ -623,13 +623,13 @@ test_huge_copy(int fd, int huge, int tiling_a, int tiling_b, int ncpus)
 
 	switch (huge) {
 	case -2:
-		huge_object_size = gem_mappable_aperture_size() / 4;
+		huge_object_size = gem_mappable_aperture_size(fd) / 4;
 		break;
 	case -1:
-		huge_object_size = gem_mappable_aperture_size() / 2;
+		huge_object_size = gem_mappable_aperture_size(fd) / 2;
 		break;
 	case 0:
-		huge_object_size = gem_mappable_aperture_size() + PAGE_SIZE;
+		huge_object_size = gem_mappable_aperture_size(fd) + PAGE_SIZE;
 		break;
 	case 1:
 		huge_object_size = gem_global_aperture_size(fd) + PAGE_SIZE;
diff --git a/tests/i915/gem_pwrite.c b/tests/i915/gem_pwrite.c
index 696bd316..5cae121a 100644
--- a/tests/i915/gem_pwrite.c
+++ b/tests/i915/gem_pwrite.c
@@ -89,7 +89,7 @@ static void test_big_cpu(int fd, int scale, unsigned flags)
 
 	switch (scale) {
 	case 0:
-		size = gem_mappable_aperture_size() + 4096;
+		size = gem_mappable_aperture_size(fd) + 4096;
 		break;
 	case 1:
 		size = gem_global_aperture_size(fd) + 4096;
@@ -151,7 +151,7 @@ static void test_big_gtt(int fd, int scale, unsigned flags)
 	igt_require(gem_mmap__has_wc(fd));
 	switch (scale) {
 	case 0:
-		size = gem_mappable_aperture_size() + 4096;
+		size = gem_mappable_aperture_size(fd) + 4096;
 		break;
 	case 1:
 		size = gem_global_aperture_size(fd) + 4096;
diff --git a/tests/i915/gem_shrink.c b/tests/i915/gem_shrink.c
index 9c54fcb4..598e1ebf 100644
--- a/tests/i915/gem_shrink.c
+++ b/tests/i915/gem_shrink.c
@@ -411,7 +411,7 @@ igt_main
 		 * we expect the shrinker to start purging objects,
 		 * and possibly fail.
 		 */
-		alloc_size = gem_mappable_aperture_size() / 2;
+		alloc_size = gem_mappable_aperture_size(fd) / 2;
 		num_processes = 1 + (mem_size / (alloc_size >> 20));
 
 		igt_info("Using %d processes and %'lluMiB per process\n",
diff --git a/tests/i915/i915_pm_rpm.c b/tests/i915/i915_pm_rpm.c
index 01ab8390..8e8cb073 100644
--- a/tests/i915/i915_pm_rpm.c
+++ b/tests/i915/i915_pm_rpm.c
@@ -1371,7 +1371,7 @@ static void gem_evict_pwrite_subtest(void)
 
 	gem_require_mmap_gtt(drm_fd);
 
-	num_trash_bos = gem_mappable_aperture_size() / (1024*1024) + 1;
+	num_trash_bos = gem_mappable_aperture_size(drm_fd) / (1024*1024) + 1;
 	trash_bos = malloc(num_trash_bos * sizeof(*trash_bos));
 	igt_assert(trash_bos);
 
diff --git a/tests/kms_flip.c b/tests/kms_flip.c
index 798fc4e8..005b1f28 100755
--- a/tests/kms_flip.c
+++ b/tests/kms_flip.c
@@ -1231,7 +1231,7 @@ static void run_test_on_crtc_set(struct test_output *o, int *crtc_idxs,
 	/* 256 MB is usually the maximum mappable aperture,
 	 * (make it 4x times that to ensure failure) */
 	if (o->flags & TEST_BO_TOOBIG) {
-		bo_size = 4*gem_mappable_aperture_size();
+		bo_size = 4*gem_mappable_aperture_size(drm_fd);
 		igt_require(bo_size < gem_global_aperture_size(drm_fd));
 	}
 
diff --git a/tests/prime_mmap.c b/tests/prime_mmap.c
index e6258651..c96ab772 100644
--- a/tests/prime_mmap.c
+++ b/tests/prime_mmap.c
@@ -448,8 +448,11 @@ test_aperture_limit(void)
 	char *ptr1, *ptr2;
 	uint32_t handle1, handle2;
 	/* Two buffers the sum of which > mappable aperture */
-	uint64_t size1 = (gem_mappable_aperture_size() * 7) / 8;
-	uint64_t size2 = (gem_mappable_aperture_size() * 3) / 8;
+	uint64_t size1;
+	uint64_t size2;
+
+	size1 = (gem_mappable_aperture_size(fd) * 7) / 8;
+	size2 = (gem_mappable_aperture_size(fd) * 3) / 8;
 
 	handle1 = gem_create(fd, size1);
 	fill_bo(handle1, BO_SIZE);
-- 
2.20.1

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Re: [igt-dev] [RFC 1/5] tests/prime_self_import: Swap gtt mapping for cpu

[Chris Wilson]

Quoting Antonio Argenziano (2019-02-21 19:27:41)
> The test uses gtt mapping to check two BOs have the same content, since
> it seems there is no contention on the BOs use cpu mapping to make it
> compatible with platforms that do not have a mappable aperture.
> 
> Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
> ---
>  tests/prime_self_import.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/tests/prime_self_import.c b/tests/prime_self_import.c
> index 8c4f5321..905ffffb 100644
> --- a/tests/prime_self_import.c
> +++ b/tests/prime_self_import.c
> @@ -59,8 +59,8 @@ check_bo(int fd1, uint32_t handle1, int fd2, uint32_t handle2)
>         char *ptr1, *ptr2;
>         int i;
>  
> -       ptr1 = gem_mmap__gtt(fd1, handle1, BO_SIZE, PROT_READ | PROT_WRITE);
> -       ptr2 = gem_mmap__gtt(fd2, handle2, BO_SIZE, PROT_READ | PROT_WRITE);
> +       ptr1 = gem_mmap__cpu(fd1, handle1, 0, BO_SIZE, PROT_READ | PROT_WRITE);
> +       ptr2 = gem_mmap__cpu(fd2, handle2, 0, BO_SIZE, PROT_READ | PROT_WRITE);

set_domain() would be required for pedagogy, mmap__gtt is magic.
-Chris
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Re: [igt-dev] [RFC 2/5] lib/ioctl_wrappers: add mmap_offset support

[Chris Wilson]

Quoting Antonio Argenziano (2019-02-21 19:27:42)
> From: "Kalamarz, Lukasz" <lukasz.kalamarz@intel.com>
> 
> With recently proposed changes, IGT need to start supporting new
> way of mmaping object, which will be used from now by default.
> This patch modify gem_mmap_wc and gem_mmap functions to be
> in sync with those changes.
> 
> Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
> Cc: Janulgue Abdiel <abdiel.janulgue@intel.com>
> Cc: Matthew Auld <matthew.auld@intel.com>
> Cc: Michal Winiarski <michal.winiarski@intel.com>
> Cc: Antonio Argenziano <antonio.argenziano@intel.com>
> Cc: Daniele Spurio Ceraolo <daniele.ceraolospurio@intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> ---
>  lib/ioctl_wrappers.c | 150 +++++++++++++++++++++++++++++++++++++------
>  1 file changed, 129 insertions(+), 21 deletions(-)
> 
> diff --git a/lib/ioctl_wrappers.c b/lib/ioctl_wrappers.c
> index 404c2fbf..d9b46088 100644
> --- a/lib/ioctl_wrappers.c
> +++ b/lib/ioctl_wrappers.c
> @@ -641,6 +641,24 @@ void gem_execbuf_wr(int fd, struct drm_i915_gem_execbuffer2 *execbuf)
>         igt_assert_eq(__gem_execbuf_wr(fd, execbuf), 0);
>  }
>  
> +static bool has_mmap_offset(int fd)
> +{
> +       static int has_mmap_offset = -1;

a) nothing new in ioctl_wrappers, please

b) do not repeat the mistakes of using static, assuming all fd are the
same. Just don't call has_mmap_offset() more than is strictly required.
-Chris
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Re: [igt-dev] [RFC 3/5] igt/lib: Add wrapper to check if gtt mapping is available

[Chris Wilson]

Quoting Antonio Argenziano (2019-02-21 19:27:43)
> Add wrapper to get mmap_gtt version number and another to check if
> gtt mapping is at all available.
> 
> Cc: Katarzyna Dec <katarzyna.dec@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Matthew Auld <matthew.auld@intel.com>
> Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> ---
>  lib/ioctl_wrappers.c | 47 ++++++++++++++++++++++++++++++++++++--------
>  lib/ioctl_wrappers.h | 11 +++++++++++
>  2 files changed, 50 insertions(+), 8 deletions(-)
> 
> diff --git a/lib/ioctl_wrappers.c b/lib/ioctl_wrappers.c
> index d9b46088..25dd8ad3 100644
> --- a/lib/ioctl_wrappers.c
> +++ b/lib/ioctl_wrappers.c
> @@ -659,6 +659,42 @@ static bool has_mmap_offset(int fd)
>         return has_mmap_offset > 0;
>  }
>  
> +/**
> + * gem_mmap__gtt_version:
> + * @fd: open i915 drm file descriptor
> + *
> + * This wraps I915_PARAM_MMAP_GTT_VERSION. It will return the supported feature
> + * set for gtt mapping. Since the mappable aperture in not always present, this
> + * function will return '-1' in case there is none.
> + */
> +static int gem_mmap__gtt_version(int fd)
> +{
> +       static int gtt_version = ~0;
> +
> +       if (gtt_version == ~0) {
> +                       struct drm_i915_getparam gp;
> +
> +                       gtt_version = 0;
> +
> +                       memset(&gp, 0, sizeof(gp));
> +                       gp.param = I915_PARAM_MMAP_GTT_VERSION;
> +                       gp.value = &gtt_version;
> +                       ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
> +
> +                       if(errno == -ENODEV)
> +                               gtt_version = -1; /* No mappable aperture */

errno is only valid after a failed syscall.

We the undersigned thoroughly dislike errno
-Chris
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Re: [igt-dev] [RFC 4/5] igt/i915: Require GTT mapping to be available when needed.

[Chris Wilson]

Quoting Antonio Argenziano (2019-02-21 19:27:44)
> With the GTT aperture becoming unavailable on certain platforms, tests
> that target that mapping need to skip if such mapping is not available.

Meh, but necessary.

A few of the coherency correctness checks, like prime, should be
extended to check via alternate paths (WC, WB + sync).
-Chris
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Re: [igt-dev] [RFC 5/5] igt/lib: If mappable aperture is missing return 0 size

[Chris Wilson]

Quoting Antonio Argenziano (2019-02-21 19:27:45)
> So far the aperture size has been read directly from the bar,
> in this patch we return zero if the mappable aperture is not available
> as the value stored in the bar might not be accurate. The patch also adds a
> 'require' when a call to gem_mappable_aperture_size() is made so that
> the aperture is guaranteed to exist before checking the size.
> 
> Cc: Katarzyna Dec <katarzyna.dec@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Matthew Auld <matthew.auld@intel.com>
> Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
> ---
>  lib/ioctl_wrappers.c            | 28 +++++++++++++++++++---------
>  lib/ioctl_wrappers.h            |  2 +-
>  tests/i915/gem_concurrent_all.c | 12 ++++++------
>  tests/i915/gem_cpu_reloc.c      | 14 ++++++++++----
>  tests/i915/gem_mmap.c           |  4 ++--
>  tests/i915/gem_mmap_gtt.c       | 10 +++++-----
>  tests/i915/gem_pwrite.c         |  4 ++--
>  tests/i915/gem_shrink.c         |  2 +-
>  tests/i915/i915_pm_rpm.c        |  2 +-
>  tests/kms_flip.c                |  2 +-
>  tests/prime_mmap.c              |  7 +++++--
>  11 files changed, 53 insertions(+), 34 deletions(-)
> 
> diff --git a/lib/ioctl_wrappers.c b/lib/ioctl_wrappers.c
> index 25dd8ad3..ab7c7a5e 100644
> --- a/lib/ioctl_wrappers.c
> +++ b/lib/ioctl_wrappers.c
> @@ -1440,19 +1440,14 @@ uint64_t gem_aperture_size(int fd)
>         return aperture_size;
>  }
>  
> -/**
> - * gem_mappable_aperture_size:
> - *
> - * Feature test macro to query the kernel for the mappable gpu aperture size.
> - * This is the area available for GTT memory mappings.
> - *
> - * Returns: The mappable gtt address space size.
> - */
> -uint64_t gem_mappable_aperture_size(void)
> +static uint64_t __gem_mappable_aperture_size(int fd)
>  {
>         struct pci_device *pci_dev = intel_get_pci_device();
>         int bar;
>  
> +       if (!gem_mmap__has_gtt(fd))
> +               return 0; /* Aperture not available */
> +
>         if (intel_gen(pci_dev->device_id) < 3)
>                 bar = 0;

I swear we made this accessible via fd so that we didn't need root to
poke around libpciacess.
-Chris
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[igt-dev] ✓ Fi.CI.BAT: success for Modify tests for unavailable mappable aperture

[Patchwork]

== Series Details ==

Series: Modify tests for unavailable mappable aperture
URL   : https://patchwork.freedesktop.org/series/57042/
State : success

== Summary ==

CI Bug Log - changes from IGT_4850 -> IGTPW_2476
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/57042/revisions/1/mbox/

Known issues
------------

  Here are the changes found in IGTPW_2476 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_pm_rpm@basic-pci-d3-state:
    - fi-hsw-4770:        PASS -> SKIP [fdo#109271] +4

  * igt@kms_busy@basic-flip-c:
    - fi-blb-e6850:       NOTRUN -> SKIP [fdo#109271] / [fdo#109278]

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-kbl-7500u:       PASS -> FAIL [fdo#109485]

  * igt@kms_pipe_crc_basic@hang-read-crc-pipe-c:
    - fi-blb-e6850:       NOTRUN -> SKIP [fdo#109271] +48

  
#### Possible fixes ####

  * igt@gem_exec_suspend@basic-s4-devices:
    - fi-blb-e6850:       INCOMPLETE [fdo#107718] -> PASS

  
  [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
  [fdo#109485]: https://bugs.freedesktop.org/show_bug.cgi?id=109485


Participating hosts (44 -> 38)
------------------------------

  Missing    (6): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-bdw-samus 


Build changes
-------------

    * IGT: IGT_4850 -> IGTPW_2476

  CI_DRM_5650: a4c5c4791699aeebfff694c222c76abb61900fca @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_2476: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2476/
  IGT_4850: 8ca0b308acdcf53fac3cf2ea3861f5f911b16986 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2476/
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Re: [igt-dev] [RFC 2/5] lib/ioctl_wrappers: add mmap_offset support

[Antonio Argenziano]

On 21/02/19 11:47, Chris Wilson wrote:
> Quoting Antonio Argenziano (2019-02-21 19:27:42)
>> From: "Kalamarz, Lukasz" <lukasz.kalamarz@intel.com>
>>
>> With recently proposed changes, IGT need to start supporting new
>> way of mmaping object, which will be used from now by default.
>> This patch modify gem_mmap_wc and gem_mmap functions to be
>> in sync with those changes.
>>
>> Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
>> Cc: Janulgue Abdiel <abdiel.janulgue@intel.com>
>> Cc: Matthew Auld <matthew.auld@intel.com>
>> Cc: Michal Winiarski <michal.winiarski@intel.com>
>> Cc: Antonio Argenziano <antonio.argenziano@intel.com>
>> Cc: Daniele Spurio Ceraolo <daniele.ceraolospurio@intel.com>
>> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
>> ---
>>   lib/ioctl_wrappers.c | 150 +++++++++++++++++++++++++++++++++++++------
>>   1 file changed, 129 insertions(+), 21 deletions(-)
>>
>> diff --git a/lib/ioctl_wrappers.c b/lib/ioctl_wrappers.c
>> index 404c2fbf..d9b46088 100644
>> --- a/lib/ioctl_wrappers.c
>> +++ b/lib/ioctl_wrappers.c
>> @@ -641,6 +641,24 @@ void gem_execbuf_wr(int fd, struct drm_i915_gem_execbuffer2 *execbuf)
>>          igt_assert_eq(__gem_execbuf_wr(fd, execbuf), 0);
>>   }
>>   
>> +static bool has_mmap_offset(int fd)
>> +{
>> +       static int has_mmap_offset = -1;
> 
> a) nothing new in ioctl_wrappers, please

i915/gem_mmap.c?

Antonio

> 
> b) do not repeat the mistakes of using static, assuming all fd are the
> same. Just don't call has_mmap_offset() more than is strictly required.
> -Chris
> 
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Re: [igt-dev] [RFC 2/5] lib/ioctl_wrappers: add mmap_offset support

[Chris Wilson]

Quoting Antonio Argenziano (2019-02-21 21:13:47)
> 
> 
> On 21/02/19 11:47, Chris Wilson wrote:
> > Quoting Antonio Argenziano (2019-02-21 19:27:42)
> >> From: "Kalamarz, Lukasz" <lukasz.kalamarz@intel.com>
> >>
> >> With recently proposed changes, IGT need to start supporting new
> >> way of mmaping object, which will be used from now by default.
> >> This patch modify gem_mmap_wc and gem_mmap functions to be
> >> in sync with those changes.
> >>
> >> Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
> >> Cc: Janulgue Abdiel <abdiel.janulgue@intel.com>
> >> Cc: Matthew Auld <matthew.auld@intel.com>
> >> Cc: Michal Winiarski <michal.winiarski@intel.com>
> >> Cc: Antonio Argenziano <antonio.argenziano@intel.com>
> >> Cc: Daniele Spurio Ceraolo <daniele.ceraolospurio@intel.com>
> >> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> >> ---
> >>   lib/ioctl_wrappers.c | 150 +++++++++++++++++++++++++++++++++++++------
> >>   1 file changed, 129 insertions(+), 21 deletions(-)
> >>
> >> diff --git a/lib/ioctl_wrappers.c b/lib/ioctl_wrappers.c
> >> index 404c2fbf..d9b46088 100644
> >> --- a/lib/ioctl_wrappers.c
> >> +++ b/lib/ioctl_wrappers.c
> >> @@ -641,6 +641,24 @@ void gem_execbuf_wr(int fd, struct drm_i915_gem_execbuffer2 *execbuf)
> >>          igt_assert_eq(__gem_execbuf_wr(fd, execbuf), 0);
> >>   }
> >>   
> >> +static bool has_mmap_offset(int fd)
> >> +{
> >> +       static int has_mmap_offset = -1;
> > 
> > a) nothing new in ioctl_wrappers, please
> 
> i915/gem_mmap.c?

Seems a good starting point. Maybe even gem_mman.c (after sys/mman.h) if
we put a little more than mmap() in there.

I wouldn't worry too much, history says we will just dump everything
semi-related into the same file until the pain becomes too much again.
-Chris
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Re: [igt-dev] [RFC 3/5] igt/lib: Add wrapper to check if gtt mapping is available

[Antonio Argenziano]

On 21/02/19 11:49, Chris Wilson wrote:
> Quoting Antonio Argenziano (2019-02-21 19:27:43)
>> Add wrapper to get mmap_gtt version number and another to check if
>> gtt mapping is at all available.
>>
>> Cc: Katarzyna Dec <katarzyna.dec@intel.com>
>> Cc: Chris Wilson <chris@chris-wilson.co.uk>
>> Cc: Matthew Auld <matthew.auld@intel.com>
>> Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
>> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
>> ---
>>   lib/ioctl_wrappers.c | 47 ++++++++++++++++++++++++++++++++++++--------
>>   lib/ioctl_wrappers.h | 11 +++++++++++
>>   2 files changed, 50 insertions(+), 8 deletions(-)
>>
>> diff --git a/lib/ioctl_wrappers.c b/lib/ioctl_wrappers.c
>> index d9b46088..25dd8ad3 100644
>> --- a/lib/ioctl_wrappers.c
>> +++ b/lib/ioctl_wrappers.c
>> @@ -659,6 +659,42 @@ static bool has_mmap_offset(int fd)
>>          return has_mmap_offset > 0;
>>   }
>>   
>> +/**
>> + * gem_mmap__gtt_version:
>> + * @fd: open i915 drm file descriptor
>> + *
>> + * This wraps I915_PARAM_MMAP_GTT_VERSION. It will return the supported feature
>> + * set for gtt mapping. Since the mappable aperture in not always present, this
>> + * function will return '-1' in case there is none.
>> + */
>> +static int gem_mmap__gtt_version(int fd)
>> +{
>> +       static int gtt_version = ~0;
>> +
>> +       if (gtt_version == ~0) {
>> +                       struct drm_i915_getparam gp;
>> +
>> +                       gtt_version = 0;
>> +
>> +                       memset(&gp, 0, sizeof(gp));
>> +                       gp.param = I915_PARAM_MMAP_GTT_VERSION;
>> +                       gp.value = &gtt_version;
>> +                       ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
>> +
>> +                       if(errno == -ENODEV)
>> +                               gtt_version = -1; /* No mappable aperture */
> 
> errno is only valid after a failed syscall.

Indeed, thanks for spotting this!

> 
> We the undersigned thoroughly dislike errno

Agreed, maybe another version value returned from the IOCTL or even a 
new PARAM_HAS_MMAP_GTT?

Antonio

> -Chris
> 
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Re: [igt-dev] [RFC 5/5] igt/lib: If mappable aperture is missing return 0 size

[Antonio Argenziano]

On 21/02/19 12:01, Chris Wilson wrote:
> Quoting Antonio Argenziano (2019-02-21 19:27:45)
>> So far the aperture size has been read directly from the bar,
>> in this patch we return zero if the mappable aperture is not available
>> as the value stored in the bar might not be accurate. The patch also adds a
>> 'require' when a call to gem_mappable_aperture_size() is made so that
>> the aperture is guaranteed to exist before checking the size.
>>
>> Cc: Katarzyna Dec <katarzyna.dec@intel.com>
>> Cc: Chris Wilson <chris@chris-wilson.co.uk>
>> Cc: Matthew Auld <matthew.auld@intel.com>
>> Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
>> ---
>>   lib/ioctl_wrappers.c            | 28 +++++++++++++++++++---------
>>   lib/ioctl_wrappers.h            |  2 +-
>>   tests/i915/gem_concurrent_all.c | 12 ++++++------
>>   tests/i915/gem_cpu_reloc.c      | 14 ++++++++++----
>>   tests/i915/gem_mmap.c           |  4 ++--
>>   tests/i915/gem_mmap_gtt.c       | 10 +++++-----
>>   tests/i915/gem_pwrite.c         |  4 ++--
>>   tests/i915/gem_shrink.c         |  2 +-
>>   tests/i915/i915_pm_rpm.c        |  2 +-
>>   tests/kms_flip.c                |  2 +-
>>   tests/prime_mmap.c              |  7 +++++--
>>   11 files changed, 53 insertions(+), 34 deletions(-)
>>
>> diff --git a/lib/ioctl_wrappers.c b/lib/ioctl_wrappers.c
>> index 25dd8ad3..ab7c7a5e 100644
>> --- a/lib/ioctl_wrappers.c
>> +++ b/lib/ioctl_wrappers.c
>> @@ -1440,19 +1440,14 @@ uint64_t gem_aperture_size(int fd)
>>          return aperture_size;
>>   }
>>   
>> -/**
>> - * gem_mappable_aperture_size:
>> - *
>> - * Feature test macro to query the kernel for the mappable gpu aperture size.
>> - * This is the area available for GTT memory mappings.
>> - *
>> - * Returns: The mappable gtt address space size.
>> - */
>> -uint64_t gem_mappable_aperture_size(void)
>> +static uint64_t __gem_mappable_aperture_size(int fd)
>>   {
>>          struct pci_device *pci_dev = intel_get_pci_device();
>>          int bar;
>>   
>> +       if (!gem_mmap__has_gtt(fd))
>> +               return 0; /* Aperture not available */
>> +
>>          if (intel_gen(pci_dev->device_id) < 3)
>>                  bar = 0;
> 
> I swear we made this accessible via fd so that we didn't need root to
> poke around libpciacess.

mhh, couldn't find it. Is it in some IOCTL?

Antonio

> -Chris
> 
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Re: [igt-dev] [RFC 1/5] tests/prime_self_import: Swap gtt mapping for cpu

[Antonio Argenziano]

On 21/02/19 11:46, Chris Wilson wrote:
> Quoting Antonio Argenziano (2019-02-21 19:27:41)
>> The test uses gtt mapping to check two BOs have the same content, since
>> it seems there is no contention on the BOs use cpu mapping to make it
>> compatible with platforms that do not have a mappable aperture.
>>
>> Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
>> ---
>>   tests/prime_self_import.c | 4 ++--
>>   1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/tests/prime_self_import.c b/tests/prime_self_import.c
>> index 8c4f5321..905ffffb 100644
>> --- a/tests/prime_self_import.c
>> +++ b/tests/prime_self_import.c
>> @@ -59,8 +59,8 @@ check_bo(int fd1, uint32_t handle1, int fd2, uint32_t handle2)
>>          char *ptr1, *ptr2;
>>          int i;
>>   
>> -       ptr1 = gem_mmap__gtt(fd1, handle1, BO_SIZE, PROT_READ | PROT_WRITE);
>> -       ptr2 = gem_mmap__gtt(fd2, handle2, BO_SIZE, PROT_READ | PROT_WRITE);
>> +       ptr1 = gem_mmap__cpu(fd1, handle1, 0, BO_SIZE, PROT_READ | PROT_WRITE);
>> +       ptr2 = gem_mmap__cpu(fd2, handle2, 0, BO_SIZE, PROT_READ | PROT_WRITE);
> 
> set_domain() would be required for pedagogy, mmap__gtt is magic.

Why do we need the set_domain here? It looks like we are not writing to 
those BOs.

Antonio

> -Chris
> 
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Re: [igt-dev] [RFC 5/5] igt/lib: If mappable aperture is missing return 0 size

[Chris Wilson]

Quoting Antonio Argenziano (2019-02-21 21:45:46)
> 
> 
> On 21/02/19 12:01, Chris Wilson wrote:
> > Quoting Antonio Argenziano (2019-02-21 19:27:45)
> >> So far the aperture size has been read directly from the bar,
> >> in this patch we return zero if the mappable aperture is not available
> >> as the value stored in the bar might not be accurate. The patch also adds a
> >> 'require' when a call to gem_mappable_aperture_size() is made so that
> >> the aperture is guaranteed to exist before checking the size.
> >>
> >> Cc: Katarzyna Dec <katarzyna.dec@intel.com>
> >> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> >> Cc: Matthew Auld <matthew.auld@intel.com>
> >> Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
> >> ---
> >>   lib/ioctl_wrappers.c            | 28 +++++++++++++++++++---------
> >>   lib/ioctl_wrappers.h            |  2 +-
> >>   tests/i915/gem_concurrent_all.c | 12 ++++++------
> >>   tests/i915/gem_cpu_reloc.c      | 14 ++++++++++----
> >>   tests/i915/gem_mmap.c           |  4 ++--
> >>   tests/i915/gem_mmap_gtt.c       | 10 +++++-----
> >>   tests/i915/gem_pwrite.c         |  4 ++--
> >>   tests/i915/gem_shrink.c         |  2 +-
> >>   tests/i915/i915_pm_rpm.c        |  2 +-
> >>   tests/kms_flip.c                |  2 +-
> >>   tests/prime_mmap.c              |  7 +++++--
> >>   11 files changed, 53 insertions(+), 34 deletions(-)
> >>
> >> diff --git a/lib/ioctl_wrappers.c b/lib/ioctl_wrappers.c
> >> index 25dd8ad3..ab7c7a5e 100644
> >> --- a/lib/ioctl_wrappers.c
> >> +++ b/lib/ioctl_wrappers.c
> >> @@ -1440,19 +1440,14 @@ uint64_t gem_aperture_size(int fd)
> >>          return aperture_size;
> >>   }
> >>   
> >> -/**
> >> - * gem_mappable_aperture_size:
> >> - *
> >> - * Feature test macro to query the kernel for the mappable gpu aperture size.
> >> - * This is the area available for GTT memory mappings.
> >> - *
> >> - * Returns: The mappable gtt address space size.
> >> - */
> >> -uint64_t gem_mappable_aperture_size(void)
> >> +static uint64_t __gem_mappable_aperture_size(int fd)
> >>   {
> >>          struct pci_device *pci_dev = intel_get_pci_device();
> >>          int bar;
> >>   
> >> +       if (!gem_mmap__has_gtt(fd))
> >> +               return 0; /* Aperture not available */
> >> +
> >>          if (intel_gen(pci_dev->device_id) < 3)
> >>                  bar = 0;
> > 
> > I swear we made this accessible via fd so that we didn't need root to
> > poke around libpciacess.
> 
> mhh, couldn't find it. Is it in some IOCTL?

No, we extended get_aperture_ioctl to provide it, once upon a time. I
suggest we do something similar, or we use a param to get the actual
value. (Even if it's legacy, we can still justify a usecase as I'm
pretty sure 256MiB is hardcoded into several legacy userspaces.)
-Chris
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Re: [igt-dev] [RFC 3/5] igt/lib: Add wrapper to check if gtt mapping is available

[Chris Wilson]

Quoting Antonio Argenziano (2019-02-21 21:37:50)
> 
> 
> On 21/02/19 11:49, Chris Wilson wrote:
> > Quoting Antonio Argenziano (2019-02-21 19:27:43)
> >> Add wrapper to get mmap_gtt version number and another to check if
> >> gtt mapping is at all available.
> >>
> >> Cc: Katarzyna Dec <katarzyna.dec@intel.com>
> >> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> >> Cc: Matthew Auld <matthew.auld@intel.com>
> >> Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
> >> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> >> ---
> >>   lib/ioctl_wrappers.c | 47 ++++++++++++++++++++++++++++++++++++--------
> >>   lib/ioctl_wrappers.h | 11 +++++++++++
> >>   2 files changed, 50 insertions(+), 8 deletions(-)
> >>
> >> diff --git a/lib/ioctl_wrappers.c b/lib/ioctl_wrappers.c
> >> index d9b46088..25dd8ad3 100644
> >> --- a/lib/ioctl_wrappers.c
> >> +++ b/lib/ioctl_wrappers.c
> >> @@ -659,6 +659,42 @@ static bool has_mmap_offset(int fd)
> >>          return has_mmap_offset > 0;
> >>   }
> >>   
> >> +/**
> >> + * gem_mmap__gtt_version:
> >> + * @fd: open i915 drm file descriptor
> >> + *
> >> + * This wraps I915_PARAM_MMAP_GTT_VERSION. It will return the supported feature
> >> + * set for gtt mapping. Since the mappable aperture in not always present, this
> >> + * function will return '-1' in case there is none.
> >> + */
> >> +static int gem_mmap__gtt_version(int fd)
> >> +{
> >> +       static int gtt_version = ~0;
> >> +
> >> +       if (gtt_version == ~0) {
> >> +                       struct drm_i915_getparam gp;
> >> +
> >> +                       gtt_version = 0;
> >> +
> >> +                       memset(&gp, 0, sizeof(gp));
> >> +                       gp.param = I915_PARAM_MMAP_GTT_VERSION;
> >> +                       gp.value = &gtt_version;
> >> +                       ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
> >> +
> >> +                       if(errno == -ENODEV)
> >> +                               gtt_version = -1; /* No mappable aperture */
> > 
> > errno is only valid after a failed syscall.
> 
> Indeed, thanks for spotting this!
> 
> > 
> > We the undersigned thoroughly dislike errno
> 
> Agreed, maybe another version value returned from the IOCTL or even a 
> new PARAM_HAS_MMAP_GTT?

Nah, I genuinely dislike the libc ioctl() wrapper and would much prefer
if we just returned the raw long value from the kernel sysenter.

libc_ioctl:
	push 6 args to stack
	sysenter
	ret = $eax
	if (IS_ERR_VALUE(ret)) {
		errno = ret;
		ret = -1;
	}
	return ret;
Gah,
-Chris
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Re: [igt-dev] [RFC 1/5] tests/prime_self_import: Swap gtt mapping for cpu

[Chris Wilson]

Quoting Antonio Argenziano (2019-02-21 21:51:14)
> 
> 
> On 21/02/19 11:46, Chris Wilson wrote:
> > Quoting Antonio Argenziano (2019-02-21 19:27:41)
> >> The test uses gtt mapping to check two BOs have the same content, since
> >> it seems there is no contention on the BOs use cpu mapping to make it
> >> compatible with platforms that do not have a mappable aperture.
> >>
> >> Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
> >> ---
> >>   tests/prime_self_import.c | 4 ++--
> >>   1 file changed, 2 insertions(+), 2 deletions(-)
> >>
> >> diff --git a/tests/prime_self_import.c b/tests/prime_self_import.c
> >> index 8c4f5321..905ffffb 100644
> >> --- a/tests/prime_self_import.c
> >> +++ b/tests/prime_self_import.c
> >> @@ -59,8 +59,8 @@ check_bo(int fd1, uint32_t handle1, int fd2, uint32_t handle2)
> >>          char *ptr1, *ptr2;
> >>          int i;
> >>   
> >> -       ptr1 = gem_mmap__gtt(fd1, handle1, BO_SIZE, PROT_READ | PROT_WRITE);
> >> -       ptr2 = gem_mmap__gtt(fd2, handle2, BO_SIZE, PROT_READ | PROT_WRITE);
> >> +       ptr1 = gem_mmap__cpu(fd1, handle1, 0, BO_SIZE, PROT_READ | PROT_WRITE);
> >> +       ptr2 = gem_mmap__cpu(fd2, handle2, 0, BO_SIZE, PROT_READ | PROT_WRITE);
> > 
> > set_domain() would be required for pedagogy, mmap__gtt is magic.
> 
> Why do we need the set_domain here? It looks like we are not writing to 
> those BOs.

gem_mmap__gtt() is an implicit set_domain, gem_mmap__cpu() is not.
(Learn from our mistakes!)

check_bo is both a reader and writer
-Chris
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[igt-dev] [PATCH i-g-t] tests/prime_self_import: Swap gtt mapping for cpu

[Antonio Argenziano]

The test uses gtt mapping to check two BOs have the same content, since
it seems there is no contention on the BOs use cpu mapping to make it
compatible with platforms that do not have a mappable aperture.

v2:
	- Need to have an explicit set_domain. (Chris)

Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
---
 tests/prime_self_import.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/tests/prime_self_import.c b/tests/prime_self_import.c
index 8c4f5321..45b70e81 100644
--- a/tests/prime_self_import.c
+++ b/tests/prime_self_import.c
@@ -59,8 +59,12 @@ check_bo(int fd1, uint32_t handle1, int fd2, uint32_t handle2)
 	char *ptr1, *ptr2;
 	int i;
 
-	ptr1 = gem_mmap__gtt(fd1, handle1, BO_SIZE, PROT_READ | PROT_WRITE);
-	ptr2 = gem_mmap__gtt(fd2, handle2, BO_SIZE, PROT_READ | PROT_WRITE);
+
+	ptr1 = gem_mmap__cpu(fd1, handle1, 0, BO_SIZE, PROT_READ | PROT_WRITE);
+	ptr2 = gem_mmap__cpu(fd2, handle2, 0, BO_SIZE, PROT_READ | PROT_WRITE);
+
+	gem_set_domain(fd1, handle1, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU);
+	gem_set_domain(fd2, handle2, I915_GEM_DOMAIN_CPU, I915_GEM_DOMAIN_CPU);
 
 	/* check whether it's still our old object first. */
 	for (i = 0; i < BO_SIZE; i++) {
-- 
2.20.1

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[igt-dev] ✓ Fi.CI.BAT: success for Modify tests for unavailable mappable aperture (rev2)

[Patchwork]

== Series Details ==

Series: Modify tests for unavailable mappable aperture (rev2)
URL   : https://patchwork.freedesktop.org/series/57042/
State : success

== Summary ==

CI Bug Log - changes from IGT_4851 -> IGTPW_2482
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/57042/revisions/2/mbox/

Known issues
------------

  Here are the changes found in IGTPW_2482 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@amdgpu/amd_basic@userptr:
    - fi-kbl-8809g:       PASS -> DMESG-WARN [fdo#108965]

  * igt@gem_exec_basic@readonly-bsd2:
    - fi-pnv-d510:        NOTRUN -> SKIP [fdo#109271] +76

  * igt@gem_exec_suspend@basic-s4-devices:
    - fi-blb-e6850:       PASS -> INCOMPLETE [fdo#107718]

  * igt@kms_busy@basic-flip-c:
    - fi-pnv-d510:        NOTRUN -> SKIP [fdo#109271] / [fdo#109278]

  
#### Possible fixes ####

  * igt@kms_busy@basic-flip-b:
    - fi-gdg-551:         FAIL [fdo#103182] -> PASS

  
  [fdo#103182]: https://bugs.freedesktop.org/show_bug.cgi?id=103182
  [fdo#107718]: https://bugs.freedesktop.org/show_bug.cgi?id=107718
  [fdo#108965]: https://bugs.freedesktop.org/show_bug.cgi?id=108965
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278


Participating hosts (43 -> 38)
------------------------------

  Additional (1): fi-pnv-d510 
  Missing    (6): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-bdw-samus 


Build changes
-------------

    * IGT: IGT_4851 -> IGTPW_2482

  CI_DRM_5650: a4c5c4791699aeebfff694c222c76abb61900fca @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_2482: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2482/
  IGT_4851: 2b7dd10a4e2ea0cabff68421fd15e96c99be3cad @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2482/
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Re: [igt-dev] [PATCH i-g-t] tests/prime_self_import: Swap gtt mapping for cpu

[Chris Wilson]

Quoting Antonio Argenziano (2019-02-21 22:38:59)
> The test uses gtt mapping to check two BOs have the same content, since
> it seems there is no contention on the BOs use cpu mapping to make it
> compatible with platforms that do not have a mappable aperture.
> 
> v2:
>         - Need to have an explicit set_domain. (Chris)
> 
> Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>

I don't think has any semantic impact, so no need to verify every write
to one of the cloned fd is visible in the other, just once is enough.

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
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[igt-dev] ✓ Fi.CI.IGT: success for Modify tests for unavailable mappable aperture

[Patchwork]

== Series Details ==

Series: Modify tests for unavailable mappable aperture
URL   : https://patchwork.freedesktop.org/series/57042/
State : success

== Summary ==

CI Bug Log - changes from IGT_4850_full -> IGTPW_2476_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/57042/revisions/1/mbox/

Known issues
------------

  Here are the changes found in IGTPW_2476_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@drm_import_export@prime:
    - shard-glk:          PASS -> INCOMPLETE [fdo#103359] / [k.org#198133]

  * igt@gem_exec_big:
    - shard-hsw:          PASS -> TIMEOUT [fdo#107937]

  * igt@i915_pm_backlight@fade:
    - shard-glk:          NOTRUN -> SKIP [fdo#109271] +11

  * igt@kms_atomic_transition@1x-modeset-transitions-nonblocking:
    - shard-apl:          PASS -> FAIL [fdo#109660]

  * igt@kms_busy@extended-pageflip-modeset-hang-oldfb-render-e:
    - shard-hsw:          NOTRUN -> SKIP [fdo#109271] / [fdo#109278]

  * igt@kms_ccs@pipe-a-crc-sprite-planes-basic:
    - shard-apl:          PASS -> FAIL [fdo#106510] / [fdo#108145]

  * igt@kms_ccs@pipe-b-crc-sprite-planes-basic:
    - shard-glk:          PASS -> FAIL [fdo#108145]

  * igt@kms_color@pipe-c-legacy-gamma:
    - shard-apl:          PASS -> FAIL [fdo#104782]

  * igt@kms_cursor_crc@cursor-64x21-random:
    - shard-apl:          PASS -> FAIL [fdo#103232] +5

  * igt@kms_cursor_crc@cursor-64x64-dpms:
    - shard-kbl:          PASS -> FAIL [fdo#103232] +2

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-apl:          PASS -> FAIL [fdo#102887] / [fdo#105363]

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-cpu:
    - shard-kbl:          PASS -> FAIL [fdo#103167]

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-gtt:
    - shard-apl:          PASS -> FAIL [fdo#103167] +2

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-cpu:
    - shard-glk:          PASS -> FAIL [fdo#103167] +6

  * igt@kms_plane@pixel-format-pipe-c-planes-source-clamping:
    - shard-apl:          PASS -> FAIL [fdo#108948]

  * igt@kms_plane_alpha_blend@pipe-b-alpha-basic:
    - shard-glk:          NOTRUN -> FAIL [fdo#108145]

  * igt@kms_plane_multiple@atomic-pipe-a-tiling-y:
    - shard-glk:          PASS -> FAIL [fdo#103166] +6

  * igt@kms_plane_multiple@atomic-pipe-b-tiling-none:
    - shard-apl:          PASS -> FAIL [fdo#103166] +4

  * igt@kms_psr@primary_page_flip:
    - shard-hsw:          NOTRUN -> SKIP [fdo#109271] +13

  * igt@kms_universal_plane@universal-plane-pipe-b-functional:
    - shard-kbl:          PASS -> FAIL [fdo#103166] +1

  * igt@perf_pmu@most-busy-idle-check-all-vcs1:
    - shard-apl:          NOTRUN -> SKIP [fdo#109271] +16

  
#### Possible fixes ####

  * igt@i915_pm_rc6_residency@rc6-accuracy:
    - shard-kbl:          SKIP [fdo#109271] -> PASS

  * igt@kms_atomic_transition@1x-modeset-transitions-nonblocking-fencing:
    - shard-apl:          FAIL [fdo#109660] -> PASS
    - shard-kbl:          FAIL [fdo#109660] -> PASS

  * igt@kms_ccs@pipe-a-crc-sprite-planes-basic:
    - shard-kbl:          FAIL [fdo#107725] / [fdo#108145] -> PASS

  * igt@kms_color@pipe-c-ctm-max:
    - shard-apl:          FAIL [fdo#108147] -> PASS

  * igt@kms_cursor_crc@cursor-128x128-random:
    - shard-apl:          FAIL [fdo#103232] -> PASS +2

  * igt@kms_cursor_crc@cursor-256x256-suspend:
    - shard-hsw:          INCOMPLETE [fdo#103540] -> PASS

  * igt@kms_cursor_crc@cursor-size-change:
    - shard-kbl:          FAIL [fdo#103232] -> PASS +1

  * igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic:
    - shard-hsw:          FAIL [fdo#105767] -> PASS

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-onoff:
    - shard-apl:          FAIL [fdo#103167] -> PASS +2

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-move:
    - shard-glk:          FAIL [fdo#103167] -> PASS +2

  * igt@kms_plane@pixel-format-pipe-a-planes-source-clamping:
    - shard-apl:          FAIL [fdo#108948] -> PASS

  * igt@kms_plane@pixel-format-pipe-c-planes:
    - shard-apl:          FAIL [fdo#103166] -> PASS +1

  * igt@kms_plane@plane-position-covered-pipe-c-planes:
    - shard-glk:          FAIL [fdo#103166] -> PASS +2

  * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-max:
    - shard-apl:          FAIL [fdo#108145] -> PASS

  * igt@kms_rotation_crc@multiplane-rotation-cropping-top:
    - shard-kbl:          FAIL [fdo#109016] -> PASS

  * igt@kms_setmode@basic:
    - shard-apl:          FAIL [fdo#99912] -> PASS

  * igt@kms_universal_plane@universal-plane-pipe-c-functional:
    - shard-kbl:          FAIL [fdo#103166] -> PASS +2

  
  [fdo#102887]: https://bugs.freedesktop.org/show_bug.cgi?id=102887
  [fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
  [fdo#103359]: https://bugs.freedesktop.org/show_bug.cgi?id=103359
  [fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
  [fdo#104782]: https://bugs.freedesktop.org/show_bug.cgi?id=104782
  [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
  [fdo#105767]: https://bugs.freedesktop.org/show_bug.cgi?id=105767
  [fdo#106510]: https://bugs.freedesktop.org/show_bug.cgi?id=106510
  [fdo#107725]: https://bugs.freedesktop.org/show_bug.cgi?id=107725
  [fdo#107937]: https://bugs.freedesktop.org/show_bug.cgi?id=107937
  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#108147]: https://bugs.freedesktop.org/show_bug.cgi?id=108147
  [fdo#108948]: https://bugs.freedesktop.org/show_bug.cgi?id=108948
  [fdo#109016]: https://bugs.freedesktop.org/show_bug.cgi?id=109016
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
  [fdo#109660]: https://bugs.freedesktop.org/show_bug.cgi?id=109660
  [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
  [k.org#198133]: https://bugzilla.kernel.org/show_bug.cgi?id=198133


Participating hosts (6 -> 4)
------------------------------

  Missing    (2): shard-skl shard-iclb 


Build changes
-------------

    * IGT: IGT_4850 -> IGTPW_2476

  CI_DRM_5650: a4c5c4791699aeebfff694c222c76abb61900fca @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_2476: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2476/
  IGT_4850: 8ca0b308acdcf53fac3cf2ea3861f5f911b16986 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2476/
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[igt-dev] ✓ Fi.CI.IGT: success for Modify tests for unavailable mappable aperture (rev2)

[Patchwork]

== Series Details ==

Series: Modify tests for unavailable mappable aperture (rev2)
URL   : https://patchwork.freedesktop.org/series/57042/
State : success

== Summary ==

CI Bug Log - changes from IGT_4851_full -> IGTPW_2482_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/57042/revisions/2/mbox/

Known issues
------------

  Here are the changes found in IGTPW_2482_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_schedule@preemptive-hang-bsd:
    - shard-kbl:          NOTRUN -> SKIP [fdo#109271] +5

  * igt@gem_exec_store@basic-bsd2:
    - shard-apl:          NOTRUN -> SKIP [fdo#109271] +34

  * igt@gem_softpin@noreloc-s3:
    - shard-apl:          PASS -> INCOMPLETE [fdo#103927]

  * igt@gem_userptr_blits@process-exit-gtt:
    - shard-glk:          NOTRUN -> SKIP [fdo#109271] +24

  * igt@kms_busy@extended-pageflip-hang-newfb-render-e:
    - shard-apl:          NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +2
    - shard-glk:          NOTRUN -> SKIP [fdo#109271] / [fdo#109278] +1

  * igt@kms_ccs@pipe-a-crc-sprite-planes-basic:
    - shard-glk:          PASS -> FAIL [fdo#108145] +1

  * igt@kms_color@pipe-a-legacy-gamma:
    - shard-glk:          PASS -> FAIL [fdo#104782] / [fdo#108145]

  * igt@kms_color@pipe-c-degamma:
    - shard-snb:          NOTRUN -> SKIP [fdo#109271] +3

  * igt@kms_cursor_crc@cursor-128x128-onscreen:
    - shard-kbl:          PASS -> FAIL [fdo#103232] +3

  * igt@kms_cursor_crc@cursor-64x21-random:
    - shard-apl:          PASS -> FAIL [fdo#103232] +4

  * igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic:
    - shard-hsw:          PASS -> FAIL [fdo#105767]

  * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy:
    - shard-glk:          PASS -> FAIL [fdo#104873]

  * igt@kms_cursor_legacy@flip-vs-cursor-legacy:
    - shard-glk:          PASS -> FAIL [fdo#102670]

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-mmap-wc:
    - shard-apl:          PASS -> FAIL [fdo#103167]
    - shard-kbl:          PASS -> FAIL [fdo#103167]

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-mmap-cpu:
    - shard-glk:          NOTRUN -> FAIL [fdo#103167]

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-onoff:
    - shard-glk:          PASS -> FAIL [fdo#103167] +10

  * igt@kms_plane@pixel-format-pipe-c-planes-source-clamping:
    - shard-apl:          PASS -> FAIL [fdo#108948]

  * igt@kms_plane_alpha_blend@pipe-c-alpha-opaque-fb:
    - shard-apl:          PASS -> FAIL [fdo#108145]

  * igt@kms_plane_multiple@atomic-pipe-b-tiling-y:
    - shard-glk:          PASS -> FAIL [fdo#103166] +4

  * igt@kms_plane_multiple@atomic-pipe-c-tiling-yf:
    - shard-apl:          PASS -> FAIL [fdo#103166] +3

  * igt@kms_rotation_crc@multiplane-rotation-cropping-top:
    - shard-kbl:          PASS -> FAIL [fdo#109016]

  * igt@kms_setmode@basic:
    - shard-apl:          PASS -> FAIL [fdo#99912]

  * igt@kms_vblank@pipe-c-ts-continuation-modeset-hang:
    - shard-apl:          PASS -> FAIL [fdo#104894] +2

  * igt@perf_pmu@rc6-runtime-pm-long:
    - shard-apl:          NOTRUN -> FAIL [fdo#105010]
    - shard-glk:          NOTRUN -> FAIL [fdo#105010]
    - shard-kbl:          PASS -> FAIL [fdo#105010]

  
#### Possible fixes ####

  * igt@kms_busy@extended-modeset-hang-newfb-render-b:
    - shard-snb:          DMESG-WARN [fdo#107956] -> PASS

  * igt@kms_color@pipe-a-degamma:
    - shard-kbl:          FAIL [fdo#104782] / [fdo#108145] -> PASS

  * igt@kms_color@pipe-a-gamma:
    - shard-kbl:          FAIL [fdo#104782] -> PASS

  * igt@kms_cursor_crc@cursor-128x128-dpms:
    - shard-kbl:          FAIL [fdo#103232] -> PASS +1

  * igt@kms_cursor_crc@cursor-64x21-sliding:
    - shard-apl:          FAIL [fdo#103232] -> PASS +4

  * igt@kms_cursor_crc@cursor-alpha-opaque:
    - shard-glk:          FAIL [fdo#109350] -> PASS

  * igt@kms_cursor_crc@cursor-size-change:
    - shard-glk:          FAIL [fdo#103232] -> PASS

  * igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
    - shard-glk:          FAIL [fdo#105363] -> PASS

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-mmap-cpu:
    - shard-glk:          FAIL [fdo#103167] -> PASS +3

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-blt:
    - shard-apl:          FAIL [fdo#103167] -> PASS +2
    - shard-kbl:          FAIL [fdo#103167] -> PASS +1

  * igt@kms_frontbuffer_tracking@fbc-1p-rte:
    - shard-snb:          INCOMPLETE [fdo#105411] / [fdo#107469] -> PASS

  * igt@kms_plane@pixel-format-pipe-a-planes-source-clamping:
    - shard-glk:          FAIL [fdo#108948] -> PASS

  * igt@kms_plane@plane-position-covered-pipe-c-planes:
    - shard-apl:          FAIL [fdo#103166] -> PASS +4

  * igt@kms_plane_multiple@atomic-pipe-b-tiling-none:
    - shard-glk:          FAIL [fdo#103166] -> PASS +2

  * igt@kms_setmode@basic:
    - shard-kbl:          FAIL [fdo#99912] -> PASS

  * igt@testdisplay:
    - shard-kbl:          INCOMPLETE [fdo#103665] -> PASS
    - shard-apl:          INCOMPLETE [fdo#103927] -> PASS

  
#### Warnings ####

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-mmap-wc:
    - shard-apl:          INCOMPLETE [fdo#103927] -> SKIP [fdo#109271]

  
  [fdo#102670]: https://bugs.freedesktop.org/show_bug.cgi?id=102670
  [fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103232]: https://bugs.freedesktop.org/show_bug.cgi?id=103232
  [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
  [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
  [fdo#104782]: https://bugs.freedesktop.org/show_bug.cgi?id=104782
  [fdo#104873]: https://bugs.freedesktop.org/show_bug.cgi?id=104873
  [fdo#104894]: https://bugs.freedesktop.org/show_bug.cgi?id=104894
  [fdo#105010]: https://bugs.freedesktop.org/show_bug.cgi?id=105010
  [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
  [fdo#105411]: https://bugs.freedesktop.org/show_bug.cgi?id=105411
  [fdo#105767]: https://bugs.freedesktop.org/show_bug.cgi?id=105767
  [fdo#107469]: https://bugs.freedesktop.org/show_bug.cgi?id=107469
  [fdo#107956]: https://bugs.freedesktop.org/show_bug.cgi?id=107956
  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#108948]: https://bugs.freedesktop.org/show_bug.cgi?id=108948
  [fdo#109016]: https://bugs.freedesktop.org/show_bug.cgi?id=109016
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
  [fdo#109350]: https://bugs.freedesktop.org/show_bug.cgi?id=109350
  [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912


Participating hosts (7 -> 5)
------------------------------

  Missing    (2): shard-skl shard-iclb 


Build changes
-------------

    * IGT: IGT_4851 -> IGTPW_2482

  CI_DRM_5650: a4c5c4791699aeebfff694c222c76abb61900fca @ git://anongit.freedesktop.org/gfx-ci/linux
  IGTPW_2482: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2482/
  IGT_4851: 2b7dd10a4e2ea0cabff68421fd15e96c99be3cad @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/IGTPW_2482/
_______________________________________________
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Re: [igt-dev] [PATCH i-g-t] tests/prime_self_import: Swap gtt mapping for cpu

[Antonio Argenziano]

On 21/02/19 15:37, Chris Wilson wrote:
> Quoting Antonio Argenziano (2019-02-21 22:38:59)
>> The test uses gtt mapping to check two BOs have the same content, since
>> it seems there is no contention on the BOs use cpu mapping to make it
>> compatible with platforms that do not have a mappable aperture.
>>
>> v2:
>>          - Need to have an explicit set_domain. (Chris)
>>
>> Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
> 
> I don't think has any semantic impact, so no need to verify every write
> to one of the cloned fd is visible in the other, just once is enough.

Keep only one set_domain then?

Any objections to splitting this from the series and merge?

Antonio

> 
> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
> -Chris
> 
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Re: [igt-dev] [PATCH i-g-t] tests/prime_self_import: Swap gtt mapping for cpu

[Chris Wilson]

Quoting Antonio Argenziano (2019-02-22 16:50:07)
> 
> 
> On 21/02/19 15:37, Chris Wilson wrote:
> > Quoting Antonio Argenziano (2019-02-21 22:38:59)
> >> The test uses gtt mapping to check two BOs have the same content, since
> >> it seems there is no contention on the BOs use cpu mapping to make it
> >> compatible with platforms that do not have a mappable aperture.
> >>
> >> v2:
> >>          - Need to have an explicit set_domain. (Chris)
> >>
> >> Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
> > 
> > I don't think has any semantic impact, so no need to verify every write
> > to one of the cloned fd is visible in the other, just once is enough.
> 
> Keep only one set_domain then?

No, I was talking about whether we needed to do this for all the
different mmap paths, and decided that we aren't doing any coherency
checks just verifying that we had one objects.

Whether to use one or two set-domain here is an interesting question
relating to how much we want to assume we only have a single bo here
(which is the object of the exercise ofc). I think I favour keeping it
as two distinct handles with the test being only that the memory
contents are the same. Otherwise we might as well just use one handle ;)
 
> Any objections to splitting this from the series and merge?

This can be applied right away.
-Chris
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Re: [igt-dev] [PATCH i-g-t] tests/prime_self_import: Swap gtt mapping for cpu

[Antonio Argenziano]

On 22/02/19 08:55, Chris Wilson wrote:
> Quoting Antonio Argenziano (2019-02-22 16:50:07)
>>
>>
>> On 21/02/19 15:37, Chris Wilson wrote:
>>> Quoting Antonio Argenziano (2019-02-21 22:38:59)
>>>> The test uses gtt mapping to check two BOs have the same content, since
>>>> it seems there is no contention on the BOs use cpu mapping to make it
>>>> compatible with platforms that do not have a mappable aperture.
>>>>
>>>> v2:
>>>>           - Need to have an explicit set_domain. (Chris)
>>>>
>>>> Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
>>>
>>> I don't think has any semantic impact, so no need to verify every write
>>> to one of the cloned fd is visible in the other, just once is enough.
>>
>> Keep only one set_domain then?
> 
> No, I was talking about whether we needed to do this for all the
> different mmap paths, and decided that we aren't doing any coherency
> checks just verifying that we had one objects.
> 
> Whether to use one or two set-domain here is an interesting question
> relating to how much we want to assume we only have a single bo here
> (which is the object of the exercise ofc). I think I favour keeping it
> as two distinct handles with the test being only that the memory
> contents are the same. Otherwise we might as well just use one handle ;)
>   
>> Any objections to splitting this from the series and merge?
> 
> This can be applied right away.

Pushed, thanks for the review.

Antonio

> -Chris
> 
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[igt-dev] [PATCH i-g-t] lib/i915: add mmap_offset support

[Antonio Argenziano]

From: "Kalamarz, Lukasz" <lukasz.kalamarz@intel.com>

With recently proposed changes, IGT need to start supporting new
way of mmaping object, which will be used from now by default.
This patch modify gem_mmap_wc and gem_mmap functions to be
in sync with those changes.

v2:
	- Fix IOCTL number. (Daniele)
	- Move wrappers to new file. (Chris)

Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
Cc: Janulgue Abdiel <abdiel.janulgue@intel.com>
Cc: Matthew Auld <matthew.auld@intel.com>
Cc: Michal Winiarski <michal.winiarski@intel.com>
Cc: Antonio Argenziano <antonio.argenziano@intel.com>
Cc: Daniele Spurio Ceraolo <daniele.ceraolospurio@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
---
 lib/i915/gem_mman.c  | 87 ++++++++++++++++++++++++++++++++++++++++++++
 lib/i915/gem_mman.h  | 61 +++++++++++++++++++++++++++++++
 lib/ioctl_wrappers.c | 67 +++++++++++++++++++++++-----------
 lib/ioctl_wrappers.h |  1 +
 lib/meson.build      |  1 +
 5 files changed, 196 insertions(+), 21 deletions(-)
 create mode 100644 lib/i915/gem_mman.c
 create mode 100644 lib/i915/gem_mman.h

diff --git a/lib/i915/gem_mman.c b/lib/i915/gem_mman.c
new file mode 100644
index 00000000..fb949f44
--- /dev/null
+++ b/lib/i915/gem_mman.c
@@ -0,0 +1,87 @@
+/*
+ * Copyright © 2007, 2011, 2013, 2014, 2019 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ */
+
+#include <stdbool.h>
+#include <sys/ioctl.h>
+
+#include "igt_core.h"
+#include "ioctl_wrappers.h"
+
+#include "gem_mman.h"
+
+
+bool has_mmap_offset(int fd)
+{
+	static int has_mmap_offset = -1;
+
+	if (has_mmap_offset == -1) {
+		struct drm_i915_getparam gp;
+
+		has_mmap_offset = 0;
+
+		memset(&gp, 0, sizeof(gp));
+		gp.param = 0x55; /* I915_PARAM_MMAP_OFFSET_VERSION */
+		gp.value = &has_mmap_offset;
+		ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
+	}
+
+	return has_mmap_offset > 0;
+}
+
+/**
+ * __gem_mmap_offset:
+ * @fd: open i915 drm file descriptor
+ * @handle: gem buffer object handle
+ * @offset: offset in the gem buffer of the mmap arena
+ * @size: size of the mmap arena
+ * @prot: memory protection bits as used by mmap()
+ * @flags: flags used to determine caching
+ *
+ * Similar to __gem_mmap but use MMAP_OFFSET IOCTL.
+ *
+ * Returns: A pointer to the created memory mapping, NULL on failure.
+ */
+void
+*__gem_mmap_offset(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned int prot, uint64_t flags)
+{
+	struct local_drm_i915_gem_mmap_offset arg;
+	void *ptr;
+
+	memset(&arg, 0, sizeof(arg));
+	arg.handle = handle;
+	arg.offset = offset;
+	arg.flags = flags;
+
+	if (igt_ioctl(fd, LOCAL_DRM_IOCTL_I915_GEM_MMAP_OFFSET, &arg))
+		return NULL;
+
+	ptr = mmap64(0, size, prot, MAP_SHARED, fd, arg.offset);
+
+	if (ptr == MAP_FAILED)
+		ptr = NULL;
+	else
+		errno = 0;
+
+	return ptr;
+}
diff --git a/lib/i915/gem_mman.h b/lib/i915/gem_mman.h
new file mode 100644
index 00000000..2f24ca99
--- /dev/null
+++ b/lib/i915/gem_mman.h
@@ -0,0 +1,61 @@
+/*
+ * Copyright © 2007, 2011, 2013, 2014, 2019 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ */
+
+#ifndef GEM_MMAN_H
+#define GEM_MMAN_H
+
+struct local_drm_i915_gem_mmap_offset {
+	/** Handle for the object being mapped. */
+	__u32 handle;
+	__u32 pad;
+	/**
+	 * Fake offset to use for subsequent mmap call
+	 *
+	 * This is a fixed-size type for 32/64 compatibility.
+	 */
+	__u64 offset;
+
+	/**
+	 * Flags for extended behaviour.
+	 *
+	 * It is mandatory that either one of the _WC/_WB flags
+	 * should be passed here.
+	 */
+	__u64 flags;
+};
+
+#define LOCAL_DRM_I915_GEM_MMAP_OFFSET 0x24
+#define LOCAL_I915_MMAP_OFFSET_WC (1 << 0)
+#define LOCAL_I915_MMAP_OFFSET_WB (1 << 1)
+#define LOCAL_I915_MMAP_OFFSET_UC (1 << 2)
+
+#define LOCAL_DRM_IOCTL_I915_GEM_MMAP_OFFSET \
+		DRM_IOWR(DRM_COMMAND_BASE + LOCAL_DRM_I915_GEM_MMAP_OFFSET, struct local_drm_i915_gem_mmap_offset)
+
+bool has_mmap_offset(int fd);
+
+void *__gem_mmap_offset(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned int prot, uint64_t flags);
+
+#endif /* GEM_MMAN_H */
+
diff --git a/lib/ioctl_wrappers.c b/lib/ioctl_wrappers.c
index 404c2fbf..c11b0146 100644
--- a/lib/ioctl_wrappers.c
+++ b/lib/ioctl_wrappers.c
@@ -707,35 +707,50 @@ bool gem_mmap__has_wc(int fd)
 	static int has_wc = -1;
 
 	if (has_wc == -1) {
-		struct drm_i915_getparam gp;
-		int mmap_version = -1;
-		int gtt_version = -1;
 
 		has_wc = 0;
 
-		memset(&gp, 0, sizeof(gp));
-		gp.param = I915_PARAM_MMAP_GTT_VERSION;
-		gp.value = &gtt_version;
-		ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
-
-		memset(&gp, 0, sizeof(gp));
-		gp.param = I915_PARAM_MMAP_VERSION;
-		gp.value = &mmap_version;
-		ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
-
-		/* Do we have the new mmap_ioctl with DOMAIN_WC? */
-		if (mmap_version >= 1 && gtt_version >= 2) {
-			struct drm_i915_gem_mmap arg;
+		/* Do we have the new mmap_offset ioctl? */
+		if (has_mmap_offset(fd)) {
+			struct local_drm_i915_gem_mmap_offset arg;
 
 			/* Does this device support wc-mmaps ? */
 			memset(&arg, 0, sizeof(arg));
 			arg.handle = gem_create(fd, 4096);
 			arg.offset = 0;
-			arg.size = 4096;
-			arg.flags = I915_MMAP_WC;
-			has_wc = igt_ioctl(fd, DRM_IOCTL_I915_GEM_MMAP, &arg) == 0;
+			arg.flags = LOCAL_I915_MMAP_OFFSET_WC;
+			has_wc = igt_ioctl(fd, LOCAL_DRM_IOCTL_I915_GEM_MMAP_OFFSET, &arg) == 0;
 			gem_close(fd, arg.handle);
+		} else {
+			struct drm_i915_getparam gp;
+			int mmap_version = -1;
+			int gtt_version = -1;
+
+			memset(&gp, 0, sizeof(gp));
+			gp.param = I915_PARAM_MMAP_GTT_VERSION;
+			gp.value = &gtt_version;
+			ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
+
+			memset(&gp, 0, sizeof(gp));
+			gp.param = I915_PARAM_MMAP_VERSION;
+			gp.value = &mmap_version;
+			ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
+
+			/* Do we have the mmap_ioctl with DOMAIN_WC? */
+			if (mmap_version >= 1 && gtt_version >= 2) {
+				struct drm_i915_gem_mmap arg;
+
+				/* Does this device support wc-mmaps ? */
+				memset(&arg, 0, sizeof(arg));
+				arg.handle = gem_create(fd, 4096);
+				arg.offset = 0;
+				arg.size = 4096;
+				arg.flags = I915_MMAP_WC;
+				has_wc = igt_ioctl(fd, DRM_IOCTL_I915_GEM_MMAP, &arg) == 0;
+				gem_close(fd, arg.handle);
+			}
 		}
+
 		errno = 0;
 	}
 
@@ -795,7 +810,10 @@ static void
  */
 void *__gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot)
 {
-	return __gem_mmap(fd, handle, offset, size, prot, I915_MMAP_WC);
+	if (has_mmap_offset(fd))
+		return __gem_mmap_offset(fd, handle, offset, size, prot, LOCAL_I915_MMAP_OFFSET_WC);
+	else
+		return __gem_mmap(fd, handle, offset, size, prot, I915_MMAP_WC);
 }
 
 /**
@@ -832,7 +850,14 @@ void *gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsi
  */
 void *__gem_mmap__cpu(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot)
 {
-	return __gem_mmap(fd, handle, offset, size, prot, 0);
+	void *ptr;
+
+	if (has_mmap_offset(fd))
+		ptr = __gem_mmap_offset(fd, handle, offset, size, prot, LOCAL_I915_MMAP_OFFSET_WB);
+	else
+		ptr = __gem_mmap(fd, handle, offset, size, prot, 0);
+
+	return ptr;
 }
 
 /**
diff --git a/lib/ioctl_wrappers.h b/lib/ioctl_wrappers.h
index b22b36b0..ff4e7681 100644
--- a/lib/ioctl_wrappers.h
+++ b/lib/ioctl_wrappers.h
@@ -38,6 +38,7 @@
 
 #include "i915/gem_context.h"
 #include "i915/gem_scheduler.h"
+#include "i915/gem_mman.h"
 
 /**
  * igt_ioctl:
diff --git a/lib/meson.build b/lib/meson.build
index dd36f818..0eb5585d 100644
--- a/lib/meson.build
+++ b/lib/meson.build
@@ -4,6 +4,7 @@ lib_sources = [
 	'i915/gem_scheduler.c',
 	'i915/gem_submission.c',
 	'i915/gem_ring.c',
+	'i915/gem_mman.c',
 	'igt_color_encoding.c',
 	'igt_debugfs.c',
 	'igt_device.c',
-- 
2.20.1

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Re: [igt-dev] [PATCH i-g-t] lib/i915: add mmap_offset support

[Antonio Argenziano]

On 22/02/19 13:59, Antonio Argenziano wrote:
> From: "Kalamarz, Lukasz" <lukasz.kalamarz@intel.com>
> 
> With recently proposed changes, IGT need to start supporting new
> way of mmaping object, which will be used from now by default.
> This patch modify gem_mmap_wc and gem_mmap functions to be
> in sync with those changes.
> 
> v2:
> 	- Fix IOCTL number. (Daniele)
> 	- Move wrappers to new file. (Chris)

Not sure how much of the other stuff we might want to bring over so I've 
moved only the new wrappers for now.

Antonio

> 
> Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
> Cc: Janulgue Abdiel <abdiel.janulgue@intel.com>
> Cc: Matthew Auld <matthew.auld@intel.com>
> Cc: Michal Winiarski <michal.winiarski@intel.com>
> Cc: Antonio Argenziano <antonio.argenziano@intel.com>
> Cc: Daniele Spurio Ceraolo <daniele.ceraolospurio@intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
> ---
>   lib/i915/gem_mman.c  | 87 ++++++++++++++++++++++++++++++++++++++++++++
>   lib/i915/gem_mman.h  | 61 +++++++++++++++++++++++++++++++
>   lib/ioctl_wrappers.c | 67 +++++++++++++++++++++++-----------
>   lib/ioctl_wrappers.h |  1 +
>   lib/meson.build      |  1 +
>   5 files changed, 196 insertions(+), 21 deletions(-)
>   create mode 100644 lib/i915/gem_mman.c
>   create mode 100644 lib/i915/gem_mman.h
> 
> diff --git a/lib/i915/gem_mman.c b/lib/i915/gem_mman.c
> new file mode 100644
> index 00000000..fb949f44
> --- /dev/null
> +++ b/lib/i915/gem_mman.c
> @@ -0,0 +1,87 @@
> +/*
> + * Copyright © 2007, 2011, 2013, 2014, 2019 Intel Corporation
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice (including the next
> + * paragraph) shall be included in all copies or substantial portions of the
> + * Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
> + * IN THE SOFTWARE.
> + *
> + */
> +
> +#include <stdbool.h>
> +#include <sys/ioctl.h>
> +
> +#include "igt_core.h"
> +#include "ioctl_wrappers.h"
> +
> +#include "gem_mman.h"
> +
> +
> +bool has_mmap_offset(int fd)
> +{
> +	static int has_mmap_offset = -1;
> +
> +	if (has_mmap_offset == -1) {
> +		struct drm_i915_getparam gp;
> +
> +		has_mmap_offset = 0;
> +
> +		memset(&gp, 0, sizeof(gp));
> +		gp.param = 0x55; /* I915_PARAM_MMAP_OFFSET_VERSION */
> +		gp.value = &has_mmap_offset;
> +		ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
> +	}
> +
> +	return has_mmap_offset > 0;
> +}
> +
> +/**
> + * __gem_mmap_offset:
> + * @fd: open i915 drm file descriptor
> + * @handle: gem buffer object handle
> + * @offset: offset in the gem buffer of the mmap arena
> + * @size: size of the mmap arena
> + * @prot: memory protection bits as used by mmap()
> + * @flags: flags used to determine caching
> + *
> + * Similar to __gem_mmap but use MMAP_OFFSET IOCTL.
> + *
> + * Returns: A pointer to the created memory mapping, NULL on failure.
> + */
> +void
> +*__gem_mmap_offset(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned int prot, uint64_t flags)
> +{
> +	struct local_drm_i915_gem_mmap_offset arg;
> +	void *ptr;
> +
> +	memset(&arg, 0, sizeof(arg));
> +	arg.handle = handle;
> +	arg.offset = offset;
> +	arg.flags = flags;
> +
> +	if (igt_ioctl(fd, LOCAL_DRM_IOCTL_I915_GEM_MMAP_OFFSET, &arg))
> +		return NULL;
> +
> +	ptr = mmap64(0, size, prot, MAP_SHARED, fd, arg.offset);
> +
> +	if (ptr == MAP_FAILED)
> +		ptr = NULL;
> +	else
> +		errno = 0;
> +
> +	return ptr;
> +}
> diff --git a/lib/i915/gem_mman.h b/lib/i915/gem_mman.h
> new file mode 100644
> index 00000000..2f24ca99
> --- /dev/null
> +++ b/lib/i915/gem_mman.h
> @@ -0,0 +1,61 @@
> +/*
> + * Copyright © 2007, 2011, 2013, 2014, 2019 Intel Corporation
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the "Software"),
> + * to deal in the Software without restriction, including without limitation
> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice (including the next
> + * paragraph) shall be included in all copies or substantial portions of the
> + * Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
> + * IN THE SOFTWARE.
> + *
> + */
> +
> +#ifndef GEM_MMAN_H
> +#define GEM_MMAN_H
> +
> +struct local_drm_i915_gem_mmap_offset {
> +	/** Handle for the object being mapped. */
> +	__u32 handle;
> +	__u32 pad;
> +	/**
> +	 * Fake offset to use for subsequent mmap call
> +	 *
> +	 * This is a fixed-size type for 32/64 compatibility.
> +	 */
> +	__u64 offset;
> +
> +	/**
> +	 * Flags for extended behaviour.
> +	 *
> +	 * It is mandatory that either one of the _WC/_WB flags
> +	 * should be passed here.
> +	 */
> +	__u64 flags;
> +};
> +
> +#define LOCAL_DRM_I915_GEM_MMAP_OFFSET 0x24
> +#define LOCAL_I915_MMAP_OFFSET_WC (1 << 0)
> +#define LOCAL_I915_MMAP_OFFSET_WB (1 << 1)
> +#define LOCAL_I915_MMAP_OFFSET_UC (1 << 2)
> +
> +#define LOCAL_DRM_IOCTL_I915_GEM_MMAP_OFFSET \
> +		DRM_IOWR(DRM_COMMAND_BASE + LOCAL_DRM_I915_GEM_MMAP_OFFSET, struct local_drm_i915_gem_mmap_offset)
> +
> +bool has_mmap_offset(int fd);
> +
> +void *__gem_mmap_offset(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned int prot, uint64_t flags);
> +
> +#endif /* GEM_MMAN_H */
> +
> diff --git a/lib/ioctl_wrappers.c b/lib/ioctl_wrappers.c
> index 404c2fbf..c11b0146 100644
> --- a/lib/ioctl_wrappers.c
> +++ b/lib/ioctl_wrappers.c
> @@ -707,35 +707,50 @@ bool gem_mmap__has_wc(int fd)
>   	static int has_wc = -1;
>   
>   	if (has_wc == -1) {
> -		struct drm_i915_getparam gp;
> -		int mmap_version = -1;
> -		int gtt_version = -1;
>   
>   		has_wc = 0;
>   
> -		memset(&gp, 0, sizeof(gp));
> -		gp.param = I915_PARAM_MMAP_GTT_VERSION;
> -		gp.value = &gtt_version;
> -		ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
> -
> -		memset(&gp, 0, sizeof(gp));
> -		gp.param = I915_PARAM_MMAP_VERSION;
> -		gp.value = &mmap_version;
> -		ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
> -
> -		/* Do we have the new mmap_ioctl with DOMAIN_WC? */
> -		if (mmap_version >= 1 && gtt_version >= 2) {
> -			struct drm_i915_gem_mmap arg;
> +		/* Do we have the new mmap_offset ioctl? */
> +		if (has_mmap_offset(fd)) {
> +			struct local_drm_i915_gem_mmap_offset arg;
>   
>   			/* Does this device support wc-mmaps ? */
>   			memset(&arg, 0, sizeof(arg));
>   			arg.handle = gem_create(fd, 4096);
>   			arg.offset = 0;
> -			arg.size = 4096;
> -			arg.flags = I915_MMAP_WC;
> -			has_wc = igt_ioctl(fd, DRM_IOCTL_I915_GEM_MMAP, &arg) == 0;
> +			arg.flags = LOCAL_I915_MMAP_OFFSET_WC;
> +			has_wc = igt_ioctl(fd, LOCAL_DRM_IOCTL_I915_GEM_MMAP_OFFSET, &arg) == 0;
>   			gem_close(fd, arg.handle);
> +		} else {
> +			struct drm_i915_getparam gp;
> +			int mmap_version = -1;
> +			int gtt_version = -1;
> +
> +			memset(&gp, 0, sizeof(gp));
> +			gp.param = I915_PARAM_MMAP_GTT_VERSION;
> +			gp.value = &gtt_version;
> +			ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
> +
> +			memset(&gp, 0, sizeof(gp));
> +			gp.param = I915_PARAM_MMAP_VERSION;
> +			gp.value = &mmap_version;
> +			ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
> +
> +			/* Do we have the mmap_ioctl with DOMAIN_WC? */
> +			if (mmap_version >= 1 && gtt_version >= 2) {
> +				struct drm_i915_gem_mmap arg;
> +
> +				/* Does this device support wc-mmaps ? */
> +				memset(&arg, 0, sizeof(arg));
> +				arg.handle = gem_create(fd, 4096);
> +				arg.offset = 0;
> +				arg.size = 4096;
> +				arg.flags = I915_MMAP_WC;
> +				has_wc = igt_ioctl(fd, DRM_IOCTL_I915_GEM_MMAP, &arg) == 0;
> +				gem_close(fd, arg.handle);
> +			}
>   		}
> +
>   		errno = 0;
>   	}
>   
> @@ -795,7 +810,10 @@ static void
>    */
>   void *__gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot)
>   {
> -	return __gem_mmap(fd, handle, offset, size, prot, I915_MMAP_WC);
> +	if (has_mmap_offset(fd))
> +		return __gem_mmap_offset(fd, handle, offset, size, prot, LOCAL_I915_MMAP_OFFSET_WC);
> +	else
> +		return __gem_mmap(fd, handle, offset, size, prot, I915_MMAP_WC);
>   }
>   
>   /**
> @@ -832,7 +850,14 @@ void *gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsi
>    */
>   void *__gem_mmap__cpu(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot)
>   {
> -	return __gem_mmap(fd, handle, offset, size, prot, 0);
> +	void *ptr;
> +
> +	if (has_mmap_offset(fd))
> +		ptr = __gem_mmap_offset(fd, handle, offset, size, prot, LOCAL_I915_MMAP_OFFSET_WB);
> +	else
> +		ptr = __gem_mmap(fd, handle, offset, size, prot, 0);
> +
> +	return ptr;
>   }
>   
>   /**
> diff --git a/lib/ioctl_wrappers.h b/lib/ioctl_wrappers.h
> index b22b36b0..ff4e7681 100644
> --- a/lib/ioctl_wrappers.h
> +++ b/lib/ioctl_wrappers.h
> @@ -38,6 +38,7 @@
>   
>   #include "i915/gem_context.h"
>   #include "i915/gem_scheduler.h"
> +#include "i915/gem_mman.h"
>   
>   /**
>    * igt_ioctl:
> diff --git a/lib/meson.build b/lib/meson.build
> index dd36f818..0eb5585d 100644
> --- a/lib/meson.build
> +++ b/lib/meson.build
> @@ -4,6 +4,7 @@ lib_sources = [
>   	'i915/gem_scheduler.c',
>   	'i915/gem_submission.c',
>   	'i915/gem_ring.c',
> +	'i915/gem_mman.c',
>   	'igt_color_encoding.c',
>   	'igt_debugfs.c',
>   	'igt_device.c',
> 
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[igt-dev] ✗ Fi.CI.BAT: failure for Modify tests for unavailable mappable aperture (rev3)

[Patchwork]

== Series Details ==

Series: Modify tests for unavailable mappable aperture (rev3)
URL   : https://patchwork.freedesktop.org/series/57042/
State : failure

== Summary ==

IGT patchset build failed on latest successful build
8afdfd8fa9ce17043d9105dedca46ad4555fdcdb tests/prime_self_import: Swap gtt mapping for cpu

ninja: Entering directory `build'
[1/634] Generating version.h with a custom command.
[2/632] Linking static target lib/libigt-drmtest_c.a.
[3/632] Linking static target lib/libigt-i915_gem_context_c.a.
[4/632] Linking static target lib/libigt-i915_gem_scheduler_c.a.
[5/632] Linking static target lib/libigt-i915_gem_submission_c.a.
[6/632] Compiling C object 'lib/lib@@igt-i915_gem_mman_c@sta/i915_gem_mman.c.o'.
FAILED: lib/lib@@igt-i915_gem_mman_c@sta/i915_gem_mman.c.o 
ccache cc -Ilib/lib@@igt-i915_gem_mman_c@sta -Ilib -I../lib -I../include/drm-uapi -I../lib/stubs/syscalls -I. -I../ -I/usr/include/cairo -I/usr/include/glib-2.0 -I/usr/lib/x86_64-linux-gnu/glib-2.0/include -I/usr/include/pixman-1 -I/usr/include/libpng16 -I/usr/include/freetype2 -I/usr/include/libpng12 -I/opt/igt/include -I/opt/igt/include/libdrm -I/usr/include/x86_64-linux-gnu -I/usr/include -I/home/cidrm/kernel_headers/include -fdiagnostics-color=always -pipe -D_FILE_OFFSET_BITS=64 -Wall -Winvalid-pch -Wextra -std=gnu11 -O0 -g -D_GNU_SOURCE -include config.h -Wbad-function-cast -Wdeclaration-after-statement -Wformat=2 -Wimplicit-fallthrough=0 -Wlogical-op -Wmissing-declarations -Wmissing-format-attribute -Wmissing-noreturn -Wmissing-prototypes -Wnested-externs -Wold-style-definition -Wpointer-arith -Wredundant-decls -Wshadow -Wstrict-prototypes -Wuninitialized -Wunused -Wno-clobbered -Wno-maybe-uninitialized -Wno-missing-field-initializers -Wno-pointer-arith -Wno-sign-compare -Wno-type-limits -Wno-unused-parameter -Wno-unused-result -Werror=address -Werror=array-bounds -Werror=implicit -Werror=init-self -Werror=int-to-pointer-cast -Werror=main -Werror=missing-braces -Werror=nonnull -Werror=pointer-to-int-cast -Werror=return-type -Werror=sequence-point -Werror=trigraphs -Werror=write-strings -fPIC -pthread '-DIGT_DATADIR="/opt/igt/share/igt-gpu-tools"' '-DIGT_SRCDIR="/home/cidrm/igt-gpu-tools/tests"' '-DIGT_LOG_DOMAIN="i915/gem_mman"'  -MD -MQ 'lib/lib@@igt-i915_gem_mman_c@sta/i915_gem_mman.c.o' -MF 'lib/lib@@igt-i915_gem_mman_c@sta/i915_gem_mman.c.o.d' -o 'lib/lib@@igt-i915_gem_mman_c@sta/i915_gem_mman.c.o' -c ../lib/i915/gem_mman.c
../lib/i915/gem_mman.c: In function ‘__gem_mmap_offset’:
../lib/i915/gem_mman.c:84:3: error: ‘errno’ undeclared (first use in this function); did you mean ‘perror’?
   errno = 0;
   ^~~~~
   perror
../lib/i915/gem_mman.c:84:3: note: each undeclared identifier is reported only once for each function it appears in
ninja: build stopped: subcommand failed.

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Re: [igt-dev] [PATCH i-g-t] lib/i915: add mmap_offset support

[Chris Wilson]

Quoting Antonio Argenziano (2019-02-22 22:01:43)
> 
> 
> On 22/02/19 13:59, Antonio Argenziano wrote:
> > From: "Kalamarz, Lukasz" <lukasz.kalamarz@intel.com>
> > 
> > With recently proposed changes, IGT need to start supporting new
> > way of mmaping object, which will be used from now by default.
> > This patch modify gem_mmap_wc and gem_mmap functions to be
> > in sync with those changes.
> > 
> > v2:
> >       - Fix IOCTL number. (Daniele)
> >       - Move wrappers to new file. (Chris)
> 
> Not sure how much of the other stuff we might want to bring over so I've 
> moved only the new wrappers for now.

It's a sensible chunk to review, so no worries, more can come later.

> > Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
> > Cc: Janulgue Abdiel <abdiel.janulgue@intel.com>
> > Cc: Matthew Auld <matthew.auld@intel.com>
> > Cc: Michal Winiarski <michal.winiarski@intel.com>
> > Cc: Antonio Argenziano <antonio.argenziano@intel.com>
> > Cc: Daniele Spurio Ceraolo <daniele.ceraolospurio@intel.com>
> > Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> > Cc: Chris Wilson <chris@chris-wilson.co.uk>
> > Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
> > ---
> >   lib/i915/gem_mman.c  | 87 ++++++++++++++++++++++++++++++++++++++++++++
> >   lib/i915/gem_mman.h  | 61 +++++++++++++++++++++++++++++++
> >   lib/ioctl_wrappers.c | 67 +++++++++++++++++++++++-----------
> >   lib/ioctl_wrappers.h |  1 +
> >   lib/meson.build      |  1 +
> >   5 files changed, 196 insertions(+), 21 deletions(-)
> >   create mode 100644 lib/i915/gem_mman.c
> >   create mode 100644 lib/i915/gem_mman.h
> > 
> > diff --git a/lib/i915/gem_mman.c b/lib/i915/gem_mman.c
> > new file mode 100644
> > index 00000000..fb949f44
> > --- /dev/null
> > +++ b/lib/i915/gem_mman.c
> > @@ -0,0 +1,87 @@
> > +/*
> > + * Copyright © 2007, 2011, 2013, 2014, 2019 Intel Corporation
> > + *
> > + * Permission is hereby granted, free of charge, to any person obtaining a
> > + * copy of this software and associated documentation files (the "Software"),
> > + * to deal in the Software without restriction, including without limitation
> > + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> > + * and/or sell copies of the Software, and to permit persons to whom the
> > + * Software is furnished to do so, subject to the following conditions:
> > + *
> > + * The above copyright notice and this permission notice (including the next
> > + * paragraph) shall be included in all copies or substantial portions of the
> > + * Software.
> > + *
> > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> > + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> > + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> > + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> > + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> > + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
> > + * IN THE SOFTWARE.
> > + *
> > + */
> > +
> > +#include <stdbool.h>
> > +#include <sys/ioctl.h>
> > +
> > +#include "igt_core.h"
> > +#include "ioctl_wrappers.h"
> > +
> > +#include "gem_mman.h"
> > +
> > +
> > +bool has_mmap_offset(int fd)
> > +{
> > +     static int has_mmap_offset = -1;
> > +
> > +     if (has_mmap_offset == -1) {
> > +             struct drm_i915_getparam gp;
> > +
> > +             has_mmap_offset = 0;
> > +
> > +             memset(&gp, 0, sizeof(gp));
> > +             gp.param = 0x55; /* I915_PARAM_MMAP_OFFSET_VERSION */
> > +             gp.value = &has_mmap_offset;
> > +             ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
> > +     }
> > +
> > +     return has_mmap_offset > 0;
> > +}
> > +
> > +/**
> > + * __gem_mmap_offset:
> > + * @fd: open i915 drm file descriptor
> > + * @handle: gem buffer object handle
> > + * @offset: offset in the gem buffer of the mmap arena
> > + * @size: size of the mmap arena
> > + * @prot: memory protection bits as used by mmap()
> > + * @flags: flags used to determine caching
> > + *
> > + * Similar to __gem_mmap but use MMAP_OFFSET IOCTL.
> > + *
> > + * Returns: A pointer to the created memory mapping, NULL on failure.
> > + */
> > +void
> > +*__gem_mmap_offset(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned int prot, uint64_t flags)
> > +{
> > +     struct local_drm_i915_gem_mmap_offset arg;
> > +     void *ptr;
> > +
> > +     memset(&arg, 0, sizeof(arg));
> > +     arg.handle = handle;
> > +     arg.offset = offset;
> > +     arg.flags = flags;
> > +
> > +     if (igt_ioctl(fd, LOCAL_DRM_IOCTL_I915_GEM_MMAP_OFFSET, &arg))
> > +             return NULL;
> > +
> > +     ptr = mmap64(0, size, prot, MAP_SHARED, fd, arg.offset);
> > +
> > +     if (ptr == MAP_FAILED)
> > +             ptr = NULL;
> > +     else
> > +             errno = 0;
> > +
> > +     return ptr;
> > +}
> > diff --git a/lib/i915/gem_mman.h b/lib/i915/gem_mman.h
> > new file mode 100644
> > index 00000000..2f24ca99
> > --- /dev/null
> > +++ b/lib/i915/gem_mman.h
> > @@ -0,0 +1,61 @@
> > +/*
> > + * Copyright © 2007, 2011, 2013, 2014, 2019 Intel Corporation
> > + *
> > + * Permission is hereby granted, free of charge, to any person obtaining a
> > + * copy of this software and associated documentation files (the "Software"),
> > + * to deal in the Software without restriction, including without limitation
> > + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> > + * and/or sell copies of the Software, and to permit persons to whom the
> > + * Software is furnished to do so, subject to the following conditions:
> > + *
> > + * The above copyright notice and this permission notice (including the next
> > + * paragraph) shall be included in all copies or substantial portions of the
> > + * Software.
> > + *
> > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> > + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> > + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> > + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> > + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> > + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
> > + * IN THE SOFTWARE.
> > + *
> > + */
> > +
> > +#ifndef GEM_MMAN_H
> > +#define GEM_MMAN_H
> > +
> > +struct local_drm_i915_gem_mmap_offset {
> > +     /** Handle for the object being mapped. */
> > +     __u32 handle;
> > +     __u32 pad;
> > +     /**
> > +      * Fake offset to use for subsequent mmap call
> > +      *
> > +      * This is a fixed-size type for 32/64 compatibility.
> > +      */
> > +     __u64 offset;
> > +
> > +     /**
> > +      * Flags for extended behaviour.
> > +      *
> > +      * It is mandatory that either one of the _WC/_WB flags
> > +      * should be passed here.
> > +      */
> > +     __u64 flags;
> > +};
> > +
> > +#define LOCAL_DRM_I915_GEM_MMAP_OFFSET 0x24
> > +#define LOCAL_I915_MMAP_OFFSET_WC (1 << 0)
> > +#define LOCAL_I915_MMAP_OFFSET_WB (1 << 1)
> > +#define LOCAL_I915_MMAP_OFFSET_UC (1 << 2)
> > +
> > +#define LOCAL_DRM_IOCTL_I915_GEM_MMAP_OFFSET \
> > +             DRM_IOWR(DRM_COMMAND_BASE + LOCAL_DRM_I915_GEM_MMAP_OFFSET, struct local_drm_i915_gem_mmap_offset)
> > +
> > +bool has_mmap_offset(int fd);
> > +
> > +void *__gem_mmap_offset(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned int prot, uint64_t flags);
> > +
> > +#endif /* GEM_MMAN_H */
> > +
> > diff --git a/lib/ioctl_wrappers.c b/lib/ioctl_wrappers.c
> > index 404c2fbf..c11b0146 100644
> > --- a/lib/ioctl_wrappers.c
> > +++ b/lib/ioctl_wrappers.c
> > @@ -707,35 +707,50 @@ bool gem_mmap__has_wc(int fd)
> >       static int has_wc = -1;
> >   
> >       if (has_wc == -1) {
> > -             struct drm_i915_getparam gp;
> > -             int mmap_version = -1;
> > -             int gtt_version = -1;
> >   
> >               has_wc = 0;
> >   
> > -             memset(&gp, 0, sizeof(gp));
> > -             gp.param = I915_PARAM_MMAP_GTT_VERSION;
> > -             gp.value = &gtt_version;
> > -             ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
> > -
> > -             memset(&gp, 0, sizeof(gp));
> > -             gp.param = I915_PARAM_MMAP_VERSION;
> > -             gp.value = &mmap_version;
> > -             ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
> > -
> > -             /* Do we have the new mmap_ioctl with DOMAIN_WC? */
> > -             if (mmap_version >= 1 && gtt_version >= 2) {
> > -                     struct drm_i915_gem_mmap arg;
> > +             /* Do we have the new mmap_offset ioctl? */
> > +             if (has_mmap_offset(fd)) {
> > +                     struct local_drm_i915_gem_mmap_offset arg;
> >   
> >                       /* Does this device support wc-mmaps ? */
> >                       memset(&arg, 0, sizeof(arg));
> >                       arg.handle = gem_create(fd, 4096);
> >                       arg.offset = 0;
> > -                     arg.size = 4096;
> > -                     arg.flags = I915_MMAP_WC;
> > -                     has_wc = igt_ioctl(fd, DRM_IOCTL_I915_GEM_MMAP, &arg) == 0;
> > +                     arg.flags = LOCAL_I915_MMAP_OFFSET_WC;
> > +                     has_wc = igt_ioctl(fd, LOCAL_DRM_IOCTL_I915_GEM_MMAP_OFFSET, &arg) == 0;
> >                       gem_close(fd, arg.handle);
> > +             } else {
> > +                     struct drm_i915_getparam gp;
> > +                     int mmap_version = -1;
> > +                     int gtt_version = -1;
> > +
> > +                     memset(&gp, 0, sizeof(gp));
> > +                     gp.param = I915_PARAM_MMAP_GTT_VERSION;
> > +                     gp.value = &gtt_version;
> > +                     ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
> > +
> > +                     memset(&gp, 0, sizeof(gp));
> > +                     gp.param = I915_PARAM_MMAP_VERSION;
> > +                     gp.value = &mmap_version;
> > +                     ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
> > +
> > +                     /* Do we have the mmap_ioctl with DOMAIN_WC? */
> > +                     if (mmap_version >= 1 && gtt_version >= 2) {
> > +                             struct drm_i915_gem_mmap arg;
> > +
> > +                             /* Does this device support wc-mmaps ? */
> > +                             memset(&arg, 0, sizeof(arg));
> > +                             arg.handle = gem_create(fd, 4096);
> > +                             arg.offset = 0;
> > +                             arg.size = 4096;
> > +                             arg.flags = I915_MMAP_WC;
> > +                             has_wc = igt_ioctl(fd, DRM_IOCTL_I915_GEM_MMAP, &arg) == 0;
> > +                             gem_close(fd, arg.handle);
> > +                     }
> >               }
> > +
> >               errno = 0;
> >       }
> >   
> > @@ -795,7 +810,10 @@ static void
> >    */
> >   void *__gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot)
> >   {
> > -     return __gem_mmap(fd, handle, offset, size, prot, I915_MMAP_WC);
> > +     if (has_mmap_offset(fd))
> > +             return __gem_mmap_offset(fd, handle, offset, size, prot, LOCAL_I915_MMAP_OFFSET_WC);
> > +     else
> > +             return __gem_mmap(fd, handle, offset, size, prot, I915_MMAP_WC);

So this is basically,

if (__gem_mmap_offset())
	return __gem_mmap();

because statics are bad!

For the purposes of API testing, we want to be able to still call
__gem_mmap__wc without any magic, and similarly __gem_mmap__offset
directly.

I would suggest that we only put the magic fallback handling into
gem_mmap__wc() and keep __gem_mmap__wc around for the explicit tests of
that ioctl. Same for __gem_mmap__cpu.

The only problem will be some callers of __gem_mmap__wc would like the
nice automagic conversion. But hopefully they are few and far in between
and can be converted to the igt_assert wielding variants instead -- or
we find some other compromise.
-Chris
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[igt-dev] [PATCH i-g-t v2] igt/lib: Add wrapper to check if gtt mapping is available

[Antonio Argenziano]

Add wrapper to get mmap_gtt version number and another to check if
gtt mapping is at all available.

v2:
	- Check errno only after failed syscall. (Chris)

Cc: Katarzyna Dec <katarzyna.dec@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Matthew Auld <matthew.auld@intel.com>
Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
 lib/ioctl_wrappers.c | 46 ++++++++++++++++++++++++++++++++++++--------
 lib/ioctl_wrappers.h | 11 +++++++++++
 2 files changed, 49 insertions(+), 8 deletions(-)

diff --git a/lib/ioctl_wrappers.c b/lib/ioctl_wrappers.c
index c11b0146..94d45d49 100644
--- a/lib/ioctl_wrappers.c
+++ b/lib/ioctl_wrappers.c
@@ -641,6 +641,41 @@ void gem_execbuf_wr(int fd, struct drm_i915_gem_execbuffer2 *execbuf)
 	igt_assert_eq(__gem_execbuf_wr(fd, execbuf), 0);
 }
 
+/**
+ * gem_mmap__gtt_version:
+ * @fd: open i915 drm file descriptor
+ *
+ * This wraps I915_PARAM_MMAP_GTT_VERSION. It will return the supported feature
+ * set for gtt mapping. Since the mappable aperture in not always present, this
+ * function will return '-1' in case there is none.
+ */
+static int gem_mmap__gtt_version(int fd)
+{
+	static int gtt_version = ~0;
+
+	if (gtt_version == ~0) {
+			struct drm_i915_getparam gp;
+
+			gtt_version = 0;
+
+			memset(&gp, 0, sizeof(gp));
+			gp.param = I915_PARAM_MMAP_GTT_VERSION;
+			gp.value = &gtt_version;
+
+			if(ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp) && errno == -ENODEV)
+				gtt_version = -1; /* No mappable aperture */
+
+			errno = 0;
+	}
+
+	return gtt_version;
+}
+
+bool gem_mmap__has_gtt(int fd)
+{
+	return gem_mmap__gtt_version(fd) >= 0;
+}
+
 /**
  * __gem_mmap__gtt:
  * @fd: open i915 drm file descriptor
@@ -707,7 +742,6 @@ bool gem_mmap__has_wc(int fd)
 	static int has_wc = -1;
 
 	if (has_wc == -1) {
-
 		has_wc = 0;
 
 		/* Do we have the new mmap_offset ioctl? */
@@ -724,12 +758,8 @@ bool gem_mmap__has_wc(int fd)
 		} else {
 			struct drm_i915_getparam gp;
 			int mmap_version = -1;
-			int gtt_version = -1;
-
-			memset(&gp, 0, sizeof(gp));
-			gp.param = I915_PARAM_MMAP_GTT_VERSION;
-			gp.value = &gtt_version;
-			ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
+			bool compatible_gtt_version =
+					(!gem_mmap__has_gtt(fd) || gem_mmap__gtt_version(fd) >= 2);
 
 			memset(&gp, 0, sizeof(gp));
 			gp.param = I915_PARAM_MMAP_VERSION;
@@ -737,7 +767,7 @@ bool gem_mmap__has_wc(int fd)
 			ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
 
 			/* Do we have the mmap_ioctl with DOMAIN_WC? */
-			if (mmap_version >= 1 && gtt_version >= 2) {
+			if (mmap_version >= 1 && compatible_gtt_version) {
 				struct drm_i915_gem_mmap arg;
 
 				/* Does this device support wc-mmaps ? */
diff --git a/lib/ioctl_wrappers.h b/lib/ioctl_wrappers.h
index ff4e7681..915a871a 100644
--- a/lib/ioctl_wrappers.h
+++ b/lib/ioctl_wrappers.h
@@ -91,6 +91,8 @@ void *gem_mmap__cpu(int fd, uint32_t handle, uint64_t offset, uint64_t size, uns
 bool gem_mmap__has_wc(int fd);
 void *gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot);
 
+bool gem_mmap__has_gtt(int fd);
+
 #ifndef I915_GEM_DOMAIN_WC
 #define I915_GEM_DOMAIN_WC 0x80
 #endif
@@ -122,6 +124,15 @@ int gem_munmap(void *ptr, uint64_t size);
  */
 #define gem_require_mmap_wc(fd) igt_require(gem_mmap__has_wc(fd))
 
+/**
+ * gem_require_mmap_gtt:
+ * @fd: open i915 drm file descriptor
+ *
+ * Feature test macro to query whether memory mappings through the  mappable
+ * aperture are available. Automatically skips through igt_require() if not.
+ */
+#define gem_require_mmap_gtt(fd) igt_require(gem_mmap__has_gtt(fd))
+
 int gem_madvise(int fd, uint32_t handle, int state);
 
 #define LOCAL_I915_GEM_USERPTR       0x33
-- 
2.20.1

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Re: [igt-dev] [PATCH i-g-t] lib/i915: add mmap_offset support

[Chris Wilson]

Quoting Chris Wilson (2019-02-22 22:13:18)
> Quoting Antonio Argenziano (2019-02-22 22:01:43)
> > 
> > 
> > On 22/02/19 13:59, Antonio Argenziano wrote:
> > > From: "Kalamarz, Lukasz" <lukasz.kalamarz@intel.com>
> > > 
> > > With recently proposed changes, IGT need to start supporting new
> > > way of mmaping object, which will be used from now by default.
> > > This patch modify gem_mmap_wc and gem_mmap functions to be
> > > in sync with those changes.
> > > 
> > > v2:
> > >       - Fix IOCTL number. (Daniele)
> > >       - Move wrappers to new file. (Chris)
> > 
> > Not sure how much of the other stuff we might want to bring over so I've 
> > moved only the new wrappers for now.
> 
> It's a sensible chunk to review, so no worries, more can come later.
> 
> > > Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
> > > Cc: Janulgue Abdiel <abdiel.janulgue@intel.com>
> > > Cc: Matthew Auld <matthew.auld@intel.com>
> > > Cc: Michal Winiarski <michal.winiarski@intel.com>
> > > Cc: Antonio Argenziano <antonio.argenziano@intel.com>
> > > Cc: Daniele Spurio Ceraolo <daniele.ceraolospurio@intel.com>
> > > Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> > > Cc: Chris Wilson <chris@chris-wilson.co.uk>
> > > Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
> > > ---
> > >   lib/i915/gem_mman.c  | 87 ++++++++++++++++++++++++++++++++++++++++++++
> > >   lib/i915/gem_mman.h  | 61 +++++++++++++++++++++++++++++++
> > >   lib/ioctl_wrappers.c | 67 +++++++++++++++++++++++-----------
> > >   lib/ioctl_wrappers.h |  1 +
> > >   lib/meson.build      |  1 +
> > >   5 files changed, 196 insertions(+), 21 deletions(-)
> > >   create mode 100644 lib/i915/gem_mman.c
> > >   create mode 100644 lib/i915/gem_mman.h
> > > 
> > > diff --git a/lib/i915/gem_mman.c b/lib/i915/gem_mman.c
> > > new file mode 100644
> > > index 00000000..fb949f44
> > > --- /dev/null
> > > +++ b/lib/i915/gem_mman.c
> > > @@ -0,0 +1,87 @@
> > > +/*
> > > + * Copyright © 2007, 2011, 2013, 2014, 2019 Intel Corporation
> > > + *
> > > + * Permission is hereby granted, free of charge, to any person obtaining a
> > > + * copy of this software and associated documentation files (the "Software"),
> > > + * to deal in the Software without restriction, including without limitation
> > > + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> > > + * and/or sell copies of the Software, and to permit persons to whom the
> > > + * Software is furnished to do so, subject to the following conditions:
> > > + *
> > > + * The above copyright notice and this permission notice (including the next
> > > + * paragraph) shall be included in all copies or substantial portions of the
> > > + * Software.
> > > + *
> > > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> > > + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> > > + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> > > + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> > > + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> > > + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
> > > + * IN THE SOFTWARE.
> > > + *
> > > + */
> > > +
> > > +#include <stdbool.h>
> > > +#include <sys/ioctl.h>
> > > +
> > > +#include "igt_core.h"
> > > +#include "ioctl_wrappers.h"
> > > +
> > > +#include "gem_mman.h"
> > > +
> > > +
> > > +bool has_mmap_offset(int fd)
> > > +{
> > > +     static int has_mmap_offset = -1;
> > > +
> > > +     if (has_mmap_offset == -1) {
> > > +             struct drm_i915_getparam gp;
> > > +
> > > +             has_mmap_offset = 0;
> > > +
> > > +             memset(&gp, 0, sizeof(gp));
> > > +             gp.param = 0x55; /* I915_PARAM_MMAP_OFFSET_VERSION */
> > > +             gp.value = &has_mmap_offset;
> > > +             ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
> > > +     }
> > > +
> > > +     return has_mmap_offset > 0;
> > > +}
> > > +
> > > +/**
> > > + * __gem_mmap_offset:
> > > + * @fd: open i915 drm file descriptor
> > > + * @handle: gem buffer object handle
> > > + * @offset: offset in the gem buffer of the mmap arena
> > > + * @size: size of the mmap arena
> > > + * @prot: memory protection bits as used by mmap()
> > > + * @flags: flags used to determine caching
> > > + *
> > > + * Similar to __gem_mmap but use MMAP_OFFSET IOCTL.
> > > + *
> > > + * Returns: A pointer to the created memory mapping, NULL on failure.
> > > + */
> > > +void
> > > +*__gem_mmap_offset(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned int prot, uint64_t flags)
> > > +{
> > > +     struct local_drm_i915_gem_mmap_offset arg;
> > > +     void *ptr;
> > > +
> > > +     memset(&arg, 0, sizeof(arg));
> > > +     arg.handle = handle;
> > > +     arg.offset = offset;
> > > +     arg.flags = flags;
> > > +
> > > +     if (igt_ioctl(fd, LOCAL_DRM_IOCTL_I915_GEM_MMAP_OFFSET, &arg))
> > > +             return NULL;
> > > +
> > > +     ptr = mmap64(0, size, prot, MAP_SHARED, fd, arg.offset);
> > > +
> > > +     if (ptr == MAP_FAILED)
> > > +             ptr = NULL;
> > > +     else
> > > +             errno = 0;
> > > +
> > > +     return ptr;
> > > +}
> > > diff --git a/lib/i915/gem_mman.h b/lib/i915/gem_mman.h
> > > new file mode 100644
> > > index 00000000..2f24ca99
> > > --- /dev/null
> > > +++ b/lib/i915/gem_mman.h
> > > @@ -0,0 +1,61 @@
> > > +/*
> > > + * Copyright © 2007, 2011, 2013, 2014, 2019 Intel Corporation
> > > + *
> > > + * Permission is hereby granted, free of charge, to any person obtaining a
> > > + * copy of this software and associated documentation files (the "Software"),
> > > + * to deal in the Software without restriction, including without limitation
> > > + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
> > > + * and/or sell copies of the Software, and to permit persons to whom the
> > > + * Software is furnished to do so, subject to the following conditions:
> > > + *
> > > + * The above copyright notice and this permission notice (including the next
> > > + * paragraph) shall be included in all copies or substantial portions of the
> > > + * Software.
> > > + *
> > > + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
> > > + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
> > > + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
> > > + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
> > > + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
> > > + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
> > > + * IN THE SOFTWARE.
> > > + *
> > > + */
> > > +
> > > +#ifndef GEM_MMAN_H
> > > +#define GEM_MMAN_H
> > > +
> > > +struct local_drm_i915_gem_mmap_offset {
> > > +     /** Handle for the object being mapped. */
> > > +     __u32 handle;
> > > +     __u32 pad;
> > > +     /**
> > > +      * Fake offset to use for subsequent mmap call
> > > +      *
> > > +      * This is a fixed-size type for 32/64 compatibility.
> > > +      */
> > > +     __u64 offset;
> > > +
> > > +     /**
> > > +      * Flags for extended behaviour.
> > > +      *
> > > +      * It is mandatory that either one of the _WC/_WB flags
> > > +      * should be passed here.
> > > +      */
> > > +     __u64 flags;
> > > +};
> > > +
> > > +#define LOCAL_DRM_I915_GEM_MMAP_OFFSET 0x24
> > > +#define LOCAL_I915_MMAP_OFFSET_WC (1 << 0)
> > > +#define LOCAL_I915_MMAP_OFFSET_WB (1 << 1)
> > > +#define LOCAL_I915_MMAP_OFFSET_UC (1 << 2)
> > > +
> > > +#define LOCAL_DRM_IOCTL_I915_GEM_MMAP_OFFSET \
> > > +             DRM_IOWR(DRM_COMMAND_BASE + LOCAL_DRM_I915_GEM_MMAP_OFFSET, struct local_drm_i915_gem_mmap_offset)
> > > +
> > > +bool has_mmap_offset(int fd);
> > > +
> > > +void *__gem_mmap_offset(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned int prot, uint64_t flags);
> > > +
> > > +#endif /* GEM_MMAN_H */
> > > +
> > > diff --git a/lib/ioctl_wrappers.c b/lib/ioctl_wrappers.c
> > > index 404c2fbf..c11b0146 100644
> > > --- a/lib/ioctl_wrappers.c
> > > +++ b/lib/ioctl_wrappers.c
> > > @@ -707,35 +707,50 @@ bool gem_mmap__has_wc(int fd)
> > >       static int has_wc = -1;
> > >   
> > >       if (has_wc == -1) {
> > > -             struct drm_i915_getparam gp;
> > > -             int mmap_version = -1;
> > > -             int gtt_version = -1;
> > >   
> > >               has_wc = 0;
> > >   
> > > -             memset(&gp, 0, sizeof(gp));
> > > -             gp.param = I915_PARAM_MMAP_GTT_VERSION;
> > > -             gp.value = &gtt_version;
> > > -             ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
> > > -
> > > -             memset(&gp, 0, sizeof(gp));
> > > -             gp.param = I915_PARAM_MMAP_VERSION;
> > > -             gp.value = &mmap_version;
> > > -             ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
> > > -
> > > -             /* Do we have the new mmap_ioctl with DOMAIN_WC? */
> > > -             if (mmap_version >= 1 && gtt_version >= 2) {
> > > -                     struct drm_i915_gem_mmap arg;
> > > +             /* Do we have the new mmap_offset ioctl? */
> > > +             if (has_mmap_offset(fd)) {
> > > +                     struct local_drm_i915_gem_mmap_offset arg;
> > >   
> > >                       /* Does this device support wc-mmaps ? */
> > >                       memset(&arg, 0, sizeof(arg));
> > >                       arg.handle = gem_create(fd, 4096);
> > >                       arg.offset = 0;
> > > -                     arg.size = 4096;
> > > -                     arg.flags = I915_MMAP_WC;
> > > -                     has_wc = igt_ioctl(fd, DRM_IOCTL_I915_GEM_MMAP, &arg) == 0;
> > > +                     arg.flags = LOCAL_I915_MMAP_OFFSET_WC;
> > > +                     has_wc = igt_ioctl(fd, LOCAL_DRM_IOCTL_I915_GEM_MMAP_OFFSET, &arg) == 0;
> > >                       gem_close(fd, arg.handle);
> > > +             } else {
> > > +                     struct drm_i915_getparam gp;
> > > +                     int mmap_version = -1;
> > > +                     int gtt_version = -1;
> > > +
> > > +                     memset(&gp, 0, sizeof(gp));
> > > +                     gp.param = I915_PARAM_MMAP_GTT_VERSION;
> > > +                     gp.value = &gtt_version;
> > > +                     ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
> > > +
> > > +                     memset(&gp, 0, sizeof(gp));
> > > +                     gp.param = I915_PARAM_MMAP_VERSION;
> > > +                     gp.value = &mmap_version;
> > > +                     ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
> > > +
> > > +                     /* Do we have the mmap_ioctl with DOMAIN_WC? */
> > > +                     if (mmap_version >= 1 && gtt_version >= 2) {
> > > +                             struct drm_i915_gem_mmap arg;
> > > +
> > > +                             /* Does this device support wc-mmaps ? */
> > > +                             memset(&arg, 0, sizeof(arg));
> > > +                             arg.handle = gem_create(fd, 4096);
> > > +                             arg.offset = 0;
> > > +                             arg.size = 4096;
> > > +                             arg.flags = I915_MMAP_WC;
> > > +                             has_wc = igt_ioctl(fd, DRM_IOCTL_I915_GEM_MMAP, &arg) == 0;
> > > +                             gem_close(fd, arg.handle);
> > > +                     }
> > >               }
> > > +
> > >               errno = 0;
> > >       }
> > >   
> > > @@ -795,7 +810,10 @@ static void
> > >    */
> > >   void *__gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot)
> > >   {
> > > -     return __gem_mmap(fd, handle, offset, size, prot, I915_MMAP_WC);
> > > +     if (has_mmap_offset(fd))
> > > +             return __gem_mmap_offset(fd, handle, offset, size, prot, LOCAL_I915_MMAP_OFFSET_WC);
> > > +     else
> > > +             return __gem_mmap(fd, handle, offset, size, prot, I915_MMAP_WC);
> 
> So this is basically,
> 
> if (__gem_mmap_offset())
>         return __gem_mmap();
> 
> because statics are bad!
> 
> For the purposes of API testing, we want to be able to still call
> __gem_mmap__wc without any magic, and similarly __gem_mmap__offset
> directly.
> 
> I would suggest that we only put the magic fallback handling into
> gem_mmap__wc() and keep __gem_mmap__wc around for the explicit tests of
> that ioctl. Same for __gem_mmap__cpu.
> 
> The only problem will be some callers of __gem_mmap__wc would like the
> nice automagic conversion. But hopefully they are few and far in between
> and can be converted to the igt_assert wielding variants instead -- or
> we find some other compromise.

One compromise would be to say that all ioctl testing is done is
gem_mmap_wc etc, and that they can have their own custom ioctl wrapper.
And in the library for everyone else, we put the magic wrapper as those
callers only care about obtaining WC access to the bo not how.
-Chris
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[igt-dev] ✗ Fi.CI.BAT: failure for Modify tests for unavailable mappable aperture (rev4)

[Patchwork]

== Series Details ==

Series: Modify tests for unavailable mappable aperture (rev4)
URL   : https://patchwork.freedesktop.org/series/57042/
State : failure

== Summary ==

IGT patchset build failed on latest successful build
8afdfd8fa9ce17043d9105dedca46ad4555fdcdb tests/prime_self_import: Swap gtt mapping for cpu

ninja: Entering directory `build'
[1/478] Generating version.h with a custom command.
[2/475] Compiling C object 'lib/lib@@igt-i915_gem_mman_c@sta/i915_gem_mman.c.o'.
FAILED: lib/lib@@igt-i915_gem_mman_c@sta/i915_gem_mman.c.o 
ccache cc -Ilib/lib@@igt-i915_gem_mman_c@sta -Ilib -I../lib -I../include/drm-uapi -I../lib/stubs/syscalls -I. -I../ -I/usr/include/cairo -I/usr/include/glib-2.0 -I/usr/lib/x86_64-linux-gnu/glib-2.0/include -I/usr/include/pixman-1 -I/usr/include/libpng16 -I/usr/include/freetype2 -I/usr/include/libpng12 -I/opt/igt/include -I/opt/igt/include/libdrm -I/usr/include/x86_64-linux-gnu -I/usr/include -I/home/cidrm/kernel_headers/include -fdiagnostics-color=always -pipe -D_FILE_OFFSET_BITS=64 -Wall -Winvalid-pch -Wextra -std=gnu11 -O0 -g -D_GNU_SOURCE -include config.h -Wbad-function-cast -Wdeclaration-after-statement -Wformat=2 -Wimplicit-fallthrough=0 -Wlogical-op -Wmissing-declarations -Wmissing-format-attribute -Wmissing-noreturn -Wmissing-prototypes -Wnested-externs -Wold-style-definition -Wpointer-arith -Wredundant-decls -Wshadow -Wstrict-prototypes -Wuninitialized -Wunused -Wno-clobbered -Wno-maybe-uninitialized -Wno-missing-field-initializers -Wno-pointer-arith -Wno-sign-compare -Wno-type-limits -Wno-unused-parameter -Wno-unused-result -Werror=address -Werror=array-bounds -Werror=implicit -Werror=init-self -Werror=int-to-pointer-cast -Werror=main -Werror=missing-braces -Werror=nonnull -Werror=pointer-to-int-cast -Werror=return-type -Werror=sequence-point -Werror=trigraphs -Werror=write-strings -fPIC -pthread '-DIGT_DATADIR="/opt/igt/share/igt-gpu-tools"' '-DIGT_SRCDIR="/home/cidrm/igt-gpu-tools/tests"' '-DIGT_LOG_DOMAIN="i915/gem_mman"'  -MD -MQ 'lib/lib@@igt-i915_gem_mman_c@sta/i915_gem_mman.c.o' -MF 'lib/lib@@igt-i915_gem_mman_c@sta/i915_gem_mman.c.o.d' -o 'lib/lib@@igt-i915_gem_mman_c@sta/i915_gem_mman.c.o' -c ../lib/i915/gem_mman.c
../lib/i915/gem_mman.c: In function ‘__gem_mmap_offset’:
../lib/i915/gem_mman.c:84:3: error: ‘errno’ undeclared (first use in this function); did you mean ‘perror’?
   errno = 0;
   ^~~~~
   perror
../lib/i915/gem_mman.c:84:3: note: each undeclared identifier is reported only once for each function it appears in
ninja: build stopped: subcommand failed.

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Re: [igt-dev] [PATCH i-g-t] lib/i915: add mmap_offset support

[Antonio Argenziano]

On 22/02/19 14:29, Chris Wilson wrote:
> Quoting Chris Wilson (2019-02-22 22:13:18)
>> Quoting Antonio Argenziano (2019-02-22 22:01:43)
>>>
>>>
>>> On 22/02/19 13:59, Antonio Argenziano wrote:
>>>> From: "Kalamarz, Lukasz" <lukasz.kalamarz@intel.com>
>>>>
>>>> With recently proposed changes, IGT need to start supporting new
>>>> way of mmaping object, which will be used from now by default.
>>>> This patch modify gem_mmap_wc and gem_mmap functions to be
>>>> in sync with those changes.
>>>>
>>>> v2:
>>>>        - Fix IOCTL number. (Daniele)
>>>>        - Move wrappers to new file. (Chris)
>>>
>>> Not sure how much of the other stuff we might want to bring over so I've
>>> moved only the new wrappers for now.
>>
>> It's a sensible chunk to review, so no worries, more can come later.
>>
>>>> Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
>>>> Cc: Janulgue Abdiel <abdiel.janulgue@intel.com>
>>>> Cc: Matthew Auld <matthew.auld@intel.com>
>>>> Cc: Michal Winiarski <michal.winiarski@intel.com>
>>>> Cc: Antonio Argenziano <antonio.argenziano@intel.com>
>>>> Cc: Daniele Spurio Ceraolo <daniele.ceraolospurio@intel.com>
>>>> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
>>>> Cc: Chris Wilson <chris@chris-wilson.co.uk>
>>>> Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
>>>> ---
>>>>    lib/i915/gem_mman.c  | 87 ++++++++++++++++++++++++++++++++++++++++++++
>>>>    lib/i915/gem_mman.h  | 61 +++++++++++++++++++++++++++++++
>>>>    lib/ioctl_wrappers.c | 67 +++++++++++++++++++++++-----------
>>>>    lib/ioctl_wrappers.h |  1 +
>>>>    lib/meson.build      |  1 +
>>>>    5 files changed, 196 insertions(+), 21 deletions(-)
>>>>    create mode 100644 lib/i915/gem_mman.c
>>>>    create mode 100644 lib/i915/gem_mman.h
>>>>
>>>> diff --git a/lib/i915/gem_mman.c b/lib/i915/gem_mman.c
>>>> new file mode 100644
>>>> index 00000000..fb949f44
>>>> --- /dev/null
>>>> +++ b/lib/i915/gem_mman.c
>>>> @@ -0,0 +1,87 @@
>>>> +/*
>>>> + * Copyright © 2007, 2011, 2013, 2014, 2019 Intel Corporation
>>>> + *
>>>> + * Permission is hereby granted, free of charge, to any person obtaining a
>>>> + * copy of this software and associated documentation files (the "Software"),
>>>> + * to deal in the Software without restriction, including without limitation
>>>> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
>>>> + * and/or sell copies of the Software, and to permit persons to whom the
>>>> + * Software is furnished to do so, subject to the following conditions:
>>>> + *
>>>> + * The above copyright notice and this permission notice (including the next
>>>> + * paragraph) shall be included in all copies or substantial portions of the
>>>> + * Software.
>>>> + *
>>>> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
>>>> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
>>>> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
>>>> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
>>>> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
>>>> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
>>>> + * IN THE SOFTWARE.
>>>> + *
>>>> + */
>>>> +
>>>> +#include <stdbool.h>
>>>> +#include <sys/ioctl.h>
>>>> +
>>>> +#include "igt_core.h"
>>>> +#include "ioctl_wrappers.h"
>>>> +
>>>> +#include "gem_mman.h"
>>>> +
>>>> +
>>>> +bool has_mmap_offset(int fd)
>>>> +{
>>>> +     static int has_mmap_offset = -1;
>>>> +
>>>> +     if (has_mmap_offset == -1) {
>>>> +             struct drm_i915_getparam gp;
>>>> +
>>>> +             has_mmap_offset = 0;
>>>> +
>>>> +             memset(&gp, 0, sizeof(gp));
>>>> +             gp.param = 0x55; /* I915_PARAM_MMAP_OFFSET_VERSION */
>>>> +             gp.value = &has_mmap_offset;
>>>> +             ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
>>>> +     }
>>>> +
>>>> +     return has_mmap_offset > 0;
>>>> +}
>>>> +
>>>> +/**
>>>> + * __gem_mmap_offset:
>>>> + * @fd: open i915 drm file descriptor
>>>> + * @handle: gem buffer object handle
>>>> + * @offset: offset in the gem buffer of the mmap arena
>>>> + * @size: size of the mmap arena
>>>> + * @prot: memory protection bits as used by mmap()
>>>> + * @flags: flags used to determine caching
>>>> + *
>>>> + * Similar to __gem_mmap but use MMAP_OFFSET IOCTL.
>>>> + *
>>>> + * Returns: A pointer to the created memory mapping, NULL on failure.
>>>> + */
>>>> +void
>>>> +*__gem_mmap_offset(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned int prot, uint64_t flags)
>>>> +{
>>>> +     struct local_drm_i915_gem_mmap_offset arg;
>>>> +     void *ptr;
>>>> +
>>>> +     memset(&arg, 0, sizeof(arg));
>>>> +     arg.handle = handle;
>>>> +     arg.offset = offset;
>>>> +     arg.flags = flags;
>>>> +
>>>> +     if (igt_ioctl(fd, LOCAL_DRM_IOCTL_I915_GEM_MMAP_OFFSET, &arg))
>>>> +             return NULL;
>>>> +
>>>> +     ptr = mmap64(0, size, prot, MAP_SHARED, fd, arg.offset);
>>>> +
>>>> +     if (ptr == MAP_FAILED)
>>>> +             ptr = NULL;
>>>> +     else
>>>> +             errno = 0;
>>>> +
>>>> +     return ptr;
>>>> +}
>>>> diff --git a/lib/i915/gem_mman.h b/lib/i915/gem_mman.h
>>>> new file mode 100644
>>>> index 00000000..2f24ca99
>>>> --- /dev/null
>>>> +++ b/lib/i915/gem_mman.h
>>>> @@ -0,0 +1,61 @@
>>>> +/*
>>>> + * Copyright © 2007, 2011, 2013, 2014, 2019 Intel Corporation
>>>> + *
>>>> + * Permission is hereby granted, free of charge, to any person obtaining a
>>>> + * copy of this software and associated documentation files (the "Software"),
>>>> + * to deal in the Software without restriction, including without limitation
>>>> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,
>>>> + * and/or sell copies of the Software, and to permit persons to whom the
>>>> + * Software is furnished to do so, subject to the following conditions:
>>>> + *
>>>> + * The above copyright notice and this permission notice (including the next
>>>> + * paragraph) shall be included in all copies or substantial portions of the
>>>> + * Software.
>>>> + *
>>>> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
>>>> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
>>>> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
>>>> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
>>>> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
>>>> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
>>>> + * IN THE SOFTWARE.
>>>> + *
>>>> + */
>>>> +
>>>> +#ifndef GEM_MMAN_H
>>>> +#define GEM_MMAN_H
>>>> +
>>>> +struct local_drm_i915_gem_mmap_offset {
>>>> +     /** Handle for the object being mapped. */
>>>> +     __u32 handle;
>>>> +     __u32 pad;
>>>> +     /**
>>>> +      * Fake offset to use for subsequent mmap call
>>>> +      *
>>>> +      * This is a fixed-size type for 32/64 compatibility.
>>>> +      */
>>>> +     __u64 offset;
>>>> +
>>>> +     /**
>>>> +      * Flags for extended behaviour.
>>>> +      *
>>>> +      * It is mandatory that either one of the _WC/_WB flags
>>>> +      * should be passed here.
>>>> +      */
>>>> +     __u64 flags;
>>>> +};
>>>> +
>>>> +#define LOCAL_DRM_I915_GEM_MMAP_OFFSET 0x24
>>>> +#define LOCAL_I915_MMAP_OFFSET_WC (1 << 0)
>>>> +#define LOCAL_I915_MMAP_OFFSET_WB (1 << 1)
>>>> +#define LOCAL_I915_MMAP_OFFSET_UC (1 << 2)
>>>> +
>>>> +#define LOCAL_DRM_IOCTL_I915_GEM_MMAP_OFFSET \
>>>> +             DRM_IOWR(DRM_COMMAND_BASE + LOCAL_DRM_I915_GEM_MMAP_OFFSET, struct local_drm_i915_gem_mmap_offset)
>>>> +
>>>> +bool has_mmap_offset(int fd);
>>>> +
>>>> +void *__gem_mmap_offset(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned int prot, uint64_t flags);
>>>> +
>>>> +#endif /* GEM_MMAN_H */
>>>> +
>>>> diff --git a/lib/ioctl_wrappers.c b/lib/ioctl_wrappers.c
>>>> index 404c2fbf..c11b0146 100644
>>>> --- a/lib/ioctl_wrappers.c
>>>> +++ b/lib/ioctl_wrappers.c
>>>> @@ -707,35 +707,50 @@ bool gem_mmap__has_wc(int fd)
>>>>        static int has_wc = -1;
>>>>    
>>>>        if (has_wc == -1) {
>>>> -             struct drm_i915_getparam gp;
>>>> -             int mmap_version = -1;
>>>> -             int gtt_version = -1;
>>>>    
>>>>                has_wc = 0;
>>>>    
>>>> -             memset(&gp, 0, sizeof(gp));
>>>> -             gp.param = I915_PARAM_MMAP_GTT_VERSION;
>>>> -             gp.value = &gtt_version;
>>>> -             ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
>>>> -
>>>> -             memset(&gp, 0, sizeof(gp));
>>>> -             gp.param = I915_PARAM_MMAP_VERSION;
>>>> -             gp.value = &mmap_version;
>>>> -             ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
>>>> -
>>>> -             /* Do we have the new mmap_ioctl with DOMAIN_WC? */
>>>> -             if (mmap_version >= 1 && gtt_version >= 2) {
>>>> -                     struct drm_i915_gem_mmap arg;
>>>> +             /* Do we have the new mmap_offset ioctl? */
>>>> +             if (has_mmap_offset(fd)) {
>>>> +                     struct local_drm_i915_gem_mmap_offset arg;
>>>>    
>>>>                        /* Does this device support wc-mmaps ? */
>>>>                        memset(&arg, 0, sizeof(arg));
>>>>                        arg.handle = gem_create(fd, 4096);
>>>>                        arg.offset = 0;
>>>> -                     arg.size = 4096;
>>>> -                     arg.flags = I915_MMAP_WC;
>>>> -                     has_wc = igt_ioctl(fd, DRM_IOCTL_I915_GEM_MMAP, &arg) == 0;
>>>> +                     arg.flags = LOCAL_I915_MMAP_OFFSET_WC;
>>>> +                     has_wc = igt_ioctl(fd, LOCAL_DRM_IOCTL_I915_GEM_MMAP_OFFSET, &arg) == 0;
>>>>                        gem_close(fd, arg.handle);
>>>> +             } else {
>>>> +                     struct drm_i915_getparam gp;
>>>> +                     int mmap_version = -1;
>>>> +                     int gtt_version = -1;
>>>> +
>>>> +                     memset(&gp, 0, sizeof(gp));
>>>> +                     gp.param = I915_PARAM_MMAP_GTT_VERSION;
>>>> +                     gp.value = &gtt_version;
>>>> +                     ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
>>>> +
>>>> +                     memset(&gp, 0, sizeof(gp));
>>>> +                     gp.param = I915_PARAM_MMAP_VERSION;
>>>> +                     gp.value = &mmap_version;
>>>> +                     ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
>>>> +
>>>> +                     /* Do we have the mmap_ioctl with DOMAIN_WC? */
>>>> +                     if (mmap_version >= 1 && gtt_version >= 2) {
>>>> +                             struct drm_i915_gem_mmap arg;
>>>> +
>>>> +                             /* Does this device support wc-mmaps ? */
>>>> +                             memset(&arg, 0, sizeof(arg));
>>>> +                             arg.handle = gem_create(fd, 4096);
>>>> +                             arg.offset = 0;
>>>> +                             arg.size = 4096;
>>>> +                             arg.flags = I915_MMAP_WC;
>>>> +                             has_wc = igt_ioctl(fd, DRM_IOCTL_I915_GEM_MMAP, &arg) == 0;
>>>> +                             gem_close(fd, arg.handle);
>>>> +                     }
>>>>                }
>>>> +
>>>>                errno = 0;
>>>>        }
>>>>    
>>>> @@ -795,7 +810,10 @@ static void
>>>>     */
>>>>    void *__gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot)
>>>>    {
>>>> -     return __gem_mmap(fd, handle, offset, size, prot, I915_MMAP_WC);
>>>> +     if (has_mmap_offset(fd))
>>>> +             return __gem_mmap_offset(fd, handle, offset, size, prot, LOCAL_I915_MMAP_OFFSET_WC);
>>>> +     else
>>>> +             return __gem_mmap(fd, handle, offset, size, prot, I915_MMAP_WC);
>>
>> So this is basically,
>>
>> if (__gem_mmap_offset())
>>          return __gem_mmap();
>>
>> because statics are bad!
>>
>> For the purposes of API testing, we want to be able to still call
>> __gem_mmap__wc without any magic, and similarly __gem_mmap__offset
>> directly.
>>
>> I would suggest that we only put the magic fallback handling into
>> gem_mmap__wc() and keep __gem_mmap__wc around for the explicit tests of
>> that ioctl. Same for __gem_mmap__cpu.
>>
>> The only problem will be some callers of __gem_mmap__wc would like the
>> nice automagic conversion. But hopefully they are few and far in between
>> and can be converted to the igt_assert wielding variants instead -- or
>> we find some other compromise.
> 
> One compromise would be to say that all ioctl testing is done is
> gem_mmap_wc etc, and that they can have their own custom ioctl wrapper.
> And in the library for everyone else, we put the magic wrapper as those
> callers only care about obtaining WC access to the bo not how.

Yep, I think we can still keep the wrapper in the lib (a __gem_mmap__ 
like you suggested), just in case someone else comes asking for a 
library call. But I think it is a good idea to keep the api tests in 
gem_mmap_ tests and all others just get the mapping no matter how.

Antonio

> -Chris
> 
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Re: [igt-dev] [RFC 4/5] igt/i915: Require GTT mapping to be available when needed.

[Antonio Argenziano]

On 21/02/19 11:57, Chris Wilson wrote:
> Quoting Antonio Argenziano (2019-02-21 19:27:44)
>> With the GTT aperture becoming unavailable on certain platforms, tests
>> that target that mapping need to skip if such mapping is not available.
> 
> Meh, but necessary.
> 
> A few of the coherency correctness checks, like prime, should be
> extended to check via alternate paths (WC, WB + sync).

Should we do it in this series or wait to implement new tests later?

Antonio

> -Chris
> 
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Re: [igt-dev] [RFC 4/5] igt/i915: Require GTT mapping to be available when needed.

[Chris Wilson]

Quoting Antonio Argenziano (2019-02-23 00:01:27)
> 
> 
> On 21/02/19 11:57, Chris Wilson wrote:
> > Quoting Antonio Argenziano (2019-02-21 19:27:44)
> >> With the GTT aperture becoming unavailable on certain platforms, tests
> >> that target that mapping need to skip if such mapping is not available.
> > 
> > Meh, but necessary.
> > 
> > A few of the coherency correctness checks, like prime, should be
> > extended to check via alternate paths (WC, WB + sync).
> 
> Should we do it in this series or wait to implement new tests later?

It is prerequisite work; if we spot that we think we are entirely losing
coverage of some obscure uapi feature we should fix that up prior to
removing the GTT test. Once it is gone, we are not as likely to remember
to put it back again.
-Chris
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[igt-dev] [PATCH i-g-t v3 1/2] lib/i915: add mmap_offset support

[Antonio Argenziano]

From: "Kalamarz, Lukasz" <lukasz.kalamarz@intel.com>

With recently proposed changes, IGT need to start supporting new
way of mmaping object, which will be used from now by default.
This patch modify gem_mmap_wc and gem_mmap functions to be
in sync with those changes.

v2:
	- Fix IOCTL number. (Daniele)
	- Move wrappers to new file. (Chris)

v3:
	- Use mmap IOCTL for lowr level wrappers. (Chris)

Signed-off-by: Lukasz Kalamarz <lukasz.kalamarz@intel.com>
Cc: Janulgue Abdiel <abdiel.janulgue@intel.com>
Cc: Matthew Auld <matthew.auld@intel.com>
Cc: Michal Winiarski <michal.winiarski@intel.com>
Cc: Antonio Argenziano <antonio.argenziano@intel.com>
Cc: Daniele Spurio Ceraolo <daniele.ceraolospurio@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
---
 lib/i915/gem_mman.c  | 89 ++++++++++++++++++++++++++++++++++++++++++++
 lib/i915/gem_mman.h  | 61 ++++++++++++++++++++++++++++++
 lib/ioctl_wrappers.c | 67 ++++++++++++++++++++++-----------
 lib/ioctl_wrappers.h |  1 +
 lib/meson.build      |  1 +
 5 files changed, 198 insertions(+), 21 deletions(-)
 create mode 100644 lib/i915/gem_mman.c
 create mode 100644 lib/i915/gem_mman.h

diff --git a/lib/i915/gem_mman.c b/lib/i915/gem_mman.c
new file mode 100644
index 00000000..54dcaf42
--- /dev/null
+++ b/lib/i915/gem_mman.c
@@ -0,0 +1,89 @@
+/*
+ * Copyright © 2007, 2011, 2013, 2014, 2019 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ */
+
+#include <stdbool.h>
+#include <sys/ioctl.h>
+#include <errno.h>
+
+#include "igt_core.h"
+#include "ioctl_wrappers.h"
+
+#include "gem_mman.h"
+
+
+bool has_mmap_offset(int fd)
+{
+	static int has_mmap_offset = -1;
+
+	if (has_mmap_offset == -1) {
+		struct drm_i915_getparam gp;
+
+		has_mmap_offset = 0;
+
+		memset(&gp, 0, sizeof(gp));
+		gp.param = 0x55; /* I915_PARAM_MMAP_OFFSET_VERSION */
+		gp.value = &has_mmap_offset;
+		ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
+	}
+
+	return has_mmap_offset > 0;
+}
+
+/**
+ * __gem_mmap_offset:
+ * @fd: open i915 drm file descriptor
+ * @handle: gem buffer object handle
+ * @offset: offset in the gem buffer of the mmap arena
+ * @size: size of the mmap arena
+ * @prot: memory protection bits as used by mmap()
+ * @flags: flags used to determine caching
+ *
+ * Similar to __gem_mmap but use MMAP_OFFSET IOCTL.
+ *
+ * Returns: A pointer to the created memory mapping, NULL on failure.
+ */
+void
+*__gem_mmap_offset(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned int prot, uint64_t flags)
+{
+	struct local_drm_i915_gem_mmap_offset arg;
+	void *ptr;
+
+	memset(&arg, 0, sizeof(arg));
+	arg.handle = handle;
+	arg.offset = offset;
+	arg.flags = flags;
+
+	if (igt_ioctl(fd, LOCAL_DRM_IOCTL_I915_GEM_MMAP_OFFSET, &arg))
+		return NULL;
+
+	ptr = mmap64(0, size, prot, MAP_SHARED, fd, arg.offset);
+
+	if (ptr == MAP_FAILED)
+		ptr = NULL;
+	else
+		errno = 0;
+
+	return ptr;
+}
+
diff --git a/lib/i915/gem_mman.h b/lib/i915/gem_mman.h
new file mode 100644
index 00000000..2f24ca99
--- /dev/null
+++ b/lib/i915/gem_mman.h
@@ -0,0 +1,61 @@
+/*
+ * Copyright © 2007, 2011, 2013, 2014, 2019 Intel Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
+ * IN THE SOFTWARE.
+ *
+ */
+
+#ifndef GEM_MMAN_H
+#define GEM_MMAN_H
+
+struct local_drm_i915_gem_mmap_offset {
+	/** Handle for the object being mapped. */
+	__u32 handle;
+	__u32 pad;
+	/**
+	 * Fake offset to use for subsequent mmap call
+	 *
+	 * This is a fixed-size type for 32/64 compatibility.
+	 */
+	__u64 offset;
+
+	/**
+	 * Flags for extended behaviour.
+	 *
+	 * It is mandatory that either one of the _WC/_WB flags
+	 * should be passed here.
+	 */
+	__u64 flags;
+};
+
+#define LOCAL_DRM_I915_GEM_MMAP_OFFSET 0x24
+#define LOCAL_I915_MMAP_OFFSET_WC (1 << 0)
+#define LOCAL_I915_MMAP_OFFSET_WB (1 << 1)
+#define LOCAL_I915_MMAP_OFFSET_UC (1 << 2)
+
+#define LOCAL_DRM_IOCTL_I915_GEM_MMAP_OFFSET \
+		DRM_IOWR(DRM_COMMAND_BASE + LOCAL_DRM_I915_GEM_MMAP_OFFSET, struct local_drm_i915_gem_mmap_offset)
+
+bool has_mmap_offset(int fd);
+
+void *__gem_mmap_offset(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned int prot, uint64_t flags);
+
+#endif /* GEM_MMAN_H */
+
diff --git a/lib/ioctl_wrappers.c b/lib/ioctl_wrappers.c
index 404c2fbf..73a927f1 100644
--- a/lib/ioctl_wrappers.c
+++ b/lib/ioctl_wrappers.c
@@ -707,35 +707,50 @@ bool gem_mmap__has_wc(int fd)
 	static int has_wc = -1;
 
 	if (has_wc == -1) {
-		struct drm_i915_getparam gp;
-		int mmap_version = -1;
-		int gtt_version = -1;
 
 		has_wc = 0;
 
-		memset(&gp, 0, sizeof(gp));
-		gp.param = I915_PARAM_MMAP_GTT_VERSION;
-		gp.value = &gtt_version;
-		ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
-
-		memset(&gp, 0, sizeof(gp));
-		gp.param = I915_PARAM_MMAP_VERSION;
-		gp.value = &mmap_version;
-		ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
-
-		/* Do we have the new mmap_ioctl with DOMAIN_WC? */
-		if (mmap_version >= 1 && gtt_version >= 2) {
-			struct drm_i915_gem_mmap arg;
+		/* Do we have the new mmap_offset ioctl? */
+		if (has_mmap_offset(fd)) {
+			struct local_drm_i915_gem_mmap_offset arg;
 
 			/* Does this device support wc-mmaps ? */
 			memset(&arg, 0, sizeof(arg));
 			arg.handle = gem_create(fd, 4096);
 			arg.offset = 0;
-			arg.size = 4096;
-			arg.flags = I915_MMAP_WC;
-			has_wc = igt_ioctl(fd, DRM_IOCTL_I915_GEM_MMAP, &arg) == 0;
+			arg.flags = LOCAL_I915_MMAP_OFFSET_WC;
+			has_wc = igt_ioctl(fd, LOCAL_DRM_IOCTL_I915_GEM_MMAP_OFFSET, &arg) == 0;
 			gem_close(fd, arg.handle);
+		} else {
+			struct drm_i915_getparam gp;
+			int mmap_version = -1;
+			int gtt_version = -1;
+
+			memset(&gp, 0, sizeof(gp));
+			gp.param = I915_PARAM_MMAP_GTT_VERSION;
+			gp.value = &gtt_version;
+			ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
+
+			memset(&gp, 0, sizeof(gp));
+			gp.param = I915_PARAM_MMAP_VERSION;
+			gp.value = &mmap_version;
+			ioctl(fd, DRM_IOCTL_I915_GETPARAM, &gp);
+
+			/* Do we have the mmap_ioctl with DOMAIN_WC? */
+			if (mmap_version >= 1 && gtt_version >= 2) {
+				struct drm_i915_gem_mmap arg;
+
+				/* Does this device support wc-mmaps ? */
+				memset(&arg, 0, sizeof(arg));
+				arg.handle = gem_create(fd, 4096);
+				arg.offset = 0;
+				arg.size = 4096;
+				arg.flags = I915_MMAP_WC;
+				has_wc = igt_ioctl(fd, DRM_IOCTL_I915_GEM_MMAP, &arg) == 0;
+				gem_close(fd, arg.handle);
+			}
 		}
+
 		errno = 0;
 	}
 
@@ -812,7 +827,12 @@ void *__gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, un
  */
 void *gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot)
 {
-	void *ptr = __gem_mmap__wc(fd, handle, offset, size, prot);
+	void *ptr;
+
+	ptr = __gem_mmap_offset(fd, handle, offset, size, prot, LOCAL_I915_MMAP_OFFSET_WC);
+	if (!ptr)
+		ptr = __gem_mmap__wc(fd, handle, offset, size, prot);
+
 	igt_assert(ptr);
 	return ptr;
 }
@@ -849,7 +869,12 @@ void *__gem_mmap__cpu(int fd, uint32_t handle, uint64_t offset, uint64_t size, u
  */
 void *gem_mmap__cpu(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot)
 {
-	void *ptr = __gem_mmap__cpu(fd, handle, offset, size, prot);
+	void *ptr;
+
+	ptr = __gem_mmap_offset(fd, handle, offset, size, prot, LOCAL_I915_MMAP_OFFSET_WB);
+	if (!ptr)
+		ptr = __gem_mmap(fd, handle, offset, size, prot, 0);
+
 	igt_assert(ptr);
 	return ptr;
 }
diff --git a/lib/ioctl_wrappers.h b/lib/ioctl_wrappers.h
index b22b36b0..ff4e7681 100644
--- a/lib/ioctl_wrappers.h
+++ b/lib/ioctl_wrappers.h
@@ -38,6 +38,7 @@
 
 #include "i915/gem_context.h"
 #include "i915/gem_scheduler.h"
+#include "i915/gem_mman.h"
 
 /**
  * igt_ioctl:
diff --git a/lib/meson.build b/lib/meson.build
index dd36f818..0eb5585d 100644
--- a/lib/meson.build
+++ b/lib/meson.build
@@ -4,6 +4,7 @@ lib_sources = [
 	'i915/gem_scheduler.c',
 	'i915/gem_submission.c',
 	'i915/gem_ring.c',
+	'i915/gem_mman.c',
 	'igt_color_encoding.c',
 	'igt_debugfs.c',
 	'igt_device.c',
-- 
2.20.1

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[igt-dev] [PATCH i-g-t v3 2/2] tests/i915/gem_mmap_wc: Add local MMAP wrapper

[Antonio Argenziano]

The common library wrappers now try going through the MMAP_OFFSET IOCTL
first. Since the tests in gem_mmap_wc are targeted at the GEM_MMAP
IOCTL, add a local wrapper.

Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
---
 tests/i915/gem_mmap_wc.c | 27 +++++++++++++++++++++------
 1 file changed, 21 insertions(+), 6 deletions(-)

diff --git a/tests/i915/gem_mmap_wc.c b/tests/i915/gem_mmap_wc.c
index 110883eb..baa68aa8 100644
--- a/tests/i915/gem_mmap_wc.c
+++ b/tests/i915/gem_mmap_wc.c
@@ -51,6 +51,21 @@ struct local_i915_gem_mmap_v2 {
 
 static int OBJECT_SIZE = 16*1024*1024;
 
+/*
+ * Local WC mmap wrapper. This is used to make sure we go through
+ * the GEM_MMAP IOCTL.
+ * */
+static void *
+local_gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot)
+{
+	void *ptr;
+
+	ptr = __gem_mmap__wc(fd, handle, 0, OBJECT_SIZE, PROT_READ | PROT_WRITE);
+	igt_assert(ptr);
+
+	return ptr;
+}
+
 static void set_domain(int fd, uint32_t handle)
 {
 	gem_set_domain(fd, handle, I915_GEM_DOMAIN_WC, I915_GEM_DOMAIN_WC);
@@ -61,7 +76,7 @@ mmap_bo(int fd, uint32_t handle)
 {
 	void *ptr;
 
-	ptr = gem_mmap__wc(fd, handle, 0, OBJECT_SIZE, PROT_READ | PROT_WRITE);
+	ptr = local_gem_mmap__wc(fd, handle, 0, OBJECT_SIZE, PROT_READ | PROT_WRITE);
 
 	return ptr;
 }
@@ -177,9 +192,9 @@ test_read_write2(int fd, enum test_read_write order)
 	handle = gem_create(fd, OBJECT_SIZE);
 	set_domain(fd, handle);
 
-	r = gem_mmap__wc(fd, handle, 0, OBJECT_SIZE, PROT_READ);
+	r = local_gem_mmap__wc(fd, handle, 0, OBJECT_SIZE, PROT_READ);
 
-	w = gem_mmap__wc(fd, handle, 0, OBJECT_SIZE, PROT_READ | PROT_WRITE);
+	w = local_gem_mmap__wc(fd, handle, 0, OBJECT_SIZE, PROT_READ | PROT_WRITE);
 
 	if (order == READ_BEFORE_WRITE) {
 		val = *(uint32_t *)r;
@@ -221,7 +236,7 @@ test_coherency(int fd)
 
 	handle = gem_create(fd, OBJECT_SIZE);
 
-	wc = gem_mmap__wc(fd, handle, 0, OBJECT_SIZE, PROT_READ | PROT_WRITE);
+	wc = local_gem_mmap__wc(fd, handle, 0, OBJECT_SIZE, PROT_READ | PROT_WRITE);
 	cpu = gem_mmap__cpu(fd, handle, 0, OBJECT_SIZE, PROT_READ | PROT_WRITE);
 	gem_set_domain(fd, handle, I915_GEM_DOMAIN_WC, I915_GEM_DOMAIN_WC);
 
@@ -299,7 +314,7 @@ test_write_cpu_read_wc(int fd, int force_domain)
 
 	handle = gem_create(fd, OBJECT_SIZE);
 
-	dst = gem_mmap__wc(fd, handle, 0, OBJECT_SIZE, PROT_READ);
+	dst = local_gem_mmap__wc(fd, handle, 0, OBJECT_SIZE, PROT_READ);
 
 	src = gem_mmap__cpu(fd, handle, 0, OBJECT_SIZE, PROT_WRITE);
 
@@ -322,7 +337,7 @@ test_write_gtt_read_wc(int fd)
 	handle = gem_create(fd, OBJECT_SIZE);
 	set_domain(fd, handle);
 
-	dst = gem_mmap__wc(fd, handle, 0, OBJECT_SIZE, PROT_READ);
+	dst = local_gem_mmap__wc(fd, handle, 0, OBJECT_SIZE, PROT_READ);
 
 	src = gem_mmap__gtt(fd, handle, OBJECT_SIZE, PROT_WRITE);
 
-- 
2.20.1

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[igt-dev] ✗ Fi.CI.BAT: failure for Modify tests for unavailable mappable aperture (rev6)

[Patchwork]

== Series Details ==

Series: Modify tests for unavailable mappable aperture (rev6)
URL   : https://patchwork.freedesktop.org/series/57042/
State : failure

== Summary ==

Applying: tests/prime_self_import: Swap gtt mapping for cpu
Using index info to reconstruct a base tree...
M	tests/prime_self_import.c
Falling back to patching base and 3-way merge...
No changes -- Patch already applied.
Applying: tests/i915/gem_mmap_wc: Add local MMAP wrapper
Applying: igt/lib: Add wrapper to check if gtt mapping is available
Using index info to reconstruct a base tree...
M	lib/ioctl_wrappers.c
M	lib/ioctl_wrappers.h
Falling back to patching base and 3-way merge...
Auto-merging lib/ioctl_wrappers.h
Auto-merging lib/ioctl_wrappers.c
CONFLICT (content): Merge conflict in lib/ioctl_wrappers.c
Patch failed at 0003 igt/lib: Add wrapper to check if gtt mapping is available
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".

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Re: [igt-dev] [PATCH i-g-t v3 2/2] tests/i915/gem_mmap_wc: Add local MMAP wrapper

[Chris Wilson]

Quoting Antonio Argenziano (2019-02-25 18:28:04)
> The common library wrappers now try going through the MMAP_OFFSET IOCTL
> first. Since the tests in gem_mmap_wc are targeted at the GEM_MMAP
> IOCTL, add a local wrapper.

Looks ok, rewrite this to put into the future tense, and push (ahead of
the changes to the common functions!)

I think I might vouch for pulling a copy of ioctl as well to be crystal
clear exactly what we are testing.
 
> Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris
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Re: [igt-dev] [PATCH i-g-t v3 2/2] tests/i915/gem_mmap_wc: Add local MMAP wrapper

[Antonio Argenziano]

On 25/02/19 14:24, Chris Wilson wrote:
> Quoting Antonio Argenziano (2019-02-25 18:28:04)
>> The common library wrappers now try going through the MMAP_OFFSET IOCTL
>> first. Since the tests in gem_mmap_wc are targeted at the GEM_MMAP
>> IOCTL, add a local wrapper.
> 
> Looks ok, rewrite this to put into the future tense, and push (ahead of
> the changes to the common functions!)
> 
> I think I might vouch for pulling a copy of ioctl as well to be crystal
> clear exactly what we are testing.

Pushed, thanks.

Antonio

>   
>> Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
>> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
> -Chris
> 
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Re: [igt-dev] [PATCH i-g-t v3 1/2] lib/i915: add mmap_offset support

[Chris Wilson]

Quoting Antonio Argenziano (2019-02-25 18:28:03)
> @@ -812,7 +827,12 @@ void *__gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, un
>   */
>  void *gem_mmap__wc(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot)
>  {
> -       void *ptr = __gem_mmap__wc(fd, handle, offset, size, prot);
> +       void *ptr;
> +
> +       ptr = __gem_mmap_offset(fd, handle, offset, size, prot, LOCAL_I915_MMAP_OFFSET_WC);
> +       if (!ptr)
> +               ptr = __gem_mmap__wc(fd, handle, offset, size, prot);
> +
>         igt_assert(ptr);
>         return ptr;
>  }
> @@ -849,7 +869,12 @@ void *__gem_mmap__cpu(int fd, uint32_t handle, uint64_t offset, uint64_t size, u
>   */
>  void *gem_mmap__cpu(int fd, uint32_t handle, uint64_t offset, uint64_t size, unsigned prot)
>  {
> -       void *ptr = __gem_mmap__cpu(fd, handle, offset, size, prot);
> +       void *ptr;
> +
> +       ptr = __gem_mmap_offset(fd, handle, offset, size, prot, LOCAL_I915_MMAP_OFFSET_WB);
> +       if (!ptr)
> +               ptr = __gem_mmap(fd, handle, offset, size, prot, 0);
> +
>         igt_assert(ptr);
>         return ptr;

I would make moving gem_mmmap__wc, gem_mmap__cpu, gem_mmap__gtt and
their support over to gem_mman.c as patch 0. Then introduce
mmap__offset.
-Chris
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Re: [igt-dev] [RFC 5/5] igt/lib: If mappable aperture is missing return 0 size

[Antonio Argenziano]

On 21/02/19 13:51, Chris Wilson wrote:
> Quoting Antonio Argenziano (2019-02-21 21:45:46)
>>
>>
>> On 21/02/19 12:01, Chris Wilson wrote:
>>> Quoting Antonio Argenziano (2019-02-21 19:27:45)
>>>> So far the aperture size has been read directly from the bar,
>>>> in this patch we return zero if the mappable aperture is not available
>>>> as the value stored in the bar might not be accurate. The patch also adds a
>>>> 'require' when a call to gem_mappable_aperture_size() is made so that
>>>> the aperture is guaranteed to exist before checking the size.
>>>>
>>>> Cc: Katarzyna Dec <katarzyna.dec@intel.com>
>>>> Cc: Chris Wilson <chris@chris-wilson.co.uk>
>>>> Cc: Matthew Auld <matthew.auld@intel.com>
>>>> Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
>>>> ---
>>>>    lib/ioctl_wrappers.c            | 28 +++++++++++++++++++---------
>>>>    lib/ioctl_wrappers.h            |  2 +-
>>>>    tests/i915/gem_concurrent_all.c | 12 ++++++------
>>>>    tests/i915/gem_cpu_reloc.c      | 14 ++++++++++----
>>>>    tests/i915/gem_mmap.c           |  4 ++--
>>>>    tests/i915/gem_mmap_gtt.c       | 10 +++++-----
>>>>    tests/i915/gem_pwrite.c         |  4 ++--
>>>>    tests/i915/gem_shrink.c         |  2 +-
>>>>    tests/i915/i915_pm_rpm.c        |  2 +-
>>>>    tests/kms_flip.c                |  2 +-
>>>>    tests/prime_mmap.c              |  7 +++++--
>>>>    11 files changed, 53 insertions(+), 34 deletions(-)
>>>>
>>>> diff --git a/lib/ioctl_wrappers.c b/lib/ioctl_wrappers.c
>>>> index 25dd8ad3..ab7c7a5e 100644
>>>> --- a/lib/ioctl_wrappers.c
>>>> +++ b/lib/ioctl_wrappers.c
>>>> @@ -1440,19 +1440,14 @@ uint64_t gem_aperture_size(int fd)
>>>>           return aperture_size;
>>>>    }
>>>>    
>>>> -/**
>>>> - * gem_mappable_aperture_size:
>>>> - *
>>>> - * Feature test macro to query the kernel for the mappable gpu aperture size.
>>>> - * This is the area available for GTT memory mappings.
>>>> - *
>>>> - * Returns: The mappable gtt address space size.
>>>> - */
>>>> -uint64_t gem_mappable_aperture_size(void)
>>>> +static uint64_t __gem_mappable_aperture_size(int fd)
>>>>    {
>>>>           struct pci_device *pci_dev = intel_get_pci_device();
>>>>           int bar;
>>>>    
>>>> +       if (!gem_mmap__has_gtt(fd))
>>>> +               return 0; /* Aperture not available */
>>>> +
>>>>           if (intel_gen(pci_dev->device_id) < 3)
>>>>                   bar = 0;
>>>
>>> I swear we made this accessible via fd so that we didn't need root to
>>> poke around libpciacess.
>>
>> mhh, couldn't find it. Is it in some IOCTL?
> 
> No, we extended get_aperture_ioctl to provide it, once upon a time. I
> suggest we do something similar, or we use a param to get the actual
> value. (Even if it's legacy, we can still justify a usecase as I'm
> pretty sure 256MiB is hardcoded into several legacy userspaces.)

Is something like: https://paste.debian.net/1072096/ acceptable?

Antonio

> -Chris
> 
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Re: [igt-dev] [RFC 5/5] igt/lib: If mappable aperture is missing return 0 size

[Chris Wilson]

Quoting Antonio Argenziano (2019-03-07 15:51:28)
> 
> 
> On 21/02/19 13:51, Chris Wilson wrote:
> > Quoting Antonio Argenziano (2019-02-21 21:45:46)
> >>
> >>
> >> On 21/02/19 12:01, Chris Wilson wrote:
> >>> Quoting Antonio Argenziano (2019-02-21 19:27:45)
> >>>> So far the aperture size has been read directly from the bar,
> >>>> in this patch we return zero if the mappable aperture is not available
> >>>> as the value stored in the bar might not be accurate. The patch also adds a
> >>>> 'require' when a call to gem_mappable_aperture_size() is made so that
> >>>> the aperture is guaranteed to exist before checking the size.
> >>>>
> >>>> Cc: Katarzyna Dec <katarzyna.dec@intel.com>
> >>>> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> >>>> Cc: Matthew Auld <matthew.auld@intel.com>
> >>>> Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
> >>>> ---
> >>>>    lib/ioctl_wrappers.c            | 28 +++++++++++++++++++---------
> >>>>    lib/ioctl_wrappers.h            |  2 +-
> >>>>    tests/i915/gem_concurrent_all.c | 12 ++++++------
> >>>>    tests/i915/gem_cpu_reloc.c      | 14 ++++++++++----
> >>>>    tests/i915/gem_mmap.c           |  4 ++--
> >>>>    tests/i915/gem_mmap_gtt.c       | 10 +++++-----
> >>>>    tests/i915/gem_pwrite.c         |  4 ++--
> >>>>    tests/i915/gem_shrink.c         |  2 +-
> >>>>    tests/i915/i915_pm_rpm.c        |  2 +-
> >>>>    tests/kms_flip.c                |  2 +-
> >>>>    tests/prime_mmap.c              |  7 +++++--
> >>>>    11 files changed, 53 insertions(+), 34 deletions(-)
> >>>>
> >>>> diff --git a/lib/ioctl_wrappers.c b/lib/ioctl_wrappers.c
> >>>> index 25dd8ad3..ab7c7a5e 100644
> >>>> --- a/lib/ioctl_wrappers.c
> >>>> +++ b/lib/ioctl_wrappers.c
> >>>> @@ -1440,19 +1440,14 @@ uint64_t gem_aperture_size(int fd)
> >>>>           return aperture_size;
> >>>>    }
> >>>>    
> >>>> -/**
> >>>> - * gem_mappable_aperture_size:
> >>>> - *
> >>>> - * Feature test macro to query the kernel for the mappable gpu aperture size.
> >>>> - * This is the area available for GTT memory mappings.
> >>>> - *
> >>>> - * Returns: The mappable gtt address space size.
> >>>> - */
> >>>> -uint64_t gem_mappable_aperture_size(void)
> >>>> +static uint64_t __gem_mappable_aperture_size(int fd)
> >>>>    {
> >>>>           struct pci_device *pci_dev = intel_get_pci_device();
> >>>>           int bar;
> >>>>    
> >>>> +       if (!gem_mmap__has_gtt(fd))
> >>>> +               return 0; /* Aperture not available */
> >>>> +
> >>>>           if (intel_gen(pci_dev->device_id) < 3)
> >>>>                   bar = 0;
> >>>
> >>> I swear we made this accessible via fd so that we didn't need root to
> >>> poke around libpciacess.
> >>
> >> mhh, couldn't find it. Is it in some IOCTL?
> > 
> > No, we extended get_aperture_ioctl to provide it, once upon a time. I
> > suggest we do something similar, or we use a param to get the actual
> > value. (Even if it's legacy, we can still justify a usecase as I'm
> > pretty sure 256MiB is hardcoded into several legacy userspaces.)
> 
> Is something like: https://paste.debian.net/1072096/ acceptable?

Yes.

Kernel->    old                   new
Userspace
   v

  old       no change             see old size, skips write

  new       reads 0               legacy HW gets mappable size
                                  new HW, 0?

So for new userspace, how do we determine 0 meaning old kernel, pick a
value for ourselves, or 0 meaning no aperture at all. PCI-ID? Or is it
simply that new userspace (that might run on no aperture devices)
doesn't care about the aperture size anyway, so it's a meaningless
question?
-Chris
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Re: [igt-dev] [RFC 5/5] igt/lib: If mappable aperture is missing return 0 size

[Antonio Argenziano]

On 07/03/19 07:58, Chris Wilson wrote:
> Quoting Antonio Argenziano (2019-03-07 15:51:28)
>>
>>
>> On 21/02/19 13:51, Chris Wilson wrote:
>>> Quoting Antonio Argenziano (2019-02-21 21:45:46)
>>>>
>>>>
>>>> On 21/02/19 12:01, Chris Wilson wrote:
>>>>> Quoting Antonio Argenziano (2019-02-21 19:27:45)
>>>>>> So far the aperture size has been read directly from the bar,
>>>>>> in this patch we return zero if the mappable aperture is not available
>>>>>> as the value stored in the bar might not be accurate. The patch also adds a
>>>>>> 'require' when a call to gem_mappable_aperture_size() is made so that
>>>>>> the aperture is guaranteed to exist before checking the size.
>>>>>>
>>>>>> Cc: Katarzyna Dec <katarzyna.dec@intel.com>
>>>>>> Cc: Chris Wilson <chris@chris-wilson.co.uk>
>>>>>> Cc: Matthew Auld <matthew.auld@intel.com>
>>>>>> Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
>>>>>> ---
>>>>>>     lib/ioctl_wrappers.c            | 28 +++++++++++++++++++---------
>>>>>>     lib/ioctl_wrappers.h            |  2 +-
>>>>>>     tests/i915/gem_concurrent_all.c | 12 ++++++------
>>>>>>     tests/i915/gem_cpu_reloc.c      | 14 ++++++++++----
>>>>>>     tests/i915/gem_mmap.c           |  4 ++--
>>>>>>     tests/i915/gem_mmap_gtt.c       | 10 +++++-----
>>>>>>     tests/i915/gem_pwrite.c         |  4 ++--
>>>>>>     tests/i915/gem_shrink.c         |  2 +-
>>>>>>     tests/i915/i915_pm_rpm.c        |  2 +-
>>>>>>     tests/kms_flip.c                |  2 +-
>>>>>>     tests/prime_mmap.c              |  7 +++++--
>>>>>>     11 files changed, 53 insertions(+), 34 deletions(-)
>>>>>>
>>>>>> diff --git a/lib/ioctl_wrappers.c b/lib/ioctl_wrappers.c
>>>>>> index 25dd8ad3..ab7c7a5e 100644
>>>>>> --- a/lib/ioctl_wrappers.c
>>>>>> +++ b/lib/ioctl_wrappers.c
>>>>>> @@ -1440,19 +1440,14 @@ uint64_t gem_aperture_size(int fd)
>>>>>>            return aperture_size;
>>>>>>     }
>>>>>>     
>>>>>> -/**
>>>>>> - * gem_mappable_aperture_size:
>>>>>> - *
>>>>>> - * Feature test macro to query the kernel for the mappable gpu aperture size.
>>>>>> - * This is the area available for GTT memory mappings.
>>>>>> - *
>>>>>> - * Returns: The mappable gtt address space size.
>>>>>> - */
>>>>>> -uint64_t gem_mappable_aperture_size(void)
>>>>>> +static uint64_t __gem_mappable_aperture_size(int fd)
>>>>>>     {
>>>>>>            struct pci_device *pci_dev = intel_get_pci_device();
>>>>>>            int bar;
>>>>>>     
>>>>>> +       if (!gem_mmap__has_gtt(fd))
>>>>>> +               return 0; /* Aperture not available */
>>>>>> +
>>>>>>            if (intel_gen(pci_dev->device_id) < 3)
>>>>>>                    bar = 0;
>>>>>
>>>>> I swear we made this accessible via fd so that we didn't need root to
>>>>> poke around libpciacess.
>>>>
>>>> mhh, couldn't find it. Is it in some IOCTL?
>>>
>>> No, we extended get_aperture_ioctl to provide it, once upon a time. I
>>> suggest we do something similar, or we use a param to get the actual
>>> value. (Even if it's legacy, we can still justify a usecase as I'm
>>> pretty sure 256MiB is hardcoded into several legacy userspaces.)
>>
>> Is something like: https://paste.debian.net/1072096/ acceptable?
> 
> Yes.
> 
> Kernel->    old                   new
> Userspace
>     v
> 
>    old       no change             see old size, skips write
> 
>    new       reads 0               legacy HW gets mappable size
>                                    new HW, 0?
> 
> So for new userspace, how do we determine 0 meaning old kernel, pick a
> value for ourselves, or 0 meaning no aperture at all. PCI-ID? Or is it
> simply that new userspace (that might run on no aperture devices)
> doesn't care about the aperture size anyway, so it's a meaningless
> question?

Good question, I'm afraid I don't know :). There is the option of saying 
new userspace should check the gtt_version before using the aperture at 
all but I can see the appeal of just getting the size to make that decision.

Antonio


> -Chris
> 
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Re: [igt-dev] [RFC 5/5] igt/lib: If mappable aperture is missing return 0 size

[Chris Wilson]

Quoting Antonio Argenziano (2019-03-07 16:29:35)
> 
> 
> On 07/03/19 07:58, Chris Wilson wrote:
> > Quoting Antonio Argenziano (2019-03-07 15:51:28)
> >>
> >>
> >> On 21/02/19 13:51, Chris Wilson wrote:
> >>> Quoting Antonio Argenziano (2019-02-21 21:45:46)
> >>>>
> >>>>
> >>>> On 21/02/19 12:01, Chris Wilson wrote:
> >>>>> Quoting Antonio Argenziano (2019-02-21 19:27:45)
> >>>>>> So far the aperture size has been read directly from the bar,
> >>>>>> in this patch we return zero if the mappable aperture is not available
> >>>>>> as the value stored in the bar might not be accurate. The patch also adds a
> >>>>>> 'require' when a call to gem_mappable_aperture_size() is made so that
> >>>>>> the aperture is guaranteed to exist before checking the size.
> >>>>>>
> >>>>>> Cc: Katarzyna Dec <katarzyna.dec@intel.com>
> >>>>>> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> >>>>>> Cc: Matthew Auld <matthew.auld@intel.com>
> >>>>>> Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
> >>>>>> ---
> >>>>>>     lib/ioctl_wrappers.c            | 28 +++++++++++++++++++---------
> >>>>>>     lib/ioctl_wrappers.h            |  2 +-
> >>>>>>     tests/i915/gem_concurrent_all.c | 12 ++++++------
> >>>>>>     tests/i915/gem_cpu_reloc.c      | 14 ++++++++++----
> >>>>>>     tests/i915/gem_mmap.c           |  4 ++--
> >>>>>>     tests/i915/gem_mmap_gtt.c       | 10 +++++-----
> >>>>>>     tests/i915/gem_pwrite.c         |  4 ++--
> >>>>>>     tests/i915/gem_shrink.c         |  2 +-
> >>>>>>     tests/i915/i915_pm_rpm.c        |  2 +-
> >>>>>>     tests/kms_flip.c                |  2 +-
> >>>>>>     tests/prime_mmap.c              |  7 +++++--
> >>>>>>     11 files changed, 53 insertions(+), 34 deletions(-)
> >>>>>>
> >>>>>> diff --git a/lib/ioctl_wrappers.c b/lib/ioctl_wrappers.c
> >>>>>> index 25dd8ad3..ab7c7a5e 100644
> >>>>>> --- a/lib/ioctl_wrappers.c
> >>>>>> +++ b/lib/ioctl_wrappers.c
> >>>>>> @@ -1440,19 +1440,14 @@ uint64_t gem_aperture_size(int fd)
> >>>>>>            return aperture_size;
> >>>>>>     }
> >>>>>>     
> >>>>>> -/**
> >>>>>> - * gem_mappable_aperture_size:
> >>>>>> - *
> >>>>>> - * Feature test macro to query the kernel for the mappable gpu aperture size.
> >>>>>> - * This is the area available for GTT memory mappings.
> >>>>>> - *
> >>>>>> - * Returns: The mappable gtt address space size.
> >>>>>> - */
> >>>>>> -uint64_t gem_mappable_aperture_size(void)
> >>>>>> +static uint64_t __gem_mappable_aperture_size(int fd)
> >>>>>>     {
> >>>>>>            struct pci_device *pci_dev = intel_get_pci_device();
> >>>>>>            int bar;
> >>>>>>     
> >>>>>> +       if (!gem_mmap__has_gtt(fd))
> >>>>>> +               return 0; /* Aperture not available */
> >>>>>> +
> >>>>>>            if (intel_gen(pci_dev->device_id) < 3)
> >>>>>>                    bar = 0;
> >>>>>
> >>>>> I swear we made this accessible via fd so that we didn't need root to
> >>>>> poke around libpciacess.
> >>>>
> >>>> mhh, couldn't find it. Is it in some IOCTL?
> >>>
> >>> No, we extended get_aperture_ioctl to provide it, once upon a time. I
> >>> suggest we do something similar, or we use a param to get the actual
> >>> value. (Even if it's legacy, we can still justify a usecase as I'm
> >>> pretty sure 256MiB is hardcoded into several legacy userspaces.)
> >>
> >> Is something like: https://paste.debian.net/1072096/ acceptable?
> > 
> > Yes.
> > 
> > Kernel->    old                   new
> > Userspace
> >     v
> > 
> >    old       no change             see old size, skips write
> > 
> >    new       reads 0               legacy HW gets mappable size
> >                                    new HW, 0?
> > 
> > So for new userspace, how do we determine 0 meaning old kernel, pick a
> > value for ourselves, or 0 meaning no aperture at all. PCI-ID? Or is it
> > simply that new userspace (that might run on no aperture devices)
> > doesn't care about the aperture size anyway, so it's a meaningless
> > question?
> 
> Good question, I'm afraid I don't know :). There is the option of saying 
> new userspace should check the gtt_version before using the aperture at 
> all but I can see the appeal of just getting the size to make that decision.

One possible answer is to return

	aper.mappable_size = (u64)-ENODEV;

The errno by design are <4096 and so -errno is in the last page, and
should always be an invalid GTT size, as the last representable value in
this scheme is -4096ull.
-Chris
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Re: [igt-dev] [RFC 5/5] igt/lib: If mappable aperture is missing return 0 size

[Chris Wilson]

Quoting Chris Wilson (2019-03-07 16:45:35)
> Quoting Antonio Argenziano (2019-03-07 16:29:35)
> > 
> > 
> > On 07/03/19 07:58, Chris Wilson wrote:
> > > Quoting Antonio Argenziano (2019-03-07 15:51:28)
> > >>
> > >>
> > >> On 21/02/19 13:51, Chris Wilson wrote:
> > >>> Quoting Antonio Argenziano (2019-02-21 21:45:46)
> > >>>>
> > >>>>
> > >>>> On 21/02/19 12:01, Chris Wilson wrote:
> > >>>>> Quoting Antonio Argenziano (2019-02-21 19:27:45)
> > >>>>>> So far the aperture size has been read directly from the bar,
> > >>>>>> in this patch we return zero if the mappable aperture is not available
> > >>>>>> as the value stored in the bar might not be accurate. The patch also adds a
> > >>>>>> 'require' when a call to gem_mappable_aperture_size() is made so that
> > >>>>>> the aperture is guaranteed to exist before checking the size.
> > >>>>>>
> > >>>>>> Cc: Katarzyna Dec <katarzyna.dec@intel.com>
> > >>>>>> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> > >>>>>> Cc: Matthew Auld <matthew.auld@intel.com>
> > >>>>>> Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
> > >>>>>> ---
> > >>>>>>     lib/ioctl_wrappers.c            | 28 +++++++++++++++++++---------
> > >>>>>>     lib/ioctl_wrappers.h            |  2 +-
> > >>>>>>     tests/i915/gem_concurrent_all.c | 12 ++++++------
> > >>>>>>     tests/i915/gem_cpu_reloc.c      | 14 ++++++++++----
> > >>>>>>     tests/i915/gem_mmap.c           |  4 ++--
> > >>>>>>     tests/i915/gem_mmap_gtt.c       | 10 +++++-----
> > >>>>>>     tests/i915/gem_pwrite.c         |  4 ++--
> > >>>>>>     tests/i915/gem_shrink.c         |  2 +-
> > >>>>>>     tests/i915/i915_pm_rpm.c        |  2 +-
> > >>>>>>     tests/kms_flip.c                |  2 +-
> > >>>>>>     tests/prime_mmap.c              |  7 +++++--
> > >>>>>>     11 files changed, 53 insertions(+), 34 deletions(-)
> > >>>>>>
> > >>>>>> diff --git a/lib/ioctl_wrappers.c b/lib/ioctl_wrappers.c
> > >>>>>> index 25dd8ad3..ab7c7a5e 100644
> > >>>>>> --- a/lib/ioctl_wrappers.c
> > >>>>>> +++ b/lib/ioctl_wrappers.c
> > >>>>>> @@ -1440,19 +1440,14 @@ uint64_t gem_aperture_size(int fd)
> > >>>>>>            return aperture_size;
> > >>>>>>     }
> > >>>>>>     
> > >>>>>> -/**
> > >>>>>> - * gem_mappable_aperture_size:
> > >>>>>> - *
> > >>>>>> - * Feature test macro to query the kernel for the mappable gpu aperture size.
> > >>>>>> - * This is the area available for GTT memory mappings.
> > >>>>>> - *
> > >>>>>> - * Returns: The mappable gtt address space size.
> > >>>>>> - */
> > >>>>>> -uint64_t gem_mappable_aperture_size(void)
> > >>>>>> +static uint64_t __gem_mappable_aperture_size(int fd)
> > >>>>>>     {
> > >>>>>>            struct pci_device *pci_dev = intel_get_pci_device();
> > >>>>>>            int bar;
> > >>>>>>     
> > >>>>>> +       if (!gem_mmap__has_gtt(fd))
> > >>>>>> +               return 0; /* Aperture not available */
> > >>>>>> +
> > >>>>>>            if (intel_gen(pci_dev->device_id) < 3)
> > >>>>>>                    bar = 0;
> > >>>>>
> > >>>>> I swear we made this accessible via fd so that we didn't need root to
> > >>>>> poke around libpciacess.
> > >>>>
> > >>>> mhh, couldn't find it. Is it in some IOCTL?
> > >>>
> > >>> No, we extended get_aperture_ioctl to provide it, once upon a time. I
> > >>> suggest we do something similar, or we use a param to get the actual
> > >>> value. (Even if it's legacy, we can still justify a usecase as I'm
> > >>> pretty sure 256MiB is hardcoded into several legacy userspaces.)
> > >>
> > >> Is something like: https://paste.debian.net/1072096/ acceptable?
> > > 
> > > Yes.
> > > 
> > > Kernel->    old                   new
> > > Userspace
> > >     v
> > > 
> > >    old       no change             see old size, skips write
> > > 
> > >    new       reads 0               legacy HW gets mappable size
> > >                                    new HW, 0?
> > > 
> > > So for new userspace, how do we determine 0 meaning old kernel, pick a
> > > value for ourselves, or 0 meaning no aperture at all. PCI-ID? Or is it
> > > simply that new userspace (that might run on no aperture devices)
> > > doesn't care about the aperture size anyway, so it's a meaningless
> > > question?
> > 
> > Good question, I'm afraid I don't know :). There is the option of saying 
> > new userspace should check the gtt_version before using the aperture at 
> > all but I can see the appeal of just getting the size to make that decision.
> 
> One possible answer is to return
> 
>         aper.mappable_size = (u64)-ENODEV;
> 
> The errno by design are <4096 and so -errno is in the last page, and
> should always be an invalid GTT size, as the last representable value in
> this scheme is -4096ull.

I can't answer why we don't just return -ENODEV in that case anyway. I
was thinking of preventing upset applications, but those applications
don't exist yet.
-Chris
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Re: [igt-dev] [RFC 5/5] igt/lib: If mappable aperture is missing return 0 size

[Antonio Argenziano]

On 07/03/19 08:50, Chris Wilson wrote:
> Quoting Chris Wilson (2019-03-07 16:45:35)
>> Quoting Antonio Argenziano (2019-03-07 16:29:35)
>>>
>>>
>>> On 07/03/19 07:58, Chris Wilson wrote:
>>>> Quoting Antonio Argenziano (2019-03-07 15:51:28)
>>>>>
>>>>>
>>>>> On 21/02/19 13:51, Chris Wilson wrote:
>>>>>> Quoting Antonio Argenziano (2019-02-21 21:45:46)
>>>>>>>
>>>>>>>
>>>>>>> On 21/02/19 12:01, Chris Wilson wrote:
>>>>>>>> Quoting Antonio Argenziano (2019-02-21 19:27:45)
>>>>>>>>> So far the aperture size has been read directly from the bar,
>>>>>>>>> in this patch we return zero if the mappable aperture is not available
>>>>>>>>> as the value stored in the bar might not be accurate. The patch also adds a
>>>>>>>>> 'require' when a call to gem_mappable_aperture_size() is made so that
>>>>>>>>> the aperture is guaranteed to exist before checking the size.
>>>>>>>>>
>>>>>>>>> Cc: Katarzyna Dec <katarzyna.dec@intel.com>
>>>>>>>>> Cc: Chris Wilson <chris@chris-wilson.co.uk>
>>>>>>>>> Cc: Matthew Auld <matthew.auld@intel.com>
>>>>>>>>> Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
>>>>>>>>> ---
>>>>>>>>>      lib/ioctl_wrappers.c            | 28 +++++++++++++++++++---------
>>>>>>>>>      lib/ioctl_wrappers.h            |  2 +-
>>>>>>>>>      tests/i915/gem_concurrent_all.c | 12 ++++++------
>>>>>>>>>      tests/i915/gem_cpu_reloc.c      | 14 ++++++++++----
>>>>>>>>>      tests/i915/gem_mmap.c           |  4 ++--
>>>>>>>>>      tests/i915/gem_mmap_gtt.c       | 10 +++++-----
>>>>>>>>>      tests/i915/gem_pwrite.c         |  4 ++--
>>>>>>>>>      tests/i915/gem_shrink.c         |  2 +-
>>>>>>>>>      tests/i915/i915_pm_rpm.c        |  2 +-
>>>>>>>>>      tests/kms_flip.c                |  2 +-
>>>>>>>>>      tests/prime_mmap.c              |  7 +++++--
>>>>>>>>>      11 files changed, 53 insertions(+), 34 deletions(-)
>>>>>>>>>
>>>>>>>>> diff --git a/lib/ioctl_wrappers.c b/lib/ioctl_wrappers.c
>>>>>>>>> index 25dd8ad3..ab7c7a5e 100644
>>>>>>>>> --- a/lib/ioctl_wrappers.c
>>>>>>>>> +++ b/lib/ioctl_wrappers.c
>>>>>>>>> @@ -1440,19 +1440,14 @@ uint64_t gem_aperture_size(int fd)
>>>>>>>>>             return aperture_size;
>>>>>>>>>      }
>>>>>>>>>      
>>>>>>>>> -/**
>>>>>>>>> - * gem_mappable_aperture_size:
>>>>>>>>> - *
>>>>>>>>> - * Feature test macro to query the kernel for the mappable gpu aperture size.
>>>>>>>>> - * This is the area available for GTT memory mappings.
>>>>>>>>> - *
>>>>>>>>> - * Returns: The mappable gtt address space size.
>>>>>>>>> - */
>>>>>>>>> -uint64_t gem_mappable_aperture_size(void)
>>>>>>>>> +static uint64_t __gem_mappable_aperture_size(int fd)
>>>>>>>>>      {
>>>>>>>>>             struct pci_device *pci_dev = intel_get_pci_device();
>>>>>>>>>             int bar;
>>>>>>>>>      
>>>>>>>>> +       if (!gem_mmap__has_gtt(fd))
>>>>>>>>> +               return 0; /* Aperture not available */
>>>>>>>>> +
>>>>>>>>>             if (intel_gen(pci_dev->device_id) < 3)
>>>>>>>>>                     bar = 0;
>>>>>>>>
>>>>>>>> I swear we made this accessible via fd so that we didn't need root to
>>>>>>>> poke around libpciacess.
>>>>>>>
>>>>>>> mhh, couldn't find it. Is it in some IOCTL?
>>>>>>
>>>>>> No, we extended get_aperture_ioctl to provide it, once upon a time. I
>>>>>> suggest we do something similar, or we use a param to get the actual
>>>>>> value. (Even if it's legacy, we can still justify a usecase as I'm
>>>>>> pretty sure 256MiB is hardcoded into several legacy userspaces.)
>>>>>
>>>>> Is something like: https://paste.debian.net/1072096/ acceptable?
>>>>
>>>> Yes.
>>>>
>>>> Kernel->    old                   new
>>>> Userspace
>>>>      v
>>>>
>>>>     old       no change             see old size, skips write
>>>>
>>>>     new       reads 0               legacy HW gets mappable size
>>>>                                     new HW, 0?
>>>>
>>>> So for new userspace, how do we determine 0 meaning old kernel, pick a
>>>> value for ourselves, or 0 meaning no aperture at all. PCI-ID? Or is it
>>>> simply that new userspace (that might run on no aperture devices)
>>>> doesn't care about the aperture size anyway, so it's a meaningless
>>>> question?
>>>
>>> Good question, I'm afraid I don't know :). There is the option of saying
>>> new userspace should check the gtt_version before using the aperture at
>>> all but I can see the appeal of just getting the size to make that decision.
>>
>> One possible answer is to return
>>
>>          aper.mappable_size = (u64)-ENODEV;
>>
>> The errno by design are <4096 and so -errno is in the last page, and
>> should always be an invalid GTT size, as the last representable value in
>> this scheme is -4096ull.
> 
> I can't answer why we don't just return -ENODEV in that case anyway. I
> was thinking of preventing upset applications, but those applications
> don't exist yet.

Not sure if in this last reply you mean return ENODEV from the IOCTL or 
just in drm_i915_gem_get_aperture.mappable_aperture_size.

Antonio

> -Chris
> 
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Re: [igt-dev] [RFC 4/5] igt/i915: Require GTT mapping to be available when needed.

[Vanshidhar Konda]

On Thu, Feb 21, 2019 at 11:27:44AM -0800, Antonio Argenziano wrote:
>With the GTT aperture becoming unavailable on certain platforms, tests
>that target that mapping need to skip if such mapping is not available.
>
>Cc: Katarzyna Dec <katarzyna.dec@intel.com>
>Cc: Chris Wilson <chris@chris-wilson.co.uk>
>Cc: Matthew Auld <matthew.auld@intel.com>
>Signed-off-by: Antonio Argenziano <antonio.argenziano@intel.com>
>---
> lib/igt_dummyload.c                     |  4 +++-
> lib/igt_fb.c                            |  4 +++-
> tests/i915/gem_concurrent_all.c         |  1 +
> tests/i915/gem_ctx_sseu.c               |  4 +++-
> tests/i915/gem_exec_basic.c             |  1 +
> tests/i915/gem_exec_faulting_reloc.c    |  2 ++
> tests/i915/gem_exec_flush.c             |  6 ++++++
> tests/i915/gem_exec_reloc.c             |  7 +++++++
> tests/i915/gem_exec_schedule.c          |  5 ++++-
> tests/i915/gem_fence_thrash.c           |  6 ++++++
> tests/i915/gem_gtt_cpu_tlb.c            |  1 +
> tests/i915/gem_gtt_hog.c                |  1 +
> tests/i915/gem_gtt_speed.c              |  1 +
> tests/i915/gem_largeobject.c            |  2 ++
> tests/i915/gem_madvise.c                |  4 ++++
> tests/i915/gem_mmap_gtt.c               |  4 +++-
> tests/i915/gem_mmap_offset_exhaustion.c |  2 ++
> tests/i915/gem_mmap_wc.c                |  2 ++
> tests/i915/gem_persistent_relocs.c      |  2 ++
> tests/i915/gem_pwrite_pread.c           |  6 ++++++
> tests/i915/gem_reloc_vs_gpu.c           | 21 ++++++++++++---------
> tests/i915/gem_render_copy.c            |  2 ++
> tests/i915/gem_set_tiling_vs_gtt.c      |  2 ++
> tests/i915/gem_set_tiling_vs_pwrite.c   |  2 ++
> tests/i915/gem_shrink.c                 | 14 +++++++++++---
> tests/i915/gem_storedw_loop.c           |  9 +++++++++
> tests/i915/gem_streaming_writes.c       | 16 ++++++++++++++--
> tests/i915/gem_tiled_fence_blits.c      |  1 +
> tests/i915/gem_tiled_pread_basic.c      |  1 +
> tests/i915/gem_tiled_pread_pwrite.c     |  4 +++-
> tests/i915/gem_tiled_swapping.c         |  2 ++
> tests/i915/gem_tiled_wb.c               |  2 ++
> tests/i915/gem_tiled_wc.c               |  1 +
> tests/i915/gem_tiling_max_stride.c      |  3 ++-
> tests/i915/gem_userptr_blits.c          | 10 +++++++++-
> tests/i915/i915_pm_rpm.c                |  5 +++++
> tests/i915/i915_suspend.c               |  2 ++
> tests/kms_draw_crc.c                    |  8 ++++++--
> tests/kms_fence_pin_leak.c              |  2 ++
> tests/kms_frontbuffer_tracking.c        |  3 +++
> tests/kms_psr.c                         |  4 ++++
> tests/prime_mmap.c                      |  2 ++
> tests/prime_mmap_coherency.c            |  1 +
> tests/prime_vgem.c                      |  5 +++++
> 44 files changed, 163 insertions(+), 24 deletions(-)
>
>diff --git a/lib/igt_dummyload.c b/lib/igt_dummyload.c
>index 982906f2..a9c0ffef 100644
>--- a/lib/igt_dummyload.c
>+++ b/lib/igt_dummyload.c
>@@ -116,9 +116,11 @@ emit_recursive_batch(igt_spin_t *spin,
> 	obj[BATCH].handle = gem_create(fd, BATCH_SIZE);
> 	batch = __gem_mmap__wc(fd, obj[BATCH].handle,
> 			       0, BATCH_SIZE, PROT_WRITE);
>-	if (!batch)
>+	if (!batch) {
>+		gem_require_mmap_gtt(fd);
> 		batch = gem_mmap__gtt(fd, obj[BATCH].handle,
> 				       	BATCH_SIZE, PROT_WRITE);
>+	}
> 	gem_set_domain(fd, obj[BATCH].handle,
> 			I915_GEM_DOMAIN_GTT, I915_GEM_DOMAIN_GTT);
> 	execbuf->buffer_count++;
>diff --git a/lib/igt_fb.c b/lib/igt_fb.c
>index 462afec2..4b561ba2 100644
>--- a/lib/igt_fb.c
>+++ b/lib/igt_fb.c
>@@ -1559,9 +1559,11 @@ static void *map_bo(int fd, struct igt_fb *fb)
> 	if (fb->is_dumb)
> 		ptr = kmstest_dumb_map_buffer(fd, fb->gem_handle, fb->size,
> 					      PROT_READ | PROT_WRITE);
>-	else
>+	else {
>+		gem_require_mmap_gtt(fd);
> 		ptr = gem_mmap__gtt(fd, fb->gem_handle, fb->size,
> 				    PROT_READ | PROT_WRITE);
>+	}
>
> 	return ptr;
> }
>diff --git a/tests/i915/gem_concurrent_all.c b/tests/i915/gem_concurrent_all.c
>index 6049372d..1ab608ef 100644
>--- a/tests/i915/gem_concurrent_all.c
>+++ b/tests/i915/gem_concurrent_all.c
>@@ -1422,6 +1422,7 @@ static void cpu_require(void)
>
> static void gtt_require(void)
> {
>+	gem_require_mmap_gtt(fd);
> }
>
> static void bcs_require(void)
>diff --git a/tests/i915/gem_ctx_sseu.c b/tests/i915/gem_ctx_sseu.c
>index 3afa5c15..bf1b50d5 100644
>--- a/tests/i915/gem_ctx_sseu.c
>+++ b/tests/i915/gem_ctx_sseu.c
>@@ -528,8 +528,10 @@ igt_main
> 		igt_subtest("invalid-sseu")
> 			test_invalid_sseu(fd);
>
>-		igt_subtest("ggtt-args")
>+		igt_subtest("ggtt-args") {
>+			gem_require_mmap_gtt(fd);
> 			test_ggtt_args(fd);
>+		}
>
> 		igt_subtest("engines")
> 			test_engines(fd);
>diff --git a/tests/i915/gem_exec_basic.c b/tests/i915/gem_exec_basic.c
>index dcb83864..8537665f 100644
>--- a/tests/i915/gem_exec_basic.c
>+++ b/tests/i915/gem_exec_basic.c
>@@ -93,6 +93,7 @@ static void gtt(int fd, unsigned ring)
> 	struct drm_i915_gem_exec_object2 *exec;
> 	uint32_t handle;
>
>+	gem_require_mmap_gtt(fd);
> 	gem_require_ring(fd, ring);
>
> 	handle = gem_create(fd, 4096);
>diff --git a/tests/i915/gem_exec_faulting_reloc.c b/tests/i915/gem_exec_faulting_reloc.c
>index 6b05e43f..9db80f54 100644
>--- a/tests/i915/gem_exec_faulting_reloc.c
>+++ b/tests/i915/gem_exec_faulting_reloc.c
>@@ -173,6 +173,8 @@ static void run(int object_size)
>
> 	fd = drm_open_driver(DRIVER_INTEL);
> 	igt_require_gem(fd);
>+	gem_require_mmap_gtt(fd);
>+
> 	devid = intel_get_drm_devid(fd);
> 	handle = gem_create(fd, 4096);
> 	src = gem_create(fd, object_size);
>diff --git a/tests/i915/gem_exec_flush.c b/tests/i915/gem_exec_flush.c
>index f820b2a8..42749bc4 100644
>--- a/tests/i915/gem_exec_flush.c
>+++ b/tests/i915/gem_exec_flush.c
>@@ -79,6 +79,9 @@ static void run(int fd, unsigned ring, int nchild, int timeout,
> {
> 	const int gen = intel_gen(intel_get_drm_devid(fd));
>
>+	if ((flags & COHERENT) && !(flags & WC))
>+		gem_require_mmap_gtt(fd);
>+
> 	/* The crux of this testing is whether writes by the GPU are coherent
> 	 * from the CPU.
> 	 *

gem_require_mmap_gtt(fd) is also needed in the batch() function when it
is called with BATCH_GTT mode.

>@@ -586,6 +589,7 @@ igt_main
> 		fd = drm_open_driver(DRIVER_INTEL);
> 		igt_require_gem(fd);
> 		gem_require_mmap_wc(fd);
>+		gem_require_mmap_gtt(fd);
> 		igt_require(gem_can_store_dword(fd, 0));
> 		igt_info("Has LLC? %s\n", yesno(gem_has_llc(fd)));
>
>@@ -614,11 +618,13 @@ igt_main
> 				      b->name,
> 				      e->name)
> 				batch(fd, ring, ncpus, timeout, b->mode, 0);
>+
> 			igt_subtest_f("%sbatch-%s-%s-wb",
> 				      b == batches && e->exec_id == 0 ? "basic-" : "",
> 				      b->name,
> 				      e->name)
> 				batch(fd, ring, ncpus, timeout, b->mode, COHERENT);
>+
> 			igt_subtest_f("%sbatch-%s-%s-cmd",
> 				      b == batches && e->exec_id == 0 ? "basic-" : "",
> 				      b->name,
>diff --git a/tests/i915/gem_exec_reloc.c b/tests/i915/gem_exec_reloc.c
>index 837f60a6..bb4eec31 100644
>--- a/tests/i915/gem_exec_reloc.c
>+++ b/tests/i915/gem_exec_reloc.c
>@@ -115,6 +115,9 @@ static void from_mmap(int fd, uint64_t size, enum mode mode)
> 	 */
> 	intel_require_memory(2, size, CHECK_RAM);
>
>+	if ((mode & ~RO) == GTT)
>+		gem_require_mmap_gtt(fd);
>+
> 	memset(&obj, 0, sizeof(obj));
> 	obj.handle = gem_create(fd, 4096);
> 	gem_write(fd, obj.handle, 0, &bbe, sizeof(bbe));
>@@ -342,6 +345,9 @@ static void basic_reloc(int fd, unsigned before, unsigned after, unsigned flags)
> 	const uint32_t bbe = MI_BATCH_BUFFER_END;
> 	unsigned int reloc_offset;
>
>+	if ((before | after) & I915_GEM_DOMAIN_GTT)
>+		gem_require_mmap_gtt(fd);
>+
> 	memset(&obj, 0, sizeof(obj));
> 	obj.handle = gem_create(fd, OBJSZ);
> 	obj.relocs_ptr = to_user_pointer(&reloc);
>@@ -711,6 +717,7 @@ igt_main
> 					      f->name) {
> 					if ((m->before | m->after) & I915_GEM_DOMAIN_WC)
> 						igt_require(gem_mmap__has_wc(fd));
>+
> 					basic_reloc(fd, m->before, m->after, f->flags);
> 				}
> 			}
>diff --git a/tests/i915/gem_exec_schedule.c b/tests/i915/gem_exec_schedule.c
>index a9383000..15c8440f 100644
>--- a/tests/i915/gem_exec_schedule.c
>+++ b/tests/i915/gem_exec_schedule.c
>@@ -1236,6 +1236,7 @@ igt_main
> 			igt_subtest_f("independent-%s", e->name) {
> 				igt_require(gem_ring_has_physical_engine(fd, e->exec_id | e->flags));
> 				igt_require(gem_can_store_dword(fd, e->exec_id | e->flags));
>+				gem_require_mmap_gtt(fd);
> 				independent(fd, e->exec_id | e->flags);
> 			}
> 		}
>@@ -1328,8 +1329,10 @@ igt_main
> 				igt_subtest_f("wide-%s", e->name)
> 					wide(fd, e->exec_id | e->flags);
>
>-				igt_subtest_f("reorder-wide-%s", e->name)
>+				igt_subtest_f("reorder-wide-%s", e->name) {
>+					gem_require_mmap_gtt(fd);
> 					reorder_wide(fd, e->exec_id | e->flags);
>+				}
>
> 				igt_subtest_f("smoketest-%s", e->name)
> 					smoketest(fd, e->exec_id | e->flags, 5);
>diff --git a/tests/i915/gem_fence_thrash.c b/tests/i915/gem_fence_thrash.c
>index 2d7fb2ff..5567e37e 100644
>--- a/tests/i915/gem_fence_thrash.c
>+++ b/tests/i915/gem_fence_thrash.c
>@@ -236,6 +236,12 @@ igt_main
> {
> 	igt_skip_on_simulation();
>
>+	igt_fixture {
>+		int fd = drm_open_driver(DRIVER_INTEL);
>+		igt_require(gem_available_fences(fd) > 0); /* GTT mapping available */
>+		close(fd);
>+	}
>+
> 	igt_subtest("bo-write-verify-none")
> 		igt_assert(run_test(0, bo_write_verify, I915_TILING_NONE, 80) == 0);
>
>diff --git a/tests/i915/gem_gtt_cpu_tlb.c b/tests/i915/gem_gtt_cpu_tlb.c
>index 8ceef44c..e9bdb185 100644
>--- a/tests/i915/gem_gtt_cpu_tlb.c
>+++ b/tests/i915/gem_gtt_cpu_tlb.c
>@@ -78,6 +78,7 @@ igt_simple_main
> 	igt_skip_on_simulation();
>
> 	fd = drm_open_driver(DRIVER_INTEL);
>+	gem_require_mmap_gtt(fd);
>
> 	handle = gem_create(fd, OBJ_SIZE);
>
>diff --git a/tests/i915/gem_gtt_hog.c b/tests/i915/gem_gtt_hog.c
>index ca730649..b2eea679 100644
>--- a/tests/i915/gem_gtt_hog.c
>+++ b/tests/i915/gem_gtt_hog.c
>@@ -161,6 +161,7 @@ igt_simple_main
> 	/* check for an intel gpu before goint nuts. */
> 	int fd = drm_open_driver(DRIVER_INTEL);
> 	igt_require_gem(fd);
>+	gem_require_mmap_gtt(fd);
> 	close(fd);
>
> 	igt_skip_on_simulation();
>diff --git a/tests/i915/gem_gtt_speed.c b/tests/i915/gem_gtt_speed.c
>index 3d726c4e..f1778370 100644
>--- a/tests/i915/gem_gtt_speed.c
>+++ b/tests/i915/gem_gtt_speed.c
>@@ -116,6 +116,7 @@ int main(int argc, char **argv)
> 	buf = malloc(size);
> 	memset(buf, 0, size);
> 	fd = drm_open_driver(DRIVER_INTEL);
>+	gem_require_mmap_gtt(fd);
>
> 	handle = gem_create(fd, size);
> 	igt_assert(handle);
>diff --git a/tests/i915/gem_largeobject.c b/tests/i915/gem_largeobject.c
>index 518396fa..a2d47edc 100644
>--- a/tests/i915/gem_largeobject.c
>+++ b/tests/i915/gem_largeobject.c
>@@ -84,6 +84,8 @@ igt_simple_main
>
> 	fd = drm_open_driver(DRIVER_INTEL);
>
>+	gem_require_mmap_gtt(fd);
>+
> 	test_large_object(fd);
>
> 	free(data);
>diff --git a/tests/i915/gem_madvise.c b/tests/i915/gem_madvise.c
>index 729a4d33..f4226a84 100644
>--- a/tests/i915/gem_madvise.c
>+++ b/tests/i915/gem_madvise.c
>@@ -61,6 +61,8 @@ dontneed_before_mmap(void)
> 	uint32_t handle;
> 	char *ptr;
>
>+	gem_require_mmap_gtt(fd);
>+
> 	handle = gem_create(fd, OBJECT_SIZE);
> 	gem_madvise(fd, handle, I915_MADV_DONTNEED);
> 	ptr = gem_mmap__gtt(fd, handle, OBJECT_SIZE, PROT_READ | PROT_WRITE);
>@@ -89,6 +91,8 @@ dontneed_after_mmap(void)
> 	uint32_t handle;
> 	char *ptr;
>
>+	gem_require_mmap_gtt(fd);
>+
> 	handle = gem_create(fd, OBJECT_SIZE);
> 	ptr = gem_mmap__gtt(fd, handle, OBJECT_SIZE, PROT_READ | PROT_WRITE);
> 	igt_assert(ptr);
>diff --git a/tests/i915/gem_mmap_gtt.c b/tests/i915/gem_mmap_gtt.c
>index f6fbbe19..99da49f6 100644
>--- a/tests/i915/gem_mmap_gtt.c
>+++ b/tests/i915/gem_mmap_gtt.c
>@@ -828,8 +828,10 @@ igt_main
> 	if (igt_run_in_simulation())
> 		OBJECT_SIZE = 1 * 1024 * 1024;
>
>-	igt_fixture
>+	igt_fixture {
> 		fd = drm_open_driver(DRIVER_INTEL);
>+		gem_require_mmap_gtt(fd);
>+	}
>
> 	igt_subtest("basic")
> 		test_access(fd);
>diff --git a/tests/i915/gem_mmap_offset_exhaustion.c b/tests/i915/gem_mmap_offset_exhaustion.c
>index 8c8e3fa2..86464231 100644
>--- a/tests/i915/gem_mmap_offset_exhaustion.c
>+++ b/tests/i915/gem_mmap_offset_exhaustion.c
>@@ -82,6 +82,8 @@ igt_simple_main
>
> 	fd = drm_open_driver(DRIVER_INTEL);
>
>+	gem_require_mmap_gtt(fd);
>+
> 	/* we have 32bit of address space, so try to fit one MB more
> 	 * than that. */
> 	for (i = 0; i < 4096 + 1; i++)
>diff --git a/tests/i915/gem_mmap_wc.c b/tests/i915/gem_mmap_wc.c
>index 110883eb..78089829 100644
>--- a/tests/i915/gem_mmap_wc.c
>+++ b/tests/i915/gem_mmap_wc.c
>@@ -319,6 +319,8 @@ test_write_gtt_read_wc(int fd)
> 	uint32_t handle;
> 	uint32_t *src, *dst;
>
>+	gem_require_mmap_gtt(fd);
>+
> 	handle = gem_create(fd, OBJECT_SIZE);
> 	set_domain(fd, handle);
>
>diff --git a/tests/i915/gem_persistent_relocs.c b/tests/i915/gem_persistent_relocs.c
>index 452fe686..17266c48 100644
>--- a/tests/i915/gem_persistent_relocs.c
>+++ b/tests/i915/gem_persistent_relocs.c
>@@ -199,6 +199,8 @@ static void do_test(int fd, bool faulting_reloc)
> 	uint32_t test;
> 	int i, repeat;
>
>+	gem_require_mmap_gtt(fd);
>+
> 	if (faulting_reloc)
> 		igt_disable_prefault();
>
>diff --git a/tests/i915/gem_pwrite_pread.c b/tests/i915/gem_pwrite_pread.c
>index f91fc7c4..43b3987a 100644
>--- a/tests/i915/gem_pwrite_pread.c
>+++ b/tests/i915/gem_pwrite_pread.c
>@@ -182,6 +182,8 @@ static void test_as_gtt_mmap(int fd, uint32_t src, uint32_t dst, int len)
> 	int i;
> 	BUILD_EXEC;
>
>+	gem_require_mmap_gtt(fd);
>+
> 	src_ptr = gem_mmap__gtt(fd, src, OBJECT_SIZE, PROT_WRITE);
> 	dst_ptr = gem_mmap__gtt(fd, dst, OBJECT_SIZE, PROT_READ);
>
>@@ -309,6 +311,8 @@ int main(int argc, char **argv)
> 		for (count = 1; count <= 1<<17; count <<= 1) {
> 			struct timeval start, end;
>
>+			gem_require_mmap_gtt(fd);
>+
> 			gettimeofday(&start, NULL);
> 			as_gtt_mmap(fd, src, dst, tmp, object_size, count);
> 			gettimeofday(&end, NULL);
>@@ -387,6 +391,8 @@ int main(int argc, char **argv)
> 		for (count = 1; count <= 1<<17; count <<= 1) {
> 			struct timeval start, end;
>
>+			gem_require_mmap_gtt(fd);
>+
> 			gettimeofday(&start, NULL);
> 			as_gtt_mmap(fd, src, dst, tmp, object_size, count);
> 			gettimeofday(&end, NULL);
>diff --git a/tests/i915/gem_reloc_vs_gpu.c b/tests/i915/gem_reloc_vs_gpu.c
>index d421e434..e1475a1f 100644
>--- a/tests/i915/gem_reloc_vs_gpu.c
>+++ b/tests/i915/gem_reloc_vs_gpu.c
>@@ -159,17 +159,17 @@ static void reloc_and_emit(int fd, drm_intel_bo *target_bo, bool faulting_reloc)
> 	 */
> 	reloc[0].presumed_offset = -1;
>
>-	handle_relocs = gem_create(fd, 4096);
>-	gem_write(fd, handle_relocs, 0, reloc, sizeof(reloc));
>-	gtt_relocs = gem_mmap__gtt(fd, handle_relocs, 4096,
>-				   PROT_READ | PROT_WRITE);
>-
> 	exec[1].handle = special_bo->handle;
> 	exec[1].relocation_count = 1;
> 	/* A newly mmap gtt bo will fault on first access. */
>-	if (faulting_reloc)
>+	if (faulting_reloc) {
>+		handle_relocs = gem_create(fd, 4096);
>+		gem_write(fd, handle_relocs, 0, reloc, sizeof(reloc));
>+		gtt_relocs = gem_mmap__gtt(fd, handle_relocs, 4096,
>+						PROT_READ | PROT_WRITE);
>+
> 		exec[1].relocs_ptr = to_user_pointer(gtt_relocs);
>-	else
>+	} else
> 		exec[1].relocs_ptr = to_user_pointer(reloc);
>
> 	execbuf.buffers_ptr = to_user_pointer(exec);
>@@ -180,7 +180,8 @@ static void reloc_and_emit(int fd, drm_intel_bo *target_bo, bool faulting_reloc)
>
> 	gem_execbuf(fd, &execbuf);
>
>-	gem_close(fd, handle_relocs);
>+	if (faulting_reloc)
>+		gem_close(fd, handle_relocs);
> }
>
> static igt_hang_t no_hang(int fd)
>@@ -201,8 +202,10 @@ static void do_test(int fd, bool faulting_reloc,
> 	uint32_t test;
> 	int i;
>
>-	if (faulting_reloc)
>+	if (faulting_reloc) {
>+		gem_require_mmap_gtt(fd);
> 		igt_disable_prefault();
>+	}
>
> 	act_size = 2048;
> 	dummy_bo = drm_intel_bo_alloc_tiled(bufmgr, "tiled dummy_bo", act_size, act_size,
>diff --git a/tests/i915/gem_render_copy.c b/tests/i915/gem_render_copy.c
>index 0cd4e50f..2a785cba 100644
>--- a/tests/i915/gem_render_copy.c
>+++ b/tests/i915/gem_render_copy.c
>@@ -424,6 +424,8 @@ static void test(data_t *data, uint32_t tiling, bool test_ccs)
>
> 	int opt_dump_aub = igt_aub_dump_enabled();
>
>+	gem_require_mmap_gtt(data->drm_fd);
>+
> 	for (int i = 0; i < ARRAY_SIZE(src); i++)
> 		scratch_buf_init(data, &src[i].buf, WIDTH, HEIGHT, src[i].tiling, false);
> 	scratch_buf_init(data, &dst, WIDTH, HEIGHT, tiling, false);
>diff --git a/tests/i915/gem_set_tiling_vs_gtt.c b/tests/i915/gem_set_tiling_vs_gtt.c
>index 2611ec55..210d5358 100644
>--- a/tests/i915/gem_set_tiling_vs_gtt.c
>+++ b/tests/i915/gem_set_tiling_vs_gtt.c
>@@ -60,6 +60,8 @@ igt_simple_main
>
> 	fd = drm_open_driver(DRIVER_INTEL);
>
>+	gem_require_mmap_gtt(fd);
>+
> 	if (IS_GEN2(intel_get_drm_devid(fd)))
> 		tile_height = 16;
> 	else
>diff --git a/tests/i915/gem_set_tiling_vs_pwrite.c b/tests/i915/gem_set_tiling_vs_pwrite.c
>index f0126b64..d82e20b4 100644
>--- a/tests/i915/gem_set_tiling_vs_pwrite.c
>+++ b/tests/i915/gem_set_tiling_vs_pwrite.c
>@@ -58,6 +58,8 @@ igt_simple_main
>
> 	fd = drm_open_driver(DRIVER_INTEL);
>
>+	gem_require_mmap_gtt(fd);
>+
> 	for (i = 0; i < OBJECT_SIZE/4; i++)
> 		data[i] = i;
>
>diff --git a/tests/i915/gem_shrink.c b/tests/i915/gem_shrink.c
>index c8e05814..9c54fcb4 100644
>--- a/tests/i915/gem_shrink.c
>+++ b/tests/i915/gem_shrink.c
>@@ -396,6 +396,8 @@ igt_main
> 	uint64_t alloc_size = 0;
> 	int num_processes = 0;
>
>+	bool has_gtt = false;
>+
> 	igt_skip_on_simulation();
>
> 	igt_fixture {
>@@ -426,6 +428,8 @@ igt_main
> 			engines[nengine++] = engine;
> 		igt_require(nengine);
>
>+		has_gtt = gem_mmap__has_gtt(fd);
>+
> 		close(fd);
> 	}
>
>@@ -434,9 +438,13 @@ igt_main
>
> 	for(const struct test *t = tests; t->name; t++) {
> 		for(const struct mode *m = modes; m->suffix; m++) {
>-			igt_subtest_f("%s%s", t->name, m->suffix)
>-				run_test(num_processes, alloc_size,
>-					 t->func, m->flags);
>+			igt_subtest_f("%s%s", t->name, m->suffix) {
>+					if (t->func == mmap_gtt)
>+						igt_require(has_gtt);
>+
>+					run_test(num_processes, alloc_size,
>+						 t->func, m->flags);
>+			}
> 		}
> 	}
> }
>diff --git a/tests/i915/gem_storedw_loop.c b/tests/i915/gem_storedw_loop.c
>index b00555e0..d16a1a6b 100644
>--- a/tests/i915/gem_storedw_loop.c
>+++ b/tests/i915/gem_storedw_loop.c
>@@ -49,6 +49,12 @@ static int devid;
>
> static unsigned coherent_domain;
>
>+static bool
>+uses_coherent_gtt(int fd)
>+{
>+	return (!gem_has_llc(fd) || gem_mmap__has_wc(fd));
>+}
>+
> static void *
> mmap_coherent(int fd, uint32_t handle, int size)
> {
>@@ -164,6 +170,9 @@ check_test_requirements(int fd, int ringid)
> {
> 	gem_require_ring(fd, ringid);
> 	igt_require(gem_can_store_dword(fd, ringid));
>+
>+	if (uses_coherent_gtt(fd))
>+		gem_require_mmap_gtt(fd);
> }
>
> igt_main
>diff --git a/tests/i915/gem_streaming_writes.c b/tests/i915/gem_streaming_writes.c
>index e83d69de..159cb7a6 100644
>--- a/tests/i915/gem_streaming_writes.c
>+++ b/tests/i915/gem_streaming_writes.c
>@@ -48,6 +48,8 @@
>
> #define LOCAL_I915_EXEC_HANDLE_LUT (1<<12)
>
>+#define NEEDS_GTT(mode) (mode == 1)
>+
> IGT_TEST_DESCRIPTION("Test of streaming writes into active GPU sources");
>
> #define SRC 0
>@@ -75,6 +77,9 @@ static void test_streaming(int fd, int mode, int sync)
> 	} *batch;
> 	int i, n;
>
>+	if (NEEDS_GTT(mode))
>+		gem_require_mmap_gtt(fd);
>+
> 	memset(exec, 0, sizeof(exec));
> 	exec[SRC].handle = gem_create(fd, OBJECT_SIZE);
> 	exec[DST].handle = gem_create(fd, OBJECT_SIZE);
>@@ -245,6 +250,9 @@ static void test_batch(int fd, int mode, int reverse)
> 	uint32_t *base;
> 	uint32_t offset;
>
>+	if (NEEDS_GTT(mode))
>+		gem_require_mmap_gtt(fd);
>+
> 	memset(exec, 0, sizeof(exec));
> 	exec[DST].handle = gem_create(fd, OBJECT_SIZE);
> 	exec[SRC].handle = gem_create(fd, OBJECT_SIZE);
>@@ -389,14 +397,18 @@ igt_main
>
> 	igt_subtest("batch-cpu")
> 		test_batch(fd, 0, 0);
>-	igt_subtest("batch-gtt")
>+	igt_subtest("batch-gtt") {
>+		gem_require_mmap_gtt(fd);
> 		test_batch(fd, 1, 0);
>+	}
> 	igt_subtest("batch-wc")
> 		test_batch(fd, 2, 0);
> 	igt_subtest("batch-reverse-cpu")
> 		test_batch(fd, 0, 1);
>-	igt_subtest("batch-reverse-gtt")
>+	igt_subtest("batch-reverse-gtt") {
>+		gem_require_mmap_gtt(fd);
> 		test_batch(fd, 1, 1);
>+	}
> 	igt_subtest("batch-reverse-wc")
> 		test_batch(fd, 2, 1);
>
>diff --git a/tests/i915/gem_tiled_fence_blits.c b/tests/i915/gem_tiled_fence_blits.c
>index 2453bcc0..390d0cd7 100644
>--- a/tests/i915/gem_tiled_fence_blits.c
>+++ b/tests/i915/gem_tiled_fence_blits.c
>@@ -211,6 +211,7 @@ igt_main
> 	igt_fixture {
> 		fd = drm_open_driver(DRIVER_INTEL);
> 		igt_require_gem(fd);
>+		gem_require_mmap_gtt(fd);
> 	}
>
> 	igt_subtest("basic")
>diff --git a/tests/i915/gem_tiled_pread_basic.c b/tests/i915/gem_tiled_pread_basic.c
>index 425bb07e..d2bc84d3 100644
>--- a/tests/i915/gem_tiled_pread_basic.c
>+++ b/tests/i915/gem_tiled_pread_basic.c
>@@ -123,6 +123,7 @@ igt_simple_main
> 	uint32_t devid;
>
> 	fd = drm_open_driver(DRIVER_INTEL);
>+	gem_require_mmap_gtt(fd);
>
> 	handle = create_bo(fd);
> 	igt_require(gem_get_tiling(fd, handle, &tiling, &swizzle));
>diff --git a/tests/i915/gem_tiled_pread_pwrite.c b/tests/i915/gem_tiled_pread_pwrite.c
>index fcf0780a..ebf06c57 100644
>--- a/tests/i915/gem_tiled_pread_pwrite.c
>+++ b/tests/i915/gem_tiled_pread_pwrite.c
>@@ -110,8 +110,10 @@ igt_simple_main
> 	uint32_t tiling, swizzle;
> 	int count;
> 	int fd;
>-	
>+
> 	fd = drm_open_driver(DRIVER_INTEL);
>+	gem_require_mmap_gtt(fd);
>+
> 	count = SLOW_QUICK(intel_get_total_ram_mb() * 9 / 10, 8) ;
>
> 	for (int i = 0; i < count/2; i++) {
>diff --git a/tests/i915/gem_tiled_swapping.c b/tests/i915/gem_tiled_swapping.c
>index ddf2a748..29783aba 100644
>--- a/tests/i915/gem_tiled_swapping.c
>+++ b/tests/i915/gem_tiled_swapping.c
>@@ -175,6 +175,8 @@ igt_main
>
> 		fd = drm_open_driver(DRIVER_INTEL);
>
>+		gem_require_mmap_gtt(fd);
>+
> 		intel_purge_vm_caches(fd);
> 		check_memory_layout(fd);
>
>diff --git a/tests/i915/gem_tiled_wb.c b/tests/i915/gem_tiled_wb.c
>index 67d54bd3..9f431529 100644
>--- a/tests/i915/gem_tiled_wb.c
>+++ b/tests/i915/gem_tiled_wb.c
>@@ -139,6 +139,8 @@ igt_simple_main
>
> 	fd = drm_open_driver(DRIVER_INTEL);
>
>+	gem_require_mmap_gtt(fd);
>+
> 	handle = create_bo(fd);
> 	get_tiling(fd, handle, &tiling, &swizzle);
>
>diff --git a/tests/i915/gem_tiled_wc.c b/tests/i915/gem_tiled_wc.c
>index 21390729..4a67a71d 100644
>--- a/tests/i915/gem_tiled_wc.c
>+++ b/tests/i915/gem_tiled_wc.c
>@@ -112,6 +112,7 @@ igt_simple_main
> 	uint32_t handle;
>
> 	fd = drm_open_driver(DRIVER_INTEL);
>+	gem_require_mmap_gtt(fd);
> 	gem_require_mmap_wc(fd);
>
> 	handle = create_bo(fd);
>diff --git a/tests/i915/gem_tiling_max_stride.c b/tests/i915/gem_tiling_max_stride.c
>index a6f97a91..b5dc053d 100644
>--- a/tests/i915/gem_tiling_max_stride.c
>+++ b/tests/i915/gem_tiling_max_stride.c
>@@ -70,8 +70,9 @@ igt_simple_main
>
> 	fd = drm_open_driver(DRIVER_INTEL);
>
>-	devid = intel_get_drm_devid(fd);
>+	gem_require_mmap_wc(fd);
>
>+	devid = intel_get_drm_devid(fd);
> 	if (intel_gen(devid) >= 7)
> 		stride = 256 * 1024;
> 	else if (intel_gen(devid) >= 4)
>diff --git a/tests/i915/gem_userptr_blits.c b/tests/i915/gem_userptr_blits.c
>index 8f8ddf43..9962e539 100644
>--- a/tests/i915/gem_userptr_blits.c
>+++ b/tests/i915/gem_userptr_blits.c
>@@ -554,6 +554,8 @@ static int test_invalid_gtt_mapping(int fd)
> 	uint32_t handle;
> 	char *gtt, *map;
>
>+	gem_require_mmap_gtt(fd);
>+
> 	/* Anonymous mapping to find a hole */
> 	map = mmap(NULL, sizeof(linear) + 2 * PAGE_SIZE,
> 		   PROT_READ | PROT_WRITE,
>@@ -616,8 +618,10 @@ static int test_invalid_gtt_mapping(int fd)
> #define PE_BUSY 0x2
> static void test_process_exit(int fd, int flags)
> {
>-	if (flags & PE_GTT_MAP)
>+	if (flags & PE_GTT_MAP) {
> 		igt_require(gem_has_llc(fd));
>+		gem_require_mmap_gtt(fd);
>+	}
>
> 	igt_fork(child, 1) {
> 		uint32_t handle;
>@@ -700,6 +704,8 @@ static int test_map_fixed_invalidate(int fd, uint32_t flags)
> 	uint32_t handle[num_handles];
> 	uint32_t *ptr;
>
>+	gem_require_mmap_gtt(fd);
>+
> 	ptr = mmap(NULL, ptr_size,
> 		   PROT_READ | PROT_WRITE,
> 		   MAP_SHARED | MAP_ANONYMOUS,
>@@ -944,6 +950,7 @@ static int test_dmabuf(void)
> 	int ret;
>
> 	fd1 = drm_open_driver(DRIVER_INTEL);
>+	gem_require_mmap_gtt(fd1);
>
> 	handle = create_userptr_bo(fd1, sizeof(linear));
> 	memset(get_handle_ptr(handle), counter, sizeof(linear));
>@@ -1212,6 +1219,7 @@ static void test_readonly_mmap(int i915)
> 	 */
>
> 	igt_require(igt_setup_clflush());
>+	gem_require_mmap_gtt(i915);
>
> 	sz = 16 << 12;
> 	pages = mmap(NULL, sz, PROT_WRITE, MAP_ANON | MAP_PRIVATE, -1, 0);
>diff --git a/tests/i915/i915_pm_rpm.c b/tests/i915/i915_pm_rpm.c
>index be296f52..01ab8390 100644
>--- a/tests/i915/i915_pm_rpm.c
>+++ b/tests/i915/i915_pm_rpm.c
>@@ -1006,6 +1006,7 @@ static void gem_mmap_subtest(bool gtt_mmap)
> 	handle = gem_create(drm_fd, buf_size);
>
> 	if (gtt_mmap) {
>+		gem_require_mmap_gtt(drm_fd);
> 		gem_buf = gem_mmap__gtt(drm_fd, handle, buf_size,
> 					PROT_READ | PROT_WRITE);
> 	}
>@@ -1368,6 +1369,8 @@ static void gem_evict_pwrite_subtest(void)
> 	unsigned int num_trash_bos, n;
> 	uint32_t buf;
>
>+	gem_require_mmap_gtt(drm_fd);
>+
> 	num_trash_bos = gem_mappable_aperture_size() / (1024*1024) + 1;
> 	trash_bos = malloc(num_trash_bos * sizeof(*trash_bos));
> 	igt_assert(trash_bos);
>@@ -1796,6 +1799,8 @@ static void pm_test_tiling(void)
> 	/* default stride value */
> 	uint32_t stride = 512;
>
>+	gem_require_mmap_gtt(drm_fd);
>+
> 	/* calculate how many objects we can map */
> 	for (i = 1 << off_bit; i <= gtt_obj_max_size; i <<= 1, max_gem_objs++)
> 		;
>diff --git a/tests/i915/i915_suspend.c b/tests/i915/i915_suspend.c
>index 84cb3b49..4cc09525 100644
>--- a/tests/i915/i915_suspend.c
>+++ b/tests/i915/i915_suspend.c
>@@ -49,6 +49,8 @@ test_fence_restore(int fd, bool tiled2untiled, bool hibernate)
> 	uint32_t *ptr1, *ptr2, *ptr_tiled;
> 	int i;
>
>+	gem_require_mmap_gtt(fd);
>+
> 	/* We wall the tiled object with untiled canary objects to make sure
> 	 * that we detect tile leaking in both directions. */
> 	handle1 = gem_create(fd, OBJECT_SIZE);
>diff --git a/tests/kms_draw_crc.c b/tests/kms_draw_crc.c
>index ea14db9a..1a2e2d4f 100644
>--- a/tests/kms_draw_crc.c
>+++ b/tests/kms_draw_crc.c
>@@ -329,13 +329,17 @@ igt_main
> 		igt_subtest_f("draw-method-%s-%s-%s",
> 			      format_str(format_idx),
> 			      igt_draw_get_method_name(method),
>-			      tiling_str(tiling_idx))
>+			      tiling_str(tiling_idx)) {
>+			gem_require_mmap_gtt(drm_fd);
> 			draw_method_subtest(method, format_idx,
> 					    tilings[tiling_idx]);
>+		}
> 	} } }
>
>-	igt_subtest("fill-fb")
>+	igt_subtest("fill-fb") {
>+		gem_require_mmap_gtt(drm_fd);
> 		fill_fb_subtest();
>+	}
>
> 	igt_fixture
> 		teardown_environment();
>diff --git a/tests/kms_fence_pin_leak.c b/tests/kms_fence_pin_leak.c
>index 62c52b62..ac0f605c 100644
>--- a/tests/kms_fence_pin_leak.c
>+++ b/tests/kms_fence_pin_leak.c
>@@ -202,6 +202,8 @@ igt_simple_main
>
> 	data.drm_fd = drm_open_driver_master(DRIVER_INTEL);
>
>+	gem_require_mmap_gtt(data.drm_fd);
>+
> 	data.devid = intel_get_drm_devid(data.drm_fd);
>
> 	kmstest_set_vt_graphics_mode();
>diff --git a/tests/kms_frontbuffer_tracking.c b/tests/kms_frontbuffer_tracking.c
>index 4d15ce1c..78299438 100644
>--- a/tests/kms_frontbuffer_tracking.c
>+++ b/tests/kms_frontbuffer_tracking.c
>@@ -1758,6 +1758,9 @@ static void check_test_requirements(const struct test_mode *t)
>
> 	if (opt.only_pipes != PIPE_COUNT)
> 		igt_require(t->pipes == opt.only_pipes);
>+
>+	if (t->method == IGT_DRAW_MMAP_GTT)
>+		gem_require_mmap_gtt(drm.fd);
> }
>
> static void set_crtc_fbs(const struct test_mode *t)
>diff --git a/tests/kms_psr.c b/tests/kms_psr.c
>index 3e16a6bf..66f4fcd8 100644
>--- a/tests/kms_psr.c
>+++ b/tests/kms_psr.c
>@@ -41,6 +41,8 @@ enum operations {
> 	PLANE_ONOFF,
> };
>
>+#define needs_gtt(op) if (op == MMAP_GTT) {gem_require_mmap_gtt(data.drm_fd);}
>+
> static const char *op_str(enum operations op)
> {
> 	static const char * const name[] = {
>@@ -474,6 +476,7 @@ int main(int argc, char *argv[])
> 			igt_subtest_f("%sprimary_%s",
> 				      append_subtest_name[data.op_psr_mode],
> 				      op_str(op)) {
>+				needs_gtt(op);
> 				data.op = op;
> 				data.test_plane_id = DRM_PLANE_TYPE_PRIMARY;
> 				test_setup(&data);
>@@ -486,6 +489,7 @@ int main(int argc, char *argv[])
> 			igt_subtest_f("%ssprite_%s",
> 				      append_subtest_name[data.op_psr_mode],
> 				      op_str(op)) {
>+				needs_gtt(op);
> 				data.op = op;
> 				data.test_plane_id = DRM_PLANE_TYPE_OVERLAY;
> 				test_setup(&data);
>diff --git a/tests/prime_mmap.c b/tests/prime_mmap.c
>index 67a6a232..e6258651 100644
>--- a/tests/prime_mmap.c
>+++ b/tests/prime_mmap.c
>@@ -78,6 +78,8 @@ test_correct(void)
> 	char *ptr1, *ptr2;
> 	uint32_t handle;
>
>+	gem_require_mmap_gtt(fd);
>+
> 	handle = gem_create(fd, BO_SIZE);
> 	fill_bo(handle, BO_SIZE);
>
>diff --git a/tests/prime_mmap_coherency.c b/tests/prime_mmap_coherency.c
>index 04b15ddd..9c344df9 100644
>--- a/tests/prime_mmap_coherency.c
>+++ b/tests/prime_mmap_coherency.c
>@@ -295,6 +295,7 @@ int main(int argc, char **argv)
> 	 * reproducing boils down to trial and error to hit different scenarios.
> 	 * TODO: We may want to improve tests a bit by picking random subranges. */
> 	igt_subtest("read") {
>+		gem_require_mmap_gtt(fd);
> 		igt_until_timeout(5) {
> 			int stale = test_read_flush();
> 			igt_fail_on_f(stale,
>diff --git a/tests/prime_vgem.c b/tests/prime_vgem.c
>index 60bb951c..0c60d569 100644
>--- a/tests/prime_vgem.c
>+++ b/tests/prime_vgem.c
>@@ -125,6 +125,8 @@ static void test_fence_mmap(int i915, int vgem)
> 	int dmabuf, i;
> 	int master[2], slave[2];
>
>+	gem_require_mmap_gtt(i915);
>+
> 	igt_assert(pipe(master) == 0);
> 	igt_assert(pipe(slave) == 0);
>
>@@ -207,6 +209,8 @@ static void test_gtt(int vgem, int i915)
> 	uint32_t *ptr;
> 	int dmabuf, i;
>
>+	gem_require_mmap_gtt(i915);
>+
> 	scratch.width = 1024;
> 	scratch.height = 1024;
> 	scratch.bpp = 32;
>@@ -282,6 +286,7 @@ static void test_gtt_interleaved(int vgem, int i915)
> 	uint32_t *ptr, *gtt;
> 	int dmabuf, i;
>
>+	gem_require_mmap_gtt(i915);
> 	igt_require(is_coherent(i915));
>
> 	scratch.width = 1024;
>-- 
>2.20.1
>
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