ioread32 endianess.

ioread32 endianess.

[Alexey Zaytsev]

Hello.

May I ask you, guys, if ioread32 and his friends should treat the data
as host-endian or bus-endian? E.g, should the data read from PCI on a
big-endian host be byte swapped or not?

Re: ioread32 endianess.

[Kyle McMartin]

On Mon, Feb 26, 2007 at 06:36:05PM +0300, Alexey Zaytsev wrote:
> Hello.
> 
> May I ask you, guys, if ioread32 and his friends should treat the data
> as host-endian or bus-endian? E.g, should the data read from PCI on a
> big-endian host be byte swapped or not?
>

It should be in bus-endian. This is why ioreadXbe() exist.

Cheers,
	Kyle

Re: ioread32 endianess.

[Alexey Zaytsev]

On 2/26/07, Kyle McMartin <kyle@mcmartin.ca> wrote:
> On Mon, Feb 26, 2007 at 06:36:05PM +0300, Alexey Zaytsev wrote:
> > Hello.
> >
> > May I ask you, guys, if ioread32 and his friends should treat the data
> > as host-endian or bus-endian? E.g, should the data read from PCI on a
> > big-endian host be byte swapped or not?
> >
>
> It should be in bus-endian. This is why ioreadXbe() exist.

Than how should one write a portable endian-independent driver? Should
I wrap ioread32 with an le32_to_cpu?

>
> Cheers,
>         Kyle
>

Re: ioread32 endianess.

[Kyle McMartin]

On Tue, Feb 27, 2007 at 03:31:20PM +0300, Alexey Zaytsev wrote:
> Than how should one write a portable endian-independent driver? Should
> I wrap ioread32 with an le32_to_cpu?
> 

PCI is always little endian, unless it's not. In which case you're probably
dealing with a graphics card which likely has some kind of palindromic
register which you can read and write to set the endianness of the host
interface. Whoo. Run on sentence.

Re: ioread32 endianess.

[Kyle McMartin]

On Tue, Feb 27, 2007 at 08:20:21AM -0500, Kyle McMartin wrote:
> PCI is always little endian, unless it's not. In which case you're probably
> dealing with a graphics card which likely has some kind of palindromic
> register which you can read and write to set the endianness of the host
> interface. Whoo. Run on sentence.
> 

Perhaps we should have a Documentation/ entry for this...

io(read|write){8,16,32} are the "pci iomap" functions (see
asm-generic/iomap.h) they always byteswap so the value is little endian.

io(read|write){8,16,32}be are sister functions added to deal with big
endian busses. They always byteswap so the value is in big endian.

Both these previous functions can handle using a cookie based on an IO port
range, or an MMIO region.

(read|write){b,w,l} are the old style MMIO-mapped accessors. They also always
byteswap so the value is in little endian. There is no big endian equivalent
for the generic case.

__raw_(read|write){b,w,l} are also old style accessors. They always operate
in host endianness.

The above are (AFAIK) the only functions guaranteed to exist for MMIO.

Of course, most platforms either provide (in|out){b,w,l} or don't support
Port IO as well, but MMIO is the really complicated case.

In any event, <asm-generic/iomap.h> should shed a bit more light on using
these.

Cheers,
	Kyle M.

Re: ioread32 endianess.

[Haavard Skinnemoen]

On 2/27/07, Kyle McMartin <kyle@mcmartin.ca> wrote:
> __raw_(read|write){b,w,l} are also old style accessors. They always operate
> in host endianness.

Are there any "new style" accessors operating in host endianness?

Haavard

Re: ioread32 endianess.

[Alexey Zaytsev]

On 2/27/07, Kyle McMartin <kyle@mcmartin.ca> wrote:
> On Tue, Feb 27, 2007 at 08:20:21AM -0500, Kyle McMartin wrote:
> > PCI is always little endian, unless it's not. In which case you're probably
PCI is always LE, but the host may be different. If you read some data
from a PCI device
on a LE host, the data would be OK, but on a BE host, you may need to
swap it. Right?

More fun comes when you are doing DMA...

> > dealing with a graphics card which likely has some kind of palindromic
> > register which you can read and write to set the endianness of the host
> > interface. Whoo. Run on sentence.
> >
>
> Perhaps we should have a Documentation/ entry for this...
>
> io(read|write){8,16,32} are the "pci iomap" functions (see
> asm-generic/iomap.h) they always byteswap so the value is little endian.
They do even if the target bus is not little endian, right?

>
> io(read|write){8,16,32}be are sister functions added to deal with big
> endian busses. They always byteswap so the value is in big endian.
>
> Both these previous functions can handle using a cookie based on an IO port
> range, or an MMIO region.
>
> (read|write){b,w,l} are the old style MMIO-mapped accessors. They also always
> byteswap so the value is in little endian. There is no big endian equivalent
> for the generic case.
>
> __raw_(read|write){b,w,l} are also old style accessors. They always operate
> in host endianness.
>
> The above are (AFAIK) the only functions guaranteed to exist for MMIO.
>
> Of course, most platforms either provide (in|out){b,w,l} or don't support
> Port IO as well, but MMIO is the really complicated case.
>
> In any event, <asm-generic/iomap.h> should shed a bit more light on using
> these.
>
> Cheers,
>         Kyle M.
>