* [PATCH] powerpc: update interrupt info in booting-without-of.txt
@ 2007-02-27 22:23 Stuart Yoder
2007-02-27 23:23 ` Segher Boessenkool
2007-02-28 0:46 ` David Gibson
0 siblings, 2 replies; 3+ messages in thread
From: Stuart Yoder @ 2007-02-27 22:23 UTC (permalink / raw)
To: paulus; +Cc: linuxppc-dev
Create a new section describing how interrupts are represented
in the device tree. Added more detail clarified some things.
Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com>
---
Documentation/powerpc/booting-without-of.txt | 134 ++++++++++++++++++-------
1 files changed, 96 insertions(+), 38 deletions(-)
diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/powerpc/booting-without-of.txt
index eaa0c32..0238a64 100644
--- a/Documentation/powerpc/booting-without-of.txt
+++ b/Documentation/powerpc/booting-without-of.txt
@@ -1108,42 +1108,7 @@ See appendix A for an example partial SO
MPC8540.
-2) Specifying interrupt information for SOC devices
----------------------------------------------------
-
-Each device that is part of an SOC and which generates interrupts
-should have the following properties:
-
- - interrupt-parent : contains the phandle of the interrupt
- controller which handles interrupts for this device
- - interrupts : a list of tuples representing the interrupt
- number and the interrupt sense and level for each interrupt
- for this device.
-
-This information is used by the kernel to build the interrupt table
-for the interrupt controllers in the system.
-
-Sense and level information should be encoded as follows:
-
- Devices connected to openPIC-compatible controllers should encode
- sense and polarity as follows:
-
- 0 = low to high edge sensitive type enabled
- 1 = active low level sensitive type enabled
- 2 = active high level sensitive type enabled
- 3 = high to low edge sensitive type enabled
-
- ISA PIC interrupt controllers should adhere to the ISA PIC
- encodings listed below:
-
- 0 = active low level sensitive type enabled
- 1 = active high level sensitive type enabled
- 2 = high to low edge sensitive type enabled
- 3 = low to high edge sensitive type enabled
-
-
-
-3) Representing devices without a current OF specification
+2) Representing devices without a current OF specification
----------------------------------------------------------
Currently, there are many devices on SOCs that do not have a standard
@@ -1728,10 +1693,103 @@ platforms are moved over to use the flat
partitions = <00000000 00f80000
00f80000 00080001>;
partition-names = "fs\0firmware";
- };
-
+ };
More devices will be defined as this spec matures.
+VII - Specifying interrupt information for devices
+===================================================
+
+The device tree represents the busses and
+devices of a hardware system in a form similar to the
+physical bus topology of the hardware.
+
+In addition, a logical 'interrupt tree' exists which
+represents the hierarchy and routing of interrupts
+in the hardware.
+
+Devices that generate interrupts have an 'interrupt parent' in
+the interrupt tree. An interrupt parent can be explicitly
+defined through the interrupt-parent property. For nodes with
+no interrupt-parent, the interrupt parent is assumed to be
+the node's _device tree_ parent.
+
+Links between nodes in the interrupt tree are from child nodes
+upwards to their parents and towards the root of the interrupt
+tree.
+
+The interrupt tree model is fully described in the
+document "Open Firmware Recommended Practice: Interrupt
+Mapping Version 0.9". The document is available at:
+<http://playground.sun.com/1275/practice>.
+
+1) interrupt property
+---------------------
+
+Devices that generate interrupts to a single interrupt controller
+should use the conventional OF representation described in the
+OF interrupt mapping documentation.
+
+Each device which generates interrupts must have an 'interrupt'
+property. The interrupt property value is an arbitrary number of
+of 'interrupt specifier' values which describe the interrupt or
+interrupts for the device.
+
+The encoding of an interrupt specifier is determined by the
+domain (or nexus) in the interrupt tree. The interrupt parent
+of an interrupt domain specifies in its #interrupt-cells property
+the number of 32-bit cells required to encode an interrupt specifier.
+
+For example, the binding for the OpenPIC interrupt controller
+specifies an #interrupt-cells value of 2 to encode the interrupt
+number and level/sense information. All interrupt children in an
+OpenPIC interrupt domain use 2 cells per interrupt in their interrupts
+property.
+
+The PCI bus binding specifies a #interrupt-cell value of 1 to encode
+which interrupt line (INTA,INTB,INTC,INTD) is used.
+
+2) interrupt-parent property
+----------------------------
+
+The interrupt-parent property is specified to define an explicit
+link between a device node and its interrupt parent in
+the interrupt tree. The value of interrupt-parent is the
+phandle to the parent node.
+
+If the interrupt-parent property is not defined for a node, it's
+interrupt parent is assumed to be it's device tree_ parent.
+
+3) OpenPIC Interrupt Controllers
+--------------------------------
+
+OpenPIC interrupt controllers required 2 cells to encode
+interrupt information. The first cell defines the interrupt
+number. The second cell defines the sense and level
+information.
+
+Sense and level information should be encoded as follows:
+
+ 0 = low to high edge sensitive type enabled
+ 1 = active low level sensitive type enabled
+ 2 = active high level sensitive type enabled
+ 3 = high to low edge sensitive type enabled
+
+4) ISA Interrupt Controllers
+----------------------------
+
+ISA PIC interrupt controllers required 2 cells to encode
+interrupt information. The first cell defines the interrupt
+number. The second cell defines the sense and level
+information.
+
+ISA PIC interrupt controllers should adhere to the ISA PIC
+encodings listed below:
+
+ 0 = active low level sensitive type enabled
+ 1 = active high level sensitive type enabled
+ 2 = high to low edge sensitive type enabled
+ 3 = low to high edge sensitive type enabled
+
Appendix A - Sample SOC node for MPC8540
========================================
--
1.4.4
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] powerpc: update interrupt info in booting-without-of.txt
2007-02-27 22:23 [PATCH] powerpc: update interrupt info in booting-without-of.txt Stuart Yoder
@ 2007-02-27 23:23 ` Segher Boessenkool
2007-02-28 0:46 ` David Gibson
1 sibling, 0 replies; 3+ messages in thread
From: Segher Boessenkool @ 2007-02-27 23:23 UTC (permalink / raw)
To: Stuart Yoder; +Cc: linuxppc-dev, paulus
> +Devices that generate interrupts have an 'interrupt parent' in
> +the interrupt tree. An interrupt parent can be explicitly
> +defined through the interrupt-parent property. For nodes with
> +no interrupt-parent, the interrupt parent is assumed to be
> +the node's _device tree_ parent.
Or its parent, or its grandparent, etc.
> +The encoding of an interrupt specifier is determined by the
> +domain (or nexus)
Domain. An interrupt nexus is to the interrupt tree
what a node is to the device tree.
> +The PCI bus binding specifies a #interrupt-cell value of 1 to encode
> +which interrupt line (INTA,INTB,INTC,INTD) is used.
s/line/pin/ to agree with PCI terminology.
> +The interrupt-parent property is specified to define an explicit
> +link between a device node and its interrupt parent in
> +the interrupt tree. The value of interrupt-parent is the
> +phandle to the parent node.
phandle _of_ the parent node please.
> +If the interrupt-parent property is not defined for a node, it's
> +interrupt parent is assumed to be it's device tree_ parent.
Same thing again. You missed an underscore, too.
> +OpenPIC interrupt controllers required 2 cells to encode
s/required/require/
> +ISA PIC interrupt controllers required 2 cells to encode
same thing
Looks good otherwise, thanks.
Segher
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] powerpc: update interrupt info in booting-without-of.txt
2007-02-27 22:23 [PATCH] powerpc: update interrupt info in booting-without-of.txt Stuart Yoder
2007-02-27 23:23 ` Segher Boessenkool
@ 2007-02-28 0:46 ` David Gibson
1 sibling, 0 replies; 3+ messages in thread
From: David Gibson @ 2007-02-28 0:46 UTC (permalink / raw)
To: Stuart Yoder; +Cc: linuxppc-dev, paulus
On Tue, Feb 27, 2007 at 04:23:20PM -0600, Stuart Yoder wrote:
>
> Create a new section describing how interrupts are represented
> in the device tree. Added more detail clarified some things.
>
> Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com>
> ---
> Documentation/powerpc/booting-without-of.txt | 134 ++++++++++++++++++-------
> 1 files changed, 96 insertions(+), 38 deletions(-)
>
[snip]
> +1) interrupt property
> +---------------------
s/interrupt/interrupts/
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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2007-02-27 22:23 [PATCH] powerpc: update interrupt info in booting-without-of.txt Stuart Yoder
2007-02-27 23:23 ` Segher Boessenkool
2007-02-28 0:46 ` David Gibson
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