* [Qemu-devel] ARM Versatile/Realview reset
@ 2006-11-15 0:26 Aurelien Jarno
2006-11-15 1:17 ` Aurelien Jarno
0 siblings, 1 reply; 4+ messages in thread
From: Aurelien Jarno @ 2006-11-15 0:26 UTC (permalink / raw)
To: qemu-devel
The ARM Versatile and Realview platforms support reset (but not halt),
howvever it is not implemented in QEMU. The patch below adds this
support. It is very similar to the patch from Daniel Jacobowitz
concerning the MIPS platform.
Note that you need a kernel >= 2.6.19-rc1 (or a patched kernel) to
get the SCSI controller correctly detected on reboot on the Versatile
platform.
--
.''`. Aurelien Jarno | GPG: 1024D/F1BCDB73
: :' : Debian developer | Electrical Engineer
`. `' aurel32@debian.org | aurelien@aurel32.net
`- people.debian.org/~aurel32 | www.aurel32.net
Index: hw/arm_sysctl.c
===================================================================
RCS file: /sources/qemu/qemu/hw/arm_sysctl.c,v
retrieving revision 1.1
diff -u -d -p -r1.1 arm_sysctl.c
--- hw/arm_sysctl.c 23 Sep 2006 17:40:58 -0000 1.1
+++ hw/arm_sysctl.c 15 Nov 2006 00:02:37 -0000
@@ -149,7 +149,7 @@ static void arm_sysctl_write(void *opaqu
if (s->lockval == LOCK_VALUE) {
s->resetlevel = val;
if (val & 0x100)
- cpu_abort(cpu_single_env, "Board reset\n");
+ qemu_system_reset_request ();
}
break;
case 0x44: /* PCICTL */
Index: hw/realview.c
===================================================================
RCS file: /sources/qemu/qemu/hw/realview.c,v
retrieving revision 1.1
diff -u -d -p -r1.1 realview.c
--- hw/realview.c 23 Sep 2006 17:40:58 -0000 1.1
+++ hw/realview.c 15 Nov 2006 00:02:37 -0000
@@ -10,6 +10,18 @@
#include "vl.h"
#include "arm_pic.h"
+static void main_cpu_reset(void *opaque)
+{
+ CPUState *env = opaque;
+
+ cpu_reset(env);
+ cpu_arm_set_model(env, ARM_CPUID_ARM926);
+ if (env->kernel_filename)
+ arm_load_kernel(env->ram_size, env->kernel_filename,
+ env->kernel_cmdline, env->initrd_filename,
+ env->board_id);
+}
+
/* Board init. */
static void realview_init(int ram_size, int vga_ram_size, int boot_device,
@@ -32,6 +44,7 @@ static void realview_init(int ram_size,
/* SDRAM at address zero. */
cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);
+ qemu_register_reset(main_cpu_reset, env);
arm_sysctl_init(0x10000000, 0xc1400400);
pic = arm_pic_init_cpu(env);
/* ??? The documentation says GIC1 is nFIQ and either GIC2 or GIC3
@@ -129,6 +142,11 @@ static void realview_init(int ram_size,
arm_load_kernel(ram_size, kernel_filename, kernel_cmdline,
initrd_filename, 0x33b);
+ env->ram_size = ram_size;
+ env->kernel_filename = kernel_filename;
+ env->kernel_cmdline = kernel_cmdline;
+ env->initrd_filename = initrd_filename;
+ env->board_id = 0x33b;
}
QEMUMachine realview_machine = {
Index: hw/versatilepb.c
===================================================================
RCS file: /sources/qemu/qemu/hw/versatilepb.c,v
retrieving revision 1.6
diff -u -d -p -r1.6 versatilepb.c
--- hw/versatilepb.c 23 Sep 2006 17:40:58 -0000 1.6
+++ hw/versatilepb.c 15 Nov 2006 00:02:37 -0000
@@ -145,6 +145,18 @@ static vpb_sic_state *vpb_sic_init(uint3
return s;
}
+static void main_cpu_reset(void *opaque)
+{
+ CPUState *env = opaque;
+
+ cpu_reset(env);
+ cpu_arm_set_model(env, ARM_CPUID_ARM926);
+ if (env->kernel_filename)
+ arm_load_kernel(env->ram_size, env->kernel_filename,
+ env->kernel_cmdline, env->initrd_filename,
+ env->board_id);
+}
+
/* Board init. */
/* The AB and PB boards both use the same core, just with different
@@ -171,6 +183,7 @@ static void versatile_init(int ram_size,
/* SDRAM at address zero. */
cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);
+ qemu_register_reset(main_cpu_reset, env);
arm_sysctl_init(0x10000000, 0x41007004);
pic = arm_pic_init_cpu(env);
pic = pl190_init(0x10140000, pic, ARM_PIC_CPU_IRQ, ARM_PIC_CPU_FIQ);
@@ -252,6 +265,11 @@ static void versatile_init(int ram_size,
arm_load_kernel(ram_size, kernel_filename, kernel_cmdline,
initrd_filename, board_id);
+ env->ram_size = ram_size;
+ env->kernel_filename = kernel_filename;
+ env->kernel_cmdline = kernel_cmdline;
+ env->initrd_filename = initrd_filename;
+ env->board_id = board_id;
}
static void vpb_init(int ram_size, int vga_ram_size, int boot_device,
Index: target-arm/cpu.h
===================================================================
RCS file: /sources/qemu/qemu/target-arm/cpu.h,v
retrieving revision 1.17
diff -u -d -p -r1.17 cpu.h
--- target-arm/cpu.h 22 Oct 2006 11:54:30 -0000 1.17
+++ target-arm/cpu.h 15 Nov 2006 00:02:37 -0000
@@ -120,6 +120,11 @@ typedef struct CPUARMState {
CPU_COMMON
+ int ram_size;
+ const char *kernel_filename;
+ const char *kernel_cmdline;
+ const char *initrd_filename;
+ int board_id;
} CPUARMState;
CPUARMState *cpu_arm_init(void);
Index: target-arm/helper.c
===================================================================
RCS file: /sources/qemu/qemu/target-arm/helper.c,v
retrieving revision 1.7
diff -u -d -p -r1.7 helper.c
--- target-arm/helper.c 9 Sep 2006 14:36:26 -0000 1.7
+++ target-arm/helper.c 15 Nov 2006 00:02:37 -0000
@@ -7,6 +7,7 @@
void cpu_reset(CPUARMState *env)
{
+ memset(env, 0, offsetof(CPUARMState, breakpoints));
#if defined (CONFIG_USER_ONLY)
env->uncached_cpsr = ARM_CPU_MODE_USR;
env->vfp.xregs[ARM_VFP_FPEXC] = 1 << 30;
@@ -16,6 +17,7 @@ void cpu_reset(CPUARMState *env)
env->vfp.xregs[ARM_VFP_FPEXC] = 0;
#endif
env->regs[15] = 0;
+ tlb_flush(env, 1);
}
CPUARMState *cpu_arm_init(void)
@@ -27,7 +29,6 @@ CPUARMState *cpu_arm_init(void)
return NULL;
cpu_exec_init(env);
cpu_reset(env);
- tlb_flush(env, 1);
return env;
}
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [Qemu-devel] ARM Versatile/Realview reset
2006-11-15 0:26 [Qemu-devel] ARM Versatile/Realview reset Aurelien Jarno
@ 2006-11-15 1:17 ` Aurelien Jarno
2007-01-22 11:07 ` [Qemu-devel] [PATCH] ARM Versatile/Realview reset (resent) Aurelien Jarno
0 siblings, 1 reply; 4+ messages in thread
From: Aurelien Jarno @ 2006-11-15 1:17 UTC (permalink / raw)
To: qemu-devel
On Wed, Nov 15, 2006 at 01:26:59AM +0100, Aurelien Jarno wrote:
> The ARM Versatile and Realview platforms support reset (but not halt),
> howvever it is not implemented in QEMU. The patch below adds this
> support. It is very similar to the patch from Daniel Jacobowitz
> concerning the MIPS platform.
>
> Note that you need a kernel >= 2.6.19-rc1 (or a patched kernel) to
> get the SCSI controller correctly detected on reboot on the Versatile
> platform.
>
Second try. The new patch also includes a reset for the system
controller.
Index: hw/arm_sysctl.c
===================================================================
RCS file: /sources/qemu/qemu/hw/arm_sysctl.c,v
retrieving revision 1.1
diff -u -d -p -r1.1 arm_sysctl.c
--- hw/arm_sysctl.c 23 Sep 2006 17:40:58 -0000 1.1
+++ hw/arm_sysctl.c 15 Nov 2006 00:58:15 -0000
@@ -9,12 +9,11 @@
#include "vl.h"
#include "arm_pic.h"
+#include <stddef.h>
#define LOCK_VALUE 0xa05f
typedef struct {
- uint32_t base;
- uint32_t sys_id;
uint32_t leds;
uint16_t lockval;
uint32_t cfgdata1;
@@ -22,6 +21,10 @@ typedef struct {
uint32_t flags;
uint32_t nvflags;
uint32_t resetlevel;
+
+ /* The following registers should not be changed upon reset */
+ uint32_t base;
+ uint32_t sys_id;
} arm_sysctl_state;
static uint32_t arm_sysctl_read(void *opaque, target_phys_addr_t offset)
@@ -149,7 +152,7 @@ static void arm_sysctl_write(void *opaqu
if (s->lockval == LOCK_VALUE) {
s->resetlevel = val;
if (val & 0x100)
- cpu_abort(cpu_single_env, "Board reset\n");
+ qemu_system_reset_request ();
}
break;
case 0x44: /* PCICTL */
@@ -190,6 +193,13 @@ static CPUWriteMemoryFunc *arm_sysctl_wr
arm_sysctl_write
};
+static void arm_sysctl_reset(void *opaque)
+{
+ arm_sysctl_state *s = opaque;
+
+ memset(s, 0, offsetof(arm_sysctl_state, base));
+}
+
void arm_sysctl_init(uint32_t base, uint32_t sys_id)
{
arm_sysctl_state *s;
@@ -200,6 +210,7 @@ void arm_sysctl_init(uint32_t base, uint
return;
s->base = base;
s->sys_id = sys_id;
+ qemu_register_reset(arm_sysctl_reset, s);
iomemtype = cpu_register_io_memory(0, arm_sysctl_readfn,
arm_sysctl_writefn, s);
cpu_register_physical_memory(base, 0x00000fff, iomemtype);
Index: hw/realview.c
===================================================================
RCS file: /sources/qemu/qemu/hw/realview.c,v
retrieving revision 1.1
diff -u -d -p -r1.1 realview.c
--- hw/realview.c 23 Sep 2006 17:40:58 -0000 1.1
+++ hw/realview.c 15 Nov 2006 00:58:15 -0000
@@ -10,6 +10,18 @@
#include "vl.h"
#include "arm_pic.h"
+static void main_cpu_reset(void *opaque)
+{
+ CPUState *env = opaque;
+
+ cpu_reset(env);
+ cpu_arm_set_model(env, ARM_CPUID_ARM926);
+ if (env->kernel_filename)
+ arm_load_kernel(env->ram_size, env->kernel_filename,
+ env->kernel_cmdline, env->initrd_filename,
+ env->board_id);
+}
+
/* Board init. */
static void realview_init(int ram_size, int vga_ram_size, int boot_device,
@@ -32,6 +44,7 @@ static void realview_init(int ram_size,
/* SDRAM at address zero. */
cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);
+ qemu_register_reset(main_cpu_reset, env);
arm_sysctl_init(0x10000000, 0xc1400400);
pic = arm_pic_init_cpu(env);
/* ??? The documentation says GIC1 is nFIQ and either GIC2 or GIC3
@@ -129,6 +142,11 @@ static void realview_init(int ram_size,
arm_load_kernel(ram_size, kernel_filename, kernel_cmdline,
initrd_filename, 0x33b);
+ env->ram_size = ram_size;
+ env->kernel_filename = kernel_filename;
+ env->kernel_cmdline = kernel_cmdline;
+ env->initrd_filename = initrd_filename;
+ env->board_id = 0x33b;
}
QEMUMachine realview_machine = {
Index: hw/versatilepb.c
===================================================================
RCS file: /sources/qemu/qemu/hw/versatilepb.c,v
retrieving revision 1.6
diff -u -d -p -r1.6 versatilepb.c
--- hw/versatilepb.c 23 Sep 2006 17:40:58 -0000 1.6
+++ hw/versatilepb.c 15 Nov 2006 00:58:15 -0000
@@ -145,6 +145,18 @@ static vpb_sic_state *vpb_sic_init(uint3
return s;
}
+static void main_cpu_reset(void *opaque)
+{
+ CPUState *env = opaque;
+
+ cpu_reset(env);
+ cpu_arm_set_model(env, ARM_CPUID_ARM926);
+ if (env->kernel_filename)
+ arm_load_kernel(env->ram_size, env->kernel_filename,
+ env->kernel_cmdline, env->initrd_filename,
+ env->board_id);
+}
+
/* Board init. */
/* The AB and PB boards both use the same core, just with different
@@ -171,6 +183,7 @@ static void versatile_init(int ram_size,
/* SDRAM at address zero. */
cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);
+ qemu_register_reset(main_cpu_reset, env);
arm_sysctl_init(0x10000000, 0x41007004);
pic = arm_pic_init_cpu(env);
pic = pl190_init(0x10140000, pic, ARM_PIC_CPU_IRQ, ARM_PIC_CPU_FIQ);
@@ -252,6 +265,11 @@ static void versatile_init(int ram_size,
arm_load_kernel(ram_size, kernel_filename, kernel_cmdline,
initrd_filename, board_id);
+ env->ram_size = ram_size;
+ env->kernel_filename = kernel_filename;
+ env->kernel_cmdline = kernel_cmdline;
+ env->initrd_filename = initrd_filename;
+ env->board_id = board_id;
}
static void vpb_init(int ram_size, int vga_ram_size, int boot_device,
Index: target-arm/cpu.h
===================================================================
RCS file: /sources/qemu/qemu/target-arm/cpu.h,v
retrieving revision 1.17
diff -u -d -p -r1.17 cpu.h
--- target-arm/cpu.h 22 Oct 2006 11:54:30 -0000 1.17
+++ target-arm/cpu.h 15 Nov 2006 00:58:15 -0000
@@ -120,6 +120,11 @@ typedef struct CPUARMState {
CPU_COMMON
+ int ram_size;
+ const char *kernel_filename;
+ const char *kernel_cmdline;
+ const char *initrd_filename;
+ int board_id;
} CPUARMState;
CPUARMState *cpu_arm_init(void);
Index: target-arm/helper.c
===================================================================
RCS file: /sources/qemu/qemu/target-arm/helper.c,v
retrieving revision 1.7
diff -u -d -p -r1.7 helper.c
--- target-arm/helper.c 9 Sep 2006 14:36:26 -0000 1.7
+++ target-arm/helper.c 15 Nov 2006 00:58:15 -0000
@@ -7,6 +7,7 @@
void cpu_reset(CPUARMState *env)
{
+ memset(env, 0, offsetof(CPUARMState, breakpoints));
#if defined (CONFIG_USER_ONLY)
env->uncached_cpsr = ARM_CPU_MODE_USR;
env->vfp.xregs[ARM_VFP_FPEXC] = 1 << 30;
@@ -16,6 +17,7 @@ void cpu_reset(CPUARMState *env)
env->vfp.xregs[ARM_VFP_FPEXC] = 0;
#endif
env->regs[15] = 0;
+ tlb_flush(env, 1);
}
CPUARMState *cpu_arm_init(void)
@@ -27,7 +29,6 @@ CPUARMState *cpu_arm_init(void)
return NULL;
cpu_exec_init(env);
cpu_reset(env);
- tlb_flush(env, 1);
return env;
}
--
.''`. Aurelien Jarno | GPG: 1024D/F1BCDB73
: :' : Debian developer | Electrical Engineer
`. `' aurel32@debian.org | aurelien@aurel32.net
`- people.debian.org/~aurel32 | www.aurel32.net
^ permalink raw reply [flat|nested] 4+ messages in thread
* [Qemu-devel] [PATCH] ARM Versatile/Realview reset (resent)
2006-11-15 1:17 ` Aurelien Jarno
@ 2007-01-22 11:07 ` Aurelien Jarno
2007-02-28 11:14 ` Aurelien Jarno
0 siblings, 1 reply; 4+ messages in thread
From: Aurelien Jarno @ 2007-01-22 11:07 UTC (permalink / raw)
To: qemu-devel
On Wed, Nov 15, 2006 at 02:17:22AM +0100, Aurelien Jarno wrote:
> On Wed, Nov 15, 2006 at 01:26:59AM +0100, Aurelien Jarno wrote:
> > The ARM Versatile and Realview platforms support reset (but not halt),
> > howvever it is not implemented in QEMU. The patch below adds this
> > support. It is very similar to the patch from Daniel Jacobowitz
> > concerning the MIPS platform.
> >
> > Note that you need a kernel >= 2.6.19-rc1 (or a patched kernel) to
> > get the SCSI controller correctly detected on reboot on the Versatile
> > platform.
> >
Please find and updated version below.
Index: hw/arm_sysctl.c
===================================================================
RCS file: /sources/qemu/qemu/hw/arm_sysctl.c,v
retrieving revision 1.1
diff -u -d -p -r1.1 arm_sysctl.c
--- hw/arm_sysctl.c 23 Sep 2006 17:40:58 -0000 1.1
+++ hw/arm_sysctl.c 17 Jan 2007 11:03:16 -0000
@@ -149,7 +149,7 @@ static void arm_sysctl_write(void *opaqu
if (s->lockval == LOCK_VALUE) {
s->resetlevel = val;
if (val & 0x100)
- cpu_abort(cpu_single_env, "Board reset\n");
+ qemu_system_reset_request ();
}
break;
case 0x44: /* PCICTL */
Index: hw/realview.c
===================================================================
RCS file: /sources/qemu/qemu/hw/realview.c,v
retrieving revision 1.3
diff -u -d -p -r1.3 realview.c
--- hw/realview.c 16 Jan 2007 18:54:31 -0000 1.3
+++ hw/realview.c 17 Jan 2007 11:03:16 -0000
@@ -10,6 +10,18 @@
#include "vl.h"
#include "arm_pic.h"
+static void main_cpu_reset(void *opaque)
+{
+ CPUState *env = opaque;
+
+ cpu_reset(env);
+ cpu_arm_set_model(env, ARM_CPUID_ARM926);
+ if (env->kernel_filename)
+ arm_load_kernel(env->ram_size, env->kernel_filename,
+ env->kernel_cmdline, env->initrd_filename,
+ env->board_id);
+}
+
/* Board init. */
static void realview_init(int ram_size, int vga_ram_size, int boot_device,
@@ -32,6 +44,7 @@ static void realview_init(int ram_size,
/* SDRAM at address zero. */
cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);
+ qemu_register_reset(main_cpu_reset, env);
arm_sysctl_init(0x10000000, 0xc1400400);
pic = arm_pic_init_cpu(env);
/* ??? The documentation says GIC1 is nFIQ and either GIC2 or GIC3
@@ -129,6 +142,11 @@ static void realview_init(int ram_size,
arm_load_kernel(env, ram_size, kernel_filename, kernel_cmdline,
initrd_filename, 0x33b);
+ env->ram_size = ram_size;
+ env->kernel_filename = kernel_filename;
+ env->kernel_cmdline = kernel_cmdline;
+ env->initrd_filename = initrd_filename;
+ env->board_id = 0x33b;
}
QEMUMachine realview_machine = {
Index: hw/versatilepb.c
===================================================================
RCS file: /sources/qemu/qemu/hw/versatilepb.c,v
retrieving revision 1.8
diff -u -d -p -r1.8 versatilepb.c
--- hw/versatilepb.c 16 Jan 2007 18:54:31 -0000 1.8
+++ hw/versatilepb.c 17 Jan 2007 11:03:16 -0000
@@ -145,6 +145,18 @@ static vpb_sic_state *vpb_sic_init(uint3
return s;
}
+static void main_cpu_reset(void *opaque)
+{
+ CPUState *env = opaque;
+
+ cpu_reset(env);
+ cpu_arm_set_model(env, ARM_CPUID_ARM926);
+ if (env->kernel_filename)
+ arm_load_kernel(env->ram_size, env->kernel_filename,
+ env->kernel_cmdline, env->initrd_filename,
+ env->board_id);
+}
+
/* Board init. */
/* The AB and PB boards both use the same core, just with different
@@ -171,6 +183,7 @@ static void versatile_init(int ram_size,
/* SDRAM at address zero. */
cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);
+ qemu_register_reset(main_cpu_reset, env);
arm_sysctl_init(0x10000000, 0x41007004);
pic = arm_pic_init_cpu(env);
pic = pl190_init(0x10140000, pic, ARM_PIC_CPU_IRQ, ARM_PIC_CPU_FIQ);
@@ -252,6 +265,11 @@ static void versatile_init(int ram_size,
arm_load_kernel(env, ram_size, kernel_filename, kernel_cmdline,
initrd_filename, board_id);
+ env->ram_size = ram_size;
+ env->kernel_filename = kernel_filename;
+ env->kernel_cmdline = kernel_cmdline;
+ env->initrd_filename = initrd_filename;
+ env->board_id = board_id;
}
static void vpb_init(int ram_size, int vga_ram_size, int boot_device,
Index: target-arm/cpu.h
===================================================================
RCS file: /sources/qemu/qemu/target-arm/cpu.h,v
retrieving revision 1.18
diff -u -d -p -r1.18 cpu.h
--- target-arm/cpu.h 23 Dec 2006 14:18:40 -0000 1.18
+++ target-arm/cpu.h 17 Jan 2007 11:03:16 -0000
@@ -122,6 +122,11 @@ typedef struct CPUARMState {
CPU_COMMON
+ int ram_size;
+ const char *kernel_filename;
+ const char *kernel_cmdline;
+ const char *initrd_filename;
+ int board_id;
} CPUARMState;
CPUARMState *cpu_arm_init(void);
Index: target-arm/helper.c
===================================================================
RCS file: /sources/qemu/qemu/target-arm/helper.c,v
retrieving revision 1.7
diff -u -d -p -r1.7 helper.c
--- target-arm/helper.c 9 Sep 2006 14:36:26 -0000 1.7
+++ target-arm/helper.c 17 Jan 2007 11:03:16 -0000
@@ -7,6 +7,7 @@
void cpu_reset(CPUARMState *env)
{
+ memset(env, 0, offsetof(CPUARMState, breakpoints));
#if defined (CONFIG_USER_ONLY)
env->uncached_cpsr = ARM_CPU_MODE_USR;
env->vfp.xregs[ARM_VFP_FPEXC] = 1 << 30;
@@ -16,6 +17,7 @@ void cpu_reset(CPUARMState *env)
env->vfp.xregs[ARM_VFP_FPEXC] = 0;
#endif
env->regs[15] = 0;
+ tlb_flush(env, 1);
}
CPUARMState *cpu_arm_init(void)
@@ -27,7 +29,6 @@ CPUARMState *cpu_arm_init(void)
return NULL;
cpu_exec_init(env);
cpu_reset(env);
- tlb_flush(env, 1);
return env;
}
--
.''`. Aurelien Jarno | GPG: 1024D/F1BCDB73
: :' : Debian developer | Electrical Engineer
`. `' aurel32@debian.org | aurelien@aurel32.net
`- people.debian.org/~aurel32 | www.aurel32.net
^ permalink raw reply [flat|nested] 4+ messages in thread
* [Qemu-devel] [PATCH] ARM Versatile/Realview reset (resent)
2007-01-22 11:07 ` [Qemu-devel] [PATCH] ARM Versatile/Realview reset (resent) Aurelien Jarno
@ 2007-02-28 11:14 ` Aurelien Jarno
0 siblings, 0 replies; 4+ messages in thread
From: Aurelien Jarno @ 2007-02-28 11:14 UTC (permalink / raw)
To: qemu-devel
On Mon, Jan 22, 2007 at 12:07:29PM +0100, Aurelien Jarno wrote:
> On Wed, Nov 15, 2006 at 02:17:22AM +0100, Aurelien Jarno wrote:
> > On Wed, Nov 15, 2006 at 01:26:59AM +0100, Aurelien Jarno wrote:
> > > The ARM Versatile and Realview platforms support reset (but not halt),
> > > howvever it is not implemented in QEMU. The patch below adds this
> > > support. It is very similar to the patch from Daniel Jacobowitz
> > > concerning the MIPS platform.
> > >
> > > Note that you need a kernel >= 2.6.19-rc1 (or a patched kernel) to
> > > get the SCSI controller correctly detected on reboot on the Versatile
> > > platform.
> > >
>
> Please find and updated version below.
>
The patch needed an update once again, please find it below
Index: hw/arm_sysctl.c
===================================================================
RCS file: /sources/qemu/qemu/hw/arm_sysctl.c,v
retrieving revision 1.1
diff -u -d -p -r1.1 arm_sysctl.c
--- hw/arm_sysctl.c 23 Sep 2006 17:40:58 -0000 1.1
+++ hw/arm_sysctl.c 28 Feb 2007 10:31:02 -0000
@@ -149,7 +149,7 @@ static void arm_sysctl_write(void *opaqu
if (s->lockval == LOCK_VALUE) {
s->resetlevel = val;
if (val & 0x100)
- cpu_abort(cpu_single_env, "Board reset\n");
+ qemu_system_reset_request ();
}
break;
case 0x44: /* PCICTL */
Index: hw/realview.c
===================================================================
RCS file: /sources/qemu/qemu/hw/realview.c,v
retrieving revision 1.3
diff -u -d -p -r1.3 realview.c
--- hw/realview.c 16 Jan 2007 18:54:31 -0000 1.3
+++ hw/realview.c 28 Feb 2007 10:31:02 -0000
@@ -10,6 +10,18 @@
#include "vl.h"
#include "arm_pic.h"
+static void main_cpu_reset(void *opaque)
+{
+ CPUState *env = opaque;
+
+ cpu_reset(env);
+ cpu_arm_set_model(env, ARM_CPUID_ARM926);
+ if (env->kernel_filename)
+ arm_load_kernel(env, env->ram_size, env->kernel_filename,
+ env->kernel_cmdline, env->initrd_filename,
+ env->board_id);
+}
+
/* Board init. */
static void realview_init(int ram_size, int vga_ram_size, int boot_device,
@@ -32,6 +44,7 @@ static void realview_init(int ram_size,
/* SDRAM at address zero. */
cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);
+ qemu_register_reset(main_cpu_reset, env);
arm_sysctl_init(0x10000000, 0xc1400400);
pic = arm_pic_init_cpu(env);
/* ??? The documentation says GIC1 is nFIQ and either GIC2 or GIC3
@@ -129,6 +142,11 @@ static void realview_init(int ram_size,
arm_load_kernel(env, ram_size, kernel_filename, kernel_cmdline,
initrd_filename, 0x33b);
+ env->ram_size = ram_size;
+ env->kernel_filename = kernel_filename;
+ env->kernel_cmdline = kernel_cmdline;
+ env->initrd_filename = initrd_filename;
+ env->board_id = 0x33b;
}
QEMUMachine realview_machine = {
Index: hw/versatilepb.c
===================================================================
RCS file: /sources/qemu/qemu/hw/versatilepb.c,v
retrieving revision 1.8
diff -u -d -p -r1.8 versatilepb.c
--- hw/versatilepb.c 16 Jan 2007 18:54:31 -0000 1.8
+++ hw/versatilepb.c 28 Feb 2007 10:31:02 -0000
@@ -145,6 +145,18 @@ static vpb_sic_state *vpb_sic_init(uint3
return s;
}
+static void main_cpu_reset(void *opaque)
+{
+ CPUState *env = opaque;
+
+ cpu_reset(env);
+ cpu_arm_set_model(env, ARM_CPUID_ARM926);
+ if (env->kernel_filename)
+ arm_load_kernel(env, env->ram_size, env->kernel_filename,
+ env->kernel_cmdline, env->initrd_filename,
+ env->board_id);
+}
+
/* Board init. */
/* The AB and PB boards both use the same core, just with different
@@ -171,6 +183,7 @@ static void versatile_init(int ram_size,
/* SDRAM at address zero. */
cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);
+ qemu_register_reset(main_cpu_reset, env);
arm_sysctl_init(0x10000000, 0x41007004);
pic = arm_pic_init_cpu(env);
pic = pl190_init(0x10140000, pic, ARM_PIC_CPU_IRQ, ARM_PIC_CPU_FIQ);
@@ -252,6 +265,11 @@ static void versatile_init(int ram_size,
arm_load_kernel(env, ram_size, kernel_filename, kernel_cmdline,
initrd_filename, board_id);
+ env->ram_size = ram_size;
+ env->kernel_filename = kernel_filename;
+ env->kernel_cmdline = kernel_cmdline;
+ env->initrd_filename = initrd_filename;
+ env->board_id = board_id;
}
static void vpb_init(int ram_size, int vga_ram_size, int boot_device,
Index: target-arm/cpu.h
===================================================================
RCS file: /sources/qemu/qemu/target-arm/cpu.h,v
retrieving revision 1.19
diff -u -d -p -r1.19 cpu.h
--- target-arm/cpu.h 31 Jan 2007 12:16:50 -0000 1.19
+++ target-arm/cpu.h 28 Feb 2007 10:31:02 -0000
@@ -122,6 +122,11 @@ typedef struct CPUARMState {
CPU_COMMON
+ int ram_size;
+ const char *kernel_filename;
+ const char *kernel_cmdline;
+ const char *initrd_filename;
+ int board_id;
} CPUARMState;
CPUARMState *cpu_arm_init(void);
Index: target-arm/helper.c
===================================================================
RCS file: /sources/qemu/qemu/target-arm/helper.c,v
retrieving revision 1.8
diff -u -d -p -r1.8 helper.c
--- target-arm/helper.c 20 Jan 2007 17:12:09 -0000 1.8
+++ target-arm/helper.c 28 Feb 2007 10:31:02 -0000
@@ -7,6 +7,7 @@
void cpu_reset(CPUARMState *env)
{
+ memset(env, 0, offsetof(CPUARMState, breakpoints));
#if defined (CONFIG_USER_ONLY)
env->uncached_cpsr = ARM_CPU_MODE_USR;
env->vfp.xregs[ARM_VFP_FPEXC] = 1 << 30;
@@ -16,6 +17,7 @@ void cpu_reset(CPUARMState *env)
env->vfp.xregs[ARM_VFP_FPEXC] = 0;
#endif
env->regs[15] = 0;
+ tlb_flush(env, 1);
}
CPUARMState *cpu_arm_init(void)
@@ -27,7 +29,6 @@ CPUARMState *cpu_arm_init(void)
return NULL;
cpu_exec_init(env);
cpu_reset(env);
- tlb_flush(env, 1);
return env;
}
--
.''`. Aurelien Jarno | GPG: 1024D/F1BCDB73
: :' : Debian developer | Electrical Engineer
`. `' aurel32@debian.org | aurelien@aurel32.net
`- people.debian.org/~aurel32 | www.aurel32.net
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2007-02-28 11:15 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2006-11-15 0:26 [Qemu-devel] ARM Versatile/Realview reset Aurelien Jarno
2006-11-15 1:17 ` Aurelien Jarno
2007-01-22 11:07 ` [Qemu-devel] [PATCH] ARM Versatile/Realview reset (resent) Aurelien Jarno
2007-02-28 11:14 ` Aurelien Jarno
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