* Question on shadow_invlpg return value handling.
@ 2007-03-27 4:51 aditya shevalkar
2007-03-27 8:32 ` Tim Deegan
0 siblings, 1 reply; 4+ messages in thread
From: aditya shevalkar @ 2007-03-27 4:51 UTC (permalink / raw)
To: xen devel
HI all,
I am trying to understand the invlpg vmexit case.
In this the sh_invlpg function is called from the shadow_invlpg function and the
comment explains that the sh_invlpg function returns 1 in one case and zero in
other case.But as I have seen return value from sh_invlpg is not used in
shadow_invlpg function.
Can anyone explain me where does this return values from sh_invlpg are used.
The comment is given below:
/* Called when the guest requests an invlpg. Returns 1 if the invlpg
* instruction should be issued on the hardware, or 0 if it's safe not
* to do so. */
I have followed the following path of function call in my study of the function.
vmx_vmexit_do_invlpg(va) à shadow_invlpg(v, va) à sh_invlpg(struct vcpu *v, unsigned long va).
The files are given below:
shadow_invlpg àxen\include\asm-x86\shadow.h
sh_invlpg à xen\arch\x86\mm\shadow\multi.c
Specially what happens if it returns 1.
Thanks and Regards,
Aditya .
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^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: Question on shadow_invlpg return value handling.
2007-03-27 4:51 Question on shadow_invlpg return value handling aditya shevalkar
@ 2007-03-27 8:32 ` Tim Deegan
0 siblings, 0 replies; 4+ messages in thread
From: Tim Deegan @ 2007-03-27 8:32 UTC (permalink / raw)
To: aditya shevalkar; +Cc: xen-devel
At 10:21 +0530 on 27 Mar (1174990916), aditya shevalkar wrote:
> Can anyone explain me where does this return values from sh_invlpg are used.
> The comment is given below:
> /* Called when the guest requests an invlpg. Returns 1 if the invlpg
> * instruction should be issued on the hardware, or 0 if it's safe not
> * to do so. */
> I have followed the following path of function call in my study of the function.
> vmx_vmexit_do_invlpg(va) à shadow_invlpg(v, va) à sh_invlpg(struct vcpu *v, unsigned long va).
The VMX (and SVM) code ignores the return code of shadow_invlpg at the
moment, because they both flush the entire TLB on every VM entry anyway
(AMD's hardware support for tagged TLBs is apparently not quite useable
yet).
arch/x86/mm.c, which handles PV guests, uses the return code correctly,
e.g.:
case MMUEXT_INVLPG_LOCAL:
if ( !shadow_mode_enabled(d)
|| shadow_invlpg(v, op.arg1.linear_addr) != 0 )
local_flush_tlb_one(op.arg1.linear_addr);
break;
Cheers,
Tim.
--
Tim Deegan <Tim.Deegan@xensource.com>, XenSource UK Limited
Registered office c/o EC2Y 5EB, UK; company number 05334508
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: Question on shadow_invlpg return value handling.
2007-03-27 10:19 jeet
@ 2007-03-27 10:29 ` Tim Deegan
0 siblings, 0 replies; 4+ messages in thread
From: Tim Deegan @ 2007-03-27 10:29 UTC (permalink / raw)
To: jeet; +Cc: xen-devel, Tim Deegan, aditya shevalkar
At 15:49 +0530 on 27 Mar (1175010562), jeet wrote:
> If on VM entry TLB is flushed why we are handling instruction "invlpg" in xen
> can't this be done by doing VMexit and VM entry as this would do flushing of TLB?
Yes, for now that's true. When the tagged TLB comes back it won't be;
and after 3.0.5 we might be doing some more optimizations that will need
to hook off the paging_invlpg call.
> Is this TLB flush done due to loading of guest state (mov to cr3)?
> or
> Is TLB flush on VM entry hardware feature or is implemented in Xen ?
Hardware.
You should really read volume 2 section 15 of the AMD manual, and volume
3a chapters 19-27 of the Intel manuals.
Tim.
--
Tim Deegan <Tim.Deegan@xensource.com>, XenSource UK Limited
Registered office c/o EC2Y 5EB, UK; company number 05334508
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: Question on shadow_invlpg return value handling.
@ 2007-03-27 10:19 jeet
2007-03-27 10:29 ` Tim Deegan
0 siblings, 1 reply; 4+ messages in thread
From: jeet @ 2007-03-27 10:19 UTC (permalink / raw)
To: Tim Deegan, aditya shevalkar; +Cc: xen-devel
Hi Tim
If on VM entry TLB is flushed why we are handling instruction "invlpg" in xen
can't this be done by doing VMexit and VM entry as this would do flushing of TLB?
Is this TLB flush done due to loading of guest state (mov to cr3)?
or
Is TLB flush on VM entry hardware feature or is implemented in Xen ?
jeet
----- Original Message ----
From: Tim Deegan <Tim.Deegan@xensource.com>
To: aditya shevalkar <aditya27783@yahoo.co.in>
Cc: xen-devel@lists.xensource.com
Sent: Tuesday, 27 March, 2007 2:02:25 PM
Subject: Re: [Xen-devel] Question on shadow_invlpg return value handling.
At 10:21 +0530 on 27 Mar (1174990916), aditya shevalkar wrote:
> Can anyone explain me where does this return values from sh_invlpg are used.
> The comment is given below:
> /* Called when the guest requests an invlpg. Returns 1 if the invlpg
> * instruction should be issued on the hardware, or 0 if it's safe not
> * to do so. */
> I have followed the following path of function call in my study of the function.
> vmx_vmexit_do_invlpg(va) à shadow_invlpg(v, va) à sh_invlpg(struct vcpu *v, unsigned long va).
The VMX (and SVM) code ignores the return code of shadow_invlpg at the
moment, because they both flush the entire TLB on every VM entry anyway
(AMD's hardware support for tagged TLBs is apparently not quite useable
yet).
arch/x86/mm.c, which handles PV guests, uses the return code correctly,
e.g.:
case MMUEXT_INVLPG_LOCAL:
if ( !shadow_mode_enabled(d)
|| shadow_invlpg(v, op.arg1.linear_addr) != 0 )
local_flush_tlb_one(op.arg1.linear_addr);
break;
Cheers,
Tim.
--
Tim Deegan <Tim.Deegan@xensource.com>, XenSource UK Limited
Registered office c/o EC2Y 5EB, UK; company number 05334508
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^ permalink raw reply [flat|nested] 4+ messages in thread
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2007-03-27 4:51 Question on shadow_invlpg return value handling aditya shevalkar
2007-03-27 8:32 ` Tim Deegan
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2007-03-27 10:29 ` Tim Deegan
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