[patch 1/2] x86: apic: Export symbols for extended interrupt LVT functions

[patch 1/2] x86: apic: Export symbols for extended interrupt LVT functions

[Robert Richter]

[-- Attachment #1: 0001-x86-apic-Export-symbols-for-extended-interrupt-LVT.patch --]
[-- Type: text/plain, Size: 892 bytes --]

Signed-off-by: Robert Richter <robert.richter@amd.com>
---
 arch/x86/kernel/apic_64.c |    2 ++
 1 files changed, 2 insertions(+), 0 deletions(-)

diff --git a/arch/x86/kernel/apic_64.c b/arch/x86/kernel/apic_64.c
index d8d03e0..2a9f4bc 100644
--- a/arch/x86/kernel/apic_64.c
+++ b/arch/x86/kernel/apic_64.c
@@ -215,12 +215,14 @@ u8 setup_APIC_eilvt_mce(u8 vector, u8 msg_type, u8 mask)
 	setup_APIC_eilvt(APIC_EILVT_LVTOFF_MCE, vector, msg_type, mask);
 	return APIC_EILVT_LVTOFF_MCE;
 }
+EXPORT_SYMBOL(setup_APIC_eilvt_mce);
 
 u8 setup_APIC_eilvt_ibs(u8 vector, u8 msg_type, u8 mask)
 {
 	setup_APIC_eilvt(APIC_EILVT_LVTOFF_IBS, vector, msg_type, mask);
 	return APIC_EILVT_LVTOFF_IBS;
 }
+EXPORT_SYMBOL(setup_APIC_eilvt_ibs);
 
 /*
  * Program the next event, relative to now
-- 
1.5.1.6

-- 
Advanced Micro Devices, Inc.
Operating System Research Center
email: robert.richter@amd.com

[patch 0/2] x86: Add AMD Barcelona extended interrupt support for 32bit

[Robert Richter]

This patch series adds support for extended interrupts on AMD
Barcelona CPUs. Implementation is the same as it exists already for
64bit. Also EXPORT_SYMBOL macros are added to the 64bit code.

-- 
Advanced Micro Devices, Inc.
Operating System Research Center
email: robert.richter@amd.com

[patch 2/2] x86: apic: Extended interrupt LVT support for AMD Barcelona (32bit)

[Robert Richter]

[-- Attachment #1: 0002-x86-apic-Extended-interrupt-LVT-support-for-AMD-Ba.patch --]
[-- Type: text/plain, Size: 1473 bytes --]

Signed-off-by: Robert Richter <robert.richter@amd.com>
---
 arch/x86/kernel/apic_32.c |   31 +++++++++++++++++++++++++++++++
 1 files changed, 31 insertions(+), 0 deletions(-)

diff --git a/arch/x86/kernel/apic_32.c b/arch/x86/kernel/apic_32.c
index 35a568e..a6f9d25 100644
--- a/arch/x86/kernel/apic_32.c
+++ b/arch/x86/kernel/apic_32.c
@@ -621,6 +621,37 @@ int setup_profiling_timer(unsigned int multiplier)
 }
 
 /*
+ * Setup extended LVT, AMD specific (K8, family 10h)
+ *
+ * Vector mappings are hard coded. On K8 only offset 0 (APIC500) and
+ * MCE interrupts are supported. Thus MCE offset must be set to 0.
+ */
+
+#define APIC_EILVT_LVTOFF_MCE 0
+#define APIC_EILVT_LVTOFF_IBS 1
+
+static void setup_APIC_eilvt(u8 lvt_off, u8 vector, u8 msg_type, u8 mask)
+{
+	unsigned long reg = (lvt_off << 4) + APIC_EILVT0;
+	unsigned int  v   = (mask << 16) | (msg_type << 8) | vector;
+	apic_write(reg, v);
+}
+
+u8 setup_APIC_eilvt_mce(u8 vector, u8 msg_type, u8 mask)
+{
+	setup_APIC_eilvt(APIC_EILVT_LVTOFF_MCE, vector, msg_type, mask);
+	return APIC_EILVT_LVTOFF_MCE;
+}
+EXPORT_SYMBOL(setup_APIC_eilvt_mce);
+
+u8 setup_APIC_eilvt_ibs(u8 vector, u8 msg_type, u8 mask)
+{
+	setup_APIC_eilvt(APIC_EILVT_LVTOFF_IBS, vector, msg_type, mask);
+	return APIC_EILVT_LVTOFF_IBS;
+}
+EXPORT_SYMBOL(setup_APIC_eilvt_ibs);
+
+/*
  * Local APIC start and shutdown
  */
 
-- 
1.5.1.6

-- 
Advanced Micro Devices, Inc.
Operating System Research Center
email: robert.richter@amd.com

Re: [patch 1/2] x86: apic: Export symbols for extended interrupt LVT functions

[Arjan van de Ven]

On Wed, 13 Feb 2008 16:19:36 +0100 (CET)
"Robert Richter" <robert.richter@amd.com> wrote:

> Signed-off-by: Robert Richter <robert.richter@amd.com>
> ---
>  arch/x86/kernel/apic_64.c |    2 ++
>  1 files changed, 2 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/x86/kernel/apic_64.c b/arch/x86/kernel/apic_64.c
> index d8d03e0..2a9f4bc 100644
> --- a/arch/x86/kernel/apic_64.c
> +++ b/arch/x86/kernel/apic_64.c
> @@ -215,12 +215,14 @@ u8 setup_APIC_eilvt_mce(u8 vector, u8 msg_type,
> u8 mask) setup_APIC_eilvt(APIC_EILVT_LVTOFF_MCE, vector, msg_type,
> mask); return APIC_EILVT_LVTOFF_MCE;
>  }
> +EXPORT_SYMBOL(setup_APIC_eilvt_mce);
>  
>  u8 setup_APIC_eilvt_ibs(u8 vector, u8 msg_type, u8 mask)
>  {
>  	setup_APIC_eilvt(APIC_EILVT_LVTOFF_IBS, vector, msg_type,
> mask); return APIC_EILVT_LVTOFF_IBS;
>  }
> +EXPORT_SYMBOL(setup_APIC_eilvt_ibs);

which modules would even consider using any of these?
Doesn't sound like something we should export..


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Re: [patch 1/2] x86: apic: Export symbols for extended interrupt LVT functions

[Robert Richter]

On 13.02.08 14:32:56, Arjan van de Ven wrote:
> On Wed, 13 Feb 2008 16:19:36 +0100 (CET)
> "Robert Richter" <robert.richter@amd.com> wrote:
> 
> > Signed-off-by: Robert Richter <robert.richter@amd.com>
> > ---
> >  arch/x86/kernel/apic_64.c |    2 ++
> >  1 files changed, 2 insertions(+), 0 deletions(-)
> > 
> > diff --git a/arch/x86/kernel/apic_64.c b/arch/x86/kernel/apic_64.c
> > index d8d03e0..2a9f4bc 100644
> > --- a/arch/x86/kernel/apic_64.c
> > +++ b/arch/x86/kernel/apic_64.c
> > @@ -215,12 +215,14 @@ u8 setup_APIC_eilvt_mce(u8 vector, u8 msg_type,
> > u8 mask) setup_APIC_eilvt(APIC_EILVT_LVTOFF_MCE, vector, msg_type,
> > mask); return APIC_EILVT_LVTOFF_MCE;
> >  }
> > +EXPORT_SYMBOL(setup_APIC_eilvt_mce);
> >  
> >  u8 setup_APIC_eilvt_ibs(u8 vector, u8 msg_type, u8 mask)
> >  {
> >  	setup_APIC_eilvt(APIC_EILVT_LVTOFF_IBS, vector, msg_type,
> > mask); return APIC_EILVT_LVTOFF_IBS;
> >  }
> > +EXPORT_SYMBOL(setup_APIC_eilvt_ibs);
> 
> which modules would even consider using any of these?
> Doesn't sound like something we should export..

For IBS it is Perfmon. See here:
http://git.kernel.org/?p=linux/kernel/git/eranian/linux-2.6.git;a=commit;h=7caef3e19d17349f869884f5adf7c9823e32ade7

MCE export has been added for consistency reasons to allow modules to
enable MCE.

-Robert

-- 
Advanced Micro Devices, Inc.
Operating System Research Center
email: robert.richter@amd.com

Re: [patch 1/2] x86: apic: Export symbols for extended interrupt LVT functions

[Arjan van de Ven]

On Thu, 14 Feb 2008 10:40:36 +0100
"Robert Richter" <robert.richter@amd.com> wrote:

> On 13.02.08 14:32:56, Arjan van de Ven wrote:
> > On Wed, 13 Feb 2008 16:19:36 +0100 (CET)
> > "Robert Richter" <robert.richter@amd.com> wrote:
> > 
> > > Signed-off-by: Robert Richter <robert.richter@amd.com>
> > > ---
> > >  arch/x86/kernel/apic_64.c |    2 ++
> > >  1 files changed, 2 insertions(+), 0 deletions(-)
> > > 
> > > diff --git a/arch/x86/kernel/apic_64.c b/arch/x86/kernel/apic_64.c
> > > index d8d03e0..2a9f4bc 100644
> > > --- a/arch/x86/kernel/apic_64.c
> > > +++ b/arch/x86/kernel/apic_64.c
> > > @@ -215,12 +215,14 @@ u8 setup_APIC_eilvt_mce(u8 vector, u8
> > > msg_type, u8 mask) setup_APIC_eilvt(APIC_EILVT_LVTOFF_MCE,
> > > vector, msg_type, mask); return APIC_EILVT_LVTOFF_MCE;
> > >  }
> > > +EXPORT_SYMBOL(setup_APIC_eilvt_mce);
> > >  
> > >  u8 setup_APIC_eilvt_ibs(u8 vector, u8 msg_type, u8 mask)
> > >  {
> > >  	setup_APIC_eilvt(APIC_EILVT_LVTOFF_IBS, vector, msg_type,
> > > mask); return APIC_EILVT_LVTOFF_IBS;
> > >  }
> > > +EXPORT_SYMBOL(setup_APIC_eilvt_ibs);
> > 
> > which modules would even consider using any of these?
> > Doesn't sound like something we should export..
> 
> For IBS it is Perfmon. See here:
> http://git.kernel.org/?p=linux/kernel/git/eranian/linux-2.6.git;a=commit;h=7caef3e19d17349f869884f5adf7c9823e32ade7
> 

perfmon doesn't seem to go anywhere lately, so realistically this chunk should be part of the perfmon tree.

> MCE export has been added for consistency reasons to allow modules to
> enable MCE.

no module does that right now, nor should it. MCE is really something the core kernel should do right?
"consistency reasons" isn't "just export everything used or not", it's "oh this makes sense as part of a well
thought out, generic consistent api". This one isn't./


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Re: [patch 2/2] x86: apic: Extended interrupt LVT support for AMD Barcelona (32bit)

[Ingo Molnar]

* Robert Richter <robert.richter@amd.com> wrote:

>  /*
> + * Setup extended LVT, AMD specific (K8, family 10h)
> + *
> + * Vector mappings are hard coded. On K8 only offset 0 (APIC500) and
> + * MCE interrupts are supported. Thus MCE offset must be set to 0.
> + */

thanks, applied.

	Ingo

Re: [patch 1/2] x86: apic: Export symbols for extended interrupt LVT functions

[Robert Richter]

Arjan,

do you see a way of how to get these EXPORT_SYMBOLs mainline? Better
use EXPORT_SYMBOL_GPL? Or is it common sense to add EXPORT_SYMBOLs to
mainline not until there are already use cases in the mainline?

At least the IBS symbol is needed for Perfmon but potentially also for
OProfile. This will allow the use of loadable Perfmon kernel modules,
especially if some lightwight Perfmon features are already upstream.

Also, APIC setup is more general and not Perfmon related. So I
think the Perfmon tree is not the right place to keep the code.

I don't know, if there is a use case for loadable MCE modules. We
could skip this, but as I said, code consistency...

Thanks,

-Robert

On 14.02.08 08:47:49, Arjan van de Ven wrote:
> > > > +EXPORT_SYMBOL(setup_APIC_eilvt_ibs);
> > > 
> > > which modules would even consider using any of these?
> > > Doesn't sound like something we should export..
> > 
> > For IBS it is Perfmon. See here:
> > http://git.kernel.org/?p=linux/kernel/git/eranian/linux-2.6.git;a=commit;h=7caef3e19d17349f869884f5adf7c9823e32ade7
> > 
> 
> perfmon doesn't seem to go anywhere lately, so realistically this chunk should be part of the perfmon tree.

[...]

> > MCE export has been added for consistency reasons to allow modules to
> > enable MCE.
> 
> no module does that right now, nor should it. MCE is really something the core kernel should do right?
> "consistency reasons" isn't "just export everything used or not", it's "oh this makes sense as part of a well
> thought out, generic consistent api". This one isn't./

[...]

-- 
Advanced Micro Devices, Inc.
Operating System Research Center
email: robert.richter@amd.com

Re: [patch 1/2] x86: apic: Export symbols for extended interrupt LVT functions

[Arjan van de Ven]

On Thu, 19 Jun 2008 19:00:56 +0200
Robert Richter <robert.richter@amd.com> wrote:

> Arjan,
> 
> do you see a way of how to get these EXPORT_SYMBOLs mainline? 

it's easy... submit the code that uses them.....


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