[PATCH 0/4] mx25: add support for FEC on i.MX25 PDK

[PATCH 0/4] mx25: add support for FEC on i.MX25 PDK

[Baruch Siach]

This patch series adds support for the FEC peripheral of the i.MX25 on the 
i.MX25 PDK board.

The first two patches are fixes for compilation and run failures. The third 
patch enables RMII if the FEC driver. Finally, the last patch adds the 
necessary board support code (pads, clock, etc.)

The FEC fix seems like an ugly hack to me. Suggestions for a better solution 
are welcome.

Baruch Siach (4):
  mx25: s/NO_PAD_CTL/NO_PAD_CTRL/
  mx25: don't force input on FEC pins
  fec: add support for Freescale i.MX25 PDK (3DS)
  mx25: add support for FEC on i.MX25 PDK

 arch/arm/mach-mx25/clock.c                  |    2 +
 arch/arm/mach-mx25/devices.c                |   19 ++++++++
 arch/arm/mach-mx25/devices.h                |    1 +
 arch/arm/mach-mx25/mx25pdk.c                |   40 ++++++++++++++++-
 arch/arm/plat-mxc/include/mach/iomux-mx25.h |   64 +++++++++++++-------------
 arch/arm/plat-mxc/include/mach/mx25.h       |    4 ++
 drivers/net/fec.c                           |   22 +++++++++
 drivers/net/fec.h                           |    2 +
 8 files changed, 121 insertions(+), 33 deletions(-)

[PATCH 0/4] mx25: add support for FEC on i.MX25 PDK

[Baruch Siach]

This patch series adds support for the FEC peripheral of the i.MX25 on the 
i.MX25 PDK board.

The first two patches are fixes for compilation and run failures. The third 
patch enables RMII if the FEC driver. Finally, the last patch adds the 
necessary board support code (pads, clock, etc.)

The FEC fix seems like an ugly hack to me. Suggestions for a better solution 
are welcome.

Baruch Siach (4):
  mx25: s/NO_PAD_CTL/NO_PAD_CTRL/
  mx25: don't force input on FEC pins
  fec: add support for Freescale i.MX25 PDK (3DS)
  mx25: add support for FEC on i.MX25 PDK

 arch/arm/mach-mx25/clock.c                  |    2 +
 arch/arm/mach-mx25/devices.c                |   19 ++++++++
 arch/arm/mach-mx25/devices.h                |    1 +
 arch/arm/mach-mx25/mx25pdk.c                |   40 ++++++++++++++++-
 arch/arm/plat-mxc/include/mach/iomux-mx25.h |   64 +++++++++++++-------------
 arch/arm/plat-mxc/include/mach/mx25.h       |    4 ++
 drivers/net/fec.c                           |   22 +++++++++
 drivers/net/fec.h                           |    2 +
 8 files changed, 121 insertions(+), 33 deletions(-)

[PATCH 1/4] mx25: s/NO_PAD_CTL/NO_PAD_CTRL/

[Baruch Siach]

NO_PAD_CTL is not defined anywhere.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
---
 arch/arm/plat-mxc/include/mach/iomux-mx25.h |   58 +++++++++++++-------------
 1 files changed, 29 insertions(+), 29 deletions(-)

diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx25.h b/arch/arm/plat-mxc/include/mach/iomux-mx25.h
index 810c47f..9af494f 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx25.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx25.h
@@ -58,19 +58,19 @@
 
 #define MX25_PAD_A18__A18		IOMUX_PAD(0x23c, 0x020, 0x10, 0, 0, NO_PAD_CTRL)
 #define MX25_PAD_A18__GPIO_2_4		IOMUX_PAD(0x23c, 0x020, 0x15, 0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A18__FEC_COL		IOMUX_PAD(0x23c, 0x020, 0x17, 0x504, 0, NO_PAD_CTL)
+#define MX25_PAD_A18__FEC_COL		IOMUX_PAD(0x23c, 0x020, 0x17, 0x504, 0, NO_PAD_CTRL)
 
 #define MX25_PAD_A19__A19		IOMUX_PAD(0x240, 0x024, 0x10, 0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A19__FEC_RX_ER		IOMUX_PAD(0x240, 0x024, 0x17, 0x518, 0, NO_PAD_CTL)
+#define MX25_PAD_A19__FEC_RX_ER		IOMUX_PAD(0x240, 0x024, 0x17, 0x518, 0, NO_PAD_CTRL)
 #define MX25_PAD_A19__GPIO_2_5		IOMUX_PAD(0x240, 0x024, 0x15, 0, 0, NO_PAD_CTRL)
 
 #define MX25_PAD_A20__A20		IOMUX_PAD(0x244, 0x028, 0x10, 0, 0, NO_PAD_CTRL)
 #define MX25_PAD_A20__GPIO_2_6		IOMUX_PAD(0x244, 0x028, 0x15, 0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A20__FEC_RDATA2	IOMUX_PAD(0x244, 0x028, 0x17, 0x50c, 0, NO_PAD_CTL)
+#define MX25_PAD_A20__FEC_RDATA2	IOMUX_PAD(0x244, 0x028, 0x17, 0x50c, 0, NO_PAD_CTRL)
 
 #define MX25_PAD_A21__A21		IOMUX_PAD(0x248, 0x02c, 0x10, 0, 0, NO_PAD_CTRL)
 #define MX25_PAD_A21__GPIO_2_7		IOMUX_PAD(0x248, 0x02c, 0x15, 0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A21__FEC_RDATA3	IOMUX_PAD(0x248, 0x02c, 0x17, 0x510, 0, NO_PAD_CTL)
+#define MX25_PAD_A21__FEC_RDATA3	IOMUX_PAD(0x248, 0x02c, 0x17, 0x510, 0, NO_PAD_CTRL)
 
 #define MX25_PAD_A22__A22		IOMUX_PAD(0x000, 0x030, 0x10, 0, 0, NO_PAD_CTRL)
 #define MX25_PAD_A22__GPIO_2_8		IOMUX_PAD(0x000, 0x030, 0x15, 0, 0, NO_PAD_CTRL)
@@ -80,11 +80,11 @@
 
 #define MX25_PAD_A24__A24		IOMUX_PAD(0x250, 0x038, 0x10, 0, 0, NO_PAD_CTRL)
 #define MX25_PAD_A24__GPIO_2_10		IOMUX_PAD(0x250, 0x038, 0x15, 0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A24__FEC_RX_CLK	IOMUX_PAD(0x250, 0x038, 0x17, 0x514, 0, NO_PAD_CTL)
+#define MX25_PAD_A24__FEC_RX_CLK	IOMUX_PAD(0x250, 0x038, 0x17, 0x514, 0, NO_PAD_CTRL)
 
 #define MX25_PAD_A25__A25		IOMUX_PAD(0x254, 0x03c, 0x10, 0, 0, NO_PAD_CTRL)
 #define MX25_PAD_A25__GPIO_2_11		IOMUX_PAD(0x254, 0x03c, 0x15, 0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A25__FEC_CRS		IOMUX_PAD(0x254, 0x03c, 0x17, 0x508, 0, NO_PAD_CTL)
+#define MX25_PAD_A25__FEC_CRS		IOMUX_PAD(0x254, 0x03c, 0x17, 0x508, 0, NO_PAD_CTRL)
 
 #define MX25_PAD_EB0__EB0		IOMUX_PAD(0x258, 0x040, 0x10, 0, 0, NO_PAD_CTRL)
 #define MX25_PAD_EB0__AUD4_TXD		IOMUX_PAD(0x258, 0x040, 0x14, 0x464, 0, NO_PAD_CTRL)
@@ -112,7 +112,7 @@
 #define MX25_PAD_CS5__UART5_RTS		IOMUX_PAD(0x268, 0x058, 0x13, 0x574, 0, NO_PAD_CTRL)
 #define MX25_PAD_CS5__GPIO_3_21		IOMUX_PAD(0x268, 0x058, 0x15, 0, 0, NO_PAD_CTRL)
 
-#define MX25_PAD_NF_CE0__NF_CE0		IOMUX_PAD(0x26c, 0x05c, 0x10, 0, 0, NO_PAD_CTL)
+#define MX25_PAD_NF_CE0__NF_CE0		IOMUX_PAD(0x26c, 0x05c, 0x10, 0, 0, NO_PAD_CTRL)
 #define MX25_PAD_NF_CE0__GPIO_3_22	IOMUX_PAD(0x26c, 0x05c, 0x15, 0, 0, NO_PAD_CTRL)
 
 #define MX25_PAD_ECB__ECB		IOMUX_PAD(0x270, 0x060, 0x10, 0, 0, NO_PAD_CTRL)
@@ -229,28 +229,28 @@
 #define MX25_PAD_LD7__GPIO_1_21		IOMUX_PAD(0x2dc, 0x0e4, 0x15, 0, 0, NO_PAD_CTRL)
 
 #define MX25_PAD_LD8__LD8		IOMUX_PAD(0x2e0, 0x0e8, 0x10, 0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD8__FEC_TX_ERR	IOMUX_PAD(0x2e0, 0x0e8, 0x15, 0, 0, NO_PAD_CTL)
+#define MX25_PAD_LD8__FEC_TX_ERR	IOMUX_PAD(0x2e0, 0x0e8, 0x15, 0, 0, NO_PAD_CTRL)
 
 #define MX25_PAD_LD9__LD9		IOMUX_PAD(0x2e4, 0x0ec, 0x10, 0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD9__FEC_COL		IOMUX_PAD(0x2e4, 0x0ec, 0x15, 0x504, 1, NO_PAD_CTL)
+#define MX25_PAD_LD9__FEC_COL		IOMUX_PAD(0x2e4, 0x0ec, 0x15, 0x504, 1, NO_PAD_CTRL)
 
 #define MX25_PAD_LD10__LD10		IOMUX_PAD(0x2e8, 0x0f0, 0x10, 0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD10__FEC_RX_ER	IOMUX_PAD(0x2e8, 0x0f0, 0x15, 0x518, 1, NO_PAD_CTL)
+#define MX25_PAD_LD10__FEC_RX_ER	IOMUX_PAD(0x2e8, 0x0f0, 0x15, 0x518, 1, NO_PAD_CTRL)
 
 #define MX25_PAD_LD11__LD11		IOMUX_PAD(0x2ec, 0x0f4, 0x10, 0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD11__FEC_RDATA2	IOMUX_PAD(0x2ec, 0x0f4, 0x15, 0x50c, 1, NO_PAD_CTL)
+#define MX25_PAD_LD11__FEC_RDATA2	IOMUX_PAD(0x2ec, 0x0f4, 0x15, 0x50c, 1, NO_PAD_CTRL)
 
 #define MX25_PAD_LD12__LD12		IOMUX_PAD(0x2f0, 0x0f8, 0x10, 0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD12__FEC_RDATA3	IOMUX_PAD(0x2f0, 0x0f8, 0x15, 0x510, 1, NO_PAD_CTL)
+#define MX25_PAD_LD12__FEC_RDATA3	IOMUX_PAD(0x2f0, 0x0f8, 0x15, 0x510, 1, NO_PAD_CTRL)
 
 #define MX25_PAD_LD13__LD13		IOMUX_PAD(0x2f4, 0x0fc, 0x10, 0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD13__FEC_TDATA2	IOMUX_PAD(0x2f4, 0x0fc, 0x15, 0, 0, NO_PAD_CTL)
+#define MX25_PAD_LD13__FEC_TDATA2	IOMUX_PAD(0x2f4, 0x0fc, 0x15, 0, 0, NO_PAD_CTRL)
 
 #define MX25_PAD_LD14__LD14		IOMUX_PAD(0x2f8, 0x100, 0x10, 0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD14__FEC_TDATA3	IOMUX_PAD(0x2f8, 0x100, 0x15, 0, 0, NO_PAD_CTL)
+#define MX25_PAD_LD14__FEC_TDATA3	IOMUX_PAD(0x2f8, 0x100, 0x15, 0, 0, NO_PAD_CTRL)
 
 #define MX25_PAD_LD15__LD15		IOMUX_PAD(0x2fc, 0x104, 0x10, 0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD15__FEC_RX_CLK	IOMUX_PAD(0x2fc, 0x104, 0x15, 0x514, 1, NO_PAD_CTL)
+#define MX25_PAD_LD15__FEC_RX_CLK	IOMUX_PAD(0x2fc, 0x104, 0x15, 0x514, 1, NO_PAD_CTRL)
 
 #define MX25_PAD_HSYNC__HSYNC		IOMUX_PAD(0x300, 0x108, 0x10, 0, 0, NO_PAD_CTRL)
 #define MX25_PAD_HSYNC__GPIO_1_22	IOMUX_PAD(0x300, 0x108, 0x15, 0, 0, NO_PAD_CTRL)
@@ -265,7 +265,7 @@
 #define MX25_PAD_OE_ACD__GPIO_1_25	IOMUX_PAD(0x30c, 0x114, 0x15, 0, 0, NO_PAD_CTRL)
 
 #define MX25_PAD_CONTRAST__CONTRAST	IOMUX_PAD(0x310, 0x118, 0x10, 0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CONTRAST__FEC_CRS	IOMUX_PAD(0x310, 0x118, 0x15, 0x508, 1, NO_PAD_CTL)
+#define MX25_PAD_CONTRAST__FEC_CRS	IOMUX_PAD(0x310, 0x118, 0x15, 0x508, 1, NO_PAD_CTRL)
 
 #define MX25_PAD_PWM__PWM		IOMUX_PAD(0x314, 0x11c, 0x10, 0, 0, NO_PAD_CTRL)
 #define MX25_PAD_PWM__GPIO_1_26		IOMUX_PAD(0x314, 0x11c, 0x15, 0, 0, NO_PAD_CTRL)
@@ -354,19 +354,19 @@
 #define MX25_PAD_UART2_TXD__GPIO_4_27	IOMUX_PAD(0x37c, 0x184, 0x15, 0, 0, NO_PAD_CTRL)
 
 #define MX25_PAD_UART2_RTS__UART2_RTS	IOMUX_PAD(0x380, 0x188, 0x10, 0, 0, NO_PAD_CTRL)
-#define MX25_PAD_UART2_RTS__FEC_COL	IOMUX_PAD(0x380, 0x188, 0x12, 0x504, 2, NO_PAD_CTL)
+#define MX25_PAD_UART2_RTS__FEC_COL	IOMUX_PAD(0x380, 0x188, 0x12, 0x504, 2, NO_PAD_CTRL)
 #define MX25_PAD_UART2_RTS__GPIO_4_28	IOMUX_PAD(0x380, 0x188, 0x15, 0, 0, NO_PAD_CTRL)
 
-#define MX25_PAD_UART2_CTS__FEC_RX_ER	IOMUX_PAD(0x384, 0x18c, 0x12, 0x518, 2, NO_PAD_CTL)
+#define MX25_PAD_UART2_CTS__FEC_RX_ER	IOMUX_PAD(0x384, 0x18c, 0x12, 0x518, 2, NO_PAD_CTRL)
 #define MX25_PAD_UART2_CTS__UART2_CTS	IOMUX_PAD(0x384, 0x18c, 0x10, 0, 0, NO_PAD_CTRL)
 #define MX25_PAD_UART2_CTS__GPIO_4_29	IOMUX_PAD(0x384, 0x18c, 0x15, 0, 0, NO_PAD_CTRL)
 
 #define MX25_PAD_SD1_CMD__SD1_CMD	IOMUX_PAD(0x388, 0x190, 0x10, 0, 0, PAD_CTL_PUS_47K_UP)
-#define MX25_PAD_SD1_CMD__FEC_RDATA2	IOMUX_PAD(0x388, 0x190, 0x12, 0x50c, 2, NO_PAD_CTL)
+#define MX25_PAD_SD1_CMD__FEC_RDATA2	IOMUX_PAD(0x388, 0x190, 0x12, 0x50c, 2, NO_PAD_CTRL)
 #define MX25_PAD_SD1_CMD__GPIO_2_23	IOMUX_PAD(0x388, 0x190, 0x15, 0, 0, NO_PAD_CTRL)
 
 #define MX25_PAD_SD1_CLK__SD1_CLK	IOMUX_PAD(0x38c, 0x194, 0x10, 0, 0, PAD_CTL_PUS_47K_UP)
-#define MX25_PAD_SD1_CLK__FEC_RDATA3	IOMUX_PAD(0x38c, 0x194, 0x12, 0x510, 2, NO_PAD_CTL)
+#define MX25_PAD_SD1_CLK__FEC_RDATA3	IOMUX_PAD(0x38c, 0x194, 0x12, 0x510, 2, NO_PAD_CTRL)
 #define MX25_PAD_SD1_CLK__GPIO_2_24	IOMUX_PAD(0x38c, 0x194, 0x15, 0, 0, NO_PAD_CTRL)
 
 #define MX25_PAD_SD1_DATA0__SD1_DATA0	IOMUX_PAD(0x390, 0x198, 0x10, 0, 0, PAD_CTL_PUS_47K_UP)
@@ -377,11 +377,11 @@
 #define MX25_PAD_SD1_DATA1__GPIO_2_26	IOMUX_PAD(0x394, 0x19c, 0x15, 0, 0, NO_PAD_CTRL)
 
 #define MX25_PAD_SD1_DATA2__SD1_DATA2	IOMUX_PAD(0x398, 0x1a0, 0x10, 0, 0, PAD_CTL_PUS_47K_UP)
-#define MX25_PAD_SD1_DATA2__FEC_RX_CLK	IOMUX_PAD(0x398, 0x1a0, 0x15, 0x514, 2, NO_PAD_CTL)
+#define MX25_PAD_SD1_DATA2__FEC_RX_CLK	IOMUX_PAD(0x398, 0x1a0, 0x15, 0x514, 2, NO_PAD_CTRL)
 #define MX25_PAD_SD1_DATA2__GPIO_2_27	IOMUX_PAD(0x398, 0x1a0, 0x15, 0, 0, NO_PAD_CTRL)
 
 #define MX25_PAD_SD1_DATA3__SD1_DATA3	IOMUX_PAD(0x39c, 0x1a4, 0x10, 0, 0, PAD_CTL_PUS_47K_UP)
-#define MX25_PAD_SD1_DATA3__FEC_CRS	IOMUX_PAD(0x39c, 0x1a4, 0x10, 0x508, 2, NO_PAD_CTL)
+#define MX25_PAD_SD1_DATA3__FEC_CRS	IOMUX_PAD(0x39c, 0x1a4, 0x10, 0x508, 2, NO_PAD_CTRL)
 #define MX25_PAD_SD1_DATA3__GPIO_2_28	IOMUX_PAD(0x39c, 0x1a4, 0x15, 0, 0, NO_PAD_CTRL)
 
 #define MX25_PAD_KPP_ROW0__KPP_ROW0	IOMUX_PAD(0x3a0, 0x1a8, 0x10, 0, 0, PAD_CTL_PKE)
@@ -410,7 +410,7 @@
 #define MX25_PAD_KPP_COL3__KPP_COL3	IOMUX_PAD(0x3bc, 0x1c4, 0x10, 0, 0, PAD_CTL_PKE | PAD_CTL_ODE)
 #define MX25_PAD_KPP_COL3__GPIO_3_4	IOMUX_PAD(0x3bc, 0x1c4, 0x15, 0, 0, NO_PAD_CTRL)
 
-#define MX25_PAD_FEC_MDC__FEC_MDC	IOMUX_PAD(0x3c0, 0x1c8, 0x10, 0, 0, NO_PAD_CTL)
+#define MX25_PAD_FEC_MDC__FEC_MDC	IOMUX_PAD(0x3c0, 0x1c8, 0x10, 0, 0, NO_PAD_CTRL)
 #define MX25_PAD_FEC_MDC__AUD4_TXD	IOMUX_PAD(0x3c0, 0x1c8, 0x12, 0x464, 1, NO_PAD_CTRL)
 #define MX25_PAD_FEC_MDC__GPIO_3_5	IOMUX_PAD(0x3c0, 0x1c8, 0x15, 0, 0, NO_PAD_CTRL)
 
@@ -418,23 +418,23 @@
 #define MX25_PAD_FEC_MDIO__AUD4_RXD	IOMUX_PAD(0x3c4, 0x1cc, 0x12, 0x460, 1, NO_PAD_CTRL)
 #define MX25_PAD_FEC_MDIO__GPIO_3_6	IOMUX_PAD(0x3c4, 0x1cc, 0x15, 0, 0, NO_PAD_CTRL)
 
-#define MX25_PAD_FEC_TDATA0__FEC_TDATA0	IOMUX_PAD(0x3c8, 0x1d0, 0x10, 0, 0, NO_PAD_CTL)
+#define MX25_PAD_FEC_TDATA0__FEC_TDATA0	IOMUX_PAD(0x3c8, 0x1d0, 0x10, 0, 0, NO_PAD_CTRL)
 #define MX25_PAD_FEC_TDATA0__GPIO_3_7	IOMUX_PAD(0x3c8, 0x1d0, 0x15, 0, 0, NO_PAD_CTRL)
 
-#define MX25_PAD_FEC_TDATA1__FEC_TDATA1	IOMUX_PAD(0x3cc, 0x1d4, 0x10, 0, 0, NO_PAD_CTL)
+#define MX25_PAD_FEC_TDATA1__FEC_TDATA1	IOMUX_PAD(0x3cc, 0x1d4, 0x10, 0, 0, NO_PAD_CTRL)
 #define MX25_PAD_FEC_TDATA1__AUD4_TXFS	IOMUX_PAD(0x3cc, 0x1d4, 0x12, 0x474, 1, NO_PAD_CTRL)
 #define MX25_PAD_FEC_TDATA1__GPIO_3_8	IOMUX_PAD(0x3cc, 0x1d4, 0x15, 0, 0, NO_PAD_CTRL)
 
-#define MX25_PAD_FEC_TX_EN__FEC_TX_EN	IOMUX_PAD(0x3d0, 0x1d8, 0x10, 0, 0, NO_PAD_CTL)
+#define MX25_PAD_FEC_TX_EN__FEC_TX_EN	IOMUX_PAD(0x3d0, 0x1d8, 0x10, 0, 0, NO_PAD_CTRL)
 #define MX25_PAD_FEC_TX_EN__GPIO_3_9   	IOMUX_PAD(0x3d0, 0x1d8, 0x15, 0, 0, NO_PAD_CTRL)
 
-#define MX25_PAD_FEC_RDATA0__FEC_RDATA0	IOMUX_PAD(0x3d4, 0x1dc, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTL)
+#define MX25_PAD_FEC_RDATA0__FEC_RDATA0	IOMUX_PAD(0x3d4, 0x1dc, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTRL)
 #define MX25_PAD_FEC_RDATA0__GPIO_3_10	IOMUX_PAD(0x3d4, 0x1dc, 0x15, 0, 0, NO_PAD_CTRL)
 
-#define MX25_PAD_FEC_RDATA1__FEC_RDATA1	IOMUX_PAD(0x3d8, 0x1e0, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTL)
+#define MX25_PAD_FEC_RDATA1__FEC_RDATA1	IOMUX_PAD(0x3d8, 0x1e0, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTRL)
 #define MX25_PAD_FEC_RDATA1__GPIO_3_11	IOMUX_PAD(0x3d8, 0x1e0, 0x15, 0, 0, NO_PAD_CTRL)
 
-#define MX25_PAD_FEC_RX_DV__FEC_RX_DV	IOMUX_PAD(0x3dc, 0x1e4, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTL)
+#define MX25_PAD_FEC_RX_DV__FEC_RX_DV	IOMUX_PAD(0x3dc, 0x1e4, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTRL)
 #define MX25_PAD_FEC_RX_DV__CAN2_RX	IOMUX_PAD(0x3dc, 0x1e4, 0x14, 0x484, 0, PAD_CTL_PUS_22K_UP)
 #define MX25_PAD_FEC_RX_DV__GPIO_3_12	IOMUX_PAD(0x3dc, 0x1e4, 0x15, 0, 0, NO_PAD_CTRL)
 
-- 
1.6.5

[PATCH 1/4] mx25: s/NO_PAD_CTL/NO_PAD_CTRL/

[Baruch Siach]

NO_PAD_CTL is not defined anywhere.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
---
 arch/arm/plat-mxc/include/mach/iomux-mx25.h |   58 +++++++++++++-------------
 1 files changed, 29 insertions(+), 29 deletions(-)

diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx25.h b/arch/arm/plat-mxc/include/mach/iomux-mx25.h
index 810c47f..9af494f 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx25.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx25.h
@@ -58,19 +58,19 @@
 
 #define MX25_PAD_A18__A18		IOMUX_PAD(0x23c, 0x020, 0x10, 0, 0, NO_PAD_CTRL)
 #define MX25_PAD_A18__GPIO_2_4		IOMUX_PAD(0x23c, 0x020, 0x15, 0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A18__FEC_COL		IOMUX_PAD(0x23c, 0x020, 0x17, 0x504, 0, NO_PAD_CTL)
+#define MX25_PAD_A18__FEC_COL		IOMUX_PAD(0x23c, 0x020, 0x17, 0x504, 0, NO_PAD_CTRL)
 
 #define MX25_PAD_A19__A19		IOMUX_PAD(0x240, 0x024, 0x10, 0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A19__FEC_RX_ER		IOMUX_PAD(0x240, 0x024, 0x17, 0x518, 0, NO_PAD_CTL)
+#define MX25_PAD_A19__FEC_RX_ER		IOMUX_PAD(0x240, 0x024, 0x17, 0x518, 0, NO_PAD_CTRL)
 #define MX25_PAD_A19__GPIO_2_5		IOMUX_PAD(0x240, 0x024, 0x15, 0, 0, NO_PAD_CTRL)
 
 #define MX25_PAD_A20__A20		IOMUX_PAD(0x244, 0x028, 0x10, 0, 0, NO_PAD_CTRL)
 #define MX25_PAD_A20__GPIO_2_6		IOMUX_PAD(0x244, 0x028, 0x15, 0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A20__FEC_RDATA2	IOMUX_PAD(0x244, 0x028, 0x17, 0x50c, 0, NO_PAD_CTL)
+#define MX25_PAD_A20__FEC_RDATA2	IOMUX_PAD(0x244, 0x028, 0x17, 0x50c, 0, NO_PAD_CTRL)
 
 #define MX25_PAD_A21__A21		IOMUX_PAD(0x248, 0x02c, 0x10, 0, 0, NO_PAD_CTRL)
 #define MX25_PAD_A21__GPIO_2_7		IOMUX_PAD(0x248, 0x02c, 0x15, 0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A21__FEC_RDATA3	IOMUX_PAD(0x248, 0x02c, 0x17, 0x510, 0, NO_PAD_CTL)
+#define MX25_PAD_A21__FEC_RDATA3	IOMUX_PAD(0x248, 0x02c, 0x17, 0x510, 0, NO_PAD_CTRL)
 
 #define MX25_PAD_A22__A22		IOMUX_PAD(0x000, 0x030, 0x10, 0, 0, NO_PAD_CTRL)
 #define MX25_PAD_A22__GPIO_2_8		IOMUX_PAD(0x000, 0x030, 0x15, 0, 0, NO_PAD_CTRL)
@@ -80,11 +80,11 @@
 
 #define MX25_PAD_A24__A24		IOMUX_PAD(0x250, 0x038, 0x10, 0, 0, NO_PAD_CTRL)
 #define MX25_PAD_A24__GPIO_2_10		IOMUX_PAD(0x250, 0x038, 0x15, 0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A24__FEC_RX_CLK	IOMUX_PAD(0x250, 0x038, 0x17, 0x514, 0, NO_PAD_CTL)
+#define MX25_PAD_A24__FEC_RX_CLK	IOMUX_PAD(0x250, 0x038, 0x17, 0x514, 0, NO_PAD_CTRL)
 
 #define MX25_PAD_A25__A25		IOMUX_PAD(0x254, 0x03c, 0x10, 0, 0, NO_PAD_CTRL)
 #define MX25_PAD_A25__GPIO_2_11		IOMUX_PAD(0x254, 0x03c, 0x15, 0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A25__FEC_CRS		IOMUX_PAD(0x254, 0x03c, 0x17, 0x508, 0, NO_PAD_CTL)
+#define MX25_PAD_A25__FEC_CRS		IOMUX_PAD(0x254, 0x03c, 0x17, 0x508, 0, NO_PAD_CTRL)
 
 #define MX25_PAD_EB0__EB0		IOMUX_PAD(0x258, 0x040, 0x10, 0, 0, NO_PAD_CTRL)
 #define MX25_PAD_EB0__AUD4_TXD		IOMUX_PAD(0x258, 0x040, 0x14, 0x464, 0, NO_PAD_CTRL)
@@ -112,7 +112,7 @@
 #define MX25_PAD_CS5__UART5_RTS		IOMUX_PAD(0x268, 0x058, 0x13, 0x574, 0, NO_PAD_CTRL)
 #define MX25_PAD_CS5__GPIO_3_21		IOMUX_PAD(0x268, 0x058, 0x15, 0, 0, NO_PAD_CTRL)
 
-#define MX25_PAD_NF_CE0__NF_CE0		IOMUX_PAD(0x26c, 0x05c, 0x10, 0, 0, NO_PAD_CTL)
+#define MX25_PAD_NF_CE0__NF_CE0		IOMUX_PAD(0x26c, 0x05c, 0x10, 0, 0, NO_PAD_CTRL)
 #define MX25_PAD_NF_CE0__GPIO_3_22	IOMUX_PAD(0x26c, 0x05c, 0x15, 0, 0, NO_PAD_CTRL)
 
 #define MX25_PAD_ECB__ECB		IOMUX_PAD(0x270, 0x060, 0x10, 0, 0, NO_PAD_CTRL)
@@ -229,28 +229,28 @@
 #define MX25_PAD_LD7__GPIO_1_21		IOMUX_PAD(0x2dc, 0x0e4, 0x15, 0, 0, NO_PAD_CTRL)
 
 #define MX25_PAD_LD8__LD8		IOMUX_PAD(0x2e0, 0x0e8, 0x10, 0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD8__FEC_TX_ERR	IOMUX_PAD(0x2e0, 0x0e8, 0x15, 0, 0, NO_PAD_CTL)
+#define MX25_PAD_LD8__FEC_TX_ERR	IOMUX_PAD(0x2e0, 0x0e8, 0x15, 0, 0, NO_PAD_CTRL)
 
 #define MX25_PAD_LD9__LD9		IOMUX_PAD(0x2e4, 0x0ec, 0x10, 0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD9__FEC_COL		IOMUX_PAD(0x2e4, 0x0ec, 0x15, 0x504, 1, NO_PAD_CTL)
+#define MX25_PAD_LD9__FEC_COL		IOMUX_PAD(0x2e4, 0x0ec, 0x15, 0x504, 1, NO_PAD_CTRL)
 
 #define MX25_PAD_LD10__LD10		IOMUX_PAD(0x2e8, 0x0f0, 0x10, 0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD10__FEC_RX_ER	IOMUX_PAD(0x2e8, 0x0f0, 0x15, 0x518, 1, NO_PAD_CTL)
+#define MX25_PAD_LD10__FEC_RX_ER	IOMUX_PAD(0x2e8, 0x0f0, 0x15, 0x518, 1, NO_PAD_CTRL)
 
 #define MX25_PAD_LD11__LD11		IOMUX_PAD(0x2ec, 0x0f4, 0x10, 0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD11__FEC_RDATA2	IOMUX_PAD(0x2ec, 0x0f4, 0x15, 0x50c, 1, NO_PAD_CTL)
+#define MX25_PAD_LD11__FEC_RDATA2	IOMUX_PAD(0x2ec, 0x0f4, 0x15, 0x50c, 1, NO_PAD_CTRL)
 
 #define MX25_PAD_LD12__LD12		IOMUX_PAD(0x2f0, 0x0f8, 0x10, 0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD12__FEC_RDATA3	IOMUX_PAD(0x2f0, 0x0f8, 0x15, 0x510, 1, NO_PAD_CTL)
+#define MX25_PAD_LD12__FEC_RDATA3	IOMUX_PAD(0x2f0, 0x0f8, 0x15, 0x510, 1, NO_PAD_CTRL)
 
 #define MX25_PAD_LD13__LD13		IOMUX_PAD(0x2f4, 0x0fc, 0x10, 0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD13__FEC_TDATA2	IOMUX_PAD(0x2f4, 0x0fc, 0x15, 0, 0, NO_PAD_CTL)
+#define MX25_PAD_LD13__FEC_TDATA2	IOMUX_PAD(0x2f4, 0x0fc, 0x15, 0, 0, NO_PAD_CTRL)
 
 #define MX25_PAD_LD14__LD14		IOMUX_PAD(0x2f8, 0x100, 0x10, 0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD14__FEC_TDATA3	IOMUX_PAD(0x2f8, 0x100, 0x15, 0, 0, NO_PAD_CTL)
+#define MX25_PAD_LD14__FEC_TDATA3	IOMUX_PAD(0x2f8, 0x100, 0x15, 0, 0, NO_PAD_CTRL)
 
 #define MX25_PAD_LD15__LD15		IOMUX_PAD(0x2fc, 0x104, 0x10, 0, 0, NO_PAD_CTRL)
-#define MX25_PAD_LD15__FEC_RX_CLK	IOMUX_PAD(0x2fc, 0x104, 0x15, 0x514, 1, NO_PAD_CTL)
+#define MX25_PAD_LD15__FEC_RX_CLK	IOMUX_PAD(0x2fc, 0x104, 0x15, 0x514, 1, NO_PAD_CTRL)
 
 #define MX25_PAD_HSYNC__HSYNC		IOMUX_PAD(0x300, 0x108, 0x10, 0, 0, NO_PAD_CTRL)
 #define MX25_PAD_HSYNC__GPIO_1_22	IOMUX_PAD(0x300, 0x108, 0x15, 0, 0, NO_PAD_CTRL)
@@ -265,7 +265,7 @@
 #define MX25_PAD_OE_ACD__GPIO_1_25	IOMUX_PAD(0x30c, 0x114, 0x15, 0, 0, NO_PAD_CTRL)
 
 #define MX25_PAD_CONTRAST__CONTRAST	IOMUX_PAD(0x310, 0x118, 0x10, 0, 0, NO_PAD_CTRL)
-#define MX25_PAD_CONTRAST__FEC_CRS	IOMUX_PAD(0x310, 0x118, 0x15, 0x508, 1, NO_PAD_CTL)
+#define MX25_PAD_CONTRAST__FEC_CRS	IOMUX_PAD(0x310, 0x118, 0x15, 0x508, 1, NO_PAD_CTRL)
 
 #define MX25_PAD_PWM__PWM		IOMUX_PAD(0x314, 0x11c, 0x10, 0, 0, NO_PAD_CTRL)
 #define MX25_PAD_PWM__GPIO_1_26		IOMUX_PAD(0x314, 0x11c, 0x15, 0, 0, NO_PAD_CTRL)
@@ -354,19 +354,19 @@
 #define MX25_PAD_UART2_TXD__GPIO_4_27	IOMUX_PAD(0x37c, 0x184, 0x15, 0, 0, NO_PAD_CTRL)
 
 #define MX25_PAD_UART2_RTS__UART2_RTS	IOMUX_PAD(0x380, 0x188, 0x10, 0, 0, NO_PAD_CTRL)
-#define MX25_PAD_UART2_RTS__FEC_COL	IOMUX_PAD(0x380, 0x188, 0x12, 0x504, 2, NO_PAD_CTL)
+#define MX25_PAD_UART2_RTS__FEC_COL	IOMUX_PAD(0x380, 0x188, 0x12, 0x504, 2, NO_PAD_CTRL)
 #define MX25_PAD_UART2_RTS__GPIO_4_28	IOMUX_PAD(0x380, 0x188, 0x15, 0, 0, NO_PAD_CTRL)
 
-#define MX25_PAD_UART2_CTS__FEC_RX_ER	IOMUX_PAD(0x384, 0x18c, 0x12, 0x518, 2, NO_PAD_CTL)
+#define MX25_PAD_UART2_CTS__FEC_RX_ER	IOMUX_PAD(0x384, 0x18c, 0x12, 0x518, 2, NO_PAD_CTRL)
 #define MX25_PAD_UART2_CTS__UART2_CTS	IOMUX_PAD(0x384, 0x18c, 0x10, 0, 0, NO_PAD_CTRL)
 #define MX25_PAD_UART2_CTS__GPIO_4_29	IOMUX_PAD(0x384, 0x18c, 0x15, 0, 0, NO_PAD_CTRL)
 
 #define MX25_PAD_SD1_CMD__SD1_CMD	IOMUX_PAD(0x388, 0x190, 0x10, 0, 0, PAD_CTL_PUS_47K_UP)
-#define MX25_PAD_SD1_CMD__FEC_RDATA2	IOMUX_PAD(0x388, 0x190, 0x12, 0x50c, 2, NO_PAD_CTL)
+#define MX25_PAD_SD1_CMD__FEC_RDATA2	IOMUX_PAD(0x388, 0x190, 0x12, 0x50c, 2, NO_PAD_CTRL)
 #define MX25_PAD_SD1_CMD__GPIO_2_23	IOMUX_PAD(0x388, 0x190, 0x15, 0, 0, NO_PAD_CTRL)
 
 #define MX25_PAD_SD1_CLK__SD1_CLK	IOMUX_PAD(0x38c, 0x194, 0x10, 0, 0, PAD_CTL_PUS_47K_UP)
-#define MX25_PAD_SD1_CLK__FEC_RDATA3	IOMUX_PAD(0x38c, 0x194, 0x12, 0x510, 2, NO_PAD_CTL)
+#define MX25_PAD_SD1_CLK__FEC_RDATA3	IOMUX_PAD(0x38c, 0x194, 0x12, 0x510, 2, NO_PAD_CTRL)
 #define MX25_PAD_SD1_CLK__GPIO_2_24	IOMUX_PAD(0x38c, 0x194, 0x15, 0, 0, NO_PAD_CTRL)
 
 #define MX25_PAD_SD1_DATA0__SD1_DATA0	IOMUX_PAD(0x390, 0x198, 0x10, 0, 0, PAD_CTL_PUS_47K_UP)
@@ -377,11 +377,11 @@
 #define MX25_PAD_SD1_DATA1__GPIO_2_26	IOMUX_PAD(0x394, 0x19c, 0x15, 0, 0, NO_PAD_CTRL)
 
 #define MX25_PAD_SD1_DATA2__SD1_DATA2	IOMUX_PAD(0x398, 0x1a0, 0x10, 0, 0, PAD_CTL_PUS_47K_UP)
-#define MX25_PAD_SD1_DATA2__FEC_RX_CLK	IOMUX_PAD(0x398, 0x1a0, 0x15, 0x514, 2, NO_PAD_CTL)
+#define MX25_PAD_SD1_DATA2__FEC_RX_CLK	IOMUX_PAD(0x398, 0x1a0, 0x15, 0x514, 2, NO_PAD_CTRL)
 #define MX25_PAD_SD1_DATA2__GPIO_2_27	IOMUX_PAD(0x398, 0x1a0, 0x15, 0, 0, NO_PAD_CTRL)
 
 #define MX25_PAD_SD1_DATA3__SD1_DATA3	IOMUX_PAD(0x39c, 0x1a4, 0x10, 0, 0, PAD_CTL_PUS_47K_UP)
-#define MX25_PAD_SD1_DATA3__FEC_CRS	IOMUX_PAD(0x39c, 0x1a4, 0x10, 0x508, 2, NO_PAD_CTL)
+#define MX25_PAD_SD1_DATA3__FEC_CRS	IOMUX_PAD(0x39c, 0x1a4, 0x10, 0x508, 2, NO_PAD_CTRL)
 #define MX25_PAD_SD1_DATA3__GPIO_2_28	IOMUX_PAD(0x39c, 0x1a4, 0x15, 0, 0, NO_PAD_CTRL)
 
 #define MX25_PAD_KPP_ROW0__KPP_ROW0	IOMUX_PAD(0x3a0, 0x1a8, 0x10, 0, 0, PAD_CTL_PKE)
@@ -410,7 +410,7 @@
 #define MX25_PAD_KPP_COL3__KPP_COL3	IOMUX_PAD(0x3bc, 0x1c4, 0x10, 0, 0, PAD_CTL_PKE | PAD_CTL_ODE)
 #define MX25_PAD_KPP_COL3__GPIO_3_4	IOMUX_PAD(0x3bc, 0x1c4, 0x15, 0, 0, NO_PAD_CTRL)
 
-#define MX25_PAD_FEC_MDC__FEC_MDC	IOMUX_PAD(0x3c0, 0x1c8, 0x10, 0, 0, NO_PAD_CTL)
+#define MX25_PAD_FEC_MDC__FEC_MDC	IOMUX_PAD(0x3c0, 0x1c8, 0x10, 0, 0, NO_PAD_CTRL)
 #define MX25_PAD_FEC_MDC__AUD4_TXD	IOMUX_PAD(0x3c0, 0x1c8, 0x12, 0x464, 1, NO_PAD_CTRL)
 #define MX25_PAD_FEC_MDC__GPIO_3_5	IOMUX_PAD(0x3c0, 0x1c8, 0x15, 0, 0, NO_PAD_CTRL)
 
@@ -418,23 +418,23 @@
 #define MX25_PAD_FEC_MDIO__AUD4_RXD	IOMUX_PAD(0x3c4, 0x1cc, 0x12, 0x460, 1, NO_PAD_CTRL)
 #define MX25_PAD_FEC_MDIO__GPIO_3_6	IOMUX_PAD(0x3c4, 0x1cc, 0x15, 0, 0, NO_PAD_CTRL)
 
-#define MX25_PAD_FEC_TDATA0__FEC_TDATA0	IOMUX_PAD(0x3c8, 0x1d0, 0x10, 0, 0, NO_PAD_CTL)
+#define MX25_PAD_FEC_TDATA0__FEC_TDATA0	IOMUX_PAD(0x3c8, 0x1d0, 0x10, 0, 0, NO_PAD_CTRL)
 #define MX25_PAD_FEC_TDATA0__GPIO_3_7	IOMUX_PAD(0x3c8, 0x1d0, 0x15, 0, 0, NO_PAD_CTRL)
 
-#define MX25_PAD_FEC_TDATA1__FEC_TDATA1	IOMUX_PAD(0x3cc, 0x1d4, 0x10, 0, 0, NO_PAD_CTL)
+#define MX25_PAD_FEC_TDATA1__FEC_TDATA1	IOMUX_PAD(0x3cc, 0x1d4, 0x10, 0, 0, NO_PAD_CTRL)
 #define MX25_PAD_FEC_TDATA1__AUD4_TXFS	IOMUX_PAD(0x3cc, 0x1d4, 0x12, 0x474, 1, NO_PAD_CTRL)
 #define MX25_PAD_FEC_TDATA1__GPIO_3_8	IOMUX_PAD(0x3cc, 0x1d4, 0x15, 0, 0, NO_PAD_CTRL)
 
-#define MX25_PAD_FEC_TX_EN__FEC_TX_EN	IOMUX_PAD(0x3d0, 0x1d8, 0x10, 0, 0, NO_PAD_CTL)
+#define MX25_PAD_FEC_TX_EN__FEC_TX_EN	IOMUX_PAD(0x3d0, 0x1d8, 0x10, 0, 0, NO_PAD_CTRL)
 #define MX25_PAD_FEC_TX_EN__GPIO_3_9   	IOMUX_PAD(0x3d0, 0x1d8, 0x15, 0, 0, NO_PAD_CTRL)
 
-#define MX25_PAD_FEC_RDATA0__FEC_RDATA0	IOMUX_PAD(0x3d4, 0x1dc, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTL)
+#define MX25_PAD_FEC_RDATA0__FEC_RDATA0	IOMUX_PAD(0x3d4, 0x1dc, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTRL)
 #define MX25_PAD_FEC_RDATA0__GPIO_3_10	IOMUX_PAD(0x3d4, 0x1dc, 0x15, 0, 0, NO_PAD_CTRL)
 
-#define MX25_PAD_FEC_RDATA1__FEC_RDATA1	IOMUX_PAD(0x3d8, 0x1e0, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTL)
+#define MX25_PAD_FEC_RDATA1__FEC_RDATA1	IOMUX_PAD(0x3d8, 0x1e0, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTRL)
 #define MX25_PAD_FEC_RDATA1__GPIO_3_11	IOMUX_PAD(0x3d8, 0x1e0, 0x15, 0, 0, NO_PAD_CTRL)
 
-#define MX25_PAD_FEC_RX_DV__FEC_RX_DV	IOMUX_PAD(0x3dc, 0x1e4, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTL)
+#define MX25_PAD_FEC_RX_DV__FEC_RX_DV	IOMUX_PAD(0x3dc, 0x1e4, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTRL)
 #define MX25_PAD_FEC_RX_DV__CAN2_RX	IOMUX_PAD(0x3dc, 0x1e4, 0x14, 0x484, 0, PAD_CTL_PUS_22K_UP)
 #define MX25_PAD_FEC_RX_DV__GPIO_3_12	IOMUX_PAD(0x3dc, 0x1e4, 0x15, 0, 0, NO_PAD_CTRL)
 
-- 
1.6.5

[PATCH 2/4] mx25: don't force input on FEC pins

[Baruch Siach]

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
---
 arch/arm/plat-mxc/include/mach/iomux-mx25.h |   20 ++++++++++----------
 1 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx25.h b/arch/arm/plat-mxc/include/mach/iomux-mx25.h
index 9af494f..d7c0dea 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx25.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx25.h
@@ -54,7 +54,7 @@
 #define MX25_PAD_A16__GPIO_2_2		IOMUX_PAD(0x000, 0x018, 0x15, 0, 0, NO_PAD_CTRL)
 
 #define MX25_PAD_A17__A17		IOMUX_PAD(0x238, 0x01c, 0x10, 0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A17__GPIO_2_3		IOMUX_PAD(0x238, 0x01c, 0x15, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_A17__GPIO_2_3		IOMUX_PAD(0x238, 0x01c, 0x05, 0, 0, NO_PAD_CTRL)
 
 #define MX25_PAD_A18__A18		IOMUX_PAD(0x23c, 0x020, 0x10, 0, 0, NO_PAD_CTRL)
 #define MX25_PAD_A18__GPIO_2_4		IOMUX_PAD(0x23c, 0x020, 0x15, 0, 0, NO_PAD_CTRL)
@@ -410,35 +410,35 @@
 #define MX25_PAD_KPP_COL3__KPP_COL3	IOMUX_PAD(0x3bc, 0x1c4, 0x10, 0, 0, PAD_CTL_PKE | PAD_CTL_ODE)
 #define MX25_PAD_KPP_COL3__GPIO_3_4	IOMUX_PAD(0x3bc, 0x1c4, 0x15, 0, 0, NO_PAD_CTRL)
 
-#define MX25_PAD_FEC_MDC__FEC_MDC	IOMUX_PAD(0x3c0, 0x1c8, 0x10, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_FEC_MDC__FEC_MDC	IOMUX_PAD(0x3c0, 0x1c8, 0x00, 0, 0, NO_PAD_CTRL)
 #define MX25_PAD_FEC_MDC__AUD4_TXD	IOMUX_PAD(0x3c0, 0x1c8, 0x12, 0x464, 1, NO_PAD_CTRL)
 #define MX25_PAD_FEC_MDC__GPIO_3_5	IOMUX_PAD(0x3c0, 0x1c8, 0x15, 0, 0, NO_PAD_CTRL)
 
-#define MX25_PAD_FEC_MDIO__FEC_MDIO	IOMUX_PAD(0x3c4, 0x1cc, 0x10, 0, 0, PAD_CTL_HYS | PAD_CTL_PUS_22K_UP)
+#define MX25_PAD_FEC_MDIO__FEC_MDIO	IOMUX_PAD(0x3c4, 0x1cc, 0x00, 0, 0, PAD_CTL_HYS | PAD_CTL_PUS_22K_UP)
 #define MX25_PAD_FEC_MDIO__AUD4_RXD	IOMUX_PAD(0x3c4, 0x1cc, 0x12, 0x460, 1, NO_PAD_CTRL)
 #define MX25_PAD_FEC_MDIO__GPIO_3_6	IOMUX_PAD(0x3c4, 0x1cc, 0x15, 0, 0, NO_PAD_CTRL)
 
-#define MX25_PAD_FEC_TDATA0__FEC_TDATA0	IOMUX_PAD(0x3c8, 0x1d0, 0x10, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_FEC_TDATA0__FEC_TDATA0	IOMUX_PAD(0x3c8, 0x1d0, 0x00, 0, 0, NO_PAD_CTRL)
 #define MX25_PAD_FEC_TDATA0__GPIO_3_7	IOMUX_PAD(0x3c8, 0x1d0, 0x15, 0, 0, NO_PAD_CTRL)
 
-#define MX25_PAD_FEC_TDATA1__FEC_TDATA1	IOMUX_PAD(0x3cc, 0x1d4, 0x10, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_FEC_TDATA1__FEC_TDATA1	IOMUX_PAD(0x3cc, 0x1d4, 0x00, 0, 0, NO_PAD_CTRL)
 #define MX25_PAD_FEC_TDATA1__AUD4_TXFS	IOMUX_PAD(0x3cc, 0x1d4, 0x12, 0x474, 1, NO_PAD_CTRL)
 #define MX25_PAD_FEC_TDATA1__GPIO_3_8	IOMUX_PAD(0x3cc, 0x1d4, 0x15, 0, 0, NO_PAD_CTRL)
 
-#define MX25_PAD_FEC_TX_EN__FEC_TX_EN	IOMUX_PAD(0x3d0, 0x1d8, 0x10, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_FEC_TX_EN__FEC_TX_EN	IOMUX_PAD(0x3d0, 0x1d8, 0x00, 0, 0, NO_PAD_CTRL)
 #define MX25_PAD_FEC_TX_EN__GPIO_3_9   	IOMUX_PAD(0x3d0, 0x1d8, 0x15, 0, 0, NO_PAD_CTRL)
 
-#define MX25_PAD_FEC_RDATA0__FEC_RDATA0	IOMUX_PAD(0x3d4, 0x1dc, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTRL)
+#define MX25_PAD_FEC_RDATA0__FEC_RDATA0	IOMUX_PAD(0x3d4, 0x1dc, 0x00, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTRL)
 #define MX25_PAD_FEC_RDATA0__GPIO_3_10	IOMUX_PAD(0x3d4, 0x1dc, 0x15, 0, 0, NO_PAD_CTRL)
 
-#define MX25_PAD_FEC_RDATA1__FEC_RDATA1	IOMUX_PAD(0x3d8, 0x1e0, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTRL)
+#define MX25_PAD_FEC_RDATA1__FEC_RDATA1	IOMUX_PAD(0x3d8, 0x1e0, 0x00, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTRL)
 #define MX25_PAD_FEC_RDATA1__GPIO_3_11	IOMUX_PAD(0x3d8, 0x1e0, 0x15, 0, 0, NO_PAD_CTRL)
 
-#define MX25_PAD_FEC_RX_DV__FEC_RX_DV	IOMUX_PAD(0x3dc, 0x1e4, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTRL)
+#define MX25_PAD_FEC_RX_DV__FEC_RX_DV	IOMUX_PAD(0x3dc, 0x1e4, 0x00, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTRL)
 #define MX25_PAD_FEC_RX_DV__CAN2_RX	IOMUX_PAD(0x3dc, 0x1e4, 0x14, 0x484, 0, PAD_CTL_PUS_22K_UP)
 #define MX25_PAD_FEC_RX_DV__GPIO_3_12	IOMUX_PAD(0x3dc, 0x1e4, 0x15, 0, 0, NO_PAD_CTRL)
 
-#define MX25_PAD_FEC_TX_CLK__FEC_TX_CLK	IOMUX_PAD(0x3e0, 0x1e8, 0x10, 0, 0, PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN)
+#define MX25_PAD_FEC_TX_CLK__FEC_TX_CLK	IOMUX_PAD(0x3e0, 0x1e8, 0x00, 0, 0, PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN)
 #define MX25_PAD_FEC_TX_CLK__GPIO_3_13	IOMUX_PAD(0x3e0, 0x1e8, 0x15, 0, 0, NO_PAD_CTRL)
 
 #define MX25_PAD_RTCK__RTCK		IOMUX_PAD(0x3e4, 0x1ec, 0x10, 0, 0, NO_PAD_CTRL)
-- 
1.6.5

[PATCH 2/4] mx25: don't force input on FEC pins

[Baruch Siach]

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
---
 arch/arm/plat-mxc/include/mach/iomux-mx25.h |   20 ++++++++++----------
 1 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx25.h b/arch/arm/plat-mxc/include/mach/iomux-mx25.h
index 9af494f..d7c0dea 100644
--- a/arch/arm/plat-mxc/include/mach/iomux-mx25.h
+++ b/arch/arm/plat-mxc/include/mach/iomux-mx25.h
@@ -54,7 +54,7 @@
 #define MX25_PAD_A16__GPIO_2_2		IOMUX_PAD(0x000, 0x018, 0x15, 0, 0, NO_PAD_CTRL)
 
 #define MX25_PAD_A17__A17		IOMUX_PAD(0x238, 0x01c, 0x10, 0, 0, NO_PAD_CTRL)
-#define MX25_PAD_A17__GPIO_2_3		IOMUX_PAD(0x238, 0x01c, 0x15, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_A17__GPIO_2_3		IOMUX_PAD(0x238, 0x01c, 0x05, 0, 0, NO_PAD_CTRL)
 
 #define MX25_PAD_A18__A18		IOMUX_PAD(0x23c, 0x020, 0x10, 0, 0, NO_PAD_CTRL)
 #define MX25_PAD_A18__GPIO_2_4		IOMUX_PAD(0x23c, 0x020, 0x15, 0, 0, NO_PAD_CTRL)
@@ -410,35 +410,35 @@
 #define MX25_PAD_KPP_COL3__KPP_COL3	IOMUX_PAD(0x3bc, 0x1c4, 0x10, 0, 0, PAD_CTL_PKE | PAD_CTL_ODE)
 #define MX25_PAD_KPP_COL3__GPIO_3_4	IOMUX_PAD(0x3bc, 0x1c4, 0x15, 0, 0, NO_PAD_CTRL)
 
-#define MX25_PAD_FEC_MDC__FEC_MDC	IOMUX_PAD(0x3c0, 0x1c8, 0x10, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_FEC_MDC__FEC_MDC	IOMUX_PAD(0x3c0, 0x1c8, 0x00, 0, 0, NO_PAD_CTRL)
 #define MX25_PAD_FEC_MDC__AUD4_TXD	IOMUX_PAD(0x3c0, 0x1c8, 0x12, 0x464, 1, NO_PAD_CTRL)
 #define MX25_PAD_FEC_MDC__GPIO_3_5	IOMUX_PAD(0x3c0, 0x1c8, 0x15, 0, 0, NO_PAD_CTRL)
 
-#define MX25_PAD_FEC_MDIO__FEC_MDIO	IOMUX_PAD(0x3c4, 0x1cc, 0x10, 0, 0, PAD_CTL_HYS | PAD_CTL_PUS_22K_UP)
+#define MX25_PAD_FEC_MDIO__FEC_MDIO	IOMUX_PAD(0x3c4, 0x1cc, 0x00, 0, 0, PAD_CTL_HYS | PAD_CTL_PUS_22K_UP)
 #define MX25_PAD_FEC_MDIO__AUD4_RXD	IOMUX_PAD(0x3c4, 0x1cc, 0x12, 0x460, 1, NO_PAD_CTRL)
 #define MX25_PAD_FEC_MDIO__GPIO_3_6	IOMUX_PAD(0x3c4, 0x1cc, 0x15, 0, 0, NO_PAD_CTRL)
 
-#define MX25_PAD_FEC_TDATA0__FEC_TDATA0	IOMUX_PAD(0x3c8, 0x1d0, 0x10, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_FEC_TDATA0__FEC_TDATA0	IOMUX_PAD(0x3c8, 0x1d0, 0x00, 0, 0, NO_PAD_CTRL)
 #define MX25_PAD_FEC_TDATA0__GPIO_3_7	IOMUX_PAD(0x3c8, 0x1d0, 0x15, 0, 0, NO_PAD_CTRL)
 
-#define MX25_PAD_FEC_TDATA1__FEC_TDATA1	IOMUX_PAD(0x3cc, 0x1d4, 0x10, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_FEC_TDATA1__FEC_TDATA1	IOMUX_PAD(0x3cc, 0x1d4, 0x00, 0, 0, NO_PAD_CTRL)
 #define MX25_PAD_FEC_TDATA1__AUD4_TXFS	IOMUX_PAD(0x3cc, 0x1d4, 0x12, 0x474, 1, NO_PAD_CTRL)
 #define MX25_PAD_FEC_TDATA1__GPIO_3_8	IOMUX_PAD(0x3cc, 0x1d4, 0x15, 0, 0, NO_PAD_CTRL)
 
-#define MX25_PAD_FEC_TX_EN__FEC_TX_EN	IOMUX_PAD(0x3d0, 0x1d8, 0x10, 0, 0, NO_PAD_CTRL)
+#define MX25_PAD_FEC_TX_EN__FEC_TX_EN	IOMUX_PAD(0x3d0, 0x1d8, 0x00, 0, 0, NO_PAD_CTRL)
 #define MX25_PAD_FEC_TX_EN__GPIO_3_9   	IOMUX_PAD(0x3d0, 0x1d8, 0x15, 0, 0, NO_PAD_CTRL)
 
-#define MX25_PAD_FEC_RDATA0__FEC_RDATA0	IOMUX_PAD(0x3d4, 0x1dc, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTRL)
+#define MX25_PAD_FEC_RDATA0__FEC_RDATA0	IOMUX_PAD(0x3d4, 0x1dc, 0x00, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTRL)
 #define MX25_PAD_FEC_RDATA0__GPIO_3_10	IOMUX_PAD(0x3d4, 0x1dc, 0x15, 0, 0, NO_PAD_CTRL)
 
-#define MX25_PAD_FEC_RDATA1__FEC_RDATA1	IOMUX_PAD(0x3d8, 0x1e0, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTRL)
+#define MX25_PAD_FEC_RDATA1__FEC_RDATA1	IOMUX_PAD(0x3d8, 0x1e0, 0x00, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTRL)
 #define MX25_PAD_FEC_RDATA1__GPIO_3_11	IOMUX_PAD(0x3d8, 0x1e0, 0x15, 0, 0, NO_PAD_CTRL)
 
-#define MX25_PAD_FEC_RX_DV__FEC_RX_DV	IOMUX_PAD(0x3dc, 0x1e4, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTRL)
+#define MX25_PAD_FEC_RX_DV__FEC_RX_DV	IOMUX_PAD(0x3dc, 0x1e4, 0x00, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTRL)
 #define MX25_PAD_FEC_RX_DV__CAN2_RX	IOMUX_PAD(0x3dc, 0x1e4, 0x14, 0x484, 0, PAD_CTL_PUS_22K_UP)
 #define MX25_PAD_FEC_RX_DV__GPIO_3_12	IOMUX_PAD(0x3dc, 0x1e4, 0x15, 0, 0, NO_PAD_CTRL)
 
-#define MX25_PAD_FEC_TX_CLK__FEC_TX_CLK	IOMUX_PAD(0x3e0, 0x1e8, 0x10, 0, 0, PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN)
+#define MX25_PAD_FEC_TX_CLK__FEC_TX_CLK	IOMUX_PAD(0x3e0, 0x1e8, 0x00, 0, 0, PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN)
 #define MX25_PAD_FEC_TX_CLK__GPIO_3_13	IOMUX_PAD(0x3e0, 0x1e8, 0x15, 0, 0, NO_PAD_CTRL)
 
 #define MX25_PAD_RTCK__RTCK		IOMUX_PAD(0x3e4, 0x1ec, 0x10, 0, 0, NO_PAD_CTRL)
-- 
1.6.5

[PATCH 3/4] fec: add support for Freescale i.MX25 PDK (3DS)

[Baruch Siach]

The i.MX25 PDK uses RMII to communicate with its PHY. This patch adds the
necessary bits to make the i.MX25 talk RMII.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
---
 drivers/net/fec.c |   22 ++++++++++++++++++++++
 drivers/net/fec.h |    2 ++
 2 files changed, 24 insertions(+), 0 deletions(-)

diff --git a/drivers/net/fec.c b/drivers/net/fec.c
index 16a1d58..65c43d3 100644
--- a/drivers/net/fec.c
+++ b/drivers/net/fec.c
@@ -51,6 +51,7 @@
 #include "fec.h"
 
 #ifdef CONFIG_ARCH_MXC
+#include <asm/mach-types.h>
 #include <mach/hardware.h>
 #define FEC_ALIGNMENT	0xf
 #else
@@ -1722,6 +1723,25 @@ static int fec_enet_init(struct net_device *dev, int index)
 	return 0;
 }
 
+static void fec_localhw_setup(struct net_device *dev)
+{
+	struct fec_enet_private *fep = netdev_priv(dev);
+
+	if (!machine_is_mx25_3ds())
+		return;
+
+	/* disable the gasket and wait */
+	writel(0, fep->hwp + FEC_MIIGSK_ENR);
+	while (readl(fep->hwp + FEC_MIIGSK_ENR) & 4)
+		udelay(1);
+
+	/* configure the gasket for RMII, 50 MHz, no loopback, no echo */
+	writel(1, fep->hwp + FEC_MIIGSK_CFGR);
+
+	/* re-enable the gasket */
+	writel(2, fep->hwp + FEC_MIIGSK_ENR);
+}
+
 /* This function is called to start or restart the FEC during a link
  * change.  This only happens when switching between half and full
  * duplex.
@@ -1810,6 +1830,8 @@ fec_restart(struct net_device *dev, int duplex)
 	/* Set MII speed */
 	writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
 
+	fec_localhw_setup(dev);
+
 	/* And last, enable the transmit and receive processing */
 	writel(2, fep->hwp + FEC_ECNTRL);
 	writel(0, fep->hwp + FEC_R_DES_ACTIVE);
diff --git a/drivers/net/fec.h b/drivers/net/fec.h
index cc47f3f..2c48b25 100644
--- a/drivers/net/fec.h
+++ b/drivers/net/fec.h
@@ -43,6 +43,8 @@
 #define FEC_R_DES_START		0x180 /* Receive descriptor ring */
 #define FEC_X_DES_START		0x184 /* Transmit descriptor ring */
 #define FEC_R_BUFF_SIZE		0x188 /* Maximum receive buff size */
+#define FEC_MIIGSK_CFGR		0x300 /* MIIGSK Configuration reg */
+#define FEC_MIIGSK_ENR		0x308 /* MIIGSK Enable reg */
 
 #else
 
-- 
1.6.5

[PATCH 3/4] fec: add support for Freescale i.MX25 PDK (3DS)

[Baruch Siach]

The i.MX25 PDK uses RMII to communicate with its PHY. This patch adds the
necessary bits to make the i.MX25 talk RMII.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
---
 drivers/net/fec.c |   22 ++++++++++++++++++++++
 drivers/net/fec.h |    2 ++
 2 files changed, 24 insertions(+), 0 deletions(-)

diff --git a/drivers/net/fec.c b/drivers/net/fec.c
index 16a1d58..65c43d3 100644
--- a/drivers/net/fec.c
+++ b/drivers/net/fec.c
@@ -51,6 +51,7 @@
 #include "fec.h"
 
 #ifdef CONFIG_ARCH_MXC
+#include <asm/mach-types.h>
 #include <mach/hardware.h>
 #define FEC_ALIGNMENT	0xf
 #else
@@ -1722,6 +1723,25 @@ static int fec_enet_init(struct net_device *dev, int index)
 	return 0;
 }
 
+static void fec_localhw_setup(struct net_device *dev)
+{
+	struct fec_enet_private *fep = netdev_priv(dev);
+
+	if (!machine_is_mx25_3ds())
+		return;
+
+	/* disable the gasket and wait */
+	writel(0, fep->hwp + FEC_MIIGSK_ENR);
+	while (readl(fep->hwp + FEC_MIIGSK_ENR) & 4)
+		udelay(1);
+
+	/* configure the gasket for RMII, 50 MHz, no loopback, no echo */
+	writel(1, fep->hwp + FEC_MIIGSK_CFGR);
+
+	/* re-enable the gasket */
+	writel(2, fep->hwp + FEC_MIIGSK_ENR);
+}
+
 /* This function is called to start or restart the FEC during a link
  * change.  This only happens when switching between half and full
  * duplex.
@@ -1810,6 +1830,8 @@ fec_restart(struct net_device *dev, int duplex)
 	/* Set MII speed */
 	writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
 
+	fec_localhw_setup(dev);
+
 	/* And last, enable the transmit and receive processing */
 	writel(2, fep->hwp + FEC_ECNTRL);
 	writel(0, fep->hwp + FEC_R_DES_ACTIVE);
diff --git a/drivers/net/fec.h b/drivers/net/fec.h
index cc47f3f..2c48b25 100644
--- a/drivers/net/fec.h
+++ b/drivers/net/fec.h
@@ -43,6 +43,8 @@
 #define FEC_R_DES_START		0x180 /* Receive descriptor ring */
 #define FEC_X_DES_START		0x184 /* Transmit descriptor ring */
 #define FEC_R_BUFF_SIZE		0x188 /* Maximum receive buff size */
+#define FEC_MIIGSK_CFGR		0x300 /* MIIGSK Configuration reg */
+#define FEC_MIIGSK_ENR		0x308 /* MIIGSK Enable reg */
 
 #else
 
-- 
1.6.5

[PATCH 4/4] mx25: add support for FEC on i.MX25 PDK

[Baruch Siach]

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
---
 arch/arm/mach-mx25/clock.c            |    2 +
 arch/arm/mach-mx25/devices.c          |   19 +++++++++++++++
 arch/arm/mach-mx25/devices.h          |    1 +
 arch/arm/mach-mx25/mx25pdk.c          |   40 ++++++++++++++++++++++++++++++++-
 arch/arm/plat-mxc/include/mach/mx25.h |    4 +++
 5 files changed, 65 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-mx25/clock.c b/arch/arm/mach-mx25/clock.c
index dbbbcc6..ea8c3da 100644
--- a/arch/arm/mach-mx25/clock.c
+++ b/arch/arm/mach-mx25/clock.c
@@ -173,6 +173,7 @@ DEFINE_CLOCK(pwm4_clk,	 0, CCM_CGCR2,  2, get_rate_ipg, NULL);
 DEFINE_CLOCK(kpp_clk,	 0, CCM_CGCR1, 28, get_rate_ipg, NULL);
 DEFINE_CLOCK(tsc_clk,	 0, CCM_CGCR2, 13, get_rate_ipg, NULL);
 DEFINE_CLOCK(i2c_clk,	 0, CCM_CGCR0,  6, get_rate_i2c, NULL);
+DEFINE_CLOCK(fec_clk,	 0, CCM_CGCR0, 23, get_rate_ipg, NULL);
 
 #define _REGISTER_CLOCK(d, n, c)	\
 	{				\
@@ -204,6 +205,7 @@ static struct clk_lookup lookups[] = {
 	_REGISTER_CLOCK("imx-i2c.0", NULL, i2c_clk)
 	_REGISTER_CLOCK("imx-i2c.1", NULL, i2c_clk)
 	_REGISTER_CLOCK("imx-i2c.2", NULL, i2c_clk)
+	_REGISTER_CLOCK("fec.0", NULL, fec_clk)
 };
 
 int __init mx25_clocks_init(unsigned long fref)
diff --git a/arch/arm/mach-mx25/devices.c b/arch/arm/mach-mx25/devices.c
index 63511de..9fdeea1 100644
--- a/arch/arm/mach-mx25/devices.c
+++ b/arch/arm/mach-mx25/devices.c
@@ -419,3 +419,22 @@ int __init mxc_register_gpios(void)
 	return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports));
 }
 
+static struct resource mx25_fec_resources[] = {
+	{
+		.start	= MX25_FEC_BASE_ADDR,
+		.end	= MX25_FEC_BASE_ADDR + 0xfff,
+		.flags	= IORESOURCE_MEM,
+	},
+	{
+		.start	= MX25_INT_FEC,
+		.end	= MX25_INT_FEC,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+struct platform_device mx25_fec_device = {
+	.name	= "fec",
+	.id	= 0,
+	.num_resources	= ARRAY_SIZE(mx25_fec_resources),
+	.resource	= mx25_fec_resources,
+};
diff --git a/arch/arm/mach-mx25/devices.h b/arch/arm/mach-mx25/devices.h
index fe6bf88..fe5420f 100644
--- a/arch/arm/mach-mx25/devices.h
+++ b/arch/arm/mach-mx25/devices.h
@@ -17,3 +17,4 @@ extern struct platform_device mxc_keypad_device;
 extern struct platform_device mxc_i2c_device0;
 extern struct platform_device mxc_i2c_device1;
 extern struct platform_device mxc_i2c_device2;
+extern struct platform_device mx25_fec_device;
diff --git a/arch/arm/mach-mx25/mx25pdk.c b/arch/arm/mach-mx25/mx25pdk.c
index d23ae57..011d6c3 100644
--- a/arch/arm/mach-mx25/mx25pdk.c
+++ b/arch/arm/mach-mx25/mx25pdk.c
@@ -18,6 +18,7 @@
 
 #include <linux/types.h>
 #include <linux/init.h>
+#include <linux/delay.h>
 #include <linux/clk.h>
 #include <linux/irq.h>
 #include <linux/gpio.h>
@@ -35,16 +36,53 @@
 #include <mach/mx25.h>
 #include <mach/mxc_nand.h>
 #include "devices.h"
-#include <mach/iomux-v3.h>
+#include <mach/iomux.h>
 
 static struct imxuart_platform_data uart_pdata = {
 	.flags = IMXUART_HAVE_RTSCTS,
 };
 
+static struct pad_desc mx25pdk_pads[] = {
+	MX25_PAD_FEC_MDC__FEC_MDC,
+	MX25_PAD_FEC_MDIO__FEC_MDIO,
+	MX25_PAD_FEC_TDATA0__FEC_TDATA0,
+	MX25_PAD_FEC_TDATA1__FEC_TDATA1,
+	MX25_PAD_FEC_TX_EN__FEC_TX_EN,
+	MX25_PAD_FEC_RDATA0__FEC_RDATA0,
+	MX25_PAD_FEC_RDATA1__FEC_RDATA1,
+	MX25_PAD_FEC_RX_DV__FEC_RX_DV,
+	MX25_PAD_FEC_TX_CLK__FEC_TX_CLK,
+	MX25_PAD_A17__GPIO_2_3, /* FEC_EN, GPIO 35 */
+	MX25_PAD_D12__GPIO_4_8, /* FEC_RESET_B, GPIO 104 */
+};
+
+#define FEC_ENABLE_GPIO		35
+#define FEC_RESET_B_GPIO	104
+
+static void __init mx25pdk_fec_reset(void)
+{
+	gpio_request(FEC_ENABLE_GPIO, "FEC PHY enable");
+	gpio_request(FEC_RESET_B_GPIO, "FEC PHY reset");
+
+	gpio_direction_output(FEC_ENABLE_GPIO, 0);  /* drop PHY power */
+	gpio_direction_output(FEC_RESET_B_GPIO, 0); /* assert reset */
+	udelay(2);
+
+	/* turn on PHY power and lift reset */
+	gpio_set_value(FEC_ENABLE_GPIO, 1);
+	gpio_set_value(FEC_RESET_B_GPIO, 1);
+}
+
 static void __init mx25pdk_init(void)
 {
+	mxc_iomux_v3_setup_multiple_pads(mx25pdk_pads,
+			ARRAY_SIZE(mx25pdk_pads));
+
 	mxc_register_device(&mxc_uart_device0, &uart_pdata);
 	mxc_register_device(&mxc_usbh2, NULL);
+
+	mx25pdk_fec_reset();
+	mxc_register_device(&mx25_fec_device, NULL);
 }
 
 static void __init mx25pdk_timer_init(void)
diff --git a/arch/arm/plat-mxc/include/mach/mx25.h b/arch/arm/plat-mxc/include/mach/mx25.h
index ec64bd9..106f651 100644
--- a/arch/arm/plat-mxc/include/mach/mx25.h
+++ b/arch/arm/plat-mxc/include/mach/mx25.h
@@ -41,4 +41,8 @@
 #define UART1_BASE_ADDR			0x43f90000
 #define UART2_BASE_ADDR			0x43f94000
 
+#define MX25_FEC_BASE_ADDR		0x50038000
+
+#define MX25_INT_FEC	57
+
 #endif /* __MACH_MX25_H__ */
-- 
1.6.5

[PATCH 4/4] mx25: add support for FEC on i.MX25 PDK

[Baruch Siach]

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
---
 arch/arm/mach-mx25/clock.c            |    2 +
 arch/arm/mach-mx25/devices.c          |   19 +++++++++++++++
 arch/arm/mach-mx25/devices.h          |    1 +
 arch/arm/mach-mx25/mx25pdk.c          |   40 ++++++++++++++++++++++++++++++++-
 arch/arm/plat-mxc/include/mach/mx25.h |    4 +++
 5 files changed, 65 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-mx25/clock.c b/arch/arm/mach-mx25/clock.c
index dbbbcc6..ea8c3da 100644
--- a/arch/arm/mach-mx25/clock.c
+++ b/arch/arm/mach-mx25/clock.c
@@ -173,6 +173,7 @@ DEFINE_CLOCK(pwm4_clk,	 0, CCM_CGCR2,  2, get_rate_ipg, NULL);
 DEFINE_CLOCK(kpp_clk,	 0, CCM_CGCR1, 28, get_rate_ipg, NULL);
 DEFINE_CLOCK(tsc_clk,	 0, CCM_CGCR2, 13, get_rate_ipg, NULL);
 DEFINE_CLOCK(i2c_clk,	 0, CCM_CGCR0,  6, get_rate_i2c, NULL);
+DEFINE_CLOCK(fec_clk,	 0, CCM_CGCR0, 23, get_rate_ipg, NULL);
 
 #define _REGISTER_CLOCK(d, n, c)	\
 	{				\
@@ -204,6 +205,7 @@ static struct clk_lookup lookups[] = {
 	_REGISTER_CLOCK("imx-i2c.0", NULL, i2c_clk)
 	_REGISTER_CLOCK("imx-i2c.1", NULL, i2c_clk)
 	_REGISTER_CLOCK("imx-i2c.2", NULL, i2c_clk)
+	_REGISTER_CLOCK("fec.0", NULL, fec_clk)
 };
 
 int __init mx25_clocks_init(unsigned long fref)
diff --git a/arch/arm/mach-mx25/devices.c b/arch/arm/mach-mx25/devices.c
index 63511de..9fdeea1 100644
--- a/arch/arm/mach-mx25/devices.c
+++ b/arch/arm/mach-mx25/devices.c
@@ -419,3 +419,22 @@ int __init mxc_register_gpios(void)
 	return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports));
 }
 
+static struct resource mx25_fec_resources[] = {
+	{
+		.start	= MX25_FEC_BASE_ADDR,
+		.end	= MX25_FEC_BASE_ADDR + 0xfff,
+		.flags	= IORESOURCE_MEM,
+	},
+	{
+		.start	= MX25_INT_FEC,
+		.end	= MX25_INT_FEC,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+struct platform_device mx25_fec_device = {
+	.name	= "fec",
+	.id	= 0,
+	.num_resources	= ARRAY_SIZE(mx25_fec_resources),
+	.resource	= mx25_fec_resources,
+};
diff --git a/arch/arm/mach-mx25/devices.h b/arch/arm/mach-mx25/devices.h
index fe6bf88..fe5420f 100644
--- a/arch/arm/mach-mx25/devices.h
+++ b/arch/arm/mach-mx25/devices.h
@@ -17,3 +17,4 @@ extern struct platform_device mxc_keypad_device;
 extern struct platform_device mxc_i2c_device0;
 extern struct platform_device mxc_i2c_device1;
 extern struct platform_device mxc_i2c_device2;
+extern struct platform_device mx25_fec_device;
diff --git a/arch/arm/mach-mx25/mx25pdk.c b/arch/arm/mach-mx25/mx25pdk.c
index d23ae57..011d6c3 100644
--- a/arch/arm/mach-mx25/mx25pdk.c
+++ b/arch/arm/mach-mx25/mx25pdk.c
@@ -18,6 +18,7 @@
 
 #include <linux/types.h>
 #include <linux/init.h>
+#include <linux/delay.h>
 #include <linux/clk.h>
 #include <linux/irq.h>
 #include <linux/gpio.h>
@@ -35,16 +36,53 @@
 #include <mach/mx25.h>
 #include <mach/mxc_nand.h>
 #include "devices.h"
-#include <mach/iomux-v3.h>
+#include <mach/iomux.h>
 
 static struct imxuart_platform_data uart_pdata = {
 	.flags = IMXUART_HAVE_RTSCTS,
 };
 
+static struct pad_desc mx25pdk_pads[] = {
+	MX25_PAD_FEC_MDC__FEC_MDC,
+	MX25_PAD_FEC_MDIO__FEC_MDIO,
+	MX25_PAD_FEC_TDATA0__FEC_TDATA0,
+	MX25_PAD_FEC_TDATA1__FEC_TDATA1,
+	MX25_PAD_FEC_TX_EN__FEC_TX_EN,
+	MX25_PAD_FEC_RDATA0__FEC_RDATA0,
+	MX25_PAD_FEC_RDATA1__FEC_RDATA1,
+	MX25_PAD_FEC_RX_DV__FEC_RX_DV,
+	MX25_PAD_FEC_TX_CLK__FEC_TX_CLK,
+	MX25_PAD_A17__GPIO_2_3, /* FEC_EN, GPIO 35 */
+	MX25_PAD_D12__GPIO_4_8, /* FEC_RESET_B, GPIO 104 */
+};
+
+#define FEC_ENABLE_GPIO		35
+#define FEC_RESET_B_GPIO	104
+
+static void __init mx25pdk_fec_reset(void)
+{
+	gpio_request(FEC_ENABLE_GPIO, "FEC PHY enable");
+	gpio_request(FEC_RESET_B_GPIO, "FEC PHY reset");
+
+	gpio_direction_output(FEC_ENABLE_GPIO, 0);  /* drop PHY power */
+	gpio_direction_output(FEC_RESET_B_GPIO, 0); /* assert reset */
+	udelay(2);
+
+	/* turn on PHY power and lift reset */
+	gpio_set_value(FEC_ENABLE_GPIO, 1);
+	gpio_set_value(FEC_RESET_B_GPIO, 1);
+}
+
 static void __init mx25pdk_init(void)
 {
+	mxc_iomux_v3_setup_multiple_pads(mx25pdk_pads,
+			ARRAY_SIZE(mx25pdk_pads));
+
 	mxc_register_device(&mxc_uart_device0, &uart_pdata);
 	mxc_register_device(&mxc_usbh2, NULL);
+
+	mx25pdk_fec_reset();
+	mxc_register_device(&mx25_fec_device, NULL);
 }
 
 static void __init mx25pdk_timer_init(void)
diff --git a/arch/arm/plat-mxc/include/mach/mx25.h b/arch/arm/plat-mxc/include/mach/mx25.h
index ec64bd9..106f651 100644
--- a/arch/arm/plat-mxc/include/mach/mx25.h
+++ b/arch/arm/plat-mxc/include/mach/mx25.h
@@ -41,4 +41,8 @@
 #define UART1_BASE_ADDR			0x43f90000
 #define UART2_BASE_ADDR			0x43f94000
 
+#define MX25_FEC_BASE_ADDR		0x50038000
+
+#define MX25_INT_FEC	57
+
 #endif /* __MACH_MX25_H__ */
-- 
1.6.5

Re: [PATCH 3/4] fec: add support for Freescale i.MX25 PDK (3DS)

[Sascha Hauer]

On Mon, Dec 14, 2009 at 12:19:41PM +0200, Baruch Siach wrote:
> The i.MX25 PDK uses RMII to communicate with its PHY. This patch adds the
> necessary bits to make the i.MX25 talk RMII.
> 
> Signed-off-by: Baruch Siach <baruch@tkos.co.il>
> ---
>  drivers/net/fec.c |   22 ++++++++++++++++++++++
>  drivers/net/fec.h |    2 ++
>  2 files changed, 24 insertions(+), 0 deletions(-)
> 
> diff --git a/drivers/net/fec.c b/drivers/net/fec.c
> index 16a1d58..65c43d3 100644
> --- a/drivers/net/fec.c
> +++ b/drivers/net/fec.c
> @@ -51,6 +51,7 @@
>  #include "fec.h"
>  
>  #ifdef CONFIG_ARCH_MXC
> +#include <asm/mach-types.h>
>  #include <mach/hardware.h>
>  #define FEC_ALIGNMENT	0xf
>  #else
> @@ -1722,6 +1723,25 @@ static int fec_enet_init(struct net_device *dev, int index)
>  	return 0;
>  }
>  
> +static void fec_localhw_setup(struct net_device *dev)
> +{
> +	struct fec_enet_private *fep = netdev_priv(dev);
> +
> +	if (!machine_is_mx25_3ds())
> +		return;

We should add a flag in platform data for this. Unfortunately the fec
driver has no platform data at all at the moment, so this requires some
more work.

Sascha

> +
> +	/* disable the gasket and wait */
> +	writel(0, fep->hwp + FEC_MIIGSK_ENR);
> +	while (readl(fep->hwp + FEC_MIIGSK_ENR) & 4)
> +		udelay(1);
> +
> +	/* configure the gasket for RMII, 50 MHz, no loopback, no echo */
> +	writel(1, fep->hwp + FEC_MIIGSK_CFGR);
> +
> +	/* re-enable the gasket */
> +	writel(2, fep->hwp + FEC_MIIGSK_ENR);
> +}
> +
>  /* This function is called to start or restart the FEC during a link
>   * change.  This only happens when switching between half and full
>   * duplex.
> @@ -1810,6 +1830,8 @@ fec_restart(struct net_device *dev, int duplex)
>  	/* Set MII speed */
>  	writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
>  
> +	fec_localhw_setup(dev);
> +
>  	/* And last, enable the transmit and receive processing */
>  	writel(2, fep->hwp + FEC_ECNTRL);
>  	writel(0, fep->hwp + FEC_R_DES_ACTIVE);
> diff --git a/drivers/net/fec.h b/drivers/net/fec.h
> index cc47f3f..2c48b25 100644
> --- a/drivers/net/fec.h
> +++ b/drivers/net/fec.h
> @@ -43,6 +43,8 @@
>  #define FEC_R_DES_START		0x180 /* Receive descriptor ring */
>  #define FEC_X_DES_START		0x184 /* Transmit descriptor ring */
>  #define FEC_R_BUFF_SIZE		0x188 /* Maximum receive buff size */
> +#define FEC_MIIGSK_CFGR		0x300 /* MIIGSK Configuration reg */
> +#define FEC_MIIGSK_ENR		0x308 /* MIIGSK Enable reg */
>  
>  #else
>  
> -- 
> 1.6.5
> 
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

[PATCH 3/4] fec: add support for Freescale i.MX25 PDK (3DS)

[Sascha Hauer]

On Mon, Dec 14, 2009 at 12:19:41PM +0200, Baruch Siach wrote:
> The i.MX25 PDK uses RMII to communicate with its PHY. This patch adds the
> necessary bits to make the i.MX25 talk RMII.
> 
> Signed-off-by: Baruch Siach <baruch@tkos.co.il>
> ---
>  drivers/net/fec.c |   22 ++++++++++++++++++++++
>  drivers/net/fec.h |    2 ++
>  2 files changed, 24 insertions(+), 0 deletions(-)
> 
> diff --git a/drivers/net/fec.c b/drivers/net/fec.c
> index 16a1d58..65c43d3 100644
> --- a/drivers/net/fec.c
> +++ b/drivers/net/fec.c
> @@ -51,6 +51,7 @@
>  #include "fec.h"
>  
>  #ifdef CONFIG_ARCH_MXC
> +#include <asm/mach-types.h>
>  #include <mach/hardware.h>
>  #define FEC_ALIGNMENT	0xf
>  #else
> @@ -1722,6 +1723,25 @@ static int fec_enet_init(struct net_device *dev, int index)
>  	return 0;
>  }
>  
> +static void fec_localhw_setup(struct net_device *dev)
> +{
> +	struct fec_enet_private *fep = netdev_priv(dev);
> +
> +	if (!machine_is_mx25_3ds())
> +		return;

We should add a flag in platform data for this. Unfortunately the fec
driver has no platform data at all at the moment, so this requires some
more work.

Sascha

> +
> +	/* disable the gasket and wait */
> +	writel(0, fep->hwp + FEC_MIIGSK_ENR);
> +	while (readl(fep->hwp + FEC_MIIGSK_ENR) & 4)
> +		udelay(1);
> +
> +	/* configure the gasket for RMII, 50 MHz, no loopback, no echo */
> +	writel(1, fep->hwp + FEC_MIIGSK_CFGR);
> +
> +	/* re-enable the gasket */
> +	writel(2, fep->hwp + FEC_MIIGSK_ENR);
> +}
> +
>  /* This function is called to start or restart the FEC during a link
>   * change.  This only happens when switching between half and full
>   * duplex.
> @@ -1810,6 +1830,8 @@ fec_restart(struct net_device *dev, int duplex)
>  	/* Set MII speed */
>  	writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
>  
> +	fec_localhw_setup(dev);
> +
>  	/* And last, enable the transmit and receive processing */
>  	writel(2, fep->hwp + FEC_ECNTRL);
>  	writel(0, fep->hwp + FEC_R_DES_ACTIVE);
> diff --git a/drivers/net/fec.h b/drivers/net/fec.h
> index cc47f3f..2c48b25 100644
> --- a/drivers/net/fec.h
> +++ b/drivers/net/fec.h
> @@ -43,6 +43,8 @@
>  #define FEC_R_DES_START		0x180 /* Receive descriptor ring */
>  #define FEC_X_DES_START		0x184 /* Transmit descriptor ring */
>  #define FEC_R_BUFF_SIZE		0x188 /* Maximum receive buff size */
> +#define FEC_MIIGSK_CFGR		0x300 /* MIIGSK Configuration reg */
> +#define FEC_MIIGSK_ENR		0x308 /* MIIGSK Enable reg */
>  
>  #else
>  
> -- 
> 1.6.5
> 
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

Re: [PATCH 3/4] fec: add support for Freescale i.MX25 PDK (3DS)

[Greg Ungerer]

Hi Baruch,

Baruch Siach wrote:
> The i.MX25 PDK uses RMII to communicate with its PHY. This patch adds the
> necessary bits to make the i.MX25 talk RMII.
> 
> Signed-off-by: Baruch Siach <baruch@tkos.co.il>
> ---
>  drivers/net/fec.c |   22 ++++++++++++++++++++++
>  drivers/net/fec.h |    2 ++
>  2 files changed, 24 insertions(+), 0 deletions(-)
> 
> diff --git a/drivers/net/fec.c b/drivers/net/fec.c
> index 16a1d58..65c43d3 100644
> --- a/drivers/net/fec.c
> +++ b/drivers/net/fec.c
> @@ -51,6 +51,7 @@
>  #include "fec.h"
>  
>  #ifdef CONFIG_ARCH_MXC
> +#include <asm/mach-types.h>
>  #include <mach/hardware.h>
>  #define FEC_ALIGNMENT	0xf
>  #else
> @@ -1722,6 +1723,25 @@ static int fec_enet_init(struct net_device *dev, int index)
>  	return 0;
>  }
>  
> +static void fec_localhw_setup(struct net_device *dev)
> +{
> +	struct fec_enet_private *fep = netdev_priv(dev);
> +
> +	if (!machine_is_mx25_3ds())
> +		return;
> +
> +	/* disable the gasket and wait */
> +	writel(0, fep->hwp + FEC_MIIGSK_ENR);
> +	while (readl(fep->hwp + FEC_MIIGSK_ENR) & 4)
> +		udelay(1);
> +
> +	/* configure the gasket for RMII, 50 MHz, no loopback, no echo */
> +	writel(1, fep->hwp + FEC_MIIGSK_CFGR);
> +
> +	/* re-enable the gasket */
> +	writel(2, fep->hwp + FEC_MIIGSK_ENR);
                              ^^^^^^^^^^^^^^

> +}

This will not compile for some CPU types that use this driver.


> +
>  /* This function is called to start or restart the FEC during a link
>   * change.  This only happens when switching between half and full
>   * duplex.
> @@ -1810,6 +1830,8 @@ fec_restart(struct net_device *dev, int duplex)
>  	/* Set MII speed */
>  	writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
>  
> +	fec_localhw_setup(dev);
> +
>  	/* And last, enable the transmit and receive processing */
>  	writel(2, fep->hwp + FEC_ECNTRL);
>  	writel(0, fep->hwp + FEC_R_DES_ACTIVE);
> diff --git a/drivers/net/fec.h b/drivers/net/fec.h
> index cc47f3f..2c48b25 100644
> --- a/drivers/net/fec.h
> +++ b/drivers/net/fec.h
> @@ -43,6 +43,8 @@
>  #define FEC_R_DES_START		0x180 /* Receive descriptor ring */
>  #define FEC_X_DES_START		0x184 /* Transmit descriptor ring */
>  #define FEC_R_BUFF_SIZE		0x188 /* Maximum receive buff size */
> +#define FEC_MIIGSK_CFGR		0x300 /* MIIGSK Configuration reg */
> +#define FEC_MIIGSK_ENR		0x308 /* MIIGSK Enable reg */

These are defined in a conditional section for certain CPU types.
There is no definitions for the other "#else" section here.

Regards
Greg


-- 
------------------------------------------------------------------------
Greg Ungerer  --  Principal Engineer        EMAIL:     gerg@snapgear.com
SnapGear Group, McAfee                      PHONE:       +61 7 3435 2888
8 Gardner Close                             FAX:         +61 7 3217 5323
Milton, QLD, 4064, Australia                WEB: http://www.SnapGear.com

[PATCH 3/4] fec: add support for Freescale i.MX25 PDK (3DS)

[Greg Ungerer]

Hi Baruch,

Baruch Siach wrote:
> The i.MX25 PDK uses RMII to communicate with its PHY. This patch adds the
> necessary bits to make the i.MX25 talk RMII.
> 
> Signed-off-by: Baruch Siach <baruch@tkos.co.il>
> ---
>  drivers/net/fec.c |   22 ++++++++++++++++++++++
>  drivers/net/fec.h |    2 ++
>  2 files changed, 24 insertions(+), 0 deletions(-)
> 
> diff --git a/drivers/net/fec.c b/drivers/net/fec.c
> index 16a1d58..65c43d3 100644
> --- a/drivers/net/fec.c
> +++ b/drivers/net/fec.c
> @@ -51,6 +51,7 @@
>  #include "fec.h"
>  
>  #ifdef CONFIG_ARCH_MXC
> +#include <asm/mach-types.h>
>  #include <mach/hardware.h>
>  #define FEC_ALIGNMENT	0xf
>  #else
> @@ -1722,6 +1723,25 @@ static int fec_enet_init(struct net_device *dev, int index)
>  	return 0;
>  }
>  
> +static void fec_localhw_setup(struct net_device *dev)
> +{
> +	struct fec_enet_private *fep = netdev_priv(dev);
> +
> +	if (!machine_is_mx25_3ds())
> +		return;
> +
> +	/* disable the gasket and wait */
> +	writel(0, fep->hwp + FEC_MIIGSK_ENR);
> +	while (readl(fep->hwp + FEC_MIIGSK_ENR) & 4)
> +		udelay(1);
> +
> +	/* configure the gasket for RMII, 50 MHz, no loopback, no echo */
> +	writel(1, fep->hwp + FEC_MIIGSK_CFGR);
> +
> +	/* re-enable the gasket */
> +	writel(2, fep->hwp + FEC_MIIGSK_ENR);
                              ^^^^^^^^^^^^^^

> +}

This will not compile for some CPU types that use this driver.


> +
>  /* This function is called to start or restart the FEC during a link
>   * change.  This only happens when switching between half and full
>   * duplex.
> @@ -1810,6 +1830,8 @@ fec_restart(struct net_device *dev, int duplex)
>  	/* Set MII speed */
>  	writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
>  
> +	fec_localhw_setup(dev);
> +
>  	/* And last, enable the transmit and receive processing */
>  	writel(2, fep->hwp + FEC_ECNTRL);
>  	writel(0, fep->hwp + FEC_R_DES_ACTIVE);
> diff --git a/drivers/net/fec.h b/drivers/net/fec.h
> index cc47f3f..2c48b25 100644
> --- a/drivers/net/fec.h
> +++ b/drivers/net/fec.h
> @@ -43,6 +43,8 @@
>  #define FEC_R_DES_START		0x180 /* Receive descriptor ring */
>  #define FEC_X_DES_START		0x184 /* Transmit descriptor ring */
>  #define FEC_R_BUFF_SIZE		0x188 /* Maximum receive buff size */
> +#define FEC_MIIGSK_CFGR		0x300 /* MIIGSK Configuration reg */
> +#define FEC_MIIGSK_ENR		0x308 /* MIIGSK Enable reg */

These are defined in a conditional section for certain CPU types.
There is no definitions for the other "#else" section here.

Regards
Greg


-- 
------------------------------------------------------------------------
Greg Ungerer  --  Principal Engineer        EMAIL:     gerg at snapgear.com
SnapGear Group, McAfee                      PHONE:       +61 7 3435 2888
8 Gardner Close                             FAX:         +61 7 3217 5323
Milton, QLD, 4064, Australia                WEB: http://www.SnapGear.com

Re: [PATCH 3/4] fec: add support for Freescale i.MX25 PDK (3DS)

[Baruch Siach]

Hi Greg,

On Tue, Dec 15, 2009 at 11:27:59AM +1000, Greg Ungerer wrote:
> Hi Baruch,
> 
> Baruch Siach wrote:
> >The i.MX25 PDK uses RMII to communicate with its PHY. This patch adds the
> >necessary bits to make the i.MX25 talk RMII.
> >
> >Signed-off-by: Baruch Siach <baruch@tkos.co.il>
> >---

[snip]

> >+	/* re-enable the gasket */
> >+	writel(2, fep->hwp + FEC_MIIGSK_ENR);
>                              ^^^^^^^^^^^^^^
> 
> This will not compile for some CPU types that use this driver.
> 

[snip]

> >--- a/drivers/net/fec.h
> >+++ b/drivers/net/fec.h
> >@@ -43,6 +43,8 @@
> > #define FEC_R_DES_START		0x180 /* Receive descriptor ring */
> > #define FEC_X_DES_START		0x184 /* Transmit descriptor ring */
> > #define FEC_R_BUFF_SIZE		0x188 /* Maximum receive buff size */
> >+#define FEC_MIIGSK_CFGR		0x300 /* MIIGSK Configuration reg */
> >+#define FEC_MIIGSK_ENR		0x308 /* MIIGSK Enable reg */
> 
> These are defined in a conditional section for certain CPU types.
> There is no definitions for the other "#else" section here.

So, should I put a bogus #define in the other #else section, or put the 
FEC_MIIGSK_* code in an #ifdef section? I guess the latter is the way to go.

baruch

-- 
                                                     ~. .~   Tk Open Systems
=}------------------------------------------------ooO--U--Ooo------------{=
   - baruch@tkos.co.il - tel: +972.2.679.5364, http://www.tkos.co.il -

[PATCH 3/4] fec: add support for Freescale i.MX25 PDK (3DS)

[Baruch Siach]

Hi Greg,

On Tue, Dec 15, 2009 at 11:27:59AM +1000, Greg Ungerer wrote:
> Hi Baruch,
> 
> Baruch Siach wrote:
> >The i.MX25 PDK uses RMII to communicate with its PHY. This patch adds the
> >necessary bits to make the i.MX25 talk RMII.
> >
> >Signed-off-by: Baruch Siach <baruch@tkos.co.il>
> >---

[snip]

> >+	/* re-enable the gasket */
> >+	writel(2, fep->hwp + FEC_MIIGSK_ENR);
>                              ^^^^^^^^^^^^^^
> 
> This will not compile for some CPU types that use this driver.
> 

[snip]

> >--- a/drivers/net/fec.h
> >+++ b/drivers/net/fec.h
> >@@ -43,6 +43,8 @@
> > #define FEC_R_DES_START		0x180 /* Receive descriptor ring */
> > #define FEC_X_DES_START		0x184 /* Transmit descriptor ring */
> > #define FEC_R_BUFF_SIZE		0x188 /* Maximum receive buff size */
> >+#define FEC_MIIGSK_CFGR		0x300 /* MIIGSK Configuration reg */
> >+#define FEC_MIIGSK_ENR		0x308 /* MIIGSK Enable reg */
> 
> These are defined in a conditional section for certain CPU types.
> There is no definitions for the other "#else" section here.

So, should I put a bogus #define in the other #else section, or put the 
FEC_MIIGSK_* code in an #ifdef section? I guess the latter is the way to go.

baruch

-- 
                                                     ~. .~   Tk Open Systems
=}------------------------------------------------ooO--U--Ooo------------{=
   - baruch at tkos.co.il - tel: +972.2.679.5364, http://www.tkos.co.il -

Re: [PATCH 3/4] fec: add support for Freescale i.MX25 PDK (3DS)

[Baruch Siach]

Hi Sascha,

On Mon, Dec 14, 2009 at 11:33:48AM +0100, Sascha Hauer wrote:
> On Mon, Dec 14, 2009 at 12:19:41PM +0200, Baruch Siach wrote:
> > +	if (!machine_is_mx25_3ds())
> > +		return;
> 
> We should add a flag in platform data for this. Unfortunately the fec
> driver has no platform data at all at the moment, so this requires some
> more work.

Here is an updated patch which adds platform data to fec. I've also addressed 
the comment of Greg. I'll post a patch updating the i.MX25 PDK platform code 
shortly.

baruch

>From ff971bbec84501cab714703786dd4058db4a89e4 Mon Sep 17 00:00:00 2001
Message-Id: <ff971bbec84501cab714703786dd4058db4a89e4.1260865551.git.baruch@tkos.co.il>
From: Baruch Siach <baruch@tkos.co.il>
Date: Mon, 14 Dec 2009 10:36:50 +0200
Subject: [PATCH] fec: add support for PHY interface platform data

The i.MX25 PDK uses RMII to communicate with its PHY. This patch adds the
ability to configure RMII, based on platform data.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
---
 drivers/net/fec.c   |   22 ++++++++++++++++++++++
 drivers/net/fec.h   |    2 ++
 include/linux/fec.h |   21 +++++++++++++++++++++
 3 files changed, 45 insertions(+), 0 deletions(-)
 create mode 100644 include/linux/fec.h

diff --git a/drivers/net/fec.c b/drivers/net/fec.c
index 16a1d58..b9a5822 100644
--- a/drivers/net/fec.c
+++ b/drivers/net/fec.c
@@ -40,6 +40,7 @@
 #include <linux/irq.h>
 #include <linux/clk.h>
 #include <linux/platform_device.h>
+#include <linux/fec.h>
 
 #include <asm/cacheflush.h>
 
@@ -198,6 +199,7 @@ struct fec_enet_private {
 	uint	phy_speed;
 	phy_info_t const	*phy;
 	struct work_struct phy_task;
+	phy_interface_t	phy_interface;
 
 	uint	sequence_done;
 	uint	mii_phy_task_queued;
@@ -1810,6 +1812,21 @@ fec_restart(struct net_device *dev, int duplex)
 	/* Set MII speed */
 	writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
 
+#ifndef CONFIG_M5272
+	if (fep->phy_interface == PHY_INTERFACE_MODE_RMII) {
+		/* disable the gasket and wait */
+		writel(0, fep->hwp + FEC_MIIGSK_ENR);
+		while (readl(fep->hwp + FEC_MIIGSK_ENR) & 4)
+			udelay(1);
+
+		/* configure the gasket: RMII, 50 MHz, no loopback, no echo */
+		writel(1, fep->hwp + FEC_MIIGSK_CFGR);
+
+		/* re-enable the gasket */
+		writel(2, fep->hwp + FEC_MIIGSK_ENR);
+	}
+#endif
+
 	/* And last, enable the transmit and receive processing */
 	writel(2, fep->hwp + FEC_ECNTRL);
 	writel(0, fep->hwp + FEC_R_DES_ACTIVE);
@@ -1847,6 +1864,7 @@ static int __devinit
 fec_probe(struct platform_device *pdev)
 {
 	struct fec_enet_private *fep;
+	struct fec_platform_data *pdata;
 	struct net_device *ndev;
 	int i, irq, ret = 0;
 	struct resource *r;
@@ -1879,6 +1897,10 @@ fec_probe(struct platform_device *pdev)
 
 	platform_set_drvdata(pdev, ndev);
 
+	pdata = pdev->dev.platform_data;
+	if (pdata)
+		fep->phy_interface = pdata->phy;
+
 	/* This device has up to three irqs on some platforms */
 	for (i = 0; i < 3; i++) {
 		irq = platform_get_irq(pdev, i);
diff --git a/drivers/net/fec.h b/drivers/net/fec.h
index cc47f3f..2c48b25 100644
--- a/drivers/net/fec.h
+++ b/drivers/net/fec.h
@@ -43,6 +43,8 @@
 #define FEC_R_DES_START		0x180 /* Receive descriptor ring */
 #define FEC_X_DES_START		0x184 /* Transmit descriptor ring */
 #define FEC_R_BUFF_SIZE		0x188 /* Maximum receive buff size */
+#define FEC_MIIGSK_CFGR		0x300 /* MIIGSK Configuration reg */
+#define FEC_MIIGSK_ENR		0x308 /* MIIGSK Enable reg */
 
 #else
 
diff --git a/include/linux/fec.h b/include/linux/fec.h
new file mode 100644
index 0000000..5d3523d
--- /dev/null
+++ b/include/linux/fec.h
@@ -0,0 +1,21 @@
+/* include/linux/fec.h
+ *
+ * Copyright (c) 2009 Orex Computed Radiography
+ *   Baruch Siach <baruch@tkos.co.il>
+ *
+ * Header file for the FEC platform data
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __LINUX_FEC_H__
+#define __LINUX_FEC_H__
+
+#include <linux/phy.h>
+
+struct fec_platform_data {
+	phy_interface_t phy;
+};
+
+#endif
-- 
1.6.5


-- 
                                                     ~. .~   Tk Open Systems
=}------------------------------------------------ooO--U--Ooo------------{=
   - baruch@tkos.co.il - tel: +972.2.679.5364, http://www.tkos.co.il -

[PATCH 3/4] fec: add support for Freescale i.MX25 PDK (3DS)

[Baruch Siach]

Hi Sascha,

On Mon, Dec 14, 2009 at 11:33:48AM +0100, Sascha Hauer wrote:
> On Mon, Dec 14, 2009 at 12:19:41PM +0200, Baruch Siach wrote:
> > +	if (!machine_is_mx25_3ds())
> > +		return;
> 
> We should add a flag in platform data for this. Unfortunately the fec
> driver has no platform data at all at the moment, so this requires some
> more work.

Here is an updated patch which adds platform data to fec. I've also addressed 
the comment of Greg. I'll post a patch updating the i.MX25 PDK platform code 
shortly.

baruch

Re: [PATCH 4/4] mx25: add support for FEC on i.MX25 PDK

[Baruch Siach]

Hi Sascha,

Updated i.MX25 PDK platform code below.

baruch

>From 7c6e25a9a4c908c9d407b0740e58b1884d5a33f0 Mon Sep 17 00:00:00 2001
Message-Id: <7c6e25a9a4c908c9d407b0740e58b1884d5a33f0.1260866660.git.baruch@tkos.co.il>
From: Baruch Siach <baruch@tkos.co.il>
Date: Mon, 14 Dec 2009 11:14:40 +0200
Subject: [PATCH] mx25: add support for FEC on i.MX25 PDK

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
---
 arch/arm/mach-mx25/clock.c            |    2 +
 arch/arm/mach-mx25/devices.c          |   19 +++++++++++++
 arch/arm/mach-mx25/devices.h          |    1 +
 arch/arm/mach-mx25/mx25pdk.c          |   46 +++++++++++++++++++++++++++++++-
 arch/arm/plat-mxc/include/mach/mx25.h |    4 +++
 5 files changed, 70 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-mx25/clock.c b/arch/arm/mach-mx25/clock.c
index dbbbcc6..ea8c3da 100644
--- a/arch/arm/mach-mx25/clock.c
+++ b/arch/arm/mach-mx25/clock.c
@@ -173,6 +173,7 @@ DEFINE_CLOCK(pwm4_clk,	 0, CCM_CGCR2,  2, get_rate_ipg, NULL);
 DEFINE_CLOCK(kpp_clk,	 0, CCM_CGCR1, 28, get_rate_ipg, NULL);
 DEFINE_CLOCK(tsc_clk,	 0, CCM_CGCR2, 13, get_rate_ipg, NULL);
 DEFINE_CLOCK(i2c_clk,	 0, CCM_CGCR0,  6, get_rate_i2c, NULL);
+DEFINE_CLOCK(fec_clk,	 0, CCM_CGCR0, 23, get_rate_ipg, NULL);
 
 #define _REGISTER_CLOCK(d, n, c)	\
 	{				\
@@ -204,6 +205,7 @@ static struct clk_lookup lookups[] = {
 	_REGISTER_CLOCK("imx-i2c.0", NULL, i2c_clk)
 	_REGISTER_CLOCK("imx-i2c.1", NULL, i2c_clk)
 	_REGISTER_CLOCK("imx-i2c.2", NULL, i2c_clk)
+	_REGISTER_CLOCK("fec.0", NULL, fec_clk)
 };
 
 int __init mx25_clocks_init(unsigned long fref)
diff --git a/arch/arm/mach-mx25/devices.c b/arch/arm/mach-mx25/devices.c
index 63511de..9fdeea1 100644
--- a/arch/arm/mach-mx25/devices.c
+++ b/arch/arm/mach-mx25/devices.c
@@ -419,3 +419,22 @@ int __init mxc_register_gpios(void)
 	return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports));
 }
 
+static struct resource mx25_fec_resources[] = {
+	{
+		.start	= MX25_FEC_BASE_ADDR,
+		.end	= MX25_FEC_BASE_ADDR + 0xfff,
+		.flags	= IORESOURCE_MEM,
+	},
+	{
+		.start	= MX25_INT_FEC,
+		.end	= MX25_INT_FEC,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+struct platform_device mx25_fec_device = {
+	.name	= "fec",
+	.id	= 0,
+	.num_resources	= ARRAY_SIZE(mx25_fec_resources),
+	.resource	= mx25_fec_resources,
+};
diff --git a/arch/arm/mach-mx25/devices.h b/arch/arm/mach-mx25/devices.h
index fe6bf88..fe5420f 100644
--- a/arch/arm/mach-mx25/devices.h
+++ b/arch/arm/mach-mx25/devices.h
@@ -17,3 +17,4 @@ extern struct platform_device mxc_keypad_device;
 extern struct platform_device mxc_i2c_device0;
 extern struct platform_device mxc_i2c_device1;
 extern struct platform_device mxc_i2c_device2;
+extern struct platform_device mx25_fec_device;
diff --git a/arch/arm/mach-mx25/mx25pdk.c b/arch/arm/mach-mx25/mx25pdk.c
index d23ae57..921bc99 100644
--- a/arch/arm/mach-mx25/mx25pdk.c
+++ b/arch/arm/mach-mx25/mx25pdk.c
@@ -18,10 +18,11 @@
 
 #include <linux/types.h>
 #include <linux/init.h>
+#include <linux/delay.h>
 #include <linux/clk.h>
 #include <linux/irq.h>
 #include <linux/gpio.h>
-#include <linux/smsc911x.h>
+#include <linux/fec.h>
 #include <linux/platform_device.h>
 
 #include <mach/hardware.h>
@@ -35,16 +36,57 @@
 #include <mach/mx25.h>
 #include <mach/mxc_nand.h>
 #include "devices.h"
-#include <mach/iomux-v3.h>
+#include <mach/iomux.h>
 
 static struct imxuart_platform_data uart_pdata = {
 	.flags = IMXUART_HAVE_RTSCTS,
 };
 
+static struct pad_desc mx25pdk_pads[] = {
+	MX25_PAD_FEC_MDC__FEC_MDC,
+	MX25_PAD_FEC_MDIO__FEC_MDIO,
+	MX25_PAD_FEC_TDATA0__FEC_TDATA0,
+	MX25_PAD_FEC_TDATA1__FEC_TDATA1,
+	MX25_PAD_FEC_TX_EN__FEC_TX_EN,
+	MX25_PAD_FEC_RDATA0__FEC_RDATA0,
+	MX25_PAD_FEC_RDATA1__FEC_RDATA1,
+	MX25_PAD_FEC_RX_DV__FEC_RX_DV,
+	MX25_PAD_FEC_TX_CLK__FEC_TX_CLK,
+	MX25_PAD_A17__GPIO_2_3, /* FEC_EN, GPIO 35 */
+	MX25_PAD_D12__GPIO_4_8, /* FEC_RESET_B, GPIO 104 */
+};
+
+static struct fec_platform_data mx25_fec_pdata = {
+        .phy    = PHY_INTERFACE_MODE_RMII,
+};
+
+#define FEC_ENABLE_GPIO		35
+#define FEC_RESET_B_GPIO	104
+
+static void __init mx25pdk_fec_reset(void)
+{
+	gpio_request(FEC_ENABLE_GPIO, "FEC PHY enable");
+	gpio_request(FEC_RESET_B_GPIO, "FEC PHY reset");
+
+	gpio_direction_output(FEC_ENABLE_GPIO, 0);  /* drop PHY power */
+	gpio_direction_output(FEC_RESET_B_GPIO, 0); /* assert reset */
+	udelay(2);
+
+	/* turn on PHY power and lift reset */
+	gpio_set_value(FEC_ENABLE_GPIO, 1);
+	gpio_set_value(FEC_RESET_B_GPIO, 1);
+}
+
 static void __init mx25pdk_init(void)
 {
+	mxc_iomux_v3_setup_multiple_pads(mx25pdk_pads,
+			ARRAY_SIZE(mx25pdk_pads));
+
 	mxc_register_device(&mxc_uart_device0, &uart_pdata);
 	mxc_register_device(&mxc_usbh2, NULL);
+
+	mx25pdk_fec_reset();
+	mxc_register_device(&mx25_fec_device, &mx25_fec_pdata);
 }
 
 static void __init mx25pdk_timer_init(void)
diff --git a/arch/arm/plat-mxc/include/mach/mx25.h b/arch/arm/plat-mxc/include/mach/mx25.h
index ec64bd9..106f651 100644
--- a/arch/arm/plat-mxc/include/mach/mx25.h
+++ b/arch/arm/plat-mxc/include/mach/mx25.h
@@ -41,4 +41,8 @@
 #define UART1_BASE_ADDR			0x43f90000
 #define UART2_BASE_ADDR			0x43f94000
 
+#define MX25_FEC_BASE_ADDR		0x50038000
+
+#define MX25_INT_FEC	57
+
 #endif /* __MACH_MX25_H__ */
-- 
1.6.5


-- 
                                                     ~. .~   Tk Open Systems
=}------------------------------------------------ooO--U--Ooo------------{=
   - baruch@tkos.co.il - tel: +972.2.679.5364, http://www.tkos.co.il -

[PATCH 4/4] mx25: add support for FEC on i.MX25 PDK

[Baruch Siach]

Hi Sascha,

Updated i.MX25 PDK platform code below.

baruch

Re: [PATCH 3/4] fec: add support for Freescale i.MX25 PDK (3DS)

[Greg Ungerer]

Hi Baruch,

On 12/15/2009 06:31 PM, Baruch Siach wrote:
> Hi Sascha,
>
> On Mon, Dec 14, 2009 at 11:33:48AM +0100, Sascha Hauer wrote:
>> On Mon, Dec 14, 2009 at 12:19:41PM +0200, Baruch Siach wrote:
>>> +	if (!machine_is_mx25_3ds())
>>> +		return;
>>
>> We should add a flag in platform data for this. Unfortunately the fec
>> driver has no platform data at all at the moment, so this requires some
>> more work.
>
> Here is an updated patch which adds platform data to fec. I've also addressed
> the comment of Greg. I'll post a patch updating the i.MX25 PDK platform code
> shortly.
>
> baruch
>
>> From ff971bbec84501cab714703786dd4058db4a89e4 Mon Sep 17 00:00:00 2001
> Message-Id:<ff971bbec84501cab714703786dd4058db4a89e4.1260865551.git.baruch@tkos.co.il>
> From: Baruch Siach<baruch@tkos.co.il>
> Date: Mon, 14 Dec 2009 10:36:50 +0200
> Subject: [PATCH] fec: add support for PHY interface platform data
>
> The i.MX25 PDK uses RMII to communicate with its PHY. This patch adds the
> ability to configure RMII, based on platform data.
>
> Signed-off-by: Baruch Siach<baruch@tkos.co.il>
> ---
>   drivers/net/fec.c   |   22 ++++++++++++++++++++++
>   drivers/net/fec.h   |    2 ++
>   include/linux/fec.h |   21 +++++++++++++++++++++
>   3 files changed, 45 insertions(+), 0 deletions(-)
>   create mode 100644 include/linux/fec.h
>
> diff --git a/drivers/net/fec.c b/drivers/net/fec.c
> index 16a1d58..b9a5822 100644
> --- a/drivers/net/fec.c
> +++ b/drivers/net/fec.c
> @@ -40,6 +40,7 @@
>   #include<linux/irq.h>
>   #include<linux/clk.h>
>   #include<linux/platform_device.h>
> +#include<linux/fec.h>
>
>   #include<asm/cacheflush.h>
>
> @@ -198,6 +199,7 @@ struct fec_enet_private {
>   	uint	phy_speed;
>   	phy_info_t const	*phy;
>   	struct work_struct phy_task;
> +	phy_interface_t	phy_interface;
>
>   	uint	sequence_done;
>   	uint	mii_phy_task_queued;
> @@ -1810,6 +1812,21 @@ fec_restart(struct net_device *dev, int duplex)
>   	/* Set MII speed */
>   	writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
>
> +#ifndef CONFIG_M5272

I would suggest making this conditional on FEC_MIIGSK_ENR.
Although the CONFIG_M5272 is the only case here currently,
that may change over the years. And using this here may not
be obvious to the causual code reader, since the register
offset definitions don't explicitly key on CONFIG_M5272.

Regards
Greg



> +	if (fep->phy_interface == PHY_INTERFACE_MODE_RMII) {
> +		/* disable the gasket and wait */
> +		writel(0, fep->hwp + FEC_MIIGSK_ENR);
> +		while (readl(fep->hwp + FEC_MIIGSK_ENR)&  4)
> +			udelay(1);
> +
> +		/* configure the gasket: RMII, 50 MHz, no loopback, no echo */
> +		writel(1, fep->hwp + FEC_MIIGSK_CFGR);
> +
> +		/* re-enable the gasket */
> +		writel(2, fep->hwp + FEC_MIIGSK_ENR);
> +	}
> +#endif
> +
>   	/* And last, enable the transmit and receive processing */
>   	writel(2, fep->hwp + FEC_ECNTRL);
>   	writel(0, fep->hwp + FEC_R_DES_ACTIVE);
> @@ -1847,6 +1864,7 @@ static int __devinit
>   fec_probe(struct platform_device *pdev)
>   {
>   	struct fec_enet_private *fep;
> +	struct fec_platform_data *pdata;
>   	struct net_device *ndev;
>   	int i, irq, ret = 0;
>   	struct resource *r;
> @@ -1879,6 +1897,10 @@ fec_probe(struct platform_device *pdev)
>
>   	platform_set_drvdata(pdev, ndev);
>
> +	pdata = pdev->dev.platform_data;
> +	if (pdata)
> +		fep->phy_interface = pdata->phy;
> +
>   	/* This device has up to three irqs on some platforms */
>   	for (i = 0; i<  3; i++) {
>   		irq = platform_get_irq(pdev, i);
> diff --git a/drivers/net/fec.h b/drivers/net/fec.h
> index cc47f3f..2c48b25 100644
> --- a/drivers/net/fec.h
> +++ b/drivers/net/fec.h
> @@ -43,6 +43,8 @@
>   #define FEC_R_DES_START		0x180 /* Receive descriptor ring */
>   #define FEC_X_DES_START		0x184 /* Transmit descriptor ring */
>   #define FEC_R_BUFF_SIZE		0x188 /* Maximum receive buff size */
> +#define FEC_MIIGSK_CFGR		0x300 /* MIIGSK Configuration reg */
> +#define FEC_MIIGSK_ENR		0x308 /* MIIGSK Enable reg */
>
>   #else
>
> diff --git a/include/linux/fec.h b/include/linux/fec.h
> new file mode 100644
> index 0000000..5d3523d
> --- /dev/null
> +++ b/include/linux/fec.h
> @@ -0,0 +1,21 @@
> +/* include/linux/fec.h
> + *
> + * Copyright (c) 2009 Orex Computed Radiography
> + *   Baruch Siach<baruch@tkos.co.il>
> + *
> + * Header file for the FEC platform data
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +#ifndef __LINUX_FEC_H__
> +#define __LINUX_FEC_H__
> +
> +#include<linux/phy.h>
> +
> +struct fec_platform_data {
> +	phy_interface_t phy;
> +};
> +
> +#endif

-- 
------------------------------------------------------------------------
Greg Ungerer  --  Principal Engineer        EMAIL:     gerg@snapgear.com
SnapGear Group, McAfee                      PHONE:       +61 7 3435 2888
8 Gardner Close,                            FAX:         +61 7 3891 3630
Milton, QLD, 4064, Australia                WEB: http://www.SnapGear.com

[PATCH 3/4] fec: add support for Freescale i.MX25 PDK (3DS)

[Greg Ungerer]

Hi Baruch,

On 12/15/2009 06:31 PM, Baruch Siach wrote:
> Hi Sascha,
>
> On Mon, Dec 14, 2009 at 11:33:48AM +0100, Sascha Hauer wrote:
>> On Mon, Dec 14, 2009 at 12:19:41PM +0200, Baruch Siach wrote:
>>> +	if (!machine_is_mx25_3ds())
>>> +		return;
>>
>> We should add a flag in platform data for this. Unfortunately the fec
>> driver has no platform data at all at the moment, so this requires some
>> more work.
>
> Here is an updated patch which adds platform data to fec. I've also addressed
> the comment of Greg. I'll post a patch updating the i.MX25 PDK platform code
> shortly.
>
> baruch
>
>> From ff971bbec84501cab714703786dd4058db4a89e4 Mon Sep 17 00:00:00 2001
> Message-Id:<ff971bbec84501cab714703786dd4058db4a89e4.1260865551.git.baruch@tkos.co.il>
> From: Baruch Siach<baruch@tkos.co.il>
> Date: Mon, 14 Dec 2009 10:36:50 +0200
> Subject: [PATCH] fec: add support for PHY interface platform data
>
> The i.MX25 PDK uses RMII to communicate with its PHY. This patch adds the
> ability to configure RMII, based on platform data.
>
> Signed-off-by: Baruch Siach<baruch@tkos.co.il>
> ---
>   drivers/net/fec.c   |   22 ++++++++++++++++++++++
>   drivers/net/fec.h   |    2 ++
>   include/linux/fec.h |   21 +++++++++++++++++++++
>   3 files changed, 45 insertions(+), 0 deletions(-)
>   create mode 100644 include/linux/fec.h
>
> diff --git a/drivers/net/fec.c b/drivers/net/fec.c
> index 16a1d58..b9a5822 100644
> --- a/drivers/net/fec.c
> +++ b/drivers/net/fec.c
> @@ -40,6 +40,7 @@
>   #include<linux/irq.h>
>   #include<linux/clk.h>
>   #include<linux/platform_device.h>
> +#include<linux/fec.h>
>
>   #include<asm/cacheflush.h>
>
> @@ -198,6 +199,7 @@ struct fec_enet_private {
>   	uint	phy_speed;
>   	phy_info_t const	*phy;
>   	struct work_struct phy_task;
> +	phy_interface_t	phy_interface;
>
>   	uint	sequence_done;
>   	uint	mii_phy_task_queued;
> @@ -1810,6 +1812,21 @@ fec_restart(struct net_device *dev, int duplex)
>   	/* Set MII speed */
>   	writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
>
> +#ifndef CONFIG_M5272

I would suggest making this conditional on FEC_MIIGSK_ENR.
Although the CONFIG_M5272 is the only case here currently,
that may change over the years. And using this here may not
be obvious to the causual code reader, since the register
offset definitions don't explicitly key on CONFIG_M5272.

Regards
Greg



> +	if (fep->phy_interface == PHY_INTERFACE_MODE_RMII) {
> +		/* disable the gasket and wait */
> +		writel(0, fep->hwp + FEC_MIIGSK_ENR);
> +		while (readl(fep->hwp + FEC_MIIGSK_ENR)&  4)
> +			udelay(1);
> +
> +		/* configure the gasket: RMII, 50 MHz, no loopback, no echo */
> +		writel(1, fep->hwp + FEC_MIIGSK_CFGR);
> +
> +		/* re-enable the gasket */
> +		writel(2, fep->hwp + FEC_MIIGSK_ENR);
> +	}
> +#endif
> +
>   	/* And last, enable the transmit and receive processing */
>   	writel(2, fep->hwp + FEC_ECNTRL);
>   	writel(0, fep->hwp + FEC_R_DES_ACTIVE);
> @@ -1847,6 +1864,7 @@ static int __devinit
>   fec_probe(struct platform_device *pdev)
>   {
>   	struct fec_enet_private *fep;
> +	struct fec_platform_data *pdata;
>   	struct net_device *ndev;
>   	int i, irq, ret = 0;
>   	struct resource *r;
> @@ -1879,6 +1897,10 @@ fec_probe(struct platform_device *pdev)
>
>   	platform_set_drvdata(pdev, ndev);
>
> +	pdata = pdev->dev.platform_data;
> +	if (pdata)
> +		fep->phy_interface = pdata->phy;
> +
>   	/* This device has up to three irqs on some platforms */
>   	for (i = 0; i<  3; i++) {
>   		irq = platform_get_irq(pdev, i);
> diff --git a/drivers/net/fec.h b/drivers/net/fec.h
> index cc47f3f..2c48b25 100644
> --- a/drivers/net/fec.h
> +++ b/drivers/net/fec.h
> @@ -43,6 +43,8 @@
>   #define FEC_R_DES_START		0x180 /* Receive descriptor ring */
>   #define FEC_X_DES_START		0x184 /* Transmit descriptor ring */
>   #define FEC_R_BUFF_SIZE		0x188 /* Maximum receive buff size */
> +#define FEC_MIIGSK_CFGR		0x300 /* MIIGSK Configuration reg */
> +#define FEC_MIIGSK_ENR		0x308 /* MIIGSK Enable reg */
>
>   #else
>
> diff --git a/include/linux/fec.h b/include/linux/fec.h
> new file mode 100644
> index 0000000..5d3523d
> --- /dev/null
> +++ b/include/linux/fec.h
> @@ -0,0 +1,21 @@
> +/* include/linux/fec.h
> + *
> + * Copyright (c) 2009 Orex Computed Radiography
> + *   Baruch Siach<baruch@tkos.co.il>
> + *
> + * Header file for the FEC platform data
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +#ifndef __LINUX_FEC_H__
> +#define __LINUX_FEC_H__
> +
> +#include<linux/phy.h>
> +
> +struct fec_platform_data {
> +	phy_interface_t phy;
> +};
> +
> +#endif

-- 
------------------------------------------------------------------------
Greg Ungerer  --  Principal Engineer        EMAIL:     gerg at snapgear.com
SnapGear Group, McAfee                      PHONE:       +61 7 3435 2888
8 Gardner Close,                            FAX:         +61 7 3891 3630
Milton, QLD, 4064, Australia                WEB: http://www.SnapGear.com

Re: [PATCH 3/4] fec: add support for Freescale i.MX25 PDK (3DS)

[Baruch Siach]

Hi Greg,

On Tue, Dec 15, 2009 at 09:52:24PM +1000, Greg Ungerer wrote:
> On 12/15/2009 06:31 PM, Baruch Siach wrote:

[snip]

> >+#ifndef CONFIG_M5272
> 
> I would suggest making this conditional on FEC_MIIGSK_ENR.
> Although the CONFIG_M5272 is the only case here currently,
> that may change over the years. And using this here may not
> be obvious to the causual code reader, since the register
> offset definitions don't explicitly key on CONFIG_M5272.

OK, I'll change this conditional.

Can I take this as an Ack from you?

baruch

> 
> >+	if (fep->phy_interface == PHY_INTERFACE_MODE_RMII) {
> >+		/* disable the gasket and wait */
> >+		writel(0, fep->hwp + FEC_MIIGSK_ENR);
> >+		while (readl(fep->hwp + FEC_MIIGSK_ENR)&  4)
> >+			udelay(1);
> >+
> >+		/* configure the gasket: RMII, 50 MHz, no loopback, no echo */
> >+		writel(1, fep->hwp + FEC_MIIGSK_CFGR);
> >+
> >+		/* re-enable the gasket */
> >+		writel(2, fep->hwp + FEC_MIIGSK_ENR);
> >+	}
> >+#endif

-- 
                                                     ~. .~   Tk Open Systems
=}------------------------------------------------ooO--U--Ooo------------{=
   - baruch@tkos.co.il - tel: +972.2.679.5364, http://www.tkos.co.il -

[PATCH 3/4] fec: add support for Freescale i.MX25 PDK (3DS)

[Baruch Siach]

Hi Greg,

On Tue, Dec 15, 2009 at 09:52:24PM +1000, Greg Ungerer wrote:
> On 12/15/2009 06:31 PM, Baruch Siach wrote:

[snip]

> >+#ifndef CONFIG_M5272
> 
> I would suggest making this conditional on FEC_MIIGSK_ENR.
> Although the CONFIG_M5272 is the only case here currently,
> that may change over the years. And using this here may not
> be obvious to the causual code reader, since the register
> offset definitions don't explicitly key on CONFIG_M5272.

OK, I'll change this conditional.

Can I take this as an Ack from you?

baruch

> 
> >+	if (fep->phy_interface == PHY_INTERFACE_MODE_RMII) {
> >+		/* disable the gasket and wait */
> >+		writel(0, fep->hwp + FEC_MIIGSK_ENR);
> >+		while (readl(fep->hwp + FEC_MIIGSK_ENR)&  4)
> >+			udelay(1);
> >+
> >+		/* configure the gasket: RMII, 50 MHz, no loopback, no echo */
> >+		writel(1, fep->hwp + FEC_MIIGSK_CFGR);
> >+
> >+		/* re-enable the gasket */
> >+		writel(2, fep->hwp + FEC_MIIGSK_ENR);
> >+	}
> >+#endif

-- 
                                                     ~. .~   Tk Open Systems
=}------------------------------------------------ooO--U--Ooo------------{=
   - baruch at tkos.co.il - tel: +972.2.679.5364, http://www.tkos.co.il -

Re: [PATCH 3/4] fec: add support for Freescale i.MX25 PDK (3DS)

[Greg Ungerer]

Hi Baruch,

Baruch Siach wrote:
> Hi Greg,
> 
> On Tue, Dec 15, 2009 at 09:52:24PM +1000, Greg Ungerer wrote:
>> On 12/15/2009 06:31 PM, Baruch Siach wrote:
> 
> [snip]
> 
>>> +#ifndef CONFIG_M5272
>> I would suggest making this conditional on FEC_MIIGSK_ENR.
>> Although the CONFIG_M5272 is the only case here currently,
>> that may change over the years. And using this here may not
>> be obvious to the causual code reader, since the register
>> offset definitions don't explicitly key on CONFIG_M5272.
> 
> OK, I'll change this conditional.
> 
> Can I take this as an Ack from you?

With that conditional check changed, sure:

Acked-by:  Greg Ungerer <gerg@uclinux.org>

Regards
Greg



>>> +	if (fep->phy_interface == PHY_INTERFACE_MODE_RMII) {
>>> +		/* disable the gasket and wait */
>>> +		writel(0, fep->hwp + FEC_MIIGSK_ENR);
>>> +		while (readl(fep->hwp + FEC_MIIGSK_ENR)&  4)
>>> +			udelay(1);
>>> +
>>> +		/* configure the gasket: RMII, 50 MHz, no loopback, no echo */
>>> +		writel(1, fep->hwp + FEC_MIIGSK_CFGR);
>>> +
>>> +		/* re-enable the gasket */
>>> +		writel(2, fep->hwp + FEC_MIIGSK_ENR);
>>> +	}
>>> +#endif
> 


-- 
------------------------------------------------------------------------
Greg Ungerer  --  Principal Engineer        EMAIL:     gerg@snapgear.com
SnapGear Group, McAfee                      PHONE:       +61 7 3435 2888
8 Gardner Close                             FAX:         +61 7 3217 5323
Milton, QLD, 4064, Australia                WEB: http://www.SnapGear.com

[PATCH 3/4] fec: add support for Freescale i.MX25 PDK (3DS)

[Greg Ungerer]

Hi Baruch,

Baruch Siach wrote:
> Hi Greg,
> 
> On Tue, Dec 15, 2009 at 09:52:24PM +1000, Greg Ungerer wrote:
>> On 12/15/2009 06:31 PM, Baruch Siach wrote:
> 
> [snip]
> 
>>> +#ifndef CONFIG_M5272
>> I would suggest making this conditional on FEC_MIIGSK_ENR.
>> Although the CONFIG_M5272 is the only case here currently,
>> that may change over the years. And using this here may not
>> be obvious to the causual code reader, since the register
>> offset definitions don't explicitly key on CONFIG_M5272.
> 
> OK, I'll change this conditional.
> 
> Can I take this as an Ack from you?

With that conditional check changed, sure:

Acked-by:  Greg Ungerer <gerg@uclinux.org>

Regards
Greg



>>> +	if (fep->phy_interface == PHY_INTERFACE_MODE_RMII) {
>>> +		/* disable the gasket and wait */
>>> +		writel(0, fep->hwp + FEC_MIIGSK_ENR);
>>> +		while (readl(fep->hwp + FEC_MIIGSK_ENR)&  4)
>>> +			udelay(1);
>>> +
>>> +		/* configure the gasket: RMII, 50 MHz, no loopback, no echo */
>>> +		writel(1, fep->hwp + FEC_MIIGSK_CFGR);
>>> +
>>> +		/* re-enable the gasket */
>>> +		writel(2, fep->hwp + FEC_MIIGSK_ENR);
>>> +	}
>>> +#endif
> 


-- 
------------------------------------------------------------------------
Greg Ungerer  --  Principal Engineer        EMAIL:     gerg at snapgear.com
SnapGear Group, McAfee                      PHONE:       +61 7 3435 2888
8 Gardner Close                             FAX:         +61 7 3217 5323
Milton, QLD, 4064, Australia                WEB: http://www.SnapGear.com

Re: [PATCH 3/4] fec: add support for Freescale i.MX25 PDK (3DS)

[Baruch Siach]

Hi Greg,

On Wed, Dec 16, 2009 at 10:13:56AM +1000, Greg Ungerer wrote:
> Baruch Siach wrote:
> >On Tue, Dec 15, 2009 at 09:52:24PM +1000, Greg Ungerer wrote:
> >>On 12/15/2009 06:31 PM, Baruch Siach wrote:
> >>>+#ifndef CONFIG_M5272
> >>I would suggest making this conditional on FEC_MIIGSK_ENR.
> >>Although the CONFIG_M5272 is the only case here currently,
> >>that may change over the years. And using this here may not
> >>be obvious to the causual code reader, since the register
> >>offset definitions don't explicitly key on CONFIG_M5272.
> >
> >OK, I'll change this conditional.
> >
> >Can I take this as an Ack from you?
> 
> With that conditional check changed, sure:
> 
> Acked-by:  Greg Ungerer <gerg@uclinux.org>

Thanks. The updated patch below.

baruch

>From 2d0751f868519978603b16baa197bfb9f9ec9e2e Mon Sep 17 00:00:00 2001
Message-Id: <2d0751f868519978603b16baa197bfb9f9ec9e2e.1260945080.git.baruch@tkos.co.il>
From: Baruch Siach <baruch@tkos.co.il>
Date: Mon, 14 Dec 2009 10:36:50 +0200
Subject: [PATCH] fec: add support for PHY interface platform data

The i.MX25 PDK uses RMII to communicate with its PHY. This patch adds the
ability to configure RMII, based on platform data.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Acked-by:  Greg Ungerer <gerg@uclinux.org>
---
 drivers/net/fec.c   |   22 ++++++++++++++++++++++
 drivers/net/fec.h   |    2 ++
 include/linux/fec.h |   21 +++++++++++++++++++++
 3 files changed, 45 insertions(+), 0 deletions(-)
 create mode 100644 include/linux/fec.h

diff --git a/drivers/net/fec.c b/drivers/net/fec.c
index 16a1d58..a7cfe0d 100644
--- a/drivers/net/fec.c
+++ b/drivers/net/fec.c
@@ -40,6 +40,7 @@
 #include <linux/irq.h>
 #include <linux/clk.h>
 #include <linux/platform_device.h>
+#include <linux/fec.h>
 
 #include <asm/cacheflush.h>
 
@@ -198,6 +199,7 @@ struct fec_enet_private {
 	uint	phy_speed;
 	phy_info_t const	*phy;
 	struct work_struct phy_task;
+	phy_interface_t	phy_interface;
 
 	uint	sequence_done;
 	uint	mii_phy_task_queued;
@@ -1810,6 +1812,21 @@ fec_restart(struct net_device *dev, int duplex)
 	/* Set MII speed */
 	writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
 
+#ifdef FEC_MIIGSK_ENR
+	if (fep->phy_interface == PHY_INTERFACE_MODE_RMII) {
+		/* disable the gasket and wait */
+		writel(0, fep->hwp + FEC_MIIGSK_ENR);
+		while (readl(fep->hwp + FEC_MIIGSK_ENR) & 4)
+			udelay(1);
+
+		/* configure the gasket: RMII, 50 MHz, no loopback, no echo */
+		writel(1, fep->hwp + FEC_MIIGSK_CFGR);
+
+		/* re-enable the gasket */
+		writel(2, fep->hwp + FEC_MIIGSK_ENR);
+	}
+#endif
+
 	/* And last, enable the transmit and receive processing */
 	writel(2, fep->hwp + FEC_ECNTRL);
 	writel(0, fep->hwp + FEC_R_DES_ACTIVE);
@@ -1847,6 +1864,7 @@ static int __devinit
 fec_probe(struct platform_device *pdev)
 {
 	struct fec_enet_private *fep;
+	struct fec_platform_data *pdata;
 	struct net_device *ndev;
 	int i, irq, ret = 0;
 	struct resource *r;
@@ -1879,6 +1897,10 @@ fec_probe(struct platform_device *pdev)
 
 	platform_set_drvdata(pdev, ndev);
 
+	pdata = pdev->dev.platform_data;
+	if (pdata)
+		fep->phy_interface = pdata->phy;
+
 	/* This device has up to three irqs on some platforms */
 	for (i = 0; i < 3; i++) {
 		irq = platform_get_irq(pdev, i);
diff --git a/drivers/net/fec.h b/drivers/net/fec.h
index cc47f3f..2c48b25 100644
--- a/drivers/net/fec.h
+++ b/drivers/net/fec.h
@@ -43,6 +43,8 @@
 #define FEC_R_DES_START		0x180 /* Receive descriptor ring */
 #define FEC_X_DES_START		0x184 /* Transmit descriptor ring */
 #define FEC_R_BUFF_SIZE		0x188 /* Maximum receive buff size */
+#define FEC_MIIGSK_CFGR		0x300 /* MIIGSK Configuration reg */
+#define FEC_MIIGSK_ENR		0x308 /* MIIGSK Enable reg */
 
 #else
 
diff --git a/include/linux/fec.h b/include/linux/fec.h
new file mode 100644
index 0000000..5d3523d
--- /dev/null
+++ b/include/linux/fec.h
@@ -0,0 +1,21 @@
+/* include/linux/fec.h
+ *
+ * Copyright (c) 2009 Orex Computed Radiography
+ *   Baruch Siach <baruch@tkos.co.il>
+ *
+ * Header file for the FEC platform data
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef __LINUX_FEC_H__
+#define __LINUX_FEC_H__
+
+#include <linux/phy.h>
+
+struct fec_platform_data {
+	phy_interface_t phy;
+};
+
+#endif
-- 
1.6.5


-- 
                                                     ~. .~   Tk Open Systems
=}------------------------------------------------ooO--U--Ooo------------{=
   - baruch@tkos.co.il - tel: +972.2.679.5364, http://www.tkos.co.il -

[PATCH 3/4] fec: add support for Freescale i.MX25 PDK (3DS)

[Baruch Siach]

Hi Greg,

On Wed, Dec 16, 2009 at 10:13:56AM +1000, Greg Ungerer wrote:
> Baruch Siach wrote:
> >On Tue, Dec 15, 2009 at 09:52:24PM +1000, Greg Ungerer wrote:
> >>On 12/15/2009 06:31 PM, Baruch Siach wrote:
> >>>+#ifndef CONFIG_M5272
> >>I would suggest making this conditional on FEC_MIIGSK_ENR.
> >>Although the CONFIG_M5272 is the only case here currently,
> >>that may change over the years. And using this here may not
> >>be obvious to the causual code reader, since the register
> >>offset definitions don't explicitly key on CONFIG_M5272.
> >
> >OK, I'll change this conditional.
> >
> >Can I take this as an Ack from you?
> 
> With that conditional check changed, sure:
> 
> Acked-by:  Greg Ungerer <gerg@uclinux.org>

Thanks. The updated patch below.

baruch

Re: [PATCH 3/4] fec: add support for Freescale i.MX25 PDK (3DS)

[Greg Ungerer]

Hi Baruch,

Baruch Siach wrote:
> Hi Greg,
> 
> On Wed, Dec 16, 2009 at 10:13:56AM +1000, Greg Ungerer wrote:
>> Baruch Siach wrote:
>>> On Tue, Dec 15, 2009 at 09:52:24PM +1000, Greg Ungerer wrote:
>>>> On 12/15/2009 06:31 PM, Baruch Siach wrote:
>>>>> +#ifndef CONFIG_M5272
>>>> I would suggest making this conditional on FEC_MIIGSK_ENR.
>>>> Although the CONFIG_M5272 is the only case here currently,
>>>> that may change over the years. And using this here may not
>>>> be obvious to the causual code reader, since the register
>>>> offset definitions don't explicitly key on CONFIG_M5272.
>>> OK, I'll change this conditional.
>>>
>>> Can I take this as an Ack from you?
>> With that conditional check changed, sure:
>>
>> Acked-by:  Greg Ungerer <gerg@uclinux.org>
> 
> Thanks. The updated patch below.
> 
> baruch
> 
>>From 2d0751f868519978603b16baa197bfb9f9ec9e2e Mon Sep 17 00:00:00 2001
> Message-Id: <2d0751f868519978603b16baa197bfb9f9ec9e2e.1260945080.git.baruch@tkos.co.il>
> From: Baruch Siach <baruch@tkos.co.il>
> Date: Mon, 14 Dec 2009 10:36:50 +0200
> Subject: [PATCH] fec: add support for PHY interface platform data
> 
> The i.MX25 PDK uses RMII to communicate with its PHY. This patch adds the
> ability to configure RMII, based on platform data.
> 
> Signed-off-by: Baruch Siach <baruch@tkos.co.il>
> Acked-by:  Greg Ungerer <gerg@uclinux.org>
> ---
>  drivers/net/fec.c   |   22 ++++++++++++++++++++++
>  drivers/net/fec.h   |    2 ++
>  include/linux/fec.h |   21 +++++++++++++++++++++
>  3 files changed, 45 insertions(+), 0 deletions(-)
>  create mode 100644 include/linux/fec.h
> 
> diff --git a/drivers/net/fec.c b/drivers/net/fec.c
> index 16a1d58..a7cfe0d 100644
> --- a/drivers/net/fec.c
> +++ b/drivers/net/fec.c
> @@ -40,6 +40,7 @@
>  #include <linux/irq.h>
>  #include <linux/clk.h>
>  #include <linux/platform_device.h>
> +#include <linux/fec.h>
>  
>  #include <asm/cacheflush.h>
>  
> @@ -198,6 +199,7 @@ struct fec_enet_private {
>  	uint	phy_speed;
>  	phy_info_t const	*phy;
>  	struct work_struct phy_task;
> +	phy_interface_t	phy_interface;
>  
>  	uint	sequence_done;
>  	uint	mii_phy_task_queued;
> @@ -1810,6 +1812,21 @@ fec_restart(struct net_device *dev, int duplex)
>  	/* Set MII speed */
>  	writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
>  
> +#ifdef FEC_MIIGSK_ENR
> +	if (fep->phy_interface == PHY_INTERFACE_MODE_RMII) {
> +		/* disable the gasket and wait */
> +		writel(0, fep->hwp + FEC_MIIGSK_ENR);
> +		while (readl(fep->hwp + FEC_MIIGSK_ENR) & 4)
> +			udelay(1);
> +
> +		/* configure the gasket: RMII, 50 MHz, no loopback, no echo */
> +		writel(1, fep->hwp + FEC_MIIGSK_CFGR);
> +
> +		/* re-enable the gasket */
> +		writel(2, fep->hwp + FEC_MIIGSK_ENR);
> +	}
> +#endif
> +
>  	/* And last, enable the transmit and receive processing */
>  	writel(2, fep->hwp + FEC_ECNTRL);
>  	writel(0, fep->hwp + FEC_R_DES_ACTIVE);
> @@ -1847,6 +1864,7 @@ static int __devinit
>  fec_probe(struct platform_device *pdev)
>  {
>  	struct fec_enet_private *fep;
> +	struct fec_platform_data *pdata;
>  	struct net_device *ndev;
>  	int i, irq, ret = 0;
>  	struct resource *r;
> @@ -1879,6 +1897,10 @@ fec_probe(struct platform_device *pdev)
>  
>  	platform_set_drvdata(pdev, ndev);
>  
> +	pdata = pdev->dev.platform_data;
> +	if (pdata)
> +		fep->phy_interface = pdata->phy;
> +
>  	/* This device has up to three irqs on some platforms */
>  	for (i = 0; i < 3; i++) {
>  		irq = platform_get_irq(pdev, i);
> diff --git a/drivers/net/fec.h b/drivers/net/fec.h
> index cc47f3f..2c48b25 100644
> --- a/drivers/net/fec.h
> +++ b/drivers/net/fec.h
> @@ -43,6 +43,8 @@
>  #define FEC_R_DES_START		0x180 /* Receive descriptor ring */
>  #define FEC_X_DES_START		0x184 /* Transmit descriptor ring */
>  #define FEC_R_BUFF_SIZE		0x188 /* Maximum receive buff size */
> +#define FEC_MIIGSK_CFGR		0x300 /* MIIGSK Configuration reg */
> +#define FEC_MIIGSK_ENR		0x308 /* MIIGSK Enable reg */
>  
>  #else
>  
> diff --git a/include/linux/fec.h b/include/linux/fec.h
> new file mode 100644
> index 0000000..5d3523d
> --- /dev/null
> +++ b/include/linux/fec.h
> @@ -0,0 +1,21 @@
> +/* include/linux/fec.h
> + *
> + * Copyright (c) 2009 Orex Computed Radiography
> + *   Baruch Siach <baruch@tkos.co.il>
> + *
> + * Header file for the FEC platform data
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +#ifndef __LINUX_FEC_H__
> +#define __LINUX_FEC_H__
> +
> +#include <linux/phy.h>
> +
> +struct fec_platform_data {
> +	phy_interface_t phy;
> +};
> +
> +#endif

Can't this go in drivers/net/fec.h with the other fec data structs?

Regards
Greg


------------------------------------------------------------------------
Greg Ungerer  --  Principal Engineer        EMAIL:     gerg@snapgear.com
SnapGear Group, McAfee                      PHONE:       +61 7 3435 2888
8 Gardner Close                             FAX:         +61 7 3217 5323
Milton, QLD, 4064, Australia                WEB: http://www.SnapGear.com

[PATCH 3/4] fec: add support for Freescale i.MX25 PDK (3DS)

[Greg Ungerer]

Hi Baruch,

Baruch Siach wrote:
> Hi Greg,
> 
> On Wed, Dec 16, 2009 at 10:13:56AM +1000, Greg Ungerer wrote:
>> Baruch Siach wrote:
>>> On Tue, Dec 15, 2009 at 09:52:24PM +1000, Greg Ungerer wrote:
>>>> On 12/15/2009 06:31 PM, Baruch Siach wrote:
>>>>> +#ifndef CONFIG_M5272
>>>> I would suggest making this conditional on FEC_MIIGSK_ENR.
>>>> Although the CONFIG_M5272 is the only case here currently,
>>>> that may change over the years. And using this here may not
>>>> be obvious to the causual code reader, since the register
>>>> offset definitions don't explicitly key on CONFIG_M5272.
>>> OK, I'll change this conditional.
>>>
>>> Can I take this as an Ack from you?
>> With that conditional check changed, sure:
>>
>> Acked-by:  Greg Ungerer <gerg@uclinux.org>
> 
> Thanks. The updated patch below.
> 
> baruch
> 
>>From 2d0751f868519978603b16baa197bfb9f9ec9e2e Mon Sep 17 00:00:00 2001
> Message-Id: <2d0751f868519978603b16baa197bfb9f9ec9e2e.1260945080.git.baruch@tkos.co.il>
> From: Baruch Siach <baruch@tkos.co.il>
> Date: Mon, 14 Dec 2009 10:36:50 +0200
> Subject: [PATCH] fec: add support for PHY interface platform data
> 
> The i.MX25 PDK uses RMII to communicate with its PHY. This patch adds the
> ability to configure RMII, based on platform data.
> 
> Signed-off-by: Baruch Siach <baruch@tkos.co.il>
> Acked-by:  Greg Ungerer <gerg@uclinux.org>
> ---
>  drivers/net/fec.c   |   22 ++++++++++++++++++++++
>  drivers/net/fec.h   |    2 ++
>  include/linux/fec.h |   21 +++++++++++++++++++++
>  3 files changed, 45 insertions(+), 0 deletions(-)
>  create mode 100644 include/linux/fec.h
> 
> diff --git a/drivers/net/fec.c b/drivers/net/fec.c
> index 16a1d58..a7cfe0d 100644
> --- a/drivers/net/fec.c
> +++ b/drivers/net/fec.c
> @@ -40,6 +40,7 @@
>  #include <linux/irq.h>
>  #include <linux/clk.h>
>  #include <linux/platform_device.h>
> +#include <linux/fec.h>
>  
>  #include <asm/cacheflush.h>
>  
> @@ -198,6 +199,7 @@ struct fec_enet_private {
>  	uint	phy_speed;
>  	phy_info_t const	*phy;
>  	struct work_struct phy_task;
> +	phy_interface_t	phy_interface;
>  
>  	uint	sequence_done;
>  	uint	mii_phy_task_queued;
> @@ -1810,6 +1812,21 @@ fec_restart(struct net_device *dev, int duplex)
>  	/* Set MII speed */
>  	writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
>  
> +#ifdef FEC_MIIGSK_ENR
> +	if (fep->phy_interface == PHY_INTERFACE_MODE_RMII) {
> +		/* disable the gasket and wait */
> +		writel(0, fep->hwp + FEC_MIIGSK_ENR);
> +		while (readl(fep->hwp + FEC_MIIGSK_ENR) & 4)
> +			udelay(1);
> +
> +		/* configure the gasket: RMII, 50 MHz, no loopback, no echo */
> +		writel(1, fep->hwp + FEC_MIIGSK_CFGR);
> +
> +		/* re-enable the gasket */
> +		writel(2, fep->hwp + FEC_MIIGSK_ENR);
> +	}
> +#endif
> +
>  	/* And last, enable the transmit and receive processing */
>  	writel(2, fep->hwp + FEC_ECNTRL);
>  	writel(0, fep->hwp + FEC_R_DES_ACTIVE);
> @@ -1847,6 +1864,7 @@ static int __devinit
>  fec_probe(struct platform_device *pdev)
>  {
>  	struct fec_enet_private *fep;
> +	struct fec_platform_data *pdata;
>  	struct net_device *ndev;
>  	int i, irq, ret = 0;
>  	struct resource *r;
> @@ -1879,6 +1897,10 @@ fec_probe(struct platform_device *pdev)
>  
>  	platform_set_drvdata(pdev, ndev);
>  
> +	pdata = pdev->dev.platform_data;
> +	if (pdata)
> +		fep->phy_interface = pdata->phy;
> +
>  	/* This device has up to three irqs on some platforms */
>  	for (i = 0; i < 3; i++) {
>  		irq = platform_get_irq(pdev, i);
> diff --git a/drivers/net/fec.h b/drivers/net/fec.h
> index cc47f3f..2c48b25 100644
> --- a/drivers/net/fec.h
> +++ b/drivers/net/fec.h
> @@ -43,6 +43,8 @@
>  #define FEC_R_DES_START		0x180 /* Receive descriptor ring */
>  #define FEC_X_DES_START		0x184 /* Transmit descriptor ring */
>  #define FEC_R_BUFF_SIZE		0x188 /* Maximum receive buff size */
> +#define FEC_MIIGSK_CFGR		0x300 /* MIIGSK Configuration reg */
> +#define FEC_MIIGSK_ENR		0x308 /* MIIGSK Enable reg */
>  
>  #else
>  
> diff --git a/include/linux/fec.h b/include/linux/fec.h
> new file mode 100644
> index 0000000..5d3523d
> --- /dev/null
> +++ b/include/linux/fec.h
> @@ -0,0 +1,21 @@
> +/* include/linux/fec.h
> + *
> + * Copyright (c) 2009 Orex Computed Radiography
> + *   Baruch Siach <baruch@tkos.co.il>
> + *
> + * Header file for the FEC platform data
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +#ifndef __LINUX_FEC_H__
> +#define __LINUX_FEC_H__
> +
> +#include <linux/phy.h>
> +
> +struct fec_platform_data {
> +	phy_interface_t phy;
> +};
> +
> +#endif

Can't this go in drivers/net/fec.h with the other fec data structs?

Regards
Greg


------------------------------------------------------------------------
Greg Ungerer  --  Principal Engineer        EMAIL:     gerg at snapgear.com
SnapGear Group, McAfee                      PHONE:       +61 7 3435 2888
8 Gardner Close                             FAX:         +61 7 3217 5323
Milton, QLD, 4064, Australia                WEB: http://www.SnapGear.com

Re: [PATCH 3/4] fec: add support for Freescale i.MX25 PDK (3DS)

[Baruch Siach]

On Wed, Dec 16, 2009 at 04:49:32PM +1000, Greg Ungerer wrote:
> 
> Hi Baruch,
> 
> Baruch Siach wrote:

[snip]

> >diff --git a/include/linux/fec.h b/include/linux/fec.h
> >new file mode 100644
> >index 0000000..5d3523d
> >--- /dev/null
> >+++ b/include/linux/fec.h
> >@@ -0,0 +1,21 @@
> >+/* include/linux/fec.h
> >+ *
> >+ * Copyright (c) 2009 Orex Computed Radiography
> >+ *   Baruch Siach <baruch@tkos.co.il>
> >+ *
> >+ * Header file for the FEC platform data
> >+ *
> >+ * This program is free software; you can redistribute it and/or modify
> >+ * it under the terms of the GNU General Public License version 2 as
> >+ * published by the Free Software Foundation.
> >+ */
> >+#ifndef __LINUX_FEC_H__
> >+#define __LINUX_FEC_H__
> >+
> >+#include <linux/phy.h>
> >+
> >+struct fec_platform_data {
> >+	phy_interface_t phy;
> >+};
> >+
> >+#endif
> 
> Can't this go in drivers/net/fec.h with the other fec data structs?

No. The platform code (arch/arm/mach-mx25/mx25pdk.c in my case) must be able 
to use this struct to pass the necessary information to the driver. See for 
example include/linux/smsc911x.h, include/linux/smc91*.h, etc.

baruch

-- 
                                                     ~. .~   Tk Open Systems
=}------------------------------------------------ooO--U--Ooo------------{=
   - baruch@tkos.co.il - tel: +972.2.679.5364, http://www.tkos.co.il -

[PATCH 3/4] fec: add support for Freescale i.MX25 PDK (3DS)

[Baruch Siach]

On Wed, Dec 16, 2009 at 04:49:32PM +1000, Greg Ungerer wrote:
> 
> Hi Baruch,
> 
> Baruch Siach wrote:

[snip]

> >diff --git a/include/linux/fec.h b/include/linux/fec.h
> >new file mode 100644
> >index 0000000..5d3523d
> >--- /dev/null
> >+++ b/include/linux/fec.h
> >@@ -0,0 +1,21 @@
> >+/* include/linux/fec.h
> >+ *
> >+ * Copyright (c) 2009 Orex Computed Radiography
> >+ *   Baruch Siach <baruch@tkos.co.il>
> >+ *
> >+ * Header file for the FEC platform data
> >+ *
> >+ * This program is free software; you can redistribute it and/or modify
> >+ * it under the terms of the GNU General Public License version 2 as
> >+ * published by the Free Software Foundation.
> >+ */
> >+#ifndef __LINUX_FEC_H__
> >+#define __LINUX_FEC_H__
> >+
> >+#include <linux/phy.h>
> >+
> >+struct fec_platform_data {
> >+	phy_interface_t phy;
> >+};
> >+
> >+#endif
> 
> Can't this go in drivers/net/fec.h with the other fec data structs?

No. The platform code (arch/arm/mach-mx25/mx25pdk.c in my case) must be able 
to use this struct to pass the necessary information to the driver. See for 
example include/linux/smsc911x.h, include/linux/smc91*.h, etc.

baruch

-- 
                                                     ~. .~   Tk Open Systems
=}------------------------------------------------ooO--U--Ooo------------{=
   - baruch at tkos.co.il - tel: +972.2.679.5364, http://www.tkos.co.il -

Re: [PATCH 0/4] mx25: add support for FEC on i.MX25 PDK

[Baruch Siach]

Hi Sascha,

Ping.

Ack/NACK?

baruch

On Mon, Dec 14, 2009 at 12:19:38PM +0200, Baruch Siach wrote:
> This patch series adds support for the FEC peripheral of the i.MX25 on the 
> i.MX25 PDK board.
> 
> The first two patches are fixes for compilation and run failures. The third 
> patch enables RMII if the FEC driver. Finally, the last patch adds the 
> necessary board support code (pads, clock, etc.)
> 
> The FEC fix seems like an ugly hack to me. Suggestions for a better solution 
> are welcome.
> 
> Baruch Siach (4):
>   mx25: s/NO_PAD_CTL/NO_PAD_CTRL/
>   mx25: don't force input on FEC pins
>   fec: add support for Freescale i.MX25 PDK (3DS)
>   mx25: add support for FEC on i.MX25 PDK
> 
>  arch/arm/mach-mx25/clock.c                  |    2 +
>  arch/arm/mach-mx25/devices.c                |   19 ++++++++
>  arch/arm/mach-mx25/devices.h                |    1 +
>  arch/arm/mach-mx25/mx25pdk.c                |   40 ++++++++++++++++-
>  arch/arm/plat-mxc/include/mach/iomux-mx25.h |   64 +++++++++++++-------------
>  arch/arm/plat-mxc/include/mach/mx25.h       |    4 ++
>  drivers/net/fec.c                           |   22 +++++++++
>  drivers/net/fec.h                           |    2 +
>  8 files changed, 121 insertions(+), 33 deletions(-)

-- 
                                                     ~. .~   Tk Open Systems
=}------------------------------------------------ooO--U--Ooo------------{=
   - baruch@tkos.co.il - tel: +972.2.679.5364, http://www.tkos.co.il -

[PATCH 0/4] mx25: add support for FEC on i.MX25 PDK

[Baruch Siach]

Hi Sascha,

Ping.

Ack/NACK?

baruch

On Mon, Dec 14, 2009 at 12:19:38PM +0200, Baruch Siach wrote:
> This patch series adds support for the FEC peripheral of the i.MX25 on the 
> i.MX25 PDK board.
> 
> The first two patches are fixes for compilation and run failures. The third 
> patch enables RMII if the FEC driver. Finally, the last patch adds the 
> necessary board support code (pads, clock, etc.)
> 
> The FEC fix seems like an ugly hack to me. Suggestions for a better solution 
> are welcome.
> 
> Baruch Siach (4):
>   mx25: s/NO_PAD_CTL/NO_PAD_CTRL/
>   mx25: don't force input on FEC pins
>   fec: add support for Freescale i.MX25 PDK (3DS)
>   mx25: add support for FEC on i.MX25 PDK
> 
>  arch/arm/mach-mx25/clock.c                  |    2 +
>  arch/arm/mach-mx25/devices.c                |   19 ++++++++
>  arch/arm/mach-mx25/devices.h                |    1 +
>  arch/arm/mach-mx25/mx25pdk.c                |   40 ++++++++++++++++-
>  arch/arm/plat-mxc/include/mach/iomux-mx25.h |   64 +++++++++++++-------------
>  arch/arm/plat-mxc/include/mach/mx25.h       |    4 ++
>  drivers/net/fec.c                           |   22 +++++++++
>  drivers/net/fec.h                           |    2 +
>  8 files changed, 121 insertions(+), 33 deletions(-)

-- 
                                                     ~. .~   Tk Open Systems
=}------------------------------------------------ooO--U--Ooo------------{=
   - baruch at tkos.co.il - tel: +972.2.679.5364, http://www.tkos.co.il -

Re: [PATCH 1/4] mx25: s/NO_PAD_CTL/NO_PAD_CTRL/

[Sascha Hauer]

On Mon, Dec 14, 2009 at 12:19:39PM +0200, Baruch Siach wrote:
> NO_PAD_CTL is not defined anywhere.
> 
> Signed-off-by: Baruch Siach <baruch@tkos.co.il>

Ok, scheduled for -rc

Sascha

> ---
>  arch/arm/plat-mxc/include/mach/iomux-mx25.h |   58 +++++++++++++-------------
>  1 files changed, 29 insertions(+), 29 deletions(-)
> 
> diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx25.h b/arch/arm/plat-mxc/include/mach/iomux-mx25.h
> index 810c47f..9af494f 100644
> --- a/arch/arm/plat-mxc/include/mach/iomux-mx25.h
> +++ b/arch/arm/plat-mxc/include/mach/iomux-mx25.h
> @@ -58,19 +58,19 @@
>  
>  #define MX25_PAD_A18__A18		IOMUX_PAD(0x23c, 0x020, 0x10, 0, 0, NO_PAD_CTRL)
>  #define MX25_PAD_A18__GPIO_2_4		IOMUX_PAD(0x23c, 0x020, 0x15, 0, 0, NO_PAD_CTRL)
> -#define MX25_PAD_A18__FEC_COL		IOMUX_PAD(0x23c, 0x020, 0x17, 0x504, 0, NO_PAD_CTL)
> +#define MX25_PAD_A18__FEC_COL		IOMUX_PAD(0x23c, 0x020, 0x17, 0x504, 0, NO_PAD_CTRL)
>  
>  #define MX25_PAD_A19__A19		IOMUX_PAD(0x240, 0x024, 0x10, 0, 0, NO_PAD_CTRL)
> -#define MX25_PAD_A19__FEC_RX_ER		IOMUX_PAD(0x240, 0x024, 0x17, 0x518, 0, NO_PAD_CTL)
> +#define MX25_PAD_A19__FEC_RX_ER		IOMUX_PAD(0x240, 0x024, 0x17, 0x518, 0, NO_PAD_CTRL)
>  #define MX25_PAD_A19__GPIO_2_5		IOMUX_PAD(0x240, 0x024, 0x15, 0, 0, NO_PAD_CTRL)
>  
>  #define MX25_PAD_A20__A20		IOMUX_PAD(0x244, 0x028, 0x10, 0, 0, NO_PAD_CTRL)
>  #define MX25_PAD_A20__GPIO_2_6		IOMUX_PAD(0x244, 0x028, 0x15, 0, 0, NO_PAD_CTRL)
> -#define MX25_PAD_A20__FEC_RDATA2	IOMUX_PAD(0x244, 0x028, 0x17, 0x50c, 0, NO_PAD_CTL)
> +#define MX25_PAD_A20__FEC_RDATA2	IOMUX_PAD(0x244, 0x028, 0x17, 0x50c, 0, NO_PAD_CTRL)
>  
>  #define MX25_PAD_A21__A21		IOMUX_PAD(0x248, 0x02c, 0x10, 0, 0, NO_PAD_CTRL)
>  #define MX25_PAD_A21__GPIO_2_7		IOMUX_PAD(0x248, 0x02c, 0x15, 0, 0, NO_PAD_CTRL)
> -#define MX25_PAD_A21__FEC_RDATA3	IOMUX_PAD(0x248, 0x02c, 0x17, 0x510, 0, NO_PAD_CTL)
> +#define MX25_PAD_A21__FEC_RDATA3	IOMUX_PAD(0x248, 0x02c, 0x17, 0x510, 0, NO_PAD_CTRL)
>  
>  #define MX25_PAD_A22__A22		IOMUX_PAD(0x000, 0x030, 0x10, 0, 0, NO_PAD_CTRL)
>  #define MX25_PAD_A22__GPIO_2_8		IOMUX_PAD(0x000, 0x030, 0x15, 0, 0, NO_PAD_CTRL)
> @@ -80,11 +80,11 @@
>  
>  #define MX25_PAD_A24__A24		IOMUX_PAD(0x250, 0x038, 0x10, 0, 0, NO_PAD_CTRL)
>  #define MX25_PAD_A24__GPIO_2_10		IOMUX_PAD(0x250, 0x038, 0x15, 0, 0, NO_PAD_CTRL)
> -#define MX25_PAD_A24__FEC_RX_CLK	IOMUX_PAD(0x250, 0x038, 0x17, 0x514, 0, NO_PAD_CTL)
> +#define MX25_PAD_A24__FEC_RX_CLK	IOMUX_PAD(0x250, 0x038, 0x17, 0x514, 0, NO_PAD_CTRL)
>  
>  #define MX25_PAD_A25__A25		IOMUX_PAD(0x254, 0x03c, 0x10, 0, 0, NO_PAD_CTRL)
>  #define MX25_PAD_A25__GPIO_2_11		IOMUX_PAD(0x254, 0x03c, 0x15, 0, 0, NO_PAD_CTRL)
> -#define MX25_PAD_A25__FEC_CRS		IOMUX_PAD(0x254, 0x03c, 0x17, 0x508, 0, NO_PAD_CTL)
> +#define MX25_PAD_A25__FEC_CRS		IOMUX_PAD(0x254, 0x03c, 0x17, 0x508, 0, NO_PAD_CTRL)
>  
>  #define MX25_PAD_EB0__EB0		IOMUX_PAD(0x258, 0x040, 0x10, 0, 0, NO_PAD_CTRL)
>  #define MX25_PAD_EB0__AUD4_TXD		IOMUX_PAD(0x258, 0x040, 0x14, 0x464, 0, NO_PAD_CTRL)
> @@ -112,7 +112,7 @@
>  #define MX25_PAD_CS5__UART5_RTS		IOMUX_PAD(0x268, 0x058, 0x13, 0x574, 0, NO_PAD_CTRL)
>  #define MX25_PAD_CS5__GPIO_3_21		IOMUX_PAD(0x268, 0x058, 0x15, 0, 0, NO_PAD_CTRL)
>  
> -#define MX25_PAD_NF_CE0__NF_CE0		IOMUX_PAD(0x26c, 0x05c, 0x10, 0, 0, NO_PAD_CTL)
> +#define MX25_PAD_NF_CE0__NF_CE0		IOMUX_PAD(0x26c, 0x05c, 0x10, 0, 0, NO_PAD_CTRL)
>  #define MX25_PAD_NF_CE0__GPIO_3_22	IOMUX_PAD(0x26c, 0x05c, 0x15, 0, 0, NO_PAD_CTRL)
>  
>  #define MX25_PAD_ECB__ECB		IOMUX_PAD(0x270, 0x060, 0x10, 0, 0, NO_PAD_CTRL)
> @@ -229,28 +229,28 @@
>  #define MX25_PAD_LD7__GPIO_1_21		IOMUX_PAD(0x2dc, 0x0e4, 0x15, 0, 0, NO_PAD_CTRL)
>  
>  #define MX25_PAD_LD8__LD8		IOMUX_PAD(0x2e0, 0x0e8, 0x10, 0, 0, NO_PAD_CTRL)
> -#define MX25_PAD_LD8__FEC_TX_ERR	IOMUX_PAD(0x2e0, 0x0e8, 0x15, 0, 0, NO_PAD_CTL)
> +#define MX25_PAD_LD8__FEC_TX_ERR	IOMUX_PAD(0x2e0, 0x0e8, 0x15, 0, 0, NO_PAD_CTRL)
>  
>  #define MX25_PAD_LD9__LD9		IOMUX_PAD(0x2e4, 0x0ec, 0x10, 0, 0, NO_PAD_CTRL)
> -#define MX25_PAD_LD9__FEC_COL		IOMUX_PAD(0x2e4, 0x0ec, 0x15, 0x504, 1, NO_PAD_CTL)
> +#define MX25_PAD_LD9__FEC_COL		IOMUX_PAD(0x2e4, 0x0ec, 0x15, 0x504, 1, NO_PAD_CTRL)
>  
>  #define MX25_PAD_LD10__LD10		IOMUX_PAD(0x2e8, 0x0f0, 0x10, 0, 0, NO_PAD_CTRL)
> -#define MX25_PAD_LD10__FEC_RX_ER	IOMUX_PAD(0x2e8, 0x0f0, 0x15, 0x518, 1, NO_PAD_CTL)
> +#define MX25_PAD_LD10__FEC_RX_ER	IOMUX_PAD(0x2e8, 0x0f0, 0x15, 0x518, 1, NO_PAD_CTRL)
>  
>  #define MX25_PAD_LD11__LD11		IOMUX_PAD(0x2ec, 0x0f4, 0x10, 0, 0, NO_PAD_CTRL)
> -#define MX25_PAD_LD11__FEC_RDATA2	IOMUX_PAD(0x2ec, 0x0f4, 0x15, 0x50c, 1, NO_PAD_CTL)
> +#define MX25_PAD_LD11__FEC_RDATA2	IOMUX_PAD(0x2ec, 0x0f4, 0x15, 0x50c, 1, NO_PAD_CTRL)
>  
>  #define MX25_PAD_LD12__LD12		IOMUX_PAD(0x2f0, 0x0f8, 0x10, 0, 0, NO_PAD_CTRL)
> -#define MX25_PAD_LD12__FEC_RDATA3	IOMUX_PAD(0x2f0, 0x0f8, 0x15, 0x510, 1, NO_PAD_CTL)
> +#define MX25_PAD_LD12__FEC_RDATA3	IOMUX_PAD(0x2f0, 0x0f8, 0x15, 0x510, 1, NO_PAD_CTRL)
>  
>  #define MX25_PAD_LD13__LD13		IOMUX_PAD(0x2f4, 0x0fc, 0x10, 0, 0, NO_PAD_CTRL)
> -#define MX25_PAD_LD13__FEC_TDATA2	IOMUX_PAD(0x2f4, 0x0fc, 0x15, 0, 0, NO_PAD_CTL)
> +#define MX25_PAD_LD13__FEC_TDATA2	IOMUX_PAD(0x2f4, 0x0fc, 0x15, 0, 0, NO_PAD_CTRL)
>  
>  #define MX25_PAD_LD14__LD14		IOMUX_PAD(0x2f8, 0x100, 0x10, 0, 0, NO_PAD_CTRL)
> -#define MX25_PAD_LD14__FEC_TDATA3	IOMUX_PAD(0x2f8, 0x100, 0x15, 0, 0, NO_PAD_CTL)
> +#define MX25_PAD_LD14__FEC_TDATA3	IOMUX_PAD(0x2f8, 0x100, 0x15, 0, 0, NO_PAD_CTRL)
>  
>  #define MX25_PAD_LD15__LD15		IOMUX_PAD(0x2fc, 0x104, 0x10, 0, 0, NO_PAD_CTRL)
> -#define MX25_PAD_LD15__FEC_RX_CLK	IOMUX_PAD(0x2fc, 0x104, 0x15, 0x514, 1, NO_PAD_CTL)
> +#define MX25_PAD_LD15__FEC_RX_CLK	IOMUX_PAD(0x2fc, 0x104, 0x15, 0x514, 1, NO_PAD_CTRL)
>  
>  #define MX25_PAD_HSYNC__HSYNC		IOMUX_PAD(0x300, 0x108, 0x10, 0, 0, NO_PAD_CTRL)
>  #define MX25_PAD_HSYNC__GPIO_1_22	IOMUX_PAD(0x300, 0x108, 0x15, 0, 0, NO_PAD_CTRL)
> @@ -265,7 +265,7 @@
>  #define MX25_PAD_OE_ACD__GPIO_1_25	IOMUX_PAD(0x30c, 0x114, 0x15, 0, 0, NO_PAD_CTRL)
>  
>  #define MX25_PAD_CONTRAST__CONTRAST	IOMUX_PAD(0x310, 0x118, 0x10, 0, 0, NO_PAD_CTRL)
> -#define MX25_PAD_CONTRAST__FEC_CRS	IOMUX_PAD(0x310, 0x118, 0x15, 0x508, 1, NO_PAD_CTL)
> +#define MX25_PAD_CONTRAST__FEC_CRS	IOMUX_PAD(0x310, 0x118, 0x15, 0x508, 1, NO_PAD_CTRL)
>  
>  #define MX25_PAD_PWM__PWM		IOMUX_PAD(0x314, 0x11c, 0x10, 0, 0, NO_PAD_CTRL)
>  #define MX25_PAD_PWM__GPIO_1_26		IOMUX_PAD(0x314, 0x11c, 0x15, 0, 0, NO_PAD_CTRL)
> @@ -354,19 +354,19 @@
>  #define MX25_PAD_UART2_TXD__GPIO_4_27	IOMUX_PAD(0x37c, 0x184, 0x15, 0, 0, NO_PAD_CTRL)
>  
>  #define MX25_PAD_UART2_RTS__UART2_RTS	IOMUX_PAD(0x380, 0x188, 0x10, 0, 0, NO_PAD_CTRL)
> -#define MX25_PAD_UART2_RTS__FEC_COL	IOMUX_PAD(0x380, 0x188, 0x12, 0x504, 2, NO_PAD_CTL)
> +#define MX25_PAD_UART2_RTS__FEC_COL	IOMUX_PAD(0x380, 0x188, 0x12, 0x504, 2, NO_PAD_CTRL)
>  #define MX25_PAD_UART2_RTS__GPIO_4_28	IOMUX_PAD(0x380, 0x188, 0x15, 0, 0, NO_PAD_CTRL)
>  
> -#define MX25_PAD_UART2_CTS__FEC_RX_ER	IOMUX_PAD(0x384, 0x18c, 0x12, 0x518, 2, NO_PAD_CTL)
> +#define MX25_PAD_UART2_CTS__FEC_RX_ER	IOMUX_PAD(0x384, 0x18c, 0x12, 0x518, 2, NO_PAD_CTRL)
>  #define MX25_PAD_UART2_CTS__UART2_CTS	IOMUX_PAD(0x384, 0x18c, 0x10, 0, 0, NO_PAD_CTRL)
>  #define MX25_PAD_UART2_CTS__GPIO_4_29	IOMUX_PAD(0x384, 0x18c, 0x15, 0, 0, NO_PAD_CTRL)
>  
>  #define MX25_PAD_SD1_CMD__SD1_CMD	IOMUX_PAD(0x388, 0x190, 0x10, 0, 0, PAD_CTL_PUS_47K_UP)
> -#define MX25_PAD_SD1_CMD__FEC_RDATA2	IOMUX_PAD(0x388, 0x190, 0x12, 0x50c, 2, NO_PAD_CTL)
> +#define MX25_PAD_SD1_CMD__FEC_RDATA2	IOMUX_PAD(0x388, 0x190, 0x12, 0x50c, 2, NO_PAD_CTRL)
>  #define MX25_PAD_SD1_CMD__GPIO_2_23	IOMUX_PAD(0x388, 0x190, 0x15, 0, 0, NO_PAD_CTRL)
>  
>  #define MX25_PAD_SD1_CLK__SD1_CLK	IOMUX_PAD(0x38c, 0x194, 0x10, 0, 0, PAD_CTL_PUS_47K_UP)
> -#define MX25_PAD_SD1_CLK__FEC_RDATA3	IOMUX_PAD(0x38c, 0x194, 0x12, 0x510, 2, NO_PAD_CTL)
> +#define MX25_PAD_SD1_CLK__FEC_RDATA3	IOMUX_PAD(0x38c, 0x194, 0x12, 0x510, 2, NO_PAD_CTRL)
>  #define MX25_PAD_SD1_CLK__GPIO_2_24	IOMUX_PAD(0x38c, 0x194, 0x15, 0, 0, NO_PAD_CTRL)
>  
>  #define MX25_PAD_SD1_DATA0__SD1_DATA0	IOMUX_PAD(0x390, 0x198, 0x10, 0, 0, PAD_CTL_PUS_47K_UP)
> @@ -377,11 +377,11 @@
>  #define MX25_PAD_SD1_DATA1__GPIO_2_26	IOMUX_PAD(0x394, 0x19c, 0x15, 0, 0, NO_PAD_CTRL)
>  
>  #define MX25_PAD_SD1_DATA2__SD1_DATA2	IOMUX_PAD(0x398, 0x1a0, 0x10, 0, 0, PAD_CTL_PUS_47K_UP)
> -#define MX25_PAD_SD1_DATA2__FEC_RX_CLK	IOMUX_PAD(0x398, 0x1a0, 0x15, 0x514, 2, NO_PAD_CTL)
> +#define MX25_PAD_SD1_DATA2__FEC_RX_CLK	IOMUX_PAD(0x398, 0x1a0, 0x15, 0x514, 2, NO_PAD_CTRL)
>  #define MX25_PAD_SD1_DATA2__GPIO_2_27	IOMUX_PAD(0x398, 0x1a0, 0x15, 0, 0, NO_PAD_CTRL)
>  
>  #define MX25_PAD_SD1_DATA3__SD1_DATA3	IOMUX_PAD(0x39c, 0x1a4, 0x10, 0, 0, PAD_CTL_PUS_47K_UP)
> -#define MX25_PAD_SD1_DATA3__FEC_CRS	IOMUX_PAD(0x39c, 0x1a4, 0x10, 0x508, 2, NO_PAD_CTL)
> +#define MX25_PAD_SD1_DATA3__FEC_CRS	IOMUX_PAD(0x39c, 0x1a4, 0x10, 0x508, 2, NO_PAD_CTRL)
>  #define MX25_PAD_SD1_DATA3__GPIO_2_28	IOMUX_PAD(0x39c, 0x1a4, 0x15, 0, 0, NO_PAD_CTRL)
>  
>  #define MX25_PAD_KPP_ROW0__KPP_ROW0	IOMUX_PAD(0x3a0, 0x1a8, 0x10, 0, 0, PAD_CTL_PKE)
> @@ -410,7 +410,7 @@
>  #define MX25_PAD_KPP_COL3__KPP_COL3	IOMUX_PAD(0x3bc, 0x1c4, 0x10, 0, 0, PAD_CTL_PKE | PAD_CTL_ODE)
>  #define MX25_PAD_KPP_COL3__GPIO_3_4	IOMUX_PAD(0x3bc, 0x1c4, 0x15, 0, 0, NO_PAD_CTRL)
>  
> -#define MX25_PAD_FEC_MDC__FEC_MDC	IOMUX_PAD(0x3c0, 0x1c8, 0x10, 0, 0, NO_PAD_CTL)
> +#define MX25_PAD_FEC_MDC__FEC_MDC	IOMUX_PAD(0x3c0, 0x1c8, 0x10, 0, 0, NO_PAD_CTRL)
>  #define MX25_PAD_FEC_MDC__AUD4_TXD	IOMUX_PAD(0x3c0, 0x1c8, 0x12, 0x464, 1, NO_PAD_CTRL)
>  #define MX25_PAD_FEC_MDC__GPIO_3_5	IOMUX_PAD(0x3c0, 0x1c8, 0x15, 0, 0, NO_PAD_CTRL)
>  
> @@ -418,23 +418,23 @@
>  #define MX25_PAD_FEC_MDIO__AUD4_RXD	IOMUX_PAD(0x3c4, 0x1cc, 0x12, 0x460, 1, NO_PAD_CTRL)
>  #define MX25_PAD_FEC_MDIO__GPIO_3_6	IOMUX_PAD(0x3c4, 0x1cc, 0x15, 0, 0, NO_PAD_CTRL)
>  
> -#define MX25_PAD_FEC_TDATA0__FEC_TDATA0	IOMUX_PAD(0x3c8, 0x1d0, 0x10, 0, 0, NO_PAD_CTL)
> +#define MX25_PAD_FEC_TDATA0__FEC_TDATA0	IOMUX_PAD(0x3c8, 0x1d0, 0x10, 0, 0, NO_PAD_CTRL)
>  #define MX25_PAD_FEC_TDATA0__GPIO_3_7	IOMUX_PAD(0x3c8, 0x1d0, 0x15, 0, 0, NO_PAD_CTRL)
>  
> -#define MX25_PAD_FEC_TDATA1__FEC_TDATA1	IOMUX_PAD(0x3cc, 0x1d4, 0x10, 0, 0, NO_PAD_CTL)
> +#define MX25_PAD_FEC_TDATA1__FEC_TDATA1	IOMUX_PAD(0x3cc, 0x1d4, 0x10, 0, 0, NO_PAD_CTRL)
>  #define MX25_PAD_FEC_TDATA1__AUD4_TXFS	IOMUX_PAD(0x3cc, 0x1d4, 0x12, 0x474, 1, NO_PAD_CTRL)
>  #define MX25_PAD_FEC_TDATA1__GPIO_3_8	IOMUX_PAD(0x3cc, 0x1d4, 0x15, 0, 0, NO_PAD_CTRL)
>  
> -#define MX25_PAD_FEC_TX_EN__FEC_TX_EN	IOMUX_PAD(0x3d0, 0x1d8, 0x10, 0, 0, NO_PAD_CTL)
> +#define MX25_PAD_FEC_TX_EN__FEC_TX_EN	IOMUX_PAD(0x3d0, 0x1d8, 0x10, 0, 0, NO_PAD_CTRL)
>  #define MX25_PAD_FEC_TX_EN__GPIO_3_9   	IOMUX_PAD(0x3d0, 0x1d8, 0x15, 0, 0, NO_PAD_CTRL)
>  
> -#define MX25_PAD_FEC_RDATA0__FEC_RDATA0	IOMUX_PAD(0x3d4, 0x1dc, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTL)
> +#define MX25_PAD_FEC_RDATA0__FEC_RDATA0	IOMUX_PAD(0x3d4, 0x1dc, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTRL)
>  #define MX25_PAD_FEC_RDATA0__GPIO_3_10	IOMUX_PAD(0x3d4, 0x1dc, 0x15, 0, 0, NO_PAD_CTRL)
>  
> -#define MX25_PAD_FEC_RDATA1__FEC_RDATA1	IOMUX_PAD(0x3d8, 0x1e0, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTL)
> +#define MX25_PAD_FEC_RDATA1__FEC_RDATA1	IOMUX_PAD(0x3d8, 0x1e0, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTRL)
>  #define MX25_PAD_FEC_RDATA1__GPIO_3_11	IOMUX_PAD(0x3d8, 0x1e0, 0x15, 0, 0, NO_PAD_CTRL)
>  
> -#define MX25_PAD_FEC_RX_DV__FEC_RX_DV	IOMUX_PAD(0x3dc, 0x1e4, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTL)
> +#define MX25_PAD_FEC_RX_DV__FEC_RX_DV	IOMUX_PAD(0x3dc, 0x1e4, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTRL)
>  #define MX25_PAD_FEC_RX_DV__CAN2_RX	IOMUX_PAD(0x3dc, 0x1e4, 0x14, 0x484, 0, PAD_CTL_PUS_22K_UP)
>  #define MX25_PAD_FEC_RX_DV__GPIO_3_12	IOMUX_PAD(0x3dc, 0x1e4, 0x15, 0, 0, NO_PAD_CTRL)
>  
> -- 
> 1.6.5
> 
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
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Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

[PATCH 1/4] mx25: s/NO_PAD_CTL/NO_PAD_CTRL/

[Sascha Hauer]

On Mon, Dec 14, 2009 at 12:19:39PM +0200, Baruch Siach wrote:
> NO_PAD_CTL is not defined anywhere.
> 
> Signed-off-by: Baruch Siach <baruch@tkos.co.il>

Ok, scheduled for -rc

Sascha

> ---
>  arch/arm/plat-mxc/include/mach/iomux-mx25.h |   58 +++++++++++++-------------
>  1 files changed, 29 insertions(+), 29 deletions(-)
> 
> diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx25.h b/arch/arm/plat-mxc/include/mach/iomux-mx25.h
> index 810c47f..9af494f 100644
> --- a/arch/arm/plat-mxc/include/mach/iomux-mx25.h
> +++ b/arch/arm/plat-mxc/include/mach/iomux-mx25.h
> @@ -58,19 +58,19 @@
>  
>  #define MX25_PAD_A18__A18		IOMUX_PAD(0x23c, 0x020, 0x10, 0, 0, NO_PAD_CTRL)
>  #define MX25_PAD_A18__GPIO_2_4		IOMUX_PAD(0x23c, 0x020, 0x15, 0, 0, NO_PAD_CTRL)
> -#define MX25_PAD_A18__FEC_COL		IOMUX_PAD(0x23c, 0x020, 0x17, 0x504, 0, NO_PAD_CTL)
> +#define MX25_PAD_A18__FEC_COL		IOMUX_PAD(0x23c, 0x020, 0x17, 0x504, 0, NO_PAD_CTRL)
>  
>  #define MX25_PAD_A19__A19		IOMUX_PAD(0x240, 0x024, 0x10, 0, 0, NO_PAD_CTRL)
> -#define MX25_PAD_A19__FEC_RX_ER		IOMUX_PAD(0x240, 0x024, 0x17, 0x518, 0, NO_PAD_CTL)
> +#define MX25_PAD_A19__FEC_RX_ER		IOMUX_PAD(0x240, 0x024, 0x17, 0x518, 0, NO_PAD_CTRL)
>  #define MX25_PAD_A19__GPIO_2_5		IOMUX_PAD(0x240, 0x024, 0x15, 0, 0, NO_PAD_CTRL)
>  
>  #define MX25_PAD_A20__A20		IOMUX_PAD(0x244, 0x028, 0x10, 0, 0, NO_PAD_CTRL)
>  #define MX25_PAD_A20__GPIO_2_6		IOMUX_PAD(0x244, 0x028, 0x15, 0, 0, NO_PAD_CTRL)
> -#define MX25_PAD_A20__FEC_RDATA2	IOMUX_PAD(0x244, 0x028, 0x17, 0x50c, 0, NO_PAD_CTL)
> +#define MX25_PAD_A20__FEC_RDATA2	IOMUX_PAD(0x244, 0x028, 0x17, 0x50c, 0, NO_PAD_CTRL)
>  
>  #define MX25_PAD_A21__A21		IOMUX_PAD(0x248, 0x02c, 0x10, 0, 0, NO_PAD_CTRL)
>  #define MX25_PAD_A21__GPIO_2_7		IOMUX_PAD(0x248, 0x02c, 0x15, 0, 0, NO_PAD_CTRL)
> -#define MX25_PAD_A21__FEC_RDATA3	IOMUX_PAD(0x248, 0x02c, 0x17, 0x510, 0, NO_PAD_CTL)
> +#define MX25_PAD_A21__FEC_RDATA3	IOMUX_PAD(0x248, 0x02c, 0x17, 0x510, 0, NO_PAD_CTRL)
>  
>  #define MX25_PAD_A22__A22		IOMUX_PAD(0x000, 0x030, 0x10, 0, 0, NO_PAD_CTRL)
>  #define MX25_PAD_A22__GPIO_2_8		IOMUX_PAD(0x000, 0x030, 0x15, 0, 0, NO_PAD_CTRL)
> @@ -80,11 +80,11 @@
>  
>  #define MX25_PAD_A24__A24		IOMUX_PAD(0x250, 0x038, 0x10, 0, 0, NO_PAD_CTRL)
>  #define MX25_PAD_A24__GPIO_2_10		IOMUX_PAD(0x250, 0x038, 0x15, 0, 0, NO_PAD_CTRL)
> -#define MX25_PAD_A24__FEC_RX_CLK	IOMUX_PAD(0x250, 0x038, 0x17, 0x514, 0, NO_PAD_CTL)
> +#define MX25_PAD_A24__FEC_RX_CLK	IOMUX_PAD(0x250, 0x038, 0x17, 0x514, 0, NO_PAD_CTRL)
>  
>  #define MX25_PAD_A25__A25		IOMUX_PAD(0x254, 0x03c, 0x10, 0, 0, NO_PAD_CTRL)
>  #define MX25_PAD_A25__GPIO_2_11		IOMUX_PAD(0x254, 0x03c, 0x15, 0, 0, NO_PAD_CTRL)
> -#define MX25_PAD_A25__FEC_CRS		IOMUX_PAD(0x254, 0x03c, 0x17, 0x508, 0, NO_PAD_CTL)
> +#define MX25_PAD_A25__FEC_CRS		IOMUX_PAD(0x254, 0x03c, 0x17, 0x508, 0, NO_PAD_CTRL)
>  
>  #define MX25_PAD_EB0__EB0		IOMUX_PAD(0x258, 0x040, 0x10, 0, 0, NO_PAD_CTRL)
>  #define MX25_PAD_EB0__AUD4_TXD		IOMUX_PAD(0x258, 0x040, 0x14, 0x464, 0, NO_PAD_CTRL)
> @@ -112,7 +112,7 @@
>  #define MX25_PAD_CS5__UART5_RTS		IOMUX_PAD(0x268, 0x058, 0x13, 0x574, 0, NO_PAD_CTRL)
>  #define MX25_PAD_CS5__GPIO_3_21		IOMUX_PAD(0x268, 0x058, 0x15, 0, 0, NO_PAD_CTRL)
>  
> -#define MX25_PAD_NF_CE0__NF_CE0		IOMUX_PAD(0x26c, 0x05c, 0x10, 0, 0, NO_PAD_CTL)
> +#define MX25_PAD_NF_CE0__NF_CE0		IOMUX_PAD(0x26c, 0x05c, 0x10, 0, 0, NO_PAD_CTRL)
>  #define MX25_PAD_NF_CE0__GPIO_3_22	IOMUX_PAD(0x26c, 0x05c, 0x15, 0, 0, NO_PAD_CTRL)
>  
>  #define MX25_PAD_ECB__ECB		IOMUX_PAD(0x270, 0x060, 0x10, 0, 0, NO_PAD_CTRL)
> @@ -229,28 +229,28 @@
>  #define MX25_PAD_LD7__GPIO_1_21		IOMUX_PAD(0x2dc, 0x0e4, 0x15, 0, 0, NO_PAD_CTRL)
>  
>  #define MX25_PAD_LD8__LD8		IOMUX_PAD(0x2e0, 0x0e8, 0x10, 0, 0, NO_PAD_CTRL)
> -#define MX25_PAD_LD8__FEC_TX_ERR	IOMUX_PAD(0x2e0, 0x0e8, 0x15, 0, 0, NO_PAD_CTL)
> +#define MX25_PAD_LD8__FEC_TX_ERR	IOMUX_PAD(0x2e0, 0x0e8, 0x15, 0, 0, NO_PAD_CTRL)
>  
>  #define MX25_PAD_LD9__LD9		IOMUX_PAD(0x2e4, 0x0ec, 0x10, 0, 0, NO_PAD_CTRL)
> -#define MX25_PAD_LD9__FEC_COL		IOMUX_PAD(0x2e4, 0x0ec, 0x15, 0x504, 1, NO_PAD_CTL)
> +#define MX25_PAD_LD9__FEC_COL		IOMUX_PAD(0x2e4, 0x0ec, 0x15, 0x504, 1, NO_PAD_CTRL)
>  
>  #define MX25_PAD_LD10__LD10		IOMUX_PAD(0x2e8, 0x0f0, 0x10, 0, 0, NO_PAD_CTRL)
> -#define MX25_PAD_LD10__FEC_RX_ER	IOMUX_PAD(0x2e8, 0x0f0, 0x15, 0x518, 1, NO_PAD_CTL)
> +#define MX25_PAD_LD10__FEC_RX_ER	IOMUX_PAD(0x2e8, 0x0f0, 0x15, 0x518, 1, NO_PAD_CTRL)
>  
>  #define MX25_PAD_LD11__LD11		IOMUX_PAD(0x2ec, 0x0f4, 0x10, 0, 0, NO_PAD_CTRL)
> -#define MX25_PAD_LD11__FEC_RDATA2	IOMUX_PAD(0x2ec, 0x0f4, 0x15, 0x50c, 1, NO_PAD_CTL)
> +#define MX25_PAD_LD11__FEC_RDATA2	IOMUX_PAD(0x2ec, 0x0f4, 0x15, 0x50c, 1, NO_PAD_CTRL)
>  
>  #define MX25_PAD_LD12__LD12		IOMUX_PAD(0x2f0, 0x0f8, 0x10, 0, 0, NO_PAD_CTRL)
> -#define MX25_PAD_LD12__FEC_RDATA3	IOMUX_PAD(0x2f0, 0x0f8, 0x15, 0x510, 1, NO_PAD_CTL)
> +#define MX25_PAD_LD12__FEC_RDATA3	IOMUX_PAD(0x2f0, 0x0f8, 0x15, 0x510, 1, NO_PAD_CTRL)
>  
>  #define MX25_PAD_LD13__LD13		IOMUX_PAD(0x2f4, 0x0fc, 0x10, 0, 0, NO_PAD_CTRL)
> -#define MX25_PAD_LD13__FEC_TDATA2	IOMUX_PAD(0x2f4, 0x0fc, 0x15, 0, 0, NO_PAD_CTL)
> +#define MX25_PAD_LD13__FEC_TDATA2	IOMUX_PAD(0x2f4, 0x0fc, 0x15, 0, 0, NO_PAD_CTRL)
>  
>  #define MX25_PAD_LD14__LD14		IOMUX_PAD(0x2f8, 0x100, 0x10, 0, 0, NO_PAD_CTRL)
> -#define MX25_PAD_LD14__FEC_TDATA3	IOMUX_PAD(0x2f8, 0x100, 0x15, 0, 0, NO_PAD_CTL)
> +#define MX25_PAD_LD14__FEC_TDATA3	IOMUX_PAD(0x2f8, 0x100, 0x15, 0, 0, NO_PAD_CTRL)
>  
>  #define MX25_PAD_LD15__LD15		IOMUX_PAD(0x2fc, 0x104, 0x10, 0, 0, NO_PAD_CTRL)
> -#define MX25_PAD_LD15__FEC_RX_CLK	IOMUX_PAD(0x2fc, 0x104, 0x15, 0x514, 1, NO_PAD_CTL)
> +#define MX25_PAD_LD15__FEC_RX_CLK	IOMUX_PAD(0x2fc, 0x104, 0x15, 0x514, 1, NO_PAD_CTRL)
>  
>  #define MX25_PAD_HSYNC__HSYNC		IOMUX_PAD(0x300, 0x108, 0x10, 0, 0, NO_PAD_CTRL)
>  #define MX25_PAD_HSYNC__GPIO_1_22	IOMUX_PAD(0x300, 0x108, 0x15, 0, 0, NO_PAD_CTRL)
> @@ -265,7 +265,7 @@
>  #define MX25_PAD_OE_ACD__GPIO_1_25	IOMUX_PAD(0x30c, 0x114, 0x15, 0, 0, NO_PAD_CTRL)
>  
>  #define MX25_PAD_CONTRAST__CONTRAST	IOMUX_PAD(0x310, 0x118, 0x10, 0, 0, NO_PAD_CTRL)
> -#define MX25_PAD_CONTRAST__FEC_CRS	IOMUX_PAD(0x310, 0x118, 0x15, 0x508, 1, NO_PAD_CTL)
> +#define MX25_PAD_CONTRAST__FEC_CRS	IOMUX_PAD(0x310, 0x118, 0x15, 0x508, 1, NO_PAD_CTRL)
>  
>  #define MX25_PAD_PWM__PWM		IOMUX_PAD(0x314, 0x11c, 0x10, 0, 0, NO_PAD_CTRL)
>  #define MX25_PAD_PWM__GPIO_1_26		IOMUX_PAD(0x314, 0x11c, 0x15, 0, 0, NO_PAD_CTRL)
> @@ -354,19 +354,19 @@
>  #define MX25_PAD_UART2_TXD__GPIO_4_27	IOMUX_PAD(0x37c, 0x184, 0x15, 0, 0, NO_PAD_CTRL)
>  
>  #define MX25_PAD_UART2_RTS__UART2_RTS	IOMUX_PAD(0x380, 0x188, 0x10, 0, 0, NO_PAD_CTRL)
> -#define MX25_PAD_UART2_RTS__FEC_COL	IOMUX_PAD(0x380, 0x188, 0x12, 0x504, 2, NO_PAD_CTL)
> +#define MX25_PAD_UART2_RTS__FEC_COL	IOMUX_PAD(0x380, 0x188, 0x12, 0x504, 2, NO_PAD_CTRL)
>  #define MX25_PAD_UART2_RTS__GPIO_4_28	IOMUX_PAD(0x380, 0x188, 0x15, 0, 0, NO_PAD_CTRL)
>  
> -#define MX25_PAD_UART2_CTS__FEC_RX_ER	IOMUX_PAD(0x384, 0x18c, 0x12, 0x518, 2, NO_PAD_CTL)
> +#define MX25_PAD_UART2_CTS__FEC_RX_ER	IOMUX_PAD(0x384, 0x18c, 0x12, 0x518, 2, NO_PAD_CTRL)
>  #define MX25_PAD_UART2_CTS__UART2_CTS	IOMUX_PAD(0x384, 0x18c, 0x10, 0, 0, NO_PAD_CTRL)
>  #define MX25_PAD_UART2_CTS__GPIO_4_29	IOMUX_PAD(0x384, 0x18c, 0x15, 0, 0, NO_PAD_CTRL)
>  
>  #define MX25_PAD_SD1_CMD__SD1_CMD	IOMUX_PAD(0x388, 0x190, 0x10, 0, 0, PAD_CTL_PUS_47K_UP)
> -#define MX25_PAD_SD1_CMD__FEC_RDATA2	IOMUX_PAD(0x388, 0x190, 0x12, 0x50c, 2, NO_PAD_CTL)
> +#define MX25_PAD_SD1_CMD__FEC_RDATA2	IOMUX_PAD(0x388, 0x190, 0x12, 0x50c, 2, NO_PAD_CTRL)
>  #define MX25_PAD_SD1_CMD__GPIO_2_23	IOMUX_PAD(0x388, 0x190, 0x15, 0, 0, NO_PAD_CTRL)
>  
>  #define MX25_PAD_SD1_CLK__SD1_CLK	IOMUX_PAD(0x38c, 0x194, 0x10, 0, 0, PAD_CTL_PUS_47K_UP)
> -#define MX25_PAD_SD1_CLK__FEC_RDATA3	IOMUX_PAD(0x38c, 0x194, 0x12, 0x510, 2, NO_PAD_CTL)
> +#define MX25_PAD_SD1_CLK__FEC_RDATA3	IOMUX_PAD(0x38c, 0x194, 0x12, 0x510, 2, NO_PAD_CTRL)
>  #define MX25_PAD_SD1_CLK__GPIO_2_24	IOMUX_PAD(0x38c, 0x194, 0x15, 0, 0, NO_PAD_CTRL)
>  
>  #define MX25_PAD_SD1_DATA0__SD1_DATA0	IOMUX_PAD(0x390, 0x198, 0x10, 0, 0, PAD_CTL_PUS_47K_UP)
> @@ -377,11 +377,11 @@
>  #define MX25_PAD_SD1_DATA1__GPIO_2_26	IOMUX_PAD(0x394, 0x19c, 0x15, 0, 0, NO_PAD_CTRL)
>  
>  #define MX25_PAD_SD1_DATA2__SD1_DATA2	IOMUX_PAD(0x398, 0x1a0, 0x10, 0, 0, PAD_CTL_PUS_47K_UP)
> -#define MX25_PAD_SD1_DATA2__FEC_RX_CLK	IOMUX_PAD(0x398, 0x1a0, 0x15, 0x514, 2, NO_PAD_CTL)
> +#define MX25_PAD_SD1_DATA2__FEC_RX_CLK	IOMUX_PAD(0x398, 0x1a0, 0x15, 0x514, 2, NO_PAD_CTRL)
>  #define MX25_PAD_SD1_DATA2__GPIO_2_27	IOMUX_PAD(0x398, 0x1a0, 0x15, 0, 0, NO_PAD_CTRL)
>  
>  #define MX25_PAD_SD1_DATA3__SD1_DATA3	IOMUX_PAD(0x39c, 0x1a4, 0x10, 0, 0, PAD_CTL_PUS_47K_UP)
> -#define MX25_PAD_SD1_DATA3__FEC_CRS	IOMUX_PAD(0x39c, 0x1a4, 0x10, 0x508, 2, NO_PAD_CTL)
> +#define MX25_PAD_SD1_DATA3__FEC_CRS	IOMUX_PAD(0x39c, 0x1a4, 0x10, 0x508, 2, NO_PAD_CTRL)
>  #define MX25_PAD_SD1_DATA3__GPIO_2_28	IOMUX_PAD(0x39c, 0x1a4, 0x15, 0, 0, NO_PAD_CTRL)
>  
>  #define MX25_PAD_KPP_ROW0__KPP_ROW0	IOMUX_PAD(0x3a0, 0x1a8, 0x10, 0, 0, PAD_CTL_PKE)
> @@ -410,7 +410,7 @@
>  #define MX25_PAD_KPP_COL3__KPP_COL3	IOMUX_PAD(0x3bc, 0x1c4, 0x10, 0, 0, PAD_CTL_PKE | PAD_CTL_ODE)
>  #define MX25_PAD_KPP_COL3__GPIO_3_4	IOMUX_PAD(0x3bc, 0x1c4, 0x15, 0, 0, NO_PAD_CTRL)
>  
> -#define MX25_PAD_FEC_MDC__FEC_MDC	IOMUX_PAD(0x3c0, 0x1c8, 0x10, 0, 0, NO_PAD_CTL)
> +#define MX25_PAD_FEC_MDC__FEC_MDC	IOMUX_PAD(0x3c0, 0x1c8, 0x10, 0, 0, NO_PAD_CTRL)
>  #define MX25_PAD_FEC_MDC__AUD4_TXD	IOMUX_PAD(0x3c0, 0x1c8, 0x12, 0x464, 1, NO_PAD_CTRL)
>  #define MX25_PAD_FEC_MDC__GPIO_3_5	IOMUX_PAD(0x3c0, 0x1c8, 0x15, 0, 0, NO_PAD_CTRL)
>  
> @@ -418,23 +418,23 @@
>  #define MX25_PAD_FEC_MDIO__AUD4_RXD	IOMUX_PAD(0x3c4, 0x1cc, 0x12, 0x460, 1, NO_PAD_CTRL)
>  #define MX25_PAD_FEC_MDIO__GPIO_3_6	IOMUX_PAD(0x3c4, 0x1cc, 0x15, 0, 0, NO_PAD_CTRL)
>  
> -#define MX25_PAD_FEC_TDATA0__FEC_TDATA0	IOMUX_PAD(0x3c8, 0x1d0, 0x10, 0, 0, NO_PAD_CTL)
> +#define MX25_PAD_FEC_TDATA0__FEC_TDATA0	IOMUX_PAD(0x3c8, 0x1d0, 0x10, 0, 0, NO_PAD_CTRL)
>  #define MX25_PAD_FEC_TDATA0__GPIO_3_7	IOMUX_PAD(0x3c8, 0x1d0, 0x15, 0, 0, NO_PAD_CTRL)
>  
> -#define MX25_PAD_FEC_TDATA1__FEC_TDATA1	IOMUX_PAD(0x3cc, 0x1d4, 0x10, 0, 0, NO_PAD_CTL)
> +#define MX25_PAD_FEC_TDATA1__FEC_TDATA1	IOMUX_PAD(0x3cc, 0x1d4, 0x10, 0, 0, NO_PAD_CTRL)
>  #define MX25_PAD_FEC_TDATA1__AUD4_TXFS	IOMUX_PAD(0x3cc, 0x1d4, 0x12, 0x474, 1, NO_PAD_CTRL)
>  #define MX25_PAD_FEC_TDATA1__GPIO_3_8	IOMUX_PAD(0x3cc, 0x1d4, 0x15, 0, 0, NO_PAD_CTRL)
>  
> -#define MX25_PAD_FEC_TX_EN__FEC_TX_EN	IOMUX_PAD(0x3d0, 0x1d8, 0x10, 0, 0, NO_PAD_CTL)
> +#define MX25_PAD_FEC_TX_EN__FEC_TX_EN	IOMUX_PAD(0x3d0, 0x1d8, 0x10, 0, 0, NO_PAD_CTRL)
>  #define MX25_PAD_FEC_TX_EN__GPIO_3_9   	IOMUX_PAD(0x3d0, 0x1d8, 0x15, 0, 0, NO_PAD_CTRL)
>  
> -#define MX25_PAD_FEC_RDATA0__FEC_RDATA0	IOMUX_PAD(0x3d4, 0x1dc, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTL)
> +#define MX25_PAD_FEC_RDATA0__FEC_RDATA0	IOMUX_PAD(0x3d4, 0x1dc, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTRL)
>  #define MX25_PAD_FEC_RDATA0__GPIO_3_10	IOMUX_PAD(0x3d4, 0x1dc, 0x15, 0, 0, NO_PAD_CTRL)
>  
> -#define MX25_PAD_FEC_RDATA1__FEC_RDATA1	IOMUX_PAD(0x3d8, 0x1e0, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTL)
> +#define MX25_PAD_FEC_RDATA1__FEC_RDATA1	IOMUX_PAD(0x3d8, 0x1e0, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTRL)
>  #define MX25_PAD_FEC_RDATA1__GPIO_3_11	IOMUX_PAD(0x3d8, 0x1e0, 0x15, 0, 0, NO_PAD_CTRL)
>  
> -#define MX25_PAD_FEC_RX_DV__FEC_RX_DV	IOMUX_PAD(0x3dc, 0x1e4, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTL)
> +#define MX25_PAD_FEC_RX_DV__FEC_RX_DV	IOMUX_PAD(0x3dc, 0x1e4, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTRL)
>  #define MX25_PAD_FEC_RX_DV__CAN2_RX	IOMUX_PAD(0x3dc, 0x1e4, 0x14, 0x484, 0, PAD_CTL_PUS_22K_UP)
>  #define MX25_PAD_FEC_RX_DV__GPIO_3_12	IOMUX_PAD(0x3dc, 0x1e4, 0x15, 0, 0, NO_PAD_CTRL)
>  
> -- 
> 1.6.5
> 
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

Re: [PATCH 2/4] mx25: don't force input on FEC pins

[Sascha Hauer]

On Mon, Dec 14, 2009 at 12:19:40PM +0200, Baruch Siach wrote:
> Signed-off-by: Baruch Siach <baruch@tkos.co.il>
> ---
>  arch/arm/plat-mxc/include/mach/iomux-mx25.h |   20 ++++++++++----------
>  1 files changed, 10 insertions(+), 10 deletions(-)

Can you explain why this is needed in the commit message please?

Sascha

> 
> diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx25.h b/arch/arm/plat-mxc/include/mach/iomux-mx25.h
> index 9af494f..d7c0dea 100644
> --- a/arch/arm/plat-mxc/include/mach/iomux-mx25.h
> +++ b/arch/arm/plat-mxc/include/mach/iomux-mx25.h
> @@ -54,7 +54,7 @@
>  #define MX25_PAD_A16__GPIO_2_2		IOMUX_PAD(0x000, 0x018, 0x15, 0, 0, NO_PAD_CTRL)
>  
>  #define MX25_PAD_A17__A17		IOMUX_PAD(0x238, 0x01c, 0x10, 0, 0, NO_PAD_CTRL)
> -#define MX25_PAD_A17__GPIO_2_3		IOMUX_PAD(0x238, 0x01c, 0x15, 0, 0, NO_PAD_CTRL)
> +#define MX25_PAD_A17__GPIO_2_3		IOMUX_PAD(0x238, 0x01c, 0x05, 0, 0, NO_PAD_CTRL)
>  
>  #define MX25_PAD_A18__A18		IOMUX_PAD(0x23c, 0x020, 0x10, 0, 0, NO_PAD_CTRL)
>  #define MX25_PAD_A18__GPIO_2_4		IOMUX_PAD(0x23c, 0x020, 0x15, 0, 0, NO_PAD_CTRL)
> @@ -410,35 +410,35 @@
>  #define MX25_PAD_KPP_COL3__KPP_COL3	IOMUX_PAD(0x3bc, 0x1c4, 0x10, 0, 0, PAD_CTL_PKE | PAD_CTL_ODE)
>  #define MX25_PAD_KPP_COL3__GPIO_3_4	IOMUX_PAD(0x3bc, 0x1c4, 0x15, 0, 0, NO_PAD_CTRL)
>  
> -#define MX25_PAD_FEC_MDC__FEC_MDC	IOMUX_PAD(0x3c0, 0x1c8, 0x10, 0, 0, NO_PAD_CTRL)
> +#define MX25_PAD_FEC_MDC__FEC_MDC	IOMUX_PAD(0x3c0, 0x1c8, 0x00, 0, 0, NO_PAD_CTRL)
>  #define MX25_PAD_FEC_MDC__AUD4_TXD	IOMUX_PAD(0x3c0, 0x1c8, 0x12, 0x464, 1, NO_PAD_CTRL)
>  #define MX25_PAD_FEC_MDC__GPIO_3_5	IOMUX_PAD(0x3c0, 0x1c8, 0x15, 0, 0, NO_PAD_CTRL)
>  
> -#define MX25_PAD_FEC_MDIO__FEC_MDIO	IOMUX_PAD(0x3c4, 0x1cc, 0x10, 0, 0, PAD_CTL_HYS | PAD_CTL_PUS_22K_UP)
> +#define MX25_PAD_FEC_MDIO__FEC_MDIO	IOMUX_PAD(0x3c4, 0x1cc, 0x00, 0, 0, PAD_CTL_HYS | PAD_CTL_PUS_22K_UP)
>  #define MX25_PAD_FEC_MDIO__AUD4_RXD	IOMUX_PAD(0x3c4, 0x1cc, 0x12, 0x460, 1, NO_PAD_CTRL)
>  #define MX25_PAD_FEC_MDIO__GPIO_3_6	IOMUX_PAD(0x3c4, 0x1cc, 0x15, 0, 0, NO_PAD_CTRL)
>  
> -#define MX25_PAD_FEC_TDATA0__FEC_TDATA0	IOMUX_PAD(0x3c8, 0x1d0, 0x10, 0, 0, NO_PAD_CTRL)
> +#define MX25_PAD_FEC_TDATA0__FEC_TDATA0	IOMUX_PAD(0x3c8, 0x1d0, 0x00, 0, 0, NO_PAD_CTRL)
>  #define MX25_PAD_FEC_TDATA0__GPIO_3_7	IOMUX_PAD(0x3c8, 0x1d0, 0x15, 0, 0, NO_PAD_CTRL)
>  
> -#define MX25_PAD_FEC_TDATA1__FEC_TDATA1	IOMUX_PAD(0x3cc, 0x1d4, 0x10, 0, 0, NO_PAD_CTRL)
> +#define MX25_PAD_FEC_TDATA1__FEC_TDATA1	IOMUX_PAD(0x3cc, 0x1d4, 0x00, 0, 0, NO_PAD_CTRL)
>  #define MX25_PAD_FEC_TDATA1__AUD4_TXFS	IOMUX_PAD(0x3cc, 0x1d4, 0x12, 0x474, 1, NO_PAD_CTRL)
>  #define MX25_PAD_FEC_TDATA1__GPIO_3_8	IOMUX_PAD(0x3cc, 0x1d4, 0x15, 0, 0, NO_PAD_CTRL)
>  
> -#define MX25_PAD_FEC_TX_EN__FEC_TX_EN	IOMUX_PAD(0x3d0, 0x1d8, 0x10, 0, 0, NO_PAD_CTRL)
> +#define MX25_PAD_FEC_TX_EN__FEC_TX_EN	IOMUX_PAD(0x3d0, 0x1d8, 0x00, 0, 0, NO_PAD_CTRL)
>  #define MX25_PAD_FEC_TX_EN__GPIO_3_9   	IOMUX_PAD(0x3d0, 0x1d8, 0x15, 0, 0, NO_PAD_CTRL)
>  
> -#define MX25_PAD_FEC_RDATA0__FEC_RDATA0	IOMUX_PAD(0x3d4, 0x1dc, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTRL)
> +#define MX25_PAD_FEC_RDATA0__FEC_RDATA0	IOMUX_PAD(0x3d4, 0x1dc, 0x00, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTRL)
>  #define MX25_PAD_FEC_RDATA0__GPIO_3_10	IOMUX_PAD(0x3d4, 0x1dc, 0x15, 0, 0, NO_PAD_CTRL)
>  
> -#define MX25_PAD_FEC_RDATA1__FEC_RDATA1	IOMUX_PAD(0x3d8, 0x1e0, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTRL)
> +#define MX25_PAD_FEC_RDATA1__FEC_RDATA1	IOMUX_PAD(0x3d8, 0x1e0, 0x00, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTRL)
>  #define MX25_PAD_FEC_RDATA1__GPIO_3_11	IOMUX_PAD(0x3d8, 0x1e0, 0x15, 0, 0, NO_PAD_CTRL)
>  
> -#define MX25_PAD_FEC_RX_DV__FEC_RX_DV	IOMUX_PAD(0x3dc, 0x1e4, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTRL)
> +#define MX25_PAD_FEC_RX_DV__FEC_RX_DV	IOMUX_PAD(0x3dc, 0x1e4, 0x00, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTRL)
>  #define MX25_PAD_FEC_RX_DV__CAN2_RX	IOMUX_PAD(0x3dc, 0x1e4, 0x14, 0x484, 0, PAD_CTL_PUS_22K_UP)
>  #define MX25_PAD_FEC_RX_DV__GPIO_3_12	IOMUX_PAD(0x3dc, 0x1e4, 0x15, 0, 0, NO_PAD_CTRL)
>  
> -#define MX25_PAD_FEC_TX_CLK__FEC_TX_CLK	IOMUX_PAD(0x3e0, 0x1e8, 0x10, 0, 0, PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN)
> +#define MX25_PAD_FEC_TX_CLK__FEC_TX_CLK	IOMUX_PAD(0x3e0, 0x1e8, 0x00, 0, 0, PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN)
>  #define MX25_PAD_FEC_TX_CLK__GPIO_3_13	IOMUX_PAD(0x3e0, 0x1e8, 0x15, 0, 0, NO_PAD_CTRL)
>  
>  #define MX25_PAD_RTCK__RTCK		IOMUX_PAD(0x3e4, 0x1ec, 0x10, 0, 0, NO_PAD_CTRL)
> -- 
> 1.6.5
> 
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

[PATCH 2/4] mx25: don't force input on FEC pins

[Sascha Hauer]

On Mon, Dec 14, 2009 at 12:19:40PM +0200, Baruch Siach wrote:
> Signed-off-by: Baruch Siach <baruch@tkos.co.il>
> ---
>  arch/arm/plat-mxc/include/mach/iomux-mx25.h |   20 ++++++++++----------
>  1 files changed, 10 insertions(+), 10 deletions(-)

Can you explain why this is needed in the commit message please?

Sascha

> 
> diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx25.h b/arch/arm/plat-mxc/include/mach/iomux-mx25.h
> index 9af494f..d7c0dea 100644
> --- a/arch/arm/plat-mxc/include/mach/iomux-mx25.h
> +++ b/arch/arm/plat-mxc/include/mach/iomux-mx25.h
> @@ -54,7 +54,7 @@
>  #define MX25_PAD_A16__GPIO_2_2		IOMUX_PAD(0x000, 0x018, 0x15, 0, 0, NO_PAD_CTRL)
>  
>  #define MX25_PAD_A17__A17		IOMUX_PAD(0x238, 0x01c, 0x10, 0, 0, NO_PAD_CTRL)
> -#define MX25_PAD_A17__GPIO_2_3		IOMUX_PAD(0x238, 0x01c, 0x15, 0, 0, NO_PAD_CTRL)
> +#define MX25_PAD_A17__GPIO_2_3		IOMUX_PAD(0x238, 0x01c, 0x05, 0, 0, NO_PAD_CTRL)
>  
>  #define MX25_PAD_A18__A18		IOMUX_PAD(0x23c, 0x020, 0x10, 0, 0, NO_PAD_CTRL)
>  #define MX25_PAD_A18__GPIO_2_4		IOMUX_PAD(0x23c, 0x020, 0x15, 0, 0, NO_PAD_CTRL)
> @@ -410,35 +410,35 @@
>  #define MX25_PAD_KPP_COL3__KPP_COL3	IOMUX_PAD(0x3bc, 0x1c4, 0x10, 0, 0, PAD_CTL_PKE | PAD_CTL_ODE)
>  #define MX25_PAD_KPP_COL3__GPIO_3_4	IOMUX_PAD(0x3bc, 0x1c4, 0x15, 0, 0, NO_PAD_CTRL)
>  
> -#define MX25_PAD_FEC_MDC__FEC_MDC	IOMUX_PAD(0x3c0, 0x1c8, 0x10, 0, 0, NO_PAD_CTRL)
> +#define MX25_PAD_FEC_MDC__FEC_MDC	IOMUX_PAD(0x3c0, 0x1c8, 0x00, 0, 0, NO_PAD_CTRL)
>  #define MX25_PAD_FEC_MDC__AUD4_TXD	IOMUX_PAD(0x3c0, 0x1c8, 0x12, 0x464, 1, NO_PAD_CTRL)
>  #define MX25_PAD_FEC_MDC__GPIO_3_5	IOMUX_PAD(0x3c0, 0x1c8, 0x15, 0, 0, NO_PAD_CTRL)
>  
> -#define MX25_PAD_FEC_MDIO__FEC_MDIO	IOMUX_PAD(0x3c4, 0x1cc, 0x10, 0, 0, PAD_CTL_HYS | PAD_CTL_PUS_22K_UP)
> +#define MX25_PAD_FEC_MDIO__FEC_MDIO	IOMUX_PAD(0x3c4, 0x1cc, 0x00, 0, 0, PAD_CTL_HYS | PAD_CTL_PUS_22K_UP)
>  #define MX25_PAD_FEC_MDIO__AUD4_RXD	IOMUX_PAD(0x3c4, 0x1cc, 0x12, 0x460, 1, NO_PAD_CTRL)
>  #define MX25_PAD_FEC_MDIO__GPIO_3_6	IOMUX_PAD(0x3c4, 0x1cc, 0x15, 0, 0, NO_PAD_CTRL)
>  
> -#define MX25_PAD_FEC_TDATA0__FEC_TDATA0	IOMUX_PAD(0x3c8, 0x1d0, 0x10, 0, 0, NO_PAD_CTRL)
> +#define MX25_PAD_FEC_TDATA0__FEC_TDATA0	IOMUX_PAD(0x3c8, 0x1d0, 0x00, 0, 0, NO_PAD_CTRL)
>  #define MX25_PAD_FEC_TDATA0__GPIO_3_7	IOMUX_PAD(0x3c8, 0x1d0, 0x15, 0, 0, NO_PAD_CTRL)
>  
> -#define MX25_PAD_FEC_TDATA1__FEC_TDATA1	IOMUX_PAD(0x3cc, 0x1d4, 0x10, 0, 0, NO_PAD_CTRL)
> +#define MX25_PAD_FEC_TDATA1__FEC_TDATA1	IOMUX_PAD(0x3cc, 0x1d4, 0x00, 0, 0, NO_PAD_CTRL)
>  #define MX25_PAD_FEC_TDATA1__AUD4_TXFS	IOMUX_PAD(0x3cc, 0x1d4, 0x12, 0x474, 1, NO_PAD_CTRL)
>  #define MX25_PAD_FEC_TDATA1__GPIO_3_8	IOMUX_PAD(0x3cc, 0x1d4, 0x15, 0, 0, NO_PAD_CTRL)
>  
> -#define MX25_PAD_FEC_TX_EN__FEC_TX_EN	IOMUX_PAD(0x3d0, 0x1d8, 0x10, 0, 0, NO_PAD_CTRL)
> +#define MX25_PAD_FEC_TX_EN__FEC_TX_EN	IOMUX_PAD(0x3d0, 0x1d8, 0x00, 0, 0, NO_PAD_CTRL)
>  #define MX25_PAD_FEC_TX_EN__GPIO_3_9   	IOMUX_PAD(0x3d0, 0x1d8, 0x15, 0, 0, NO_PAD_CTRL)
>  
> -#define MX25_PAD_FEC_RDATA0__FEC_RDATA0	IOMUX_PAD(0x3d4, 0x1dc, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTRL)
> +#define MX25_PAD_FEC_RDATA0__FEC_RDATA0	IOMUX_PAD(0x3d4, 0x1dc, 0x00, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTRL)
>  #define MX25_PAD_FEC_RDATA0__GPIO_3_10	IOMUX_PAD(0x3d4, 0x1dc, 0x15, 0, 0, NO_PAD_CTRL)
>  
> -#define MX25_PAD_FEC_RDATA1__FEC_RDATA1	IOMUX_PAD(0x3d8, 0x1e0, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTRL)
> +#define MX25_PAD_FEC_RDATA1__FEC_RDATA1	IOMUX_PAD(0x3d8, 0x1e0, 0x00, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTRL)
>  #define MX25_PAD_FEC_RDATA1__GPIO_3_11	IOMUX_PAD(0x3d8, 0x1e0, 0x15, 0, 0, NO_PAD_CTRL)
>  
> -#define MX25_PAD_FEC_RX_DV__FEC_RX_DV	IOMUX_PAD(0x3dc, 0x1e4, 0x10, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTRL)
> +#define MX25_PAD_FEC_RX_DV__FEC_RX_DV	IOMUX_PAD(0x3dc, 0x1e4, 0x00, 0, 0, PAD_CTL_PUS_100K_DOWN | NO_PAD_CTRL)
>  #define MX25_PAD_FEC_RX_DV__CAN2_RX	IOMUX_PAD(0x3dc, 0x1e4, 0x14, 0x484, 0, PAD_CTL_PUS_22K_UP)
>  #define MX25_PAD_FEC_RX_DV__GPIO_3_12	IOMUX_PAD(0x3dc, 0x1e4, 0x15, 0, 0, NO_PAD_CTRL)
>  
> -#define MX25_PAD_FEC_TX_CLK__FEC_TX_CLK	IOMUX_PAD(0x3e0, 0x1e8, 0x10, 0, 0, PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN)
> +#define MX25_PAD_FEC_TX_CLK__FEC_TX_CLK	IOMUX_PAD(0x3e0, 0x1e8, 0x00, 0, 0, PAD_CTL_HYS | PAD_CTL_PUS_100K_DOWN)
>  #define MX25_PAD_FEC_TX_CLK__GPIO_3_13	IOMUX_PAD(0x3e0, 0x1e8, 0x15, 0, 0, NO_PAD_CTRL)
>  
>  #define MX25_PAD_RTCK__RTCK		IOMUX_PAD(0x3e4, 0x1ec, 0x10, 0, 0, NO_PAD_CTRL)
> -- 
> 1.6.5
> 
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

Re: [PATCH 4/4] mx25: add support for FEC on i.MX25 PDK

[Sascha Hauer]

On Mon, Dec 14, 2009 at 12:19:42PM +0200, Baruch Siach wrote:
> Signed-off-by: Baruch Siach <baruch@tkos.co.il>
> ---
>  arch/arm/mach-mx25/clock.c            |    2 +
>  arch/arm/mach-mx25/devices.c          |   19 +++++++++++++++
>  arch/arm/mach-mx25/devices.h          |    1 +
>  arch/arm/mach-mx25/mx25pdk.c          |   40 ++++++++++++++++++++++++++++++++-
>  arch/arm/plat-mxc/include/mach/mx25.h |    4 +++

Can you please split this into two patches, one for the i.MX25 and one
for the board support?

Sascha

>  5 files changed, 65 insertions(+), 1 deletions(-)
> 
> diff --git a/arch/arm/mach-mx25/clock.c b/arch/arm/mach-mx25/clock.c
> index dbbbcc6..ea8c3da 100644
> --- a/arch/arm/mach-mx25/clock.c
> +++ b/arch/arm/mach-mx25/clock.c
> @@ -173,6 +173,7 @@ DEFINE_CLOCK(pwm4_clk,	 0, CCM_CGCR2,  2, get_rate_ipg, NULL);
>  DEFINE_CLOCK(kpp_clk,	 0, CCM_CGCR1, 28, get_rate_ipg, NULL);
>  DEFINE_CLOCK(tsc_clk,	 0, CCM_CGCR2, 13, get_rate_ipg, NULL);
>  DEFINE_CLOCK(i2c_clk,	 0, CCM_CGCR0,  6, get_rate_i2c, NULL);
> +DEFINE_CLOCK(fec_clk,	 0, CCM_CGCR0, 23, get_rate_ipg, NULL);
>  
>  #define _REGISTER_CLOCK(d, n, c)	\
>  	{				\
> @@ -204,6 +205,7 @@ static struct clk_lookup lookups[] = {
>  	_REGISTER_CLOCK("imx-i2c.0", NULL, i2c_clk)
>  	_REGISTER_CLOCK("imx-i2c.1", NULL, i2c_clk)
>  	_REGISTER_CLOCK("imx-i2c.2", NULL, i2c_clk)
> +	_REGISTER_CLOCK("fec.0", NULL, fec_clk)
>  };
>  
>  int __init mx25_clocks_init(unsigned long fref)
> diff --git a/arch/arm/mach-mx25/devices.c b/arch/arm/mach-mx25/devices.c
> index 63511de..9fdeea1 100644
> --- a/arch/arm/mach-mx25/devices.c
> +++ b/arch/arm/mach-mx25/devices.c
> @@ -419,3 +419,22 @@ int __init mxc_register_gpios(void)
>  	return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports));
>  }
>  
> +static struct resource mx25_fec_resources[] = {
> +	{
> +		.start	= MX25_FEC_BASE_ADDR,
> +		.end	= MX25_FEC_BASE_ADDR + 0xfff,
> +		.flags	= IORESOURCE_MEM,
> +	},
> +	{
> +		.start	= MX25_INT_FEC,
> +		.end	= MX25_INT_FEC,
> +		.flags	= IORESOURCE_IRQ,
> +	},
> +};
> +
> +struct platform_device mx25_fec_device = {
> +	.name	= "fec",
> +	.id	= 0,
> +	.num_resources	= ARRAY_SIZE(mx25_fec_resources),
> +	.resource	= mx25_fec_resources,
> +};
> diff --git a/arch/arm/mach-mx25/devices.h b/arch/arm/mach-mx25/devices.h
> index fe6bf88..fe5420f 100644
> --- a/arch/arm/mach-mx25/devices.h
> +++ b/arch/arm/mach-mx25/devices.h
> @@ -17,3 +17,4 @@ extern struct platform_device mxc_keypad_device;
>  extern struct platform_device mxc_i2c_device0;
>  extern struct platform_device mxc_i2c_device1;
>  extern struct platform_device mxc_i2c_device2;
> +extern struct platform_device mx25_fec_device;
> diff --git a/arch/arm/mach-mx25/mx25pdk.c b/arch/arm/mach-mx25/mx25pdk.c
> index d23ae57..011d6c3 100644
> --- a/arch/arm/mach-mx25/mx25pdk.c
> +++ b/arch/arm/mach-mx25/mx25pdk.c
> @@ -18,6 +18,7 @@
>  
>  #include <linux/types.h>
>  #include <linux/init.h>
> +#include <linux/delay.h>
>  #include <linux/clk.h>
>  #include <linux/irq.h>
>  #include <linux/gpio.h>
> @@ -35,16 +36,53 @@
>  #include <mach/mx25.h>
>  #include <mach/mxc_nand.h>
>  #include "devices.h"
> -#include <mach/iomux-v3.h>
> +#include <mach/iomux.h>
>  
>  static struct imxuart_platform_data uart_pdata = {
>  	.flags = IMXUART_HAVE_RTSCTS,
>  };
>  
> +static struct pad_desc mx25pdk_pads[] = {
> +	MX25_PAD_FEC_MDC__FEC_MDC,
> +	MX25_PAD_FEC_MDIO__FEC_MDIO,
> +	MX25_PAD_FEC_TDATA0__FEC_TDATA0,
> +	MX25_PAD_FEC_TDATA1__FEC_TDATA1,
> +	MX25_PAD_FEC_TX_EN__FEC_TX_EN,
> +	MX25_PAD_FEC_RDATA0__FEC_RDATA0,
> +	MX25_PAD_FEC_RDATA1__FEC_RDATA1,
> +	MX25_PAD_FEC_RX_DV__FEC_RX_DV,
> +	MX25_PAD_FEC_TX_CLK__FEC_TX_CLK,
> +	MX25_PAD_A17__GPIO_2_3, /* FEC_EN, GPIO 35 */
> +	MX25_PAD_D12__GPIO_4_8, /* FEC_RESET_B, GPIO 104 */
> +};
> +
> +#define FEC_ENABLE_GPIO		35
> +#define FEC_RESET_B_GPIO	104
> +
> +static void __init mx25pdk_fec_reset(void)
> +{
> +	gpio_request(FEC_ENABLE_GPIO, "FEC PHY enable");
> +	gpio_request(FEC_RESET_B_GPIO, "FEC PHY reset");
> +
> +	gpio_direction_output(FEC_ENABLE_GPIO, 0);  /* drop PHY power */
> +	gpio_direction_output(FEC_RESET_B_GPIO, 0); /* assert reset */
> +	udelay(2);
> +
> +	/* turn on PHY power and lift reset */
> +	gpio_set_value(FEC_ENABLE_GPIO, 1);
> +	gpio_set_value(FEC_RESET_B_GPIO, 1);
> +}
> +
>  static void __init mx25pdk_init(void)
>  {
> +	mxc_iomux_v3_setup_multiple_pads(mx25pdk_pads,
> +			ARRAY_SIZE(mx25pdk_pads));
> +
>  	mxc_register_device(&mxc_uart_device0, &uart_pdata);
>  	mxc_register_device(&mxc_usbh2, NULL);
> +
> +	mx25pdk_fec_reset();
> +	mxc_register_device(&mx25_fec_device, NULL);
>  }
>  
>  static void __init mx25pdk_timer_init(void)
> diff --git a/arch/arm/plat-mxc/include/mach/mx25.h b/arch/arm/plat-mxc/include/mach/mx25.h
> index ec64bd9..106f651 100644
> --- a/arch/arm/plat-mxc/include/mach/mx25.h
> +++ b/arch/arm/plat-mxc/include/mach/mx25.h
> @@ -41,4 +41,8 @@
>  #define UART1_BASE_ADDR			0x43f90000
>  #define UART2_BASE_ADDR			0x43f94000
>  
> +#define MX25_FEC_BASE_ADDR		0x50038000
> +
> +#define MX25_INT_FEC	57
> +
>  #endif /* __MACH_MX25_H__ */
> -- 
> 1.6.5
> 
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

[PATCH 4/4] mx25: add support for FEC on i.MX25 PDK

[Sascha Hauer]

On Mon, Dec 14, 2009 at 12:19:42PM +0200, Baruch Siach wrote:
> Signed-off-by: Baruch Siach <baruch@tkos.co.il>
> ---
>  arch/arm/mach-mx25/clock.c            |    2 +
>  arch/arm/mach-mx25/devices.c          |   19 +++++++++++++++
>  arch/arm/mach-mx25/devices.h          |    1 +
>  arch/arm/mach-mx25/mx25pdk.c          |   40 ++++++++++++++++++++++++++++++++-
>  arch/arm/plat-mxc/include/mach/mx25.h |    4 +++

Can you please split this into two patches, one for the i.MX25 and one
for the board support?

Sascha

>  5 files changed, 65 insertions(+), 1 deletions(-)
> 
> diff --git a/arch/arm/mach-mx25/clock.c b/arch/arm/mach-mx25/clock.c
> index dbbbcc6..ea8c3da 100644
> --- a/arch/arm/mach-mx25/clock.c
> +++ b/arch/arm/mach-mx25/clock.c
> @@ -173,6 +173,7 @@ DEFINE_CLOCK(pwm4_clk,	 0, CCM_CGCR2,  2, get_rate_ipg, NULL);
>  DEFINE_CLOCK(kpp_clk,	 0, CCM_CGCR1, 28, get_rate_ipg, NULL);
>  DEFINE_CLOCK(tsc_clk,	 0, CCM_CGCR2, 13, get_rate_ipg, NULL);
>  DEFINE_CLOCK(i2c_clk,	 0, CCM_CGCR0,  6, get_rate_i2c, NULL);
> +DEFINE_CLOCK(fec_clk,	 0, CCM_CGCR0, 23, get_rate_ipg, NULL);
>  
>  #define _REGISTER_CLOCK(d, n, c)	\
>  	{				\
> @@ -204,6 +205,7 @@ static struct clk_lookup lookups[] = {
>  	_REGISTER_CLOCK("imx-i2c.0", NULL, i2c_clk)
>  	_REGISTER_CLOCK("imx-i2c.1", NULL, i2c_clk)
>  	_REGISTER_CLOCK("imx-i2c.2", NULL, i2c_clk)
> +	_REGISTER_CLOCK("fec.0", NULL, fec_clk)
>  };
>  
>  int __init mx25_clocks_init(unsigned long fref)
> diff --git a/arch/arm/mach-mx25/devices.c b/arch/arm/mach-mx25/devices.c
> index 63511de..9fdeea1 100644
> --- a/arch/arm/mach-mx25/devices.c
> +++ b/arch/arm/mach-mx25/devices.c
> @@ -419,3 +419,22 @@ int __init mxc_register_gpios(void)
>  	return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports));
>  }
>  
> +static struct resource mx25_fec_resources[] = {
> +	{
> +		.start	= MX25_FEC_BASE_ADDR,
> +		.end	= MX25_FEC_BASE_ADDR + 0xfff,
> +		.flags	= IORESOURCE_MEM,
> +	},
> +	{
> +		.start	= MX25_INT_FEC,
> +		.end	= MX25_INT_FEC,
> +		.flags	= IORESOURCE_IRQ,
> +	},
> +};
> +
> +struct platform_device mx25_fec_device = {
> +	.name	= "fec",
> +	.id	= 0,
> +	.num_resources	= ARRAY_SIZE(mx25_fec_resources),
> +	.resource	= mx25_fec_resources,
> +};
> diff --git a/arch/arm/mach-mx25/devices.h b/arch/arm/mach-mx25/devices.h
> index fe6bf88..fe5420f 100644
> --- a/arch/arm/mach-mx25/devices.h
> +++ b/arch/arm/mach-mx25/devices.h
> @@ -17,3 +17,4 @@ extern struct platform_device mxc_keypad_device;
>  extern struct platform_device mxc_i2c_device0;
>  extern struct platform_device mxc_i2c_device1;
>  extern struct platform_device mxc_i2c_device2;
> +extern struct platform_device mx25_fec_device;
> diff --git a/arch/arm/mach-mx25/mx25pdk.c b/arch/arm/mach-mx25/mx25pdk.c
> index d23ae57..011d6c3 100644
> --- a/arch/arm/mach-mx25/mx25pdk.c
> +++ b/arch/arm/mach-mx25/mx25pdk.c
> @@ -18,6 +18,7 @@
>  
>  #include <linux/types.h>
>  #include <linux/init.h>
> +#include <linux/delay.h>
>  #include <linux/clk.h>
>  #include <linux/irq.h>
>  #include <linux/gpio.h>
> @@ -35,16 +36,53 @@
>  #include <mach/mx25.h>
>  #include <mach/mxc_nand.h>
>  #include "devices.h"
> -#include <mach/iomux-v3.h>
> +#include <mach/iomux.h>
>  
>  static struct imxuart_platform_data uart_pdata = {
>  	.flags = IMXUART_HAVE_RTSCTS,
>  };
>  
> +static struct pad_desc mx25pdk_pads[] = {
> +	MX25_PAD_FEC_MDC__FEC_MDC,
> +	MX25_PAD_FEC_MDIO__FEC_MDIO,
> +	MX25_PAD_FEC_TDATA0__FEC_TDATA0,
> +	MX25_PAD_FEC_TDATA1__FEC_TDATA1,
> +	MX25_PAD_FEC_TX_EN__FEC_TX_EN,
> +	MX25_PAD_FEC_RDATA0__FEC_RDATA0,
> +	MX25_PAD_FEC_RDATA1__FEC_RDATA1,
> +	MX25_PAD_FEC_RX_DV__FEC_RX_DV,
> +	MX25_PAD_FEC_TX_CLK__FEC_TX_CLK,
> +	MX25_PAD_A17__GPIO_2_3, /* FEC_EN, GPIO 35 */
> +	MX25_PAD_D12__GPIO_4_8, /* FEC_RESET_B, GPIO 104 */
> +};
> +
> +#define FEC_ENABLE_GPIO		35
> +#define FEC_RESET_B_GPIO	104
> +
> +static void __init mx25pdk_fec_reset(void)
> +{
> +	gpio_request(FEC_ENABLE_GPIO, "FEC PHY enable");
> +	gpio_request(FEC_RESET_B_GPIO, "FEC PHY reset");
> +
> +	gpio_direction_output(FEC_ENABLE_GPIO, 0);  /* drop PHY power */
> +	gpio_direction_output(FEC_RESET_B_GPIO, 0); /* assert reset */
> +	udelay(2);
> +
> +	/* turn on PHY power and lift reset */
> +	gpio_set_value(FEC_ENABLE_GPIO, 1);
> +	gpio_set_value(FEC_RESET_B_GPIO, 1);
> +}
> +
>  static void __init mx25pdk_init(void)
>  {
> +	mxc_iomux_v3_setup_multiple_pads(mx25pdk_pads,
> +			ARRAY_SIZE(mx25pdk_pads));
> +
>  	mxc_register_device(&mxc_uart_device0, &uart_pdata);
>  	mxc_register_device(&mxc_usbh2, NULL);
> +
> +	mx25pdk_fec_reset();
> +	mxc_register_device(&mx25_fec_device, NULL);
>  }
>  
>  static void __init mx25pdk_timer_init(void)
> diff --git a/arch/arm/plat-mxc/include/mach/mx25.h b/arch/arm/plat-mxc/include/mach/mx25.h
> index ec64bd9..106f651 100644
> --- a/arch/arm/plat-mxc/include/mach/mx25.h
> +++ b/arch/arm/plat-mxc/include/mach/mx25.h
> @@ -41,4 +41,8 @@
>  #define UART1_BASE_ADDR			0x43f90000
>  #define UART2_BASE_ADDR			0x43f94000
>  
> +#define MX25_FEC_BASE_ADDR		0x50038000
> +
> +#define MX25_INT_FEC	57
> +
>  #endif /* __MACH_MX25_H__ */
> -- 
> 1.6.5
> 
> 

-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

[PATCH 1/2] mx25: add support for FEC on i.MX25

[Baruch Siach]

---
 arch/arm/mach-mx25/clock.c            |    2 ++
 arch/arm/mach-mx25/devices.c          |   19 +++++++++++++++++++
 arch/arm/mach-mx25/devices.h          |    1 +
 arch/arm/plat-mxc/include/mach/mx25.h |    4 ++++
 4 files changed, 26 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-mx25/clock.c b/arch/arm/mach-mx25/clock.c
index dbbbcc6..ea8c3da 100644
--- a/arch/arm/mach-mx25/clock.c
+++ b/arch/arm/mach-mx25/clock.c
@@ -173,6 +173,7 @@ DEFINE_CLOCK(pwm4_clk,	 0, CCM_CGCR2,  2, get_rate_ipg, NULL);
 DEFINE_CLOCK(kpp_clk,	 0, CCM_CGCR1, 28, get_rate_ipg, NULL);
 DEFINE_CLOCK(tsc_clk,	 0, CCM_CGCR2, 13, get_rate_ipg, NULL);
 DEFINE_CLOCK(i2c_clk,	 0, CCM_CGCR0,  6, get_rate_i2c, NULL);
+DEFINE_CLOCK(fec_clk,	 0, CCM_CGCR0, 23, get_rate_ipg, NULL);
 
 #define _REGISTER_CLOCK(d, n, c)	\
 	{				\
@@ -204,6 +205,7 @@ static struct clk_lookup lookups[] = {
 	_REGISTER_CLOCK("imx-i2c.0", NULL, i2c_clk)
 	_REGISTER_CLOCK("imx-i2c.1", NULL, i2c_clk)
 	_REGISTER_CLOCK("imx-i2c.2", NULL, i2c_clk)
+	_REGISTER_CLOCK("fec.0", NULL, fec_clk)
 };
 
 int __init mx25_clocks_init(unsigned long fref)
diff --git a/arch/arm/mach-mx25/devices.c b/arch/arm/mach-mx25/devices.c
index 63511de..9fdeea1 100644
--- a/arch/arm/mach-mx25/devices.c
+++ b/arch/arm/mach-mx25/devices.c
@@ -419,3 +419,22 @@ int __init mxc_register_gpios(void)
 	return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports));
 }
 
+static struct resource mx25_fec_resources[] = {
+	{
+		.start	= MX25_FEC_BASE_ADDR,
+		.end	= MX25_FEC_BASE_ADDR + 0xfff,
+		.flags	= IORESOURCE_MEM,
+	},
+	{
+		.start	= MX25_INT_FEC,
+		.end	= MX25_INT_FEC,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+struct platform_device mx25_fec_device = {
+	.name	= "fec",
+	.id	= 0,
+	.num_resources	= ARRAY_SIZE(mx25_fec_resources),
+	.resource	= mx25_fec_resources,
+};
diff --git a/arch/arm/mach-mx25/devices.h b/arch/arm/mach-mx25/devices.h
index fe6bf88..fe5420f 100644
--- a/arch/arm/mach-mx25/devices.h
+++ b/arch/arm/mach-mx25/devices.h
@@ -17,3 +17,4 @@ extern struct platform_device mxc_keypad_device;
 extern struct platform_device mxc_i2c_device0;
 extern struct platform_device mxc_i2c_device1;
 extern struct platform_device mxc_i2c_device2;
+extern struct platform_device mx25_fec_device;
diff --git a/arch/arm/plat-mxc/include/mach/mx25.h b/arch/arm/plat-mxc/include/mach/mx25.h
index ec64bd9..106f651 100644
--- a/arch/arm/plat-mxc/include/mach/mx25.h
+++ b/arch/arm/plat-mxc/include/mach/mx25.h
@@ -41,4 +41,8 @@
 #define UART1_BASE_ADDR			0x43f90000
 #define UART2_BASE_ADDR			0x43f94000
 
+#define MX25_FEC_BASE_ADDR		0x50038000
+
+#define MX25_INT_FEC	57
+
 #endif /* __MACH_MX25_H__ */
-- 
1.6.5

[PATCH 1/2] mx25: add support for FEC on i.MX25

[Baruch Siach]

---
 arch/arm/mach-mx25/clock.c            |    2 ++
 arch/arm/mach-mx25/devices.c          |   19 +++++++++++++++++++
 arch/arm/mach-mx25/devices.h          |    1 +
 arch/arm/plat-mxc/include/mach/mx25.h |    4 ++++
 4 files changed, 26 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-mx25/clock.c b/arch/arm/mach-mx25/clock.c
index dbbbcc6..ea8c3da 100644
--- a/arch/arm/mach-mx25/clock.c
+++ b/arch/arm/mach-mx25/clock.c
@@ -173,6 +173,7 @@ DEFINE_CLOCK(pwm4_clk,	 0, CCM_CGCR2,  2, get_rate_ipg, NULL);
 DEFINE_CLOCK(kpp_clk,	 0, CCM_CGCR1, 28, get_rate_ipg, NULL);
 DEFINE_CLOCK(tsc_clk,	 0, CCM_CGCR2, 13, get_rate_ipg, NULL);
 DEFINE_CLOCK(i2c_clk,	 0, CCM_CGCR0,  6, get_rate_i2c, NULL);
+DEFINE_CLOCK(fec_clk,	 0, CCM_CGCR0, 23, get_rate_ipg, NULL);
 
 #define _REGISTER_CLOCK(d, n, c)	\
 	{				\
@@ -204,6 +205,7 @@ static struct clk_lookup lookups[] = {
 	_REGISTER_CLOCK("imx-i2c.0", NULL, i2c_clk)
 	_REGISTER_CLOCK("imx-i2c.1", NULL, i2c_clk)
 	_REGISTER_CLOCK("imx-i2c.2", NULL, i2c_clk)
+	_REGISTER_CLOCK("fec.0", NULL, fec_clk)
 };
 
 int __init mx25_clocks_init(unsigned long fref)
diff --git a/arch/arm/mach-mx25/devices.c b/arch/arm/mach-mx25/devices.c
index 63511de..9fdeea1 100644
--- a/arch/arm/mach-mx25/devices.c
+++ b/arch/arm/mach-mx25/devices.c
@@ -419,3 +419,22 @@ int __init mxc_register_gpios(void)
 	return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports));
 }
 
+static struct resource mx25_fec_resources[] = {
+	{
+		.start	= MX25_FEC_BASE_ADDR,
+		.end	= MX25_FEC_BASE_ADDR + 0xfff,
+		.flags	= IORESOURCE_MEM,
+	},
+	{
+		.start	= MX25_INT_FEC,
+		.end	= MX25_INT_FEC,
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+struct platform_device mx25_fec_device = {
+	.name	= "fec",
+	.id	= 0,
+	.num_resources	= ARRAY_SIZE(mx25_fec_resources),
+	.resource	= mx25_fec_resources,
+};
diff --git a/arch/arm/mach-mx25/devices.h b/arch/arm/mach-mx25/devices.h
index fe6bf88..fe5420f 100644
--- a/arch/arm/mach-mx25/devices.h
+++ b/arch/arm/mach-mx25/devices.h
@@ -17,3 +17,4 @@ extern struct platform_device mxc_keypad_device;
 extern struct platform_device mxc_i2c_device0;
 extern struct platform_device mxc_i2c_device1;
 extern struct platform_device mxc_i2c_device2;
+extern struct platform_device mx25_fec_device;
diff --git a/arch/arm/plat-mxc/include/mach/mx25.h b/arch/arm/plat-mxc/include/mach/mx25.h
index ec64bd9..106f651 100644
--- a/arch/arm/plat-mxc/include/mach/mx25.h
+++ b/arch/arm/plat-mxc/include/mach/mx25.h
@@ -41,4 +41,8 @@
 #define UART1_BASE_ADDR			0x43f90000
 #define UART2_BASE_ADDR			0x43f94000
 
+#define MX25_FEC_BASE_ADDR		0x50038000
+
+#define MX25_INT_FEC	57
+
 #endif /* __MACH_MX25_H__ */
-- 
1.6.5

[PATCH 2/2] mx25: pdk: add platform code for FEC support

[Baruch Siach]

---
 arch/arm/mach-mx25/mx25pdk.c |   46 ++++++++++++++++++++++++++++++++++++++++-
 1 files changed, 44 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-mx25/mx25pdk.c b/arch/arm/mach-mx25/mx25pdk.c
index d23ae57..921bc99 100644
--- a/arch/arm/mach-mx25/mx25pdk.c
+++ b/arch/arm/mach-mx25/mx25pdk.c
@@ -18,10 +18,11 @@
 
 #include <linux/types.h>
 #include <linux/init.h>
+#include <linux/delay.h>
 #include <linux/clk.h>
 #include <linux/irq.h>
 #include <linux/gpio.h>
-#include <linux/smsc911x.h>
+#include <linux/fec.h>
 #include <linux/platform_device.h>
 
 #include <mach/hardware.h>
@@ -35,16 +36,57 @@
 #include <mach/mx25.h>
 #include <mach/mxc_nand.h>
 #include "devices.h"
-#include <mach/iomux-v3.h>
+#include <mach/iomux.h>
 
 static struct imxuart_platform_data uart_pdata = {
 	.flags = IMXUART_HAVE_RTSCTS,
 };
 
+static struct pad_desc mx25pdk_pads[] = {
+	MX25_PAD_FEC_MDC__FEC_MDC,
+	MX25_PAD_FEC_MDIO__FEC_MDIO,
+	MX25_PAD_FEC_TDATA0__FEC_TDATA0,
+	MX25_PAD_FEC_TDATA1__FEC_TDATA1,
+	MX25_PAD_FEC_TX_EN__FEC_TX_EN,
+	MX25_PAD_FEC_RDATA0__FEC_RDATA0,
+	MX25_PAD_FEC_RDATA1__FEC_RDATA1,
+	MX25_PAD_FEC_RX_DV__FEC_RX_DV,
+	MX25_PAD_FEC_TX_CLK__FEC_TX_CLK,
+	MX25_PAD_A17__GPIO_2_3, /* FEC_EN, GPIO 35 */
+	MX25_PAD_D12__GPIO_4_8, /* FEC_RESET_B, GPIO 104 */
+};
+
+static struct fec_platform_data mx25_fec_pdata = {
+        .phy    = PHY_INTERFACE_MODE_RMII,
+};
+
+#define FEC_ENABLE_GPIO		35
+#define FEC_RESET_B_GPIO	104
+
+static void __init mx25pdk_fec_reset(void)
+{
+	gpio_request(FEC_ENABLE_GPIO, "FEC PHY enable");
+	gpio_request(FEC_RESET_B_GPIO, "FEC PHY reset");
+
+	gpio_direction_output(FEC_ENABLE_GPIO, 0);  /* drop PHY power */
+	gpio_direction_output(FEC_RESET_B_GPIO, 0); /* assert reset */
+	udelay(2);
+
+	/* turn on PHY power and lift reset */
+	gpio_set_value(FEC_ENABLE_GPIO, 1);
+	gpio_set_value(FEC_RESET_B_GPIO, 1);
+}
+
 static void __init mx25pdk_init(void)
 {
+	mxc_iomux_v3_setup_multiple_pads(mx25pdk_pads,
+			ARRAY_SIZE(mx25pdk_pads));
+
 	mxc_register_device(&mxc_uart_device0, &uart_pdata);
 	mxc_register_device(&mxc_usbh2, NULL);
+
+	mx25pdk_fec_reset();
+	mxc_register_device(&mx25_fec_device, &mx25_fec_pdata);
 }
 
 static void __init mx25pdk_timer_init(void)
-- 
1.6.5

[PATCH 2/2] mx25: pdk: add platform code for FEC support

[Baruch Siach]

---
 arch/arm/mach-mx25/mx25pdk.c |   46 ++++++++++++++++++++++++++++++++++++++++-
 1 files changed, 44 insertions(+), 2 deletions(-)

diff --git a/arch/arm/mach-mx25/mx25pdk.c b/arch/arm/mach-mx25/mx25pdk.c
index d23ae57..921bc99 100644
--- a/arch/arm/mach-mx25/mx25pdk.c
+++ b/arch/arm/mach-mx25/mx25pdk.c
@@ -18,10 +18,11 @@
 
 #include <linux/types.h>
 #include <linux/init.h>
+#include <linux/delay.h>
 #include <linux/clk.h>
 #include <linux/irq.h>
 #include <linux/gpio.h>
-#include <linux/smsc911x.h>
+#include <linux/fec.h>
 #include <linux/platform_device.h>
 
 #include <mach/hardware.h>
@@ -35,16 +36,57 @@
 #include <mach/mx25.h>
 #include <mach/mxc_nand.h>
 #include "devices.h"
-#include <mach/iomux-v3.h>
+#include <mach/iomux.h>
 
 static struct imxuart_platform_data uart_pdata = {
 	.flags = IMXUART_HAVE_RTSCTS,
 };
 
+static struct pad_desc mx25pdk_pads[] = {
+	MX25_PAD_FEC_MDC__FEC_MDC,
+	MX25_PAD_FEC_MDIO__FEC_MDIO,
+	MX25_PAD_FEC_TDATA0__FEC_TDATA0,
+	MX25_PAD_FEC_TDATA1__FEC_TDATA1,
+	MX25_PAD_FEC_TX_EN__FEC_TX_EN,
+	MX25_PAD_FEC_RDATA0__FEC_RDATA0,
+	MX25_PAD_FEC_RDATA1__FEC_RDATA1,
+	MX25_PAD_FEC_RX_DV__FEC_RX_DV,
+	MX25_PAD_FEC_TX_CLK__FEC_TX_CLK,
+	MX25_PAD_A17__GPIO_2_3, /* FEC_EN, GPIO 35 */
+	MX25_PAD_D12__GPIO_4_8, /* FEC_RESET_B, GPIO 104 */
+};
+
+static struct fec_platform_data mx25_fec_pdata = {
+        .phy    = PHY_INTERFACE_MODE_RMII,
+};
+
+#define FEC_ENABLE_GPIO		35
+#define FEC_RESET_B_GPIO	104
+
+static void __init mx25pdk_fec_reset(void)
+{
+	gpio_request(FEC_ENABLE_GPIO, "FEC PHY enable");
+	gpio_request(FEC_RESET_B_GPIO, "FEC PHY reset");
+
+	gpio_direction_output(FEC_ENABLE_GPIO, 0);  /* drop PHY power */
+	gpio_direction_output(FEC_RESET_B_GPIO, 0); /* assert reset */
+	udelay(2);
+
+	/* turn on PHY power and lift reset */
+	gpio_set_value(FEC_ENABLE_GPIO, 1);
+	gpio_set_value(FEC_RESET_B_GPIO, 1);
+}
+
 static void __init mx25pdk_init(void)
 {
+	mxc_iomux_v3_setup_multiple_pads(mx25pdk_pads,
+			ARRAY_SIZE(mx25pdk_pads));
+
 	mxc_register_device(&mxc_uart_device0, &uart_pdata);
 	mxc_register_device(&mxc_usbh2, NULL);
+
+	mx25pdk_fec_reset();
+	mxc_register_device(&mx25_fec_device, &mx25_fec_pdata);
 }
 
 static void __init mx25pdk_timer_init(void)
-- 
1.6.5

Re: [PATCH 2/4] mx25: don't force input on FEC pins

[Baruch Siach]

Hi Sascha,

On Mon, Dec 21, 2009 at 12:04:09PM +0100, Sascha Hauer wrote:
> On Mon, Dec 14, 2009 at 12:19:40PM +0200, Baruch Siach wrote:
> > Signed-off-by: Baruch Siach <baruch@tkos.co.il>
> > ---
> >  arch/arm/plat-mxc/include/mach/iomux-mx25.h |   20 ++++++++++----------
> >  1 files changed, 10 insertions(+), 10 deletions(-)
> 
> Can you explain why this is needed in the commit message please?

I tested FEC support without this patch and indeed this patch is not 
necessary.

I just whether there is any benefit in setting the SION bit to a non default 
mode.

Anyway, you can just discard this patch.

baruch

-- 
                                                     ~. .~   Tk Open Systems
=}------------------------------------------------ooO--U--Ooo------------{=
   - baruch@tkos.co.il - tel: +972.2.679.5364, http://www.tkos.co.il -

[PATCH 2/4] mx25: don't force input on FEC pins

[Baruch Siach]

Hi Sascha,

On Mon, Dec 21, 2009 at 12:04:09PM +0100, Sascha Hauer wrote:
> On Mon, Dec 14, 2009 at 12:19:40PM +0200, Baruch Siach wrote:
> > Signed-off-by: Baruch Siach <baruch@tkos.co.il>
> > ---
> >  arch/arm/plat-mxc/include/mach/iomux-mx25.h |   20 ++++++++++----------
> >  1 files changed, 10 insertions(+), 10 deletions(-)
> 
> Can you explain why this is needed in the commit message please?

I tested FEC support without this patch and indeed this patch is not 
necessary.

I just whether there is any benefit in setting the SION bit to a non default 
mode.

Anyway, you can just discard this patch.

baruch

-- 
                                                     ~. .~   Tk Open Systems
=}------------------------------------------------ooO--U--Ooo------------{=
   - baruch at tkos.co.il - tel: +972.2.679.5364, http://www.tkos.co.il -

Re: [PATCH 3/4] fec: add support for Freescale i.MX25 PDK (3DS)

[Baruch Siach]

On Wed, Dec 16, 2009 at 08:34:06AM +0200, Baruch Siach wrote:
> Hi Greg,

[snip]

> Thanks. The updated patch below.

Ping?

How should take care of this?

The platform code for i.MX25 PDK is going via Sascha's tree, and it depends on 
this patch to compile.

baruch

> From 2d0751f868519978603b16baa197bfb9f9ec9e2e Mon Sep 17 00:00:00 2001
> Message-Id: <2d0751f868519978603b16baa197bfb9f9ec9e2e.1260945080.git.baruch@tkos.co.il>
> From: Baruch Siach <baruch@tkos.co.il>
> Date: Mon, 14 Dec 2009 10:36:50 +0200
> Subject: [PATCH] fec: add support for PHY interface platform data
> 
> The i.MX25 PDK uses RMII to communicate with its PHY. This patch adds the
> ability to configure RMII, based on platform data.
> 
> Signed-off-by: Baruch Siach <baruch@tkos.co.il>
> Acked-by:  Greg Ungerer <gerg@uclinux.org>
> ---
>  drivers/net/fec.c   |   22 ++++++++++++++++++++++
>  drivers/net/fec.h   |    2 ++
>  include/linux/fec.h |   21 +++++++++++++++++++++
>  3 files changed, 45 insertions(+), 0 deletions(-)
>  create mode 100644 include/linux/fec.h
> 
> diff --git a/drivers/net/fec.c b/drivers/net/fec.c
> index 16a1d58..a7cfe0d 100644
> --- a/drivers/net/fec.c
> +++ b/drivers/net/fec.c
> @@ -40,6 +40,7 @@
>  #include <linux/irq.h>
>  #include <linux/clk.h>
>  #include <linux/platform_device.h>
> +#include <linux/fec.h>
>  
>  #include <asm/cacheflush.h>
>  
> @@ -198,6 +199,7 @@ struct fec_enet_private {
>  	uint	phy_speed;
>  	phy_info_t const	*phy;
>  	struct work_struct phy_task;
> +	phy_interface_t	phy_interface;
>  
>  	uint	sequence_done;
>  	uint	mii_phy_task_queued;
> @@ -1810,6 +1812,21 @@ fec_restart(struct net_device *dev, int duplex)
>  	/* Set MII speed */
>  	writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
>  
> +#ifdef FEC_MIIGSK_ENR
> +	if (fep->phy_interface == PHY_INTERFACE_MODE_RMII) {
> +		/* disable the gasket and wait */
> +		writel(0, fep->hwp + FEC_MIIGSK_ENR);
> +		while (readl(fep->hwp + FEC_MIIGSK_ENR) & 4)
> +			udelay(1);
> +
> +		/* configure the gasket: RMII, 50 MHz, no loopback, no echo */
> +		writel(1, fep->hwp + FEC_MIIGSK_CFGR);
> +
> +		/* re-enable the gasket */
> +		writel(2, fep->hwp + FEC_MIIGSK_ENR);
> +	}
> +#endif
> +
>  	/* And last, enable the transmit and receive processing */
>  	writel(2, fep->hwp + FEC_ECNTRL);
>  	writel(0, fep->hwp + FEC_R_DES_ACTIVE);
> @@ -1847,6 +1864,7 @@ static int __devinit
>  fec_probe(struct platform_device *pdev)
>  {
>  	struct fec_enet_private *fep;
> +	struct fec_platform_data *pdata;
>  	struct net_device *ndev;
>  	int i, irq, ret = 0;
>  	struct resource *r;
> @@ -1879,6 +1897,10 @@ fec_probe(struct platform_device *pdev)
>  
>  	platform_set_drvdata(pdev, ndev);
>  
> +	pdata = pdev->dev.platform_data;
> +	if (pdata)
> +		fep->phy_interface = pdata->phy;
> +
>  	/* This device has up to three irqs on some platforms */
>  	for (i = 0; i < 3; i++) {
>  		irq = platform_get_irq(pdev, i);
> diff --git a/drivers/net/fec.h b/drivers/net/fec.h
> index cc47f3f..2c48b25 100644
> --- a/drivers/net/fec.h
> +++ b/drivers/net/fec.h
> @@ -43,6 +43,8 @@
>  #define FEC_R_DES_START		0x180 /* Receive descriptor ring */
>  #define FEC_X_DES_START		0x184 /* Transmit descriptor ring */
>  #define FEC_R_BUFF_SIZE		0x188 /* Maximum receive buff size */
> +#define FEC_MIIGSK_CFGR		0x300 /* MIIGSK Configuration reg */
> +#define FEC_MIIGSK_ENR		0x308 /* MIIGSK Enable reg */
>  
>  #else
>  
> diff --git a/include/linux/fec.h b/include/linux/fec.h
> new file mode 100644
> index 0000000..5d3523d
> --- /dev/null
> +++ b/include/linux/fec.h
> @@ -0,0 +1,21 @@
> +/* include/linux/fec.h
> + *
> + * Copyright (c) 2009 Orex Computed Radiography
> + *   Baruch Siach <baruch@tkos.co.il>
> + *
> + * Header file for the FEC platform data
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +#ifndef __LINUX_FEC_H__
> +#define __LINUX_FEC_H__
> +
> +#include <linux/phy.h>
> +
> +struct fec_platform_data {
> +	phy_interface_t phy;
> +};
> +
> +#endif
> -- 
> 1.6.5
> 
> 
> -- 
>                                                      ~. .~   Tk Open Systems
> =}------------------------------------------------ooO--U--Ooo------------{=
>    - baruch@tkos.co.il - tel: +972.2.679.5364, http://www.tkos.co.il -
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

-- 
                                                     ~. .~   Tk Open Systems
=}------------------------------------------------ooO--U--Ooo------------{=
   - baruch@tkos.co.il - tel: +972.2.679.5364, http://www.tkos.co.il -

[PATCH 3/4] fec: add support for Freescale i.MX25 PDK (3DS)

[Baruch Siach]

On Wed, Dec 16, 2009 at 08:34:06AM +0200, Baruch Siach wrote:
> Hi Greg,

[snip]

> Thanks. The updated patch below.

Ping?

How should take care of this?

The platform code for i.MX25 PDK is going via Sascha's tree, and it depends on 
this patch to compile.

baruch

> From 2d0751f868519978603b16baa197bfb9f9ec9e2e Mon Sep 17 00:00:00 2001
> Message-Id: <2d0751f868519978603b16baa197bfb9f9ec9e2e.1260945080.git.baruch@tkos.co.il>
> From: Baruch Siach <baruch@tkos.co.il>
> Date: Mon, 14 Dec 2009 10:36:50 +0200
> Subject: [PATCH] fec: add support for PHY interface platform data
> 
> The i.MX25 PDK uses RMII to communicate with its PHY. This patch adds the
> ability to configure RMII, based on platform data.
> 
> Signed-off-by: Baruch Siach <baruch@tkos.co.il>
> Acked-by:  Greg Ungerer <gerg@uclinux.org>
> ---
>  drivers/net/fec.c   |   22 ++++++++++++++++++++++
>  drivers/net/fec.h   |    2 ++
>  include/linux/fec.h |   21 +++++++++++++++++++++
>  3 files changed, 45 insertions(+), 0 deletions(-)
>  create mode 100644 include/linux/fec.h
> 
> diff --git a/drivers/net/fec.c b/drivers/net/fec.c
> index 16a1d58..a7cfe0d 100644
> --- a/drivers/net/fec.c
> +++ b/drivers/net/fec.c
> @@ -40,6 +40,7 @@
>  #include <linux/irq.h>
>  #include <linux/clk.h>
>  #include <linux/platform_device.h>
> +#include <linux/fec.h>
>  
>  #include <asm/cacheflush.h>
>  
> @@ -198,6 +199,7 @@ struct fec_enet_private {
>  	uint	phy_speed;
>  	phy_info_t const	*phy;
>  	struct work_struct phy_task;
> +	phy_interface_t	phy_interface;
>  
>  	uint	sequence_done;
>  	uint	mii_phy_task_queued;
> @@ -1810,6 +1812,21 @@ fec_restart(struct net_device *dev, int duplex)
>  	/* Set MII speed */
>  	writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
>  
> +#ifdef FEC_MIIGSK_ENR
> +	if (fep->phy_interface == PHY_INTERFACE_MODE_RMII) {
> +		/* disable the gasket and wait */
> +		writel(0, fep->hwp + FEC_MIIGSK_ENR);
> +		while (readl(fep->hwp + FEC_MIIGSK_ENR) & 4)
> +			udelay(1);
> +
> +		/* configure the gasket: RMII, 50 MHz, no loopback, no echo */
> +		writel(1, fep->hwp + FEC_MIIGSK_CFGR);
> +
> +		/* re-enable the gasket */
> +		writel(2, fep->hwp + FEC_MIIGSK_ENR);
> +	}
> +#endif
> +
>  	/* And last, enable the transmit and receive processing */
>  	writel(2, fep->hwp + FEC_ECNTRL);
>  	writel(0, fep->hwp + FEC_R_DES_ACTIVE);
> @@ -1847,6 +1864,7 @@ static int __devinit
>  fec_probe(struct platform_device *pdev)
>  {
>  	struct fec_enet_private *fep;
> +	struct fec_platform_data *pdata;
>  	struct net_device *ndev;
>  	int i, irq, ret = 0;
>  	struct resource *r;
> @@ -1879,6 +1897,10 @@ fec_probe(struct platform_device *pdev)
>  
>  	platform_set_drvdata(pdev, ndev);
>  
> +	pdata = pdev->dev.platform_data;
> +	if (pdata)
> +		fep->phy_interface = pdata->phy;
> +
>  	/* This device has up to three irqs on some platforms */
>  	for (i = 0; i < 3; i++) {
>  		irq = platform_get_irq(pdev, i);
> diff --git a/drivers/net/fec.h b/drivers/net/fec.h
> index cc47f3f..2c48b25 100644
> --- a/drivers/net/fec.h
> +++ b/drivers/net/fec.h
> @@ -43,6 +43,8 @@
>  #define FEC_R_DES_START		0x180 /* Receive descriptor ring */
>  #define FEC_X_DES_START		0x184 /* Transmit descriptor ring */
>  #define FEC_R_BUFF_SIZE		0x188 /* Maximum receive buff size */
> +#define FEC_MIIGSK_CFGR		0x300 /* MIIGSK Configuration reg */
> +#define FEC_MIIGSK_ENR		0x308 /* MIIGSK Enable reg */
>  
>  #else
>  
> diff --git a/include/linux/fec.h b/include/linux/fec.h
> new file mode 100644
> index 0000000..5d3523d
> --- /dev/null
> +++ b/include/linux/fec.h
> @@ -0,0 +1,21 @@
> +/* include/linux/fec.h
> + *
> + * Copyright (c) 2009 Orex Computed Radiography
> + *   Baruch Siach <baruch@tkos.co.il>
> + *
> + * Header file for the FEC platform data
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +#ifndef __LINUX_FEC_H__
> +#define __LINUX_FEC_H__
> +
> +#include <linux/phy.h>
> +
> +struct fec_platform_data {
> +	phy_interface_t phy;
> +};
> +
> +#endif
> -- 
> 1.6.5
> 
> 
> -- 
>                                                      ~. .~   Tk Open Systems
> =}------------------------------------------------ooO--U--Ooo------------{=
>    - baruch at tkos.co.il - tel: +972.2.679.5364, http://www.tkos.co.il -
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

-- 
                                                     ~. .~   Tk Open Systems
=}------------------------------------------------ooO--U--Ooo------------{=
   - baruch at tkos.co.il - tel: +972.2.679.5364, http://www.tkos.co.il -

Re: [PATCH 3/4] fec: add support for Freescale i.MX25 PDK (3DS)

[Greg Ungerer]

Hi Baruch,

Baruch Siach wrote:
> On Wed, Dec 16, 2009 at 08:34:06AM +0200, Baruch Siach wrote:
>> Hi Greg,
> 
> [snip]
> 
>> Thanks. The updated patch below.
> 
> Ping?
> 
> How should take care of this?
> 
> The platform code for i.MX25 PDK is going via Sascha's tree, and it depends on 
> this patch to compile.

I assumed it would go via the net git tree?

Regards
Greg



>> From 2d0751f868519978603b16baa197bfb9f9ec9e2e Mon Sep 17 00:00:00 2001
>> Message-Id: <2d0751f868519978603b16baa197bfb9f9ec9e2e.1260945080.git.baruch@tkos.co.il>
>> From: Baruch Siach <baruch@tkos.co.il>
>> Date: Mon, 14 Dec 2009 10:36:50 +0200
>> Subject: [PATCH] fec: add support for PHY interface platform data
>>
>> The i.MX25 PDK uses RMII to communicate with its PHY. This patch adds the
>> ability to configure RMII, based on platform data.
>>
>> Signed-off-by: Baruch Siach <baruch@tkos.co.il>
>> Acked-by:  Greg Ungerer <gerg@uclinux.org>
>> ---
>>  drivers/net/fec.c   |   22 ++++++++++++++++++++++
>>  drivers/net/fec.h   |    2 ++
>>  include/linux/fec.h |   21 +++++++++++++++++++++
>>  3 files changed, 45 insertions(+), 0 deletions(-)
>>  create mode 100644 include/linux/fec.h
>>
>> diff --git a/drivers/net/fec.c b/drivers/net/fec.c
>> index 16a1d58..a7cfe0d 100644
>> --- a/drivers/net/fec.c
>> +++ b/drivers/net/fec.c
>> @@ -40,6 +40,7 @@
>>  #include <linux/irq.h>
>>  #include <linux/clk.h>
>>  #include <linux/platform_device.h>
>> +#include <linux/fec.h>
>>  
>>  #include <asm/cacheflush.h>
>>  
>> @@ -198,6 +199,7 @@ struct fec_enet_private {
>>  	uint	phy_speed;
>>  	phy_info_t const	*phy;
>>  	struct work_struct phy_task;
>> +	phy_interface_t	phy_interface;
>>  
>>  	uint	sequence_done;
>>  	uint	mii_phy_task_queued;
>> @@ -1810,6 +1812,21 @@ fec_restart(struct net_device *dev, int duplex)
>>  	/* Set MII speed */
>>  	writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
>>  
>> +#ifdef FEC_MIIGSK_ENR
>> +	if (fep->phy_interface == PHY_INTERFACE_MODE_RMII) {
>> +		/* disable the gasket and wait */
>> +		writel(0, fep->hwp + FEC_MIIGSK_ENR);
>> +		while (readl(fep->hwp + FEC_MIIGSK_ENR) & 4)
>> +			udelay(1);
>> +
>> +		/* configure the gasket: RMII, 50 MHz, no loopback, no echo */
>> +		writel(1, fep->hwp + FEC_MIIGSK_CFGR);
>> +
>> +		/* re-enable the gasket */
>> +		writel(2, fep->hwp + FEC_MIIGSK_ENR);
>> +	}
>> +#endif
>> +
>>  	/* And last, enable the transmit and receive processing */
>>  	writel(2, fep->hwp + FEC_ECNTRL);
>>  	writel(0, fep->hwp + FEC_R_DES_ACTIVE);
>> @@ -1847,6 +1864,7 @@ static int __devinit
>>  fec_probe(struct platform_device *pdev)
>>  {
>>  	struct fec_enet_private *fep;
>> +	struct fec_platform_data *pdata;
>>  	struct net_device *ndev;
>>  	int i, irq, ret = 0;
>>  	struct resource *r;
>> @@ -1879,6 +1897,10 @@ fec_probe(struct platform_device *pdev)
>>  
>>  	platform_set_drvdata(pdev, ndev);
>>  
>> +	pdata = pdev->dev.platform_data;
>> +	if (pdata)
>> +		fep->phy_interface = pdata->phy;
>> +
>>  	/* This device has up to three irqs on some platforms */
>>  	for (i = 0; i < 3; i++) {
>>  		irq = platform_get_irq(pdev, i);
>> diff --git a/drivers/net/fec.h b/drivers/net/fec.h
>> index cc47f3f..2c48b25 100644
>> --- a/drivers/net/fec.h
>> +++ b/drivers/net/fec.h
>> @@ -43,6 +43,8 @@
>>  #define FEC_R_DES_START		0x180 /* Receive descriptor ring */
>>  #define FEC_X_DES_START		0x184 /* Transmit descriptor ring */
>>  #define FEC_R_BUFF_SIZE		0x188 /* Maximum receive buff size */
>> +#define FEC_MIIGSK_CFGR		0x300 /* MIIGSK Configuration reg */
>> +#define FEC_MIIGSK_ENR		0x308 /* MIIGSK Enable reg */
>>  
>>  #else
>>  
>> diff --git a/include/linux/fec.h b/include/linux/fec.h
>> new file mode 100644
>> index 0000000..5d3523d
>> --- /dev/null
>> +++ b/include/linux/fec.h
>> @@ -0,0 +1,21 @@
>> +/* include/linux/fec.h
>> + *
>> + * Copyright (c) 2009 Orex Computed Radiography
>> + *   Baruch Siach <baruch@tkos.co.il>
>> + *
>> + * Header file for the FEC platform data
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + */
>> +#ifndef __LINUX_FEC_H__
>> +#define __LINUX_FEC_H__
>> +
>> +#include <linux/phy.h>
>> +
>> +struct fec_platform_data {
>> +	phy_interface_t phy;
>> +};
>> +
>> +#endif
>> -- 
>> 1.6.5
>>
>>
>> -- 
>>                                                      ~. .~   Tk Open Systems
>> =}------------------------------------------------ooO--U--Ooo------------{=
>>    - baruch@tkos.co.il - tel: +972.2.679.5364, http://www.tkos.co.il -
>>
>> _______________________________________________
>> linux-arm-kernel mailing list
>> linux-arm-kernel@lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
> 


-- 
------------------------------------------------------------------------
Greg Ungerer  --  Principal Engineer        EMAIL:     gerg@snapgear.com
SnapGear Group, McAfee                      PHONE:       +61 7 3435 2888
8 Gardner Close                             FAX:         +61 7 3217 5323
Milton, QLD, 4064, Australia                WEB: http://www.SnapGear.com

[PATCH 3/4] fec: add support for Freescale i.MX25 PDK (3DS)

[Greg Ungerer]

Hi Baruch,

Baruch Siach wrote:
> On Wed, Dec 16, 2009 at 08:34:06AM +0200, Baruch Siach wrote:
>> Hi Greg,
> 
> [snip]
> 
>> Thanks. The updated patch below.
> 
> Ping?
> 
> How should take care of this?
> 
> The platform code for i.MX25 PDK is going via Sascha's tree, and it depends on 
> this patch to compile.

I assumed it would go via the net git tree?

Regards
Greg



>> From 2d0751f868519978603b16baa197bfb9f9ec9e2e Mon Sep 17 00:00:00 2001
>> Message-Id: <2d0751f868519978603b16baa197bfb9f9ec9e2e.1260945080.git.baruch@tkos.co.il>
>> From: Baruch Siach <baruch@tkos.co.il>
>> Date: Mon, 14 Dec 2009 10:36:50 +0200
>> Subject: [PATCH] fec: add support for PHY interface platform data
>>
>> The i.MX25 PDK uses RMII to communicate with its PHY. This patch adds the
>> ability to configure RMII, based on platform data.
>>
>> Signed-off-by: Baruch Siach <baruch@tkos.co.il>
>> Acked-by:  Greg Ungerer <gerg@uclinux.org>
>> ---
>>  drivers/net/fec.c   |   22 ++++++++++++++++++++++
>>  drivers/net/fec.h   |    2 ++
>>  include/linux/fec.h |   21 +++++++++++++++++++++
>>  3 files changed, 45 insertions(+), 0 deletions(-)
>>  create mode 100644 include/linux/fec.h
>>
>> diff --git a/drivers/net/fec.c b/drivers/net/fec.c
>> index 16a1d58..a7cfe0d 100644
>> --- a/drivers/net/fec.c
>> +++ b/drivers/net/fec.c
>> @@ -40,6 +40,7 @@
>>  #include <linux/irq.h>
>>  #include <linux/clk.h>
>>  #include <linux/platform_device.h>
>> +#include <linux/fec.h>
>>  
>>  #include <asm/cacheflush.h>
>>  
>> @@ -198,6 +199,7 @@ struct fec_enet_private {
>>  	uint	phy_speed;
>>  	phy_info_t const	*phy;
>>  	struct work_struct phy_task;
>> +	phy_interface_t	phy_interface;
>>  
>>  	uint	sequence_done;
>>  	uint	mii_phy_task_queued;
>> @@ -1810,6 +1812,21 @@ fec_restart(struct net_device *dev, int duplex)
>>  	/* Set MII speed */
>>  	writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
>>  
>> +#ifdef FEC_MIIGSK_ENR
>> +	if (fep->phy_interface == PHY_INTERFACE_MODE_RMII) {
>> +		/* disable the gasket and wait */
>> +		writel(0, fep->hwp + FEC_MIIGSK_ENR);
>> +		while (readl(fep->hwp + FEC_MIIGSK_ENR) & 4)
>> +			udelay(1);
>> +
>> +		/* configure the gasket: RMII, 50 MHz, no loopback, no echo */
>> +		writel(1, fep->hwp + FEC_MIIGSK_CFGR);
>> +
>> +		/* re-enable the gasket */
>> +		writel(2, fep->hwp + FEC_MIIGSK_ENR);
>> +	}
>> +#endif
>> +
>>  	/* And last, enable the transmit and receive processing */
>>  	writel(2, fep->hwp + FEC_ECNTRL);
>>  	writel(0, fep->hwp + FEC_R_DES_ACTIVE);
>> @@ -1847,6 +1864,7 @@ static int __devinit
>>  fec_probe(struct platform_device *pdev)
>>  {
>>  	struct fec_enet_private *fep;
>> +	struct fec_platform_data *pdata;
>>  	struct net_device *ndev;
>>  	int i, irq, ret = 0;
>>  	struct resource *r;
>> @@ -1879,6 +1897,10 @@ fec_probe(struct platform_device *pdev)
>>  
>>  	platform_set_drvdata(pdev, ndev);
>>  
>> +	pdata = pdev->dev.platform_data;
>> +	if (pdata)
>> +		fep->phy_interface = pdata->phy;
>> +
>>  	/* This device has up to three irqs on some platforms */
>>  	for (i = 0; i < 3; i++) {
>>  		irq = platform_get_irq(pdev, i);
>> diff --git a/drivers/net/fec.h b/drivers/net/fec.h
>> index cc47f3f..2c48b25 100644
>> --- a/drivers/net/fec.h
>> +++ b/drivers/net/fec.h
>> @@ -43,6 +43,8 @@
>>  #define FEC_R_DES_START		0x180 /* Receive descriptor ring */
>>  #define FEC_X_DES_START		0x184 /* Transmit descriptor ring */
>>  #define FEC_R_BUFF_SIZE		0x188 /* Maximum receive buff size */
>> +#define FEC_MIIGSK_CFGR		0x300 /* MIIGSK Configuration reg */
>> +#define FEC_MIIGSK_ENR		0x308 /* MIIGSK Enable reg */
>>  
>>  #else
>>  
>> diff --git a/include/linux/fec.h b/include/linux/fec.h
>> new file mode 100644
>> index 0000000..5d3523d
>> --- /dev/null
>> +++ b/include/linux/fec.h
>> @@ -0,0 +1,21 @@
>> +/* include/linux/fec.h
>> + *
>> + * Copyright (c) 2009 Orex Computed Radiography
>> + *   Baruch Siach <baruch@tkos.co.il>
>> + *
>> + * Header file for the FEC platform data
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License version 2 as
>> + * published by the Free Software Foundation.
>> + */
>> +#ifndef __LINUX_FEC_H__
>> +#define __LINUX_FEC_H__
>> +
>> +#include <linux/phy.h>
>> +
>> +struct fec_platform_data {
>> +	phy_interface_t phy;
>> +};
>> +
>> +#endif
>> -- 
>> 1.6.5
>>
>>
>> -- 
>>                                                      ~. .~   Tk Open Systems
>> =}------------------------------------------------ooO--U--Ooo------------{=
>>    - baruch at tkos.co.il - tel: +972.2.679.5364, http://www.tkos.co.il -
>>
>> _______________________________________________
>> linux-arm-kernel mailing list
>> linux-arm-kernel at lists.infradead.org
>> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
> 


-- 
------------------------------------------------------------------------
Greg Ungerer  --  Principal Engineer        EMAIL:     gerg at snapgear.com
SnapGear Group, McAfee                      PHONE:       +61 7 3435 2888
8 Gardner Close                             FAX:         +61 7 3217 5323
Milton, QLD, 4064, Australia                WEB: http://www.SnapGear.com

Re: [PATCH 3/4] fec: add support for Freescale i.MX25 PDK (3DS)

[Baruch Siach]

Hi Greg, netdev,

On Wed, Dec 16, 2009 at 08:34:06AM +0200, Baruch Siach wrote:
> On Wed, Dec 16, 2009 at 10:13:56AM +1000, Greg Ungerer wrote:
> > Baruch Siach wrote:
> > >On Tue, Dec 15, 2009 at 09:52:24PM +1000, Greg Ungerer wrote:
> > >>On 12/15/2009 06:31 PM, Baruch Siach wrote:
> > >>>+#ifndef CONFIG_M5272
> > >>I would suggest making this conditional on FEC_MIIGSK_ENR.
> > >>Although the CONFIG_M5272 is the only case here currently,
> > >>that may change over the years. And using this here may not
> > >>be obvious to the causual code reader, since the register
> > >>offset definitions don't explicitly key on CONFIG_M5272.
> > >
> > >OK, I'll change this conditional.
> > >
> > >Can I take this as an Ack from you?
> > 
> > With that conditional check changed, sure:
> > 
> > Acked-by:  Greg Ungerer <gerg@uclinux.org>
> 
> Thanks. The updated patch below.

I'm really sorry to bug on this again, but since the platform code is already 
upstream the i.MX25 code doesn't build without this patch (include/linux/fec.h 
missing). So, someone please pick up this patch, preferably prior to .33.

baruch

> From 2d0751f868519978603b16baa197bfb9f9ec9e2e Mon Sep 17 00:00:00 2001
> Message-Id: <2d0751f868519978603b16baa197bfb9f9ec9e2e.1260945080.git.baruch@tkos.co.il>
> From: Baruch Siach <baruch@tkos.co.il>
> Date: Mon, 14 Dec 2009 10:36:50 +0200
> Subject: [PATCH] fec: add support for PHY interface platform data
> 
> The i.MX25 PDK uses RMII to communicate with its PHY. This patch adds the
> ability to configure RMII, based on platform data.
> 
> Signed-off-by: Baruch Siach <baruch@tkos.co.il>
> Acked-by:  Greg Ungerer <gerg@uclinux.org>
> ---
>  drivers/net/fec.c   |   22 ++++++++++++++++++++++
>  drivers/net/fec.h   |    2 ++
>  include/linux/fec.h |   21 +++++++++++++++++++++
>  3 files changed, 45 insertions(+), 0 deletions(-)
>  create mode 100644 include/linux/fec.h
> 
> diff --git a/drivers/net/fec.c b/drivers/net/fec.c
> index 16a1d58..a7cfe0d 100644
> --- a/drivers/net/fec.c
> +++ b/drivers/net/fec.c
> @@ -40,6 +40,7 @@
>  #include <linux/irq.h>
>  #include <linux/clk.h>
>  #include <linux/platform_device.h>
> +#include <linux/fec.h>
>  
>  #include <asm/cacheflush.h>
>  
> @@ -198,6 +199,7 @@ struct fec_enet_private {
>  	uint	phy_speed;
>  	phy_info_t const	*phy;
>  	struct work_struct phy_task;
> +	phy_interface_t	phy_interface;
>  
>  	uint	sequence_done;
>  	uint	mii_phy_task_queued;
> @@ -1810,6 +1812,21 @@ fec_restart(struct net_device *dev, int duplex)
>  	/* Set MII speed */
>  	writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
>  
> +#ifdef FEC_MIIGSK_ENR
> +	if (fep->phy_interface == PHY_INTERFACE_MODE_RMII) {
> +		/* disable the gasket and wait */
> +		writel(0, fep->hwp + FEC_MIIGSK_ENR);
> +		while (readl(fep->hwp + FEC_MIIGSK_ENR) & 4)
> +			udelay(1);
> +
> +		/* configure the gasket: RMII, 50 MHz, no loopback, no echo */
> +		writel(1, fep->hwp + FEC_MIIGSK_CFGR);
> +
> +		/* re-enable the gasket */
> +		writel(2, fep->hwp + FEC_MIIGSK_ENR);
> +	}
> +#endif
> +
>  	/* And last, enable the transmit and receive processing */
>  	writel(2, fep->hwp + FEC_ECNTRL);
>  	writel(0, fep->hwp + FEC_R_DES_ACTIVE);
> @@ -1847,6 +1864,7 @@ static int __devinit
>  fec_probe(struct platform_device *pdev)
>  {
>  	struct fec_enet_private *fep;
> +	struct fec_platform_data *pdata;
>  	struct net_device *ndev;
>  	int i, irq, ret = 0;
>  	struct resource *r;
> @@ -1879,6 +1897,10 @@ fec_probe(struct platform_device *pdev)
>  
>  	platform_set_drvdata(pdev, ndev);
>  
> +	pdata = pdev->dev.platform_data;
> +	if (pdata)
> +		fep->phy_interface = pdata->phy;
> +
>  	/* This device has up to three irqs on some platforms */
>  	for (i = 0; i < 3; i++) {
>  		irq = platform_get_irq(pdev, i);
> diff --git a/drivers/net/fec.h b/drivers/net/fec.h
> index cc47f3f..2c48b25 100644
> --- a/drivers/net/fec.h
> +++ b/drivers/net/fec.h
> @@ -43,6 +43,8 @@
>  #define FEC_R_DES_START		0x180 /* Receive descriptor ring */
>  #define FEC_X_DES_START		0x184 /* Transmit descriptor ring */
>  #define FEC_R_BUFF_SIZE		0x188 /* Maximum receive buff size */
> +#define FEC_MIIGSK_CFGR		0x300 /* MIIGSK Configuration reg */
> +#define FEC_MIIGSK_ENR		0x308 /* MIIGSK Enable reg */
>  
>  #else
>  
> diff --git a/include/linux/fec.h b/include/linux/fec.h
> new file mode 100644
> index 0000000..5d3523d
> --- /dev/null
> +++ b/include/linux/fec.h
> @@ -0,0 +1,21 @@
> +/* include/linux/fec.h
> + *
> + * Copyright (c) 2009 Orex Computed Radiography
> + *   Baruch Siach <baruch@tkos.co.il>
> + *
> + * Header file for the FEC platform data
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +#ifndef __LINUX_FEC_H__
> +#define __LINUX_FEC_H__
> +
> +#include <linux/phy.h>
> +
> +struct fec_platform_data {
> +	phy_interface_t phy;
> +};
> +
> +#endif
> -- 
> 1.6.5
> 
> 
> -- 
>                                                      ~. .~   Tk Open Systems
> =}------------------------------------------------ooO--U--Ooo------------{=
>    - baruch@tkos.co.il - tel: +972.2.679.5364, http://www.tkos.co.il -
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

-- 
                                                     ~. .~   Tk Open Systems
=}------------------------------------------------ooO--U--Ooo------------{=
   - baruch@tkos.co.il - tel: +972.2.679.5364, http://www.tkos.co.il -

[PATCH 3/4] fec: add support for Freescale i.MX25 PDK (3DS)

[Baruch Siach]

Hi Greg, netdev,

On Wed, Dec 16, 2009 at 08:34:06AM +0200, Baruch Siach wrote:
> On Wed, Dec 16, 2009 at 10:13:56AM +1000, Greg Ungerer wrote:
> > Baruch Siach wrote:
> > >On Tue, Dec 15, 2009 at 09:52:24PM +1000, Greg Ungerer wrote:
> > >>On 12/15/2009 06:31 PM, Baruch Siach wrote:
> > >>>+#ifndef CONFIG_M5272
> > >>I would suggest making this conditional on FEC_MIIGSK_ENR.
> > >>Although the CONFIG_M5272 is the only case here currently,
> > >>that may change over the years. And using this here may not
> > >>be obvious to the causual code reader, since the register
> > >>offset definitions don't explicitly key on CONFIG_M5272.
> > >
> > >OK, I'll change this conditional.
> > >
> > >Can I take this as an Ack from you?
> > 
> > With that conditional check changed, sure:
> > 
> > Acked-by:  Greg Ungerer <gerg@uclinux.org>
> 
> Thanks. The updated patch below.

I'm really sorry to bug on this again, but since the platform code is already 
upstream the i.MX25 code doesn't build without this patch (include/linux/fec.h 
missing). So, someone please pick up this patch, preferably prior to .33.

baruch

> From 2d0751f868519978603b16baa197bfb9f9ec9e2e Mon Sep 17 00:00:00 2001
> Message-Id: <2d0751f868519978603b16baa197bfb9f9ec9e2e.1260945080.git.baruch@tkos.co.il>
> From: Baruch Siach <baruch@tkos.co.il>
> Date: Mon, 14 Dec 2009 10:36:50 +0200
> Subject: [PATCH] fec: add support for PHY interface platform data
> 
> The i.MX25 PDK uses RMII to communicate with its PHY. This patch adds the
> ability to configure RMII, based on platform data.
> 
> Signed-off-by: Baruch Siach <baruch@tkos.co.il>
> Acked-by:  Greg Ungerer <gerg@uclinux.org>
> ---
>  drivers/net/fec.c   |   22 ++++++++++++++++++++++
>  drivers/net/fec.h   |    2 ++
>  include/linux/fec.h |   21 +++++++++++++++++++++
>  3 files changed, 45 insertions(+), 0 deletions(-)
>  create mode 100644 include/linux/fec.h
> 
> diff --git a/drivers/net/fec.c b/drivers/net/fec.c
> index 16a1d58..a7cfe0d 100644
> --- a/drivers/net/fec.c
> +++ b/drivers/net/fec.c
> @@ -40,6 +40,7 @@
>  #include <linux/irq.h>
>  #include <linux/clk.h>
>  #include <linux/platform_device.h>
> +#include <linux/fec.h>
>  
>  #include <asm/cacheflush.h>
>  
> @@ -198,6 +199,7 @@ struct fec_enet_private {
>  	uint	phy_speed;
>  	phy_info_t const	*phy;
>  	struct work_struct phy_task;
> +	phy_interface_t	phy_interface;
>  
>  	uint	sequence_done;
>  	uint	mii_phy_task_queued;
> @@ -1810,6 +1812,21 @@ fec_restart(struct net_device *dev, int duplex)
>  	/* Set MII speed */
>  	writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
>  
> +#ifdef FEC_MIIGSK_ENR
> +	if (fep->phy_interface == PHY_INTERFACE_MODE_RMII) {
> +		/* disable the gasket and wait */
> +		writel(0, fep->hwp + FEC_MIIGSK_ENR);
> +		while (readl(fep->hwp + FEC_MIIGSK_ENR) & 4)
> +			udelay(1);
> +
> +		/* configure the gasket: RMII, 50 MHz, no loopback, no echo */
> +		writel(1, fep->hwp + FEC_MIIGSK_CFGR);
> +
> +		/* re-enable the gasket */
> +		writel(2, fep->hwp + FEC_MIIGSK_ENR);
> +	}
> +#endif
> +
>  	/* And last, enable the transmit and receive processing */
>  	writel(2, fep->hwp + FEC_ECNTRL);
>  	writel(0, fep->hwp + FEC_R_DES_ACTIVE);
> @@ -1847,6 +1864,7 @@ static int __devinit
>  fec_probe(struct platform_device *pdev)
>  {
>  	struct fec_enet_private *fep;
> +	struct fec_platform_data *pdata;
>  	struct net_device *ndev;
>  	int i, irq, ret = 0;
>  	struct resource *r;
> @@ -1879,6 +1897,10 @@ fec_probe(struct platform_device *pdev)
>  
>  	platform_set_drvdata(pdev, ndev);
>  
> +	pdata = pdev->dev.platform_data;
> +	if (pdata)
> +		fep->phy_interface = pdata->phy;
> +
>  	/* This device has up to three irqs on some platforms */
>  	for (i = 0; i < 3; i++) {
>  		irq = platform_get_irq(pdev, i);
> diff --git a/drivers/net/fec.h b/drivers/net/fec.h
> index cc47f3f..2c48b25 100644
> --- a/drivers/net/fec.h
> +++ b/drivers/net/fec.h
> @@ -43,6 +43,8 @@
>  #define FEC_R_DES_START		0x180 /* Receive descriptor ring */
>  #define FEC_X_DES_START		0x184 /* Transmit descriptor ring */
>  #define FEC_R_BUFF_SIZE		0x188 /* Maximum receive buff size */
> +#define FEC_MIIGSK_CFGR		0x300 /* MIIGSK Configuration reg */
> +#define FEC_MIIGSK_ENR		0x308 /* MIIGSK Enable reg */
>  
>  #else
>  
> diff --git a/include/linux/fec.h b/include/linux/fec.h
> new file mode 100644
> index 0000000..5d3523d
> --- /dev/null
> +++ b/include/linux/fec.h
> @@ -0,0 +1,21 @@
> +/* include/linux/fec.h
> + *
> + * Copyright (c) 2009 Orex Computed Radiography
> + *   Baruch Siach <baruch@tkos.co.il>
> + *
> + * Header file for the FEC platform data
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +#ifndef __LINUX_FEC_H__
> +#define __LINUX_FEC_H__
> +
> +#include <linux/phy.h>
> +
> +struct fec_platform_data {
> +	phy_interface_t phy;
> +};
> +
> +#endif
> -- 
> 1.6.5
> 
> 
> -- 
>                                                      ~. .~   Tk Open Systems
> =}------------------------------------------------ooO--U--Ooo------------{=
>    - baruch at tkos.co.il - tel: +972.2.679.5364, http://www.tkos.co.il -
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel at lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

-- 
                                                     ~. .~   Tk Open Systems
=}------------------------------------------------ooO--U--Ooo------------{=
   - baruch at tkos.co.il - tel: +972.2.679.5364, http://www.tkos.co.il -

Re: [PATCH 3/4] fec: add support for Freescale i.MX25 PDK (3DS)

[Jean-Christophe Dubois]

le lundi 25 janvier 2010 Baruch Siach a écrit
> Hi Greg, netdev,
> 
> On Wed, Dec 16, 2009 at 08:34:06AM +0200, Baruch Siach wrote:
> > On Wed, Dec 16, 2009 at 10:13:56AM +1000, Greg Ungerer wrote:
> > > Baruch Siach wrote:
> > > >On Tue, Dec 15, 2009 at 09:52:24PM +1000, Greg Ungerer wrote:
> > > >>On 12/15/2009 06:31 PM, Baruch Siach wrote:
> > > >>>+#ifndef CONFIG_M5272
> > > >>
> > > >>I would suggest making this conditional on FEC_MIIGSK_ENR.
> > > >>Although the CONFIG_M5272 is the only case here currently,
> > > >>that may change over the years. And using this here may not
> > > >>be obvious to the causual code reader, since the register
> > > >>offset definitions don't explicitly key on CONFIG_M5272.
> > > >
> > > >OK, I'll change this conditional.
> > > >
> > > >Can I take this as an Ack from you?
> > > 
> > > With that conditional check changed, sure:
> > > 
> > > Acked-by:  Greg Ungerer <gerg@uclinux.org>
> > 
> > Thanks. The updated patch below.
> 
> I'm really sorry to bug on this again, but since the platform code is
> already upstream the i.MX25 code doesn't build without this patch
> (include/linux/fec.h missing). So, someone please pick up this patch,
> preferably prior to .33.
> 
> baruch

I am just wondering if somebody is going to pick up this patch 
(http://patchwork.ozlabs.org/patch/41235/) so that it finds its way on 
mainline.

The i.MX25 PDK platform (3DStack) has been broken for 2 kernel releases (as 
the actual code depend on this). Is there hope that this patch is picked up by 
somebody in order to get merged to main line someday?

Or is it not acceptable in this state for some reason?

Either the FEC changes need to be merged (possibly with some modification if 
there are issues) or the part depending on it in the ARM tree need to be 
reverted. We should not stay in this non coherent state.

JC

[PATCH 3/4] fec: add support for Freescale i.MX25 PDK (3DS)

[Jean-Christophe Dubois]

le lundi 25 janvier 2010 Baruch Siach a ?crit
> Hi Greg, netdev,
> 
> On Wed, Dec 16, 2009 at 08:34:06AM +0200, Baruch Siach wrote:
> > On Wed, Dec 16, 2009 at 10:13:56AM +1000, Greg Ungerer wrote:
> > > Baruch Siach wrote:
> > > >On Tue, Dec 15, 2009 at 09:52:24PM +1000, Greg Ungerer wrote:
> > > >>On 12/15/2009 06:31 PM, Baruch Siach wrote:
> > > >>>+#ifndef CONFIG_M5272
> > > >>
> > > >>I would suggest making this conditional on FEC_MIIGSK_ENR.
> > > >>Although the CONFIG_M5272 is the only case here currently,
> > > >>that may change over the years. And using this here may not
> > > >>be obvious to the causual code reader, since the register
> > > >>offset definitions don't explicitly key on CONFIG_M5272.
> > > >
> > > >OK, I'll change this conditional.
> > > >
> > > >Can I take this as an Ack from you?
> > > 
> > > With that conditional check changed, sure:
> > > 
> > > Acked-by:  Greg Ungerer <gerg@uclinux.org>
> > 
> > Thanks. The updated patch below.
> 
> I'm really sorry to bug on this again, but since the platform code is
> already upstream the i.MX25 code doesn't build without this patch
> (include/linux/fec.h missing). So, someone please pick up this patch,
> preferably prior to .33.
> 
> baruch

I am just wondering if somebody is going to pick up this patch 
(http://patchwork.ozlabs.org/patch/41235/) so that it finds its way on 
mainline.

The i.MX25 PDK platform (3DStack) has been broken for 2 kernel releases (as 
the actual code depend on this). Is there hope that this patch is picked up by 
somebody in order to get merged to main line someday?

Or is it not acceptable in this state for some reason?

Either the FEC changes need to be merged (possibly with some modification if 
there are issues) or the part depending on it in the ARM tree need to be 
reverted. We should not stay in this non coherent state.

JC

Re: [PATCH 3/4] fec: add support for Freescale i.MX25 PDK (3DS)

[Sascha Hauer]

On Wed, May 19, 2010 at 05:15:52PM +0200, Jean-Christophe Dubois wrote:
> le lundi 25 janvier 2010 Baruch Siach a écrit
> > Hi Greg, netdev,
> > 
> > On Wed, Dec 16, 2009 at 08:34:06AM +0200, Baruch Siach wrote:
> > > On Wed, Dec 16, 2009 at 10:13:56AM +1000, Greg Ungerer wrote:
> > > > Baruch Siach wrote:
> > > > >On Tue, Dec 15, 2009 at 09:52:24PM +1000, Greg Ungerer wrote:
> > > > >>On 12/15/2009 06:31 PM, Baruch Siach wrote:
> > > > >>>+#ifndef CONFIG_M5272
> > > > >>
> > > > >>I would suggest making this conditional on FEC_MIIGSK_ENR.
> > > > >>Although the CONFIG_M5272 is the only case here currently,
> > > > >>that may change over the years. And using this here may not
> > > > >>be obvious to the causual code reader, since the register
> > > > >>offset definitions don't explicitly key on CONFIG_M5272.
> > > > >
> > > > >OK, I'll change this conditional.
> > > > >
> > > > >Can I take this as an Ack from you?
> > > > 
> > > > With that conditional check changed, sure:
> > > > 
> > > > Acked-by:  Greg Ungerer <gerg@uclinux.org>
> > > 
> > > Thanks. The updated patch below.
> > 
> > I'm really sorry to bug on this again, but since the platform code is
> > already upstream the i.MX25 code doesn't build without this patch
> > (include/linux/fec.h missing). So, someone please pick up this patch,
> > preferably prior to .33.
> > 
> > baruch
> 
> I am just wondering if somebody is going to pick up this patch 
> (http://patchwork.ozlabs.org/patch/41235/) so that it finds its way on 
> mainline.

I'm much in favour of this patch. David?

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

[PATCH 3/4] fec: add support for Freescale i.MX25 PDK (3DS)

[Sascha Hauer]

On Wed, May 19, 2010 at 05:15:52PM +0200, Jean-Christophe Dubois wrote:
> le lundi 25 janvier 2010 Baruch Siach a ?crit
> > Hi Greg, netdev,
> > 
> > On Wed, Dec 16, 2009 at 08:34:06AM +0200, Baruch Siach wrote:
> > > On Wed, Dec 16, 2009 at 10:13:56AM +1000, Greg Ungerer wrote:
> > > > Baruch Siach wrote:
> > > > >On Tue, Dec 15, 2009 at 09:52:24PM +1000, Greg Ungerer wrote:
> > > > >>On 12/15/2009 06:31 PM, Baruch Siach wrote:
> > > > >>>+#ifndef CONFIG_M5272
> > > > >>
> > > > >>I would suggest making this conditional on FEC_MIIGSK_ENR.
> > > > >>Although the CONFIG_M5272 is the only case here currently,
> > > > >>that may change over the years. And using this here may not
> > > > >>be obvious to the causual code reader, since the register
> > > > >>offset definitions don't explicitly key on CONFIG_M5272.
> > > > >
> > > > >OK, I'll change this conditional.
> > > > >
> > > > >Can I take this as an Ack from you?
> > > > 
> > > > With that conditional check changed, sure:
> > > > 
> > > > Acked-by:  Greg Ungerer <gerg@uclinux.org>
> > > 
> > > Thanks. The updated patch below.
> > 
> > I'm really sorry to bug on this again, but since the platform code is
> > already upstream the i.MX25 code doesn't build without this patch
> > (include/linux/fec.h missing). So, someone please pick up this patch,
> > preferably prior to .33.
> > 
> > baruch
> 
> I am just wondering if somebody is going to pick up this patch 
> (http://patchwork.ozlabs.org/patch/41235/) so that it finds its way on 
> mainline.

I'm much in favour of this patch. David?

Sascha


-- 
Pengutronix e.K.                           |                             |
Industrial Linux Solutions                 | http://www.pengutronix.de/  |
Peiner Str. 6-8, 31137 Hildesheim, Germany | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

Re: [PATCH 3/4] fec: add support for Freescale i.MX25 PDK (3DS)

[David Miller]

From: Sascha Hauer <s.hauer@pengutronix.de>
Date: Thu, 20 May 2010 08:46:43 +0200

> On Wed, May 19, 2010 at 05:15:52PM +0200, Jean-Christophe Dubois wrote:
>> 
>> I am just wondering if somebody is going to pick up this patch 
>> (http://patchwork.ozlabs.org/patch/41235/) so that it finds its way on 
>> mainline.
> 
> I'm much in favour of this patch. David?

I put it back into my queue.

[PATCH 3/4] fec: add support for Freescale i.MX25 PDK (3DS)

[David Miller]

From: Sascha Hauer <s.hauer@pengutronix.de>
Date: Thu, 20 May 2010 08:46:43 +0200

> On Wed, May 19, 2010 at 05:15:52PM +0200, Jean-Christophe Dubois wrote:
>> 
>> I am just wondering if somebody is going to pick up this patch 
>> (http://patchwork.ozlabs.org/patch/41235/) so that it finds its way on 
>> mainline.
> 
> I'm much in favour of this patch. David?

I put it back into my queue.