* [U-Boot] Adding support for MB86R01 @ 2010-01-11 17:18 Matthias Weisser 2010-01-11 17:18 ` [U-Boot] [PATCH] Add support for MB86R01 from Fujitsu Matthias Weisser 2010-01-16 15:40 ` [U-Boot] Adding support for MB86R01 Tom 0 siblings, 2 replies; 23+ messages in thread From: Matthias Weisser @ 2010-01-11 17:18 UTC (permalink / raw) To: u-boot This patchset adds support for the MB86R01 'Jade' SoC from Fujitsu. It is based on a ARM926EJS core. ^ permalink raw reply [flat|nested] 23+ messages in thread
* [U-Boot] [PATCH] Add support for MB86R01 from Fujitsu 2010-01-11 17:18 [U-Boot] Adding support for MB86R01 Matthias Weisser @ 2010-01-11 17:18 ` Matthias Weisser 2010-01-11 17:18 ` [U-Boot] [PATCH] Add support for Jade display controller Matthias Weisser 2010-01-16 15:39 ` [U-Boot] [PATCH] Add support for MB86R01 from Fujitsu Tom 2010-01-16 15:40 ` [U-Boot] Adding support for MB86R01 Tom 1 sibling, 2 replies; 23+ messages in thread From: Matthias Weisser @ 2010-01-11 17:18 UTC (permalink / raw) To: u-boot Signed-off-by: Matthias Weisser <matthias.weisser@graf-syteco.de> --- common/serial.c | 3 +- cpu/arm926ejs/jade/Makefile | 47 +++++++++ cpu/arm926ejs/jade/reset.c | 37 ++++++++ cpu/arm926ejs/jade/timer.c | 127 +++++++++++++++++++++++++ include/asm-arm/arch-jade/hardware.h | 31 ++++++ include/asm-arm/arch-jade/jade.h | 170 ++++++++++++++++++++++++++++++++++ include/serial.h | 3 +- 7 files changed, 416 insertions(+), 2 deletions(-) create mode 100644 cpu/arm926ejs/jade/Makefile create mode 100644 cpu/arm926ejs/jade/reset.c create mode 100644 cpu/arm926ejs/jade/timer.c create mode 100644 include/asm-arm/arch-jade/hardware.h create mode 100644 include/asm-arm/arch-jade/jade.h diff --git a/common/serial.c b/common/serial.c index 5f9ffd7..7397608 100644 --- a/common/serial.c +++ b/common/serial.c @@ -41,7 +41,8 @@ struct serial_device *__default_serial_console (void) #elif defined(CONFIG_405GP) || defined(CONFIG_405CR) || defined(CONFIG_440) \ || defined(CONFIG_405EP) || defined(CONFIG_405EZ) || defined(CONFIG_405EX) \ || defined(CONFIG_MPC5xxx) || defined(CONFIG_MPC83xx) \ - || defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) + || defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) \ + || defined(CONFIG_JADE) #if defined(CONFIG_CONS_INDEX) && defined(CONFIG_SYS_NS16550_SERIAL) #if (CONFIG_CONS_INDEX==1) return &eserial1_device; diff --git a/cpu/arm926ejs/jade/Makefile b/cpu/arm926ejs/jade/Makefile new file mode 100644 index 0000000..360f046 --- /dev/null +++ b/cpu/arm926ejs/jade/Makefile @@ -0,0 +1,47 @@ +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd at denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(SOC).a + +COBJS = timer.o reset.o +SOBJS = + +SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS)) +START := $(addprefix $(obj),$(START)) + +all: $(obj).depend $(LIB) + +$(LIB): $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/cpu/arm926ejs/jade/reset.c b/cpu/arm926ejs/jade/reset.c new file mode 100644 index 0000000..820c3a1 --- /dev/null +++ b/cpu/arm926ejs/jade/reset.c @@ -0,0 +1,37 @@ +/* + * (C) Copyright 2009 + * Matthias Weisser <matthias.weisser@graf-syteco.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/hardware.h> + +/* + * Reset the cpu by setting software reset request bit + */ +void reset_cpu(ulong ignored) +{ + writel(0x00000002, JADE_CRG_PHYS_BASE + CRG_CRSR); + while (1) + /* NOP */; + /* Never reached */ +} diff --git a/cpu/arm926ejs/jade/timer.c b/cpu/arm926ejs/jade/timer.c new file mode 100644 index 0000000..bc20f37 --- /dev/null +++ b/cpu/arm926ejs/jade/timer.c @@ -0,0 +1,127 @@ +/* + * (C) Copyright 2007-2008 + * Stelian Pop <stelian.pop@leadtechdesign.com> + * Lead Tech Design <www.leadtechdesign.com> + * Matthias Weisser <matthias.weisser@graf-syteco.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <div64.h> +#include <asm/io.h> +#include <asm/arch/hardware.h> + +#define TIMER_LOAD_VAL 0xffffffff +#define TIMER_BASE JADE_TIMER_PHYS_BASE + +#define TIMER_REG_LOAD (TIMER_BASE + 0) +#define TIMER_REG_VALUE (TIMER_BASE + 4) +#define TIMER_REG_CONTROL (TIMER_BASE + 8) + +#define TIMER_FREQ (CONFIG_JADE_IOCLK / 16) + +static ulong timestamp; +static ulong lastdec; + +static inline unsigned long long tick_to_time(unsigned long long tick) +{ + tick *= CONFIG_SYS_HZ; + do_div(tick, TIMER_FREQ); + + return tick; +} + +static inline unsigned long long usec_to_tick(unsigned long long usec) +{ + usec *= TIMER_FREQ; + do_div(usec, 1000000); + + return usec; +} + +/* nothing really to do with interrupts, just starts up a counter. */ +int timer_init(void) +{ + writel(TIMER_LOAD_VAL, TIMER_REG_LOAD); + writel(0x86, TIMER_REG_CONTROL); + + reset_timer_masked(); + + return 0; +} + +/* + * timer without interrupts + */ +unsigned long long get_ticks(void) +{ + ulong now = readl(TIMER_REG_VALUE); + + if (now <= lastdec) /* normal mode (non roll) */ + /* move stamp forward with absolut diff ticks */ + timestamp += (lastdec - now); + else /* we have rollover of incrementer */ + timestamp += lastdec + TIMER_LOAD_VAL - now; + lastdec = now; + return timestamp; +} + +void reset_timer_masked(void) +{ + /* reset time */ + lastdec = readl(TIMER_REG_VALUE); + timestamp = 0; +} + +ulong get_timer_masked(void) +{ + return tick_to_time(get_ticks()); +} + +void __udelay(unsigned long usec) +{ + unsigned long long tmp; + ulong tmo; + + tmo = usec_to_tick(usec); + tmp = get_ticks() + tmo; /* get current timestamp */ + + while (get_ticks() < tmp) /* loop till event */ + /*NOP*/; +} + +void reset_timer(void) +{ + reset_timer_masked(); +} + +ulong get_timer(ulong base) +{ + return get_timer_masked() - base; +} + +/* + * This function is derived from PowerPC code (timebase clock frequency). + * On ARM it returns the number of timer ticks per second. + */ +ulong get_tbclk(void) +{ + return CONFIG_SYS_HZ; +} diff --git a/include/asm-arm/arch-jade/hardware.h b/include/asm-arm/arch-jade/hardware.h new file mode 100644 index 0000000..a26bdca --- /dev/null +++ b/include/asm-arm/arch-jade/hardware.h @@ -0,0 +1,31 @@ +/* + * (C) Copyright 2007 + * + * Author : Carsten Schneider, mycable GmbH + * <cs@mycable.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +#ifndef __ASM_ARCH_HARDWARE_H +#define __ASM_ARCH_HARDWARE_H + +#include <asm/sizes.h> +#include <asm/arch/jade.h> + +#endif diff --git a/include/asm-arm/arch-jade/jade.h b/include/asm-arm/arch-jade/jade.h new file mode 100644 index 0000000..8640a62 --- /dev/null +++ b/include/asm-arm/arch-jade/jade.h @@ -0,0 +1,170 @@ +/* + * (C) Copyright 2007 + * + * jade definitions + * + * Author : Carsten Schneider, mycable GmbH + * <cs@mycable.de> + * + * (C) Copyright 2009 + * Matthias Weisser <matthias.weisser@graf-syteco.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef JADE_H +#define JADE_H + +#ifndef __ASSEMBLY__ + +/* GPIO registers */ +struct jade_gpio{ + uint32_t gpdr0; + uint32_t gpdr1; + uint32_t gpdr2; + uint32_t res; + uint32_t gpddr0; + uint32_t gpddr1; + uint32_t gpddr2; +}; + +/* PWM registers */ +struct jade_pwm{ + uint32_t bcr; + uint32_t tpr; + uint32_t pr; + uint32_t dr; + uint32_t cr; + uint32_t sr; + uint32_t ccr; + uint32_t ir; +}; + +/* The jade chip control (CCNT) register set. */ +struct jade_ccnt{ + uint32_t ccid; + uint32_t csrst; + uint32_t pad0[2]; + uint32_t cist; + uint32_t cistm; + uint32_t cgpio_ist; + uint32_t cgpio_istm; + uint32_t cgpio_ip; + uint32_t cgpio_im; + uint32_t caxi_bw; + uint32_t caxi_ps; + uint32_t cmux_md; + uint32_t cex_pin_st; + uint32_t cmlb; + uint32_t pad1[1]; + uint32_t cusb; + uint32_t pad2[41]; + uint32_t cbsc; + uint32_t cdcrc; + uint32_t cmsr0; + uint32_t cmsr1; + uint32_t pad3[2]; +}; + +#endif /* __ASSEMBLY__ */ + +/* + * Physical Address Defines + */ +#define JADE_DDR2C_PHYS_BASE 0xf3000000 +#define JADE_GDC_PHYS_BASE 0xf1fc0000 +#define JADE_GDC_DISP0_PHYS_BASE 0xf1fd0000 +#define JADE_GDC_DISP1_PHYS_BASE 0xf1fd2000 +#define JADE_CCNT_PHYS_BASE 0xfff42000 +#define JADE_CAN0_PHYS_BASE 0xfff54000 +#define JADE_CAN1_PHYS_BASE 0xfff55000 +#define JADE_I2C0_PHYS_BASE 0xfff56000 +#define JADE_I2C1_PHYS_BASE 0xfff57000 +#define JADE_EHCI_PHYS_BASE 0xfff80000 +#define JADE_OHCI_PHYS_BASE 0xfff81000 +#define JADE_IRC1_PHYS_BASE 0xfffb0000 +#define JADE_MEMC_PHYS_BASE 0xfffc0000 +#define JADE_TIMER_PHYS_BASE 0xfffe0000 +#define JADE_UART0_PHYS_BASE 0xfffe1000 +#define JADE_UART1_PHYS_BASE 0xfffe2000 +#define JADE_IRCE_PHYS_BASE 0xfffe4000 +#define JADE_CRG_PHYS_BASE 0xfffe7000 +#define JADE_IRC0_PHYS_BASE 0xfffe8000 +#define JADE_GPIO_PHYS_BASE 0xfffe9000 +#define JADE_PWM0_PHYS_BASE 0xfff41000 +#define JADE_PWM1_PHYS_BASE 0xfff41100 + +/* + * Offset definitions for DRAM controller + */ +#define DDR2C_DRIC 0x00 +#define DDR2C_DRIC1 0x02 +#define DDR2C_DRIC2 0x04 +#define DDR2C_DRCA 0x06 +#define DDR2C_DRCM 0x08 +#define DDR2C_DRCST1 0x0a +#define DDR2C_DRCST2 0x0c +#define DDR2C_DRCR 0x0e +#define DDR2C_DRCF 0x20 +#define DDR2C_DRASR 0x30 +#define DDR2C_DRIMS 0x50 +#define DDR2C_DROS 0x60 +#define DDR2C_DRIBSLI 0x62 +#define DDR2C_DRIBSODT1 0x64 +#define DDR2C_DRIBSOCD 0x66 +#define DDR2C_DRIBSOCD2 0x68 +#define DDR2C_DROABA 0x70 +#define DDR2C_DROBV 0x80 +#define DDR2C_DROBS 0x84 +#define DDR2C_DROBSR1 0x86 +#define DDR2C_DROBSR2 0x88 +#define DDR2C_DROBSR3 0x8a +#define DDR2C_DROBSR4 0x8c +#define DDR2C_DRIMR1 0x90 +#define DDR2C_DRIMR2 0x92 +#define DDR2C_DRIMR3 0x94 +#define DDR2C_DRIMR4 0x96 +#define DDR2C_DROISR1 0x98 +#define DDR2C_DROISR2 0x9a + +/* + * Offset definitions Chip Control Module + */ +#define CCNT_CCID 0x00 +#define CCNT_CSRST 0x1c +#define CCNT_CIST 0x20 +#define CCNT_CISTM 0x24 +#define CCNT_CMUX_MD 0x30 +#define CCNT_CDCRC 0xec + +/* + * Offset definitions clock reset generator + */ +#define CRG_CRPR 0x00 +#define CRG_CRWR 0x08 +#define CRG_CRSR 0x0c +#define CRG_CRDA 0x10 +#define CRG_CRDB 0x14 +#define CRG_CRHA 0x18 +#define CRG_CRPA 0x1c +#define CRG_CRPB 0x20 +#define CRG_CRHB 0x24 +#define CRG_CRAM 0x28 + +#endif /* jade_H */ diff --git a/include/serial.h b/include/serial.h index f2638ec..a560c71 100644 --- a/include/serial.h +++ b/include/serial.h @@ -25,7 +25,8 @@ extern struct serial_device * default_serial_console (void); #if defined(CONFIG_405GP) || defined(CONFIG_405CR) || defined(CONFIG_440) || \ defined(CONFIG_405EP) || defined(CONFIG_405EZ) || defined(CONFIG_405EX) || \ defined(CONFIG_MPC5xxx) || defined(CONFIG_MPC83xx) || \ - defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) + defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) || \ + defined(CONFIG_JADE) extern struct serial_device serial0_device; extern struct serial_device serial1_device; #if defined(CONFIG_SYS_NS16550_SERIAL) -- 1.5.6.3 ^ permalink raw reply related [flat|nested] 23+ messages in thread
* [U-Boot] [PATCH] Add support for Jade display controller 2010-01-11 17:18 ` [U-Boot] [PATCH] Add support for MB86R01 from Fujitsu Matthias Weisser @ 2010-01-11 17:18 ` Matthias Weisser 2010-01-11 17:18 ` [U-Boot] [PATCH] Adding new vendor logo Matthias Weisser 2010-01-16 16:30 ` [U-Boot] [PATCH] Add support for Jade display controller Tom 2010-01-16 15:39 ` [U-Boot] [PATCH] Add support for MB86R01 from Fujitsu Tom 1 sibling, 2 replies; 23+ messages in thread From: Matthias Weisser @ 2010-01-11 17:18 UTC (permalink / raw) To: u-boot Signed-off-by: Matthias Weisser <matthias.weisser@graf-syteco.de> --- drivers/video/Makefile | 1 + drivers/video/cfb_console.c | 2 +- drivers/video/jadegdc.c | 193 +++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 195 insertions(+), 1 deletions(-) create mode 100644 drivers/video/jadegdc.c diff --git a/drivers/video/Makefile b/drivers/video/Makefile index bb6b5a0..aadc149 100644 --- a/drivers/video/Makefile +++ b/drivers/video/Makefile @@ -30,6 +30,7 @@ COBJS-$(CONFIG_ATMEL_LCD) += atmel_lcdfb.o COBJS-$(CONFIG_CFB_CONSOLE) += cfb_console.o COBJS-$(CONFIG_S6E63D6) += s6e63d6.o COBJS-$(CONFIG_VIDEO_CT69000) += ct69000.o +COBJS-$(CONFIG_VIDEO_JADEGDC) += jadegdc.o COBJS-$(CONFIG_VIDEO_MB862xx) += mb862xx.o COBJS-$(CONFIG_VIDEO_MX3) += mx3fb.o COBJS-$(CONFIG_VIDEO_SED13806) += sed13806.o diff --git a/drivers/video/cfb_console.c b/drivers/video/cfb_console.c index c07a26e..506337b 100644 --- a/drivers/video/cfb_console.c +++ b/drivers/video/cfb_console.c @@ -321,7 +321,7 @@ void console_cursor (int state); #else #define SWAP16(x) (x) #define SWAP32(x) (x) -#if defined(VIDEO_FB_16BPP_WORD_SWAP) +#if defined(VIDEO_FB_16BPP_WORD_SWAP) || defined(CONFIG_VIDEO_JADEGDC) #define SHORTSWAP32(x) ( ((x) >> 16) | ((x) << 16) ) #else #define SHORTSWAP32(x) (x) diff --git a/drivers/video/jadegdc.c b/drivers/video/jadegdc.c new file mode 100644 index 0000000..354de11 --- /dev/null +++ b/drivers/video/jadegdc.c @@ -0,0 +1,193 @@ +/* + * (C) Copyright 2007-2009 + * Matthias Weisser <matthias.weisser@graf-syteco.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * jade.c - Graphic interface for Fujitsu Jade integrated graphic + * controller. Derived from mb862xx.c + */ + +#include <common.h> + +#include <malloc.h> +#include <mb862xx.h> +#include <asm/io.h> +#include <asm/arch/hardware.h> +#include <video_fb.h> +#include "videomodes.h" + +/* + * 4MB (at the end of system RAM) + */ +#define VIDEO_MEM_SIZE 0x400000 + +/* + * Graphic Device + */ +GraphicDevice jadegdc; + +void *video_hw_init(void) +{ + GraphicDevice *pGD = &jadegdc; + struct ctfb_res_modes var_mode[2]; + unsigned long *vid; + unsigned long div; + unsigned long dspBase[2]; + char *penv; + int bpp; + int i, j; + + memset(pGD, 0, sizeof(GraphicDevice)); + + dspBase[0] = JADE_GDC_DISP0_PHYS_BASE; + dspBase[1] = JADE_GDC_DISP1_PHYS_BASE; + + pGD->gdfIndex = GDF_15BIT_555RGB; + pGD->gdfBytesPP = 2; + + pGD->memSize = VIDEO_MEM_SIZE; + pGD->frameAdrs = PHYS_SDRAM + PHYS_SDRAM_SIZE - VIDEO_MEM_SIZE; + vid = (unsigned long *)pGD->frameAdrs; + + for (i = 0; i < 2; i++) { + char varName[32]; + u32 dcm1, dcm2, dcm3; + u16 htp, hdp, hdb, hsp, vtr, vsp, vdp; + u8 hsw, vsw; + u32 l2m, l2em, l2oa0, l2da0, l2oa1, l2da1; + u16 l2dx, l2dy, l2wx, l2wy, l2ww, l2wh; + + sprintf(varName, "gs_dsp_%d_param", i); + + penv = getenv(varName); + if (penv == NULL) { + penv = getenv("videomode"); + if ((i == 1) || (penv == NULL)) + continue; + } + + bpp = 0; + bpp = video_get_params(&var_mode[i], penv); + + if (bpp == 0) { + var_mode[i].xres = 640; + var_mode[i].yres = 480; + var_mode[i].pixclock = 39721; /* 25MHz */ + var_mode[i].left_margin = 48; + var_mode[i].right_margin = 16; + var_mode[i].upper_margin = 33; + var_mode[i].lower_margin = 10; + var_mode[i].hsync_len = 96; + var_mode[i].vsync_len = 2; + var_mode[i].sync = 0; + var_mode[i].vmode = 0; + } + + for (j = 0; j < var_mode[i].xres * var_mode[i].yres / 2; j++) + *vid++ = 0xFFFFFFFF; + + pGD->winSizeX = var_mode[i].xres; + pGD->winSizeY = var_mode[i].yres; + + /* LCD base clock is ~ 660MHZ. We do calculations in kHz */ + div = 660000 / (1000000000L / var_mode[i].pixclock); + if (div > 64) + div = 64; + if (0 == div) + div = 1; + + dcm1 = (div - 1) << 8; + dcm2 = 0x00000000; + dcm3 = 0x00000000; + + htp = var_mode[i].left_margin + var_mode[i].xres + + var_mode[i].hsync_len + var_mode[i].right_margin; + hdp = var_mode[i].xres; + hdb = var_mode[i].xres; + hsp = var_mode[i].xres + var_mode[i].right_margin; + hsw = var_mode[i].hsync_len; + + vsw = var_mode[i].vsync_len; + vtr = var_mode[i].upper_margin + var_mode[i].yres + + var_mode[i].vsync_len + var_mode[i].lower_margin; + vsp = var_mode[i].yres + var_mode[i].lower_margin; + vdp = var_mode[i].yres; + + l2m = ((var_mode[i].yres - 1) << (0)) | + (((var_mode[i].xres * 2) / 64) << (16)) | + ((1) << (31)); + + l2em = (1 << 0) | (1 << 1); + + l2oa0 = pGD->frameAdrs; + l2da0 = pGD->frameAdrs; + l2oa1 = pGD->frameAdrs; + l2da1 = pGD->frameAdrs; + l2dx = 0; + l2dy = 0; + l2wx = 0; + l2wy = 0; + l2ww = var_mode[i].xres; + l2wh = var_mode[i].yres - 1; + + writel(dcm1, dspBase[i] + GC_DCM1); + writel(dcm2, dspBase[i] + GC_DCM2); + writel(dcm3, dspBase[i] + GC_DCM3); + + writew(htp, dspBase[i] + GC_HTP); + writew(hdp, dspBase[i] + GC_HDP); + writew(hdb, dspBase[i] + GC_HDB); + writew(hsp, dspBase[i] + GC_HSP); + writeb(hsw, dspBase[i] + GC_HSW); + + writeb(vsw, dspBase[i] + GC_VSW); + writew(vtr, dspBase[i] + GC_VTR); + writew(vsp, dspBase[i] + GC_VSP); + writew(vdp, dspBase[i] + GC_VDP); + + writel(l2m, dspBase[i] + GC_L2M); + writel(l2em, dspBase[i] + GC_L2EM); + writel(l2oa0, dspBase[i] + GC_L2OA0); + writel(l2da0, dspBase[i] + GC_L2DA0); + writel(l2oa1, dspBase[i] + GC_L2OA1); + writel(l2da1, dspBase[i] + GC_L2DA1); + writew(l2dx, dspBase[i] + GC_L2DX); + writew(l2dy, dspBase[i] + GC_L2DY); + writew(l2wx, dspBase[i] + GC_L2WX); + writew(l2wy, dspBase[i] + GC_L2WY); + writew(l2ww, dspBase[i] + GC_L2WW); + writew(l2wh, dspBase[i] + GC_L2WH); + + writel(dcm1 | (1 << 18) | (1 << 31), dspBase[i] + GC_DCM1); + } + + return pGD; +} + +/* + * Set a RGB color in the LUT + */ +void video_set_lut(unsigned int index, unsigned char r, + unsigned char g, unsigned char b) +{ + +} -- 1.5.6.3 ^ permalink raw reply related [flat|nested] 23+ messages in thread
* [U-Boot] [PATCH] Adding new vendor logo 2010-01-11 17:18 ` [U-Boot] [PATCH] Add support for Jade display controller Matthias Weisser @ 2010-01-11 17:18 ` Matthias Weisser 2010-01-11 17:18 ` [U-Boot] [PATCH] Add support for jadecpu board Matthias Weisser 2010-01-16 16:43 ` [U-Boot] [PATCH] Adding new vendor logo Tom 2010-01-16 16:30 ` [U-Boot] [PATCH] Add support for Jade display controller Tom 1 sibling, 2 replies; 23+ messages in thread From: Matthias Weisser @ 2010-01-11 17:18 UTC (permalink / raw) To: u-boot Signed-off-by: Matthias Weisser <matthias.weisser@graf-syteco.de> --- tools/Makefile | 3 +++ tools/logos/syteco.bmp | Bin 0 -> 12278 bytes 2 files changed, 3 insertions(+), 0 deletions(-) create mode 100644 tools/logos/syteco.bmp diff --git a/tools/Makefile b/tools/Makefile index 5b8c3c3..702bb83 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -105,6 +105,9 @@ endif ifeq ($(VENDOR),ronetix) LOGO_BMP= logos/ronetix.bmp endif +ifeq ($(VENDOR),syteco) +LOGO_BMP= logos/syteco.bmp +endif # now $(obj) is defined HOSTSRCS += $(addprefix $(SRCTREE)/,$(EXT_OBJ_FILES-y:.o=.c)) diff --git a/tools/logos/syteco.bmp b/tools/logos/syteco.bmp new file mode 100644 index 0000000000000000000000000000000000000000..141ee8e10edd85caa52b9501e3a4381b81fe772d GIT binary patch literal 12278 zcmeI0TdvbE5Qg2PNJwmiH{MtP??`Ncopb>#s;lC)jN^<mx5VSvEtQTf72hWQzx=+$ zhaW%xehW+behuL(l>Wf)7yK^a^U at yw`TZsRu;KA|g!}yt)yLX&3%A>CEstzCFdP^T zd`t(f&J=<Se1cz6Vz2%xn8}kC7#8>(XPCrZWxxz)aQVUR*)s#%*H9UWBXrEA1QO&t zYstvm(XSvSGDIqb%bIEx at j1x-j~>EAlo=D;a@~oAc7b6ib0rJDLd at MXyUuWw7M5lh zfih3b_~Yq<Q0mM4sm&RQGEdX7KJAq(ZPTPs8d(~qNu#u~oQ5$_npsY+84IPE<=mPv zQ97`kn5KBBu^pKzRr@FeV}ujV0E-%key8+JPwjR%PSg-fL+v?Zuuzm~N*8k07B$EL zgOci{u%n!(&w*xPvQV*M3>M{ZnIT6kFp5Q@?7&zo5+*A-3K2%KXp{&O|B7Qh)*L|? zpC$*w76J<5c_x at E8fJ%u!)!vHl9NR{v&%xA at eq(0pD%ivp1}fG^iANr-ANEg*UW!q z5!3Wi7BY`!(b&_ei5$V^gNKdw934IaoiAk}Vud1NtB)*p`12iK3IL=Vr3MQz1&YHL z?g!T5(G$}<te52r@ir{UnfLG|IrA<o(V5;X`SwN+d0eDBdHS-))l0rbu^5}`5<7SE zRg$sjdj!8hEd8L`mjx~<>uXXIGz-iLz0M#^oeMge`4T14zy+4)zzCKVrZ7jqYdS;U zK)-geMY1HAGK&er_EJ$=1t^vU#=&C1z*A)XDyd=veR|!7ux30g3PzkUMQIhlSTc-@ zMZgG@*7F4qsH=~K!AO*L798Qkj$n(W{oIW!FU?{FOAaOLb{j}7ih~CEHp_s~Z*R(> z0tFpD&{ka*OeKq?NOh&;XfR-ESl~bKOcsZ-5uyjHVwp at 9L&w#mVCq;V!xxvX86;tv zS at 1$`sudaqOe;&gcN7#4x;acE%W?(k1=GfoP<lDj#DXX-Fy!*w!m^>X!E6i4`vtgM zK%4GqiqZ>a!!mBRTo7yU$TR*rpd^+A%JbZc6eD%0s`up(SQ{|tgv^IC(h;nGKxaB^ J$T5U;;2&8xIXwUX literal 0 HcmV?d00001 -- 1.5.6.3 ^ permalink raw reply related [flat|nested] 23+ messages in thread
* [U-Boot] [PATCH] Add support for jadecpu board 2010-01-11 17:18 ` [U-Boot] [PATCH] Adding new vendor logo Matthias Weisser @ 2010-01-11 17:18 ` Matthias Weisser 2010-01-16 19:18 ` Tom 2010-01-16 16:43 ` [U-Boot] [PATCH] Adding new vendor logo Tom 1 sibling, 1 reply; 23+ messages in thread From: Matthias Weisser @ 2010-01-11 17:18 UTC (permalink / raw) To: u-boot Signed-off-by: Matthias Weisser <matthias.weisser@graf-syteco.de> --- MAINTAINERS | 4 + MAKEALL | 1 + Makefile | 7 + board/syteco/jadecpu/Makefile | 55 +++++++ board/syteco/jadecpu/config.mk | 1 + board/syteco/jadecpu/jadecpu.c | 188 +++++++++++++++++++++++ board/syteco/jadecpu/lowlevel_init.S | 279 ++++++++++++++++++++++++++++++++++ include/configs/jadecpu.h | 187 +++++++++++++++++++++++ 8 files changed, 722 insertions(+), 0 deletions(-) create mode 100644 board/syteco/jadecpu/Makefile create mode 100644 board/syteco/jadecpu/config.mk create mode 100644 board/syteco/jadecpu/jadecpu.c create mode 100644 board/syteco/jadecpu/lowlevel_init.S create mode 100644 include/configs/jadecpu.h diff --git a/MAINTAINERS b/MAINTAINERS index 9734b1d..706e847 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -744,6 +744,10 @@ Prafulla Wadaskar <prafulla@marvell.com> rd6281a ARM926EJS (Kirkwood SoC) sheevaplug ARM926EJS (Kirkwood SoC) +Matthias Weisser <matthias.weisser@graf-syteco.de> + + jadecpu ARM926EJS + Richard Woodruff <r-woodruff2@ti.com> omap2420h4 ARM1136EJS diff --git a/MAKEALL b/MAKEALL index ab1bb6f..33b1dc6 100755 --- a/MAKEALL +++ b/MAKEALL @@ -553,6 +553,7 @@ LIST_ARM9=" \ cp966 \ da830evm \ imx27lite \ + jadecpu \ lpd7a400 \ mv88f6281gtw_ge \ mx1ads \ diff --git a/Makefile b/Makefile index ed6156f..98c147d 100644 --- a/Makefile +++ b/Makefile @@ -2874,6 +2874,13 @@ TNY_A9260_config : unconfig @echo "#define CONFIG_$(@:_config=) 1" >$(obj)include/config.h @$(MKCONFIG) -a tny_a9260 arm arm926ejs tny_a9260 calao at91 +######################################################################### +## ARM926EJ-S Systems +######################################################################### + +jadecpu_config : unconfig + @$(MKCONFIG) $(@:_config=) arm arm926ejs jadecpu syteco jade + ######################################################################## ## ARM Integrator boards - see doc/README-integrator for more info. integratorap_config \ diff --git a/board/syteco/jadecpu/Makefile b/board/syteco/jadecpu/Makefile new file mode 100644 index 0000000..87d2234 --- /dev/null +++ b/board/syteco/jadecpu/Makefile @@ -0,0 +1,55 @@ +# +# (C) Copyright 2003-2008 +# Wolfgang Denk, DENX Software Engineering, wd at denx.de. +# +# (C) Copyright 2008 +# Stelian Pop <stelian.pop@leadtechdesign.com> +# Lead Tech Design <www.leadtechdesign.com> +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +COBJS-y += jadecpu.o +SOBJS := lowlevel_init.o + +SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak $(obj).depend + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/board/syteco/jadecpu/config.mk b/board/syteco/jadecpu/config.mk new file mode 100644 index 0000000..c661f0b --- /dev/null +++ b/board/syteco/jadecpu/config.mk @@ -0,0 +1 @@ +TEXT_BASE = 0x46000000 diff --git a/board/syteco/jadecpu/jadecpu.c b/board/syteco/jadecpu/jadecpu.c new file mode 100644 index 0000000..aba3e54 --- /dev/null +++ b/board/syteco/jadecpu/jadecpu.c @@ -0,0 +1,188 @@ +/* + * (c) 2009 Graf-Syteco, Matthias Weisser + * <matthias.weisser@graf-syteco.de> + * + * (C) Copyright 2007, mycable GmbH + * Carsten Schneider <cs@mycable.de>, Alexander Bigga <ab@mycable.de> + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <netdev.h> +#include <asm/io.h> +#include <asm/arch/jade.h> + +DECLARE_GLOBAL_DATA_PTR; + +#if defined(CONFIG_SHOW_BOOT_PROGRESS) +void show_boot_progress(int progress) +{ + printf("Boot reached stage %d\n", progress); +} +#endif + +/* + * Miscellaneous platform dependent initialisations + */ +int board_init(void) +{ + struct jade_ccnt * ccnt = (struct jade_ccnt *)JADE_CCNT_PHYS_BASE; + + /* We select mode 0 for group 2 and mode 1 for group 4 */ + writel(0x00000010, &ccnt->cmux_md); + + gd->flags = 0; + + icache_enable(); + + return 0; +} + +int board_late_init(void) +{ + struct jade_gpio *gpio = (struct jade_gpio *)JADE_GPIO_PHYS_BASE; + struct jade_pwm *pwm; + uint32_t in_word; + const char *e; + const char *s; + + /* Check if we have valid display settings and turn on power if so*/ + /* Display 0 */ + if (getenv("gs_dsp_0_param")) { + writel(readl(&gpio->gpdr2) | (1 << 3), &gpio->gpdr2); + + e = getenv("gs_dsp_0_pwm"); + if (e != NULL) { + uint32_t freq, init; + + freq = 0; + init = 0; + + s = strchr(e, 'f'); + if (s != NULL) + freq = simple_strtol(s + 2, NULL, 0); + + s = strchr(e, 'i'); + if (s != NULL) + init = simple_strtol(s + 2, NULL, 0); + + if (freq > 0) { + pwm = (struct jade_pwm *)JADE_PWM0_PHYS_BASE; + + writel(CONFIG_JADE_IOCLK / 1000 / freq, + &pwm->bcr); + writel(1002, &pwm->tpr); + writel(1, &pwm->pr); + writel(init * 10 + 1, &pwm->dr); + writel(1, &pwm->cr); + writel(1, &pwm->sr); + } + } + } + writel(readl(&gpio->gpddr2) | (1 << 3), &gpio->gpddr2); + + /* Display 1 */ + if (getenv("gs_dsp_1_param")) { + writel(readl(&gpio->gpdr2) | (1 << 4), &gpio->gpdr2); + + e = getenv("gs_dsp_1_pwm"); + if (e != NULL) { + uint32_t freq, init; + + freq = 0; + init = 0; + + s = strchr(e, 'f'); + if (s != NULL) + freq = simple_strtol(s + 2, NULL, 0); + + s = strchr(e, 'i'); + if (s != NULL) + init = simple_strtol(s + 2, NULL, 0); + + if (freq > 0) { + pwm = (struct jade_pwm *)JADE_PWM1_PHYS_BASE; + + writel(CONFIG_JADE_IOCLK / 1000 / freq, + &pwm->bcr); + writel(1002, &pwm->tpr); + writel(1, &pwm->pr); + writel(init * 10 + 1, &pwm->dr); + writel(1, &pwm->cr); + writel(1, &pwm->sr); + } + } + } + writel(readl(&gpio->gpddr2) | (1 << 4), &gpio->gpddr2); + + /* 5V enable */ + writel(readl(&gpio->gpddr1) | (1 << 5), &gpio->gpddr1); + writel(readl(&gpio->gpdr1) & ~(1 << 5), &gpio->gpdr1); + + /* We have special boot options if told by GPIOs */ + in_word = readl(&gpio->gpdr1); + + if ((in_word & 0xC0) == 0xC0) { + setenv("stdin", "eserial0"); + setenv("stdout", "eserial0"); + setenv("stderr", "eserial0"); + setenv("bootdelay", "10"); + } else if ((in_word & 0xC0) != 0) { + setenv("stdout", "vga"); + setenv("bootcmd", "mw.l 0x40000000 0 1024; usb start;" + "fatls usb 0; fatload usb 0 0x40000000 mcq5resq.bin;" + "bootelf 0x40000000; bootelf 0x10080000"); + setenv("bootdelay", "5"); + } else{ + setenv("stdin", "serial"); + setenv("stdout", "serial"); + setenv("stderr", "serial"); + if (getenv("gs_devel")) + setenv("bootdelay", "5"); + else + setenv("bootdelay", "0"); + } + + return 0; +} + +int misc_init_r(void) +{ + setenv("verify", "n"); + return 0; +} + +/* + * DRAM configuration + */ +int dram_init(void) +{ + gd->bd->bi_dram[0].start = PHYS_SDRAM; + gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; + + return 0; +} + +int board_eth_init(bd_t *bis) +{ + int rc = 0; +#ifdef CONFIG_SMC911X + rc = smc911x_initialize(0, CONFIG_SMC911X_BASE); +#endif + return rc; +} + diff --git a/board/syteco/jadecpu/lowlevel_init.S b/board/syteco/jadecpu/lowlevel_init.S new file mode 100644 index 0000000..73550c9 --- /dev/null +++ b/board/syteco/jadecpu/lowlevel_init.S @@ -0,0 +1,279 @@ +/* + * Board specific setup info + * + * (C) Copyright 2007, mycable GmbH + * Carsten Schneider <cs@mycable.de>, Alexander Bigga <ab@mycable.de> + * + * (C) Copyright 2007, mycable GmbH + * Carsten Schneider <cs@mycable.de>, Alexander Bigga <ab@mycable.de> + * + * (C) Copyright 2003, ARM Ltd. + * Philippe Robin, <philippe.robin@arm.com> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software/* you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation/* either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY/* without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program/* if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <config.h> +#include <version.h> +#include <asm/macro.h> +#include <asm/arch/jade.h> + +/* Set up the platform, once the cpu has been initialized */ +.globl lowlevel_init +lowlevel_init: +/* + * Initialize Clock Reset Generator (CRG) + */ + + ldr r0, =JADE_CRG_PHYS_BASE + + /* Not change the initial value that is set by external pin.*/ +1: ldr r2, [r0, #CRG_CRPR] /* Wait for PLLREADY */ + tst r2, #0x00000100 + beq 1b + + /* Set clock gate control */ + ldr r1, =0x0000ffff /* Open */ + str r1, [r0, #CRG_CRHA] /* CRHA: AHB clock */ + ldr r1, =0x0000ffff /* Open */ + str r1, [r0, #CRG_CRPA] /* CRPA: APB-A clock */ + ldr r1, =0xfffffffe /* Close */ + str r1, [r0, #CRG_CRPB] /* CRPA: APB-B clock */ + ldr r1, =0x0000ffff /* Open */ + str r1, [r0, #CRG_CRHB] /* CRHB: ExtAHB clock */ + ldr r1, =0xffffffef /* Open ARM926EJ-S only */ + str r1, [r0, #CRG_CRAM] /* CRAM: ARM core clock */ + +/* + * Initialize External Bus Interface + */ + + ldr r0, =JADE_MEMC_PHYS_BASE + + /* + * SRAM/flash _mode_ registers (XCS4 is set by external pin) + * XCS0: Ethernet Controller + * XCS2: not used (?) + * XCS4: Flash + */ + ldr r1, =0x00000001 /* XCS0: 16bit */ + str r1, [r0, #0x00] + ldr r1, =0x00000001 /* XCS2: 16bit */ + str r1, [r0, #0x08] + ldr r1, =0x00000021 /* XCS4: 16bit, */ + str r1, [r0, #0x10] + + /* SRAM/flash _timing_ registers (HCLK=83.3/80MHz) */ + ldr r1, =0x03061008 /* XCS0: FPGA*/ + str r1, [r0, #0x20] + ldr r1, =0x03061008 /* XCS2: Ethernet */ + str r1, [r0, #0x28] + ldr r1, =0x03061804 /* XCS4: FLASH ROM */ + str r1, [r0, #0x30] + + /* SRAM/flash _area_ registers (address of XCS4 is set by hardware) */ + ldr r1, =0x000000c0 /* XCS0: 0x0c000000/1MB */ + str r1, [r0, #0x40] + ldr r1, =0x00000020 /* XCS2: 0x02000000/1MB */ + str r1, [r0, #0x48] + ldr r1, =0x001f0000 /* XCS4: 32 MB */ + str r1, [r0, #0x50] + +/* + * Initialize DDR2 Controller + */ + + /* Wait for PLL LOCK up time or more */ + wait_timer 20 + + /* + * (2) Initialize DDRIF + */ + ldr r0, =JADE_DDR2C_PHYS_BASE + ldr r1, =0x5555 + strh r1, [r0, #DDR2C_DRIMS] + + /* + * (3) Wait for 20MCKPs(120nsec) or more + */ + wait_timer 20 + + /* + * (4) IRESET/IUSRRST release + /* + ldr r0, =JADE_CCNT_PHYS_BASE + ldr r1, =0x00000002 + str r1, [r0, #CCNT_CDCRC] + + /* + * (5) Wait for 20MCKPs(120nsec) or more + */ + wait_timer 20 + + /* + * (6) IDLLRST release + */ + ldr r0, =JADE_CCNT_PHYS_BASE + ldr r1, =0x00000003 + str r1, [r0, #CCNT_CDCRC] + + /* + * (7+8) Wait for 200us(=200000ns) or more (DDR2 Spec) + */ + wait_timer 33536 + + /* + * (9) MCKE ON + */ + ldr r0, =JADE_DDR2C_PHYS_BASE + ldr r1, =0x003f + strh r1, [r0, #DDR2C_DRIC1] + ldr r1, =0x0000 + strh r1, [r0, #DDR2C_DRIC2] + ldr r1, =0xc124 /* 512Mbit DDR2SDRAM x 2 */ + strh r1, [r0, #DDR2C_DRCA] + ldr r1, =0xc000 + strh r1, [r0, #DDR2C_DRIC] + + /* + * (10) Initialize SDRAM + */ + + ldr r1, =0xc001 /* NOP Command */ + strh r1, [r0, #DDR2C_DRIC] + + wait_timer 67 /* 400ns wait */ + + ldr r1, =0x0017 /* PALL Command */ + strh r1, [r0, #DDR2C_DRIC1] + ldr r1, =0x0400 + strh r1, [r0, #DDR2C_DRIC2] + ldr r1, =0xc001 + strh r1, [r0, #DDR2C_DRIC] + + ldr r1, =0x0006 /* EMR(2) command */ + strh r1, [r0, #DDR2C_DRIC1] + ldr r1, =0x0000 + strh r1, [r0, #DDR2C_DRIC2] + ldr r1, =0xc001 + strh r1, [r0, #DDR2C_DRIC] + + ldr r1, =0x0007 /* EMR(3) command */ + strh r1, [r0, #DDR2C_DRIC1] + ldr r1, =0x0000 + strh r1, [r0, #DDR2C_DRIC2] + ldr r1, =0xc001 + strh r1, [r0, #DDR2C_DRIC] + + ldr r1, =0x0005 /* EMR(1) command */ + strh r1, [r0, #DDR2C_DRIC1] + ldr r1, =0x0000 /* Extended Mode Register 1 clear*/ + strh r1, [r0, #DDR2C_DRIC2] + ldr r1, =0xc001 + strh r1, [r0, #DDR2C_DRIC] + + ldr r1, =0x0004 /* MRS command */ + strh r1, [r0, #DDR2C_DRIC1] + ldr r1, =0x0532 /* Mode Register */ + strh r1, [r0, #DDR2C_DRIC2] + ldr r1, =0xc001 + strh r1, [r0, #DDR2C_DRIC] + + wait_timer 200 + + ldr r1, =0x0017 /* PALL command */ + strh r1, [r0, #DDR2C_DRIC1] + ldr r1, =0x0400 + strh r1, [r0, #DDR2C_DRIC2] + ldr r1, =0xc001 + strh r1, [r0, #DDR2C_DRIC] + + ldr r1, =0x000f /* REF command 1 */ + strh r1, [r0, #DDR2C_DRIC1] + ldr r1, =0x0000 /* (changed) */ + strh r1, [r0, #DDR2C_DRIC2] + ldr r1, =0xc001 + strh r1, [r0, #DDR2C_DRIC] + + wait_timer 18 /* 105ns wait */ + + ldr r1, =0x0004 /* MRS command */ + strh r1, [r0, #DDR2C_DRIC1] + ldr r1, =0x0432 + strh r1, [r0, #DDR2C_DRIC2] + ldr r1, =0xc001 + strh r1, [r0, #DDR2C_DRIC] + + wait_timer 200 /* MRS to OCD: 200clock */ + + ldr r1, =0x0005 /* EMR(1) command */ + strh r1, [r0, #DDR2C_DRIC1] + ldr r1, =0x0380 /* Extended Mode Register 1 set OCD */ + strh r1, [r0, #DDR2C_DRIC2] + ldr r1, =0xc001 + strh r1, [r0, #DDR2C_DRIC] + + ldr r1, =0x0005 /* EMR(1) command */ + strh r1, [r0, #DDR2C_DRIC1] + /* ldr r1, =0x0044 */ + ldr r1, =0x0002 /* EMR(1) set reduced strength */ + strh r1, [r0, #DDR2C_DRIC2] + ldr r1, =0xc001 + strh r1, [r0, #DDR2C_DRIC] + + ldr r1, =0x0032 /* Set BT, AL, CL, BL */ + strh r1, [r0, #DDR2C_DRCM] + + ldr r1, =0x3418 /* Set tRCD, tRAS, tRP, tRC */ + strh r1, [r0, #DDR2C_DRCST1] + + /* ldr r1, =0x2e22 */ /* Set tRFC, tRRD, tWR */ + ldr r1, =0x6e32 + strh r1, [r0, #DDR2C_DRCST2] + + /* ldr r1, =0x0051 */ /* Set CNTL, REF_CNT*/ + ldr r1, =0x0141 /* (changed) */ + strh r1, [r0, #DDR2C_DRCR] + + ldr r1, =0x0002 /* Set Address FIFO (8 steps) */ + strh r1, [r0, #DDR2C_DRCF] + + ldr r1, =0x0001 /* Enable AXI Cache */ + strh r1, [r0, #DDR2C_DRASR] + + /* + * (11) ODT setting + */ + ldr r1, =0x0001 + strh r1, [r0, #DDR2C_DROBS] + ldr r1, =0x0103 /* ODT auto adjustment on */ + strh r1, [r0, #DDR2C_DROABA] + ldr r1, =0x003F /* Set ODT to on 50/100 Ohm */ + strh r1, [r0, #DDR2C_DRIBSODT1] + + /* + * (12) Shift to ODTCONT ON (SDRAM side) and DDR2C usual operation mode + */ + ldr r1, =0x0001 + strh r1, [r0, #DDR2C_DROS] + ldr r1, =0x4000 + strh r1, [r0, #DDR2C_DRIC] + + mov pc, lr + diff --git a/include/configs/jadecpu.h b/include/configs/jadecpu.h new file mode 100644 index 0000000..5a19abf --- /dev/null +++ b/include/configs/jadecpu.h @@ -0,0 +1,187 @@ +/* + * (C) Copyright 2007-2008 + * Matthias Weisser <matthias.weisser@graf-syteco.de> + * + * Configuation settings for the AT91SAM9260EK & AT91SAM9G20EK boards. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#define CONFIG_JADE +#define CONFIG_JADE_IOCLK (41164767) +#define CONFIG_SYS_HZ (CONFIG_JADE_IOCLK / 16) +#define CONFIG_SYS_TIMERBASE 0xfffe0000 + +#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ +#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ + +#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ +#define CONFIG_SETUP_MEMORY_TAGS 1 +#define CONFIG_INITRD_TAG 1 +#define BOARD_LATE_INIT 1 + +/* + * Hardware drivers + */ + +/* + * Serial + */ +#define CONFIG_SERIAL_MULTI +#define CONFIG_SYS_NS16550 +#define CONFIG_SYS_NS16550_SERIAL +#define CONFIG_SYS_NS16550_REG_SIZE (-4) +#define CONFIG_SYS_NS16550_CLK CONFIG_JADE_IOCLK +#define CONFIG_SYS_NS16550_COM1 0xfffe1000 /* UART 0 */ +#define CONFIG_SYS_NS16550_COM2 0xfff50000 /* UART 2 (SP) */ +#define CONFIG_SYS_NS16550_COM3 0xfff51000 /* UART 3 */ +#define CONFIG_SYS_NS16550_COM4 0xfff43000 /* UART 4 */ + +#define CONFIG_CONS_INDEX 4 + +/* + * Ethernet + */ +#define CONFIG_NET_MULTI +#define CONFIG_SMC911X +#define CONFIG_SMC911X_BASE 0x02000000 +#define CONFIG_SMC911X_16_BIT + +/* + * Video + */ +#define CONFIG_VIDEO +#define CONFIG_VIDEO_JADEGDC +#define CONFIG_SYS_WHITE_ON_BLACK +#define CONFIG_CFB_CONSOLE +#define CONFIG_SYS_CONSOLE_IS_IN_ENV +#define CONFIG_SYS_CONSOLE_ENV_OVERWRITE +#define CONFIG_VIDEO_LOGO +#define CONFIG_SPLASH_SCREEN +#define CONFIG_SPLASH_SCREEN_ALIGN +#define CONFIG_VIDEO_BMP_LOGO +#define CONFIG_VIDEO_BMP_GZIP +#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (800*480 + 256*4 + 10*1024) +#define VIDEO_KBD_INIT_FCT 0 +#define VIDEO_TSTC_FCT serial_tstc +#define VIDEO_GETC_FCT serial_getc + +/* + * BOOTP options + */ +#define CONFIG_BOOTP_BOOTFILESIZE 1 +#define CONFIG_BOOTP_BOOTPATH 1 +#define CONFIG_BOOTP_GATEWAY 1 +#define CONFIG_BOOTP_HOSTNAME 1 + +/* + * Command line configuration. + */ +#include <config_cmd_default.h> +#undef CONFIG_CMD_BDI +#undef CONFIG_CMD_FPGA +#undef CONFIG_CMD_IMI +#undef CONFIG_CMD_IMLS +#undef CONFIG_CMD_LOADS +#undef CONFIG_CMD_SOURCE +#undef CONFIG_CMD_NFS +#undef CONFIG_CMD_XIMG + +#define CONFIG_CMD_IMI 1 +#define CONFIG_CMD_ELF 1 +#define CONFIG_CMD_PING 1 +#define CONFIG_CMD_DHCP 1 +#define CONFIG_CMD_BMP 1 +#define CONFIG_CMD_USB 1 +#define CONFIG_CMD_FAT 1 +#define CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " + +/* USB */ +#define CONFIG_USB_OHCI_NEW +#define CONFIG_SYS_USB_OHCI_REGS_BASE 0xFFF81000 +#define CONFIG_SYS_USB_OHCI_SLOT_NAME "jadeusb" +#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 +#define CONFIG_USB_STORAGE +#define CONFIG_DOS_PARTITION + +/* SDRAM */ +#define CONFIG_NR_DRAM_BANKS 1 +#define PHYS_SDRAM 0x40000000 /* Start address of DDRRAM */ +#define PHYS_SDRAM_SIZE 0x08000000 /* 128 megs */ + +/* + * FLASH and environment organization + */ +#define CONFIG_SYS_FLASH_BASE 0x10000000 +#define CONFIG_SYS_MAX_FLASH_BANKS 1 +#define CONFIG_SYS_MAX_FLASH_SECT 256 +#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE + +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + 0x00040000) +#define CONFIG_ENV_IS_IN_FLASH 1 +#define CONFIG_ENV_SECT_SIZE (128 * 1024) +#define CONFIG_ENV_SIZE (128 * 1024) + +/* + * CFI FLASH driver setup + */ +#define CONFIG_SYS_FLASH_CFI 1 +#define CONFIG_FLASH_CFI_DRIVER 1 +#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 /* ~10x faster */ + +#define CONFIG_SYS_LOAD_ADDR 0x40000000 /* load address */ + +#define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM + (512*1024)) +#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM + PHYS_SDRAM_SIZE) + +#define CONFIG_BAUDRATE 115200 +#define CONFIG_SYS_BAUDRATE_TABLE {115200, 19200, 38400, 57600, 9600 } + +#define CONFIG_SYS_PROMPT "jade> " +#define CONFIG_SYS_CBSIZE 256 +#define CONFIG_SYS_MAXARGS 16 +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) \ + + 16) +#define CONFIG_SYS_LONGHELP 1 +#define CONFIG_CMDLINE_EDITING 1 + +#define CONFIG_BOOTDELAY 2 +#define CONFIG_AUTOBOOT_KEYED +#define CONFIG_AUTOBOOT_PROMPT "autoboot in %d seconds\n", bootdelay +#define CONFIG_AUTOBOOT_DELAY_STR "delaygs" +#define CONFIG_AUTOBOOT_STOP_STR "stopgs" + +/* + * Size of malloc() pool + */ +#define CONFIG_SYS_MALLOC_LEN (0x400000 - 0x8000) +#define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */ + +#define CONFIG_STACKSIZE (32*1024) /* regular stack */ + +#ifdef CONFIG_USE_IRQ +#error CONFIG_USE_IRQ not supported +#endif + +#endif /* __CONFIG_H */ + -- 1.5.6.3 ^ permalink raw reply related [flat|nested] 23+ messages in thread
* [U-Boot] [PATCH] Add support for jadecpu board 2010-01-11 17:18 ` [U-Boot] [PATCH] Add support for jadecpu board Matthias Weisser @ 2010-01-16 19:18 ` Tom 2010-01-16 20:11 ` Wolfgang Denk 2010-01-18 7:54 ` [U-Boot] " Matthias Weißer 0 siblings, 2 replies; 23+ messages in thread From: Tom @ 2010-01-16 19:18 UTC (permalink / raw) To: u-boot Matthias Weisser wrote: > Signed-off-by: Matthias Weisser <matthias.weisser@graf-syteco.de> > --- > MAINTAINERS | 4 + > MAKEALL | 1 + <snip> > index ed6156f..98c147d 100644 > --- a/Makefile > +++ b/Makefile > @@ -2874,6 +2874,13 @@ TNY_A9260_config : unconfig > @echo "#define CONFIG_$(@:_config=) 1" >$(obj)include/config.h > @$(MKCONFIG) -a tny_a9260 arm arm926ejs tny_a9260 calao at91 > > +######################################################################### > +## ARM926EJ-S Systems > +######################################################################### > + Change to 'Syteco ARM926EJ-S Systems' > +jadecpu_config : unconfig > + @$(MKCONFIG) $(@:_config=) arm arm926ejs jadecpu syteco jade > + > ######################################################################## > ## ARM Integrator boards - see doc/README-integrator for more info. > integratorap_config \ <snip> > + */ > + > +#include <common.h> > +#include <netdev.h> > +#include <asm/io.h> > +#include <asm/arch/jade.h> > + > +DECLARE_GLOBAL_DATA_PTR; > + > +#if defined(CONFIG_SHOW_BOOT_PROGRESS) > +void show_boot_progress(int progress) > +{ > + printf("Boot reached stage %d\n", progress); > +} > +#endif > + > +/* > + * Miscellaneous platform dependent initialisations > + */ > +int board_init(void) > +{ board_init should fill out entries in struct global_data. See other board like lopgicpd/zoom1 as an example. Make sure to include the machine id. > + struct jade_ccnt * ccnt = (struct jade_ccnt *)JADE_CCNT_PHYS_BASE; > + > + /* We select mode 0 for group 2 and mode 1 for group 4 */ > + writel(0x00000010, &ccnt->cmux_md); > + > + gd->flags = 0; > + > + icache_enable(); > + > + return 0; > +} > + > +int board_late_init(void) > +{ > + struct jade_gpio *gpio = (struct jade_gpio *)JADE_GPIO_PHYS_BASE; > + struct jade_pwm *pwm; > + uint32_t in_word; > + const char *e; > + const char *s; > + > + /* Check if we have valid display settings and turn on power if so*/ ws Add as space between 'so*' > + /* Display 0 */ This should be conditional included if the video in included #ifdef CONFIG_VIDEO_JADEGDC .. > + if (getenv("gs_dsp_0_param")) { > + writel(readl(&gpio->gpdr2) | (1 << 3), &gpio->gpdr2); > + > + e = getenv("gs_dsp_0_pwm"); > + if (e != NULL) { > + uint32_t freq, init; > + > + freq = 0; > + init = 0; > + > + s = strchr(e, 'f'); > + if (s != NULL) > + freq = simple_strtol(s + 2, NULL, 0); > + > + s = strchr(e, 'i'); > + if (s != NULL) > + init = simple_strtol(s + 2, NULL, 0); > + > + if (freq > 0) { > + pwm = (struct jade_pwm *)JADE_PWM0_PHYS_BASE; > + > + writel(CONFIG_JADE_IOCLK / 1000 / freq, > + &pwm->bcr); > + writel(1002, &pwm->tpr); > + writel(1, &pwm->pr); > + writel(init * 10 + 1, &pwm->dr); > + writel(1, &pwm->cr); > + writel(1, &pwm->sr); > + } > + } > + } The video patch has logic to fall back reading if (penv == NULL) { penv = getenv("videomode"); if ((i == 1) || (penv == NULL)) Should similar logic be added here ? > + writel(readl(&gpio->gpddr2) | (1 << 3), &gpio->gpddr2); > + > + /* Display 1 */ > + if (getenv("gs_dsp_1_param")) { > + writel(readl(&gpio->gpdr2) | (1 << 4), &gpio->gpdr2); > + > + e = getenv("gs_dsp_1_pwm"); > + if (e != NULL) { > + uint32_t freq, init; > + > + freq = 0; > + init = 0; > + > + s = strchr(e, 'f'); > + if (s != NULL) > + freq = simple_strtol(s + 2, NULL, 0); > + > + s = strchr(e, 'i'); > + if (s != NULL) > + init = simple_strtol(s + 2, NULL, 0); > + > + if (freq > 0) { > + pwm = (struct jade_pwm *)JADE_PWM1_PHYS_BASE; > + > + writel(CONFIG_JADE_IOCLK / 1000 / freq, > + &pwm->bcr); > + writel(1002, &pwm->tpr); > + writel(1, &pwm->pr); > + writel(init * 10 + 1, &pwm->dr); > + writel(1, &pwm->cr); > + writel(1, &pwm->sr); > + } > + } > + } > + writel(readl(&gpio->gpddr2) | (1 << 4), &gpio->gpddr2); > + > + /* 5V enable */ > + writel(readl(&gpio->gpddr1) | (1 << 5), &gpio->gpddr1); > + writel(readl(&gpio->gpdr1) & ~(1 << 5), &gpio->gpdr1); > + > + /* We have special boot options if told by GPIOs */ > + in_word = readl(&gpio->gpdr1); > + > + if ((in_word & 0xC0) == 0xC0) { > + setenv("stdin", "eserial0"); > + setenv("stdout", "eserial0"); > + setenv("stderr", "eserial0"); > + setenv("bootdelay", "10"); > + } else if ((in_word & 0xC0) != 0) { > + setenv("stdout", "vga"); > + setenv("bootcmd", "mw.l 0x40000000 0 1024; usb start;" > + "fatls usb 0; fatload usb 0 0x40000000 mcq5resq.bin;" > + "bootelf 0x40000000; bootelf 0x10080000"); > + setenv("bootdelay", "5"); > + } else{ ws space between 'else{' > + setenv("stdin", "serial"); > + setenv("stdout", "serial"); > + setenv("stderr", "serial"); > + if (getenv("gs_devel")) > + setenv("bootdelay", "5"); > + else > + setenv("bootdelay", "0"); > + } > + > + return 0; > +} > + > +int misc_init_r(void) > +{ > + setenv("verify", "n"); This should be added to the list of #define CONFIG_EXTRA_ENV_SETTINGS set the the board config file. > + return 0; > +} > + > +/* > + * DRAM configuration > + */ > +int dram_init(void) > +{ > + gd->bd->bi_dram[0].start = PHYS_SDRAM; > + gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE; > + > + return 0; > +} > + > +int board_eth_init(bd_t *bis) > +{ > + int rc = 0; > +#ifdef CONFIG_SMC911X > + rc = smc911x_initialize(0, CONFIG_SMC911X_BASE); > +#endif > + return rc; > +} > + > diff --git a/board/syteco/jadecpu/lowlevel_init.S b/board/syteco/jadecpu/lowlevel_init.S > new file mode 100644 > index 0000000..73550c9 > --- /dev/null > +++ b/board/syteco/jadecpu/lowlevel_init.S > @@ -0,0 +1,279 @@ > +/* > + * Board specific setup info > + * > + * (C) Copyright 2007, mycable GmbH > + * Carsten Schneider <cs@mycable.de>, Alexander Bigga <ab@mycable.de> > + * > + * (C) Copyright 2007, mycable GmbH > + * Carsten Schneider <cs@mycable.de>, Alexander Bigga <ab@mycable.de> > + * > + * (C) Copyright 2003, ARM Ltd. > + * Philippe Robin, <philippe.robin@arm.com> > + * > + * See file CREDITS for list of people who contributed to this > + * project. > + * > + * This program is free software/* you can redistribute it and/or ws remove '/*' > + * modify it under the terms of the GNU General Public License as > + * published by the Free Software Foundation/* either version 2 of ws remove '/*' > + * the License, or (at your option) any later version. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY/* without even the implied warranty of ws remove '/*' > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * You should have received a copy of the GNU General Public License > + * along with this program/* if not, write to the Free Software here too.. > + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, > + * MA 02111-1307 USA > + */ > + > +#include <config.h> > +#include <version.h> > +#include <asm/macro.h> > +#include <asm/arch/jade.h> > + > +/* Set up the platform, once the cpu has been initialized */ > +.globl lowlevel_init > +lowlevel_init: > +/* > + * Initialize Clock Reset Generator (CRG) > + */ > + > + ldr r0, =JADE_CRG_PHYS_BASE > + > + /* Not change the initial value that is set by external pin.*/ > +1: ldr r2, [r0, #CRG_CRPR] /* Wait for PLLREADY */ Use a better label that '1:' > + tst r2, #0x00000100 > + beq 1b > + > + /* Set clock gate control */ > + ldr r1, =0x0000ffff /* Open */ > + str r1, [r0, #CRG_CRHA] /* CRHA: AHB clock */ > + ldr r1, =0x0000ffff /* Open */ > + str r1, [r0, #CRG_CRPA] /* CRPA: APB-A clock */ > + ldr r1, =0xfffffffe /* Close */ > + str r1, [r0, #CRG_CRPB] /* CRPA: APB-B clock */ > + ldr r1, =0x0000ffff /* Open */ > + str r1, [r0, #CRG_CRHB] /* CRHB: ExtAHB clock */ > + ldr r1, =0xffffffef /* Open ARM926EJ-S only */ > + str r1, [r0, #CRG_CRAM] /* CRAM: ARM core clock */ > + > +/* > + * Initialize External Bus Interface > + */ > + > + ldr r0, =JADE_MEMC_PHYS_BASE > + > + /* > + * SRAM/flash _mode_ registers (XCS4 is set by external pin) > + * XCS0: Ethernet Controller > + * XCS2: not used (?) > + * XCS4: Flash > + */ > + ldr r1, =0x00000001 /* XCS0: 16bit */ > + str r1, [r0, #0x00] > + ldr r1, =0x00000001 /* XCS2: 16bit */ > + str r1, [r0, #0x08] > + ldr r1, =0x00000021 /* XCS4: 16bit, */ > + str r1, [r0, #0x10] > + > + /* SRAM/flash _timing_ registers (HCLK=83.3/80MHz) */ > + ldr r1, =0x03061008 /* XCS0: FPGA*/ > + str r1, [r0, #0x20] > + ldr r1, =0x03061008 /* XCS2: Ethernet */ > + str r1, [r0, #0x28] > + ldr r1, =0x03061804 /* XCS4: FLASH ROM */ > + str r1, [r0, #0x30] > + > + /* SRAM/flash _area_ registers (address of XCS4 is set by hardware) */ > + ldr r1, =0x000000c0 /* XCS0: 0x0c000000/1MB */ > + str r1, [r0, #0x40] > + ldr r1, =0x00000020 /* XCS2: 0x02000000/1MB */ > + str r1, [r0, #0x48] > + ldr r1, =0x001f0000 /* XCS4: 32 MB */ > + str r1, [r0, #0x50] > + > +/* > + * Initialize DDR2 Controller > + */ > + > + /* Wait for PLL LOCK up time or more */ > + wait_timer 20 > + > + /* > + * (2) Initialize DDRIF > + */ > + ldr r0, =JADE_DDR2C_PHYS_BASE > + ldr r1, =0x5555 > + strh r1, [r0, #DDR2C_DRIMS] > + > + /* > + * (3) Wait for 20MCKPs(120nsec) or more > + */ > + wait_timer 20 > + > + /* > + * (4) IRESET/IUSRRST release > + /* This looks like a programming error /* -> */ ? > + ldr r0, =JADE_CCNT_PHYS_BASE > + ldr r1, =0x00000002 > + str r1, [r0, #CCNT_CDCRC] > + <snip> > + ldr r1, =0x0005 /* EMR(1) command */ > + strh r1, [r0, #DDR2C_DRIC1] > + ldr r1, =0x0380 /* Extended Mode Register 1 set OCD */ > + strh r1, [r0, #DDR2C_DRIC2] > + ldr r1, =0xc001 > + strh r1, [r0, #DDR2C_DRIC] > + > + ldr r1, =0x0005 /* EMR(1) command */ > + strh r1, [r0, #DDR2C_DRIC1] > + /* ldr r1, =0x0044 */ Do not include commented out code. Remove or add appropriate if-def > + ldr r1, =0x0002 /* EMR(1) set reduced strength */ > + strh r1, [r0, #DDR2C_DRIC2] > + ldr r1, =0xc001 > + strh r1, [r0, #DDR2C_DRIC] > + > + ldr r1, =0x0032 /* Set BT, AL, CL, BL */ > + strh r1, [r0, #DDR2C_DRCM] > + > + ldr r1, =0x3418 /* Set tRCD, tRAS, tRP, tRC */ > + strh r1, [r0, #DDR2C_DRCST1] > + > + /* ldr r1, =0x2e22 */ /* Set tRFC, tRRD, tWR */ Same here.. > + ldr r1, =0x6e32 > + strh r1, [r0, #DDR2C_DRCST2] > + > + /* ldr r1, =0x0051 */ /* Set CNTL, REF_CNT*/ and here.. > + ldr r1, =0x0141 /* (changed) */ > + strh r1, [r0, #DDR2C_DRCR] > + > + ldr r1, =0x0002 /* Set Address FIFO (8 steps) */ > + strh r1, [r0, #DDR2C_DRCF] > + > + ldr r1, =0x0001 /* Enable AXI Cache */ > + strh r1, [r0, #DDR2C_DRASR] > + > + /* > + * (11) ODT setting > + */ > + ldr r1, =0x0001 > + strh r1, [r0, #DDR2C_DROBS] > + ldr r1, =0x0103 /* ODT auto adjustment on */ > + strh r1, [r0, #DDR2C_DROABA] > + ldr r1, =0x003F /* Set ODT to on 50/100 Ohm */ > + strh r1, [r0, #DDR2C_DRIBSODT1] > + > + /* > + * (12) Shift to ODTCONT ON (SDRAM side) and DDR2C usual operation mode > + */ > + ldr r1, =0x0001 > + strh r1, [r0, #DDR2C_DROS] > + ldr r1, =0x4000 > + strh r1, [r0, #DDR2C_DRIC] > + > + mov pc, lr > + > diff --git a/include/configs/jadecpu.h b/include/configs/jadecpu.h > new file mode 100644 > index 0000000..5a19abf > --- /dev/null > +++ b/include/configs/jadecpu.h > @@ -0,0 +1,187 @@ > +/* > + * (C) Copyright 2007-2008 > + * Matthias Weisser <matthias.weisser@graf-syteco.de> > + * > + * Configuation settings for the AT91SAM9260EK & AT91SAM9G20EK boards. > + * > + * See file CREDITS for list of people who contributed to this > + * project. > + * > + * This program is free software; you can redistribute it and/or > + * modify it under the terms of the GNU General Public License as > + * published by the Free Software Foundation; either version 2 of > + * the License, or (at your option) any later version. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + * > + * You should have received a copy of the GNU General Public License > + * along with this program; if not, write to the Free Software > + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, > + * MA 02111-1307 USA > + */ > + > +#ifndef __CONFIG_H > +#define __CONFIG_H > + > +#define CONFIG_JADE The board and cpu defines go first move the device configs to later > +#define CONFIG_JADE_IOCLK (41164767) This is a strange number. please add a comment. > +#define CONFIG_SYS_HZ (CONFIG_JADE_IOCLK / 16) > +#define CONFIG_SYS_TIMERBASE 0xfffe0000 > + > +#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */ > +#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */ > + > +#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ > +#define CONFIG_SETUP_MEMORY_TAGS 1 > +#define CONFIG_INITRD_TAG 1 > +#define BOARD_LATE_INIT 1 > + > +/* > + * Hardware drivers > + */ > + > +/* > + * Serial > + */ > +#define CONFIG_SERIAL_MULTI > +#define CONFIG_SYS_NS16550 > +#define CONFIG_SYS_NS16550_SERIAL > +#define CONFIG_SYS_NS16550_REG_SIZE (-4) > +#define CONFIG_SYS_NS16550_CLK CONFIG_JADE_IOCLK > +#define CONFIG_SYS_NS16550_COM1 0xfffe1000 /* UART 0 */ > +#define CONFIG_SYS_NS16550_COM2 0xfff50000 /* UART 2 (SP) */ > +#define CONFIG_SYS_NS16550_COM3 0xfff51000 /* UART 3 */ > +#define CONFIG_SYS_NS16550_COM4 0xfff43000 /* UART 4 */ > + > +#define CONFIG_CONS_INDEX 4 > + > +/* > + * Ethernet > + */ > +#define CONFIG_NET_MULTI > +#define CONFIG_SMC911X > +#define CONFIG_SMC911X_BASE 0x02000000 > +#define CONFIG_SMC911X_16_BIT > + > +/* > + * Video This should be conditional on CONFIG_VIDEO_JADEDC > + */ > +#define CONFIG_VIDEO > +#define CONFIG_VIDEO_JADEGDC > +#define CONFIG_SYS_WHITE_ON_BLACK > +#define CONFIG_CFB_CONSOLE > +#define CONFIG_SYS_CONSOLE_IS_IN_ENV > +#define CONFIG_SYS_CONSOLE_ENV_OVERWRITE > +#define CONFIG_VIDEO_LOGO > +#define CONFIG_SPLASH_SCREEN > +#define CONFIG_SPLASH_SCREEN_ALIGN > +#define CONFIG_VIDEO_BMP_LOGO > +#define CONFIG_VIDEO_BMP_GZIP > +#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (800*480 + 256*4 + 10*1024) > +#define VIDEO_KBD_INIT_FCT 0 > +#define VIDEO_TSTC_FCT serial_tstc > +#define VIDEO_GETC_FCT serial_getc > + > +/* > + * BOOTP options > + */ > +#define CONFIG_BOOTP_BOOTFILESIZE 1 > +#define CONFIG_BOOTP_BOOTPATH 1 > +#define CONFIG_BOOTP_GATEWAY 1 > +#define CONFIG_BOOTP_HOSTNAME 1 > + > +/* > + * Command line configuration. > + */ > +#include <config_cmd_default.h> > +#undef CONFIG_CMD_BDI > +#undef CONFIG_CMD_FPGA > +#undef CONFIG_CMD_IMI > +#undef CONFIG_CMD_IMLS > +#undef CONFIG_CMD_LOADS > +#undef CONFIG_CMD_SOURCE > +#undef CONFIG_CMD_NFS > +#undef CONFIG_CMD_XIMG > + > +#define CONFIG_CMD_IMI 1 > +#define CONFIG_CMD_ELF 1 > +#define CONFIG_CMD_PING 1 > +#define CONFIG_CMD_DHCP 1 > +#define CONFIG_CMD_BMP 1 > +#define CONFIG_CMD_USB 1 > +#define CONFIG_CMD_FAT 1 > +#define CONFIG_SYS_HUSH_PARSER > +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " > + > +/* USB */ > +#define CONFIG_USB_OHCI_NEW > +#define CONFIG_SYS_USB_OHCI_REGS_BASE 0xFFF81000 > +#define CONFIG_SYS_USB_OHCI_SLOT_NAME "jadeusb" > +#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 ws convert spaces in the last 3 lines to tabs Tom ^ permalink raw reply [flat|nested] 23+ messages in thread
* [U-Boot] [PATCH] Add support for jadecpu board 2010-01-16 19:18 ` Tom @ 2010-01-16 20:11 ` Wolfgang Denk 2010-01-18 7:05 ` [U-Boot] Antw: " Matthias Weisser 2010-01-18 7:54 ` [U-Boot] " Matthias Weißer 1 sibling, 1 reply; 23+ messages in thread From: Wolfgang Denk @ 2010-01-16 20:11 UTC (permalink / raw) To: u-boot Dear Matthias Weisser, In message <4B5210EA.8000503@windriver.com> Tom Rix wrote: > > > index ed6156f..98c147d 100644 > > --- a/Makefile > > +++ b/Makefile > > @@ -2874,6 +2874,13 @@ TNY_A9260_config : unconfig > > @echo "#define CONFIG_$(@:_config=) 1" >$(obj)include/config.h > > @$(MKCONFIG) -a tny_a9260 arm arm926ejs tny_a9260 calao at91 > > > > +######################################################################### > > +## ARM926EJ-S Systems > > +######################################################################### > > + > > Change to 'Syteco ARM926EJ-S Systems' NAK. Please remove this header completely. We don't add so much comments for a single board. > > +jadecpu_config : unconfig > > + @$(MKCONFIG) $(@:_config=) arm arm926ejs jadecpu syteco jade Also note that lists are sorted, so please move this entry to where it belongs. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de Youth doesn't excuse everything. -- Dr. Janice Lester (in Kirk's body), "Turnabout Intruder", stardate 5928.5. ^ permalink raw reply [flat|nested] 23+ messages in thread
* [U-Boot] Antw: Re: [PATCH] Add support for jadecpu board 2010-01-16 20:11 ` Wolfgang Denk @ 2010-01-18 7:05 ` Matthias Weisser 2010-01-18 7:57 ` Wolfgang Denk 0 siblings, 1 reply; 23+ messages in thread From: Matthias Weisser @ 2010-01-18 7:05 UTC (permalink / raw) To: u-boot Hello Wolfgang >>> Wolfgang Denk <wd@denx.de> schrieb am 16.01.2010 um 21:11: > Dear Matthias Weisser, > > In message <4B5210EA.8000503@windriver.com> Tom Rix wrote: >> >> > index ed6156f..98c147d 100644 >> > --- a/Makefile >> > +++ b/Makefile >> > @@ -2874,6 +2874,13 @@ TNY_A9260_config : unconfig >> > @echo "#define CONFIG_$(@:_config=) 1" >$(obj)include/config.h >> > @$(MKCONFIG) -a tny_a9260 arm arm926ejs tny_a9260 calao at91 >> > >> > +######################################################################### >> > +## ARM926EJ-S Systems >> > +######################################################################### >> > + >> >> Change to 'Syteco ARM926EJ-S Systems' > > NAK. > > Please remove this header completely. We don't add so much comments > for a single board. >> > +jadecpu_config : unconfig >> > + @$(MKCONFIG) $(@:_config=) arm arm926ejs jadecpu syteco jade > > Also note that lists are sorted, so please move this entry to where it > belongs. Can you tell me where it belongs to then? In the ARM section of the makefile we have * StrongARM * ARM92xT * two Atmel related sections * ARM integrator boards * ARM supplied versatile development boards * S3C44B0 (Samsung) * ARM720T * ARM Cortex * XScale * ARM1136 * ARM1176 My board doesn't match any of the above categories so I thought introducing a new category for generic ARM926EJS devices would be a good idea. Regards, Matthias ------------------------------------ Amtsgericht Freiburg HRA 602707 Ust. ID-Nr.: DE232464428 Gesch?ftsf?hrer: Dipl. Ing. (FH) Martin Graf Dipl. Ing. (FH) David Graf Dipl. Inf. Fabian Graf Komplement?rin: GRAF-SYTECO Verwaltungs-GmbH Amtsgericht Freiburg HRB 602868 ------------------------------------ ^ permalink raw reply [flat|nested] 23+ messages in thread
* [U-Boot] Antw: Re: [PATCH] Add support for jadecpu board 2010-01-18 7:05 ` [U-Boot] Antw: " Matthias Weisser @ 2010-01-18 7:57 ` Wolfgang Denk 2010-01-18 8:21 ` Matthias Weißer 0 siblings, 1 reply; 23+ messages in thread From: Wolfgang Denk @ 2010-01-18 7:57 UTC (permalink / raw) To: u-boot Dear "Matthias Weisser", In message <4B541652.2E8A.0063.0@graf-syteco.de> you wrote: > > >> > --- a/Makefile > >> > +++ b/Makefile > >> > @@ -2874,6 +2874,13 @@ TNY_A9260_config : unconfig > >> > @echo "#define CONFIG_$(@:_config=) 1" >$(obj)include/config.h > >> > @$(MKCONFIG) -a tny_a9260 arm arm926ejs tny_a9260 calao at91 > >> > > >> > +######################################################################### > >> > +## ARM926EJ-S Systems > >> > +######################################################################### ... > > Also note that lists are sorted, so please move this entry to where it > > belongs. > > Can you tell me where it belongs to then? In the "ARM926EJ-S Systems" group? > In the ARM section of the makefile we have > * StrongARM > * ARM92xT > * two Atmel related sections > * ARM integrator boards > * ARM supplied versatile development boards > * S3C44B0 (Samsung) > * ARM720T > * ARM Cortex > * XScale > * ARM1136 > * ARM1176 I also see an entry "Atmel ARM926EJ-S Systems" here, which already lists a numnber of arm926ejs boards. > My board doesn't match any of the above categories so I thought > introducing a new category for generic ARM926EJS devices would be > a good idea. Why do you think your board does not fit into the "Atmel ARM926EJ-S Systems" group? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de It is dangerous to be right on a subject on which the established authorities are wrong. -- Voltaire ^ permalink raw reply [flat|nested] 23+ messages in thread
* [U-Boot] Antw: Re: [PATCH] Add support for jadecpu board 2010-01-18 7:57 ` Wolfgang Denk @ 2010-01-18 8:21 ` Matthias Weißer 2010-01-18 8:55 ` Wolfgang Denk 0 siblings, 1 reply; 23+ messages in thread From: Matthias Weißer @ 2010-01-18 8:21 UTC (permalink / raw) To: u-boot Hello Wolfgang Am 18.01.2010 08:57, schrieb Wolfgang Denk: >> My board doesn't match any of the above categories so I thought >> introducing a new category for generic ARM926EJS devices would be >> a good idea. > > Why do you think your board does not fit into the "Atmel ARM926EJ-S > Systems" group? Because the MB86R01 'Jade' is not manufactured by Atmel. And therefore I thought that "Atmel ARM926EJ-S Systems" does not match. Regards, Matthias ^ permalink raw reply [flat|nested] 23+ messages in thread
* [U-Boot] Antw: Re: [PATCH] Add support for jadecpu board 2010-01-18 8:21 ` Matthias Weißer @ 2010-01-18 8:55 ` Wolfgang Denk 0 siblings, 0 replies; 23+ messages in thread From: Wolfgang Denk @ 2010-01-18 8:55 UTC (permalink / raw) To: u-boot Dear =?ISO-8859-1?Q?Matthias_Wei=DFer?=, In message <4B541A25.7060002@arcor.de> you wrote: > Hello Wolfgang > > Am 18.01.2010 08:57, schrieb Wolfgang Denk: > >> My board doesn't match any of the above categories so I thought > >> introducing a new category for generic ARM926EJS devices would be > >> a good idea. > > > > Why do you think your board does not fit into the "Atmel ARM926EJ-S > > Systems" group? > > Because the MB86R01 'Jade' is not manufactured by Atmel. And therefore I > thought that "Atmel ARM926EJ-S Systems" does not match. Feel free to submit a patch to remove the "Atmel" part, then. It probably was added when only Atmel had ARM926EJ-S systems in the field. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de "Never face facts; if you do, you'll never get up in the morning." - Marlo Thomas ^ permalink raw reply [flat|nested] 23+ messages in thread
* [U-Boot] [PATCH] Add support for jadecpu board 2010-01-16 19:18 ` Tom 2010-01-16 20:11 ` Wolfgang Denk @ 2010-01-18 7:54 ` Matthias Weißer 2010-01-18 8:52 ` Wolfgang Denk 1 sibling, 1 reply; 23+ messages in thread From: Matthias Weißer @ 2010-01-18 7:54 UTC (permalink / raw) To: u-boot Hi Tom thanks for your feedback. Am 16.01.2010 20:18, schrieb Tom: >> +/* >> + * Miscellaneous platform dependent initialisations >> + */ >> +int board_init(void) >> +{ > > board_init should fill out entries in > struct global_data. > See other board like lopgicpd/zoom1 as an example. > Make sure to include the machine id. As I don't use Linux on this board I don't have such an id. How to deal with such a situation? Should I get a machine id anyway? And if so can you give me a hint on how I can get such an id? >> + /* >> + * (4) IRESET/IUSRRST release >> + /* > > This looks like a programming error > /* -> */ ? You are right. Thanks for catching this. >> +#define CONFIG_JADE > > The board and cpu defines go first > move the device configs to later Can you please explain what you mean with this comment? >> +#define CONFIG_JADE_IOCLK (41164767) > > This is a strange number. please add a comment. Well, it is the clock frequency of the IO blocks of the SoC. Its 14,31818 MHz * 46 / 16. I added a comment. I have fixed the other stuff you pointed out. Regards, Matthias ^ permalink raw reply [flat|nested] 23+ messages in thread
* [U-Boot] [PATCH] Add support for jadecpu board 2010-01-18 7:54 ` [U-Boot] " Matthias Weißer @ 2010-01-18 8:52 ` Wolfgang Denk 2010-01-18 12:10 ` Matthias Weißer 0 siblings, 1 reply; 23+ messages in thread From: Wolfgang Denk @ 2010-01-18 8:52 UTC (permalink / raw) To: u-boot Dear =?ISO-8859-1?Q?Matthias_Wei=DFer?=, In message <4B5413AC.2000604@arcor.de> you wrote: > > > Make sure to include the machine id. > > As I don't use Linux on this board I don't have such an id. How to deal > with such a situation? Should I get a machine id anyway? And if so can > you give me a hint on how I can get such an id? Yes, you are required to register a machine ID. See http://www.arm.linux.org.uk/developer/machines/?action=new ^ permalink raw reply [flat|nested] 23+ messages in thread
* [U-Boot] [PATCH] Add support for jadecpu board 2010-01-18 8:52 ` Wolfgang Denk @ 2010-01-18 12:10 ` Matthias Weißer 2010-01-18 13:11 ` Tom 2010-01-21 19:52 ` Tom 0 siblings, 2 replies; 23+ messages in thread From: Matthias Weißer @ 2010-01-18 12:10 UTC (permalink / raw) To: u-boot Am 18.01.2010 09:52, schrieb Wolfgang Denk: >> As I don't use Linux on this board I don't have such an id. How to deal >> with such a situation? Should I get a machine id anyway? And if so can >> you give me a hint on how I can get such an id? > > Yes, you are required to register a machine ID. See > http://www.arm.linux.org.uk/developer/machines/?action=new I have registered a machine id now. Should I include the id into my reworked patch set or will that be synced with the linux kernel by one of the u-boot maintainers? I think the latter option has to be done but then my patch will not build until the sync takes place. Regards, Matthias ^ permalink raw reply [flat|nested] 23+ messages in thread
* [U-Boot] [PATCH] Add support for jadecpu board 2010-01-18 12:10 ` Matthias Weißer @ 2010-01-18 13:11 ` Tom 2010-01-21 19:52 ` Tom 1 sibling, 0 replies; 23+ messages in thread From: Tom @ 2010-01-18 13:11 UTC (permalink / raw) To: u-boot Matthias Wei?er wrote: > Am 18.01.2010 09:52, schrieb Wolfgang Denk: >>> As I don't use Linux on this board I don't have such an id. How to deal >>> with such a situation? Should I get a machine id anyway? And if so can >>> you give me a hint on how I can get such an id? >> Yes, you are required to register a machine ID. See >> http://www.arm.linux.org.uk/developer/machines/?action=new > > I have registered a machine id now. Should I include the id into my > reworked patch set or will that be synced with the linux kernel by one > of the u-boot maintainers? I think the latter option has to be done but > then my patch will not build until the sync takes place. > You post a request to u-boot list and cc me. I do the sync-ing. This normally happens once a month or so but I will do it as required. I will take care of this. Tom > Regards, > Matthias > > _______________________________________________ > U-Boot mailing list > U-Boot at lists.denx.de > http://lists.denx.de/mailman/listinfo/u-boot ^ permalink raw reply [flat|nested] 23+ messages in thread
* [U-Boot] [PATCH] Add support for jadecpu board 2010-01-18 12:10 ` Matthias Weißer 2010-01-18 13:11 ` Tom @ 2010-01-21 19:52 ` Tom 1 sibling, 0 replies; 23+ messages in thread From: Tom @ 2010-01-21 19:52 UTC (permalink / raw) To: u-boot I have updated the mach-types.h You can get this by sync-ing with u-boot-arm/master. Tom Matthias Wei?er wrote: > Am 18.01.2010 09:52, schrieb Wolfgang Denk: >>> As I don't use Linux on this board I don't have such an id. How to deal >>> with such a situation? Should I get a machine id anyway? And if so can >>> you give me a hint on how I can get such an id? >> Yes, you are required to register a machine ID. See >> http://www.arm.linux.org.uk/developer/machines/?action=new > > I have registered a machine id now. Should I include the id into my > reworked patch set or will that be synced with the linux kernel by one > of the u-boot maintainers? I think the latter option has to be done but > then my patch will not build until the sync takes place. > > Regards, > Matthias > > _______________________________________________ > U-Boot mailing list > U-Boot at lists.denx.de > http://lists.denx.de/mailman/listinfo/u-boot ^ permalink raw reply [flat|nested] 23+ messages in thread
* [U-Boot] [PATCH] Adding new vendor logo 2010-01-11 17:18 ` [U-Boot] [PATCH] Adding new vendor logo Matthias Weisser 2010-01-11 17:18 ` [U-Boot] [PATCH] Add support for jadecpu board Matthias Weisser @ 2010-01-16 16:43 ` Tom 2010-01-18 13:55 ` Matthias Weißer 1 sibling, 1 reply; 23+ messages in thread From: Tom @ 2010-01-16 16:43 UTC (permalink / raw) To: u-boot Matthias Weisser wrote: > Signed-off-by: Matthias Weisser <matthias.weisser@graf-syteco.de> > --- > tools/Makefile | 3 +++ > tools/logos/syteco.bmp | Bin 0 -> 12278 bytes > 2 files changed, 3 insertions(+), 0 deletions(-) > create mode 100644 tools/logos/syteco.bmp > > diff --git a/tools/Makefile b/tools/Makefile > index 5b8c3c3..702bb83 100644 > --- a/tools/Makefile > +++ b/tools/Makefile > @@ -105,6 +105,9 @@ endif > ifeq ($(VENDOR),ronetix) > LOGO_BMP= logos/ronetix.bmp > endif > +ifeq ($(VENDOR),syteco) > +LOGO_BMP= logos/syteco.bmp > +endif The grey S in the middle looks a bit lighter that what is on the website http://www.graf-syteco.de/html/deutsch/bediengerate.html How the bmp is included looks fine. Tom > > # now $(obj) is defined > HOSTSRCS += $(addprefix $(SRCTREE)/,$(EXT_OBJ_FILES-y:.o=.c)) > diff --git a/tools/logos/syteco.bmp b/tools/logos/syteco.bmp > new file mode 100644 > index 0000000000000000000000000000000000000000..141ee8e10edd85caa52b9501e3a4381b81fe772d > GIT binary patch > literal 12278 > zcmeI0TdvbE5Qg2PNJwmiH{MtP??`Ncopb>#s;lC)jN^<mx5VSvEtQTf72hWQzx=+$ > zhaW%xehW+behuL(l>Wf)7yK^a^U at yw`TZsRu;KA|g!}yt)yLX&3%A>CEstzCFdP^T > zd`t(f&J=<Se1cz6Vz2%xn8}kC7#8>(XPCrZWxxz)aQVUR*)s#%*H9UWBXrEA1QO&t > zYstvm(XSvSGDIqb%bIEx at j1x-j~>EAlo=D;a@~oAc7b6ib0rJDLd at MXyUuWw7M5lh > zfih3b_~Yq<Q0mM4sm&RQGEdX7KJAq(ZPTPs8d(~qNu#u~oQ5$_npsY+84IPE<=mPv > zQ97`kn5KBBu^pKzRr at FeV}ujV0E-%key8+JPwjR%PSg-fL+v?Zuuzm~N*8k07B$EL > zgOci{u%n!(&w*xPvQV*M3>M{ZnIT6kFp5Q@?7&zo5+*A-3K2%KXp{&O|B7Qh)*L|? > zpC$*w76J<5c_x at E8fJ%u!)!vHl9NR{v&%xA@eq(0pD%ivp1}fG^iANr-ANEg*UW!q > z5!3Wi7BY`!(b&_ei5$V^gNKdw934IaoiAk}Vud1NtB)*p`12iK3IL=Vr3MQz1&YHL > z?g!T5(G$}<te52r@ir{UnfLG|IrA<o(V5;X`SwN+d0eDBdHS-))l0rbu^5}`5<7SE > zRg$sjdj!8hEd8L`mjx~<>uXXIGz-iLz0M#^oeMge`4T14zy+4)zzCKVrZ7jqYdS;U > zK)-geMY1HAGK&er_EJ$=1t^vU#=&C1z*A)XDyd=veR|!7ux30g3PzkUMQIhlSTc-@ > zMZgG@*7F4qsH=~K!AO*L798Qkj$n(W{oIW!FU?{FOAaOLb{j}7ih~CEHp_s~Z*R(> > z0tFpD&{ka*OeKq?NOh&;XfR-ESl~bKOcsZ-5uyjHVwp at 9L&w#mVCq;V!xxvX86;tv > zS at 1$`sudaqOe;&gcN7#4x;acE%W?(k1=GfoP<lDj#DXX-Fy!*w!m^>X!E6i4`vtgM > zK%4GqiqZ>a!!mBRTo7yU$TR*rpd^+A%JbZc6eD%0s`up(SQ{|tgv^IC(h;nGKxaB^ > J$T5U;;2&8xIXwUX > > literal 0 > HcmV?d00001 > ^ permalink raw reply [flat|nested] 23+ messages in thread
* [U-Boot] [PATCH] Adding new vendor logo 2010-01-16 16:43 ` [U-Boot] [PATCH] Adding new vendor logo Tom @ 2010-01-18 13:55 ` Matthias Weißer 0 siblings, 0 replies; 23+ messages in thread From: Matthias Weißer @ 2010-01-18 13:55 UTC (permalink / raw) To: u-boot Am 16.01.2010 17:43, schrieb Tom: > Matthias Weisser wrote: >> Signed-off-by: Matthias Weisser<matthias.weisser@graf-syteco.de> >> --- >> tools/Makefile | 3 +++ >> tools/logos/syteco.bmp | Bin 0 -> 12278 bytes >> 2 files changed, 3 insertions(+), 0 deletions(-) >> create mode 100644 tools/logos/syteco.bmp >> >> diff --git a/tools/Makefile b/tools/Makefile >> index 5b8c3c3..702bb83 100644 >> --- a/tools/Makefile >> +++ b/tools/Makefile >> @@ -105,6 +105,9 @@ endif >> ifeq ($(VENDOR),ronetix) >> LOGO_BMP= logos/ronetix.bmp >> endif >> +ifeq ($(VENDOR),syteco) >> +LOGO_BMP= logos/syteco.bmp >> +endif > > The grey S in the middle looks a bit lighter that > what is on the website > http://www.graf-syteco.de/html/deutsch/bediengerate.html Thats OK. We use that bitmap since "ever" as logo in our devices and I think I am going to use it in u-boot also. Regards, Matthias ^ permalink raw reply [flat|nested] 23+ messages in thread
* [U-Boot] [PATCH] Add support for Jade display controller 2010-01-11 17:18 ` [U-Boot] [PATCH] Add support for Jade display controller Matthias Weisser 2010-01-11 17:18 ` [U-Boot] [PATCH] Adding new vendor logo Matthias Weisser @ 2010-01-16 16:30 ` Tom 2010-01-18 14:06 ` Matthias Weißer 1 sibling, 1 reply; 23+ messages in thread From: Tom @ 2010-01-16 16:30 UTC (permalink / raw) To: u-boot Matthias Weisser wrote: > Signed-off-by: Matthias Weisser <matthias.weisser@graf-syteco.de> > --- > drivers/video/Makefile | 1 + > drivers/video/cfb_console.c | 2 +- > drivers/video/jadegdc.c | 193 +++++++++++++++++++++++++++++++++++++++++++ > 3 files changed, 195 insertions(+), 1 deletions(-) > create mode 100644 drivers/video/jadegdc.c > > diff --git a/drivers/video/Makefile b/drivers/video/Makefile > index bb6b5a0..aadc149 100644 > --- a/drivers/video/Makefile > +++ b/drivers/video/Makefile > @@ -30,6 +30,7 @@ COBJS-$(CONFIG_ATMEL_LCD) += atmel_lcdfb.o > COBJS-$(CONFIG_CFB_CONSOLE) += cfb_console.o > COBJS-$(CONFIG_S6E63D6) += s6e63d6.o > COBJS-$(CONFIG_VIDEO_CT69000) += ct69000.o > +COBJS-$(CONFIG_VIDEO_JADEGDC) += jadegdc.o > COBJS-$(CONFIG_VIDEO_MB862xx) += mb862xx.o > COBJS-$(CONFIG_VIDEO_MX3) += mx3fb.o > COBJS-$(CONFIG_VIDEO_SED13806) += sed13806.o > diff --git a/drivers/video/cfb_console.c b/drivers/video/cfb_console.c > index c07a26e..506337b 100644 > --- a/drivers/video/cfb_console.c > +++ b/drivers/video/cfb_console.c > @@ -321,7 +321,7 @@ void console_cursor (int state); > #else > #define SWAP16(x) (x) > #define SWAP32(x) (x) > -#if defined(VIDEO_FB_16BPP_WORD_SWAP) > +#if defined(VIDEO_FB_16BPP_WORD_SWAP) || defined(CONFIG_VIDEO_JADEGDC) Instead of adding CONFIG_VIDEO_JADEGDC, define VIDEO_FB_16BPP_WORD_SWAP in your board config file or a more appropriate file. > #define SHORTSWAP32(x) ( ((x) >> 16) | ((x) << 16) ) > #else > #define SHORTSWAP32(x) (x) > diff --git a/drivers/video/jadegdc.c b/drivers/video/jadegdc.c <snip> > + * 4MB (at the end of system RAM) > + */ > +#define VIDEO_MEM_SIZE 0x400000 > + > +/* > + * Graphic Device > + */ > +GraphicDevice jadegdc; It does not look like this global is accessed output of this function It should be declared static. > + > +void *video_hw_init(void) > +{ > + GraphicDevice *pGD = &jadegdc; > + struct ctfb_res_modes var_mode[2]; > + unsigned long *vid; > + unsigned long div; > + unsigned long dspBase[2]; > + char *penv; > + int bpp; > + int i, j; > + > + memset(pGD, 0, sizeof(GraphicDevice)); > + > + dspBase[0] = JADE_GDC_DISP0_PHYS_BASE; > + dspBase[1] = JADE_GDC_DISP1_PHYS_BASE; > + > + pGD->gdfIndex = GDF_15BIT_555RGB; > + pGD->gdfBytesPP = 2; > + > + pGD->memSize = VIDEO_MEM_SIZE; > + pGD->frameAdrs = PHYS_SDRAM + PHYS_SDRAM_SIZE - VIDEO_MEM_SIZE; > + vid = (unsigned long *)pGD->frameAdrs; > + > + for (i = 0; i < 2; i++) { > + char varName[32]; > + u32 dcm1, dcm2, dcm3; > + u16 htp, hdp, hdb, hsp, vtr, vsp, vdp; > + u8 hsw, vsw; > + u32 l2m, l2em, l2oa0, l2da0, l2oa1, l2da1; > + u16 l2dx, l2dy, l2wx, l2wy, l2ww, l2wh; > + > + sprintf(varName, "gs_dsp_%d_param", i); > + > + penv = getenv(varName); > + if (penv == NULL) { > + penv = getenv("videomode"); > + if ((i == 1) || (penv == NULL)) > + continue; This check for (i == 1) should be moved before the getenv > + } > + > + bpp = 0; <snip> > + } > + > + return pGD; > +} > + > +/* > + * Set a RGB color in the LUT > + */ > +void video_set_lut(unsigned int index, unsigned char r, > + unsigned char g, unsigned char b) > +{ If leaving this a noop is intentional, add a comment. Tom ^ permalink raw reply [flat|nested] 23+ messages in thread
* [U-Boot] [PATCH] Add support for Jade display controller 2010-01-16 16:30 ` [U-Boot] [PATCH] Add support for Jade display controller Tom @ 2010-01-18 14:06 ` Matthias Weißer 0 siblings, 0 replies; 23+ messages in thread From: Matthias Weißer @ 2010-01-18 14:06 UTC (permalink / raw) To: u-boot Am 16.01.2010 17:30, schrieb Tom: > Instead of adding CONFIG_VIDEO_JADEGDC, define VIDEO_FB_16BPP_WORD_SWAP > in your board config file or a more appropriate file. Done. >> +/* >> + * Graphic Device >> + */ >> +GraphicDevice jadegdc; > > It does not look like this global is accessed output of this function > It should be declared static. Done. >> + >> +void *video_hw_init(void) >> +{ >> + GraphicDevice *pGD =&jadegdc; >> + struct ctfb_res_modes var_mode[2]; >> + unsigned long *vid; >> + unsigned long div; >> + unsigned long dspBase[2]; >> + char *penv; >> + int bpp; >> + int i, j; >> + >> + memset(pGD, 0, sizeof(GraphicDevice)); >> + >> + dspBase[0] = JADE_GDC_DISP0_PHYS_BASE; >> + dspBase[1] = JADE_GDC_DISP1_PHYS_BASE; >> + >> + pGD->gdfIndex = GDF_15BIT_555RGB; >> + pGD->gdfBytesPP = 2; >> + >> + pGD->memSize = VIDEO_MEM_SIZE; >> + pGD->frameAdrs = PHYS_SDRAM + PHYS_SDRAM_SIZE - VIDEO_MEM_SIZE; >> + vid = (unsigned long *)pGD->frameAdrs; >> + >> + for (i = 0; i< 2; i++) { >> + char varName[32]; >> + u32 dcm1, dcm2, dcm3; >> + u16 htp, hdp, hdb, hsp, vtr, vsp, vdp; >> + u8 hsw, vsw; >> + u32 l2m, l2em, l2oa0, l2da0, l2oa1, l2da1; >> + u16 l2dx, l2dy, l2wx, l2wy, l2ww, l2wh; >> + >> + sprintf(varName, "gs_dsp_%d_param", i); >> + >> + penv = getenv(varName); >> + if (penv == NULL) { >> + penv = getenv("videomode"); >> + if ((i == 1) || (penv == NULL)) >> + continue; > > This check for (i == 1) should be moved before the getenv Done. >> +/* >> + * Set a RGB color in the LUT >> + */ >> +void video_set_lut(unsigned int index, unsigned char r, >> + unsigned char g, unsigned char b) >> +{ > > If leaving this a noop is intentional, add a comment. Done. Thanks for checking. Regards, Matthias ^ permalink raw reply [flat|nested] 23+ messages in thread
* [U-Boot] [PATCH] Add support for MB86R01 from Fujitsu 2010-01-11 17:18 ` [U-Boot] [PATCH] Add support for MB86R01 from Fujitsu Matthias Weisser 2010-01-11 17:18 ` [U-Boot] [PATCH] Add support for Jade display controller Matthias Weisser @ 2010-01-16 15:39 ` Tom 2010-01-18 14:01 ` Matthias Weißer 1 sibling, 1 reply; 23+ messages in thread From: Tom @ 2010-01-16 15:39 UTC (permalink / raw) To: u-boot Matthias Weisser wrote: > Signed-off-by: Matthias Weisser <matthias.weisser@graf-syteco.de> > --- > common/serial.c | 3 +- > cpu/arm926ejs/jade/Makefile | 47 +++++++++ > cpu/arm926ejs/jade/reset.c | 37 ++++++++ > cpu/arm926ejs/jade/timer.c | 127 +++++++++++++++++++++++++ > include/asm-arm/arch-jade/hardware.h | 31 ++++++ > include/asm-arm/arch-jade/jade.h | 170 ++++++++++++++++++++++++++++++++++ > include/serial.h | 3 +- > 7 files changed, 416 insertions(+), 2 deletions(-) > create mode 100644 cpu/arm926ejs/jade/Makefile > create mode 100644 cpu/arm926ejs/jade/reset.c > create mode 100644 cpu/arm926ejs/jade/timer.c > create mode 100644 include/asm-arm/arch-jade/hardware.h > create mode 100644 include/asm-arm/arch-jade/jade.h > > diff --git a/common/serial.c b/common/serial.c > index 5f9ffd7..7397608 100644 > --- a/common/serial.c > +++ b/common/serial.c > @@ -41,7 +41,8 @@ struct serial_device *__default_serial_console (void) > #elif defined(CONFIG_405GP) || defined(CONFIG_405CR) || defined(CONFIG_440) \ > || defined(CONFIG_405EP) || defined(CONFIG_405EZ) || defined(CONFIG_405EX) \ > || defined(CONFIG_MPC5xxx) || defined(CONFIG_MPC83xx) \ > - || defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) > + || defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) \ > + || defined(CONFIG_JADE) > #if defined(CONFIG_CONS_INDEX) && defined(CONFIG_SYS_NS16550_SERIAL) > #if (CONFIG_CONS_INDEX==1) > return &eserial1_device; Including serial here is premature. I do not see where you set up there serial devices. Please save this for a later serial-only patch. Otherwise this patch looks fine. Tom ^ permalink raw reply [flat|nested] 23+ messages in thread
* [U-Boot] [PATCH] Add support for MB86R01 from Fujitsu 2010-01-16 15:39 ` [U-Boot] [PATCH] Add support for MB86R01 from Fujitsu Tom @ 2010-01-18 14:01 ` Matthias Weißer 0 siblings, 0 replies; 23+ messages in thread From: Matthias Weißer @ 2010-01-18 14:01 UTC (permalink / raw) To: u-boot Am 16.01.2010 16:39, schrieb Tom: > Matthias Weisser wrote: >> @@ -41,7 +41,8 @@ struct serial_device *__default_serial_console (void) >> #elif defined(CONFIG_405GP) || defined(CONFIG_405CR) || defined(CONFIG_440) \ >> || defined(CONFIG_405EP) || defined(CONFIG_405EZ) || defined(CONFIG_405EX) \ >> || defined(CONFIG_MPC5xxx) || defined(CONFIG_MPC83xx) \ >> - || defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) >> + || defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) \ >> + || defined(CONFIG_JADE) >> #if defined(CONFIG_CONS_INDEX)&& defined(CONFIG_SYS_NS16550_SERIAL) >> #if (CONFIG_CONS_INDEX==1) >> return&eserial1_device; > > Including serial here is premature. > I do not see where you set up there serial devices. > Please save this for a later serial-only patch. Well, the SoC has UARTs which are fully compatible with the ns16550 driver (drivers/serial/serial.c) and therefore I simply set it up like this. What would be the right way to do it? I don't see a reason to add a serial_mb860x.c driver which is virtually identical to the current stuff in serial.c > Otherwise this patch looks fine. Thanks for checking. Regards, Matthias ^ permalink raw reply [flat|nested] 23+ messages in thread
* [U-Boot] Adding support for MB86R01 2010-01-11 17:18 [U-Boot] Adding support for MB86R01 Matthias Weisser 2010-01-11 17:18 ` [U-Boot] [PATCH] Add support for MB86R01 from Fujitsu Matthias Weisser @ 2010-01-16 15:40 ` Tom 1 sibling, 0 replies; 23+ messages in thread From: Tom @ 2010-01-16 15:40 UTC (permalink / raw) To: u-boot Matthias Weisser wrote: > This patchset adds support for the MB86R01 'Jade' SoC from Fujitsu. It > is based on a ARM926EJS core. > Please in the future use git format-patch -n This will number the patch set. Tom > _______________________________________________ > U-Boot mailing list > U-Boot at lists.denx.de > http://lists.denx.de/mailman/listinfo/u-boot ^ permalink raw reply [flat|nested] 23+ messages in thread
end of thread, other threads:[~2010-01-21 19:52 UTC | newest] Thread overview: 23+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2010-01-11 17:18 [U-Boot] Adding support for MB86R01 Matthias Weisser 2010-01-11 17:18 ` [U-Boot] [PATCH] Add support for MB86R01 from Fujitsu Matthias Weisser 2010-01-11 17:18 ` [U-Boot] [PATCH] Add support for Jade display controller Matthias Weisser 2010-01-11 17:18 ` [U-Boot] [PATCH] Adding new vendor logo Matthias Weisser 2010-01-11 17:18 ` [U-Boot] [PATCH] Add support for jadecpu board Matthias Weisser 2010-01-16 19:18 ` Tom 2010-01-16 20:11 ` Wolfgang Denk 2010-01-18 7:05 ` [U-Boot] Antw: " Matthias Weisser 2010-01-18 7:57 ` Wolfgang Denk 2010-01-18 8:21 ` Matthias Weißer 2010-01-18 8:55 ` Wolfgang Denk 2010-01-18 7:54 ` [U-Boot] " Matthias Weißer 2010-01-18 8:52 ` Wolfgang Denk 2010-01-18 12:10 ` Matthias Weißer 2010-01-18 13:11 ` Tom 2010-01-21 19:52 ` Tom 2010-01-16 16:43 ` [U-Boot] [PATCH] Adding new vendor logo Tom 2010-01-18 13:55 ` Matthias Weißer 2010-01-16 16:30 ` [U-Boot] [PATCH] Add support for Jade display controller Tom 2010-01-18 14:06 ` Matthias Weißer 2010-01-16 15:39 ` [U-Boot] [PATCH] Add support for MB86R01 from Fujitsu Tom 2010-01-18 14:01 ` Matthias Weißer 2010-01-16 15:40 ` [U-Boot] Adding support for MB86R01 Tom
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