* [PATCH 01/68] piix: add new short cable IDs
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:03 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:03 ` [PATCH 02/68] libata: CodingStyle fixes for ATA timings code Bartlomiej Zolnierkiewicz
` (67 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:03 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] piix: add new short cable IDs
Based on commits 6034734 and 760cdb7 for ata_piix.
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ide/piix.c | 3 +++
1 file changed, 3 insertions(+)
Index: b/drivers/ide/piix.c
===================================================================
--- a/drivers/ide/piix.c
+++ b/drivers/ide/piix.c
@@ -256,9 +256,12 @@ static const struct ich_laptop ich_lapto
{ 0x27DF, 0x1025, 0x0102 }, /* ICH7 on Acer 5602aWLMi */
{ 0x27DF, 0x0005, 0x0280 }, /* ICH7 on Acer 5602WLMi */
{ 0x27DF, 0x1025, 0x0110 }, /* ICH7 on Acer 3682WLMi */
+ { 0x27DF, 0x1028, 0x02b0 }, /* ICH7 on unknown Dell */
{ 0x27DF, 0x1043, 0x1267 }, /* ICH7 on Asus W5F */
{ 0x27DF, 0x103C, 0x30A1 }, /* ICH7 on HP Compaq nc2400 */
+ { 0x27DF, 0x103C, 0x361a }, /* ICH7 on unkown HP */
{ 0x27DF, 0x1071, 0xD221 }, /* ICH7 on Hercules EC-900 */
+ { 0x27DF, 0x152D, 0x0778 }, /* ICH7 on unknown Intel */
{ 0x24CA, 0x1025, 0x0061 }, /* ICH4 on Acer Aspire 2023WLMi */
{ 0x24CA, 0x1025, 0x003d }, /* ICH4 on ACER TM290 */
{ 0x266F, 0x1025, 0x0066 }, /* ICH6 on ACER Aspire 1694WLMi */
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 02/68] libata: CodingStyle fixes for ATA timings code
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
2010-01-29 16:03 ` [PATCH 01/68] piix: add new short cable IDs Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:03 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:03 ` [PATCH 03/68] libata: move ATA timings code to ata-timings.c Bartlomiej Zolnierkiewicz
` (66 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:03 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] libata: CodingStyle fixes for ATA timings code
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ata/libata-core.c | 39 +++++++++++++++++++++++++--------------
1 file changed, 25 insertions(+), 14 deletions(-)
Index: b/drivers/ata/libata-core.c
===================================================================
--- a/drivers/ata/libata-core.c
+++ b/drivers/ata/libata-core.c
@@ -3076,10 +3076,11 @@ static const struct ata_timing ata_timin
{ 0xFF }
};
-#define ENOUGH(v, unit) (((v)-1)/(unit)+1)
-#define EZ(v, unit) ((v)?ENOUGH(v, unit):0)
+#define ENOUGH(v, unit) (((v) - 1) / (unit) + 1)
+#define EZ(v, unit) ((v) ? ENOUGH(v, unit) : 0)
-static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
+static void ata_timing_quantize(const struct ata_timing *t,
+ struct ata_timing *q, int T, int UT)
{
q->setup = EZ(t->setup * 1000, T);
q->act8b = EZ(t->act8b * 1000, T);
@@ -3095,15 +3096,24 @@ static void ata_timing_quantize(const st
void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
struct ata_timing *m, unsigned int what)
{
- if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
- if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
- if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
- if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
- if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
- if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
- if (what & ATA_TIMING_DMACK_HOLD) m->dmack_hold = max(a->dmack_hold, b->dmack_hold);
- if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
- if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
+ if (what & ATA_TIMING_SETUP)
+ m->setup = max(a->setup, b->setup);
+ if (what & ATA_TIMING_ACT8B)
+ m->act8b = max(a->act8b, b->act8b);
+ if (what & ATA_TIMING_REC8B)
+ m->rec8b = max(a->rec8b, b->rec8b);
+ if (what & ATA_TIMING_CYC8B)
+ m->cyc8b = max(a->cyc8b, b->cyc8b);
+ if (what & ATA_TIMING_ACTIVE)
+ m->active = max(a->active, b->active);
+ if (what & ATA_TIMING_RECOVER)
+ m->recover = max(a->recover, b->recover);
+ if (what & ATA_TIMING_DMACK_HOLD)
+ m->dmack_hold = max(a->dmack_hold, b->dmack_hold);
+ if (what & ATA_TIMING_CYCLE)
+ m->cycle = max(a->cycle, b->cycle);
+ if (what & ATA_TIMING_UDMA)
+ m->udma = max(a->udma, b->udma);
}
const struct ata_timing *ata_timing_find_mode(u8 xfer_mode)
@@ -3129,7 +3139,8 @@ int ata_timing_compute(struct ata_device
* Find the mode.
*/
- if (!(s = ata_timing_find_mode(speed)))
+ s = ata_timing_find_mode(speed);
+ if (!s)
return -EINVAL;
memcpy(t, s, sizeof(*s));
@@ -3162,7 +3173,7 @@ int ata_timing_compute(struct ata_device
/*
* Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
- * S.M.A.R.T * and some other commands. We have to ensure that the
+ * S.M.A.R.T and some other commands. We have to ensure that the
* DMA cycle timing is slower/equal than the fastest PIO timing.
*/
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 03/68] libata: move ATA timings code to ata-timings.c
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
2010-01-29 16:03 ` [PATCH 01/68] piix: add new short cable IDs Bartlomiej Zolnierkiewicz
2010-01-29 16:03 ` [PATCH 02/68] libata: CodingStyle fixes for ATA timings code Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:03 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:03 ` [PATCH 04/68] ata: make ATA timings code independent of libata Bartlomiej Zolnierkiewicz
` (65 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:03 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] libata: move ATA timings code to ata-timings.c
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ata/Makefile | 2
drivers/ata/ata-timings.c | 179 ++++++++++++++++++++++++++++++++++++++++++++++
drivers/ata/libata-core.c | 173 --------------------------------------------
3 files changed, 180 insertions(+), 174 deletions(-)
Index: b/drivers/ata/Makefile
===================================================================
--- a/drivers/ata/Makefile
+++ b/drivers/ata/Makefile
@@ -83,7 +83,7 @@ obj-$(CONFIG_ATA_GENERIC) += ata_generic
# Should be last libata driver
obj-$(CONFIG_PATA_LEGACY) += pata_legacy.o
-libata-objs := libata-core.o libata-scsi.o libata-eh.o
+libata-objs := ata-timings.o libata-core.o libata-scsi.o libata-eh.o
libata-$(CONFIG_ATA_SFF) += libata-sff.o
libata-$(CONFIG_SATA_PMP) += libata-pmp.o
libata-$(CONFIG_ATA_ACPI) += libata-acpi.o
Index: b/drivers/ata/ata-timings.c
===================================================================
--- /dev/null
+++ b/drivers/ata/ata-timings.c
@@ -0,0 +1,179 @@
+/*
+ * This mode timing computation functionality is ported over from
+ * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
+ */
+
+#include <linux/kernel.h>
+#include <linux/libata.h>
+
+/*
+ * PIO 0-4, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
+ * These were taken from ATA/ATAPI-6 standard, rev 0a, except
+ * for UDMA6, which is currently supported only by Maxtor drives.
+ *
+ * For PIO 5/6 MWDMA 3/4 see the CFA specification 3.0.
+ */
+
+static const struct ata_timing ata_timing[] = {
+/* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 0, 960, 0 }, */
+ { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 0, 600, 0 },
+ { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 0, 383, 0 },
+ { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 0, 240, 0 },
+ { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 0, 180, 0 },
+ { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 0, 120, 0 },
+ { XFER_PIO_5, 15, 65, 25, 100, 65, 25, 0, 100, 0 },
+ { XFER_PIO_6, 10, 55, 20, 80, 55, 20, 0, 80, 0 },
+
+ { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 50, 960, 0 },
+ { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 30, 480, 0 },
+ { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 20, 240, 0 },
+
+ { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 20, 480, 0 },
+ { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 5, 150, 0 },
+ { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 5, 120, 0 },
+ { XFER_MW_DMA_3, 25, 0, 0, 0, 65, 25, 5, 100, 0 },
+ { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 5, 80, 0 },
+
+/* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 0, 150 }, */
+ { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 0, 120 },
+ { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 0, 80 },
+ { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 0, 60 },
+ { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 0, 45 },
+ { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 0, 30 },
+ { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 0, 20 },
+ { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 0, 15 },
+
+ { 0xFF }
+};
+
+#define ENOUGH(v, unit) (((v) - 1) / (unit) + 1)
+#define EZ(v, unit) ((v) ? ENOUGH(v, unit) : 0)
+
+static void ata_timing_quantize(const struct ata_timing *t,
+ struct ata_timing *q, int T, int UT)
+{
+ q->setup = EZ(t->setup * 1000, T);
+ q->act8b = EZ(t->act8b * 1000, T);
+ q->rec8b = EZ(t->rec8b * 1000, T);
+ q->cyc8b = EZ(t->cyc8b * 1000, T);
+ q->active = EZ(t->active * 1000, T);
+ q->recover = EZ(t->recover * 1000, T);
+ q->dmack_hold = EZ(t->dmack_hold * 1000, T);
+ q->cycle = EZ(t->cycle * 1000, T);
+ q->udma = EZ(t->udma * 1000, UT);
+}
+
+void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
+ struct ata_timing *m, unsigned int what)
+{
+ if (what & ATA_TIMING_SETUP)
+ m->setup = max(a->setup, b->setup);
+ if (what & ATA_TIMING_ACT8B)
+ m->act8b = max(a->act8b, b->act8b);
+ if (what & ATA_TIMING_REC8B)
+ m->rec8b = max(a->rec8b, b->rec8b);
+ if (what & ATA_TIMING_CYC8B)
+ m->cyc8b = max(a->cyc8b, b->cyc8b);
+ if (what & ATA_TIMING_ACTIVE)
+ m->active = max(a->active, b->active);
+ if (what & ATA_TIMING_RECOVER)
+ m->recover = max(a->recover, b->recover);
+ if (what & ATA_TIMING_DMACK_HOLD)
+ m->dmack_hold = max(a->dmack_hold, b->dmack_hold);
+ if (what & ATA_TIMING_CYCLE)
+ m->cycle = max(a->cycle, b->cycle);
+ if (what & ATA_TIMING_UDMA)
+ m->udma = max(a->udma, b->udma);
+}
+EXPORT_SYMBOL_GPL(ata_timing_merge);
+
+const struct ata_timing *ata_timing_find_mode(u8 xfer_mode)
+{
+ const struct ata_timing *t = ata_timing;
+
+ while (xfer_mode > t->mode)
+ t++;
+
+ if (xfer_mode == t->mode)
+ return t;
+ return NULL;
+}
+EXPORT_SYMBOL_GPL(ata_timing_find_mode);
+
+int ata_timing_compute(struct ata_device *adev, unsigned short speed,
+ struct ata_timing *t, int T, int UT)
+{
+ const u16 *id = adev->id;
+ const struct ata_timing *s;
+ struct ata_timing p;
+
+ /*
+ * Find the mode.
+ */
+
+ s = ata_timing_find_mode(speed);
+ if (!s)
+ return -EINVAL;
+
+ memcpy(t, s, sizeof(*s));
+
+ /*
+ * If the drive is an EIDE drive, it can tell us it needs extended
+ * PIO/MW_DMA cycle timing.
+ */
+
+ if (id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
+ memset(&p, 0, sizeof(p));
+
+ if (speed >= XFER_PIO_0 && speed < XFER_SW_DMA_0) {
+ if (speed <= XFER_PIO_2)
+ p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO];
+ else if ((speed <= XFER_PIO_4) ||
+ (speed == XFER_PIO_5 && !ata_id_is_cfa(id)))
+ p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO_IORDY];
+ } else if (speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2)
+ p.cycle = id[ATA_ID_EIDE_DMA_MIN];
+
+ ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
+ }
+
+ /*
+ * Convert the timing to bus clock counts.
+ */
+
+ ata_timing_quantize(t, t, T, UT);
+
+ /*
+ * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
+ * S.M.A.R.T and some other commands. We have to ensure that the
+ * DMA cycle timing is slower/equal than the fastest PIO timing.
+ */
+
+ if (speed > XFER_PIO_6) {
+ ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
+ ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
+ }
+
+ /*
+ * Lengthen active & recovery time so that cycle time is correct.
+ */
+
+ if (t->act8b + t->rec8b < t->cyc8b) {
+ t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
+ t->rec8b = t->cyc8b - t->act8b;
+ }
+
+ if (t->active + t->recover < t->cycle) {
+ t->active += (t->cycle - (t->active + t->recover)) / 2;
+ t->recover = t->cycle - t->active;
+ }
+
+ /* In a few cases quantisation may produce enough errors to
+ leave t->cycle too low for the sum of active and recovery
+ if so we must correct this */
+ if (t->active + t->recover > t->cycle)
+ t->cycle = t->active + t->recover;
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(ata_timing_compute);
Index: b/drivers/ata/libata-core.c
===================================================================
--- a/drivers/ata/libata-core.c
+++ b/drivers/ata/libata-core.c
@@ -3032,179 +3032,6 @@ int sata_set_spd(struct ata_link *link)
return 1;
}
-/*
- * This mode timing computation functionality is ported over from
- * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
- */
-/*
- * PIO 0-4, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
- * These were taken from ATA/ATAPI-6 standard, rev 0a, except
- * for UDMA6, which is currently supported only by Maxtor drives.
- *
- * For PIO 5/6 MWDMA 3/4 see the CFA specification 3.0.
- */
-
-static const struct ata_timing ata_timing[] = {
-/* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 0, 960, 0 }, */
- { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 0, 600, 0 },
- { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 0, 383, 0 },
- { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 0, 240, 0 },
- { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 0, 180, 0 },
- { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 0, 120, 0 },
- { XFER_PIO_5, 15, 65, 25, 100, 65, 25, 0, 100, 0 },
- { XFER_PIO_6, 10, 55, 20, 80, 55, 20, 0, 80, 0 },
-
- { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 50, 960, 0 },
- { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 30, 480, 0 },
- { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 20, 240, 0 },
-
- { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 20, 480, 0 },
- { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 5, 150, 0 },
- { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 5, 120, 0 },
- { XFER_MW_DMA_3, 25, 0, 0, 0, 65, 25, 5, 100, 0 },
- { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 5, 80, 0 },
-
-/* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 0, 150 }, */
- { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 0, 120 },
- { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 0, 80 },
- { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 0, 60 },
- { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 0, 45 },
- { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 0, 30 },
- { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 0, 20 },
- { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 0, 15 },
-
- { 0xFF }
-};
-
-#define ENOUGH(v, unit) (((v) - 1) / (unit) + 1)
-#define EZ(v, unit) ((v) ? ENOUGH(v, unit) : 0)
-
-static void ata_timing_quantize(const struct ata_timing *t,
- struct ata_timing *q, int T, int UT)
-{
- q->setup = EZ(t->setup * 1000, T);
- q->act8b = EZ(t->act8b * 1000, T);
- q->rec8b = EZ(t->rec8b * 1000, T);
- q->cyc8b = EZ(t->cyc8b * 1000, T);
- q->active = EZ(t->active * 1000, T);
- q->recover = EZ(t->recover * 1000, T);
- q->dmack_hold = EZ(t->dmack_hold * 1000, T);
- q->cycle = EZ(t->cycle * 1000, T);
- q->udma = EZ(t->udma * 1000, UT);
-}
-
-void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
- struct ata_timing *m, unsigned int what)
-{
- if (what & ATA_TIMING_SETUP)
- m->setup = max(a->setup, b->setup);
- if (what & ATA_TIMING_ACT8B)
- m->act8b = max(a->act8b, b->act8b);
- if (what & ATA_TIMING_REC8B)
- m->rec8b = max(a->rec8b, b->rec8b);
- if (what & ATA_TIMING_CYC8B)
- m->cyc8b = max(a->cyc8b, b->cyc8b);
- if (what & ATA_TIMING_ACTIVE)
- m->active = max(a->active, b->active);
- if (what & ATA_TIMING_RECOVER)
- m->recover = max(a->recover, b->recover);
- if (what & ATA_TIMING_DMACK_HOLD)
- m->dmack_hold = max(a->dmack_hold, b->dmack_hold);
- if (what & ATA_TIMING_CYCLE)
- m->cycle = max(a->cycle, b->cycle);
- if (what & ATA_TIMING_UDMA)
- m->udma = max(a->udma, b->udma);
-}
-
-const struct ata_timing *ata_timing_find_mode(u8 xfer_mode)
-{
- const struct ata_timing *t = ata_timing;
-
- while (xfer_mode > t->mode)
- t++;
-
- if (xfer_mode == t->mode)
- return t;
- return NULL;
-}
-
-int ata_timing_compute(struct ata_device *adev, unsigned short speed,
- struct ata_timing *t, int T, int UT)
-{
- const u16 *id = adev->id;
- const struct ata_timing *s;
- struct ata_timing p;
-
- /*
- * Find the mode.
- */
-
- s = ata_timing_find_mode(speed);
- if (!s)
- return -EINVAL;
-
- memcpy(t, s, sizeof(*s));
-
- /*
- * If the drive is an EIDE drive, it can tell us it needs extended
- * PIO/MW_DMA cycle timing.
- */
-
- if (id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
- memset(&p, 0, sizeof(p));
-
- if (speed >= XFER_PIO_0 && speed < XFER_SW_DMA_0) {
- if (speed <= XFER_PIO_2)
- p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO];
- else if ((speed <= XFER_PIO_4) ||
- (speed == XFER_PIO_5 && !ata_id_is_cfa(id)))
- p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO_IORDY];
- } else if (speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2)
- p.cycle = id[ATA_ID_EIDE_DMA_MIN];
-
- ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
- }
-
- /*
- * Convert the timing to bus clock counts.
- */
-
- ata_timing_quantize(t, t, T, UT);
-
- /*
- * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
- * S.M.A.R.T and some other commands. We have to ensure that the
- * DMA cycle timing is slower/equal than the fastest PIO timing.
- */
-
- if (speed > XFER_PIO_6) {
- ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
- ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
- }
-
- /*
- * Lengthen active & recovery time so that cycle time is correct.
- */
-
- if (t->act8b + t->rec8b < t->cyc8b) {
- t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
- t->rec8b = t->cyc8b - t->act8b;
- }
-
- if (t->active + t->recover < t->cycle) {
- t->active += (t->cycle - (t->active + t->recover)) / 2;
- t->recover = t->cycle - t->active;
- }
-
- /* In a few cases quantisation may produce enough errors to
- leave t->cycle too low for the sum of active and recovery
- if so we must correct this */
- if (t->active + t->recover > t->cycle)
- t->cycle = t->active + t->recover;
-
- return 0;
-}
-
/**
* ata_timing_cycle2mode - find xfer mode for the specified cycle duration
* @xfer_shift: ATA_SHIFT_* value for transfer type to examine.
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 04/68] ata: make ATA timings code independent of libata
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (2 preceding siblings ...)
2010-01-29 16:03 ` [PATCH 03/68] libata: move ATA timings code to ata-timings.c Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:03 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:03 ` [PATCH 05/68] ata: enable XFER_PIO_SLOW mode in ata_timing table Bartlomiej Zolnierkiewicz
` (64 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:03 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] ata: make ATA timings code independent of libata
* Fix ata_timing_compute() arguments to be independent of libata.
* Move ATA timings enums and function declarations to <linux/ata.h>.
* Add CONFIG_ATA_TIMINGS config option.
* Remove bogus error checks from some host drivers while at it.
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ata/Kconfig | 4 ++++
drivers/ata/Makefile | 4 +++-
drivers/ata/ata-timings.c | 5 ++---
drivers/ata/pata_ali.c | 19 +++++++++++++------
drivers/ata/pata_amd.c | 8 +++-----
drivers/ata/pata_at32.c | 8 ++------
drivers/ata/pata_at91.c | 18 ++++--------------
drivers/ata/pata_atp867x.c | 5 +++--
drivers/ata/pata_cmd640.c | 9 ++++-----
drivers/ata/pata_cmd64x.c | 13 ++++++-------
drivers/ata/pata_cypress.c | 5 +----
drivers/ata/pata_icside.c | 4 ++--
drivers/ata/pata_legacy.c | 32 +++++++++++++++++---------------
drivers/ata/pata_ns87410.c | 7 ++-----
drivers/ata/pata_ns87415.c | 2 +-
drivers/ata/pata_octeon_cf.c | 4 ++--
drivers/ata/pata_via.c | 5 +++--
include/linux/ata.h | 43 +++++++++++++++++++++++++++++++++++++++++++
include/linux/libata.h | 37 -------------------------------------
19 files changed, 115 insertions(+), 117 deletions(-)
Index: b/drivers/ata/Kconfig
===================================================================
--- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig
@@ -2,11 +2,15 @@
# SATA/PATA driver configuration
#
+config ATA_TIMINGS
+ bool
+
menuconfig ATA
tristate "Serial ATA and Parallel ATA drivers"
depends on HAS_IOMEM
depends on BLOCK
depends on !(M32R || M68K) || BROKEN
+ select ATA_TIMINGS
select SCSI
---help---
If you want to use a ATA hard disk, ATA tape drive, ATA CD-ROM or
Index: b/drivers/ata/Makefile
===================================================================
--- a/drivers/ata/Makefile
+++ b/drivers/ata/Makefile
@@ -1,4 +1,6 @@
+obj-$(CONFIG_ATA_TIMINGS) += ata-timings.o
+
obj-$(CONFIG_ATA) += libata.o
obj-$(CONFIG_SATA_AHCI) += ahci.o
@@ -83,7 +85,7 @@ obj-$(CONFIG_ATA_GENERIC) += ata_generic
# Should be last libata driver
obj-$(CONFIG_PATA_LEGACY) += pata_legacy.o
-libata-objs := ata-timings.o libata-core.o libata-scsi.o libata-eh.o
+libata-objs := libata-core.o libata-scsi.o libata-eh.o
libata-$(CONFIG_ATA_SFF) += libata-sff.o
libata-$(CONFIG_SATA_PMP) += libata-pmp.o
libata-$(CONFIG_ATA_ACPI) += libata-acpi.o
Index: b/drivers/ata/ata-timings.c
===================================================================
--- a/drivers/ata/ata-timings.c
+++ b/drivers/ata/ata-timings.c
@@ -100,10 +100,9 @@ const struct ata_timing *ata_timing_find
}
EXPORT_SYMBOL_GPL(ata_timing_find_mode);
-int ata_timing_compute(struct ata_device *adev, unsigned short speed,
+int ata_timing_compute(const u16 *id, u8 speed, u8 pio_speed,
struct ata_timing *t, int T, int UT)
{
- const u16 *id = adev->id;
const struct ata_timing *s;
struct ata_timing p;
@@ -150,7 +149,7 @@ int ata_timing_compute(struct ata_device
*/
if (speed > XFER_PIO_6) {
- ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
+ ata_timing_compute(id, pio_speed, pio_speed, &p, T, UT);
ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
}
Index: b/drivers/ata/pata_ali.c
===================================================================
--- a/drivers/ata/pata_ali.c
+++ b/drivers/ata/pata_ali.c
@@ -210,13 +210,16 @@ static void ali_set_piomode(struct ata_p
struct ata_timing t;
unsigned long T = 1000000000 / 33333; /* PCI clock based */
- ata_timing_compute(adev, adev->pio_mode, &t, T, 1);
+ ata_timing_compute(adev->id, adev->pio_mode, adev->pio_mode, &t, T, 1);
if (pair) {
struct ata_timing p;
- ata_timing_compute(pair, pair->pio_mode, &p, T, 1);
+
+ ata_timing_compute(pair->id, pair->pio_mode, pair->pio_mode,
+ &p, T, 1);
ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
if (pair->dma_mode) {
- ata_timing_compute(pair, pair->dma_mode, &p, T, 1);
+ ata_timing_compute(pair->id, pair->dma_mode,
+ pair->pio_mode, &p, T, 1);
ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
}
}
@@ -256,13 +259,17 @@ static void ali_set_dmamode(struct ata_p
pci_write_config_byte(pdev, 0x4B, reg4b);
}
} else {
- ata_timing_compute(adev, adev->dma_mode, &t, T, 1);
+ ata_timing_compute(adev->id, adev->dma_mode, adev->pio_mode,
+ &t, T, 1);
if (pair) {
struct ata_timing p;
- ata_timing_compute(pair, pair->pio_mode, &p, T, 1);
+
+ ata_timing_compute(pair->id, pair->pio_mode,
+ pair->pio_mode, &p, T, 1);
ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
if (pair->dma_mode) {
- ata_timing_compute(pair, pair->dma_mode, &p, T, 1);
+ ata_timing_compute(pair->id, pair->dma_mode,
+ pair->pio_mode, &p, T, 1);
ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
}
}
Index: b/drivers/ata/pata_amd.c
===================================================================
--- a/drivers/ata/pata_amd.c
+++ b/drivers/ata/pata_amd.c
@@ -59,13 +59,11 @@ static void timing_setup(struct ata_port
if (clock >= 2)
UT = T / 2;
- if (ata_timing_compute(adev, speed, &at, T, UT) < 0) {
- dev_printk(KERN_ERR, &pdev->dev, "unknown mode %d.\n", speed);
- return;
- }
+ ata_timing_compute(adev->id, speed, adev->pio_mode, &at, T, UT);
if (peer) {
- ata_timing_compute(peer, peer->pio_mode, &apeer, T, UT);
+ ata_timing_compute(peer->id, peer->pio_mode,
+ peer->pio_mode, &apeer, T, UT);
ata_timing_merge(&apeer, &at, &at, ATA_TIMING_8BIT);
}
Index: b/drivers/ata/pata_at32.c
===================================================================
--- a/drivers/ata/pata_at32.c
+++ b/drivers/ata/pata_at32.c
@@ -150,15 +150,11 @@ static void pata_at32_set_piomode(struct
{
struct ata_timing timing;
struct at32_ide_info *info = ap->host->private_data;
-
int ret;
+ u8 mode = adev->pio_mode;
/* Compute ATA timing */
- ret = ata_timing_compute(adev, adev->pio_mode, &timing, 1000, 0);
- if (ret) {
- dev_warn(ap->dev, "Failed to compute ATA timing %d\n", ret);
- return;
- }
+ ata_timing_compute(adev->id, mode, mode, &timing, 1000, 0);
/* Setup SMC to ATA timing */
ret = pata_at32_setup_timing(ap->dev, info, &timing);
Index: b/drivers/ata/pata_at91.c
===================================================================
--- a/drivers/ata/pata_at91.c
+++ b/drivers/ata/pata_at91.c
@@ -48,9 +48,6 @@ struct at91_ide_info {
void __iomem *alt_addr;
};
-static const struct ata_timing initial_timing =
- {XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0};
-
static unsigned long calc_mck_cycles(unsigned long ns, unsigned long mck_hz)
{
unsigned long mul;
@@ -148,22 +145,15 @@ static void pata_at91_set_piomode(struct
{
struct at91_ide_info *info = ap->host->private_data;
struct ata_timing timing;
- int ret;
+ u8 mode = adev->pio_mode;
/* Compute ATA timing and set it to SMC */
- ret = ata_timing_compute(adev, adev->pio_mode, &timing, 1000, 0);
- if (ret) {
- dev_warn(ap->dev, "Failed to compute ATA timing %d, \
- set PIO_0 timing\n", ret);
- set_smc_timing(ap->dev, info, &initial_timing);
- } else {
- set_smc_timing(ap->dev, info, &timing);
- }
+ ata_timing_compute(adev->id, mode, mode, &timing, 1000, 0);
+
+ set_smc_timing(ap->dev, info, &timing);
/* Setup SMC mode */
set_smc_mode(info);
-
- return;
}
static unsigned int pata_at91_data_xfer_noirq(struct ata_device *dev,
Index: b/drivers/ata/pata_atp867x.c
===================================================================
--- a/drivers/ata/pata_atp867x.c
+++ b/drivers/ata/pata_atp867x.c
@@ -223,9 +223,10 @@ static void atp867x_set_piomode(struct a
T = 1000000000 / 33333;
UT = T / 4;
- ata_timing_compute(adev, speed, &t, T, UT);
+ ata_timing_compute(adev->id, speed, adev->pio_mode, &t, T, UT);
if (peer && peer->pio_mode) {
- ata_timing_compute(peer, peer->pio_mode, &p, T, UT);
+ ata_timing_compute(peer->id, peer->pio_mode, peer->pio_mode,
+ &p, T, UT);
ata_timing_merge(&p, &t, &t, ATA_TIMING_8BIT);
}
Index: b/drivers/ata/pata_cmd640.c
===================================================================
--- a/drivers/ata/pata_cmd640.c
+++ b/drivers/ata/pata_cmd640.c
@@ -59,16 +59,15 @@ static void cmd640_set_piomode(struct at
int arttim = ARTIM0 + 2 * adev->devno;
struct ata_device *pair = ata_dev_pair(adev);
- if (ata_timing_compute(adev, adev->pio_mode, &t, T, 0) < 0) {
- printk(KERN_ERR DRV_NAME ": mode computation failed.\n");
- return;
- }
+ ata_timing_compute(adev->id, adev->pio_mode, adev->pio_mode, &t, T, 0);
/* The second channel has shared timings and the setup timing is
messy to switch to merge it for worst case */
if (ap->port_no && pair) {
struct ata_timing p;
- ata_timing_compute(pair, pair->pio_mode, &p, T, 1);
+
+ ata_timing_compute(pair->id, pair->pio_mode, pair->pio_mode,
+ &p, T, 1);
ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP);
}
Index: b/drivers/ata/pata_cmd64x.c
===================================================================
--- a/drivers/ata/pata_cmd64x.c
+++ b/drivers/ata/pata_cmd64x.c
@@ -145,10 +145,8 @@ static void cmd64x_set_timing(struct ata
/* ata_timing_compute is smart and will produce timings for MWDMA
that don't violate the drives PIO capabilities. */
- if (ata_timing_compute(adev, mode, &t, T, 0) < 0) {
- printk(KERN_ERR DRV_NAME ": mode computation failed.\n");
- return;
- }
+ ata_timing_compute(adev->id, mode, adev->pio_mode, &t, T, 0);
+
if (ap->port_no) {
/* Slave has shared address setup */
struct ata_device *pair = ata_dev_pair(adev);
@@ -156,11 +154,12 @@ static void cmd64x_set_timing(struct ata
if (pair) {
struct ata_timing tp;
- ata_timing_compute(pair, pair->pio_mode, &tp, T, 0);
+ ata_timing_compute(pair->id, pair->pio_mode,
+ pair->pio_mode, &tp, T, 0);
ata_timing_merge(&t, &tp, &t, ATA_TIMING_SETUP);
if (pair->dma_mode) {
- ata_timing_compute(pair, pair->dma_mode,
- &tp, T, 0);
+ ata_timing_compute(pair->id, pair->dma_mode,
+ pair->pio_mode, &tp, T, 0);
ata_timing_merge(&tp, &t, &t, ATA_TIMING_SETUP);
}
}
Index: b/drivers/ata/pata_cypress.c
===================================================================
--- a/drivers/ata/pata_cypress.c
+++ b/drivers/ata/pata_cypress.c
@@ -57,10 +57,7 @@ static void cy82c693_set_piomode(struct
short time_16, time_8;
u32 addr;
- if (ata_timing_compute(adev, adev->pio_mode, &t, T, 1) < 0) {
- printk(KERN_ERR DRV_NAME ": mome computation failed.\n");
- return;
- }
+ ata_timing_compute(adev->id, adev->pio_mode, adev->pio_mode, &t, T, 1);
time_16 = clamp_val(t.recover - 1, 0, 15) |
(clamp_val(t.active - 1, 0, 15) << 4);
Index: b/drivers/ata/pata_icside.c
===================================================================
--- a/drivers/ata/pata_icside.c
+++ b/drivers/ata/pata_icside.c
@@ -186,6 +186,7 @@ static const expansioncard_ops_t pata_ic
static void pata_icside_set_dmamode(struct ata_port *ap, struct ata_device *adev)
{
struct pata_icside_state *state = ap->host->private_data;
+ const u16 *id = adev->id;
struct ata_timing t;
unsigned int cycle;
char iomd_type;
@@ -193,8 +194,7 @@ static void pata_icside_set_dmamode(stru
/*
* DMA is based on a 16MHz clock
*/
- if (ata_timing_compute(adev, adev->dma_mode, &t, 1000, 1))
- return;
+ ata_timing_compute(id, adev->dma_mode, adev->pio_mode, &t, 1000, 1);
/*
* Choose the IOMD cycle timing which ensure that the interface
Index: b/drivers/ata/pata_legacy.c
===================================================================
--- a/drivers/ata/pata_legacy.c
+++ b/drivers/ata/pata_legacy.c
@@ -357,11 +357,11 @@ static struct ata_port_operations pdc202
static void ht6560a_set_piomode(struct ata_port *ap, struct ata_device *adev)
{
- u8 active, recover;
+ u8 mode = adev->pio_mode, active, recover;
struct ata_timing t;
/* Get the timing data in cycles. For now play safe at 50Mhz */
- ata_timing_compute(adev, adev->pio_mode, &t, 20000, 1000);
+ ata_timing_compute(adev->id, mode, mode, &t, 20000, 1000);
active = clamp_val(t.active, 2, 15);
recover = clamp_val(t.recover, 4, 15);
@@ -391,11 +391,11 @@ static struct ata_port_operations ht6560
static void ht6560b_set_piomode(struct ata_port *ap, struct ata_device *adev)
{
- u8 active, recover;
+ u8 mode = adev->pio_mode, active, recover;
struct ata_timing t;
/* Get the timing data in cycles. For now play safe at 50Mhz */
- ata_timing_compute(adev, adev->pio_mode, &t, 20000, 1000);
+ ata_timing_compute(adev->id, mode, mode, &t, 20000, 1000);
active = clamp_val(t.active, 2, 15);
recover = clamp_val(t.recover, 2, 16);
@@ -456,7 +456,7 @@ static u8 opti_syscfg(u8 reg)
static void opti82c611a_set_piomode(struct ata_port *ap,
struct ata_device *adev)
{
- u8 active, recover, setup;
+ u8 mode = adev->pio_mode, active, recover, setup;
struct ata_timing t;
struct ata_device *pair = ata_dev_pair(adev);
int clock;
@@ -472,13 +472,14 @@ static void opti82c611a_set_piomode(stru
clock = 1000000000 / khz[ioread8(ap->ioaddr.lbah_addr) & 0x03];
/* Get the timing data in cycles */
- ata_timing_compute(adev, adev->pio_mode, &t, clock, 1000);
+ ata_timing_compute(adev->id, mode, mode, &t, clock, 1000);
/* Setup timing is shared */
if (pair) {
struct ata_timing tp;
- ata_timing_compute(pair, pair->pio_mode, &tp, clock, 1000);
+ ata_timing_compute(pair->id, pair->pio_mode, pair->pio_mode,
+ &tp, clock, 1000);
ata_timing_merge(&t, &tp, &t, ATA_TIMING_SETUP);
}
@@ -531,7 +532,7 @@ static struct ata_port_operations opti82
static void opti82c46x_set_piomode(struct ata_port *ap, struct ata_device *adev)
{
- u8 active, recover, setup;
+ u8 mode = adev->pio_mode, active, recover, setup;
struct ata_timing t;
struct ata_device *pair = ata_dev_pair(adev);
int clock;
@@ -551,13 +552,14 @@ static void opti82c46x_set_piomode(struc
clock = 1000000000 / khz[sysclk];
/* Get the timing data in cycles */
- ata_timing_compute(adev, adev->pio_mode, &t, clock, 1000);
+ ata_timing_compute(adev->id, mode, mode, &t, clock, 1000);
/* Setup timing is shared */
if (pair) {
struct ata_timing tp;
- ata_timing_compute(pair, pair->pio_mode, &tp, clock, 1000);
+ ata_timing_compute(pair->id, pair->pio_mode, pair->pio_mode,
+ &tp, clock, 1000);
ata_timing_merge(&t, &tp, &t, ATA_TIMING_SETUP);
}
@@ -651,10 +653,10 @@ static void qdi65x0_set_piomode(struct a
struct ata_timing t;
struct legacy_data *ld_qdi = ap->host->private_data;
int active, recovery;
- u8 timing;
+ u8 mode = adev->pio_mode, timing;
/* Get the timing data in cycles */
- ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000);
+ ata_timing_compute(adev->id, mode, mode, &t, 30303, 1000);
if (ld_qdi->fast) {
active = 8 - clamp_val(t.active, 1, 8);
@@ -786,16 +788,16 @@ static void winbond_set_piomode(struct a
struct ata_timing t;
struct legacy_data *ld_winbond = ap->host->private_data;
int active, recovery;
- u8 reg;
+ u8 mode = adev->pio_mode, reg;
int timing = 0x88 + (ap->port_no * 4) + (adev->devno * 2);
reg = winbond_readcfg(ld_winbond->timing, 0x81);
/* Get the timing data in cycles */
if (reg & 0x40) /* Fast VLB bus, assume 50MHz */
- ata_timing_compute(adev, adev->pio_mode, &t, 20000, 1000);
+ ata_timing_compute(adev->id, mode, mode, &t, 20000, 1000);
else
- ata_timing_compute(adev, adev->pio_mode, &t, 30303, 1000);
+ ata_timing_compute(adev->id, mode, mode, &t, 30303, 1000);
active = (clamp_val(t.active, 3, 17) - 1) & 0x0F;
recovery = (clamp_val(t.recover, 1, 15) + 1) & 0x0F;
Index: b/drivers/ata/pata_ns87410.c
===================================================================
--- a/drivers/ata/pata_ns87410.c
+++ b/drivers/ata/pata_ns87410.c
@@ -65,7 +65,7 @@ static void ns87410_set_piomode(struct a
{
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
int port = 0x40 + 4 * ap->port_no;
- u8 idetcr, idefr;
+ u8 mode = adev->pio_mode, idetcr, idefr;
struct ata_timing at;
static const u8 activebits[15] = {
@@ -85,10 +85,7 @@ static void ns87410_set_piomode(struct a
else
idefr &= ~0x04;
- if (ata_timing_compute(adev, adev->pio_mode, &at, 30303, 1) < 0) {
- dev_printk(KERN_ERR, &pdev->dev, "unknown mode %d.\n", adev->pio_mode);
- return;
- }
+ ata_timing_compute(adev->id, mode, mode, &at, 30303, 1);
at.active = clamp_val(at.active, 2, 16) - 2;
at.setup = clamp_val(at.setup, 1, 4) - 1;
Index: b/drivers/ata/pata_ns87415.c
===================================================================
--- a/drivers/ata/pata_ns87415.c
+++ b/drivers/ata/pata_ns87415.c
@@ -64,7 +64,7 @@ static void ns87415_set_mode(struct ata_
/* Timing register format is 17 - low nybble read timing with
the high nybble being 16 - x for recovery time in PCI clocks */
- ata_timing_compute(adev, adev->pio_mode, &t, T, 0);
+ ata_timing_compute(adev->id, adev->pio_mode, adev->pio_mode, &t, T, 0);
clocking = 17 - clamp_val(t.active, 2, 17);
clocking |= (16 - clamp_val(t.recover, 1, 16)) << 4;
Index: b/drivers/ata/pata_octeon_cf.c
===================================================================
--- a/drivers/ata/pata_octeon_cf.c
+++ b/drivers/ata/pata_octeon_cf.c
@@ -104,11 +104,11 @@ static void octeon_cf_set_piomode(struct
int t1;
int t2;
int t2i;
+ u8 mode = dev->pio_mode;
T = (int)(2000000000000LL / octeon_get_clock_rate());
- if (ata_timing_compute(dev, dev->pio_mode, &timing, T, T))
- BUG();
+ ata_timing_compute(dev->id, mode, mode, &timing, T, T);
t1 = timing.setup;
if (t1)
Index: b/drivers/ata/pata_via.c
===================================================================
--- a/drivers/ata/pata_via.c
+++ b/drivers/ata/pata_via.c
@@ -252,12 +252,13 @@ static void via_do_set_mode(struct ata_p
}
/* Calculate the timing values we require */
- ata_timing_compute(adev, mode, &t, T, UT);
+ ata_timing_compute(adev->id, mode, adev->pio_mode, &t, T, UT);
/* We share 8bit timing so we must merge the constraints */
if (peer) {
if (peer->pio_mode) {
- ata_timing_compute(peer, peer->pio_mode, &p, T, UT);
+ ata_timing_compute(peer->id, peer->pio_mode,
+ peer->pio_mode, &p, T, UT);
ata_timing_merge(&p, &t, &t, ATA_TIMING_8BIT);
}
}
Index: b/include/linux/ata.h
===================================================================
--- a/include/linux/ata.h
+++ b/include/linux/ata.h
@@ -1156,4 +1156,47 @@ static inline u8 ata_mwdma_to_pio(u8 mwd
return needed_pio[mwdma] - XFER_PIO_0;
}
+enum {
+ /* Timing constants */
+ ATA_TIMING_SETUP = (1 << 0),
+ ATA_TIMING_ACT8B = (1 << 1),
+ ATA_TIMING_REC8B = (1 << 2),
+ ATA_TIMING_CYC8B = (1 << 3),
+ ATA_TIMING_8BIT = ATA_TIMING_ACT8B | ATA_TIMING_REC8B |
+ ATA_TIMING_CYC8B,
+ ATA_TIMING_ACTIVE = (1 << 4),
+ ATA_TIMING_RECOVER = (1 << 5),
+ ATA_TIMING_DMACK_HOLD = (1 << 6),
+ ATA_TIMING_CYCLE = (1 << 7),
+ ATA_TIMING_UDMA = (1 << 8),
+ ATA_TIMING_ALL = ATA_TIMING_SETUP | ATA_TIMING_ACT8B |
+ ATA_TIMING_REC8B | ATA_TIMING_CYC8B |
+ ATA_TIMING_ACTIVE | ATA_TIMING_RECOVER |
+ ATA_TIMING_DMACK_HOLD | ATA_TIMING_CYCLE |
+ ATA_TIMING_UDMA,
+
+};
+
+struct ata_timing {
+ unsigned short mode; /* ATA mode */
+ unsigned short setup; /* t1 */
+ unsigned short act8b; /* t2 for 8-bit I/O */
+ unsigned short rec8b; /* t2i for 8-bit I/O */
+ unsigned short cyc8b; /* t0 for 8-bit I/O */
+ unsigned short active; /* t2 or tD */
+ unsigned short recover; /* t2i or tK */
+ unsigned short dmack_hold; /* tj */
+ unsigned short cycle; /* t0 */
+ unsigned short udma; /* t2CYCTYP/2 */
+};
+
+#ifdef CONFIG_ATA_TIMINGS
+extern const struct ata_timing *ata_timing_find_mode(u8 xfer_mode);
+extern int ata_timing_compute(const u16 *, u8, u8,
+ struct ata_timing *, int, int);
+extern void ata_timing_merge(const struct ata_timing *,
+ const struct ata_timing *, struct ata_timing *,
+ unsigned int);
+#endif
+
#endif /* __LINUX_ATA_H__ */
Index: b/include/linux/libata.h
===================================================================
--- a/include/linux/libata.h
+++ b/include/linux/libata.h
@@ -390,24 +390,6 @@ enum {
ATAPI_PASS_THRU = 3, /* SAT pass-thru */
ATAPI_MISC = 4, /* the rest */
- /* Timing constants */
- ATA_TIMING_SETUP = (1 << 0),
- ATA_TIMING_ACT8B = (1 << 1),
- ATA_TIMING_REC8B = (1 << 2),
- ATA_TIMING_CYC8B = (1 << 3),
- ATA_TIMING_8BIT = ATA_TIMING_ACT8B | ATA_TIMING_REC8B |
- ATA_TIMING_CYC8B,
- ATA_TIMING_ACTIVE = (1 << 4),
- ATA_TIMING_RECOVER = (1 << 5),
- ATA_TIMING_DMACK_HOLD = (1 << 6),
- ATA_TIMING_CYCLE = (1 << 7),
- ATA_TIMING_UDMA = (1 << 8),
- ATA_TIMING_ALL = ATA_TIMING_SETUP | ATA_TIMING_ACT8B |
- ATA_TIMING_REC8B | ATA_TIMING_CYC8B |
- ATA_TIMING_ACTIVE | ATA_TIMING_RECOVER |
- ATA_TIMING_DMACK_HOLD | ATA_TIMING_CYCLE |
- ATA_TIMING_UDMA,
-
/* ACPI constants */
ATA_ACPI_FILTER_SETXFER = 1 << 0,
ATA_ACPI_FILTER_LOCK = 1 << 1,
@@ -883,19 +865,6 @@ struct ata_port_info {
void *private_data;
};
-struct ata_timing {
- unsigned short mode; /* ATA mode */
- unsigned short setup; /* t1 */
- unsigned short act8b; /* t2 for 8-bit I/O */
- unsigned short rec8b; /* t2i for 8-bit I/O */
- unsigned short cyc8b; /* t0 for 8-bit I/O */
- unsigned short active; /* t2 or tD */
- unsigned short recover; /* t2i or tK */
- unsigned short dmack_hold; /* tj */
- unsigned short cycle; /* t0 */
- unsigned short udma; /* t2CYCTYP/2 */
-};
-
/*
* Core layer - drivers/ata/libata-core.c
*/
@@ -1029,12 +998,6 @@ extern void ata_pio_queue_task(struct at
/* Timing helpers */
extern unsigned int ata_pio_need_iordy(const struct ata_device *);
-extern const struct ata_timing *ata_timing_find_mode(u8 xfer_mode);
-extern int ata_timing_compute(struct ata_device *, unsigned short,
- struct ata_timing *, int, int);
-extern void ata_timing_merge(const struct ata_timing *,
- const struct ata_timing *, struct ata_timing *,
- unsigned int);
extern u8 ata_timing_cycle2mode(unsigned int xfer_shift, int cycle);
/* PCI */
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 05/68] ata: enable XFER_PIO_SLOW mode in ata_timing table
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (3 preceding siblings ...)
2010-01-29 16:03 ` [PATCH 04/68] ata: make ATA timings code independent of libata Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:03 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:03 ` [PATCH 06/68] ide: switch to generic ATA timings code Bartlomiej Zolnierkiewicz
` (63 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:03 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] ata: enable XFER_PIO_SLOW mode in ata_timing table
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ata/ata-timings.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Index: b/drivers/ata/ata-timings.c
===================================================================
--- a/drivers/ata/ata-timings.c
+++ b/drivers/ata/ata-timings.c
@@ -15,7 +15,7 @@
*/
static const struct ata_timing ata_timing[] = {
-/* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 0, 960, 0 }, */
+ { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 0, 960, 0 },
{ XFER_PIO_0, 70, 290, 240, 600, 165, 150, 0, 600, 0 },
{ XFER_PIO_1, 50, 290, 93, 383, 125, 100, 0, 383, 0 },
{ XFER_PIO_2, 30, 290, 40, 330, 100, 90, 0, 240, 0 },
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 06/68] ide: switch to generic ATA timings code
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (4 preceding siblings ...)
2010-01-29 16:03 ` [PATCH 05/68] ata: enable XFER_PIO_SLOW mode in ata_timing table Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:03 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:03 ` [PATCH 07/68] pata_pcmcia: move IDs table to pata_pcmcia.h Bartlomiej Zolnierkiewicz
` (62 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:03 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] ide: switch to generic ATA timings code
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ide/Kconfig | 1
drivers/ide/Makefile | 1
drivers/ide/ali14xx.c | 2
drivers/ide/alim15x3.c | 45 +++++----
drivers/ide/amd74xx.c | 11 +-
drivers/ide/at91_ide.c | 9 +
drivers/ide/cmd640.c | 4
drivers/ide/cmd64x.c | 17 +--
drivers/ide/cy82c693.c | 6 -
drivers/ide/ht6560b.c | 3
drivers/ide/ide-timings.c | 217 --------------------------------------------
drivers/ide/ide-xfer-mode.c | 25 +++++
drivers/ide/palm_bk3710.c | 7 -
drivers/ide/pmac.c | 6 -
drivers/ide/qd65xx.c | 2
drivers/ide/sl82c105.c | 2
drivers/ide/tx4938ide.c | 2
drivers/ide/via82cxxx.c | 11 +-
include/linux/ide.h | 35 -------
19 files changed, 94 insertions(+), 312 deletions(-)
Index: b/drivers/ide/Kconfig
===================================================================
--- a/drivers/ide/Kconfig
+++ b/drivers/ide/Kconfig
@@ -61,6 +61,7 @@ config IDE_XFER_MODE
config IDE_TIMINGS
bool
+ select ATA_TIMINGS
select IDE_XFER_MODE
config IDE_ATAPI
Index: b/drivers/ide/Makefile
===================================================================
--- a/drivers/ide/Makefile
+++ b/drivers/ide/Makefile
@@ -10,7 +10,6 @@ ide-core-y += ide.o ide-ioctls.o ide-io.
# core IDE code
ide-core-$(CONFIG_IDE_XFER_MODE) += ide-pio-blacklist.o ide-xfer-mode.o
-ide-core-$(CONFIG_IDE_TIMINGS) += ide-timings.o
ide-core-$(CONFIG_IDE_ATAPI) += ide-atapi.o
ide-core-$(CONFIG_BLK_DEV_IDEPCI) += setup-pci.o
ide-core-$(CONFIG_BLK_DEV_IDEDMA) += ide-dma.o
Index: b/drivers/ide/ali14xx.c
===================================================================
--- a/drivers/ide/ali14xx.c
+++ b/drivers/ide/ali14xx.c
@@ -117,7 +117,7 @@ static void ali14xx_set_pio_mode(ide_hwi
unsigned long flags;
int bus_speed = ide_vlb_clk ? ide_vlb_clk : 50;
const u8 pio = drive->pio_mode - XFER_PIO_0;
- struct ide_timing *t = ide_timing_find_mode(XFER_PIO_0 + pio);
+ const struct ata_timing *t = ata_timing_find_mode(XFER_PIO_0 + pio);
/* calculate timing, according to PIO mode */
time1 = ide_pio_cycle_time(drive, pio);
Index: b/drivers/ide/alim15x3.c
===================================================================
--- a/drivers/ide/alim15x3.c
+++ b/drivers/ide/alim15x3.c
@@ -62,7 +62,7 @@ static void ali_fifo_control(ide_hwif_t
}
static void ali_program_timings(ide_hwif_t *hwif, ide_drive_t *drive,
- struct ide_timing *t, u8 ultra)
+ struct ata_timing *t, u8 ultra)
{
struct pci_dev *dev = to_pci_dev(hwif->dev);
int port = hwif->channel ? 0x5c : 0x58;
@@ -104,19 +104,22 @@ static void ali_set_pio_mode(ide_hwif_t
ide_drive_t *pair = ide_get_pair_dev(drive);
int bus_speed = ide_pci_clk ? ide_pci_clk : 33;
unsigned long T = 1000000 / bus_speed; /* PCI clock based */
- struct ide_timing t;
+ struct ata_timing t;
- ide_timing_compute(drive, drive->pio_mode, &t, T, 1);
+ ata_timing_compute(drive->id, drive->pio_mode, drive->pio_mode,
+ &t, T, 1);
if (pair) {
- struct ide_timing p;
+ struct ata_timing p;
- ide_timing_compute(pair, pair->pio_mode, &p, T, 1);
- ide_timing_merge(&p, &t, &t,
- IDE_TIMING_SETUP | IDE_TIMING_8BIT);
+ ata_timing_compute(pair->id, pair->pio_mode, pair->pio_mode,
+ &p, T, 1);
+ ata_timing_merge(&p, &t, &t,
+ ATA_TIMING_SETUP | ATA_TIMING_8BIT);
if (pair->dma_mode) {
- ide_timing_compute(pair, pair->dma_mode, &p, T, 1);
- ide_timing_merge(&p, &t, &t,
- IDE_TIMING_SETUP | IDE_TIMING_8BIT);
+ ata_timing_compute(pair->id, pair->dma_mode,
+ pair->pio_mode, &p, T, 1);
+ ata_timing_merge(&p, &t, &t,
+ ATA_TIMING_SETUP | ATA_TIMING_8BIT);
}
}
@@ -170,21 +173,23 @@ static void ali_set_dma_mode(ide_hwif_t
unsigned long T = 1000000 / bus_speed; /* PCI clock based */
const u8 speed = drive->dma_mode;
u8 tmpbyte = 0x00;
- struct ide_timing t;
+ struct ata_timing t;
if (speed < XFER_UDMA_0) {
- ide_timing_compute(drive, drive->dma_mode, &t, T, 1);
+ ata_timing_compute(drive->id, drive->dma_mode, drive->pio_mode,
+ &t, T, 1);
if (pair) {
- struct ide_timing p;
+ struct ata_timing p;
- ide_timing_compute(pair, pair->pio_mode, &p, T, 1);
- ide_timing_merge(&p, &t, &t,
- IDE_TIMING_SETUP | IDE_TIMING_8BIT);
+ ata_timing_compute(pair->id, pair->pio_mode,
+ pair->pio_mode, &p, T, 1);
+ ata_timing_merge(&p, &t, &t,
+ ATA_TIMING_SETUP | ATA_TIMING_8BIT);
if (pair->dma_mode) {
- ide_timing_compute(pair, pair->dma_mode,
- &p, T, 1);
- ide_timing_merge(&p, &t, &t,
- IDE_TIMING_SETUP | IDE_TIMING_8BIT);
+ ata_timing_compute(pair->id, pair->dma_mode,
+ pair->pio_mode, &p, T, 1);
+ ata_timing_merge(&p, &t, &t,
+ ATA_TIMING_SETUP | ATA_TIMING_8BIT);
}
}
ali_program_timings(hwif, drive, &t, 0);
Index: b/drivers/ide/amd74xx.c
===================================================================
--- a/drivers/ide/amd74xx.c
+++ b/drivers/ide/amd74xx.c
@@ -48,7 +48,7 @@ static inline u8 amd_offset(struct pci_d
*/
static void amd_set_speed(struct pci_dev *dev, u8 dn, u8 udma_mask,
- struct ide_timing *timing)
+ struct ata_timing *timing)
{
u8 t = 0, offset = amd_offset(dev);
@@ -83,7 +83,7 @@ static void amd_set_drive(ide_hwif_t *hw
{
struct pci_dev *dev = to_pci_dev(hwif->dev);
ide_drive_t *peer = ide_get_pair_dev(drive);
- struct ide_timing t, p;
+ struct ata_timing t, p;
int T, UT;
u8 udma_mask = hwif->ultra_mask;
const u8 speed = drive->dma_mode;
@@ -91,11 +91,12 @@ static void amd_set_drive(ide_hwif_t *hw
T = 1000000000 / amd_clock;
UT = (udma_mask == ATA_UDMA2) ? T : (T / 2);
- ide_timing_compute(drive, speed, &t, T, UT);
+ ata_timing_compute(drive->id, speed, drive->pio_mode, &t, T, UT);
if (peer) {
- ide_timing_compute(peer, peer->pio_mode, &p, T, UT);
- ide_timing_merge(&p, &t, &t, IDE_TIMING_8BIT);
+ ata_timing_compute(peer->id, peer->pio_mode,
+ peer->pio_mode, &p, T, UT);
+ ata_timing_merge(&p, &t, &t, ATA_TIMING_8BIT);
}
if (speed == XFER_UDMA_5 && amd_clock <= 33333) t.udma = 1;
Index: b/drivers/ide/at91_ide.c
===================================================================
--- a/drivers/ide/at91_ide.c
+++ b/drivers/ide/at91_ide.c
@@ -107,7 +107,7 @@ static unsigned int calc_mck_cycles(unsi
}
static void apply_timings(const u8 chipselect, const u8 pio,
- const struct ide_timing *timing, int use_iordy)
+ const struct ata_timing *timing, int use_iordy)
{
unsigned int t0, t1, t2, t6z;
unsigned int cycle, setup, pulse, data_float;
@@ -174,14 +174,14 @@ static void at91_ide_output_data(ide_dri
static void at91_ide_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- struct ide_timing *timing;
+ const struct ata_timing *timing;
u8 chipselect = hwif->select_data;
int use_iordy = 0;
const u8 pio = drive->pio_mode - XFER_PIO_0;
pdbg("chipselect %u pio %u\n", chipselect, pio);
- timing = ide_timing_find_mode(XFER_PIO_0 + pio);
+ timing = ata_timing_find_mode(XFER_PIO_0 + pio);
BUG_ON(!timing);
if (ide_pio_need_iordy(drive, pio))
@@ -311,7 +311,8 @@ static int __init at91_ide_probe(struct
}
/* setup Static Memory Controller - PIO 0 as default */
- apply_timings(board->chipselect, 0, ide_timing_find_mode(XFER_PIO_0), 0);
+ apply_timings(board->chipselect, 0,
+ ata_timing_find_mode(XFER_PIO_0), 0);
/* with GPIO interrupt we have to do quirks in handler */
if (board->irq_pin >= PIN_BASE)
Index: b/drivers/ide/cmd640.c
===================================================================
--- a/drivers/ide/cmd640.c
+++ b/drivers/ide/cmd640.c
@@ -513,7 +513,7 @@ static void program_drive_counts(ide_dri
static void cmd640_set_mode(ide_drive_t *drive, unsigned int index,
u8 pio_mode, unsigned int cycle_time)
{
- struct ide_timing *t;
+ const struct ata_timing *t;
int setup_time, active_time, recovery_time, clock_time;
u8 setup_count, active_count, recovery_count, recovery_count2, cycle_count;
int bus_speed;
@@ -526,7 +526,7 @@ static void cmd640_set_mode(ide_drive_t
if (pio_mode > 5)
pio_mode = 5;
- t = ide_timing_find_mode(XFER_PIO_0 + pio_mode);
+ t = ata_timing_find_mode(XFER_PIO_0 + pio_mode);
setup_time = t->setup;
active_time = t->active;
Index: b/drivers/ide/cmd64x.c
===================================================================
--- a/drivers/ide/cmd64x.c
+++ b/drivers/ide/cmd64x.c
@@ -62,10 +62,10 @@ static void cmd64x_program_timings(ide_d
static const u8 setup_values[] = {0x40, 0x40, 0x40, 0x80, 0, 0xc0};
static const u8 arttim_regs[4] = {ARTTIM0, ARTTIM1, ARTTIM23, ARTTIM23};
static const u8 drwtim_regs[4] = {DRWTIM0, DRWTIM1, DRWTIM2, DRWTIM3};
- struct ide_timing t;
+ struct ata_timing t;
u8 arttim = 0;
- ide_timing_compute(drive, mode, &t, T, 0);
+ ata_timing_compute(drive->id, mode, drive->pio_mode, &t, T, 0);
/*
* In case we've got too long recovery phase, try to lengthen
@@ -98,14 +98,15 @@ static void cmd64x_program_timings(ide_d
ide_drive_t *pair = ide_get_pair_dev(drive);
if (pair) {
- struct ide_timing tp;
+ struct ata_timing tp;
- ide_timing_compute(pair, pair->pio_mode, &tp, T, 0);
- ide_timing_merge(&t, &tp, &t, IDE_TIMING_SETUP);
+ ata_timing_compute(pair->id, pair->pio_mode,
+ pair->pio_mode, &tp, T, 0);
+ ata_timing_merge(&t, &tp, &t, ATA_TIMING_SETUP);
if (pair->dma_mode) {
- ide_timing_compute(pair, pair->dma_mode,
- &tp, T, 0);
- ide_timing_merge(&tp, &t, &t, IDE_TIMING_SETUP);
+ ata_timing_compute(pair->id, pair->dma_mode,
+ pair->pio_mode, &tp, T, 0);
+ ata_timing_merge(&tp, &t, &t, ATA_TIMING_SETUP);
}
}
}
Index: b/drivers/ide/cy82c693.c
===================================================================
--- a/drivers/ide/cy82c693.c
+++ b/drivers/ide/cy82c693.c
@@ -86,8 +86,8 @@ static void cy82c693_set_pio_mode(ide_hw
int bus_speed = ide_pci_clk ? ide_pci_clk : 33;
const unsigned long T = 1000000 / bus_speed;
unsigned int addrCtrl;
- struct ide_timing t;
- u8 time_16, time_8;
+ struct ata_timing t;
+ u8 mode = drive->pio_mode, time_16, time_8;
/* select primary or secondary channel */
if (hwif->index > 0) { /* drive is on the secondary channel */
@@ -100,7 +100,7 @@ static void cy82c693_set_pio_mode(ide_hw
}
}
- ide_timing_compute(drive, drive->pio_mode, &t, T, 1);
+ ata_timing_compute(drive->id, mode, mode, &t, T, 1);
time_16 = clamp_val(t.recover - 1, 0, 15) |
(clamp_val(t.active - 1, 0, 15) << 4);
Index: b/drivers/ide/ht6560b.c
===================================================================
--- a/drivers/ide/ht6560b.c
+++ b/drivers/ide/ht6560b.c
@@ -205,7 +205,8 @@ static u8 ht_pio2timings(ide_drive_t *dr
if (pio) {
unsigned int cycle_time;
- struct ide_timing *t = ide_timing_find_mode(XFER_PIO_0 + pio);
+ const struct ata_timing *t =
+ ata_timing_find_mode(XFER_PIO_0 + pio);
cycle_time = ide_pio_cycle_time(drive, pio);
Index: b/drivers/ide/ide-timings.c
===================================================================
--- a/drivers/ide/ide-timings.c
+++ /dev/null
@@ -1,217 +0,0 @@
-/*
- * Copyright (c) 1999-2001 Vojtech Pavlik
- * Copyright (c) 2007-2008 Bartlomiej Zolnierkiewicz
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- *
- * Should you need to contact me, the author, you can do so either by
- * e-mail - mail your message to <vojtech@ucw.cz>, or by paper mail:
- * Vojtech Pavlik, Simunkova 1594, Prague 8, 182 00 Czech Republic
- */
-
-#include <linux/kernel.h>
-#include <linux/ide.h>
-#include <linux/module.h>
-
-/*
- * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
- * These were taken from ATA/ATAPI-6 standard, rev 0a, except
- * for PIO 5, which is a nonstandard extension and UDMA6, which
- * is currently supported only by Maxtor drives.
- */
-
-static struct ide_timing ide_timing[] = {
-
- { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
- { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
- { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
- { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
-
- { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
- { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
- { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
-
- { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 80, 0 },
- { XFER_MW_DMA_3, 25, 0, 0, 0, 65, 25, 100, 0 },
- { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
- { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
- { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
-
- { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
- { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
- { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
-
- { XFER_PIO_6, 10, 55, 20, 80, 55, 20, 80, 0 },
- { XFER_PIO_5, 15, 65, 25, 100, 65, 25, 100, 0 },
- { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
- { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
-
- { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
- { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
- { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
-
- { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 },
-
- { 0xff }
-};
-
-struct ide_timing *ide_timing_find_mode(u8 speed)
-{
- struct ide_timing *t;
-
- for (t = ide_timing; t->mode != speed; t++)
- if (t->mode == 0xff)
- return NULL;
- return t;
-}
-EXPORT_SYMBOL_GPL(ide_timing_find_mode);
-
-u16 ide_pio_cycle_time(ide_drive_t *drive, u8 pio)
-{
- u16 *id = drive->id;
- struct ide_timing *t = ide_timing_find_mode(XFER_PIO_0 + pio);
- u16 cycle = 0;
-
- if (id[ATA_ID_FIELD_VALID] & 2) {
- if (ata_id_has_iordy(drive->id))
- cycle = id[ATA_ID_EIDE_PIO_IORDY];
- else
- cycle = id[ATA_ID_EIDE_PIO];
-
- /* conservative "downgrade" for all pre-ATA2 drives */
- if (pio < 3 && cycle < t->cycle)
- cycle = 0; /* use standard timing */
-
- /* Use the standard timing for the CF specific modes too */
- if (pio > 4 && ata_id_is_cfa(id))
- cycle = 0;
- }
-
- return cycle ? cycle : t->cycle;
-}
-EXPORT_SYMBOL_GPL(ide_pio_cycle_time);
-
-#define ENOUGH(v, unit) (((v) - 1) / (unit) + 1)
-#define EZ(v, unit) ((v) ? ENOUGH(v, unit) : 0)
-
-static void ide_timing_quantize(struct ide_timing *t, struct ide_timing *q,
- int T, int UT)
-{
- q->setup = EZ(t->setup * 1000, T);
- q->act8b = EZ(t->act8b * 1000, T);
- q->rec8b = EZ(t->rec8b * 1000, T);
- q->cyc8b = EZ(t->cyc8b * 1000, T);
- q->active = EZ(t->active * 1000, T);
- q->recover = EZ(t->recover * 1000, T);
- q->cycle = EZ(t->cycle * 1000, T);
- q->udma = EZ(t->udma * 1000, UT);
-}
-
-void ide_timing_merge(struct ide_timing *a, struct ide_timing *b,
- struct ide_timing *m, unsigned int what)
-{
- if (what & IDE_TIMING_SETUP)
- m->setup = max(a->setup, b->setup);
- if (what & IDE_TIMING_ACT8B)
- m->act8b = max(a->act8b, b->act8b);
- if (what & IDE_TIMING_REC8B)
- m->rec8b = max(a->rec8b, b->rec8b);
- if (what & IDE_TIMING_CYC8B)
- m->cyc8b = max(a->cyc8b, b->cyc8b);
- if (what & IDE_TIMING_ACTIVE)
- m->active = max(a->active, b->active);
- if (what & IDE_TIMING_RECOVER)
- m->recover = max(a->recover, b->recover);
- if (what & IDE_TIMING_CYCLE)
- m->cycle = max(a->cycle, b->cycle);
- if (what & IDE_TIMING_UDMA)
- m->udma = max(a->udma, b->udma);
-}
-EXPORT_SYMBOL_GPL(ide_timing_merge);
-
-int ide_timing_compute(ide_drive_t *drive, u8 speed,
- struct ide_timing *t, int T, int UT)
-{
- u16 *id = drive->id;
- struct ide_timing *s, p;
-
- /*
- * Find the mode.
- */
- s = ide_timing_find_mode(speed);
- if (s == NULL)
- return -EINVAL;
-
- /*
- * Copy the timing from the table.
- */
- *t = *s;
-
- /*
- * If the drive is an EIDE drive, it can tell us it needs extended
- * PIO/MWDMA cycle timing.
- */
- if (id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
- memset(&p, 0, sizeof(p));
-
- if (speed >= XFER_PIO_0 && speed < XFER_SW_DMA_0) {
- if (speed <= XFER_PIO_2)
- p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO];
- else if ((speed <= XFER_PIO_4) ||
- (speed == XFER_PIO_5 && !ata_id_is_cfa(id)))
- p.cycle = p.cyc8b = id[ATA_ID_EIDE_PIO_IORDY];
- } else if (speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2)
- p.cycle = id[ATA_ID_EIDE_DMA_MIN];
-
- ide_timing_merge(&p, t, t, IDE_TIMING_CYCLE | IDE_TIMING_CYC8B);
- }
-
- /*
- * Convert the timing to bus clock counts.
- */
- ide_timing_quantize(t, t, T, UT);
-
- /*
- * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
- * S.M.A.R.T and some other commands. We have to ensure that the
- * DMA cycle timing is slower/equal than the fastest PIO timing.
- */
- if (speed >= XFER_SW_DMA_0) {
- ide_timing_compute(drive, drive->pio_mode, &p, T, UT);
- ide_timing_merge(&p, t, t, IDE_TIMING_ALL);
- }
-
- /*
- * Lengthen active & recovery time so that cycle time is correct.
- */
- if (t->act8b + t->rec8b < t->cyc8b) {
- t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
- t->rec8b = t->cyc8b - t->act8b;
- }
-
- if (t->active + t->recover < t->cycle) {
- t->active += (t->cycle - (t->active + t->recover)) / 2;
- t->recover = t->cycle - t->active;
- }
-
- /* In a few cases quantisation may produce enough errors to
- leave t->cycle too low for the sum of active and recovery
- if so we must correct this */
- if (t->active + t->recover > t->cycle)
- t->cycle = t->active + t->recover;
-
- return 0;
-}
-EXPORT_SYMBOL_GPL(ide_timing_compute);
Index: b/drivers/ide/ide-xfer-mode.c
===================================================================
--- a/drivers/ide/ide-xfer-mode.c
+++ b/drivers/ide/ide-xfer-mode.c
@@ -118,6 +118,31 @@ int ide_pio_need_iordy(ide_drive_t *driv
}
EXPORT_SYMBOL_GPL(ide_pio_need_iordy);
+u16 ide_pio_cycle_time(ide_drive_t *drive, u8 pio)
+{
+ u16 *id = drive->id;
+ const struct ata_timing *t = ata_timing_find_mode(XFER_PIO_0 + pio);
+ u16 cycle = 0;
+
+ if (id[ATA_ID_FIELD_VALID] & 2) {
+ if (ata_id_has_iordy(drive->id))
+ cycle = id[ATA_ID_EIDE_PIO_IORDY];
+ else
+ cycle = id[ATA_ID_EIDE_PIO];
+
+ /* conservative "downgrade" for all pre-ATA2 drives */
+ if (pio < 3 && cycle < t->cycle)
+ cycle = 0; /* use standard timing */
+
+ /* Use the standard timing for the CF specific modes too */
+ if (pio > 4 && ata_id_is_cfa(id))
+ cycle = 0;
+ }
+
+ return cycle ? cycle : t->cycle;
+}
+EXPORT_SYMBOL_GPL(ide_pio_cycle_time);
+
int ide_set_pio_mode(ide_drive_t *drive, const u8 mode)
{
ide_hwif_t *hwif = drive->hwif;
Index: b/drivers/ide/palm_bk3710.c
===================================================================
--- a/drivers/ide/palm_bk3710.c
+++ b/drivers/ide/palm_bk3710.c
@@ -112,13 +112,12 @@ static void palm_bk3710_setdmamode(void
unsigned short min_cycle,
unsigned int mode)
{
+ const struct ata_timing *t = ata_timing_find_mode(mode);
u8 td, tkw, t0;
u32 val32;
u16 val16;
- struct ide_timing *t;
int cycletime;
- t = ide_timing_find_mode(mode);
cycletime = max_t(int, t->cycle, min_cycle);
/* DMA Data Setup */
@@ -144,11 +143,9 @@ static void palm_bk3710_setpiomode(void
unsigned int dev, unsigned int cycletime,
unsigned int mode)
{
+ const struct ata_timing *t = ata_timing_find_mode(XFER_PIO_0 + mode);
u8 t2, t2i, t0;
u32 val32;
- struct ide_timing *t;
-
- t = ide_timing_find_mode(XFER_PIO_0 + mode);
/* PIO Data Setup */
t0 = DIV_ROUND_UP(cycletime, ideclk_period);
Index: b/drivers/ide/pmac.c
===================================================================
--- a/drivers/ide/pmac.c
+++ b/drivers/ide/pmac.c
@@ -503,7 +503,7 @@ static void pmac_ide_set_pio_mode(ide_hw
pmac_ide_hwif_t *pmif =
(pmac_ide_hwif_t *)dev_get_drvdata(hwif->gendev.parent);
const u8 pio = drive->pio_mode - XFER_PIO_0;
- struct ide_timing *tim = ide_timing_find_mode(XFER_PIO_0 + pio);
+ const struct ata_timing *tim = ata_timing_find_mode(XFER_PIO_0 + pio);
u32 *timings, t;
unsigned accessTicks, recTicks;
unsigned accessTime, recTime;
@@ -612,7 +612,7 @@ set_timings_udma_ata4(u32 *timings, u8 s
static int
set_timings_udma_ata6(u32 *pio_timings, u32 *ultra_timings, u8 speed)
{
- struct ide_timing *t = ide_timing_find_mode(speed);
+ const struct ata_timing *t = ata_timing_find_mode(speed);
u32 tr;
if (speed > XFER_UDMA_5 || t == NULL)
@@ -630,7 +630,7 @@ set_timings_udma_ata6(u32 *pio_timings,
static int
set_timings_udma_shasta(u32 *pio_timings, u32 *ultra_timings, u8 speed)
{
- struct ide_timing *t = ide_timing_find_mode(speed);
+ const struct ata_timing *t = ata_timing_find_mode(speed);
u32 tr;
if (speed > XFER_UDMA_6 || t == NULL)
Index: b/drivers/ide/qd65xx.c
===================================================================
--- a/drivers/ide/qd65xx.c
+++ b/drivers/ide/qd65xx.c
@@ -212,7 +212,7 @@ static void qd6500_set_pio_mode(ide_hwif
static void qd6580_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
const u8 pio = drive->pio_mode - XFER_PIO_0;
- struct ide_timing *t = ide_timing_find_mode(XFER_PIO_0 + pio);
+ const struct ata_timing *t = ata_timing_find_mode(XFER_PIO_0 + pio);
unsigned int cycle_time;
int active_time = 175;
int recovery_time = 415; /* worst case values from the dos driver */
Index: b/drivers/ide/sl82c105.c
===================================================================
--- a/drivers/ide/sl82c105.c
+++ b/drivers/ide/sl82c105.c
@@ -41,7 +41,7 @@
*/
static unsigned int get_pio_timings(ide_drive_t *drive, u8 pio)
{
- struct ide_timing *t = ide_timing_find_mode(XFER_PIO_0 + pio);
+ const struct ata_timing *t = ata_timing_find_mode(XFER_PIO_0 + pio);
unsigned int cmd_on, cmd_off;
u8 iordy = 0;
Index: b/drivers/ide/tx4938ide.c
===================================================================
--- a/drivers/ide/tx4938ide.c
+++ b/drivers/ide/tx4938ide.c
@@ -23,7 +23,7 @@ static void tx4938ide_tune_ebusc(unsigne
unsigned int gbus_clock,
u8 pio)
{
- struct ide_timing *t = ide_timing_find_mode(XFER_PIO_0 + pio);
+ const struct ata_timing *t = ata_timing_find_mode(XFER_PIO_0 + pio);
u64 cr = __raw_readq(&tx4938_ebuscptr->cr[ebus_ch]);
unsigned int sp = (cr >> 4) & 3;
unsigned int clock = gbus_clock / (4 - sp);
Index: b/drivers/ide/via82cxxx.c
===================================================================
--- a/drivers/ide/via82cxxx.c
+++ b/drivers/ide/via82cxxx.c
@@ -122,7 +122,7 @@ struct via82cxxx_dev
* via_set_speed writes timing values to the chipset registers
*/
-static void via_set_speed(ide_hwif_t *hwif, u8 dn, struct ide_timing *timing)
+static void via_set_speed(ide_hwif_t *hwif, u8 dn, struct ata_timing *timing)
{
struct pci_dev *dev = to_pci_dev(hwif->dev);
struct ide_host *host = pci_get_drvdata(dev);
@@ -182,7 +182,7 @@ static void via_set_drive(ide_hwif_t *hw
struct pci_dev *dev = to_pci_dev(hwif->dev);
struct ide_host *host = pci_get_drvdata(dev);
struct via82cxxx_dev *vdev = host->host_priv;
- struct ide_timing t, p;
+ struct ata_timing t, p;
unsigned int T, UT;
const u8 speed = drive->dma_mode;
@@ -196,11 +196,12 @@ static void via_set_drive(ide_hwif_t *hw
default: UT = T;
}
- ide_timing_compute(drive, speed, &t, T, UT);
+ ata_timing_compute(drive->id, speed, drive->pio_mode, &t, T, UT);
if (peer) {
- ide_timing_compute(peer, peer->pio_mode, &p, T, UT);
- ide_timing_merge(&p, &t, &t, IDE_TIMING_8BIT);
+ ata_timing_compute(peer->id, peer->pio_mode,
+ peer->pio_mode, &p, T, UT);
+ ata_timing_merge(&p, &t, &t, ATA_TIMING_8BIT);
}
via_set_speed(hwif, drive->dn, &t);
Index: b/include/linux/ide.h
===================================================================
--- a/include/linux/ide.h
+++ b/include/linux/ide.h
@@ -1459,44 +1459,11 @@ extern void ide_toggle_bounce(ide_drive_
u64 ide_get_lba_addr(struct ide_cmd *, int);
u8 ide_dump_status(ide_drive_t *, const char *, u8);
-struct ide_timing {
- u8 mode;
- u8 setup; /* t1 */
- u16 act8b; /* t2 for 8-bit io */
- u16 rec8b; /* t2i for 8-bit io */
- u16 cyc8b; /* t0 for 8-bit io */
- u16 active; /* t2 or tD */
- u16 recover; /* t2i or tK */
- u16 cycle; /* t0 */
- u16 udma; /* t2CYCTYP/2 */
-};
-
-enum {
- IDE_TIMING_SETUP = (1 << 0),
- IDE_TIMING_ACT8B = (1 << 1),
- IDE_TIMING_REC8B = (1 << 2),
- IDE_TIMING_CYC8B = (1 << 3),
- IDE_TIMING_8BIT = IDE_TIMING_ACT8B | IDE_TIMING_REC8B |
- IDE_TIMING_CYC8B,
- IDE_TIMING_ACTIVE = (1 << 4),
- IDE_TIMING_RECOVER = (1 << 5),
- IDE_TIMING_CYCLE = (1 << 6),
- IDE_TIMING_UDMA = (1 << 7),
- IDE_TIMING_ALL = IDE_TIMING_SETUP | IDE_TIMING_8BIT |
- IDE_TIMING_ACTIVE | IDE_TIMING_RECOVER |
- IDE_TIMING_CYCLE | IDE_TIMING_UDMA,
-};
-
-struct ide_timing *ide_timing_find_mode(u8);
-u16 ide_pio_cycle_time(ide_drive_t *, u8);
-void ide_timing_merge(struct ide_timing *, struct ide_timing *,
- struct ide_timing *, unsigned int);
-int ide_timing_compute(ide_drive_t *, u8, struct ide_timing *, int, int);
-
#ifdef CONFIG_IDE_XFER_MODE
int ide_scan_pio_blacklist(char *);
const char *ide_xfer_verbose(u8);
int ide_pio_need_iordy(ide_drive_t *, const u8);
+u16 ide_pio_cycle_time(ide_drive_t *, u8);
int ide_set_pio_mode(ide_drive_t *, u8);
int ide_set_dma_mode(ide_drive_t *, u8);
void ide_set_pio(ide_drive_t *, u8);
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 07/68] pata_pcmcia: move IDs table to pata_pcmcia.h
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (5 preceding siblings ...)
2010-01-29 16:03 ` [PATCH 06/68] ide: switch to generic ATA timings code Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:03 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:04 ` [PATCH 08/68] ide-cs: use pata_pcmcia.h Bartlomiej Zolnierkiewicz
` (61 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:03 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] pata_pcmcia: move IDs table to pata_pcmcia.h
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ata/pata_pcmcia.c | 67 ----------------------------------------------
drivers/ata/pata_pcmcia.h | 66 +++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 67 insertions(+), 66 deletions(-)
Index: b/drivers/ata/pata_pcmcia.c
===================================================================
--- a/drivers/ata/pata_pcmcia.c
+++ b/drivers/ata/pata_pcmcia.c
@@ -388,72 +388,7 @@ static void pcmcia_remove_one(struct pcm
kfree(info);
}
-static struct pcmcia_device_id pcmcia_devices[] = {
- PCMCIA_DEVICE_FUNC_ID(4),
- PCMCIA_DEVICE_MANF_CARD(0x0000, 0x0000), /* Corsair */
- PCMCIA_DEVICE_MANF_CARD(0x0007, 0x0000), /* Hitachi */
- PCMCIA_DEVICE_MANF_CARD(0x000a, 0x0000), /* I-O Data CFA */
- PCMCIA_DEVICE_MANF_CARD(0x001c, 0x0001), /* Mitsubishi CFA */
- PCMCIA_DEVICE_MANF_CARD(0x0032, 0x0704),
- PCMCIA_DEVICE_MANF_CARD(0x0032, 0x2904),
- PCMCIA_DEVICE_MANF_CARD(0x0045, 0x0401), /* SanDisk CFA */
- PCMCIA_DEVICE_MANF_CARD(0x004f, 0x0000), /* Kingston */
- PCMCIA_DEVICE_MANF_CARD(0x0097, 0x1620), /* TI emulated */
- PCMCIA_DEVICE_MANF_CARD(0x0098, 0x0000), /* Toshiba */
- PCMCIA_DEVICE_MANF_CARD(0x00a4, 0x002d),
- PCMCIA_DEVICE_MANF_CARD(0x00ce, 0x0000), /* Samsung */
- PCMCIA_DEVICE_MANF_CARD(0x0319, 0x0000), /* Hitachi */
- PCMCIA_DEVICE_MANF_CARD(0x2080, 0x0001),
- PCMCIA_DEVICE_MANF_CARD(0x4e01, 0x0100), /* Viking CFA */
- PCMCIA_DEVICE_MANF_CARD(0x4e01, 0x0200), /* Lexar, Viking CFA */
- PCMCIA_DEVICE_PROD_ID123("Caravelle", "PSC-IDE ", "PSC000", 0x8c36137c, 0xd0693ab8, 0x2768a9f0),
- PCMCIA_DEVICE_PROD_ID123("CDROM", "IDE", "MCD-601p", 0x1b9179ca, 0xede88951, 0x0d902f74),
- PCMCIA_DEVICE_PROD_ID123("PCMCIA", "IDE CARD", "F1", 0x281f1c5d, 0x1907960c, 0xf7fde8b9),
- PCMCIA_DEVICE_PROD_ID12("ARGOSY", "CD-ROM", 0x78f308dc, 0x66536591),
- PCMCIA_DEVICE_PROD_ID12("ARGOSY", "PnPIDE", 0x78f308dc, 0x0c694728),
- PCMCIA_DEVICE_PROD_ID12("CNF ", "CD-ROM", 0x46d7db81, 0x66536591),
- PCMCIA_DEVICE_PROD_ID12("CNF CD-M", "CD-ROM", 0x7d93b852, 0x66536591),
- PCMCIA_DEVICE_PROD_ID12("Creative Technology Ltd.", "PCMCIA CD-ROM Interface Card", 0xff8c8a45, 0xfe8020c4),
- PCMCIA_DEVICE_PROD_ID12("Digital Equipment Corporation.", "Digital Mobile Media CD-ROM", 0x17692a66, 0xef1dcbde),
- PCMCIA_DEVICE_PROD_ID12("EXP", "CD+GAME", 0x6f58c983, 0x63c13aaf),
- PCMCIA_DEVICE_PROD_ID12("EXP ", "CD-ROM", 0x0a5c52fd, 0x66536591),
- PCMCIA_DEVICE_PROD_ID12("EXP ", "PnPIDE", 0x0a5c52fd, 0x0c694728),
- PCMCIA_DEVICE_PROD_ID12("FREECOM", "PCCARD-IDE", 0x5714cbf7, 0x48e0ab8e),
- PCMCIA_DEVICE_PROD_ID12("HITACHI", "FLASH", 0xf4f43949, 0x9eb86aae),
- PCMCIA_DEVICE_PROD_ID12("HITACHI", "microdrive", 0xf4f43949, 0xa6d76178),
- PCMCIA_DEVICE_PROD_ID12("Hyperstone", "Model1", 0x3d5b9ef5, 0xca6ab420),
- PCMCIA_DEVICE_PROD_ID12("IBM", "microdrive", 0xb569a6e5, 0xa6d76178),
- PCMCIA_DEVICE_PROD_ID12("IBM", "IBM17JSSFP20", 0xb569a6e5, 0xf2508753),
- PCMCIA_DEVICE_PROD_ID12("KINGSTON", "CF8GB", 0x2e6d1829, 0xacbe682e),
- PCMCIA_DEVICE_PROD_ID12("IO DATA", "CBIDE2 ", 0x547e66dc, 0x8671043b),
- PCMCIA_DEVICE_PROD_ID12("IO DATA", "PCIDE", 0x547e66dc, 0x5c5ab149),
- PCMCIA_DEVICE_PROD_ID12("IO DATA", "PCIDEII", 0x547e66dc, 0xb3662674),
- PCMCIA_DEVICE_PROD_ID12("LOOKMEET", "CBIDE2 ", 0xe37be2b5, 0x8671043b),
- PCMCIA_DEVICE_PROD_ID12("M-Systems", "CF300", 0x7ed2ad87, 0x7e9e78ee),
- PCMCIA_DEVICE_PROD_ID12("M-Systems", "CF500", 0x7ed2ad87, 0x7a13045c),
- PCMCIA_DEVICE_PROD_ID2("NinjaATA-", 0xebe0bd79),
- PCMCIA_DEVICE_PROD_ID12("PCMCIA", "CD-ROM", 0x281f1c5d, 0x66536591),
- PCMCIA_DEVICE_PROD_ID12("PCMCIA", "PnPIDE", 0x281f1c5d, 0x0c694728),
- PCMCIA_DEVICE_PROD_ID12("SHUTTLE TECHNOLOGY LTD.", "PCCARD-IDE/ATAPI Adapter", 0x4a3f0ba0, 0x322560e1),
- PCMCIA_DEVICE_PROD_ID12("SEAGATE", "ST1", 0x87c1b330, 0xe1f30883),
- PCMCIA_DEVICE_PROD_ID12("SAMSUNG", "04/05/06", 0x43d74cb4, 0x6a22777d),
- PCMCIA_DEVICE_PROD_ID12("SMI VENDOR", "SMI PRODUCT", 0x30896c92, 0x703cc5f6),
- PCMCIA_DEVICE_PROD_ID12("TOSHIBA", "MK2001MPL", 0xb4585a1a, 0x3489e003),
- PCMCIA_DEVICE_PROD_ID1("TRANSCEND 512M ", 0xd0909443),
- PCMCIA_DEVICE_PROD_ID12("TRANSCEND", "TS1GCF45", 0x709b1bf1, 0xf68b6f32),
- PCMCIA_DEVICE_PROD_ID12("TRANSCEND", "TS1GCF80", 0x709b1bf1, 0x2a54d4b1),
- PCMCIA_DEVICE_PROD_ID12("TRANSCEND", "TS2GCF120", 0x709b1bf1, 0x969aa4f2),
- PCMCIA_DEVICE_PROD_ID12("TRANSCEND", "TS4GCF120", 0x709b1bf1, 0xf54a91c8),
- PCMCIA_DEVICE_PROD_ID12("WIT", "IDE16", 0x244e5994, 0x3e232852),
- PCMCIA_DEVICE_PROD_ID12("WEIDA", "TWTTI", 0xcc7cf69c, 0x212bb918),
- PCMCIA_DEVICE_PROD_ID1("STI Flash", 0xe4a13209),
- PCMCIA_DEVICE_PROD_ID12("STI", "Flash 5.0", 0xbf2df18d, 0x8cb57a0e),
- PCMCIA_MFC_DEVICE_PROD_ID12(1, "SanDisk", "ConnectPlus", 0x7a954bd9, 0x74be00c6),
- PCMCIA_DEVICE_PROD_ID2("Flash Card", 0x5a362506),
- PCMCIA_DEVICE_NULL,
-};
-
-MODULE_DEVICE_TABLE(pcmcia, pcmcia_devices);
+#include "pata_pcmcia.h"
static struct pcmcia_driver pcmcia_driver = {
.owner = THIS_MODULE,
Index: b/drivers/ata/pata_pcmcia.h
===================================================================
--- /dev/null
+++ b/drivers/ata/pata_pcmcia.h
@@ -0,0 +1,66 @@
+
+static struct pcmcia_device_id pcmcia_devices[] = {
+ PCMCIA_DEVICE_FUNC_ID(4),
+ PCMCIA_DEVICE_MANF_CARD(0x0000, 0x0000), /* Corsair */
+ PCMCIA_DEVICE_MANF_CARD(0x0007, 0x0000), /* Hitachi */
+ PCMCIA_DEVICE_MANF_CARD(0x000a, 0x0000), /* I-O Data CFA */
+ PCMCIA_DEVICE_MANF_CARD(0x001c, 0x0001), /* Mitsubishi CFA */
+ PCMCIA_DEVICE_MANF_CARD(0x0032, 0x0704),
+ PCMCIA_DEVICE_MANF_CARD(0x0032, 0x2904),
+ PCMCIA_DEVICE_MANF_CARD(0x0045, 0x0401), /* SanDisk CFA */
+ PCMCIA_DEVICE_MANF_CARD(0x004f, 0x0000), /* Kingston */
+ PCMCIA_DEVICE_MANF_CARD(0x0097, 0x1620), /* TI emulated */
+ PCMCIA_DEVICE_MANF_CARD(0x0098, 0x0000), /* Toshiba */
+ PCMCIA_DEVICE_MANF_CARD(0x00a4, 0x002d),
+ PCMCIA_DEVICE_MANF_CARD(0x00ce, 0x0000), /* Samsung */
+ PCMCIA_DEVICE_MANF_CARD(0x0319, 0x0000), /* Hitachi */
+ PCMCIA_DEVICE_MANF_CARD(0x2080, 0x0001),
+ PCMCIA_DEVICE_MANF_CARD(0x4e01, 0x0100), /* Viking CFA */
+ PCMCIA_DEVICE_MANF_CARD(0x4e01, 0x0200), /* Lexar, Viking CFA */
+ PCMCIA_DEVICE_PROD_ID123("Caravelle", "PSC-IDE ", "PSC000", 0x8c36137c, 0xd0693ab8, 0x2768a9f0),
+ PCMCIA_DEVICE_PROD_ID123("CDROM", "IDE", "MCD-601p", 0x1b9179ca, 0xede88951, 0x0d902f74),
+ PCMCIA_DEVICE_PROD_ID123("PCMCIA", "IDE CARD", "F1", 0x281f1c5d, 0x1907960c, 0xf7fde8b9),
+ PCMCIA_DEVICE_PROD_ID12("ARGOSY", "CD-ROM", 0x78f308dc, 0x66536591),
+ PCMCIA_DEVICE_PROD_ID12("ARGOSY", "PnPIDE", 0x78f308dc, 0x0c694728),
+ PCMCIA_DEVICE_PROD_ID12("CNF ", "CD-ROM", 0x46d7db81, 0x66536591),
+ PCMCIA_DEVICE_PROD_ID12("CNF CD-M", "CD-ROM", 0x7d93b852, 0x66536591),
+ PCMCIA_DEVICE_PROD_ID12("Creative Technology Ltd.", "PCMCIA CD-ROM Interface Card", 0xff8c8a45, 0xfe8020c4),
+ PCMCIA_DEVICE_PROD_ID12("Digital Equipment Corporation.", "Digital Mobile Media CD-ROM", 0x17692a66, 0xef1dcbde),
+ PCMCIA_DEVICE_PROD_ID12("EXP", "CD+GAME", 0x6f58c983, 0x63c13aaf),
+ PCMCIA_DEVICE_PROD_ID12("EXP ", "CD-ROM", 0x0a5c52fd, 0x66536591),
+ PCMCIA_DEVICE_PROD_ID12("EXP ", "PnPIDE", 0x0a5c52fd, 0x0c694728),
+ PCMCIA_DEVICE_PROD_ID12("FREECOM", "PCCARD-IDE", 0x5714cbf7, 0x48e0ab8e),
+ PCMCIA_DEVICE_PROD_ID12("HITACHI", "FLASH", 0xf4f43949, 0x9eb86aae),
+ PCMCIA_DEVICE_PROD_ID12("HITACHI", "microdrive", 0xf4f43949, 0xa6d76178),
+ PCMCIA_DEVICE_PROD_ID12("Hyperstone", "Model1", 0x3d5b9ef5, 0xca6ab420),
+ PCMCIA_DEVICE_PROD_ID12("IBM", "microdrive", 0xb569a6e5, 0xa6d76178),
+ PCMCIA_DEVICE_PROD_ID12("IBM", "IBM17JSSFP20", 0xb569a6e5, 0xf2508753),
+ PCMCIA_DEVICE_PROD_ID12("KINGSTON", "CF8GB", 0x2e6d1829, 0xacbe682e),
+ PCMCIA_DEVICE_PROD_ID12("IO DATA", "CBIDE2 ", 0x547e66dc, 0x8671043b),
+ PCMCIA_DEVICE_PROD_ID12("IO DATA", "PCIDE", 0x547e66dc, 0x5c5ab149),
+ PCMCIA_DEVICE_PROD_ID12("IO DATA", "PCIDEII", 0x547e66dc, 0xb3662674),
+ PCMCIA_DEVICE_PROD_ID12("LOOKMEET", "CBIDE2 ", 0xe37be2b5, 0x8671043b),
+ PCMCIA_DEVICE_PROD_ID12("M-Systems", "CF300", 0x7ed2ad87, 0x7e9e78ee),
+ PCMCIA_DEVICE_PROD_ID12("M-Systems", "CF500", 0x7ed2ad87, 0x7a13045c),
+ PCMCIA_DEVICE_PROD_ID2("NinjaATA-", 0xebe0bd79),
+ PCMCIA_DEVICE_PROD_ID12("PCMCIA", "CD-ROM", 0x281f1c5d, 0x66536591),
+ PCMCIA_DEVICE_PROD_ID12("PCMCIA", "PnPIDE", 0x281f1c5d, 0x0c694728),
+ PCMCIA_DEVICE_PROD_ID12("SHUTTLE TECHNOLOGY LTD.", "PCCARD-IDE/ATAPI Adapter", 0x4a3f0ba0, 0x322560e1),
+ PCMCIA_DEVICE_PROD_ID12("SEAGATE", "ST1", 0x87c1b330, 0xe1f30883),
+ PCMCIA_DEVICE_PROD_ID12("SAMSUNG", "04/05/06", 0x43d74cb4, 0x6a22777d),
+ PCMCIA_DEVICE_PROD_ID12("SMI VENDOR", "SMI PRODUCT", 0x30896c92, 0x703cc5f6),
+ PCMCIA_DEVICE_PROD_ID12("TOSHIBA", "MK2001MPL", 0xb4585a1a, 0x3489e003),
+ PCMCIA_DEVICE_PROD_ID1("TRANSCEND 512M ", 0xd0909443),
+ PCMCIA_DEVICE_PROD_ID12("TRANSCEND", "TS1GCF45", 0x709b1bf1, 0xf68b6f32),
+ PCMCIA_DEVICE_PROD_ID12("TRANSCEND", "TS1GCF80", 0x709b1bf1, 0x2a54d4b1),
+ PCMCIA_DEVICE_PROD_ID12("TRANSCEND", "TS2GCF120", 0x709b1bf1, 0x969aa4f2),
+ PCMCIA_DEVICE_PROD_ID12("TRANSCEND", "TS4GCF120", 0x709b1bf1, 0xf54a91c8),
+ PCMCIA_DEVICE_PROD_ID12("WIT", "IDE16", 0x244e5994, 0x3e232852),
+ PCMCIA_DEVICE_PROD_ID12("WEIDA", "TWTTI", 0xcc7cf69c, 0x212bb918),
+ PCMCIA_DEVICE_PROD_ID1("STI Flash", 0xe4a13209),
+ PCMCIA_DEVICE_PROD_ID12("STI", "Flash 5.0", 0xbf2df18d, 0x8cb57a0e),
+ PCMCIA_MFC_DEVICE_PROD_ID12(1, "SanDisk", "ConnectPlus", 0x7a954bd9, 0x74be00c6),
+ PCMCIA_DEVICE_PROD_ID2("Flash Card", 0x5a362506),
+ PCMCIA_DEVICE_NULL,
+};
+MODULE_DEVICE_TABLE(pcmcia, pcmcia_devices);
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 08/68] ide-cs: use pata_pcmcia.h
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (6 preceding siblings ...)
2010-01-29 16:03 ` [PATCH 07/68] pata_pcmcia: move IDs table to pata_pcmcia.h Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:04 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:04 ` [PATCH 09/68] ata_piix: factor out short cable detection code to ich_short_ata40() Bartlomiej Zolnierkiewicz
` (60 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:04 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] ide-cs: use pata_pcmcia.h
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ide/ide-cs.c | 68 +--------------------------------------------------
1 file changed, 2 insertions(+), 66 deletions(-)
Index: b/drivers/ide/ide-cs.c
===================================================================
--- a/drivers/ide/ide-cs.c
+++ b/drivers/ide/ide-cs.c
@@ -385,71 +385,7 @@ static void ide_release(struct pcmcia_de
======================================================================*/
-static struct pcmcia_device_id ide_ids[] = {
- PCMCIA_DEVICE_FUNC_ID(4),
- PCMCIA_DEVICE_MANF_CARD(0x0000, 0x0000), /* Corsair */
- PCMCIA_DEVICE_MANF_CARD(0x0007, 0x0000), /* Hitachi */
- PCMCIA_DEVICE_MANF_CARD(0x000a, 0x0000), /* I-O Data CFA */
- PCMCIA_DEVICE_MANF_CARD(0x001c, 0x0001), /* Mitsubishi CFA */
- PCMCIA_DEVICE_MANF_CARD(0x0032, 0x0704),
- PCMCIA_DEVICE_MANF_CARD(0x0032, 0x2904),
- PCMCIA_DEVICE_MANF_CARD(0x0045, 0x0401), /* SanDisk CFA */
- PCMCIA_DEVICE_MANF_CARD(0x004f, 0x0000), /* Kingston */
- PCMCIA_DEVICE_MANF_CARD(0x0097, 0x1620), /* TI emulated */
- PCMCIA_DEVICE_MANF_CARD(0x0098, 0x0000), /* Toshiba */
- PCMCIA_DEVICE_MANF_CARD(0x00a4, 0x002d),
- PCMCIA_DEVICE_MANF_CARD(0x00ce, 0x0000), /* Samsung */
- PCMCIA_DEVICE_MANF_CARD(0x0319, 0x0000), /* Hitachi */
- PCMCIA_DEVICE_MANF_CARD(0x2080, 0x0001),
- PCMCIA_DEVICE_MANF_CARD(0x4e01, 0x0100), /* Viking CFA */
- PCMCIA_DEVICE_MANF_CARD(0x4e01, 0x0200), /* Lexar, Viking CFA */
- PCMCIA_DEVICE_PROD_ID123("Caravelle", "PSC-IDE ", "PSC000", 0x8c36137c, 0xd0693ab8, 0x2768a9f0),
- PCMCIA_DEVICE_PROD_ID123("CDROM", "IDE", "MCD-601p", 0x1b9179ca, 0xede88951, 0x0d902f74),
- PCMCIA_DEVICE_PROD_ID123("PCMCIA", "IDE CARD", "F1", 0x281f1c5d, 0x1907960c, 0xf7fde8b9),
- PCMCIA_DEVICE_PROD_ID12("ARGOSY", "CD-ROM", 0x78f308dc, 0x66536591),
- PCMCIA_DEVICE_PROD_ID12("ARGOSY", "PnPIDE", 0x78f308dc, 0x0c694728),
- PCMCIA_DEVICE_PROD_ID12("CNF ", "CD-ROM", 0x46d7db81, 0x66536591),
- PCMCIA_DEVICE_PROD_ID12("CNF CD-M", "CD-ROM", 0x7d93b852, 0x66536591),
- PCMCIA_DEVICE_PROD_ID12("Creative Technology Ltd.", "PCMCIA CD-ROM Interface Card", 0xff8c8a45, 0xfe8020c4),
- PCMCIA_DEVICE_PROD_ID12("Digital Equipment Corporation.", "Digital Mobile Media CD-ROM", 0x17692a66, 0xef1dcbde),
- PCMCIA_DEVICE_PROD_ID12("EXP", "CD+GAME", 0x6f58c983, 0x63c13aaf),
- PCMCIA_DEVICE_PROD_ID12("EXP ", "CD-ROM", 0x0a5c52fd, 0x66536591),
- PCMCIA_DEVICE_PROD_ID12("EXP ", "PnPIDE", 0x0a5c52fd, 0x0c694728),
- PCMCIA_DEVICE_PROD_ID12("FREECOM", "PCCARD-IDE", 0x5714cbf7, 0x48e0ab8e),
- PCMCIA_DEVICE_PROD_ID12("HITACHI", "FLASH", 0xf4f43949, 0x9eb86aae),
- PCMCIA_DEVICE_PROD_ID12("HITACHI", "microdrive", 0xf4f43949, 0xa6d76178),
- PCMCIA_DEVICE_PROD_ID12("Hyperstone", "Model1", 0x3d5b9ef5, 0xca6ab420),
- PCMCIA_DEVICE_PROD_ID12("IBM", "microdrive", 0xb569a6e5, 0xa6d76178),
- PCMCIA_DEVICE_PROD_ID12("IBM", "IBM17JSSFP20", 0xb569a6e5, 0xf2508753),
- PCMCIA_DEVICE_PROD_ID12("KINGSTON", "CF8GB", 0x2e6d1829, 0xacbe682e),
- PCMCIA_DEVICE_PROD_ID12("IO DATA", "CBIDE2 ", 0x547e66dc, 0x8671043b),
- PCMCIA_DEVICE_PROD_ID12("IO DATA", "PCIDE", 0x547e66dc, 0x5c5ab149),
- PCMCIA_DEVICE_PROD_ID12("IO DATA", "PCIDEII", 0x547e66dc, 0xb3662674),
- PCMCIA_DEVICE_PROD_ID12("LOOKMEET", "CBIDE2 ", 0xe37be2b5, 0x8671043b),
- PCMCIA_DEVICE_PROD_ID12("M-Systems", "CF300", 0x7ed2ad87, 0x7e9e78ee),
- PCMCIA_DEVICE_PROD_ID12("M-Systems", "CF500", 0x7ed2ad87, 0x7a13045c),
- PCMCIA_DEVICE_PROD_ID2("NinjaATA-", 0xebe0bd79),
- PCMCIA_DEVICE_PROD_ID12("PCMCIA", "CD-ROM", 0x281f1c5d, 0x66536591),
- PCMCIA_DEVICE_PROD_ID12("PCMCIA", "PnPIDE", 0x281f1c5d, 0x0c694728),
- PCMCIA_DEVICE_PROD_ID12("SHUTTLE TECHNOLOGY LTD.", "PCCARD-IDE/ATAPI Adapter", 0x4a3f0ba0, 0x322560e1),
- PCMCIA_DEVICE_PROD_ID12("SEAGATE", "ST1", 0x87c1b330, 0xe1f30883),
- PCMCIA_DEVICE_PROD_ID12("SAMSUNG", "04/05/06", 0x43d74cb4, 0x6a22777d),
- PCMCIA_DEVICE_PROD_ID12("SMI VENDOR", "SMI PRODUCT", 0x30896c92, 0x703cc5f6),
- PCMCIA_DEVICE_PROD_ID12("TOSHIBA", "MK2001MPL", 0xb4585a1a, 0x3489e003),
- PCMCIA_DEVICE_PROD_ID1("TRANSCEND 512M ", 0xd0909443),
- PCMCIA_DEVICE_PROD_ID12("TRANSCEND", "TS1GCF45", 0x709b1bf1, 0xf68b6f32),
- PCMCIA_DEVICE_PROD_ID12("TRANSCEND", "TS1GCF80", 0x709b1bf1, 0x2a54d4b1),
- PCMCIA_DEVICE_PROD_ID12("TRANSCEND", "TS2GCF120", 0x709b1bf1, 0x969aa4f2),
- PCMCIA_DEVICE_PROD_ID12("TRANSCEND", "TS4GCF120", 0x709b1bf1, 0xf54a91c8),
- PCMCIA_DEVICE_PROD_ID12("WIT", "IDE16", 0x244e5994, 0x3e232852),
- PCMCIA_DEVICE_PROD_ID12("WEIDA", "TWTTI", 0xcc7cf69c, 0x212bb918),
- PCMCIA_DEVICE_PROD_ID1("STI Flash", 0xe4a13209),
- PCMCIA_DEVICE_PROD_ID12("STI", "Flash 5.0", 0xbf2df18d, 0x8cb57a0e),
- PCMCIA_MFC_DEVICE_PROD_ID12(1, "SanDisk", "ConnectPlus", 0x7a954bd9, 0x74be00c6),
- PCMCIA_DEVICE_PROD_ID2("Flash Card", 0x5a362506),
- PCMCIA_DEVICE_NULL,
-};
-MODULE_DEVICE_TABLE(pcmcia, ide_ids);
+#include "../ata/pata_pcmcia.h"
static struct pcmcia_driver ide_cs_driver = {
.owner = THIS_MODULE,
@@ -458,7 +394,7 @@ static struct pcmcia_driver ide_cs_drive
},
.probe = ide_probe,
.remove = ide_detach,
- .id_table = ide_ids,
+ .id_table = pcmcia_devices,
};
static int __init init_ide_cs(void)
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 09/68] ata_piix: factor out short cable detection code to ich_short_ata40()
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (7 preceding siblings ...)
2010-01-29 16:04 ` [PATCH 08/68] ide-cs: use pata_pcmcia.h Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:04 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:04 ` [PATCH 10/68] ata_piix: move short cable handling to ata_piix.h Bartlomiej Zolnierkiewicz
` (59 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:04 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] ata_piix: factor out short cable detection code to ich_short_ata40()
Fix up ich_pata_cable_detect() documentation while at it.
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ata/ata_piix.c | 28 ++++++++++++++++++----------
1 file changed, 18 insertions(+), 10 deletions(-)
Index: b/drivers/ata/ata_piix.c
===================================================================
--- a/drivers/ata/ata_piix.c
+++ b/drivers/ata/ata_piix.c
@@ -611,6 +611,21 @@ static const struct ich_laptop ich_lapto
{ 0, }
};
+static int ich_short_ata40(struct pci_dev *pdev)
+{
+ const struct ich_laptop *lap = &ich_laptop[0];
+
+ while (lap->device) {
+ if (lap->device == pdev->device &&
+ lap->subvendor == pdev->subsystem_vendor &&
+ lap->subdevice == pdev->subsystem_device)
+ return 1;
+ lap++;
+ }
+
+ return 0;
+}
+
/**
* ich_pata_cable_detect - Probe host controller cable detect info
* @ap: Port for which cable detect info is desired
@@ -626,18 +641,11 @@ static int ich_pata_cable_detect(struct
{
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
struct piix_host_priv *hpriv = ap->host->private_data;
- const struct ich_laptop *lap = &ich_laptop[0];
u8 mask;
- /* Check for specials - Acer Aspire 5602WLMi */
- while (lap->device) {
- if (lap->device == pdev->device &&
- lap->subvendor == pdev->subsystem_vendor &&
- lap->subdevice == pdev->subsystem_device)
- return ATA_CBL_PATA40_SHORT;
-
- lap++;
- }
+ /* check for specials */
+ if (ich_short_ata40(pdev))
+ return ATA_CBL_PATA40_SHORT;
/* check BIOS cable detect results */
mask = ap->port_no == 0 ? PIIX_80C_PRI : PIIX_80C_SEC;
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 10/68] ata_piix: move short cable handling to ata_piix.h
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (8 preceding siblings ...)
2010-01-29 16:04 ` [PATCH 09/68] ata_piix: factor out short cable detection code to ich_short_ata40() Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:04 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:04 ` [PATCH 11/68] piix: use ata_piix.h Bartlomiej Zolnierkiewicz
` (58 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:04 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] ata_piix: move short cable handling to ata_piix.h
It is a generic code and can be shared between ata_piix & piix drivers.
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ata/ata_piix.c | 45 +--------------------------------------------
drivers/ata/ata_piix.h | 45 +++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 46 insertions(+), 44 deletions(-)
Index: b/drivers/ata/ata_piix.c
===================================================================
--- a/drivers/ata/ata_piix.c
+++ b/drivers/ata/ata_piix.c
@@ -581,50 +581,7 @@ MODULE_LICENSE("GPL");
MODULE_DEVICE_TABLE(pci, piix_pci_tbl);
MODULE_VERSION(DRV_VERSION);
-struct ich_laptop {
- u16 device;
- u16 subvendor;
- u16 subdevice;
-};
-
-/*
- * List of laptops that use short cables rather than 80 wire
- */
-
-static const struct ich_laptop ich_laptop[] = {
- /* devid, subvendor, subdev */
- { 0x27DF, 0x0005, 0x0280 }, /* ICH7 on Acer 5602WLMi */
- { 0x27DF, 0x1025, 0x0102 }, /* ICH7 on Acer 5602aWLMi */
- { 0x27DF, 0x1025, 0x0110 }, /* ICH7 on Acer 3682WLMi */
- { 0x27DF, 0x1028, 0x02b0 }, /* ICH7 on unknown Dell */
- { 0x27DF, 0x1043, 0x1267 }, /* ICH7 on Asus W5F */
- { 0x27DF, 0x103C, 0x30A1 }, /* ICH7 on HP Compaq nc2400 */
- { 0x27DF, 0x103C, 0x361a }, /* ICH7 on unkown HP */
- { 0x27DF, 0x1071, 0xD221 }, /* ICH7 on Hercules EC-900 */
- { 0x27DF, 0x152D, 0x0778 }, /* ICH7 on unknown Intel */
- { 0x24CA, 0x1025, 0x0061 }, /* ICH4 on ACER Aspire 2023WLMi */
- { 0x24CA, 0x1025, 0x003d }, /* ICH4 on ACER TM290 */
- { 0x266F, 0x1025, 0x0066 }, /* ICH6 on ACER Aspire 1694WLMi */
- { 0x2653, 0x1043, 0x82D8 }, /* ICH6M on Asus Eee 701 */
- { 0x27df, 0x104d, 0x900e }, /* ICH7 on Sony TZ-90 */
- /* end marker */
- { 0, }
-};
-
-static int ich_short_ata40(struct pci_dev *pdev)
-{
- const struct ich_laptop *lap = &ich_laptop[0];
-
- while (lap->device) {
- if (lap->device == pdev->device &&
- lap->subvendor == pdev->subsystem_vendor &&
- lap->subdevice == pdev->subsystem_device)
- return 1;
- lap++;
- }
-
- return 0;
-}
+#include "ata_piix.h"
/**
* ich_pata_cable_detect - Probe host controller cable detect info
Index: b/drivers/ata/ata_piix.h
===================================================================
--- /dev/null
+++ b/drivers/ata/ata_piix.h
@@ -0,0 +1,45 @@
+
+struct ich_laptop {
+ u16 device;
+ u16 subvendor;
+ u16 subdevice;
+};
+
+/*
+ * List of laptops that use short cables rather than 80 wire
+ */
+
+static const struct ich_laptop ich_laptop[] = {
+ /* devid, subvendor, subdev */
+ { 0x27DF, 0x0005, 0x0280 }, /* ICH7 on Acer 5602WLMi */
+ { 0x27DF, 0x1025, 0x0102 }, /* ICH7 on Acer 5602aWLMi */
+ { 0x27DF, 0x1025, 0x0110 }, /* ICH7 on Acer 3682WLMi */
+ { 0x27DF, 0x1028, 0x02b0 }, /* ICH7 on unknown Dell */
+ { 0x27DF, 0x1043, 0x1267 }, /* ICH7 on Asus W5F */
+ { 0x27DF, 0x103C, 0x30A1 }, /* ICH7 on HP Compaq nc2400 */
+ { 0x27DF, 0x103C, 0x361a }, /* ICH7 on unkown HP */
+ { 0x27DF, 0x1071, 0xD221 }, /* ICH7 on Hercules EC-900 */
+ { 0x27DF, 0x152D, 0x0778 }, /* ICH7 on unknown Intel */
+ { 0x24CA, 0x1025, 0x0061 }, /* ICH4 on ACER Aspire 2023WLMi */
+ { 0x24CA, 0x1025, 0x003d }, /* ICH4 on ACER TM290 */
+ { 0x266F, 0x1025, 0x0066 }, /* ICH6 on ACER Aspire 1694WLMi */
+ { 0x2653, 0x1043, 0x82D8 }, /* ICH6M on Asus Eee 701 */
+ { 0x27df, 0x104d, 0x900e }, /* ICH7 on Sony TZ-90 */
+ /* end marker */
+ { 0, }
+};
+
+static int ich_short_ata40(struct pci_dev *pdev)
+{
+ const struct ich_laptop *lap = &ich_laptop[0];
+
+ while (lap->device) {
+ if (lap->device == pdev->device &&
+ lap->subvendor == pdev->subsystem_vendor &&
+ lap->subdevice == pdev->subsystem_device)
+ return 1;
+ lap++;
+ }
+
+ return 0;
+}
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 11/68] piix: use ata_piix.h
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (9 preceding siblings ...)
2010-01-29 16:04 ` [PATCH 10/68] ata_piix: move short cable handling to ata_piix.h Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:04 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:04 ` [PATCH 12/68] pata_ali: move short cable handling to pata_ali.h Bartlomiej Zolnierkiewicz
` (57 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:04 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] piix: use ata_piix.h
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ide/piix.c | 41 +++--------------------------------------
1 file changed, 3 insertions(+), 38 deletions(-)
Index: b/drivers/ide/piix.c
===================================================================
--- a/drivers/ide/piix.c
+++ b/drivers/ide/piix.c
@@ -241,51 +241,16 @@ static void ich_clear_irq(ide_drive_t *d
outb(dma_stat, hwif->dma_base + ATA_DMA_STATUS);
}
-struct ich_laptop {
- u16 device;
- u16 subvendor;
- u16 subdevice;
-};
-
-/*
- * List of laptops that use short cables rather than 80 wire
- */
-
-static const struct ich_laptop ich_laptop[] = {
- /* devid, subvendor, subdev */
- { 0x27DF, 0x1025, 0x0102 }, /* ICH7 on Acer 5602aWLMi */
- { 0x27DF, 0x0005, 0x0280 }, /* ICH7 on Acer 5602WLMi */
- { 0x27DF, 0x1025, 0x0110 }, /* ICH7 on Acer 3682WLMi */
- { 0x27DF, 0x1028, 0x02b0 }, /* ICH7 on unknown Dell */
- { 0x27DF, 0x1043, 0x1267 }, /* ICH7 on Asus W5F */
- { 0x27DF, 0x103C, 0x30A1 }, /* ICH7 on HP Compaq nc2400 */
- { 0x27DF, 0x103C, 0x361a }, /* ICH7 on unkown HP */
- { 0x27DF, 0x1071, 0xD221 }, /* ICH7 on Hercules EC-900 */
- { 0x27DF, 0x152D, 0x0778 }, /* ICH7 on unknown Intel */
- { 0x24CA, 0x1025, 0x0061 }, /* ICH4 on Acer Aspire 2023WLMi */
- { 0x24CA, 0x1025, 0x003d }, /* ICH4 on ACER TM290 */
- { 0x266F, 0x1025, 0x0066 }, /* ICH6 on ACER Aspire 1694WLMi */
- { 0x2653, 0x1043, 0x82D8 }, /* ICH6M on Asus Eee 701 */
- { 0x27df, 0x104d, 0x900e }, /* ICH7 on Sony TZ-90 */
- /* end marker */
- { 0, }
-};
+#include "../ata/ata_piix.h"
static u8 piix_cable_detect(ide_hwif_t *hwif)
{
struct pci_dev *pdev = to_pci_dev(hwif->dev);
- const struct ich_laptop *lap = &ich_laptop[0];
u8 reg54h = 0, mask = hwif->channel ? 0xc0 : 0x30;
/* check for specials */
- while (lap->device) {
- if (lap->device == pdev->device &&
- lap->subvendor == pdev->subsystem_vendor &&
- lap->subdevice == pdev->subsystem_device) {
- return ATA_CBL_PATA40_SHORT;
- }
- lap++;
- }
+ if (ich_short_ata40(pdev))
+ return ATA_CBL_PATA40_SHORT;
pci_read_config_byte(pdev, 0x54, ®54h);
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 12/68] pata_ali: move short cable handling to pata_ali.h
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (10 preceding siblings ...)
2010-01-29 16:04 ` [PATCH 11/68] piix: use ata_piix.h Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:04 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:04 ` [PATCH 13/68] alim15x3: use pata_ali.h Bartlomiej Zolnierkiewicz
` (56 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:04 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] pata_ali: move short cable handling to pata_ali.h
It is a generic code and can be shared between pata_ali & alim15x3 drivers.
Fix typo while at it ("Satelite" -> "Satellite").
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ata/pata_ali.c | 37 +------------------------------------
drivers/ata/pata_ali.h | 40 ++++++++++++++++++++++++++++++++++++++++
2 files changed, 41 insertions(+), 36 deletions(-)
Index: b/drivers/ata/pata_ali.c
===================================================================
--- a/drivers/ata/pata_ali.c
+++ b/drivers/ata/pata_ali.c
@@ -32,7 +32,6 @@
#include <linux/delay.h>
#include <scsi/scsi_host.h>
#include <linux/libata.h>
-#include <linux/dmi.h>
#define DRV_NAME "pata_ali"
#define DRV_VERSION "0.7.8"
@@ -43,41 +42,7 @@ MODULE_PARM_DESC(atapi_dma, "Enable ATAP
static struct pci_dev *ali_isa_bridge;
-/*
- * Cable special cases
- */
-
-static const struct dmi_system_id cable_dmi_table[] = {
- {
- .ident = "HP Pavilion N5430",
- .matches = {
- DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
- DMI_MATCH(DMI_BOARD_VERSION, "OmniBook N32N-736"),
- },
- },
- {
- .ident = "Toshiba Satelite S1800-814",
- .matches = {
- DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
- DMI_MATCH(DMI_PRODUCT_NAME, "S1800-814"),
- },
- },
- { }
-};
-
-static int ali_cable_override(struct pci_dev *pdev)
-{
- /* Fujitsu P2000 */
- if (pdev->subsystem_vendor == 0x10CF && pdev->subsystem_device == 0x10AF)
- return 1;
- /* Mitac 8317 (Winbook-A) and relatives */
- if (pdev->subsystem_vendor == 0x1071 && pdev->subsystem_device == 0x8317)
- return 1;
- /* Systems by DMI */
- if (dmi_check_system(cable_dmi_table))
- return 1;
- return 0;
-}
+#include "pata_ali.h"
/**
* ali_c2_cable_detect - cable detection
Index: b/drivers/ata/pata_ali.h
===================================================================
--- /dev/null
+++ b/drivers/ata/pata_ali.h
@@ -0,0 +1,40 @@
+
+#include <linux/dmi.h>
+
+/*
+ * Cable special cases
+ */
+
+static const struct dmi_system_id cable_dmi_table[] = {
+ {
+ .ident = "HP Pavilion N5430",
+ .matches = {
+ DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
+ DMI_MATCH(DMI_BOARD_VERSION, "OmniBook N32N-736"),
+ },
+ },
+ {
+ .ident = "Toshiba Satellite S1800-814",
+ .matches = {
+ DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
+ DMI_MATCH(DMI_PRODUCT_NAME, "S1800-814"),
+ },
+ },
+ { }
+};
+
+static int ali_cable_override(struct pci_dev *pdev)
+{
+ /* Fujitsu P2000 */
+ if (pdev->subsystem_vendor == 0x10CF &&
+ pdev->subsystem_device == 0x10AF)
+ return 1;
+ /* Mitac 8317 (Winbook-A) and relatives */
+ if (pdev->subsystem_vendor == 0x1071 &&
+ pdev->subsystem_device == 0x8317)
+ return 1;
+ /* Systems by DMI */
+ if (dmi_check_system(cable_dmi_table))
+ return 1;
+ return 0;
+}
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 13/68] alim15x3: use pata_ali.h
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (11 preceding siblings ...)
2010-01-29 16:04 ` [PATCH 12/68] pata_ali: move short cable handling to pata_ali.h Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:04 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:04 ` [PATCH 14/68] pata_sis: move short cable handling to pata_sis.h Bartlomiej Zolnierkiewicz
` (55 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:04 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] alim15x3: use pata_ali.h
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ide/alim15x3.c | 42 +-----------------------------------------
1 file changed, 1 insertion(+), 41 deletions(-)
Index: b/drivers/ide/alim15x3.c
===================================================================
--- a/drivers/ide/alim15x3.c
+++ b/drivers/ide/alim15x3.c
@@ -33,7 +33,6 @@
#include <linux/pci.h>
#include <linux/ide.h>
#include <linux/init.h>
-#include <linux/dmi.h>
#include <asm/io.h>
@@ -308,46 +307,7 @@ out:
return 0;
}
-/*
- * Cable special cases
- */
-
-static const struct dmi_system_id cable_dmi_table[] = {
- {
- .ident = "HP Pavilion N5430",
- .matches = {
- DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"),
- DMI_MATCH(DMI_BOARD_VERSION, "OmniBook N32N-736"),
- },
- },
- {
- .ident = "Toshiba Satellite S1800-814",
- .matches = {
- DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
- DMI_MATCH(DMI_PRODUCT_NAME, "S1800-814"),
- },
- },
- { }
-};
-
-static int ali_cable_override(struct pci_dev *pdev)
-{
- /* Fujitsu P2000 */
- if (pdev->subsystem_vendor == 0x10CF &&
- pdev->subsystem_device == 0x10AF)
- return 1;
-
- /* Mitac 8317 (Winbook-A) and relatives */
- if (pdev->subsystem_vendor == 0x1071 &&
- pdev->subsystem_device == 0x8317)
- return 1;
-
- /* Systems by DMI */
- if (dmi_check_system(cable_dmi_table))
- return 1;
-
- return 0;
-}
+#include "../ata/pata_ali.h"
/**
* ali_cable_detect - cable detection
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 14/68] pata_sis: move short cable handling to pata_sis.h
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (12 preceding siblings ...)
2010-01-29 16:04 ` [PATCH 13/68] alim15x3: use pata_ali.h Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:04 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:04 ` [PATCH 15/68] sis5513: use pata_sis.h Bartlomiej Zolnierkiewicz
` (54 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:04 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] pata_sis: move short cable handling to pata_sis.h
It is a generic code and can be shared between pata_sis & sis5513 drivers.
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ata/pata_sis.c | 30 +-----------------------------
drivers/ata/pata_sis.h | 30 ++++++++++++++++++++++++++++++
2 files changed, 31 insertions(+), 29 deletions(-)
Index: b/drivers/ata/pata_sis.c
===================================================================
--- a/drivers/ata/pata_sis.c
+++ b/drivers/ata/pata_sis.c
@@ -45,35 +45,7 @@ struct sis_chipset {
up code later */
};
-struct sis_laptop {
- u16 device;
- u16 subvendor;
- u16 subdevice;
-};
-
-static const struct sis_laptop sis_laptop[] = {
- /* devid, subvendor, subdev */
- { 0x5513, 0x1043, 0x1107 }, /* ASUS A6K */
- { 0x5513, 0x1734, 0x105F }, /* FSC Amilo A1630 */
- { 0x5513, 0x1071, 0x8640 }, /* EasyNote K5305 */
- /* end marker */
- { 0, }
-};
-
-static int sis_short_ata40(struct pci_dev *dev)
-{
- const struct sis_laptop *lap = &sis_laptop[0];
-
- while (lap->device) {
- if (lap->device == dev->device &&
- lap->subvendor == dev->subsystem_vendor &&
- lap->subdevice == dev->subsystem_device)
- return 1;
- lap++;
- }
-
- return 0;
-}
+#include "pata_sis.h"
/**
* sis_old_port_base - return PCI configuration base for dev
Index: b/drivers/ata/pata_sis.h
===================================================================
--- /dev/null
+++ b/drivers/ata/pata_sis.h
@@ -0,0 +1,30 @@
+
+struct sis_laptop {
+ u16 device;
+ u16 subvendor;
+ u16 subdevice;
+};
+
+static const struct sis_laptop sis_laptop[] = {
+ /* devid, subvendor, subdev */
+ { 0x5513, 0x1043, 0x1107 }, /* ASUS A6K */
+ { 0x5513, 0x1734, 0x105F }, /* FSC Amilo A1630 */
+ { 0x5513, 0x1071, 0x8640 }, /* EasyNote K5305 */
+ /* end marker */
+ { 0, }
+};
+
+static int sis_short_ata40(struct pci_dev *dev)
+{
+ const struct sis_laptop *lap = &sis_laptop[0];
+
+ while (lap->device) {
+ if (lap->device == dev->device &&
+ lap->subvendor == dev->subsystem_vendor &&
+ lap->subdevice == dev->subsystem_device)
+ return 1;
+ lap++;
+ }
+
+ return 0;
+}
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 15/68] sis5513: use pata_sis.h
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (13 preceding siblings ...)
2010-01-29 16:04 ` [PATCH 14/68] pata_sis: move short cable handling to pata_sis.h Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:04 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:04 ` [PATCH 16/68] pata_via: move short cable handling to pata_via.h Bartlomiej Zolnierkiewicz
` (53 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:04 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] sis5513: use pata_sis.h
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ide/sis5513.c | 25 +++----------------------
1 file changed, 3 insertions(+), 22 deletions(-)
Index: b/drivers/ide/sis5513.c
===================================================================
--- a/drivers/ide/sis5513.c
+++ b/drivers/ide/sis5513.c
@@ -506,34 +506,15 @@ static int init_chipset_sis5513(struct p
return 0;
}
-struct sis_laptop {
- u16 device;
- u16 subvendor;
- u16 subdevice;
-};
-
-static const struct sis_laptop sis_laptop[] = {
- /* devid, subvendor, subdev */
- { 0x5513, 0x1043, 0x1107 }, /* ASUS A6K */
- { 0x5513, 0x1734, 0x105f }, /* FSC Amilo A1630 */
- { 0x5513, 0x1071, 0x8640 }, /* EasyNote K5305 */
- /* end marker */
- { 0, }
-};
+#include "../ata/pata_sis.h"
static u8 sis_cable_detect(ide_hwif_t *hwif)
{
struct pci_dev *pdev = to_pci_dev(hwif->dev);
- const struct sis_laptop *lap = &sis_laptop[0];
u8 ata66 = 0;
- while (lap->device) {
- if (lap->device == pdev->device &&
- lap->subvendor == pdev->subsystem_vendor &&
- lap->subdevice == pdev->subsystem_device)
- return ATA_CBL_PATA40_SHORT;
- lap++;
- }
+ if (sis_short_ata40(pdev))
+ return ATA_CBL_PATA40_SHORT;
if (chipset_family >= ATA_133) {
u16 regw = 0;
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 16/68] pata_via: move short cable handling to pata_via.h
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (14 preceding siblings ...)
2010-01-29 16:04 ` [PATCH 15/68] sis5513: use pata_sis.h Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:04 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:04 ` [PATCH 17/68] via82cxxx: use pata_via.h Bartlomiej Zolnierkiewicz
` (52 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:04 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] pata_via: move short cable handling to pata_via.h
It is a generic code and can be shared between pata_via & via82cxxx drivers.
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ata/pata_via.c | 28 +---------------------------
drivers/ata/pata_via.h | 29 +++++++++++++++++++++++++++++
2 files changed, 30 insertions(+), 27 deletions(-)
Index: b/drivers/ata/pata_via.c
===================================================================
--- a/drivers/ata/pata_via.c
+++ b/drivers/ata/pata_via.c
@@ -60,7 +60,6 @@
#include <linux/delay.h>
#include <scsi/scsi_host.h>
#include <linux/libata.h>
-#include <linux/dmi.h>
#define DRV_NAME "pata_via"
#define DRV_VERSION "0.3.4"
@@ -127,32 +126,7 @@ struct via_port {
u8 cached_device;
};
-/*
- * Cable special cases
- */
-
-static const struct dmi_system_id cable_dmi_table[] = {
- {
- .ident = "Acer Ferrari 3400",
- .matches = {
- DMI_MATCH(DMI_BOARD_VENDOR, "Acer,Inc."),
- DMI_MATCH(DMI_BOARD_NAME, "Ferrari 3400"),
- },
- },
- { }
-};
-
-static int via_cable_override(struct pci_dev *pdev)
-{
- /* Systems by DMI */
- if (dmi_check_system(cable_dmi_table))
- return 1;
- /* Arima W730-K8/Targa Visionary 811/... */
- if (pdev->subsystem_vendor == 0x161F && pdev->subsystem_device == 0x2032)
- return 1;
- return 0;
-}
-
+#include "pata_via.h"
/**
* via_cable_detect - cable detection
Index: b/drivers/ata/pata_via.h
===================================================================
--- /dev/null
+++ b/drivers/ata/pata_via.h
@@ -0,0 +1,29 @@
+
+#include <linux/dmi.h>
+
+/*
+ * Cable special cases
+ */
+
+static const struct dmi_system_id cable_dmi_table[] = {
+ {
+ .ident = "Acer Ferrari 3400",
+ .matches = {
+ DMI_MATCH(DMI_BOARD_VENDOR, "Acer,Inc."),
+ DMI_MATCH(DMI_BOARD_NAME, "Ferrari 3400"),
+ },
+ },
+ { }
+};
+
+static int via_cable_override(struct pci_dev *pdev)
+{
+ /* Systems by DMI */
+ if (dmi_check_system(cable_dmi_table))
+ return 1;
+ /* Arima W730-K8/Targa Visionary 811/... */
+ if (pdev->subsystem_vendor == 0x161F &&
+ pdev->subsystem_device == 0x2032)
+ return 1;
+ return 0;
+}
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 17/68] via82cxxx: use pata_via.h
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (15 preceding siblings ...)
2010-01-29 16:04 ` [PATCH 16/68] pata_via: move short cable handling to pata_via.h Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:04 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:05 ` [PATCH 18/68] ide: split host->dev table Bartlomiej Zolnierkiewicz
` (51 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:04 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] via82cxxx: use pata_via.h
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ide/via82cxxx.c | 30 +-----------------------------
1 file changed, 1 insertion(+), 29 deletions(-)
Index: b/drivers/ide/via82cxxx.c
===================================================================
--- a/drivers/ide/via82cxxx.c
+++ b/drivers/ide/via82cxxx.c
@@ -29,7 +29,6 @@
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/ide.h>
-#include <linux/dmi.h>
#ifdef CONFIG_PPC_CHRP
#include <asm/processor.h>
@@ -351,34 +350,7 @@ static int init_chipset_via82cxxx(struct
return 0;
}
-/*
- * Cable special cases
- */
-
-static const struct dmi_system_id cable_dmi_table[] = {
- {
- .ident = "Acer Ferrari 3400",
- .matches = {
- DMI_MATCH(DMI_BOARD_VENDOR, "Acer,Inc."),
- DMI_MATCH(DMI_BOARD_NAME, "Ferrari 3400"),
- },
- },
- { }
-};
-
-static int via_cable_override(struct pci_dev *pdev)
-{
- /* Systems by DMI */
- if (dmi_check_system(cable_dmi_table))
- return 1;
-
- /* Arima W730-K8/Targa Visionary 811/... */
- if (pdev->subsystem_vendor == 0x161F &&
- pdev->subsystem_device == 0x2032)
- return 1;
-
- return 0;
-}
+#include "../ata/pata_via.h"
static u8 via82cxxx_cable_detect(ide_hwif_t *hwif)
{
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 18/68] ide: split host->dev table
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (16 preceding siblings ...)
2010-01-29 16:04 ` [PATCH 17/68] via82cxxx: use pata_via.h Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:05 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:05 ` [PATCH 19/68] ide: add hwif->port_no field Bartlomiej Zolnierkiewicz
` (50 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:05 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] ide: split host->dev table
Split dev table in struct ide_host on dev and dev2 fields to match
corresponding fields used in struct ata_host.
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ide/cy82c693.c | 2 +-
drivers/ide/hpt366.c | 6 +++---
drivers/ide/ide-probe.c | 2 +-
drivers/ide/ide.c | 4 ++--
drivers/ide/pdc202xx_new.c | 2 +-
drivers/ide/setup-pci.c | 6 +++---
include/linux/ide.h | 2 +-
7 files changed, 12 insertions(+), 12 deletions(-)
Index: b/drivers/ide/cy82c693.c
===================================================================
--- a/drivers/ide/cy82c693.c
+++ b/drivers/ide/cy82c693.c
@@ -179,7 +179,7 @@ static int __devinit cy82c693_init_one(s
static void __devexit cy82c693_remove(struct pci_dev *dev)
{
struct ide_host *host = pci_get_drvdata(dev);
- struct pci_dev *dev2 = host->dev[1] ? to_pci_dev(host->dev[1]) : NULL;
+ struct pci_dev *dev2 = host->dev2 ? to_pci_dev(host->dev2) : NULL;
ide_pci_remove(dev);
pci_dev_put(dev2);
Index: b/drivers/ide/hpt366.c
===================================================================
--- a/drivers/ide/hpt366.c
+++ b/drivers/ide/hpt366.c
@@ -610,7 +610,7 @@ static struct hpt_info *hpt3xx_get_info(
struct ide_host *host = dev_get_drvdata(dev);
struct hpt_info *info = (struct hpt_info *)host->host_priv;
- return dev == host->dev[1] ? info + 1 : info;
+ return dev == host->dev2 ? info + 1 : info;
}
/*
@@ -943,7 +943,7 @@ static int hpt37x_calibrate_dpll(struct
static void hpt3xx_disable_fast_irq(struct pci_dev *dev, u8 mcr_addr)
{
struct ide_host *host = pci_get_drvdata(dev);
- struct hpt_info *info = host->host_priv + (&dev->dev == host->dev[1]);
+ struct hpt_info *info = host->host_priv + (&dev->dev == host->dev2);
u8 chip_type = info->chip_type;
u8 new_mcr, old_mcr = 0;
@@ -1567,7 +1567,7 @@ static void __devexit hpt366_remove(stru
{
struct ide_host *host = pci_get_drvdata(dev);
struct ide_info *info = host->host_priv;
- struct pci_dev *dev2 = host->dev[1] ? to_pci_dev(host->dev[1]) : NULL;
+ struct pci_dev *dev2 = host->dev2 ? to_pci_dev(host->dev2) : NULL;
ide_pci_remove(dev);
pci_dev_put(dev2);
Index: b/drivers/ide/ide-probe.c
===================================================================
--- a/drivers/ide/ide-probe.c
+++ b/drivers/ide/ide-probe.c
@@ -1334,7 +1334,7 @@ struct ide_host *ide_host_alloc(const st
return NULL;
}
- host->dev[0] = dev;
+ host->dev = dev;
if (d) {
host->init_chipset = d->init_chipset;
Index: b/drivers/ide/ide.c
===================================================================
--- a/drivers/ide/ide.c
+++ b/drivers/ide/ide.c
@@ -77,7 +77,7 @@ int ide_device_get(ide_drive_t *drive)
if (!get_device(&drive->gendev))
return -ENXIO;
- host_dev = drive->hwif->host->dev[0];
+ host_dev = drive->hwif->host->dev;
module = host_dev ? host_dev->driver->owner : NULL;
if (module && !try_module_get(module)) {
@@ -99,7 +99,7 @@ EXPORT_SYMBOL_GPL(ide_device_get);
void ide_device_put(ide_drive_t *drive)
{
#ifdef CONFIG_MODULE_UNLOAD
- struct device *host_dev = drive->hwif->host->dev[0];
+ struct device *host_dev = drive->hwif->host->dev;
struct module *module = host_dev ? host_dev->driver->owner : NULL;
if (module)
Index: b/drivers/ide/pdc202xx_new.c
===================================================================
--- a/drivers/ide/pdc202xx_new.c
+++ b/drivers/ide/pdc202xx_new.c
@@ -517,7 +517,7 @@ static int __devinit pdc202new_init_one(
static void __devexit pdc202new_remove(struct pci_dev *dev)
{
struct ide_host *host = pci_get_drvdata(dev);
- struct pci_dev *dev2 = host->dev[1] ? to_pci_dev(host->dev[1]) : NULL;
+ struct pci_dev *dev2 = host->dev2 ? to_pci_dev(host->dev2) : NULL;
ide_pci_remove(dev);
pci_dev_put(dev2);
Index: b/drivers/ide/setup-pci.c
===================================================================
--- a/drivers/ide/setup-pci.c
+++ b/drivers/ide/setup-pci.c
@@ -556,9 +556,9 @@ int ide_pci_init_two(struct pci_dev *dev
goto out;
}
- host->dev[0] = &dev1->dev;
+ host->dev = &dev1->dev;
if (dev2)
- host->dev[1] = &dev2->dev;
+ host->dev2 = &dev2->dev;
host->host_priv = priv;
host->irq_flags = IRQF_SHARED;
@@ -603,7 +603,7 @@ EXPORT_SYMBOL_GPL(ide_pci_init_one);
void ide_pci_remove(struct pci_dev *dev)
{
struct ide_host *host = pci_get_drvdata(dev);
- struct pci_dev *dev2 = host->dev[1] ? to_pci_dev(host->dev[1]) : NULL;
+ struct pci_dev *dev2 = host->dev2 ? to_pci_dev(host->dev2) : NULL;
int bars;
if (host->host_flags & IDE_HFLAG_SINGLE)
Index: b/include/linux/ide.h
===================================================================
--- a/include/linux/ide.h
+++ b/include/linux/ide.h
@@ -775,7 +775,7 @@ typedef struct hwif_s {
struct ide_host {
ide_hwif_t *ports[MAX_HOST_PORTS + 1];
unsigned int n_ports;
- struct device *dev[2];
+ struct device *dev, *dev2;
int (*init_chipset)(struct pci_dev *);
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 19/68] ide: add hwif->port_no field
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (17 preceding siblings ...)
2010-01-29 16:05 ` [PATCH 18/68] ide: split host->dev table Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:05 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:05 ` [PATCH 20/68] ide: add hwif->udma_mask field Bartlomiej Zolnierkiewicz
` (49 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:05 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] ide: add hwif->port_no field
Add port_no field to ide_hwif_t matching port_no field used in
struct ata_port.
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
include/linux/ide.h | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
Index: b/include/linux/ide.h
===================================================================
--- a/include/linux/ide.h
+++ b/include/linux/ide.h
@@ -682,7 +682,12 @@ typedef struct hwif_s {
u8 major; /* our major number */
u8 index; /* 0 for ide0; 1 for ide1; ... */
- u8 channel; /* for dual-port chips: 0=primary, 1=secondary */
+
+ union {
+ /* for dual-port chips: 0=primary, 1=secondary */
+ u8 channel;
+ u8 port_no;
+ };
u32 host_flags;
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 20/68] ide: add hwif->udma_mask field
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (18 preceding siblings ...)
2010-01-29 16:05 ` [PATCH 19/68] ide: add hwif->port_no field Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:05 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:05 ` [PATCH 21/68] ide: add hwif->private_data field Bartlomiej Zolnierkiewicz
` (48 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:05 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] ide: add hwif->udma_mask field
Add udma_mask field to ide_hwif_t to match udma_mask field used in
struct ata_port.
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
include/linux/ide.h | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
Index: b/include/linux/ide.h
===================================================================
--- a/include/linux/ide.h
+++ b/include/linux/ide.h
@@ -693,7 +693,10 @@ typedef struct hwif_s {
u8 pio_mask;
- u8 ultra_mask;
+ union {
+ u8 ultra_mask;
+ u8 udma_mask;
+ };
u8 mwdma_mask;
u8 swdma_mask;
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 21/68] ide: add hwif->private_data field
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (19 preceding siblings ...)
2010-01-29 16:05 ` [PATCH 20/68] ide: add hwif->udma_mask field Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:05 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:05 ` [PATCH 22/68] ide: add drive->devno field Bartlomiej Zolnierkiewicz
` (47 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:05 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] ide: add hwif->private_data field
Add private_data field to ide_hwif_t matching private_data field used
in struct ata_port.
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
include/linux/ide.h | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
Index: b/include/linux/ide.h
===================================================================
--- a/include/linux/ide.h
+++ b/include/linux/ide.h
@@ -747,7 +747,11 @@ typedef struct hwif_s {
struct completion gendev_rel_comp; /* To deal with device release() */
- void *hwif_data; /* extra hwif data */
+ /* extra port data */
+ union {
+ void *hwif_data;
+ void *private_data;
+ };
#ifdef CONFIG_BLK_DEV_IDEACPI
struct ide_acpi_hwif_link *acpidata;
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 22/68] ide: add drive->devno field
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (20 preceding siblings ...)
2010-01-29 16:05 ` [PATCH 21/68] ide: add hwif->private_data field Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:05 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:05 ` [PATCH 23/68] ide: add drive->class field Bartlomiej Zolnierkiewicz
` (46 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:05 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] ide: add drive->devno field
Add devno field to ide_drive_t matching devno field used in
struct ata_device.
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ide/ide-probe.c | 1 +
include/linux/ide.h | 1 +
2 files changed, 2 insertions(+)
Index: b/drivers/ide/ide-probe.c
===================================================================
--- a/drivers/ide/ide-probe.c
+++ b/drivers/ide/ide-probe.c
@@ -1033,6 +1033,7 @@ static void ide_port_init_devices(ide_hw
ide_port_for_each_dev(i, drive, hwif) {
drive->dn = i + hwif->channel * 2;
+ drive->devno = i;
if (hwif->host_flags & IDE_HFLAG_IO_32BIT)
drive->io_32bit = 1;
Index: b/include/linux/ide.h
===================================================================
--- a/include/linux/ide.h
+++ b/include/linux/ide.h
@@ -518,6 +518,7 @@ struct ide_drive_s {
u8 pio_mode; /* for ->set_pio_mode _only_ */
u8 dma_mode; /* for ->dma_pio_mode _only_ */
u8 dn; /* now wide spread use */
+ u8 devno; /* 0 or 1 */
u8 acoustic; /* acoustic management */
u8 media; /* disk, cdrom, tape, floppy, ... */
u8 ready_stat; /* min status value for drive ready */
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 23/68] ide: add drive->class field
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (21 preceding siblings ...)
2010-01-29 16:05 ` [PATCH 22/68] ide: add drive->devno field Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:05 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:05 ` [PATCH 24/68] ide: change ->cable_detect method return type to 'int' Bartlomiej Zolnierkiewicz
` (45 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:05 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] ide: add drive->class field
Add class field to ide_drive_t matching class field used in
struct ata_device.
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
include/linux/ide.h | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
Index: b/include/linux/ide.h
===================================================================
--- a/include/linux/ide.h
+++ b/include/linux/ide.h
@@ -520,7 +520,13 @@ struct ide_drive_s {
u8 dn; /* now wide spread use */
u8 devno; /* 0 or 1 */
u8 acoustic; /* acoustic management */
- u8 media; /* disk, cdrom, tape, floppy, ... */
+
+ /* disk, cdrom, tape, floppy, ... */
+ union {
+ u8 media;
+ u8 class;
+ };
+
u8 ready_stat; /* min status value for drive ready */
u8 mult_count; /* current multiple sector setting */
u8 mult_req; /* requested multiple sector setting */
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 24/68] ide: change ->cable_detect method return type to 'int'
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (22 preceding siblings ...)
2010-01-29 16:05 ` [PATCH 23/68] ide: add drive->class field Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:05 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:05 ` [PATCH 25/68] it8213: always program control bits Bartlomiej Zolnierkiewicz
` (44 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:05 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] ide: change ->cable_detect method return type to 'int'
Change ->cable_detect method return type to match ->cable_detect method
used in struct ata_port_operations.
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ide/aec62xx.c | 2 +-
drivers/ide/alim15x3.c | 2 +-
drivers/ide/amd74xx.c | 2 +-
drivers/ide/atiixp.c | 2 +-
drivers/ide/cmd64x.c | 2 +-
drivers/ide/cs5535.c | 2 +-
drivers/ide/cs5536.c | 2 +-
drivers/ide/hpt366.c | 2 +-
drivers/ide/it8213.c | 2 +-
drivers/ide/it821x.c | 2 +-
drivers/ide/jmicron.c | 2 +-
drivers/ide/palm_bk3710.c | 2 +-
drivers/ide/pdc202xx_new.c | 2 +-
drivers/ide/pdc202xx_old.c | 2 +-
drivers/ide/piix.c | 2 +-
drivers/ide/pmac.c | 2 +-
drivers/ide/scc_pata.c | 2 +-
drivers/ide/serverworks.c | 2 +-
drivers/ide/siimage.c | 2 +-
drivers/ide/sis5513.c | 2 +-
drivers/ide/slc90e66.c | 2 +-
drivers/ide/tc86c001.c | 2 +-
drivers/ide/tx4939ide.c | 2 +-
drivers/ide/via82cxxx.c | 2 +-
include/linux/ide.h | 2 +-
25 files changed, 25 insertions(+), 25 deletions(-)
Index: b/drivers/ide/aec62xx.c
===================================================================
--- a/drivers/ide/aec62xx.c
+++ b/drivers/ide/aec62xx.c
@@ -160,7 +160,7 @@ static int init_chipset_aec62xx(struct p
return 0;
}
-static u8 atp86x_cable_detect(ide_hwif_t *hwif)
+static int atp86x_cable_detect(ide_hwif_t *hwif)
{
struct pci_dev *dev = to_pci_dev(hwif->dev);
u8 ata66 = 0, mask = hwif->channel ? 0x02 : 0x01;
Index: b/drivers/ide/alim15x3.c
===================================================================
--- a/drivers/ide/alim15x3.c
+++ b/drivers/ide/alim15x3.c
@@ -317,7 +317,7 @@ out:
* of UDMA66 transfers. It doesn't check the drives.
*/
-static u8 ali_cable_detect(ide_hwif_t *hwif)
+static int ali_cable_detect(ide_hwif_t *hwif)
{
struct pci_dev *dev = to_pci_dev(hwif->dev);
u8 cbl = ATA_CBL_PATA40, tmpbyte;
Index: b/drivers/ide/amd74xx.c
===================================================================
--- a/drivers/ide/amd74xx.c
+++ b/drivers/ide/amd74xx.c
@@ -178,7 +178,7 @@ static int init_chipset_amd74xx(struct p
return 0;
}
-static u8 amd_cable_detect(ide_hwif_t *hwif)
+static int amd_cable_detect(ide_hwif_t *hwif)
{
if ((amd_80w >> hwif->channel) & 1)
return ATA_CBL_PATA80;
Index: b/drivers/ide/atiixp.c
===================================================================
--- a/drivers/ide/atiixp.c
+++ b/drivers/ide/atiixp.c
@@ -120,7 +120,7 @@ static void atiixp_set_dma_mode(ide_hwif
spin_unlock_irqrestore(&atiixp_lock, flags);
}
-static u8 atiixp_cable_detect(ide_hwif_t *hwif)
+static int atiixp_cable_detect(ide_hwif_t *hwif)
{
struct pci_dev *pdev = to_pci_dev(hwif->dev);
u8 udma_mode = 0, ch = hwif->channel;
Index: b/drivers/ide/cmd64x.c
===================================================================
--- a/drivers/ide/cmd64x.c
+++ b/drivers/ide/cmd64x.c
@@ -312,7 +312,7 @@ static int init_chipset_cmd64x(struct pc
return 0;
}
-static u8 cmd64x_cable_detect(ide_hwif_t *hwif)
+static int cmd64x_cable_detect(ide_hwif_t *hwif)
{
struct pci_dev *dev = to_pci_dev(hwif->dev);
u8 bmidecsr = 0, mask = hwif->channel ? 0x02 : 0x01;
Index: b/drivers/ide/cs5535.c
===================================================================
--- a/drivers/ide/cs5535.c
+++ b/drivers/ide/cs5535.c
@@ -153,7 +153,7 @@ static void cs5535_set_pio_mode(ide_hwif
cs5535_set_speed(drive, drive->pio_mode);
}
-static u8 cs5535_cable_detect(ide_hwif_t *hwif)
+static int cs5535_cable_detect(ide_hwif_t *hwif)
{
struct pci_dev *dev = to_pci_dev(hwif->dev);
u8 bit;
Index: b/drivers/ide/cs5536.c
===================================================================
--- a/drivers/ide/cs5536.c
+++ b/drivers/ide/cs5536.c
@@ -110,7 +110,7 @@ static void cs5536_program_dtc(ide_drive
* Returns a cable type.
*/
-static u8 cs5536_cable_detect(ide_hwif_t *hwif)
+static int cs5536_cable_detect(ide_hwif_t *hwif)
{
struct pci_dev *pdev = to_pci_dev(hwif->dev);
u32 cfg;
Index: b/drivers/ide/hpt366.c
===================================================================
--- a/drivers/ide/hpt366.c
+++ b/drivers/ide/hpt366.c
@@ -1215,7 +1215,7 @@ static int init_chipset_hpt366(struct pc
return 0;
}
-static u8 hpt3xx_cable_detect(ide_hwif_t *hwif)
+static int hpt3xx_cable_detect(ide_hwif_t *hwif)
{
struct pci_dev *dev = to_pci_dev(hwif->dev);
struct hpt_info *info = hpt3xx_get_info(hwif->dev);
Index: b/drivers/ide/it8213.c
===================================================================
--- a/drivers/ide/it8213.c
+++ b/drivers/ide/it8213.c
@@ -140,7 +140,7 @@ static void it8213_set_dma_mode(ide_hwif
}
}
-static u8 it8213_cable_detect(ide_hwif_t *hwif)
+static int it8213_cable_detect(ide_hwif_t *hwif)
{
struct pci_dev *dev = to_pci_dev(hwif->dev);
u8 reg42h = 0;
Index: b/drivers/ide/it821x.c
===================================================================
--- a/drivers/ide/it821x.c
+++ b/drivers/ide/it821x.c
@@ -423,7 +423,7 @@ static void it821x_set_dma_mode(ide_hwif
* the needed logic onboard.
*/
-static u8 it821x_cable_detect(ide_hwif_t *hwif)
+static int it821x_cable_detect(ide_hwif_t *hwif)
{
/* The reference driver also only does disk side */
return ATA_CBL_PATA80;
Index: b/drivers/ide/jmicron.c
===================================================================
--- a/drivers/ide/jmicron.c
+++ b/drivers/ide/jmicron.c
@@ -26,7 +26,7 @@ typedef enum {
* Returns the cable type.
*/
-static u8 jmicron_cable_detect(ide_hwif_t *hwif)
+static int jmicron_cable_detect(ide_hwif_t *hwif)
{
struct pci_dev *pdev = to_pci_dev(hwif->dev);
Index: b/drivers/ide/palm_bk3710.c
===================================================================
--- a/drivers/ide/palm_bk3710.c
+++ b/drivers/ide/palm_bk3710.c
@@ -274,7 +274,7 @@ static void __devinit palm_bk3710_chipin
palm_bk3710_setpiomode(base, NULL, 1, 600, 0);
}
-static u8 palm_bk3710_cable_detect(ide_hwif_t *hwif)
+static int palm_bk3710_cable_detect(ide_hwif_t *hwif)
{
return ATA_CBL_PATA80;
}
Index: b/drivers/ide/pdc202xx_new.c
===================================================================
--- a/drivers/ide/pdc202xx_new.c
+++ b/drivers/ide/pdc202xx_new.c
@@ -180,7 +180,7 @@ static void pdcnew_set_pio_mode(ide_hwif
}
}
-static u8 pdcnew_cable_detect(ide_hwif_t *hwif)
+static int pdcnew_cable_detect(ide_hwif_t *hwif)
{
if (get_indexed_reg(hwif, 0x0b) & 0x04)
return ATA_CBL_PATA40;
Index: b/drivers/ide/pdc202xx_old.c
===================================================================
--- a/drivers/ide/pdc202xx_old.c
+++ b/drivers/ide/pdc202xx_old.c
@@ -103,7 +103,7 @@ static int pdc202xx_test_irq(ide_hwif_t
}
}
-static u8 pdc2026x_cable_detect(ide_hwif_t *hwif)
+static int pdc2026x_cable_detect(ide_hwif_t *hwif)
{
struct pci_dev *dev = to_pci_dev(hwif->dev);
u16 CIS, mask = hwif->channel ? (1 << 11) : (1 << 10);
Index: b/drivers/ide/piix.c
===================================================================
--- a/drivers/ide/piix.c
+++ b/drivers/ide/piix.c
@@ -243,7 +243,7 @@ static void ich_clear_irq(ide_drive_t *d
#include "../ata/ata_piix.h"
-static u8 piix_cable_detect(ide_hwif_t *hwif)
+static int piix_cable_detect(ide_hwif_t *hwif)
{
struct pci_dev *pdev = to_pci_dev(hwif->dev);
u8 reg54h = 0, mask = hwif->channel ? 0xc0 : 0x30;
Index: b/drivers/ide/pmac.c
===================================================================
--- a/drivers/ide/pmac.c
+++ b/drivers/ide/pmac.c
@@ -912,7 +912,7 @@ static int pmac_ide_do_resume(pmac_ide_h
return 0;
}
-static u8 pmac_ide_cable_detect(ide_hwif_t *hwif)
+static int pmac_ide_cable_detect(ide_hwif_t *hwif)
{
pmac_ide_hwif_t *pmif =
(pmac_ide_hwif_t *)dev_get_drvdata(hwif->gendev.parent);
Index: b/drivers/ide/scc_pata.c
===================================================================
--- a/drivers/ide/scc_pata.c
+++ b/drivers/ide/scc_pata.c
@@ -754,7 +754,7 @@ static int __devinit scc_init_dma(ide_hw
return ide_allocate_dma_engine(hwif);
}
-static u8 scc_cable_detect(ide_hwif_t *hwif)
+static int scc_cable_detect(ide_hwif_t *hwif)
{
return ATA_CBL_PATA80;
}
Index: b/drivers/ide/serverworks.c
===================================================================
--- a/drivers/ide/serverworks.c
+++ b/drivers/ide/serverworks.c
@@ -301,7 +301,7 @@ static u8 ata66_svwks_cobalt(ide_hwif_t
return ATA_CBL_PATA40;
}
-static u8 svwks_cable_detect(ide_hwif_t *hwif)
+static int svwks_cable_detect(ide_hwif_t *hwif)
{
struct pci_dev *dev = to_pci_dev(hwif->dev);
Index: b/drivers/ide/siimage.c
===================================================================
--- a/drivers/ide/siimage.c
+++ b/drivers/ide/siimage.c
@@ -667,7 +667,7 @@ static void __devinit init_iops_siimage(
* Check for the presence of an ATA66 capable cable on the interface.
*/
-static u8 sil_cable_detect(ide_hwif_t *hwif)
+static int sil_cable_detect(ide_hwif_t *hwif)
{
struct pci_dev *dev = to_pci_dev(hwif->dev);
unsigned long addr = siimage_selreg(hwif, 0);
Index: b/drivers/ide/sis5513.c
===================================================================
--- a/drivers/ide/sis5513.c
+++ b/drivers/ide/sis5513.c
@@ -508,7 +508,7 @@ static int init_chipset_sis5513(struct p
#include "../ata/pata_sis.h"
-static u8 sis_cable_detect(ide_hwif_t *hwif)
+static int sis_cable_detect(ide_hwif_t *hwif)
{
struct pci_dev *pdev = to_pci_dev(hwif->dev);
u8 ata66 = 0;
Index: b/drivers/ide/slc90e66.c
===================================================================
--- a/drivers/ide/slc90e66.c
+++ b/drivers/ide/slc90e66.c
@@ -115,7 +115,7 @@ static void slc90e66_set_dma_mode(ide_hw
}
}
-static u8 slc90e66_cable_detect(ide_hwif_t *hwif)
+static int slc90e66_cable_detect(ide_hwif_t *hwif)
{
struct pci_dev *dev = to_pci_dev(hwif->dev);
u8 reg47 = 0, mask = hwif->channel ? 0x01 : 0x02;
Index: b/drivers/ide/tc86c001.c
===================================================================
--- a/drivers/ide/tc86c001.c
+++ b/drivers/ide/tc86c001.c
@@ -130,7 +130,7 @@ static void tc86c001_dma_start(ide_drive
ide_dma_start(drive);
}
-static u8 tc86c001_cable_detect(ide_hwif_t *hwif)
+static int tc86c001_cable_detect(ide_hwif_t *hwif)
{
struct pci_dev *dev = to_pci_dev(hwif->dev);
unsigned long sc_base = pci_resource_start(dev, 5);
Index: b/drivers/ide/tx4939ide.c
===================================================================
--- a/drivers/ide/tx4939ide.c
+++ b/drivers/ide/tx4939ide.c
@@ -189,7 +189,7 @@ static void tx4939ide_clear_irq(ide_driv
tx4939ide_writew(ctl, base, TX4939IDE_Int_Ctl);
}
-static u8 tx4939ide_cable_detect(ide_hwif_t *hwif)
+static int tx4939ide_cable_detect(ide_hwif_t *hwif)
{
void __iomem *base = TX4939IDE_BASE(hwif);
Index: b/drivers/ide/via82cxxx.c
===================================================================
--- a/drivers/ide/via82cxxx.c
+++ b/drivers/ide/via82cxxx.c
@@ -352,7 +352,7 @@ static int init_chipset_via82cxxx(struct
#include "../ata/pata_via.h"
-static u8 via82cxxx_cable_detect(ide_hwif_t *hwif)
+static int via82cxxx_cable_detect(ide_hwif_t *hwif)
{
struct pci_dev *pdev = to_pci_dev(hwif->dev);
struct ide_host *host = pci_get_drvdata(pdev);
Index: b/include/linux/ide.h
===================================================================
--- a/include/linux/ide.h
+++ b/include/linux/ide.h
@@ -644,7 +644,7 @@ struct ide_port_ops {
u8 (*mdma_filter)(ide_drive_t *);
u8 (*udma_filter)(ide_drive_t *);
- u8 (*cable_detect)(struct hwif_s *);
+ int (*cable_detect)(struct hwif_s *);
};
struct ide_dma_ops {
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 25/68] it8213: always program control bits
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (23 preceding siblings ...)
2010-01-29 16:05 ` [PATCH 24/68] ide: change ->cable_detect method return type to 'int' Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:05 ` Bartlomiej Zolnierkiewicz
2010-01-29 17:36 ` Sergei Shtylyov
2010-01-29 16:05 ` [PATCH 26/68] piix: " Bartlomiej Zolnierkiewicz
` (43 subsequent siblings)
68 siblings, 1 reply; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:05 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] it8213: always program control bits
This matches behavior of libata pata_it8213 host driver.
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ide/it8213.c | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
Index: b/drivers/ide/it8213.c
===================================================================
--- a/drivers/ide/it8213.c
+++ b/drivers/ide/it8213.c
@@ -55,15 +55,13 @@ static void it8213_set_pio_mode(ide_hwif
if (is_slave) {
master_data |= 0x4000;
master_data &= ~0x0070;
- if (pio > 1)
- master_data = master_data | (control << 4);
+ master_data = master_data | (control << 4);
pci_read_config_byte(dev, slave_port, &slave_data);
slave_data = slave_data & 0xf0;
slave_data = slave_data | (timings[pio][0] << 2) | timings[pio][1];
} else {
master_data &= ~0x3307;
- if (pio > 1)
- master_data = master_data | control;
+ master_data = master_data | control;
master_data = master_data | (timings[pio][0] << 12) | (timings[pio][1] << 8);
}
pci_write_config_word(dev, master_port, master_data);
^ permalink raw reply [flat|nested] 86+ messages in thread* Re: [PATCH 25/68] it8213: always program control bits
2010-01-29 16:05 ` [PATCH 25/68] it8213: always program control bits Bartlomiej Zolnierkiewicz
@ 2010-01-29 17:36 ` Sergei Shtylyov
0 siblings, 0 replies; 86+ messages in thread
From: Sergei Shtylyov @ 2010-01-29 17:36 UTC (permalink / raw)
To: Bartlomiej Zolnierkiewicz; +Cc: linux-ide, linux-kernel
Hello.
Bartlomiej Zolnierkiewicz wrote:
> From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
> Subject: [PATCH] it8213: always program control bits
>
> This matches behavior of libata pata_it8213 host driver.
>
> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
> ---
> drivers/ide/it8213.c | 6 ++----
> 1 file changed, 2 insertions(+), 4 deletions(-)
>
> Index: b/drivers/ide/it8213.c
> ===================================================================
> --- a/drivers/ide/it8213.c
> +++ b/drivers/ide/it8213.c
> @@ -55,15 +55,13 @@ static void it8213_set_pio_mode(ide_hwif
> if (is_slave) {
> master_data |= 0x4000;
> master_data &= ~0x0070;
> - if (pio > 1)
> - master_data = master_data | (control << 4);
> + master_data = master_data | (control << 4);
>
master_data |= control << 4; /* it's C after all */
> pci_read_config_byte(dev, slave_port, &slave_data);
> slave_data = slave_data & 0xf0;
> slave_data = slave_data | (timings[pio][0] << 2) | timings[pio][1];
> } else {
> master_data &= ~0x3307;
> - if (pio > 1)
> - master_data = master_data | control;
> + master_data = master_data | control;
>
master_data |= control;
> master_data = master_data | (timings[pio][0] << 12) | (timings[pio][1] << 8);
>
MBR, Sergei
^ permalink raw reply [flat|nested] 86+ messages in thread
* [PATCH 26/68] piix: always program control bits
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (24 preceding siblings ...)
2010-01-29 16:05 ` [PATCH 25/68] it8213: always program control bits Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:05 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:06 ` [PATCH 27/68] slc90e66: " Bartlomiej Zolnierkiewicz
` (42 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:05 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] piix: always program control bits
This matches behavior of libata ata_piix host driver.
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ide/piix.c | 12 ++++--------
1 file changed, 4 insertions(+), 8 deletions(-)
Index: b/drivers/ide/piix.c
===================================================================
--- a/drivers/ide/piix.c
+++ b/drivers/ide/piix.c
@@ -103,20 +103,16 @@ static void piix_set_pio_mode(ide_hwif_t
if (is_slave) {
master_data |= 0x4000;
master_data &= ~0x0070;
- if (pio > 1) {
- /* Set PPE, IE and TIME */
- master_data |= control << 4;
- }
+ /* Set PPE, IE and TIME */
+ master_data |= control << 4;
pci_read_config_byte(dev, slave_port, &slave_data);
slave_data &= hwif->channel ? 0x0f : 0xf0;
slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) <<
(hwif->channel ? 4 : 0);
} else {
master_data &= ~0x3307;
- if (pio > 1) {
- /* enable PPE, IE and TIME */
- master_data |= control;
- }
+ /* enable PPE, IE and TIME */
+ master_data |= control;
master_data |= (timings[pio][0] << 12) | (timings[pio][1] << 8);
}
pci_write_config_word(dev, master_port, master_data);
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 27/68] slc90e66: always program control bits
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (25 preceding siblings ...)
2010-01-29 16:05 ` [PATCH 26/68] piix: " Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:06 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:06 ` [PATCH 28/68] add ide2libata header file Bartlomiej Zolnierkiewicz
` (41 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:06 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] slc90e66: always program control bits
This matches behavior of libata pata_efar host driver.
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ide/slc90e66.c | 12 ++++--------
1 file changed, 4 insertions(+), 8 deletions(-)
Index: b/drivers/ide/slc90e66.c
===================================================================
--- a/drivers/ide/slc90e66.c
+++ b/drivers/ide/slc90e66.c
@@ -50,20 +50,16 @@ static void slc90e66_set_pio_mode(ide_hw
if (is_slave) {
master_data |= 0x4000;
master_data &= ~0x0070;
- if (pio > 1) {
- /* Set PPE, IE and TIME */
- master_data |= control << 4;
- }
+ /* Set PPE, IE and TIME */
+ master_data |= control << 4;
pci_read_config_byte(dev, slave_port, &slave_data);
slave_data &= hwif->channel ? 0x0f : 0xf0;
slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) <<
(hwif->channel ? 4 : 0);
} else {
master_data &= ~0x3307;
- if (pio > 1) {
- /* enable PPE, IE and TIME */
- master_data |= control;
- }
+ /* enable PPE, IE and TIME */
+ master_data |= control;
master_data |= (timings[pio][0] << 12) | (timings[pio][1] << 8);
}
pci_write_config_word(dev, master_port, master_data);
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 28/68] add ide2libata header file
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (26 preceding siblings ...)
2010-01-29 16:06 ` [PATCH 27/68] slc90e66: " Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:06 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:06 ` [PATCH 29/68] ata_piix: move code to be re-used by ide2libata to ata_piix.h Bartlomiej Zolnierkiewicz
` (40 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:06 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] add ide2libata header file
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
include/linux/ide2libata.h | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
Index: b/include/linux/ide2libata.h
===================================================================
--- /dev/null
+++ b/include/linux/ide2libata.h
@@ -0,0 +1,17 @@
+#ifndef __IDE2LIBATA_H
+#define __IDE2LIBATA_H
+
+#include <linux/ide.h>
+
+#define __IDE2LIBATA 1
+
+#define ATA_DEV_ATA ide_disk
+
+#define ata_host ide_host
+#define ata_port hwif_s
+#define ata_device ide_drive_s
+
+#define ata_pio_need_iordy(d) ide_pio_need_iordy(d, d->pio_mode - XFER_PIO_0)
+#define ata_dev_pair ide_get_pair_dev
+
+#endif /* __IDE2LIBATA_H */
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 29/68] ata_piix: move code to be re-used by ide2libata to ata_piix.h
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (27 preceding siblings ...)
2010-01-29 16:06 ` [PATCH 28/68] add ide2libata header file Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:06 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:06 ` [PATCH 30/68] piix: convert to ide2libata Bartlomiej Zolnierkiewicz
` (39 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:06 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] ata_piix: move code to be re-used by ide2libata to ata_piix.h
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ata/ata_piix.c | 220 -----------------------------------------------
drivers/ata/ata_piix.h | 226 +++++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 226 insertions(+), 220 deletions(-)
Index: b/drivers/ata/ata_piix.c
===================================================================
--- a/drivers/ata/ata_piix.c
+++ b/drivers/ata/ata_piix.c
@@ -629,178 +629,6 @@ static int piix_pata_prereset(struct ata
return ata_sff_prereset(link, deadline);
}
-static DEFINE_SPINLOCK(piix_lock);
-
-static void piix_set_timings(struct ata_port *ap, struct ata_device *adev,
- u8 pio, bool use_mwdma)
-{
- struct pci_dev *dev = to_pci_dev(ap->host->dev);
- unsigned long flags;
- unsigned int is_slave = (adev->devno != 0);
- unsigned int master_port= ap->port_no ? 0x42 : 0x40;
- unsigned int slave_port = 0x44;
- u16 master_data;
- u8 slave_data;
- u8 udma_enable;
- int control = 0;
-
- /*
- * See Intel Document 298600-004 for the timing programing rules
- * for ICH controllers.
- */
-
- static const /* ISP RTC */
- u8 timings[][2] = { { 0, 0 },
- { 0, 0 },
- { 1, 0 },
- { 2, 1 },
- { 2, 3 }, };
-
- if (pio >= 2 || use_mwdma)
- control |= 1; /* TIME1 enable */
- if (ata_pio_need_iordy(adev) || use_mwdma)
- control |= 2; /* IE enable */
- /* Intel specifies that the PPE functionality is for disk only */
- if (adev->class == ATA_DEV_ATA)
- control |= 4; /* PPE enable */
- /* If the drive MWDMA is faster than it can do PIO then
- we must force PIO into PIO0 */
- if (use_mwdma && adev->pio_mode < (XFER_PIO_0 + pio))
- /* Enable DMA timing only */
- control |= 8; /* PIO cycles in PIO0 */
-
- spin_lock_irqsave(&piix_lock, flags);
-
- /* PIO configuration clears DTE unconditionally. It will be
- * programmed in set_dmamode which is guaranteed to be called
- * after set_piomode if any DMA mode is available.
- */
- pci_read_config_word(dev, master_port, &master_data);
- if (is_slave) {
- /* clear TIME1|IE1|PPE1|DTE1 */
- master_data &= 0xff0f;
- /* Enable SITRE (separate slave timing register) */
- master_data |= 0x4000;
- /* enable PPE1, IE1 and TIME1 as needed */
- master_data |= (control << 4);
- pci_read_config_byte(dev, slave_port, &slave_data);
- slave_data &= (ap->port_no ? 0x0f : 0xf0);
- /* Load the timing nibble for this slave */
- slave_data |= ((timings[pio][0] << 2) | timings[pio][1])
- << (ap->port_no ? 4 : 0);
- } else {
- /* clear ISP|RCT|TIME0|IE0|PPE0|DTE0 */
- master_data &= 0xccf0;
- /* Enable PPE, IE and TIME as appropriate */
- master_data |= control;
- /* load ISP and RCT */
- master_data |=
- (timings[pio][0] << 12) |
- (timings[pio][1] << 8);
- }
- pci_write_config_word(dev, master_port, master_data);
- if (is_slave)
- pci_write_config_byte(dev, slave_port, slave_data);
-
- /* Ensure the UDMA bit is off - it will be turned back on if
- UDMA is selected */
-
- if (ap->udma_mask) {
- pci_read_config_byte(dev, 0x48, &udma_enable);
- udma_enable &= ~(1 << (2 * ap->port_no + adev->devno));
- pci_write_config_byte(dev, 0x48, udma_enable);
- }
-
- spin_unlock_irqrestore(&piix_lock, flags);
-}
-
-/**
- * piix_set_piomode - Initialize host controller PATA PIO timings
- * @ap: Port whose timings we are configuring
- * @adev: Drive in question
- *
- * Set PIO mode for device, in host controller PCI config space.
- *
- * LOCKING:
- * None (inherited from caller).
- */
-
-static void piix_set_piomode(struct ata_port *ap, struct ata_device *adev)
-{
- piix_set_timings(ap, adev, adev->pio_mode - XFER_PIO_0, 0);
-}
-
-/**
- * do_pata_set_dmamode - Initialize host controller PATA PIO timings
- * @ap: Port whose timings we are configuring
- * @adev: Drive in question
- * @isich: set if the chip is an ICH device
- *
- * Set UDMA mode for device, in host controller PCI config space.
- *
- * LOCKING:
- * None (inherited from caller).
- */
-
-static void do_pata_set_dmamode(struct ata_port *ap, struct ata_device *adev, int isich)
-{
- struct pci_dev *dev = to_pci_dev(ap->host->dev);
- unsigned long flags;
- u8 speed = adev->dma_mode;
- int devid = adev->devno + 2 * ap->port_no;
- u8 udma_enable = 0;
-
- if (speed >= XFER_UDMA_0) {
- unsigned int udma = speed - XFER_UDMA_0;
- u16 udma_timing;
- u16 ideconf;
- int u_clock, u_speed;
-
- spin_lock_irqsave(&piix_lock, flags);
-
- pci_read_config_byte(dev, 0x48, &udma_enable);
-
- /*
- * UDMA is handled by a combination of clock switching and
- * selection of dividers
- *
- * Handy rule: Odd modes are UDMATIMx 01, even are 02
- * except UDMA0 which is 00
- */
- u_speed = min(2 - (udma & 1), udma);
- if (udma == 5)
- u_clock = 0x1000; /* 100Mhz */
- else if (udma > 2)
- u_clock = 1; /* 66Mhz */
- else
- u_clock = 0; /* 33Mhz */
-
- udma_enable |= (1 << devid);
-
- /* Load the CT/RP selection */
- pci_read_config_word(dev, 0x4A, &udma_timing);
- udma_timing &= ~(3 << (4 * devid));
- udma_timing |= u_speed << (4 * devid);
- pci_write_config_word(dev, 0x4A, udma_timing);
-
- if (isich) {
- /* Select a 33/66/100Mhz clock */
- pci_read_config_word(dev, 0x54, &ideconf);
- ideconf &= ~(0x1001 << devid);
- ideconf |= u_clock << devid;
- /* For ICH or later we should set bit 10 for better
- performance (WR_PingPong_En) */
- pci_write_config_word(dev, 0x54, ideconf);
- }
-
- pci_write_config_byte(dev, 0x48, udma_enable);
-
- spin_unlock_irqrestore(&piix_lock, flags);
- } else
- /* MWDMA is driven by the PIO timings. */
- piix_set_timings(ap, adev, ata_mwdma_to_pio(speed), 1);
-}
-
/**
* piix_set_dmamode - Initialize host controller PATA DMA timings
* @ap: Port whose timings we are configuring
@@ -817,22 +645,6 @@ static void piix_set_dmamode(struct ata_
do_pata_set_dmamode(ap, adev, 0);
}
-/**
- * ich_set_dmamode - Initialize host controller PATA DMA timings
- * @ap: Port whose timings we are configuring
- * @adev: um
- *
- * Set MW/UDMA mode for device, in host controller PCI config space.
- *
- * LOCKING:
- * None (inherited from caller).
- */
-
-static void ich_set_dmamode(struct ata_port *ap, struct ata_device *adev)
-{
- do_pata_set_dmamode(ap, adev, 1);
-}
-
/*
* Serial ATA Index/Data Pair Superset Registers access
*
@@ -1145,38 +957,6 @@ static int piix_disable_ahci(struct pci_
return rc;
}
-/**
- * piix_check_450nx_errata - Check for problem 450NX setup
- * @ata_dev: the PCI device to check
- *
- * Check for the present of 450NX errata #19 and errata #25. If
- * they are found return an error code so we can turn off DMA
- */
-
-static int __devinit piix_check_450nx_errata(struct pci_dev *ata_dev)
-{
- struct pci_dev *pdev = NULL;
- u16 cfg;
- int no_piix_dma = 0;
-
- while ((pdev = pci_get_device(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82454NX, pdev)) != NULL) {
- /* Look for 450NX PXB. Check for problem configurations
- A PCI quirk checks bit 6 already */
- pci_read_config_word(pdev, 0x41, &cfg);
- /* Only on the original revision: IDE DMA can hang */
- if (pdev->revision == 0x00)
- no_piix_dma = 1;
- /* On all revisions below 5 PXB bus lock must be disabled for IDE */
- else if (cfg & (1<<14) && pdev->revision < 5)
- no_piix_dma = 2;
- }
- if (no_piix_dma)
- dev_printk(KERN_WARNING, &ata_dev->dev, "450NX errata present, disabling IDE DMA.\n");
- if (no_piix_dma == 2)
- dev_printk(KERN_WARNING, &ata_dev->dev, "A BIOS update may resolve this.\n");
- return no_piix_dma;
-}
-
static void __devinit piix_init_pcs(struct ata_host *host,
const struct piix_map_db *map_db)
{
Index: b/drivers/ata/ata_piix.h
===================================================================
--- a/drivers/ata/ata_piix.h
+++ b/drivers/ata/ata_piix.h
@@ -43,3 +43,229 @@ static int ich_short_ata40(struct pci_de
return 0;
}
+
+#ifdef __LINUX_LIBATA_H__
+static DEFINE_SPINLOCK(piix_lock);
+
+static void piix_set_timings(struct ata_port *ap, struct ata_device *adev,
+ u8 pio, bool use_mwdma)
+{
+ struct pci_dev *dev = to_pci_dev(ap->host->dev);
+ unsigned long flags;
+ unsigned int is_slave = (adev->devno != 0);
+ unsigned int master_port = ap->port_no ? 0x42 : 0x40;
+ unsigned int slave_port = 0x44;
+ u16 master_data;
+ u8 slave_data;
+ u8 udma_enable;
+ int control = 0;
+
+ /*
+ * See Intel Document 298600-004 for the timing programing rules
+ * for ICH controllers.
+ */
+
+ static const /* ISP RTC */
+ u8 timings[][2] = { { 0, 0 },
+ { 0, 0 },
+ { 1, 0 },
+ { 2, 1 },
+ { 2, 3 }, };
+
+ if (pio >= 2 || use_mwdma)
+ control |= 1; /* TIME1 enable */
+ if (ata_pio_need_iordy(adev) || use_mwdma)
+ control |= 2; /* IE enable */
+ /* Intel specifies that the PPE functionality is for disk only */
+ if (adev->class == ATA_DEV_ATA)
+ control |= 4; /* PPE enable */
+ /* If the drive MWDMA is faster than it can do PIO then
+ we must force PIO into PIO0 */
+ if (use_mwdma && adev->pio_mode < (XFER_PIO_0 + pio))
+ /* Enable DMA timing only */
+ control |= 8; /* PIO cycles in PIO0 */
+
+ spin_lock_irqsave(&piix_lock, flags);
+
+ /* PIO configuration clears DTE unconditionally. It will be
+ * programmed in set_dmamode which is guaranteed to be called
+ * after set_piomode if any DMA mode is available.
+ */
+ pci_read_config_word(dev, master_port, &master_data);
+ if (is_slave) {
+ /* clear TIME1|IE1|PPE1|DTE1 */
+ master_data &= 0xff0f;
+ /* Enable SITRE (separate slave timing register) */
+ master_data |= 0x4000;
+ /* enable PPE1, IE1 and TIME1 as needed */
+ master_data |= (control << 4);
+ pci_read_config_byte(dev, slave_port, &slave_data);
+ slave_data &= (ap->port_no ? 0x0f : 0xf0);
+ /* Load the timing nibble for this slave */
+ slave_data |= ((timings[pio][0] << 2) | timings[pio][1])
+ << (ap->port_no ? 4 : 0);
+ } else {
+ /* clear ISP|RCT|TIME0|IE0|PPE0|DTE0 */
+ master_data &= 0xccf0;
+ /* Enable PPE, IE and TIME as appropriate */
+ master_data |= control;
+ /* load ISP and RCT */
+ master_data |=
+ (timings[pio][0] << 12) |
+ (timings[pio][1] << 8);
+ }
+ pci_write_config_word(dev, master_port, master_data);
+ if (is_slave)
+ pci_write_config_byte(dev, slave_port, slave_data);
+
+ /* Ensure the UDMA bit is off - it will be turned back on if
+ UDMA is selected */
+
+ if (ap->udma_mask) {
+ pci_read_config_byte(dev, 0x48, &udma_enable);
+ udma_enable &= ~(1 << (2 * ap->port_no + adev->devno));
+ pci_write_config_byte(dev, 0x48, udma_enable);
+ }
+
+ spin_unlock_irqrestore(&piix_lock, flags);
+}
+
+/**
+ * piix_set_piomode - Initialize host controller PATA PIO timings
+ * @ap: Port whose timings we are configuring
+ * @adev: Drive in question
+ *
+ * Set PIO mode for device, in host controller PCI config space.
+ *
+ * LOCKING:
+ * None (inherited from caller).
+ */
+
+static void piix_set_piomode(struct ata_port *ap, struct ata_device *adev)
+{
+ piix_set_timings(ap, adev, adev->pio_mode - XFER_PIO_0, 0);
+}
+
+/**
+ * do_pata_set_dmamode - Initialize host controller PATA PIO timings
+ * @ap: Port whose timings we are configuring
+ * @adev: Drive in question
+ * @isich: set if the chip is an ICH device
+ *
+ * Set UDMA mode for device, in host controller PCI config space.
+ *
+ * LOCKING:
+ * None (inherited from caller).
+ */
+
+static void do_pata_set_dmamode(struct ata_port *ap, struct ata_device *adev,
+ int isich)
+{
+ struct pci_dev *dev = to_pci_dev(ap->host->dev);
+ unsigned long flags;
+ u8 speed = adev->dma_mode;
+ int devid = adev->devno + 2 * ap->port_no;
+ u8 udma_enable = 0;
+
+ if (speed >= XFER_UDMA_0) {
+ unsigned int udma = speed - XFER_UDMA_0;
+ u16 udma_timing;
+ u16 ideconf;
+ int u_clock, u_speed;
+
+ spin_lock_irqsave(&piix_lock, flags);
+
+ pci_read_config_byte(dev, 0x48, &udma_enable);
+
+ /*
+ * UDMA is handled by a combination of clock switching and
+ * selection of dividers
+ *
+ * Handy rule: Odd modes are UDMATIMx 01, even are 02
+ * except UDMA0 which is 00
+ */
+ u_speed = min(2 - (udma & 1), udma);
+ if (udma == 5)
+ u_clock = 0x1000; /* 100Mhz */
+ else if (udma > 2)
+ u_clock = 1; /* 66Mhz */
+ else
+ u_clock = 0; /* 33Mhz */
+
+ udma_enable |= (1 << devid);
+
+ /* Load the CT/RP selection */
+ pci_read_config_word(dev, 0x4A, &udma_timing);
+ udma_timing &= ~(3 << (4 * devid));
+ udma_timing |= u_speed << (4 * devid);
+ pci_write_config_word(dev, 0x4A, udma_timing);
+
+ if (isich) {
+ /* Select a 33/66/100Mhz clock */
+ pci_read_config_word(dev, 0x54, &ideconf);
+ ideconf &= ~(0x1001 << devid);
+ ideconf |= u_clock << devid;
+ /* For ICH or later we should set bit 10 for better
+ performance (WR_PingPong_En) */
+ pci_write_config_word(dev, 0x54, ideconf);
+ }
+
+ pci_write_config_byte(dev, 0x48, udma_enable);
+
+ spin_unlock_irqrestore(&piix_lock, flags);
+ } else
+ /* MWDMA is driven by the PIO timings. */
+ piix_set_timings(ap, adev, ata_mwdma_to_pio(speed), 1);
+}
+
+/**
+ * ich_set_dmamode - Initialize host controller PATA DMA timings
+ * @ap: Port whose timings we are configuring
+ * @adev: um
+ *
+ * Set MW/UDMA mode for device, in host controller PCI config space.
+ *
+ * LOCKING:
+ * None (inherited from caller).
+ */
+
+static void ich_set_dmamode(struct ata_port *ap, struct ata_device *adev)
+{
+ do_pata_set_dmamode(ap, adev, 1);
+}
+
+/**
+ * piix_check_450nx_errata - Check for problem 450NX setup
+ * @ata_dev: the PCI device to check
+ *
+ * Check for the present of 450NX errata #19 and errata #25. If
+ * they are found return an error code so we can turn off DMA
+ */
+
+static int __devinit piix_check_450nx_errata(struct pci_dev *ata_dev)
+{
+ struct pci_dev *pdev = NULL;
+ u16 cfg;
+ int no_piix_dma = 0;
+
+ while ((pdev = pci_get_device(PCI_VENDOR_ID_INTEL,
+ PCI_DEVICE_ID_INTEL_82454NX, pdev)) != NULL) {
+ /* Look for 450NX PXB. Check for problem configurations
+ A PCI quirk checks bit 6 already */
+ pci_read_config_word(pdev, 0x41, &cfg);
+ /* Only on the original revision: IDE DMA can hang */
+ if (pdev->revision == 0x00)
+ no_piix_dma = 1;
+ /* On all revs below 5 PXB bus lock must be disabled for IDE */
+ else if (cfg & (1<<14) && pdev->revision < 5)
+ no_piix_dma = 2;
+ }
+ if (no_piix_dma)
+ dev_printk(KERN_WARNING, &ata_dev->dev,
+ "450NX errata present, disabling IDE DMA.\n");
+ if (no_piix_dma == 2)
+ dev_printk(KERN_WARNING, &ata_dev->dev,
+ "A BIOS update may resolve this.\n");
+ return no_piix_dma;
+}
+#endif
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 30/68] piix: convert to ide2libata
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (28 preceding siblings ...)
2010-01-29 16:06 ` [PATCH 29/68] ata_piix: move code to be re-used by ide2libata to ata_piix.h Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:06 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:06 ` [PATCH 31/68] pata_ali: move code to be re-used by ide2libata to pata_ali.h Bartlomiej Zolnierkiewicz
` (38 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:06 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] piix: convert to ide2libata
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ata/ata_piix.h | 15 ++--
drivers/ide/piix.c | 182 ++-----------------------------------------------
2 files changed, 19 insertions(+), 178 deletions(-)
Index: b/drivers/ata/ata_piix.h
===================================================================
--- a/drivers/ata/ata_piix.h
+++ b/drivers/ata/ata_piix.h
@@ -44,7 +44,6 @@ static int ich_short_ata40(struct pci_de
return 0;
}
-#ifdef __LINUX_LIBATA_H__
static DEFINE_SPINLOCK(piix_lock);
static void piix_set_timings(struct ata_port *ap, struct ata_device *adev,
@@ -213,9 +212,18 @@ static void do_pata_set_dmamode(struct a
pci_write_config_byte(dev, 0x48, udma_enable);
spin_unlock_irqrestore(&piix_lock, flags);
- } else
- /* MWDMA is driven by the PIO timings. */
+ } else {
+ /* Normal DMA is driven by the PIO timings. */
+#ifdef __IDE2LIBATA
+ if (speed >= XFER_MW_DMA_0)
+ adev->pio_mode = ata_mwdma_to_pio(speed) + XFER_PIO_0;
+ else
+ adev->pio_mode = XFER_PIO_2; /* for SWDMA2 */
+ piix_set_timings(ap, adev, adev->pio_mode - XFER_PIO_0, 1);
+#else
piix_set_timings(ap, adev, ata_mwdma_to_pio(speed), 1);
+#endif
+ }
}
/**
@@ -268,4 +276,3 @@ static int __devinit piix_check_450nx_er
"A BIOS update may resolve this.\n");
return no_piix_dma;
}
-#endif
Index: b/drivers/ide/piix.c
===================================================================
--- a/drivers/ide/piix.c
+++ b/drivers/ide/piix.c
@@ -55,142 +55,7 @@
#define DRV_NAME "piix"
-static int no_piix_dma;
-
-/**
- * piix_set_pio_mode - set host controller for PIO mode
- * @port: port
- * @drive: drive
- *
- * Set the interface PIO mode based upon the settings done by AMI BIOS.
- */
-
-static void piix_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
-{
- struct pci_dev *dev = to_pci_dev(hwif->dev);
- int is_slave = drive->dn & 1;
- int master_port = hwif->channel ? 0x42 : 0x40;
- int slave_port = 0x44;
- unsigned long flags;
- u16 master_data;
- u8 slave_data;
- static DEFINE_SPINLOCK(tune_lock);
- int control = 0;
- const u8 pio = drive->pio_mode - XFER_PIO_0;
-
- /* ISP RTC */
- static const u8 timings[][2]= {
- { 0, 0 },
- { 0, 0 },
- { 1, 0 },
- { 2, 1 },
- { 2, 3 }, };
-
- /*
- * Master vs slave is synchronized above us but the slave register is
- * shared by the two hwifs so the corner case of two slave timeouts in
- * parallel must be locked.
- */
- spin_lock_irqsave(&tune_lock, flags);
- pci_read_config_word(dev, master_port, &master_data);
-
- if (pio > 1)
- control |= 1; /* Programmable timing on */
- if (drive->media == ide_disk)
- control |= 4; /* Prefetch, post write */
- if (ide_pio_need_iordy(drive, pio))
- control |= 2; /* IORDY */
- if (is_slave) {
- master_data |= 0x4000;
- master_data &= ~0x0070;
- /* Set PPE, IE and TIME */
- master_data |= control << 4;
- pci_read_config_byte(dev, slave_port, &slave_data);
- slave_data &= hwif->channel ? 0x0f : 0xf0;
- slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) <<
- (hwif->channel ? 4 : 0);
- } else {
- master_data &= ~0x3307;
- /* enable PPE, IE and TIME */
- master_data |= control;
- master_data |= (timings[pio][0] << 12) | (timings[pio][1] << 8);
- }
- pci_write_config_word(dev, master_port, master_data);
- if (is_slave)
- pci_write_config_byte(dev, slave_port, slave_data);
- spin_unlock_irqrestore(&tune_lock, flags);
-}
-
-/**
- * piix_set_dma_mode - set host controller for DMA mode
- * @hwif: port
- * @drive: drive
- *
- * Set a PIIX host controller to the desired DMA mode. This involves
- * programming the right timing data into the PCI configuration space.
- */
-
-static void piix_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
-{
- struct pci_dev *dev = to_pci_dev(hwif->dev);
- u8 maslave = hwif->channel ? 0x42 : 0x40;
- int a_speed = 3 << (drive->dn * 4);
- int u_flag = 1 << drive->dn;
- int v_flag = 0x01 << drive->dn;
- int w_flag = 0x10 << drive->dn;
- int u_speed = 0;
- int sitre;
- u16 reg4042, reg4a;
- u8 reg48, reg54, reg55;
- const u8 speed = drive->dma_mode;
-
- pci_read_config_word(dev, maslave, ®4042);
- sitre = (reg4042 & 0x4000) ? 1 : 0;
- pci_read_config_byte(dev, 0x48, ®48);
- pci_read_config_word(dev, 0x4a, ®4a);
- pci_read_config_byte(dev, 0x54, ®54);
- pci_read_config_byte(dev, 0x55, ®55);
-
- if (speed >= XFER_UDMA_0) {
- u8 udma = speed - XFER_UDMA_0;
-
- u_speed = min_t(u8, 2 - (udma & 1), udma) << (drive->dn * 4);
-
- if (!(reg48 & u_flag))
- pci_write_config_byte(dev, 0x48, reg48 | u_flag);
- if (speed == XFER_UDMA_5) {
- pci_write_config_byte(dev, 0x55, (u8) reg55|w_flag);
- } else {
- pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag);
- }
- if ((reg4a & a_speed) != u_speed)
- pci_write_config_word(dev, 0x4a, (reg4a & ~a_speed) | u_speed);
- if (speed > XFER_UDMA_2) {
- if (!(reg54 & v_flag))
- pci_write_config_byte(dev, 0x54, reg54 | v_flag);
- } else
- pci_write_config_byte(dev, 0x54, reg54 & ~v_flag);
- } else {
- const u8 mwdma_to_pio[] = { 0, 3, 4 };
-
- if (reg48 & u_flag)
- pci_write_config_byte(dev, 0x48, reg48 & ~u_flag);
- if (reg4a & a_speed)
- pci_write_config_word(dev, 0x4a, reg4a & ~a_speed);
- if (reg54 & v_flag)
- pci_write_config_byte(dev, 0x54, reg54 & ~v_flag);
- if (reg55 & w_flag)
- pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag);
-
- if (speed >= XFER_MW_DMA_0)
- drive->pio_mode =
- mwdma_to_pio[speed - XFER_MW_DMA_0] + XFER_PIO_0;
- else
- drive->pio_mode = XFER_PIO_2; /* for SWDMA2 */
-
- piix_set_pio_mode(hwif, drive);
- }
-}
+static int piix_no_dma;
/**
* init_chipset_ich - set up the ICH chipset
@@ -237,6 +102,7 @@ static void ich_clear_irq(ide_drive_t *d
outb(dma_stat, hwif->dma_base + ATA_DMA_STATUS);
}
+#include <linux/ide2libata.h>
#include "../ata/ata_piix.h"
static int piix_cable_detect(ide_hwif_t *hwif)
@@ -263,22 +129,19 @@ static int piix_cable_detect(ide_hwif_t
static void __devinit init_hwif_piix(ide_hwif_t *hwif)
{
- if (!hwif->dma_base)
- return;
-
- if (no_piix_dma)
+ if (hwif->dma_base && piix_no_dma)
hwif->ultra_mask = hwif->mwdma_mask = hwif->swdma_mask = 0;
}
static const struct ide_port_ops piix_port_ops = {
- .set_pio_mode = piix_set_pio_mode,
- .set_dma_mode = piix_set_dma_mode,
+ .set_pio_mode = piix_set_piomode,
+ .set_dma_mode = ich_set_dmamode, /* FIXME: needs more work */
.cable_detect = piix_cable_detect,
};
static const struct ide_port_ops ich_port_ops = {
- .set_pio_mode = piix_set_pio_mode,
- .set_dma_mode = piix_set_dma_mode,
+ .set_pio_mode = piix_set_piomode,
+ .set_dma_mode = ich_set_dmamode,
.clear_irq = ich_clear_irq,
.cable_detect = piix_cable_detect,
};
@@ -346,38 +209,10 @@ static const struct ide_port_info piix_p
static int __devinit piix_init_one(struct pci_dev *dev, const struct pci_device_id *id)
{
+ piix_no_dma = piix_check_450nx_errata(dev);
return ide_pci_init_one(dev, &piix_pci_info[id->driver_data], NULL);
}
-/**
- * piix_check_450nx - Check for problem 450NX setup
- *
- * Check for the present of 450NX errata #19 and errata #25. If
- * they are found, disable use of DMA IDE
- */
-
-static void __devinit piix_check_450nx(void)
-{
- struct pci_dev *pdev = NULL;
- u16 cfg;
- while((pdev=pci_get_device(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82454NX, pdev))!=NULL)
- {
- /* Look for 450NX PXB. Check for problem configurations
- A PCI quirk checks bit 6 already */
- pci_read_config_word(pdev, 0x41, &cfg);
- /* Only on the original revision: IDE DMA can hang */
- if (pdev->revision == 0x00)
- no_piix_dma = 1;
- /* On all revisions below 5 PXB bus lock must be disabled for IDE */
- else if (cfg & (1<<14) && pdev->revision < 5)
- no_piix_dma = 2;
- }
- if(no_piix_dma)
- printk(KERN_WARNING DRV_NAME ": 450NX errata present, disabling IDE DMA.\n");
- if(no_piix_dma == 2)
- printk(KERN_WARNING DRV_NAME ": A BIOS update may resolve this.\n");
-}
-
static const struct pci_device_id piix_pci_tbl[] = {
{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82371FB_0), 1 },
{ PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_82371FB_1), 1 },
@@ -421,7 +256,6 @@ static struct pci_driver piix_pci_driver
static int __init piix_ide_init(void)
{
- piix_check_450nx();
return ide_pci_register_driver(&piix_pci_driver);
}
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 31/68] pata_ali: move code to be re-used by ide2libata to pata_ali.h
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (29 preceding siblings ...)
2010-01-29 16:06 ` [PATCH 30/68] piix: convert to ide2libata Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:06 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:06 ` [PATCH 32/68] alim15x3: convert to ide2libata Bartlomiej Zolnierkiewicz
` (37 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:06 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] pata_ali: move code to be re-used by ide2libata to pata_ali.h
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ata/pata_ali.c | 240 ------------------------------------------------
drivers/ata/pata_ali.h | 241 +++++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 241 insertions(+), 240 deletions(-)
Index: b/drivers/ata/pata_ali.c
===================================================================
--- a/drivers/ata/pata_ali.c
+++ b/drivers/ata/pata_ali.c
@@ -45,33 +45,6 @@ static struct pci_dev *ali_isa_bridge;
#include "pata_ali.h"
/**
- * ali_c2_cable_detect - cable detection
- * @ap: ATA port
- *
- * Perform cable detection for C2 and later revisions
- */
-
-static int ali_c2_cable_detect(struct ata_port *ap)
-{
- struct pci_dev *pdev = to_pci_dev(ap->host->dev);
- u8 ata66;
-
- /* Certain laptops use short but suitable cables and don't
- implement the detect logic */
-
- if (ali_cable_override(pdev))
- return ATA_CBL_PATA40_SHORT;
-
- /* Host view cable detect 0x4A bit 0 primary bit 1 secondary
- Bit set for 40 pin */
- pci_read_config_byte(pdev, 0x4A, &ata66);
- if (ata66 & (1 << ap->port_no))
- return ATA_CBL_PATA40;
- else
- return ATA_CBL_PATA80;
-}
-
-/**
* ali_20_filter - filter for earlier ALI DMA
* @ap: ALi ATA port
* @adev: attached device
@@ -93,156 +66,6 @@ static unsigned long ali_20_filter(struc
}
/**
- * ali_fifo_control - FIFO manager
- * @ap: ALi channel to control
- * @adev: device for FIFO control
- * @on: 0 for off 1 for on
- *
- * Enable or disable the FIFO on a given device. Because of the way the
- * ALi FIFO works it provides a boost on ATA disk but can be confused by
- * ATAPI and we must therefore manage it.
- */
-
-static void ali_fifo_control(struct ata_port *ap, struct ata_device *adev, int on)
-{
- struct pci_dev *pdev = to_pci_dev(ap->host->dev);
- int pio_fifo = 0x54 + ap->port_no;
- u8 fifo;
- int shift = 4 * adev->devno;
-
- /* ATA - FIFO on set nibble to 0x05, ATAPI - FIFO off, set nibble to
- 0x00. Not all the docs agree but the behaviour we now use is the
- one stated in the BIOS Programming Guide */
-
- pci_read_config_byte(pdev, pio_fifo, &fifo);
- fifo &= ~(0x0F << shift);
- fifo |= (on << shift);
- pci_write_config_byte(pdev, pio_fifo, fifo);
-}
-
-/**
- * ali_program_modes - load mode registers
- * @ap: ALi channel to load
- * @adev: Device the timing is for
- * @t: timing data
- * @ultra: UDMA timing or zero for off
- *
- * Loads the timing registers for cmd/data and disable UDMA if
- * ultra is zero. If ultra is set then load and enable the UDMA
- * timing but do not touch the command/data timing.
- */
-
-static void ali_program_modes(struct ata_port *ap, struct ata_device *adev, struct ata_timing *t, u8 ultra)
-{
- struct pci_dev *pdev = to_pci_dev(ap->host->dev);
- int cas = 0x58 + 4 * ap->port_no; /* Command timing */
- int cbt = 0x59 + 4 * ap->port_no; /* Command timing */
- int drwt = 0x5A + 4 * ap->port_no + adev->devno; /* R/W timing */
- int udmat = 0x56 + ap->port_no; /* UDMA timing */
- int shift = 4 * adev->devno;
- u8 udma;
-
- if (t != NULL) {
- t->setup = clamp_val(t->setup, 1, 8) & 7;
- t->act8b = clamp_val(t->act8b, 1, 8) & 7;
- t->rec8b = clamp_val(t->rec8b, 1, 16) & 15;
- t->active = clamp_val(t->active, 1, 8) & 7;
- t->recover = clamp_val(t->recover, 1, 16) & 15;
-
- pci_write_config_byte(pdev, cas, t->setup);
- pci_write_config_byte(pdev, cbt, (t->act8b << 4) | t->rec8b);
- pci_write_config_byte(pdev, drwt, (t->active << 4) | t->recover);
- }
-
- /* Set up the UDMA enable */
- pci_read_config_byte(pdev, udmat, &udma);
- udma &= ~(0x0F << shift);
- udma |= ultra << shift;
- pci_write_config_byte(pdev, udmat, udma);
-}
-
-/**
- * ali_set_piomode - set initial PIO mode data
- * @ap: ATA interface
- * @adev: ATA device
- *
- * Program the ALi registers for PIO mode.
- */
-
-static void ali_set_piomode(struct ata_port *ap, struct ata_device *adev)
-{
- struct ata_device *pair = ata_dev_pair(adev);
- struct ata_timing t;
- unsigned long T = 1000000000 / 33333; /* PCI clock based */
-
- ata_timing_compute(adev->id, adev->pio_mode, adev->pio_mode, &t, T, 1);
- if (pair) {
- struct ata_timing p;
-
- ata_timing_compute(pair->id, pair->pio_mode, pair->pio_mode,
- &p, T, 1);
- ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
- if (pair->dma_mode) {
- ata_timing_compute(pair->id, pair->dma_mode,
- pair->pio_mode, &p, T, 1);
- ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
- }
- }
-
- /* PIO FIFO is only permitted on ATA disk */
- ali_fifo_control(ap, adev, (adev->class == ATA_DEV_ATA) ? 0x05 : 0x00);
-
- ali_program_modes(ap, adev, &t, 0);
-}
-
-/**
- * ali_set_dmamode - set initial DMA mode data
- * @ap: ATA interface
- * @adev: ATA device
- *
- * Program the ALi registers for DMA mode.
- */
-
-static void ali_set_dmamode(struct ata_port *ap, struct ata_device *adev)
-{
- static u8 udma_timing[7] = { 0xC, 0xB, 0xA, 0x9, 0x8, 0xF, 0xD };
- struct ata_device *pair = ata_dev_pair(adev);
- struct ata_timing t;
- unsigned long T = 1000000000 / 33333; /* PCI clock based */
- struct pci_dev *pdev = to_pci_dev(ap->host->dev);
-
-
- if (adev->class == ATA_DEV_ATA)
- ali_fifo_control(ap, adev, 0x08);
-
- if (adev->dma_mode >= XFER_UDMA_0) {
- ali_program_modes(ap, adev, NULL, udma_timing[adev->dma_mode - XFER_UDMA_0]);
- if (adev->dma_mode >= XFER_UDMA_3) {
- u8 reg4b;
- pci_read_config_byte(pdev, 0x4B, ®4b);
- reg4b |= 1;
- pci_write_config_byte(pdev, 0x4B, reg4b);
- }
- } else {
- ata_timing_compute(adev->id, adev->dma_mode, adev->pio_mode,
- &t, T, 1);
- if (pair) {
- struct ata_timing p;
-
- ata_timing_compute(pair->id, pair->pio_mode,
- pair->pio_mode, &p, T, 1);
- ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
- if (pair->dma_mode) {
- ata_timing_compute(pair->id, pair->dma_mode,
- pair->pio_mode, &p, T, 1);
- ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
- }
- }
- ali_program_modes(ap, adev, &t, 0);
- }
-}
-
-/**
* ali_warn_atapi_dma - Warn about ATAPI DMA disablement
* @adev: Device
*
@@ -388,69 +211,6 @@ static struct ata_port_operations ali_c5
.cable_detect = ali_c2_cable_detect,
};
-
-/**
- * ali_init_chipset - chip setup function
- * @dev: device of ATA controller
- *
- * Perform the setup on the device that must be done both at boot
- * and at resume time.
- */
-
-static int ali_init_chipset(struct device *dev)
-{
- struct pci_dev *pdev = to_pci_dev(dev);
- u8 tmp;
- struct pci_dev *north;
-
- /*
- * The chipset revision selects the driver operations and
- * mode data.
- */
-
- if (pdev->revision <= 0x20) {
- pci_read_config_byte(pdev, 0x53, &tmp);
- tmp |= 0x03;
- pci_write_config_byte(pdev, 0x53, tmp);
- } else {
- pci_read_config_byte(pdev, 0x4a, &tmp);
- pci_write_config_byte(pdev, 0x4a, tmp | 0x20);
- pci_read_config_byte(pdev, 0x4B, &tmp);
- if (pdev->revision < 0xC2)
- /* 1543-E/F, 1543C-C, 1543C-D, 1543C-E */
- /* Clear CD-ROM DMA write bit */
- tmp &= 0x7F;
- /* Cable and UDMA */
- if (pdev->revision >= 0xc2)
- tmp |= 0x01;
- pci_write_config_byte(pdev, 0x4B, tmp | 0x08);
- /*
- * CD_ROM DMA on (0x53 bit 0). Enable this even if we want
- * to use PIO. 0x53 bit 1 (rev 20 only) - enable FIFO control
- * via 0x54/55.
- */
- pci_read_config_byte(pdev, 0x53, &tmp);
- if (pdev->revision >= 0xc7)
- tmp |= 0x03;
- else
- tmp |= 0x01; /* CD_ROM enable for DMA */
- pci_write_config_byte(pdev, 0x53, tmp);
- }
- north = pci_get_bus_and_slot(0, PCI_DEVFN(0,0));
- if (north && north->vendor == PCI_VENDOR_ID_AL && ali_isa_bridge) {
- /* Configure the ALi bridge logic. For non ALi rely on BIOS.
- Set the south bridge enable bit */
- pci_read_config_byte(ali_isa_bridge, 0x79, &tmp);
- if (pdev->revision == 0xC2)
- pci_write_config_byte(ali_isa_bridge, 0x79, tmp | 0x04);
- else if (pdev->revision > 0xC2 && pdev->revision < 0xC5)
- pci_write_config_byte(ali_isa_bridge, 0x79, tmp | 0x02);
- }
- pci_dev_put(north);
- ata_pci_bmdma_clear_simplex(pdev);
- return 0;
-}
-
/**
* ali_init_one - discovery callback
* @pdev: PCI device ID
Index: b/drivers/ata/pata_ali.h
===================================================================
--- a/drivers/ata/pata_ali.h
+++ b/drivers/ata/pata_ali.h
@@ -38,3 +38,244 @@ static int ali_cable_override(struct pci
return 1;
return 0;
}
+
+#ifdef __LINUX_LIBATA_H__
+/**
+ * ali_c2_cable_detect - cable detection
+ * @ap: ATA port
+ *
+ * Perform cable detection for C2 and later revisions
+ */
+
+static int ali_c2_cable_detect(struct ata_port *ap)
+{
+ struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+ u8 ata66;
+
+ /* Certain laptops use short but suitable cables and don't
+ implement the detect logic */
+
+ if (ali_cable_override(pdev))
+ return ATA_CBL_PATA40_SHORT;
+
+ /* Host view cable detect 0x4A bit 0 primary bit 1 secondary
+ Bit set for 40 pin */
+ pci_read_config_byte(pdev, 0x4A, &ata66);
+ if (ata66 & (1 << ap->port_no))
+ return ATA_CBL_PATA40;
+ else
+ return ATA_CBL_PATA80;
+}
+
+/**
+ * ali_fifo_control - FIFO manager
+ * @ap: ALi channel to control
+ * @adev: device for FIFO control
+ * @on: 0 for off 1 for on
+ *
+ * Enable or disable the FIFO on a given device. Because of the way the
+ * ALi FIFO works it provides a boost on ATA disk but can be confused by
+ * ATAPI and we must therefore manage it.
+ */
+
+static void ali_fifo_control(struct ata_port *ap, struct ata_device *adev, int on)
+{
+ struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+ int pio_fifo = 0x54 + ap->port_no;
+ u8 fifo;
+ int shift = 4 * adev->devno;
+
+ /* ATA - FIFO on set nibble to 0x05, ATAPI - FIFO off, set nibble to
+ 0x00. Not all the docs agree but the behaviour we now use is the
+ one stated in the BIOS Programming Guide */
+
+ pci_read_config_byte(pdev, pio_fifo, &fifo);
+ fifo &= ~(0x0F << shift);
+ fifo |= (on << shift);
+ pci_write_config_byte(pdev, pio_fifo, fifo);
+}
+
+/**
+ * ali_program_modes - load mode registers
+ * @ap: ALi channel to load
+ * @adev: Device the timing is for
+ * @t: timing data
+ * @ultra: UDMA timing or zero for off
+ *
+ * Loads the timing registers for cmd/data and disable UDMA if
+ * ultra is zero. If ultra is set then load and enable the UDMA
+ * timing but do not touch the command/data timing.
+ */
+
+static void ali_program_modes(struct ata_port *ap, struct ata_device *adev, struct ata_timing *t, u8 ultra)
+{
+ struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+ int cas = 0x58 + 4 * ap->port_no; /* Command timing */
+ int cbt = 0x59 + 4 * ap->port_no; /* Command timing */
+ int drwt = 0x5A + 4 * ap->port_no + adev->devno; /* R/W timing */
+ int udmat = 0x56 + ap->port_no; /* UDMA timing */
+ int shift = 4 * adev->devno;
+ u8 udma;
+
+ if (t != NULL) {
+ t->setup = clamp_val(t->setup, 1, 8) & 7;
+ t->act8b = clamp_val(t->act8b, 1, 8) & 7;
+ t->rec8b = clamp_val(t->rec8b, 1, 16) & 15;
+ t->active = clamp_val(t->active, 1, 8) & 7;
+ t->recover = clamp_val(t->recover, 1, 16) & 15;
+
+ pci_write_config_byte(pdev, cas, t->setup);
+ pci_write_config_byte(pdev, cbt, (t->act8b << 4) | t->rec8b);
+ pci_write_config_byte(pdev, drwt, (t->active << 4) | t->recover);
+ }
+
+ /* Set up the UDMA enable */
+ pci_read_config_byte(pdev, udmat, &udma);
+ udma &= ~(0x0F << shift);
+ udma |= ultra << shift;
+ pci_write_config_byte(pdev, udmat, udma);
+}
+
+/**
+ * ali_set_piomode - set initial PIO mode data
+ * @ap: ATA interface
+ * @adev: ATA device
+ *
+ * Program the ALi registers for PIO mode.
+ */
+
+static void ali_set_piomode(struct ata_port *ap, struct ata_device *adev)
+{
+ struct ata_device *pair = ata_dev_pair(adev);
+ struct ata_timing t;
+ unsigned long T = 1000000000 / 33333; /* PCI clock based */
+
+ ata_timing_compute(adev->id, adev->pio_mode, adev->pio_mode, &t, T, 1);
+ if (pair) {
+ struct ata_timing p;
+
+ ata_timing_compute(pair->id, pair->pio_mode, pair->pio_mode,
+ &p, T, 1);
+ ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
+ if (pair->dma_mode) {
+ ata_timing_compute(pair->id, pair->dma_mode,
+ pair->pio_mode, &p, T, 1);
+ ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
+ }
+ }
+
+ /* PIO FIFO is only permitted on ATA disk */
+ ali_fifo_control(ap, adev, (adev->class == ATA_DEV_ATA) ? 0x05 : 0x00);
+
+ ali_program_modes(ap, adev, &t, 0);
+}
+
+/**
+ * ali_set_dmamode - set initial DMA mode data
+ * @ap: ATA interface
+ * @adev: ATA device
+ *
+ * Program the ALi registers for DMA mode.
+ */
+
+static void ali_set_dmamode(struct ata_port *ap, struct ata_device *adev)
+{
+ static u8 udma_timing[7] = { 0xC, 0xB, 0xA, 0x9, 0x8, 0xF, 0xD };
+ struct ata_device *pair = ata_dev_pair(adev);
+ struct ata_timing t;
+ unsigned long T = 1000000000 / 33333; /* PCI clock based */
+ struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+
+
+ if (adev->class == ATA_DEV_ATA)
+ ali_fifo_control(ap, adev, 0x08);
+
+ if (adev->dma_mode >= XFER_UDMA_0) {
+ ali_program_modes(ap, adev, NULL, udma_timing[adev->dma_mode - XFER_UDMA_0]);
+ if (adev->dma_mode >= XFER_UDMA_3) {
+ u8 reg4b;
+ pci_read_config_byte(pdev, 0x4B, ®4b);
+ reg4b |= 1;
+ pci_write_config_byte(pdev, 0x4B, reg4b);
+ }
+ } else {
+ ata_timing_compute(adev->id, adev->dma_mode, adev->pio_mode,
+ &t, T, 1);
+ if (pair) {
+ struct ata_timing p;
+
+ ata_timing_compute(pair->id, pair->pio_mode,
+ pair->pio_mode, &p, T, 1);
+ ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
+ if (pair->dma_mode) {
+ ata_timing_compute(pair->id, pair->dma_mode,
+ pair->pio_mode, &p, T, 1);
+ ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT);
+ }
+ }
+ ali_program_modes(ap, adev, &t, 0);
+ }
+}
+
+/**
+ * ali_init_chipset - chip setup function
+ * @dev: device of ATA controller
+ *
+ * Perform the setup on the device that must be done both at boot
+ * and at resume time.
+ */
+
+static int ali_init_chipset(struct device *dev)
+{
+ struct pci_dev *pdev = to_pci_dev(dev);
+ u8 tmp;
+ struct pci_dev *north;
+
+ /*
+ * The chipset revision selects the driver operations and
+ * mode data.
+ */
+
+ if (pdev->revision <= 0x20) {
+ pci_read_config_byte(pdev, 0x53, &tmp);
+ tmp |= 0x03;
+ pci_write_config_byte(pdev, 0x53, tmp);
+ } else {
+ pci_read_config_byte(pdev, 0x4a, &tmp);
+ pci_write_config_byte(pdev, 0x4a, tmp | 0x20);
+ pci_read_config_byte(pdev, 0x4B, &tmp);
+ if (pdev->revision < 0xC2)
+ /* 1543-E/F, 1543C-C, 1543C-D, 1543C-E */
+ /* Clear CD-ROM DMA write bit */
+ tmp &= 0x7F;
+ /* Cable and UDMA */
+ if (pdev->revision >= 0xc2)
+ tmp |= 0x01;
+ pci_write_config_byte(pdev, 0x4B, tmp | 0x08);
+ /*
+ * CD_ROM DMA on (0x53 bit 0). Enable this even if we want
+ * to use PIO. 0x53 bit 1 (rev 20 only) - enable FIFO control
+ * via 0x54/55.
+ */
+ pci_read_config_byte(pdev, 0x53, &tmp);
+ if (pdev->revision >= 0xc7)
+ tmp |= 0x03;
+ else
+ tmp |= 0x01; /* CD_ROM enable for DMA */
+ pci_write_config_byte(pdev, 0x53, tmp);
+ }
+ north = pci_get_bus_and_slot(0, PCI_DEVFN(0,0));
+ if (north && north->vendor == PCI_VENDOR_ID_AL && ali_isa_bridge) {
+ /* Configure the ALi bridge logic. For non ALi rely on BIOS.
+ Set the south bridge enable bit */
+ pci_read_config_byte(ali_isa_bridge, 0x79, &tmp);
+ if (pdev->revision == 0xC2)
+ pci_write_config_byte(ali_isa_bridge, 0x79, tmp | 0x04);
+ else if (pdev->revision > 0xC2 && pdev->revision < 0xC5)
+ pci_write_config_byte(ali_isa_bridge, 0x79, tmp | 0x02);
+ }
+ pci_dev_put(north);
+ ata_pci_bmdma_clear_simplex(pdev);
+ return 0;
+}
+#endif
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 32/68] alim15x3: convert to ide2libata
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (30 preceding siblings ...)
2010-01-29 16:06 ` [PATCH 31/68] pata_ali: move code to be re-used by ide2libata to pata_ali.h Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:06 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:06 ` [PATCH 33/68] pata_amd: move code to be re-used by ide2libata to pata_amd.h Bartlomiej Zolnierkiewicz
` (36 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:06 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] alim15x3: convert to ide2libata
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ata/pata_ali.h | 55 +++++++++-
drivers/ide/alim15x3.c | 260 ++-----------------------------------------------
2 files changed, 61 insertions(+), 254 deletions(-)
Index: b/drivers/ata/pata_ali.h
===================================================================
--- a/drivers/ata/pata_ali.h
+++ b/drivers/ata/pata_ali.h
@@ -39,7 +39,6 @@ static int ali_cable_override(struct pci
return 0;
}
-#ifdef __LINUX_LIBATA_H__
/**
* ali_c2_cable_detect - cable detection
* @ap: ATA port
@@ -148,7 +147,12 @@ static void ali_set_piomode(struct ata_p
{
struct ata_device *pair = ata_dev_pair(adev);
struct ata_timing t;
+#ifndef __IDE2LIBATA
unsigned long T = 1000000000 / 33333; /* PCI clock based */
+#else
+ int bus_speed = ide_pci_clk ? ide_pci_clk : 33;
+ unsigned long T = 1000000 / bus_speed; /* PCI clock based */
+#endif
ata_timing_compute(adev->id, adev->pio_mode, adev->pio_mode, &t, T, 1);
if (pair) {
@@ -183,12 +187,18 @@ static void ali_set_dmamode(struct ata_p
static u8 udma_timing[7] = { 0xC, 0xB, 0xA, 0x9, 0x8, 0xF, 0xD };
struct ata_device *pair = ata_dev_pair(adev);
struct ata_timing t;
+#ifndef __IDE2LIBATA
unsigned long T = 1000000000 / 33333; /* PCI clock based */
+#else
+ int bus_speed = ide_pci_clk ? ide_pci_clk : 33;
+ unsigned long T = 1000000 / bus_speed; /* PCI clock based */
+#endif
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
-
+#ifndef __IDE2LIBATA
if (adev->class == ATA_DEV_ATA)
ali_fifo_control(ap, adev, 0x08);
+#endif
if (adev->dma_mode >= XFER_UDMA_0) {
ali_program_modes(ap, adev, NULL, udma_timing[adev->dma_mode - XFER_UDMA_0]);
@@ -230,39 +240,73 @@ static int ali_init_chipset(struct devic
struct pci_dev *pdev = to_pci_dev(dev);
u8 tmp;
struct pci_dev *north;
-
+#ifdef __IDE2LIBATA
+ struct pci_dev *ali_isa_bridge = isa_dev;
+#endif
/*
* The chipset revision selects the driver operations and
* mode data.
*/
if (pdev->revision <= 0x20) {
+#ifdef __IDE2LIBATA
+ pci_read_config_byte(pdev, 0x4b, &tmp);
+ pci_write_config_byte(pdev, 0x4b, tmp & 0x7F);
+ if (pdev->revision == 0x20) {
+ pci_read_config_byte(pdev, 0x53, &tmp);
+ tmp = (tmp & ~0x02) | 0x01;
+ pci_write_config_byte(pdev, 0x53, tmp);
+ if (isa_dev) {
+ pci_read_config_byte(isa_dev, 0x5e, &tmp);
+ chip_is_1543c_e = ((tmp & 0x1e) == 0x12) ? 1 : 0;
+ }
+ }
+#else
pci_read_config_byte(pdev, 0x53, &tmp);
tmp |= 0x03;
pci_write_config_byte(pdev, 0x53, tmp);
+#endif
} else {
+#ifndef __IDE2LIBATA
pci_read_config_byte(pdev, 0x4a, &tmp);
pci_write_config_byte(pdev, 0x4a, tmp | 0x20);
+#endif
pci_read_config_byte(pdev, 0x4B, &tmp);
if (pdev->revision < 0xC2)
/* 1543-E/F, 1543C-C, 1543C-D, 1543C-E */
/* Clear CD-ROM DMA write bit */
tmp &= 0x7F;
/* Cable and UDMA */
+#ifdef __IDE2LIBATA
+ if (pdev->revision >= 0xc2)
+ tmp |= 0x08;
+#else
if (pdev->revision >= 0xc2)
tmp |= 0x01;
- pci_write_config_byte(pdev, 0x4B, tmp | 0x08);
+ tmp |= 0x08;
+#endif
+ pci_write_config_byte(pdev, 0x4B, tmp);
/*
* CD_ROM DMA on (0x53 bit 0). Enable this even if we want
* to use PIO. 0x53 bit 1 (rev 20 only) - enable FIFO control
* via 0x54/55.
*/
pci_read_config_byte(pdev, 0x53, &tmp);
+#ifdef __IDE2LIBATA
+ if (pdev->revision == 0xc7 || pdev->revision == 0xc8)
+#else
if (pdev->revision >= 0xc7)
+#endif
tmp |= 0x03;
else
tmp |= 0x01; /* CD_ROM enable for DMA */
pci_write_config_byte(pdev, 0x53, tmp);
+#ifdef __IDE2LIBATA
+ if (pdev->revision < 0xC2 && isa_dev) {
+ pci_read_config_byte(isa_dev, 0x5e, &tmp);
+ chip_is_1543c_e = ((tmp & 0x1e) == 0x12) ? 1 : 0;
+ }
+#endif
}
north = pci_get_bus_and_slot(0, PCI_DEVFN(0,0));
if (north && north->vendor == PCI_VENDOR_ID_AL && ali_isa_bridge) {
@@ -275,7 +319,8 @@ static int ali_init_chipset(struct devic
pci_write_config_byte(ali_isa_bridge, 0x79, tmp | 0x02);
}
pci_dev_put(north);
+#ifndef __IDE2LIBATA
ata_pci_bmdma_clear_simplex(pdev);
+#endif
return 0;
}
-#endif
Index: b/drivers/ide/alim15x3.c
===================================================================
--- a/drivers/ide/alim15x3.c
+++ b/drivers/ide/alim15x3.c
@@ -47,89 +47,6 @@ static u8 m5229_revision;
static u8 chip_is_1543c_e;
static struct pci_dev *isa_dev;
-static void ali_fifo_control(ide_hwif_t *hwif, ide_drive_t *drive, int on)
-{
- struct pci_dev *pdev = to_pci_dev(hwif->dev);
- int pio_fifo = 0x54 + hwif->channel;
- u8 fifo;
- int shift = 4 * (drive->dn & 1);
-
- pci_read_config_byte(pdev, pio_fifo, &fifo);
- fifo &= ~(0x0F << shift);
- fifo |= (on << shift);
- pci_write_config_byte(pdev, pio_fifo, fifo);
-}
-
-static void ali_program_timings(ide_hwif_t *hwif, ide_drive_t *drive,
- struct ata_timing *t, u8 ultra)
-{
- struct pci_dev *dev = to_pci_dev(hwif->dev);
- int port = hwif->channel ? 0x5c : 0x58;
- int udmat = 0x56 + hwif->channel;
- u8 unit = drive->dn & 1, udma;
- int shift = 4 * unit;
-
- /* Set up the UDMA */
- pci_read_config_byte(dev, udmat, &udma);
- udma &= ~(0x0F << shift);
- udma |= ultra << shift;
- pci_write_config_byte(dev, udmat, udma);
-
- if (t == NULL)
- return;
-
- t->setup = clamp_val(t->setup, 1, 8) & 7;
- t->act8b = clamp_val(t->act8b, 1, 8) & 7;
- t->rec8b = clamp_val(t->rec8b, 1, 16) & 15;
- t->active = clamp_val(t->active, 1, 8) & 7;
- t->recover = clamp_val(t->recover, 1, 16) & 15;
-
- pci_write_config_byte(dev, port, t->setup);
- pci_write_config_byte(dev, port + 1, (t->act8b << 4) | t->rec8b);
- pci_write_config_byte(dev, port + unit + 2,
- (t->active << 4) | t->recover);
-}
-
-/**
- * ali_set_pio_mode - set host controller for PIO mode
- * @hwif: port
- * @drive: drive
- *
- * Program the controller for the given PIO mode.
- */
-
-static void ali_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
-{
- ide_drive_t *pair = ide_get_pair_dev(drive);
- int bus_speed = ide_pci_clk ? ide_pci_clk : 33;
- unsigned long T = 1000000 / bus_speed; /* PCI clock based */
- struct ata_timing t;
-
- ata_timing_compute(drive->id, drive->pio_mode, drive->pio_mode,
- &t, T, 1);
- if (pair) {
- struct ata_timing p;
-
- ata_timing_compute(pair->id, pair->pio_mode, pair->pio_mode,
- &p, T, 1);
- ata_timing_merge(&p, &t, &t,
- ATA_TIMING_SETUP | ATA_TIMING_8BIT);
- if (pair->dma_mode) {
- ata_timing_compute(pair->id, pair->dma_mode,
- pair->pio_mode, &p, T, 1);
- ata_timing_merge(&p, &t, &t,
- ATA_TIMING_SETUP | ATA_TIMING_8BIT);
- }
- }
-
- /*
- * PIO mode => ATA FIFO on, ATAPI FIFO off
- */
- ali_fifo_control(hwif, drive, (drive->media == ide_disk) ? 0x05 : 0x00);
-
- ali_program_timings(hwif, drive, &t, 0);
-}
-
/**
* ali_udma_filter - compute UDMA mask
* @drive: IDE device
@@ -156,54 +73,6 @@ static u8 ali_udma_filter(ide_drive_t *d
}
/**
- * ali_set_dma_mode - set host controller for DMA mode
- * @hwif: port
- * @drive: drive
- *
- * Configure the hardware for the desired IDE transfer mode.
- */
-
-static void ali_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
-{
- static u8 udma_timing[7] = { 0xC, 0xB, 0xA, 0x9, 0x8, 0xF, 0xD };
- struct pci_dev *dev = to_pci_dev(hwif->dev);
- ide_drive_t *pair = ide_get_pair_dev(drive);
- int bus_speed = ide_pci_clk ? ide_pci_clk : 33;
- unsigned long T = 1000000 / bus_speed; /* PCI clock based */
- const u8 speed = drive->dma_mode;
- u8 tmpbyte = 0x00;
- struct ata_timing t;
-
- if (speed < XFER_UDMA_0) {
- ata_timing_compute(drive->id, drive->dma_mode, drive->pio_mode,
- &t, T, 1);
- if (pair) {
- struct ata_timing p;
-
- ata_timing_compute(pair->id, pair->pio_mode,
- pair->pio_mode, &p, T, 1);
- ata_timing_merge(&p, &t, &t,
- ATA_TIMING_SETUP | ATA_TIMING_8BIT);
- if (pair->dma_mode) {
- ata_timing_compute(pair->id, pair->dma_mode,
- pair->pio_mode, &p, T, 1);
- ata_timing_merge(&p, &t, &t,
- ATA_TIMING_SETUP | ATA_TIMING_8BIT);
- }
- }
- ali_program_timings(hwif, drive, &t, 0);
- } else {
- ali_program_timings(hwif, drive, NULL,
- udma_timing[speed - XFER_UDMA_0]);
- if (speed >= XFER_UDMA_3) {
- pci_read_config_byte(dev, 0x4b, &tmpbyte);
- tmpbyte |= 1;
- pci_write_config_byte(dev, 0x4b, tmpbyte);
- }
- }
-}
-
-/**
* ali_dma_check - DMA check
* @drive: target device
* @cmd: command
@@ -220,6 +89,9 @@ static int ali_dma_check(ide_drive_t *dr
return 0;
}
+#include <linux/ide2libata.h>
+#include "../ata/pata_ali.h"
+
/**
* init_chipset_ali15x3 - Initialise an ALi IDE controller
* @dev: PCI device
@@ -231,110 +103,20 @@ static int ali_dma_check(ide_drive_t *dr
static int init_chipset_ali15x3(struct pci_dev *dev)
{
unsigned long flags;
- u8 tmpbyte;
- struct pci_dev *north = pci_get_slot(dev->bus, PCI_DEVFN(0,0));
m5229_revision = dev->revision;
isa_dev = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL);
local_irq_save(flags);
+ ali_init_chipset(&dev->dev);
+ local_irq_restore(flags);
- if (m5229_revision < 0xC2) {
- /*
- * revision 0x20 (1543-E, 1543-F)
- * revision 0xC0, 0xC1 (1543C-C, 1543C-D, 1543C-E)
- * clear CD-ROM DMA write bit, m5229, 0x4b, bit 7
- */
- pci_read_config_byte(dev, 0x4b, &tmpbyte);
- /*
- * clear bit 7
- */
- pci_write_config_byte(dev, 0x4b, tmpbyte & 0x7F);
- /*
- * check m1533, 0x5e, bit 1~4 == 1001 => & 00011110 = 00010010
- */
- if (m5229_revision >= 0x20 && isa_dev) {
- pci_read_config_byte(isa_dev, 0x5e, &tmpbyte);
- chip_is_1543c_e = ((tmpbyte & 0x1e) == 0x12) ? 1: 0;
- }
- goto out;
- }
-
- /*
- * 1543C-B?, 1535, 1535D, 1553
- * Note 1: not all "motherboard" support this detection
- * Note 2: if no udma 66 device, the detection may "error".
- * but in this case, we will not set the device to
- * ultra 66, the detection result is not important
- */
-
- /*
- * enable "Cable Detection", m5229, 0x4b, bit3
- */
- pci_read_config_byte(dev, 0x4b, &tmpbyte);
- pci_write_config_byte(dev, 0x4b, tmpbyte | 0x08);
-
- /*
- * We should only tune the 1533 enable if we are using an ALi
- * North bridge. We might have no north found on some zany
- * box without a device at 0:0.0. The ALi bridge will be at
- * 0:0.0 so if we didn't find one we know what is cooking.
- */
- if (north && north->vendor != PCI_VENDOR_ID_AL)
- goto out;
-
- if (m5229_revision < 0xC5 && isa_dev)
- {
- /*
- * set south-bridge's enable bit, m1533, 0x79
- */
-
- pci_read_config_byte(isa_dev, 0x79, &tmpbyte);
- if (m5229_revision == 0xC2) {
- /*
- * 1543C-B0 (m1533, 0x79, bit 2)
- */
- pci_write_config_byte(isa_dev, 0x79, tmpbyte | 0x04);
- } else if (m5229_revision >= 0xC3) {
- /*
- * 1553/1535 (m1533, 0x79, bit 1)
- */
- pci_write_config_byte(isa_dev, 0x79, tmpbyte | 0x02);
- }
- }
-
-out:
- /*
- * CD_ROM DMA on (m5229, 0x53, bit0)
- * Enable this bit even if we want to use PIO.
- * PIO FIFO off (m5229, 0x53, bit1)
- * The hardware will use 0x54h and 0x55h to control PIO FIFO.
- * (Not on later devices it seems)
- *
- * 0x53 changes meaning on later revs - we must no touch
- * bit 1 on them. Need to check if 0x20 is the right break.
- */
- if (m5229_revision >= 0x20) {
- pci_read_config_byte(dev, 0x53, &tmpbyte);
-
- if (m5229_revision <= 0x20)
- tmpbyte = (tmpbyte & (~0x02)) | 0x01;
- else if (m5229_revision == 0xc7 || m5229_revision == 0xc8)
- tmpbyte |= 0x03;
- else
- tmpbyte |= 0x01;
-
- pci_write_config_byte(dev, 0x53, tmpbyte);
- }
- pci_dev_put(north);
pci_dev_put(isa_dev);
- local_irq_restore(flags);
+
return 0;
}
-#include "../ata/pata_ali.h"
-
/**
* ali_cable_detect - cable detection
* @hwif: IDE interface
@@ -345,29 +127,9 @@ out:
static int ali_cable_detect(ide_hwif_t *hwif)
{
- struct pci_dev *dev = to_pci_dev(hwif->dev);
- u8 cbl = ATA_CBL_PATA40, tmpbyte;
-
- if (m5229_revision >= 0xC2) {
- /*
- * m5229 80-pin cable detection (from Host View)
- *
- * 0x4a bit0 is 0 => primary channel has 80-pin
- * 0x4a bit1 is 0 => secondary channel has 80-pin
- *
- * Certain laptops use short but suitable cables
- * and don't implement the detect logic.
- */
- if (ali_cable_override(dev))
- cbl = ATA_CBL_PATA40_SHORT;
- else {
- pci_read_config_byte(dev, 0x4a, &tmpbyte);
- if ((tmpbyte & (1 << hwif->channel)) == 0)
- cbl = ATA_CBL_PATA80;
- }
- }
-
- return cbl;
+ if (m5229_revision >= 0xC2)
+ return ali_c2_cable_detect(hwif);
+ return ATA_CBL_PATA40;
}
#ifndef CONFIG_SPARC64
@@ -459,8 +221,8 @@ static int __devinit init_dma_ali15x3(id
}
static const struct ide_port_ops ali_port_ops = {
- .set_pio_mode = ali_set_pio_mode,
- .set_dma_mode = ali_set_dma_mode,
+ .set_pio_mode = ali_set_piomode,
+ .set_dma_mode = ali_set_dmamode,
.udma_filter = ali_udma_filter,
.cable_detect = ali_cable_detect,
};
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 33/68] pata_amd: move code to be re-used by ide2libata to pata_amd.h
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (31 preceding siblings ...)
2010-01-29 16:06 ` [PATCH 32/68] alim15x3: convert to ide2libata Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:06 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:06 ` [PATCH 34/68] amd74xx: convert to ide2libata Bartlomiej Zolnierkiewicz
` (35 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:06 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] pata_amd: move code to be re-used by ide2libata to pata_amd.h
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ata/pata_amd.c | 87 ----------------------------------------------
drivers/ata/pata_amd.h | 92 +++++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 93 insertions(+), 86 deletions(-)
Index: b/drivers/ata/pata_amd.c
===================================================================
--- a/drivers/ata/pata_amd.c
+++ b/drivers/ata/pata_amd.c
@@ -26,92 +26,7 @@
#define DRV_NAME "pata_amd"
#define DRV_VERSION "0.4.1"
-/**
- * timing_setup - shared timing computation and load
- * @ap: ATA port being set up
- * @adev: drive being configured
- * @offset: port offset
- * @speed: target speed
- * @clock: clock multiplier (number of times 33MHz for this part)
- *
- * Perform the actual timing set up for Nvidia or AMD PATA devices.
- * The actual devices vary so they all call into this helper function
- * providing the clock multipler and offset (because AMD and Nvidia put
- * the ports at different locations).
- */
-
-static void timing_setup(struct ata_port *ap, struct ata_device *adev, int offset, int speed, int clock)
-{
- static const unsigned char amd_cyc2udma[] = {
- 6, 6, 5, 4, 0, 1, 1, 2, 2, 3, 3, 3, 3, 3, 3, 7
- };
-
- struct pci_dev *pdev = to_pci_dev(ap->host->dev);
- struct ata_device *peer = ata_dev_pair(adev);
- int dn = ap->port_no * 2 + adev->devno;
- struct ata_timing at, apeer;
- int T, UT;
- const int amd_clock = 33333; /* KHz. */
- u8 t;
-
- T = 1000000000 / amd_clock;
- UT = T;
- if (clock >= 2)
- UT = T / 2;
-
- ata_timing_compute(adev->id, speed, adev->pio_mode, &at, T, UT);
-
- if (peer) {
- ata_timing_compute(peer->id, peer->pio_mode,
- peer->pio_mode, &apeer, T, UT);
- ata_timing_merge(&apeer, &at, &at, ATA_TIMING_8BIT);
- }
-
- if (speed == XFER_UDMA_5 && amd_clock <= 33333) at.udma = 1;
- if (speed == XFER_UDMA_6 && amd_clock <= 33333) at.udma = 15;
-
- /*
- * Now do the setup work
- */
-
- /* Configure the address set up timing */
- pci_read_config_byte(pdev, offset + 0x0C, &t);
- t = (t & ~(3 << ((3 - dn) << 1))) | ((clamp_val(at.setup, 1, 4) - 1) << ((3 - dn) << 1));
- pci_write_config_byte(pdev, offset + 0x0C , t);
-
- /* Configure the 8bit I/O timing */
- pci_write_config_byte(pdev, offset + 0x0E + (1 - (dn >> 1)),
- ((clamp_val(at.act8b, 1, 16) - 1) << 4) | (clamp_val(at.rec8b, 1, 16) - 1));
-
- /* Drive timing */
- pci_write_config_byte(pdev, offset + 0x08 + (3 - dn),
- ((clamp_val(at.active, 1, 16) - 1) << 4) | (clamp_val(at.recover, 1, 16) - 1));
-
- switch (clock) {
- case 1:
- t = at.udma ? (0xc0 | (clamp_val(at.udma, 2, 5) - 2)) : 0x03;
- break;
-
- case 2:
- t = at.udma ? (0xc0 | amd_cyc2udma[clamp_val(at.udma, 2, 10)]) : 0x03;
- break;
-
- case 3:
- t = at.udma ? (0xc0 | amd_cyc2udma[clamp_val(at.udma, 1, 10)]) : 0x03;
- break;
-
- case 4:
- t = at.udma ? (0xc0 | amd_cyc2udma[clamp_val(at.udma, 1, 15)]) : 0x03;
- break;
-
- default:
- return;
- }
-
- /* UDMA timing */
- if (at.udma)
- pci_write_config_byte(pdev, offset + 0x10 + (3 - dn), t);
-}
+#include "pata_amd.h"
/**
* amd_pre_reset - perform reset handling
Index: b/drivers/ata/pata_amd.h
===================================================================
--- /dev/null
+++ b/drivers/ata/pata_amd.h
@@ -0,0 +1,92 @@
+
+/**
+ * timing_setup - shared timing computation and load
+ * @ap: ATA port being set up
+ * @adev: drive being configured
+ * @offset: port offset
+ * @speed: target speed
+ * @clock: clock multiplier (number of times 33MHz for this part)
+ *
+ * Perform the actual timing set up for Nvidia or AMD PATA devices.
+ * The actual devices vary so they all call into this helper function
+ * providing the clock multipler and offset (because AMD and Nvidia put
+ * the ports at different locations).
+ */
+
+static void timing_setup(struct ata_port *ap, struct ata_device *adev,
+ int offset, int speed, int clock)
+{
+ static const unsigned char amd_cyc2udma[] = {
+ 6, 6, 5, 4, 0, 1, 1, 2, 2, 3, 3, 3, 3, 3, 3, 7
+ };
+
+ struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+ struct ata_device *peer = ata_dev_pair(adev);
+ int dn = ap->port_no * 2 + adev->devno;
+ struct ata_timing at, apeer;
+ int T, UT;
+ const int amd_clock = 33333; /* KHz. */
+ u8 t;
+
+ T = 1000000000 / amd_clock;
+ UT = T;
+ if (clock >= 2)
+ UT = T / 2;
+
+ ata_timing_compute(adev->id, speed, adev->pio_mode, &at, T, UT);
+
+ if (peer) {
+ ata_timing_compute(peer->id, peer->pio_mode,
+ peer->pio_mode, &apeer, T, UT);
+ ata_timing_merge(&apeer, &at, &at, ATA_TIMING_8BIT);
+ }
+
+ if (speed == XFER_UDMA_5 && amd_clock <= 33333)
+ at.udma = 1;
+ if (speed == XFER_UDMA_6 && amd_clock <= 33333)
+ at.udma = 15;
+
+ /*
+ * Now do the setup work
+ */
+
+ /* Configure the address set up timing */
+ pci_read_config_byte(pdev, offset + 0x0C, &t);
+ t = (t & ~(3 << ((3 - dn) << 1))) |
+ ((clamp_val(at.setup, 1, 4) - 1) << ((3 - dn) << 1));
+ pci_write_config_byte(pdev, offset + 0x0C , t);
+
+ /* Configure the 8bit I/O timing */
+ pci_write_config_byte(pdev, offset + 0x0E + (1 - (dn >> 1)),
+ ((clamp_val(at.act8b, 1, 16) - 1) << 4) |
+ (clamp_val(at.rec8b, 1, 16) - 1));
+
+ /* Drive timing */
+ pci_write_config_byte(pdev, offset + 0x08 + (3 - dn),
+ ((clamp_val(at.active, 1, 16) - 1) << 4) |
+ (clamp_val(at.recover, 1, 16) - 1));
+
+ switch (clock) {
+ case 1:
+ t = at.udma ? (0xc0 | (clamp_val(at.udma, 2, 5) - 2)) : 0x03;
+ break;
+ case 2:
+ t = at.udma ? (0xc0 | amd_cyc2udma[clamp_val(at.udma, 2, 10)])
+ : 0x03;
+ break;
+ case 3:
+ t = at.udma ? (0xc0 | amd_cyc2udma[clamp_val(at.udma, 1, 10)])
+ : 0x03;
+ break;
+ case 4:
+ t = at.udma ? (0xc0 | amd_cyc2udma[clamp_val(at.udma, 1, 15)])
+ : 0x03;
+ break;
+ default:
+ return;
+ }
+
+ /* UDMA timing */
+ if (at.udma)
+ pci_write_config_byte(pdev, offset + 0x10 + (3 - dn), t);
+}
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 34/68] amd74xx: convert to ide2libata
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (32 preceding siblings ...)
2010-01-29 16:06 ` [PATCH 33/68] pata_amd: move code to be re-used by ide2libata to pata_amd.h Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:06 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:06 ` [PATCH 35/68] pata_artop: move code to be re-used by ide2libata to pata_artop.h Bartlomiej Zolnierkiewicz
` (34 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:06 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] amd74xx: convert to ide2libata
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ata/pata_amd.h | 2 +
drivers/ide/amd74xx.c | 85 +++++++++++++------------------------------------
2 files changed, 25 insertions(+), 62 deletions(-)
Index: b/drivers/ata/pata_amd.h
===================================================================
--- a/drivers/ata/pata_amd.h
+++ b/drivers/ata/pata_amd.h
@@ -25,7 +25,9 @@ static void timing_setup(struct ata_port
int dn = ap->port_no * 2 + adev->devno;
struct ata_timing at, apeer;
int T, UT;
+#ifndef __IDE2LIBATA
const int amd_clock = 33333; /* KHz. */
+#endif
u8 t;
T = 1000000000 / amd_clock;
Index: b/drivers/ide/amd74xx.c
===================================================================
--- a/drivers/ide/amd74xx.c
+++ b/drivers/ide/amd74xx.c
@@ -26,9 +26,6 @@
enum {
AMD_IDE_CONFIG = 0x41,
AMD_CABLE_DETECT = 0x42,
- AMD_DRIVE_TIMING = 0x48,
- AMD_8BIT_TIMING = 0x4e,
- AMD_ADDRESS_SETUP = 0x4c,
AMD_UDMA_TIMING = 0x50,
};
@@ -36,83 +33,47 @@ static unsigned int amd_80w;
static unsigned int amd_clock;
static char *amd_dma[] = { "16", "25", "33", "44", "66", "100", "133" };
-static unsigned char amd_cyc2udma[] = { 6, 6, 5, 4, 0, 1, 1, 2, 2, 3, 3, 3, 3, 3, 3, 7 };
static inline u8 amd_offset(struct pci_dev *dev)
{
return (dev->vendor == PCI_VENDOR_ID_NVIDIA) ? 0x10 : 0;
}
-/*
- * amd_set_speed() writes timing values to the chipset registers
- */
+#include <linux/ide2libata.h>
+#include "../ata/pata_amd.h"
-static void amd_set_speed(struct pci_dev *dev, u8 dn, u8 udma_mask,
- struct ata_timing *timing)
+static int amd_get_clock(ide_hwif_t *hwif)
{
- u8 t = 0, offset = amd_offset(dev);
+ int clock = 0;
- pci_read_config_byte(dev, AMD_ADDRESS_SETUP + offset, &t);
- t = (t & ~(3 << ((3 - dn) << 1))) | ((clamp_val(timing->setup, 1, 4) - 1) << ((3 - dn) << 1));
- pci_write_config_byte(dev, AMD_ADDRESS_SETUP + offset, t);
-
- pci_write_config_byte(dev, AMD_8BIT_TIMING + offset + (1 - (dn >> 1)),
- ((clamp_val(timing->act8b, 1, 16) - 1) << 4) | (clamp_val(timing->rec8b, 1, 16) - 1));
-
- pci_write_config_byte(dev, AMD_DRIVE_TIMING + offset + (3 - dn),
- ((clamp_val(timing->active, 1, 16) - 1) << 4) | (clamp_val(timing->recover, 1, 16) - 1));
-
- switch (udma_mask) {
- case ATA_UDMA2: t = timing->udma ? (0xc0 | (clamp_val(timing->udma, 2, 5) - 2)) : 0x03; break;
- case ATA_UDMA4: t = timing->udma ? (0xc0 | amd_cyc2udma[clamp_val(timing->udma, 2, 10)]) : 0x03; break;
- case ATA_UDMA5: t = timing->udma ? (0xc0 | amd_cyc2udma[clamp_val(timing->udma, 1, 10)]) : 0x03; break;
- case ATA_UDMA6: t = timing->udma ? (0xc0 | amd_cyc2udma[clamp_val(timing->udma, 1, 15)]) : 0x03; break;
- default: return;
- }
+ switch (hwif->udma_mask) {
+ case ATA_UDMA2:
+ clock = 1; break;
+ case ATA_UDMA4:
+ clock = 2; break;
+ case ATA_UDMA5:
+ clock = 3; break;
+ case ATA_UDMA6:
+ clock = 4; break;
+ };
- if (timing->udma)
- pci_write_config_byte(dev, AMD_UDMA_TIMING + offset + 3 - dn, t);
+ return clock;
}
/*
- * amd_set_drive() computes timing values and configures the chipset
- * to a desired transfer mode. It also can be called by upper layers.
+ * amd_set_pio_mode() is a callback from upper layers for PIO-only tuning.
*/
-static void amd_set_drive(ide_hwif_t *hwif, ide_drive_t *drive)
+static void amd_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- struct pci_dev *dev = to_pci_dev(hwif->dev);
- ide_drive_t *peer = ide_get_pair_dev(drive);
- struct ata_timing t, p;
- int T, UT;
- u8 udma_mask = hwif->ultra_mask;
- const u8 speed = drive->dma_mode;
-
- T = 1000000000 / amd_clock;
- UT = (udma_mask == ATA_UDMA2) ? T : (T / 2);
-
- ata_timing_compute(drive->id, speed, drive->pio_mode, &t, T, UT);
-
- if (peer) {
- ata_timing_compute(peer->id, peer->pio_mode,
- peer->pio_mode, &p, T, UT);
- ata_timing_merge(&p, &t, &t, ATA_TIMING_8BIT);
- }
-
- if (speed == XFER_UDMA_5 && amd_clock <= 33333) t.udma = 1;
- if (speed == XFER_UDMA_6 && amd_clock <= 33333) t.udma = 15;
-
- amd_set_speed(dev, drive->dn, udma_mask, &t);
+ timing_setup(hwif, drive, 0x40 + amd_offset(to_pci_dev(hwif->dev)),
+ drive->pio_mode, amd_get_clock(hwif));
}
-/*
- * amd_set_pio_mode() is a callback from upper layers for PIO-only tuning.
- */
-
-static void amd_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
+static void amd_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- drive->dma_mode = drive->pio_mode;
- amd_set_drive(hwif, drive);
+ timing_setup(hwif, drive, 0x40 + amd_offset(to_pci_dev(hwif->dev)),
+ drive->dma_mode, amd_get_clock(hwif));
}
static void amd7409_cable_detect(struct pci_dev *dev)
@@ -188,7 +149,7 @@ static int amd_cable_detect(ide_hwif_t *
static const struct ide_port_ops amd_port_ops = {
.set_pio_mode = amd_set_pio_mode,
- .set_dma_mode = amd_set_drive,
+ .set_dma_mode = amd_set_dma_mode,
.cable_detect = amd_cable_detect,
};
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 35/68] pata_artop: move code to be re-used by ide2libata to pata_artop.h
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (33 preceding siblings ...)
2010-01-29 16:06 ` [PATCH 34/68] amd74xx: convert to ide2libata Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:06 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:06 ` [PATCH 36/68] aec62xx: convert to ide2libata Bartlomiej Zolnierkiewicz
` (33 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:06 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] pata_artop: move code to be re-used by ide2libata to pata_artop.h
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ata/pata_artop.c | 232 -----------------------------------------------
drivers/ata/pata_artop.h | 230 ++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 231 insertions(+), 231 deletions(-)
Index: b/drivers/ata/pata_artop.c
===================================================================
--- a/drivers/ata/pata_artop.c
+++ b/drivers/ata/pata_artop.c
@@ -56,205 +56,7 @@ static int atp8xx_prereset(struct ata_li
return ata_sff_prereset(link, deadline);
}
-/**
- * atp86x_cable_detect - identify cable type
- * @ap: Port
- *
- * Identify the cable type for the ARTOP interface in question
- */
-
-static int atp86x_cable_detect(struct ata_port *ap)
-{
- struct pci_dev *pdev = to_pci_dev(ap->host->dev);
- u8 tmp;
- pci_read_config_byte(pdev, 0x49, &tmp);
- if (tmp & (1 << ap->port_no))
- return ATA_CBL_PATA40;
- return ATA_CBL_PATA80;
-}
-
-/**
- * atp850_load_piomode - Load a set of PATA PIO timings
- * @ap: Port whose timings we are configuring
- * @adev: Device
- * @pio: PIO mode
- *
- * Set PIO mode for device, in host controller PCI config space. This
- * is used both to set PIO timings in PIO mode and also to set the
- * matching PIO clocking for UDMA, as well as the MWDMA timings.
- *
- * LOCKING:
- * None (inherited from caller).
- */
-
-static void atp850_load_piomode(struct ata_port *ap, struct ata_device *adev,
- unsigned int pio)
-{
- struct pci_dev *pdev = to_pci_dev(ap->host->dev);
- int dn = adev->devno + 2 * ap->port_no;
- const u16 timing[5] =
- { 0x0000, 0x000A, 0x0008, 0x0303, 0x0301 };
-
- /* Load the PIO timing active/recovery bits */
- pci_write_config_word(pdev, 0x40 + 2 * dn, timing[pio]);
-}
-
-/**
- * atp850_set_piomode - Initialize host controller PATA PIO timings
- * @ap: Port whose timings we are configuring
- * @adev: Device we are configuring
- *
- * Set PIO mode for device, in host controller PCI config space. For
- * ARTOP we must also clear the UDMA bits if we are not doing UDMA. In
- * the event UDMA is used the later call to set_dmamode will set the
- * bits as required.
- *
- * LOCKING:
- * None (inherited from caller).
- */
-
-static void atp850_set_piomode(struct ata_port *ap, struct ata_device *adev)
-{
- struct pci_dev *pdev = to_pci_dev(ap->host->dev);
- int dn = adev->devno + 2 * ap->port_no;
- u8 ultra;
-
- atp850_load_piomode(ap, adev, adev->pio_mode - XFER_PIO_0);
-
- /* Clear the UDMA mode bits (set_dmamode will redo this if needed) */
- pci_read_config_byte(pdev, 0x54, &ultra);
- ultra &= ~(3 << (2 * dn));
- pci_write_config_byte(pdev, 0x54, ultra);
-}
-
-/**
- * atp86x_load_piomode - Initialize host controller PATA PIO timings
- * @ap: Port whose timings we are configuring
- * @adev: Device we are configuring
- * @pio: PIO mode
- *
- * Set PIO mode for device, in host controller PCI config space.
- * The ATP860 and relatives store the timing data differently.
- *
- * LOCKING:
- * None (inherited from caller).
- */
-
-static void atp86x_load_piomode(struct ata_port *ap, struct ata_device *adev,
- unsigned int pio)
-{
- struct pci_dev *pdev = to_pci_dev(ap->host->dev);
- int dn = adev->devno + 2 * ap->port_no;
- const u8 timing[5] =
- { 0x00, 0x0A, 0x08, 0x33, 0x31 };
-
- /* Load the PIO timing active/recovery bits */
- pci_write_config_byte(pdev, 0x40 + dn, timing[pio]);
-}
-
-/**
- * atp86x_set_piomode - Initialize host controller PATA PIO timings
- * @ap: Port whose timings we are configuring
- * @adev: Device we are configuring
- *
- * Set PIO mode for device, in host controller PCI config space. For
- * ARTOP we must also clear the UDMA bits if we are not doing UDMA. In
- * the event UDMA is used the later call to set_dmamode will set the
- * bits as required.
- *
- * LOCKING:
- * None (inherited from caller).
- */
-
-static void atp86x_set_piomode(struct ata_port *ap, struct ata_device *adev)
-{
- struct pci_dev *pdev = to_pci_dev(ap->host->dev);
- u8 ultra;
-
- atp86x_load_piomode(ap, adev, adev->pio_mode - XFER_PIO_0);
-
- /* Clear the UDMA mode bits (set_dmamode will redo this if needed) */
- pci_read_config_byte(pdev, 0x44 + ap->port_no, &ultra);
- ultra &= ~(7 << (4 * adev->devno)); /* One nibble per drive */
- pci_write_config_byte(pdev, 0x44 + ap->port_no, ultra);
-}
-
-/**
- * atp850_set_dmamode - Initialize host controller PATA PIO timings
- * @ap: Port whose timings we are configuring
- * @adev: Device whose timings we are configuring
- *
- * Set DMA mode for device, in host controller PCI config space.
- *
- * LOCKING:
- * None (inherited from caller).
- */
-
-static void atp850_set_dmamode(struct ata_port *ap, struct ata_device *adev)
-{
- unsigned int pio;
- struct pci_dev *pdev = to_pci_dev(ap->host->dev);
- int dn = adev->devno + 2 * ap->port_no;
- u8 ultra;
-
- if (adev->dma_mode == XFER_MW_DMA_0)
- pio = 1;
- else
- pio = 4;
-
- /* Load the PIO timing active/recovery bits */
- atp850_load_piomode(ap, adev, pio);
-
- pci_read_config_byte(pdev, 0x54, &ultra);
- ultra &= ~(3 << (2 * dn));
-
- /* Add ultra DMA bits if in UDMA mode */
- if (adev->dma_mode >= XFER_UDMA_0) {
- u8 mode = (adev->dma_mode - XFER_UDMA_0) + 1;
- if (mode == 0)
- mode = 1;
- ultra |= (mode << (2 * dn));
- }
- pci_write_config_byte(pdev, 0x54, ultra);
-}
-
-/**
- * atp86x_set_dmamode - Initialize host controller PATA PIO timings
- * @ap: Port whose timings we are configuring
- * @adev: Device we are configuring
- *
- * Set DMA mode for device, in host controller PCI config space.
- * The ATP860 and relatives store the timing data differently.
- *
- * LOCKING:
- * None (inherited from caller).
- */
-
-static void atp86x_set_dmamode(struct ata_port *ap, struct ata_device *adev)
-{
- unsigned int pio = adev->pio_mode - XFER_PIO_0;
- struct pci_dev *pdev = to_pci_dev(ap->host->dev);
- u8 ultra;
-
- if (adev->dma_mode == XFER_MW_DMA_0)
- pio = 1;
- else
- pio = 4;
-
- /* Load the PIO timing active/recovery bits */
- atp86x_load_piomode(ap, adev, pio);
-
- /* Add ultra DMA bits if in UDMA mode */
- pci_read_config_byte(pdev, 0x44 + ap->port_no, &ultra);
- ultra &= ~(7 << (4 * adev->devno)); /* One nibble per drive */
- if (adev->dma_mode >= XFER_UDMA_0) {
- u8 mode = adev->dma_mode - XFER_UDMA_0 + 1;
- if (mode == 0)
- mode = 1;
- ultra |= (mode << (4 * adev->devno));
- }
- pci_write_config_byte(pdev, 0x44 + ap->port_no, ultra);
-}
+#include "pata_artop.h"
/**
* atp850_qc_defer - implement serialization
@@ -302,38 +104,6 @@ static struct ata_port_operations atp86x
.prereset = atp8xx_prereset,
};
-static int atp8xx_fixup(struct device *dev)
-{
- struct pci_dev *pdev = to_pci_dev(dev);
-
- if (pdev->device == 0x0005)
- /* BIOS may have left us in UDMA, clear it before probe */
- pci_write_config_byte(pdev, 0x54, 0);
- else if (pdev->device == 0x0008 || pdev->device == 0x0009) {
- u8 reg;
-
- /* Mac systems come up with some registers not set as we
- will need them */
-
- /* Clear reset & test bits */
- pci_read_config_byte(pdev, 0x49, ®);
- pci_write_config_byte(pdev, 0x49, reg & ~ 0x30);
-
- /* PCI latency must be > 0x80 for burst mode, tweak it
- * if required.
- */
- pci_read_config_byte(pdev, PCI_LATENCY_TIMER, ®);
- if (reg <= 0x80)
- pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x90);
-
- /* Enable IRQ output and burst mode */
- pci_read_config_byte(pdev, 0x4a, ®);
- pci_write_config_byte(pdev, 0x4a, (reg & ~0x01) | 0x80);
- }
-
- return 0;
-}
-
/**
* artop_init_one - Register ARTOP ATA PCI device with kernel services
* @pdev: PCI device to register
Index: b/drivers/ata/pata_artop.h
===================================================================
--- /dev/null
+++ b/drivers/ata/pata_artop.h
@@ -0,0 +1,230 @@
+
+/**
+ * atp86x_cable_detect - identify cable type
+ * @ap: Port
+ *
+ * Identify the cable type for the ARTOP interface in question
+ */
+
+static int atp86x_cable_detect(struct ata_port *ap)
+{
+ struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+ u8 tmp;
+ pci_read_config_byte(pdev, 0x49, &tmp);
+ if (tmp & (1 << ap->port_no))
+ return ATA_CBL_PATA40;
+ return ATA_CBL_PATA80;
+}
+
+/**
+ * atp850_load_piomode - Load a set of PATA PIO timings
+ * @ap: Port whose timings we are configuring
+ * @adev: Device
+ * @pio: PIO mode
+ *
+ * Set PIO mode for device, in host controller PCI config space. This
+ * is used both to set PIO timings in PIO mode and also to set the
+ * matching PIO clocking for UDMA, as well as the MWDMA timings.
+ *
+ * LOCKING:
+ * None (inherited from caller).
+ */
+
+static void atp850_load_piomode(struct ata_port *ap, struct ata_device *adev,
+ unsigned int pio)
+{
+ struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+ int dn = adev->devno + 2 * ap->port_no;
+ const u16 timing[5] = { 0x0000, 0x000A, 0x0008, 0x0303, 0x0301 };
+
+ /* Load the PIO timing active/recovery bits */
+ pci_write_config_word(pdev, 0x40 + 2 * dn, timing[pio]);
+}
+
+/**
+ * atp850_set_piomode - Initialize host controller PATA PIO timings
+ * @ap: Port whose timings we are configuring
+ * @adev: Device we are configuring
+ *
+ * Set PIO mode for device, in host controller PCI config space. For
+ * ARTOP we must also clear the UDMA bits if we are not doing UDMA. In
+ * the event UDMA is used the later call to set_dmamode will set the
+ * bits as required.
+ *
+ * LOCKING:
+ * None (inherited from caller).
+ */
+
+static void atp850_set_piomode(struct ata_port *ap, struct ata_device *adev)
+{
+ struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+ int dn = adev->devno + 2 * ap->port_no;
+ u8 ultra;
+
+ atp850_load_piomode(ap, adev, adev->pio_mode - XFER_PIO_0);
+
+ /* Clear the UDMA mode bits (set_dmamode will redo this if needed) */
+ pci_read_config_byte(pdev, 0x54, &ultra);
+ ultra &= ~(3 << (2 * dn));
+ pci_write_config_byte(pdev, 0x54, ultra);
+}
+
+/**
+ * atp86x_load_piomode - Initialize host controller PATA PIO timings
+ * @ap: Port whose timings we are configuring
+ * @adev: Device we are configuring
+ * @pio: PIO mode
+ *
+ * Set PIO mode for device, in host controller PCI config space.
+ * The ATP860 and relatives store the timing data differently.
+ *
+ * LOCKING:
+ * None (inherited from caller).
+ */
+
+static void atp86x_load_piomode(struct ata_port *ap, struct ata_device *adev,
+ unsigned int pio)
+{
+ struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+ int dn = adev->devno + 2 * ap->port_no;
+ const u8 timing[5] = { 0x00, 0x0A, 0x08, 0x33, 0x31 };
+
+ /* Load the PIO timing active/recovery bits */
+ pci_write_config_byte(pdev, 0x40 + dn, timing[pio]);
+}
+
+/**
+ * atp86x_set_piomode - Initialize host controller PATA PIO timings
+ * @ap: Port whose timings we are configuring
+ * @adev: Device we are configuring
+ *
+ * Set PIO mode for device, in host controller PCI config space. For
+ * ARTOP we must also clear the UDMA bits if we are not doing UDMA. In
+ * the event UDMA is used the later call to set_dmamode will set the
+ * bits as required.
+ *
+ * LOCKING:
+ * None (inherited from caller).
+ */
+
+static void atp86x_set_piomode(struct ata_port *ap, struct ata_device *adev)
+{
+ struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+ u8 ultra;
+
+ atp86x_load_piomode(ap, adev, adev->pio_mode - XFER_PIO_0);
+
+ /* Clear the UDMA mode bits (set_dmamode will redo this if needed) */
+ pci_read_config_byte(pdev, 0x44 + ap->port_no, &ultra);
+ ultra &= ~(7 << (4 * adev->devno)); /* One nibble per drive */
+ pci_write_config_byte(pdev, 0x44 + ap->port_no, ultra);
+}
+
+/**
+ * atp850_set_dmamode - Initialize host controller PATA PIO timings
+ * @ap: Port whose timings we are configuring
+ * @adev: Device whose timings we are configuring
+ *
+ * Set DMA mode for device, in host controller PCI config space.
+ *
+ * LOCKING:
+ * None (inherited from caller).
+ */
+
+static void atp850_set_dmamode(struct ata_port *ap, struct ata_device *adev)
+{
+ unsigned int pio;
+ struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+ int dn = adev->devno + 2 * ap->port_no;
+ u8 ultra;
+
+ if (adev->dma_mode == XFER_MW_DMA_0)
+ pio = 1;
+ else
+ pio = 4;
+
+ /* Load the PIO timing active/recovery bits */
+ atp850_load_piomode(ap, adev, pio);
+
+ pci_read_config_byte(pdev, 0x54, &ultra);
+ ultra &= ~(3 << (2 * dn));
+
+ /* Add ultra DMA bits if in UDMA mode */
+ if (adev->dma_mode >= XFER_UDMA_0) {
+ u8 mode = (adev->dma_mode - XFER_UDMA_0) + 1;
+ if (mode == 0)
+ mode = 1;
+ ultra |= (mode << (2 * dn));
+ }
+ pci_write_config_byte(pdev, 0x54, ultra);
+}
+
+/**
+ * atp86x_set_dmamode - Initialize host controller PATA PIO timings
+ * @ap: Port whose timings we are configuring
+ * @adev: Device we are configuring
+ *
+ * Set DMA mode for device, in host controller PCI config space.
+ * The ATP860 and relatives store the timing data differently.
+ *
+ * LOCKING:
+ * None (inherited from caller).
+ */
+
+static void atp86x_set_dmamode(struct ata_port *ap, struct ata_device *adev)
+{
+ unsigned int pio = adev->pio_mode - XFER_PIO_0;
+ struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+ u8 ultra;
+
+ if (adev->dma_mode == XFER_MW_DMA_0)
+ pio = 1;
+ else
+ pio = 4;
+
+ /* Load the PIO timing active/recovery bits */
+ atp86x_load_piomode(ap, adev, pio);
+
+ /* Add ultra DMA bits if in UDMA mode */
+ pci_read_config_byte(pdev, 0x44 + ap->port_no, &ultra);
+ ultra &= ~(7 << (4 * adev->devno)); /* One nibble per drive */
+ if (adev->dma_mode >= XFER_UDMA_0) {
+ u8 mode = adev->dma_mode - XFER_UDMA_0 + 1;
+ if (mode == 0)
+ mode = 1;
+ ultra |= (mode << (4 * adev->devno));
+ }
+ pci_write_config_byte(pdev, 0x44 + ap->port_no, ultra);
+}
+
+static int atp8xx_fixup(struct device *dev)
+{
+ struct pci_dev *pdev = to_pci_dev(dev);
+
+ if (pdev->device == 0x0005)
+ /* BIOS may have left us in UDMA, clear it before probe */
+ pci_write_config_byte(pdev, 0x54, 0);
+ else if (pdev->device == 0x0008 || pdev->device == 0x0009) {
+ u8 reg;
+
+ /* Mac systems come up with some registers not set as we
+ will need them */
+
+ /* Clear reset & test bits */
+ pci_read_config_byte(pdev, 0x49, ®);
+ pci_write_config_byte(pdev, 0x49, reg & ~0x30);
+
+ /* PCI latency must be > 0x80 for burst mode, tweak it
+ * if required.
+ */
+ pci_read_config_byte(pdev, PCI_LATENCY_TIMER, ®);
+ if (reg <= 0x80)
+ pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x90);
+
+ /* Enable IRQ output and burst mode */
+ pci_read_config_byte(pdev, 0x4a, ®);
+ pci_write_config_byte(pdev, 0x4a, (reg & ~0x01) | 0x80);
+ }
+
+ return 0;
+}
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 36/68] aec62xx: convert to ide2libata
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (34 preceding siblings ...)
2010-01-29 16:06 ` [PATCH 35/68] pata_artop: move code to be re-used by ide2libata to pata_artop.h Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:06 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:07 ` [PATCH 37/68] pata_atiixp: move code to be re-used by ide2libata to pata_atiixp.h Bartlomiej Zolnierkiewicz
` (32 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:06 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] aec62xx: convert to ide2libata
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ata/pata_artop.h | 97 +++++++++++++++++++++-----
drivers/ide/aec62xx.c | 172 ++---------------------------------------------
2 files changed, 90 insertions(+), 179 deletions(-)
Index: b/drivers/ata/pata_artop.h
===================================================================
--- a/drivers/ata/pata_artop.h
+++ b/drivers/ata/pata_artop.h
@@ -16,11 +16,15 @@ static int atp86x_cable_detect(struct at
return ATA_CBL_PATA80;
}
+/* The ARTOP has 33 Mhz and "over clocked" timing tables. */
+static int clock;
+
/**
* atp850_load_piomode - Load a set of PATA PIO timings
* @ap: Port whose timings we are configuring
* @adev: Device
* @pio: PIO mode
+ * @set_mwdma: set MWDMA mode flag
*
* Set PIO mode for device, in host controller PCI config space. This
* is used both to set PIO timings in PIO mode and also to set the
@@ -31,14 +35,21 @@ static int atp86x_cable_detect(struct at
*/
static void atp850_load_piomode(struct ata_port *ap, struct ata_device *adev,
- unsigned int pio)
+ unsigned int pio, bool set_mwdma)
{
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
int dn = adev->devno + 2 * ap->port_no;
- const u16 timing[5] = { 0x0000, 0x000A, 0x0008, 0x0303, 0x0301 };
+ const u16 timing[2][5] = {
+ { 0x0000, 0x000A, 0x0008, 0x0303, 0x0301 },
+ { 0x0700, 0x070A, 0x0708, 0x0403, 0x0401 }
+ };
+ u16 t = timing[clock][pio];
+
+ if (clock && set_mwdma && adev->dma_mode == XFER_MW_DMA_1)
+ t = 0x0402;
/* Load the PIO timing active/recovery bits */
- pci_write_config_word(pdev, 0x40 + 2 * dn, timing[pio]);
+ pci_write_config_word(pdev, 0x40 + 2 * dn, t);
}
/**
@@ -58,15 +69,25 @@ static void atp850_load_piomode(struct a
static void atp850_set_piomode(struct ata_port *ap, struct ata_device *adev)
{
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+#ifdef __IDE2LIBATA
+ unsigned long flags;
+#endif
int dn = adev->devno + 2 * ap->port_no;
u8 ultra;
- atp850_load_piomode(ap, adev, adev->pio_mode - XFER_PIO_0);
+#ifdef __IDE2LIBATA
+ local_irq_save(flags);
+#endif
+ atp850_load_piomode(ap, adev, adev->pio_mode - XFER_PIO_0, 0);
/* Clear the UDMA mode bits (set_dmamode will redo this if needed) */
pci_read_config_byte(pdev, 0x54, &ultra);
ultra &= ~(3 << (2 * dn));
pci_write_config_byte(pdev, 0x54, ultra);
+
+#ifdef __IDE2LIBATA
+ local_irq_restore(flags);
+#endif
}
/**
@@ -74,6 +95,7 @@ static void atp850_set_piomode(struct at
* @ap: Port whose timings we are configuring
* @adev: Device we are configuring
* @pio: PIO mode
+ * @set_mwdma: set MWDMA mode flag
*
* Set PIO mode for device, in host controller PCI config space.
* The ATP860 and relatives store the timing data differently.
@@ -83,14 +105,22 @@ static void atp850_set_piomode(struct at
*/
static void atp86x_load_piomode(struct ata_port *ap, struct ata_device *adev,
- unsigned int pio)
+ unsigned int pio, bool set_mwdma)
{
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
int dn = adev->devno + 2 * ap->port_no;
- const u8 timing[5] = { 0x00, 0x0A, 0x08, 0x33, 0x31 };
+ const u8 timing[2][5] = {
+ { 0x00, 0x0A, 0x08, 0x33, 0x31 },
+ { 0x70, 0x7A, 0x78, 0x43, 0x41 }
+
+ };
+ u16 t = timing[clock][pio];
+
+ if (clock && set_mwdma && adev->dma_mode == XFER_MW_DMA_1)
+ t = 0x42;
/* Load the PIO timing active/recovery bits */
- pci_write_config_byte(pdev, 0x40 + dn, timing[pio]);
+ pci_write_config_byte(pdev, 0x40 + dn, t);
}
/**
@@ -110,14 +140,24 @@ static void atp86x_load_piomode(struct a
static void atp86x_set_piomode(struct ata_port *ap, struct ata_device *adev)
{
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+#ifdef __IDE2LIBATA
+ unsigned long flags;
+#endif
u8 ultra;
- atp86x_load_piomode(ap, adev, adev->pio_mode - XFER_PIO_0);
+#ifdef __IDE2LIBATA
+ local_irq_save(flags);
+#endif
+ atp86x_load_piomode(ap, adev, adev->pio_mode - XFER_PIO_0, 0);
/* Clear the UDMA mode bits (set_dmamode will redo this if needed) */
pci_read_config_byte(pdev, 0x44 + ap->port_no, &ultra);
ultra &= ~(7 << (4 * adev->devno)); /* One nibble per drive */
pci_write_config_byte(pdev, 0x44 + ap->port_no, ultra);
+
+#ifdef __IDE2LIBATA
+ local_irq_restore(flags);
+#endif
}
/**
@@ -133,8 +173,11 @@ static void atp86x_set_piomode(struct at
static void atp850_set_dmamode(struct ata_port *ap, struct ata_device *adev)
{
- unsigned int pio;
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+#ifdef __IDE2LIBATA
+ unsigned long flags;
+#endif
+ unsigned int pio;
int dn = adev->devno + 2 * ap->port_no;
u8 ultra;
@@ -143,20 +186,27 @@ static void atp850_set_dmamode(struct at
else
pio = 4;
+#ifdef __IDE2LIBATA
+ local_irq_save(flags);
+#endif
/* Load the PIO timing active/recovery bits */
- atp850_load_piomode(ap, adev, pio);
+ atp850_load_piomode(ap, adev, pio, 1);
pci_read_config_byte(pdev, 0x54, &ultra);
ultra &= ~(3 << (2 * dn));
/* Add ultra DMA bits if in UDMA mode */
if (adev->dma_mode >= XFER_UDMA_0) {
- u8 mode = (adev->dma_mode - XFER_UDMA_0) + 1;
+ u8 mode = (adev->dma_mode - XFER_UDMA_0) + 1 - clock;
if (mode == 0)
mode = 1;
ultra |= (mode << (2 * dn));
}
pci_write_config_byte(pdev, 0x54, ultra);
+
+#ifdef __IDE2LIBATA
+ local_irq_restore(flags);
+#endif
}
/**
@@ -173,8 +223,11 @@ static void atp850_set_dmamode(struct at
static void atp86x_set_dmamode(struct ata_port *ap, struct ata_device *adev)
{
- unsigned int pio = adev->pio_mode - XFER_PIO_0;
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+#ifdef __IDE2LIBATA
+ unsigned long flags;
+#endif
+ unsigned int pio;
u8 ultra;
if (adev->dma_mode == XFER_MW_DMA_0)
@@ -182,29 +235,38 @@ static void atp86x_set_dmamode(struct at
else
pio = 4;
+#ifdef __IDE2LIBATA
+ local_irq_save(flags);
+#endif
/* Load the PIO timing active/recovery bits */
- atp86x_load_piomode(ap, adev, pio);
+ atp86x_load_piomode(ap, adev, pio, 1);
/* Add ultra DMA bits if in UDMA mode */
pci_read_config_byte(pdev, 0x44 + ap->port_no, &ultra);
ultra &= ~(7 << (4 * adev->devno)); /* One nibble per drive */
if (adev->dma_mode >= XFER_UDMA_0) {
- u8 mode = adev->dma_mode - XFER_UDMA_0 + 1;
+ u8 mode = adev->dma_mode - XFER_UDMA_0 + 1 - clock;
if (mode == 0)
mode = 1;
ultra |= (mode << (4 * adev->devno));
}
pci_write_config_byte(pdev, 0x44 + ap->port_no, ultra);
+
+#ifdef __IDE2LIBATA
+ local_irq_restore(flags);
+#endif
}
static int atp8xx_fixup(struct device *dev)
{
struct pci_dev *pdev = to_pci_dev(dev);
- if (pdev->device == 0x0005)
+ if (pdev->device == 0x0005) {
/* BIOS may have left us in UDMA, clear it before probe */
+#ifndef __IDE2LIBATA
pci_write_config_byte(pdev, 0x54, 0);
- else if (pdev->device == 0x0008 || pdev->device == 0x0009) {
+#endif
+ } else if (pdev->device == 0x0008 || pdev->device == 0x0009) {
u8 reg;
/* Mac systems come up with some registers not set as we
@@ -217,10 +279,11 @@ static int atp8xx_fixup(struct device *d
/* PCI latency must be > 0x80 for burst mode, tweak it
* if required.
*/
+#ifndef __IDE2LIBATA
pci_read_config_byte(pdev, PCI_LATENCY_TIMER, ®);
if (reg <= 0x80)
pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x90);
-
+#endif
/* Enable IRQ output and burst mode */
pci_read_config_byte(pdev, 0x4a, ®);
pci_write_config_byte(pdev, 0x4a, (reg & ~0x01) | 0x80);
Index: b/drivers/ide/aec62xx.c
===================================================================
--- a/drivers/ide/aec62xx.c
+++ b/drivers/ide/aec62xx.c
@@ -14,170 +14,22 @@
#define DRV_NAME "aec62xx"
-struct chipset_bus_clock_list_entry {
- u8 xfer_speed;
- u8 chipset_settings;
- u8 ultra_settings;
-};
-
-static const struct chipset_bus_clock_list_entry aec6xxx_33_base [] = {
- { XFER_UDMA_6, 0x31, 0x07 },
- { XFER_UDMA_5, 0x31, 0x06 },
- { XFER_UDMA_4, 0x31, 0x05 },
- { XFER_UDMA_3, 0x31, 0x04 },
- { XFER_UDMA_2, 0x31, 0x03 },
- { XFER_UDMA_1, 0x31, 0x02 },
- { XFER_UDMA_0, 0x31, 0x01 },
-
- { XFER_MW_DMA_2, 0x31, 0x00 },
- { XFER_MW_DMA_1, 0x31, 0x00 },
- { XFER_MW_DMA_0, 0x0a, 0x00 },
- { XFER_PIO_4, 0x31, 0x00 },
- { XFER_PIO_3, 0x33, 0x00 },
- { XFER_PIO_2, 0x08, 0x00 },
- { XFER_PIO_1, 0x0a, 0x00 },
- { XFER_PIO_0, 0x00, 0x00 },
- { 0, 0x00, 0x00 }
-};
-
-static const struct chipset_bus_clock_list_entry aec6xxx_34_base [] = {
- { XFER_UDMA_6, 0x41, 0x06 },
- { XFER_UDMA_5, 0x41, 0x05 },
- { XFER_UDMA_4, 0x41, 0x04 },
- { XFER_UDMA_3, 0x41, 0x03 },
- { XFER_UDMA_2, 0x41, 0x02 },
- { XFER_UDMA_1, 0x41, 0x01 },
- { XFER_UDMA_0, 0x41, 0x01 },
-
- { XFER_MW_DMA_2, 0x41, 0x00 },
- { XFER_MW_DMA_1, 0x42, 0x00 },
- { XFER_MW_DMA_0, 0x7a, 0x00 },
- { XFER_PIO_4, 0x41, 0x00 },
- { XFER_PIO_3, 0x43, 0x00 },
- { XFER_PIO_2, 0x78, 0x00 },
- { XFER_PIO_1, 0x7a, 0x00 },
- { XFER_PIO_0, 0x70, 0x00 },
- { 0, 0x00, 0x00 }
-};
-
-/*
- * TO DO: active tuning and correction of cards without a bios.
- */
-static u8 pci_bus_clock_list (u8 speed, struct chipset_bus_clock_list_entry * chipset_table)
-{
- for ( ; chipset_table->xfer_speed ; chipset_table++)
- if (chipset_table->xfer_speed == speed) {
- return chipset_table->chipset_settings;
- }
- return chipset_table->chipset_settings;
-}
-
-static u8 pci_bus_clock_list_ultra (u8 speed, struct chipset_bus_clock_list_entry * chipset_table)
-{
- for ( ; chipset_table->xfer_speed ; chipset_table++)
- if (chipset_table->xfer_speed == speed) {
- return chipset_table->ultra_settings;
- }
- return chipset_table->ultra_settings;
-}
-
-static void aec6210_set_mode(ide_hwif_t *hwif, ide_drive_t *drive)
-{
- struct pci_dev *dev = to_pci_dev(hwif->dev);
- struct ide_host *host = pci_get_drvdata(dev);
- struct chipset_bus_clock_list_entry *bus_clock = host->host_priv;
- u16 d_conf = 0;
- u8 ultra = 0, ultra_conf = 0;
- u8 tmp0 = 0, tmp1 = 0, tmp2 = 0;
- const u8 speed = drive->dma_mode;
- unsigned long flags;
-
- local_irq_save(flags);
- /* 0x40|(2*drive->dn): Active, 0x41|(2*drive->dn): Recovery */
- pci_read_config_word(dev, 0x40|(2*drive->dn), &d_conf);
- tmp0 = pci_bus_clock_list(speed, bus_clock);
- d_conf = ((tmp0 & 0xf0) << 4) | (tmp0 & 0xf);
- pci_write_config_word(dev, 0x40|(2*drive->dn), d_conf);
-
- tmp1 = 0x00;
- tmp2 = 0x00;
- pci_read_config_byte(dev, 0x54, &ultra);
- tmp1 = ((0x00 << (2*drive->dn)) | (ultra & ~(3 << (2*drive->dn))));
- ultra_conf = pci_bus_clock_list_ultra(speed, bus_clock);
- tmp2 = ((ultra_conf << (2*drive->dn)) | (tmp1 & ~(3 << (2*drive->dn))));
- pci_write_config_byte(dev, 0x54, tmp2);
- local_irq_restore(flags);
-}
-
-static void aec6260_set_mode(ide_hwif_t *hwif, ide_drive_t *drive)
-{
- struct pci_dev *dev = to_pci_dev(hwif->dev);
- struct ide_host *host = pci_get_drvdata(dev);
- struct chipset_bus_clock_list_entry *bus_clock = host->host_priv;
- u8 unit = drive->dn & 1;
- u8 tmp1 = 0, tmp2 = 0;
- u8 ultra = 0, drive_conf = 0, ultra_conf = 0;
- const u8 speed = drive->dma_mode;
- unsigned long flags;
-
- local_irq_save(flags);
- /* high 4-bits: Active, low 4-bits: Recovery */
- pci_read_config_byte(dev, 0x40|drive->dn, &drive_conf);
- drive_conf = pci_bus_clock_list(speed, bus_clock);
- pci_write_config_byte(dev, 0x40|drive->dn, drive_conf);
-
- pci_read_config_byte(dev, (0x44|hwif->channel), &ultra);
- tmp1 = ((0x00 << (4*unit)) | (ultra & ~(7 << (4*unit))));
- ultra_conf = pci_bus_clock_list_ultra(speed, bus_clock);
- tmp2 = ((ultra_conf << (4*unit)) | (tmp1 & ~(7 << (4*unit))));
- pci_write_config_byte(dev, (0x44|hwif->channel), tmp2);
- local_irq_restore(flags);
-}
-
-static void aec_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
-{
- drive->dma_mode = drive->pio_mode;
- hwif->port_ops->set_dma_mode(hwif, drive);
-}
+#include <linux/ide2libata.h>
+#include "../ata/pata_artop.h"
static int init_chipset_aec62xx(struct pci_dev *dev)
{
- /* These are necessary to get AEC6280 Macintosh cards to work */
- if ((dev->device == PCI_DEVICE_ID_ARTOP_ATP865) ||
- (dev->device == PCI_DEVICE_ID_ARTOP_ATP865R)) {
- u8 reg49h = 0, reg4ah = 0;
- /* Clear reset and test bits. */
- pci_read_config_byte(dev, 0x49, ®49h);
- pci_write_config_byte(dev, 0x49, reg49h & ~0x30);
- /* Enable chip interrupt output. */
- pci_read_config_byte(dev, 0x4a, ®4ah);
- pci_write_config_byte(dev, 0x4a, reg4ah & ~0x01);
- /* Enable burst mode. */
- pci_read_config_byte(dev, 0x4a, ®4ah);
- pci_write_config_byte(dev, 0x4a, reg4ah | 0x80);
- }
-
- return 0;
-}
-
-static int atp86x_cable_detect(ide_hwif_t *hwif)
-{
- struct pci_dev *dev = to_pci_dev(hwif->dev);
- u8 ata66 = 0, mask = hwif->channel ? 0x02 : 0x01;
-
- pci_read_config_byte(dev, 0x49, &ata66);
-
- return (ata66 & mask) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;
+ return atp8xx_fixup(&dev->dev);
}
static const struct ide_port_ops atp850_port_ops = {
- .set_pio_mode = aec_set_pio_mode,
- .set_dma_mode = aec6210_set_mode,
+ .set_pio_mode = atp850_set_piomode,
+ .set_dma_mode = atp850_set_dmamode,
};
static const struct ide_port_ops atp86x_port_ops = {
- .set_pio_mode = aec_set_pio_mode,
- .set_dma_mode = aec6260_set_mode,
+ .set_pio_mode = atp86x_set_piomode,
+ .set_dma_mode = atp86x_set_dmamode,
.cable_detect = atp86x_cable_detect,
};
@@ -253,16 +105,12 @@ static const struct ide_port_info aec62x
static int __devinit aec62xx_init_one(struct pci_dev *dev, const struct pci_device_id *id)
{
- const struct chipset_bus_clock_list_entry *bus_clock;
struct ide_port_info d;
u8 idx = id->driver_data;
- int bus_speed = ide_pci_clk ? ide_pci_clk : 33;
int err;
- if (bus_speed <= 33)
- bus_clock = aec6xxx_33_base;
- else
- bus_clock = aec6xxx_34_base;
+ if (ide_pci_clk > 33)
+ clock = 1;
err = pci_enable_device(dev);
if (err)
@@ -280,7 +128,7 @@ static int __devinit aec62xx_init_one(st
}
}
- err = ide_pci_init_one(dev, &d, (void *)bus_clock);
+ err = ide_pci_init_one(dev, &d, NULL);
if (err)
pci_disable_device(dev);
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 37/68] pata_atiixp: move code to be re-used by ide2libata to pata_atiixp.h
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (35 preceding siblings ...)
2010-01-29 16:06 ` [PATCH 36/68] aec62xx: convert to ide2libata Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:07 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:07 ` [PATCH 38/68] atiixp: convert to ide2libata Bartlomiej Zolnierkiewicz
` (31 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:07 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] pata_atiixp: move code to be re-used by ide2libata to pata_atiixp.h
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ata/pata_atiixp.c | 114 ---------------------------------------------
drivers/ata/pata_atiixp.h | 116 ++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 117 insertions(+), 113 deletions(-)
Index: b/drivers/ata/pata_atiixp.c
===================================================================
--- a/drivers/ata/pata_atiixp.c
+++ b/drivers/ata/pata_atiixp.c
@@ -24,28 +24,6 @@
#define DRV_NAME "pata_atiixp"
#define DRV_VERSION "0.4.6"
-enum {
- ATIIXP_IDE_PIO_TIMING = 0x40,
- ATIIXP_IDE_MWDMA_TIMING = 0x44,
- ATIIXP_IDE_PIO_CONTROL = 0x48,
- ATIIXP_IDE_PIO_MODE = 0x4a,
- ATIIXP_IDE_UDMA_CONTROL = 0x54,
- ATIIXP_IDE_UDMA_MODE = 0x56
-};
-
-static int atiixp_cable_detect(struct ata_port *ap)
-{
- struct pci_dev *pdev = to_pci_dev(ap->host->dev);
- u8 udma;
-
- /* Hack from drivers/ide/pci. Really we want to know how to do the
- raw detection not play follow the bios mode guess */
- pci_read_config_byte(pdev, ATIIXP_IDE_UDMA_MODE + ap->port_no, &udma);
- if ((udma & 0x07) >= 0x04 || (udma & 0x70) >= 0x40)
- return ATA_CBL_PATA80;
- return ATA_CBL_PATA40;
-}
-
/**
* atiixp_prereset - perform reset handling
* @link: ATA link
@@ -71,97 +49,7 @@ static int atiixp_prereset(struct ata_li
return ata_sff_prereset(link, deadline);
}
-static DEFINE_SPINLOCK(atiixp_lock);
-
-/**
- * atiixp_set_piomode - set PIO mode data
- * @ap: ATA interface
- * @adev: ATA device
- *
- * Called to set the controller timings for PIO transfers. We must
- * load both the mode number and timing values into the controller.
- */
-
-static void atiixp_set_piomode(struct ata_port *ap, struct ata_device *adev)
-{
- static u8 pio_timings[5] = { 0x5D, 0x47, 0x34, 0x22, 0x20 };
-
- struct pci_dev *pdev = to_pci_dev(ap->host->dev);
- unsigned long flags;
- int dn = 2 * ap->port_no + adev->devno;
- int timing_shift = (16 * ap->port_no) + 8 * (adev->devno ^ 1);
- int pio = adev->pio_mode - XFER_PIO_0;
- u32 pio_timing_data;
- u16 pio_mode_data;
-
- spin_lock_irqsave(&atiixp_lock, flags);
-
- pci_read_config_word(pdev, ATIIXP_IDE_PIO_MODE, &pio_mode_data);
- pio_mode_data &= ~(0x7 << (4 * dn));
- pio_mode_data |= pio << (4 * dn);
- pci_write_config_word(pdev, ATIIXP_IDE_PIO_MODE, pio_mode_data);
-
- pci_read_config_dword(pdev, ATIIXP_IDE_PIO_TIMING, &pio_timing_data);
- pio_timing_data &= ~(0xFF << timing_shift);
- pio_timing_data |= (pio_timings[pio] << timing_shift);
- pci_write_config_dword(pdev, ATIIXP_IDE_PIO_TIMING, pio_timing_data);
-
- spin_unlock_irqrestore(&atiixp_lock, flags);
-}
-
-/**
- * atiixp_set_dmamode - set DMA mode data
- * @ap: ATA interface
- * @adev: ATA device
- *
- * Called to do the DMA mode setup.
- */
-
-static void atiixp_set_dmamode(struct ata_port *ap, struct ata_device *adev)
-{
- static u8 mwdma_timings[5] = { 0x77, 0x21, 0x20 };
-
- struct pci_dev *pdev = to_pci_dev(ap->host->dev);
- unsigned long flags;
- int dma = adev->dma_mode;
- int dn = 2 * ap->port_no + adev->devno;
- u16 tmp16;
-
- spin_lock_irqsave(&atiixp_lock, flags);
-
- pci_read_config_word(pdev, ATIIXP_IDE_UDMA_CONTROL, &tmp16);
-
- if (adev->dma_mode >= XFER_UDMA_0) {
- u16 udma_mode_data;
-
- dma -= XFER_UDMA_0;
-
- pci_read_config_word(pdev, ATIIXP_IDE_UDMA_MODE, &udma_mode_data);
- udma_mode_data &= ~(0x7 << (4 * dn));
- udma_mode_data |= dma << (4 * dn);
- pci_write_config_word(pdev, ATIIXP_IDE_UDMA_MODE, udma_mode_data);
-
- tmp16 |= (1 << dn);
- } else {
- int timing_shift = (16 * ap->port_no) + 8 * (adev->devno ^ 1);
- u32 mwdma_timing_data;
-
- dma -= XFER_MW_DMA_0;
-
- pci_read_config_dword(pdev, ATIIXP_IDE_MWDMA_TIMING,
- &mwdma_timing_data);
- mwdma_timing_data &= ~(0xFF << timing_shift);
- mwdma_timing_data |= (mwdma_timings[dma] << timing_shift);
- pci_write_config_dword(pdev, ATIIXP_IDE_MWDMA_TIMING,
- mwdma_timing_data);
-
- tmp16 &= ~(1 << dn);
- }
-
- pci_write_config_word(pdev, ATIIXP_IDE_UDMA_CONTROL, tmp16);
-
- spin_unlock_irqrestore(&atiixp_lock, flags);
-}
+#include "pata_atiixp.h"
static struct scsi_host_template atiixp_sht = {
ATA_BMDMA_SHT(DRV_NAME),
Index: b/drivers/ata/pata_atiixp.h
===================================================================
--- /dev/null
+++ b/drivers/ata/pata_atiixp.h
@@ -0,0 +1,116 @@
+
+enum {
+ ATIIXP_IDE_PIO_TIMING = 0x40,
+ ATIIXP_IDE_MWDMA_TIMING = 0x44,
+ ATIIXP_IDE_PIO_CONTROL = 0x48,
+ ATIIXP_IDE_PIO_MODE = 0x4a,
+ ATIIXP_IDE_UDMA_CONTROL = 0x54,
+ ATIIXP_IDE_UDMA_MODE = 0x56
+};
+
+static int atiixp_cable_detect(struct ata_port *ap)
+{
+ struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+ u8 udma;
+
+ /* Hack from drivers/ide/pci. Really we want to know how to do the
+ raw detection not play follow the bios mode guess */
+ pci_read_config_byte(pdev, ATIIXP_IDE_UDMA_MODE + ap->port_no, &udma);
+ if ((udma & 0x07) >= 0x04 || (udma & 0x70) >= 0x40)
+ return ATA_CBL_PATA80;
+ return ATA_CBL_PATA40;
+}
+
+static DEFINE_SPINLOCK(atiixp_lock);
+
+/**
+ * atiixp_set_piomode - set PIO mode data
+ * @ap: ATA interface
+ * @adev: ATA device
+ *
+ * Called to set the controller timings for PIO transfers. We must
+ * load both the mode number and timing values into the controller.
+ */
+
+static void atiixp_set_piomode(struct ata_port *ap, struct ata_device *adev)
+{
+ static u8 pio_timings[5] = { 0x5D, 0x47, 0x34, 0x22, 0x20 };
+
+ struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+ unsigned long flags;
+ int dn = 2 * ap->port_no + adev->devno;
+ int timing_shift = (16 * ap->port_no) + 8 * (adev->devno ^ 1);
+ int pio = adev->pio_mode - XFER_PIO_0;
+ u32 pio_timing_data;
+ u16 pio_mode_data;
+
+ spin_lock_irqsave(&atiixp_lock, flags);
+
+ pci_read_config_word(pdev, ATIIXP_IDE_PIO_MODE, &pio_mode_data);
+ pio_mode_data &= ~(0x7 << (4 * dn));
+ pio_mode_data |= pio << (4 * dn);
+ pci_write_config_word(pdev, ATIIXP_IDE_PIO_MODE, pio_mode_data);
+
+ pci_read_config_dword(pdev, ATIIXP_IDE_PIO_TIMING, &pio_timing_data);
+ pio_timing_data &= ~(0xFF << timing_shift);
+ pio_timing_data |= (pio_timings[pio] << timing_shift);
+ pci_write_config_dword(pdev, ATIIXP_IDE_PIO_TIMING, pio_timing_data);
+
+ spin_unlock_irqrestore(&atiixp_lock, flags);
+}
+
+/**
+ * atiixp_set_dmamode - set DMA mode data
+ * @ap: ATA interface
+ * @adev: ATA device
+ *
+ * Called to do the DMA mode setup.
+ */
+
+static void atiixp_set_dmamode(struct ata_port *ap, struct ata_device *adev)
+{
+ static u8 mwdma_timings[5] = { 0x77, 0x21, 0x20 };
+
+ struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+ unsigned long flags;
+ int dma = adev->dma_mode;
+ int dn = 2 * ap->port_no + adev->devno;
+ u16 tmp16;
+
+ spin_lock_irqsave(&atiixp_lock, flags);
+
+ pci_read_config_word(pdev, ATIIXP_IDE_UDMA_CONTROL, &tmp16);
+
+ if (adev->dma_mode >= XFER_UDMA_0) {
+ u16 udma_mode_data;
+
+ dma -= XFER_UDMA_0;
+
+ pci_read_config_word(pdev, ATIIXP_IDE_UDMA_MODE,
+ &udma_mode_data);
+ udma_mode_data &= ~(0x7 << (4 * dn));
+ udma_mode_data |= dma << (4 * dn);
+ pci_write_config_word(pdev, ATIIXP_IDE_UDMA_MODE,
+ udma_mode_data);
+
+ tmp16 |= (1 << dn);
+ } else {
+ int timing_shift = (16 * ap->port_no) + 8 * (adev->devno ^ 1);
+ u32 mwdma_timing_data;
+
+ dma -= XFER_MW_DMA_0;
+
+ pci_read_config_dword(pdev, ATIIXP_IDE_MWDMA_TIMING,
+ &mwdma_timing_data);
+ mwdma_timing_data &= ~(0xFF << timing_shift);
+ mwdma_timing_data |= (mwdma_timings[dma] << timing_shift);
+ pci_write_config_dword(pdev, ATIIXP_IDE_MWDMA_TIMING,
+ mwdma_timing_data);
+
+ tmp16 &= ~(1 << dn);
+ }
+
+ pci_write_config_word(pdev, ATIIXP_IDE_UDMA_CONTROL, tmp16);
+
+ spin_unlock_irqrestore(&atiixp_lock, flags);
+}
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 38/68] atiixp: convert to ide2libata
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (36 preceding siblings ...)
2010-01-29 16:07 ` [PATCH 37/68] pata_atiixp: move code to be re-used by ide2libata to pata_atiixp.h Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:07 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:07 ` [PATCH 39/68] pata_cmd64x: documentation fix Bartlomiej Zolnierkiewicz
` (30 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:07 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] atiixp: convert to ide2libata
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ide/atiixp.c | 126 +--------------------------------------------------
1 file changed, 4 insertions(+), 122 deletions(-)
Index: b/drivers/ide/atiixp.c
===================================================================
--- a/drivers/ide/atiixp.c
+++ b/drivers/ide/atiixp.c
@@ -12,130 +12,12 @@
#define DRV_NAME "atiixp"
-#define ATIIXP_IDE_PIO_TIMING 0x40
-#define ATIIXP_IDE_MDMA_TIMING 0x44
-#define ATIIXP_IDE_PIO_CONTROL 0x48
-#define ATIIXP_IDE_PIO_MODE 0x4a
-#define ATIIXP_IDE_UDMA_CONTROL 0x54
-#define ATIIXP_IDE_UDMA_MODE 0x56
-
-typedef struct {
- u8 command_width;
- u8 recover_width;
-} atiixp_ide_timing;
-
-static atiixp_ide_timing pio_timing[] = {
- { 0x05, 0x0d },
- { 0x04, 0x07 },
- { 0x03, 0x04 },
- { 0x02, 0x02 },
- { 0x02, 0x00 },
-};
-
-static atiixp_ide_timing mdma_timing[] = {
- { 0x07, 0x07 },
- { 0x02, 0x01 },
- { 0x02, 0x00 },
-};
-
-static DEFINE_SPINLOCK(atiixp_lock);
-
-/**
- * atiixp_set_pio_mode - set host controller for PIO mode
- * @hwif: port
- * @drive: drive
- *
- * Set the interface PIO mode.
- */
-
-static void atiixp_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
-{
- struct pci_dev *dev = to_pci_dev(hwif->dev);
- unsigned long flags;
- int timing_shift = (drive->dn ^ 1) * 8;
- u32 pio_timing_data;
- u16 pio_mode_data;
- const u8 pio = drive->pio_mode - XFER_PIO_0;
-
- spin_lock_irqsave(&atiixp_lock, flags);
-
- pci_read_config_word(dev, ATIIXP_IDE_PIO_MODE, &pio_mode_data);
- pio_mode_data &= ~(0x07 << (drive->dn * 4));
- pio_mode_data |= (pio << (drive->dn * 4));
- pci_write_config_word(dev, ATIIXP_IDE_PIO_MODE, pio_mode_data);
-
- pci_read_config_dword(dev, ATIIXP_IDE_PIO_TIMING, &pio_timing_data);
- pio_timing_data &= ~(0xff << timing_shift);
- pio_timing_data |= (pio_timing[pio].recover_width << timing_shift) |
- (pio_timing[pio].command_width << (timing_shift + 4));
- pci_write_config_dword(dev, ATIIXP_IDE_PIO_TIMING, pio_timing_data);
-
- spin_unlock_irqrestore(&atiixp_lock, flags);
-}
-
-/**
- * atiixp_set_dma_mode - set host controller for DMA mode
- * @hwif: port
- * @drive: drive
- *
- * Set a ATIIXP host controller to the desired DMA mode. This involves
- * programming the right timing data into the PCI configuration space.
- */
-
-static void atiixp_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
-{
- struct pci_dev *dev = to_pci_dev(hwif->dev);
- unsigned long flags;
- int timing_shift = (drive->dn ^ 1) * 8;
- u32 tmp32;
- u16 tmp16;
- u16 udma_ctl = 0;
- const u8 speed = drive->dma_mode;
-
- spin_lock_irqsave(&atiixp_lock, flags);
-
- pci_read_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, &udma_ctl);
-
- if (speed >= XFER_UDMA_0) {
- pci_read_config_word(dev, ATIIXP_IDE_UDMA_MODE, &tmp16);
- tmp16 &= ~(0x07 << (drive->dn * 4));
- tmp16 |= ((speed & 0x07) << (drive->dn * 4));
- pci_write_config_word(dev, ATIIXP_IDE_UDMA_MODE, tmp16);
-
- udma_ctl |= (1 << drive->dn);
- } else if (speed >= XFER_MW_DMA_0) {
- u8 i = speed & 0x03;
-
- pci_read_config_dword(dev, ATIIXP_IDE_MDMA_TIMING, &tmp32);
- tmp32 &= ~(0xff << timing_shift);
- tmp32 |= (mdma_timing[i].recover_width << timing_shift) |
- (mdma_timing[i].command_width << (timing_shift + 4));
- pci_write_config_dword(dev, ATIIXP_IDE_MDMA_TIMING, tmp32);
-
- udma_ctl &= ~(1 << drive->dn);
- }
-
- pci_write_config_word(dev, ATIIXP_IDE_UDMA_CONTROL, udma_ctl);
-
- spin_unlock_irqrestore(&atiixp_lock, flags);
-}
-
-static int atiixp_cable_detect(ide_hwif_t *hwif)
-{
- struct pci_dev *pdev = to_pci_dev(hwif->dev);
- u8 udma_mode = 0, ch = hwif->channel;
-
- pci_read_config_byte(pdev, ATIIXP_IDE_UDMA_MODE + ch, &udma_mode);
-
- if ((udma_mode & 0x07) >= 0x04 || (udma_mode & 0x70) >= 0x40)
- return ATA_CBL_PATA80;
- else
- return ATA_CBL_PATA40;
-}
+#include <linux/ide2libata.h>
+#include <../ata/pata_atiixp.h>
static const struct ide_port_ops atiixp_port_ops = {
- .set_pio_mode = atiixp_set_pio_mode,
- .set_dma_mode = atiixp_set_dma_mode,
+ .set_pio_mode = atiixp_set_piomode,
+ .set_dma_mode = atiixp_set_dmamode,
.cable_detect = atiixp_cable_detect,
};
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 39/68] pata_cmd64x: documentation fix
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (37 preceding siblings ...)
2010-01-29 16:07 ` [PATCH 38/68] atiixp: convert to ide2libata Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:07 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:07 ` [PATCH 40/68] pata_cmd64x: move code to be re-used by ide2libata to pata_cmd64x.h Bartlomiej Zolnierkiewicz
` (29 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:07 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] pata_cmd64x: documentation fix
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ata/pata_cmd64x.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Index: b/drivers/ata/pata_cmd64x.c
===================================================================
--- a/drivers/ata/pata_cmd64x.c
+++ b/drivers/ata/pata_cmd64x.c
@@ -113,7 +113,7 @@ out:
}
/**
- * cmd64x_set_piomode - set PIO and MWDMA timing
+ * cmd64x_set_timing - set PIO and MWDMA timing
* @ap: ATA interface
* @adev: ATA device
* @mode: mode
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 40/68] pata_cmd64x: move code to be re-used by ide2libata to pata_cmd64x.h
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (38 preceding siblings ...)
2010-01-29 16:07 ` [PATCH 39/68] pata_cmd64x: documentation fix Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:07 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:07 ` [PATCH 41/68] pata_cmd64x: convert to ide2libata Bartlomiej Zolnierkiewicz
` (28 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:07 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] pata_cmd64x: move code to be re-used by ide2libata to pata_cmd64x.h
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ata/pata_cmd64x.c | 215 ----------------------------------------------
drivers/ata/pata_cmd64x.h | 215 ++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 216 insertions(+), 214 deletions(-)
Index: b/drivers/ata/pata_cmd64x.c
===================================================================
--- a/drivers/ata/pata_cmd64x.c
+++ b/drivers/ata/pata_cmd64x.c
@@ -34,49 +34,7 @@
#define DRV_NAME "pata_cmd64x"
#define DRV_VERSION "0.2.5"
-/*
- * CMD64x specific registers definition.
- */
-
-enum {
- CFR = 0x50,
- CFR_INTR_CH0 = 0x04,
- CMDTIM = 0x52,
- ARTTIM0 = 0x53,
- DRWTIM0 = 0x54,
- ARTTIM1 = 0x55,
- DRWTIM1 = 0x56,
- ARTTIM23 = 0x57,
- ARTTIM23_DIS_RA2 = 0x04,
- ARTTIM23_DIS_RA3 = 0x08,
- ARTTIM23_INTR_CH1 = 0x10,
- DRWTIM2 = 0x58,
- BRST = 0x59,
- DRWTIM3 = 0x5b,
- BMIDECR0 = 0x70,
- MRDMODE = 0x71,
- MRDMODE_INTR_CH0 = 0x04,
- MRDMODE_INTR_CH1 = 0x08,
- BMIDESR0 = 0x72,
- UDIDETCR0 = 0x73,
- DTPR0 = 0x74,
- BMIDECR1 = 0x78,
- BMIDECSR = 0x79,
- UDIDETCR1 = 0x7B,
- DTPR1 = 0x7C
-};
-
-static int cmd648_cable_detect(struct ata_port *ap)
-{
- struct pci_dev *pdev = to_pci_dev(ap->host->dev);
- u8 r;
-
- /* Check cable detect bits */
- pci_read_config_byte(pdev, BMIDECSR, &r);
- if (r & (1 << ap->port_no))
- return ATA_CBL_PATA80;
- return ATA_CBL_PATA40;
-}
+#include "pata_cmd64x.h"
/**
* cmd64x_prereset - perform reset handling
@@ -113,158 +71,6 @@ out:
}
/**
- * cmd64x_set_timing - set PIO and MWDMA timing
- * @ap: ATA interface
- * @adev: ATA device
- * @mode: mode
- *
- * Called to do the PIO and MWDMA mode setup.
- */
-
-static void cmd64x_set_timing(struct ata_port *ap, struct ata_device *adev, u8 mode)
-{
- struct pci_dev *pdev = to_pci_dev(ap->host->dev);
- struct ata_timing t;
- const unsigned long T = 1000000 / 33;
- const u8 setup_data[] = { 0x40, 0x40, 0x40, 0x80, 0x00 };
-
- u8 reg;
-
- /* Port layout is not logical so use a table */
- const u8 arttim_port[2][2] = {
- { ARTTIM0, ARTTIM1 },
- { ARTTIM23, ARTTIM23 }
- };
- const u8 drwtim_port[2][2] = {
- { DRWTIM0, DRWTIM1 },
- { DRWTIM2, DRWTIM3 }
- };
-
- int arttim = arttim_port[ap->port_no][adev->devno];
- int drwtim = drwtim_port[ap->port_no][adev->devno];
-
- /* ata_timing_compute is smart and will produce timings for MWDMA
- that don't violate the drives PIO capabilities. */
- ata_timing_compute(adev->id, mode, adev->pio_mode, &t, T, 0);
-
- if (ap->port_no) {
- /* Slave has shared address setup */
- struct ata_device *pair = ata_dev_pair(adev);
-
- if (pair) {
- struct ata_timing tp;
-
- ata_timing_compute(pair->id, pair->pio_mode,
- pair->pio_mode, &tp, T, 0);
- ata_timing_merge(&t, &tp, &t, ATA_TIMING_SETUP);
- if (pair->dma_mode) {
- ata_timing_compute(pair->id, pair->dma_mode,
- pair->pio_mode, &tp, T, 0);
- ata_timing_merge(&tp, &t, &t, ATA_TIMING_SETUP);
- }
- }
- }
-
- printk(KERN_DEBUG DRV_NAME ": active %d recovery %d setup %d.\n",
- t.active, t.recover, t.setup);
- if (t.recover > 16) {
- t.active += t.recover - 16;
- t.recover = 16;
- }
- if (t.active > 16)
- t.active = 16;
-
- /* Now convert the clocks into values we can actually stuff into
- the chip */
-
- if (t.recover == 16)
- t.recover = 0;
- else if (t.recover > 1)
- t.recover--;
- else
- t.recover = 15;
-
- if (t.setup > 4)
- t.setup = 0xC0;
- else
- t.setup = setup_data[t.setup];
-
- t.active &= 0x0F; /* 0 = 16 */
-
- /* Load setup timing */
- pci_read_config_byte(pdev, arttim, ®);
- reg &= 0x3F;
- reg |= t.setup;
- pci_write_config_byte(pdev, arttim, reg);
-
- /* Load active/recovery */
- pci_write_config_byte(pdev, drwtim, (t.active << 4) | t.recover);
-}
-
-/**
- * cmd64x_set_piomode - set initial PIO mode data
- * @ap: ATA interface
- * @adev: ATA device
- *
- * Used when configuring the devices ot set the PIO timings. All the
- * actual work is done by the PIO/MWDMA setting helper
- */
-
-static void cmd64x_set_piomode(struct ata_port *ap, struct ata_device *adev)
-{
- cmd64x_set_timing(ap, adev, adev->pio_mode);
-}
-
-/**
- * cmd64x_set_dmamode - set initial DMA mode data
- * @ap: ATA interface
- * @adev: ATA device
- *
- * Called to do the DMA mode setup.
- */
-
-static void cmd64x_set_dmamode(struct ata_port *ap, struct ata_device *adev)
-{
- static const u8 udma_data[] = {
- 0x30, 0x20, 0x10, 0x20, 0x10, 0x00
- };
-
- struct pci_dev *pdev = to_pci_dev(ap->host->dev);
- u8 regU, regD;
-
- int pciU = UDIDETCR0 + 8 * ap->port_no;
- int pciD = BMIDESR0 + 8 * ap->port_no;
- int shift = 2 * adev->devno;
-
- pci_read_config_byte(pdev, pciD, ®D);
- pci_read_config_byte(pdev, pciU, ®U);
-
- /* DMA bits off */
- regD &= ~(0x20 << adev->devno);
- /* DMA control bits */
- regU &= ~(0x30 << shift);
- /* DMA timing bits */
- regU &= ~(0x05 << adev->devno);
-
- if (adev->dma_mode >= XFER_UDMA_0) {
- /* Merge the timing value */
- regU |= udma_data[adev->dma_mode - XFER_UDMA_0] << shift;
- /* Merge the control bits */
- regU |= 1 << adev->devno; /* UDMA on */
- if (adev->dma_mode > XFER_UDMA_2) /* 15nS timing */
- regU |= 4 << adev->devno;
- } else {
- regU &= ~ (1 << adev->devno); /* UDMA off */
- cmd64x_set_timing(ap, adev, adev->dma_mode);
- }
-
- regD |= 0x20 << adev->devno;
-
- pci_write_config_byte(pdev, pciU, regU);
- pci_write_config_byte(pdev, pciD, regD);
-}
-
-/**
* cmd648_dma_stop - DMA stop callback
* @qc: Command in progress
*
@@ -325,25 +131,6 @@ static struct ata_port_operations cmd648
.cable_detect = cmd648_cable_detect,
};
-static int cmd64x_fixup(struct device *dev)
-{
- struct pci_dev *pdev = to_pci_dev(dev);
- u8 mrdmode;
-
- pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 64);
- pci_read_config_byte(pdev, MRDMODE, &mrdmode);
- mrdmode &= ~0x30; /* IRQ set up */
- mrdmode |= 0x02; /* Memory read line enable */
- pci_write_config_byte(pdev, MRDMODE, mrdmode);
-
- /* PPC specific fixup copied from old driver */
-#ifdef CONFIG_PPC
- pci_write_config_byte(pdev, UDIDETCR0, 0xF0);
-#endif
-
- return 0;
-}
-
static int cmd64x_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
{
static const struct ata_port_info cmd_info[6] = {
Index: b/drivers/ata/pata_cmd64x.h
===================================================================
--- /dev/null
+++ b/drivers/ata/pata_cmd64x.h
@@ -0,0 +1,215 @@
+
+/*
+ * CMD64x specific registers definition.
+ */
+
+enum {
+ CFR = 0x50,
+ CFR_INTR_CH0 = 0x04,
+ CMDTIM = 0x52,
+ ARTTIM0 = 0x53,
+ DRWTIM0 = 0x54,
+ ARTTIM1 = 0x55,
+ DRWTIM1 = 0x56,
+ ARTTIM23 = 0x57,
+ ARTTIM23_DIS_RA2 = 0x04,
+ ARTTIM23_DIS_RA3 = 0x08,
+ ARTTIM23_INTR_CH1 = 0x10,
+ DRWTIM2 = 0x58,
+ BRST = 0x59,
+ DRWTIM3 = 0x5b,
+ BMIDECR0 = 0x70,
+ MRDMODE = 0x71,
+ MRDMODE_INTR_CH0 = 0x04,
+ MRDMODE_INTR_CH1 = 0x08,
+ BMIDESR0 = 0x72,
+ UDIDETCR0 = 0x73,
+ DTPR0 = 0x74,
+ BMIDECR1 = 0x78,
+ BMIDECSR = 0x79,
+ UDIDETCR1 = 0x7B,
+ DTPR1 = 0x7C
+};
+
+static int cmd648_cable_detect(struct ata_port *ap)
+{
+ struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+ u8 r;
+
+ /* Check cable detect bits */
+ pci_read_config_byte(pdev, BMIDECSR, &r);
+ if (r & (1 << ap->port_no))
+ return ATA_CBL_PATA80;
+ return ATA_CBL_PATA40;
+}
+
+/**
+ * cmd64x_set_timing - set PIO and MWDMA timing
+ * @ap: ATA interface
+ * @adev: ATA device
+ * @mode: mode
+ *
+ * Called to do the PIO and MWDMA mode setup.
+ */
+
+static void cmd64x_set_timing(struct ata_port *ap, struct ata_device *adev, u8 mode)
+{
+ struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+ struct ata_timing t;
+ const unsigned long T = 1000000 / 33;
+ const u8 setup_data[] = { 0x40, 0x40, 0x40, 0x80, 0x00 };
+
+ u8 reg;
+
+ /* Port layout is not logical so use a table */
+ const u8 arttim_port[2][2] = {
+ { ARTTIM0, ARTTIM1 },
+ { ARTTIM23, ARTTIM23 }
+ };
+ const u8 drwtim_port[2][2] = {
+ { DRWTIM0, DRWTIM1 },
+ { DRWTIM2, DRWTIM3 }
+ };
+
+ int arttim = arttim_port[ap->port_no][adev->devno];
+ int drwtim = drwtim_port[ap->port_no][adev->devno];
+
+ /* ata_timing_compute is smart and will produce timings for MWDMA
+ that don't violate the drives PIO capabilities. */
+ ata_timing_compute(adev->id, mode, adev->pio_mode, &t, T, 0);
+
+ if (ap->port_no) {
+ /* Slave has shared address setup */
+ struct ata_device *pair = ata_dev_pair(adev);
+
+ if (pair) {
+ struct ata_timing tp;
+
+ ata_timing_compute(pair->id, pair->pio_mode,
+ pair->pio_mode, &tp, T, 0);
+ ata_timing_merge(&t, &tp, &t, ATA_TIMING_SETUP);
+ if (pair->dma_mode) {
+ ata_timing_compute(pair->id, pair->dma_mode,
+ pair->pio_mode, &tp, T, 0);
+ ata_timing_merge(&tp, &t, &t, ATA_TIMING_SETUP);
+ }
+ }
+ }
+
+ printk(KERN_DEBUG DRV_NAME ": active %d recovery %d setup %d.\n",
+ t.active, t.recover, t.setup);
+ if (t.recover > 16) {
+ t.active += t.recover - 16;
+ t.recover = 16;
+ }
+ if (t.active > 16)
+ t.active = 16;
+
+ /* Now convert the clocks into values we can actually stuff into
+ the chip */
+
+ if (t.recover == 16)
+ t.recover = 0;
+ else if (t.recover > 1)
+ t.recover--;
+ else
+ t.recover = 15;
+
+ if (t.setup > 4)
+ t.setup = 0xC0;
+ else
+ t.setup = setup_data[t.setup];
+
+ t.active &= 0x0F; /* 0 = 16 */
+
+ /* Load setup timing */
+ pci_read_config_byte(pdev, arttim, ®);
+ reg &= 0x3F;
+ reg |= t.setup;
+ pci_write_config_byte(pdev, arttim, reg);
+
+ /* Load active/recovery */
+ pci_write_config_byte(pdev, drwtim, (t.active << 4) | t.recover);
+}
+
+/**
+ * cmd64x_set_piomode - set initial PIO mode data
+ * @ap: ATA interface
+ * @adev: ATA device
+ *
+ * Used when configuring the devices ot set the PIO timings. All the
+ * actual work is done by the PIO/MWDMA setting helper
+ */
+
+static void cmd64x_set_piomode(struct ata_port *ap, struct ata_device *adev)
+{
+ cmd64x_set_timing(ap, adev, adev->pio_mode);
+}
+
+/**
+ * cmd64x_set_dmamode - set initial DMA mode data
+ * @ap: ATA interface
+ * @adev: ATA device
+ *
+ * Called to do the DMA mode setup.
+ */
+
+static void cmd64x_set_dmamode(struct ata_port *ap, struct ata_device *adev)
+{
+ static const u8 udma_data[] = {
+ 0x30, 0x20, 0x10, 0x20, 0x10, 0x00
+ };
+
+ struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+ u8 regU, regD;
+
+ int pciU = UDIDETCR0 + 8 * ap->port_no;
+ int pciD = BMIDESR0 + 8 * ap->port_no;
+ int shift = 2 * adev->devno;
+
+ pci_read_config_byte(pdev, pciD, ®D);
+ pci_read_config_byte(pdev, pciU, ®U);
+
+ /* DMA bits off */
+ regD &= ~(0x20 << adev->devno);
+ /* DMA control bits */
+ regU &= ~(0x30 << shift);
+ /* DMA timing bits */
+ regU &= ~(0x05 << adev->devno);
+
+ if (adev->dma_mode >= XFER_UDMA_0) {
+ /* Merge the timing value */
+ regU |= udma_data[adev->dma_mode - XFER_UDMA_0] << shift;
+ /* Merge the control bits */
+ regU |= 1 << adev->devno; /* UDMA on */
+ if (adev->dma_mode > XFER_UDMA_2) /* 15nS timing */
+ regU |= 4 << adev->devno;
+ } else {
+ regU &= ~(1 << adev->devno); /* UDMA off */
+ cmd64x_set_timing(ap, adev, adev->dma_mode);
+ }
+
+ regD |= 0x20 << adev->devno;
+
+ pci_write_config_byte(pdev, pciU, regU);
+ pci_write_config_byte(pdev, pciD, regD);
+}
+
+static int cmd64x_fixup(struct device *dev)
+{
+ struct pci_dev *pdev = to_pci_dev(dev);
+ u8 mrdmode;
+
+ pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 64);
+ pci_read_config_byte(pdev, MRDMODE, &mrdmode);
+ mrdmode &= ~0x30; /* IRQ set up */
+ mrdmode |= 0x02; /* Memory read line enable */
+ pci_write_config_byte(pdev, MRDMODE, mrdmode);
+
+ /* PPC specific fixup copied from old driver */
+#ifdef CONFIG_PPC
+ pci_write_config_byte(pdev, UDIDETCR0, 0xF0);
+#endif
+
+ return 0;
+}
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 41/68] pata_cmd64x: convert to ide2libata
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (39 preceding siblings ...)
2010-01-29 16:07 ` [PATCH 40/68] pata_cmd64x: move code to be re-used by ide2libata to pata_cmd64x.h Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:07 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:07 ` [PATCH 42/68] pata_cs5520: move code to be re-used by ide2libata to pata_cs5520.h Bartlomiej Zolnierkiewicz
` (27 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:07 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] pata_cmd64x: convert to ide2libata
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ata/pata_cmd64x.h | 35 +++++++-
drivers/ide/cmd64x.c | 195 +---------------------------------------------
2 files changed, 41 insertions(+), 189 deletions(-)
Index: b/drivers/ata/pata_cmd64x.h
===================================================================
--- a/drivers/ata/pata_cmd64x.h
+++ b/drivers/ata/pata_cmd64x.h
@@ -56,7 +56,12 @@ static void cmd64x_set_timing(struct ata
{
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
struct ata_timing t;
+#ifndef __IDE2LIBATA
const unsigned long T = 1000000 / 33;
+#else
+ int bus_speed = ide_pci_clk ? ide_pci_clk : 33;
+ const unsigned long T = 1000000 / bus_speed;
+#endif
const u8 setup_data[] = { 0x40, 0x40, 0x40, 0x80, 0x00 };
u8 reg;
@@ -124,6 +129,11 @@ static void cmd64x_set_timing(struct ata
/* Load setup timing */
pci_read_config_byte(pdev, arttim, ®);
+#ifdef __IDE2LIBATA
+ /* Avoid clearing the secondary channel's interrupt bit. */
+ if (ap->port_no)
+ reg &= ~ARTTIM23_INTR_CH1;
+#endif
reg &= 0x3F;
reg |= t.setup;
pci_write_config_byte(pdev, arttim, reg);
@@ -143,6 +153,13 @@ static void cmd64x_set_timing(struct ata
static void cmd64x_set_piomode(struct ata_port *ap, struct ata_device *adev)
{
+#ifdef __IDE2LIBATA
+ const u8 pio = adev->pio_mode - XFER_PIO_0;
+
+ /* Filter out the prefetch control values. */
+ if (pio == 8 || pio == 9)
+ return;
+#endif
cmd64x_set_timing(ap, adev, adev->pio_mode);
}
@@ -161,13 +178,17 @@ static void cmd64x_set_dmamode(struct at
};
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
- u8 regU, regD;
+ u8 regU, regD = 0;
int pciU = UDIDETCR0 + 8 * ap->port_no;
+#ifndef __IDE2LIBATA
int pciD = BMIDESR0 + 8 * ap->port_no;
+#endif
int shift = 2 * adev->devno;
+#ifndef __IDE2LIBATA
pci_read_config_byte(pdev, pciD, ®D);
+#endif
pci_read_config_byte(pdev, pciU, ®U);
/* DMA bits off */
@@ -192,7 +213,9 @@ static void cmd64x_set_dmamode(struct at
regD |= 0x20 << adev->devno;
pci_write_config_byte(pdev, pciU, regU);
+#ifndef __IDE2LIBATA
pci_write_config_byte(pdev, pciD, regD);
+#endif
}
static int cmd64x_fixup(struct device *dev)
@@ -201,15 +224,23 @@ static int cmd64x_fixup(struct device *d
u8 mrdmode;
pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 64);
+ /* FIXME: pci_set_master() to ensure a good latency timer value */
+
+ /*
+ * NOTE: although not mentioned in the PCI0646U specs,
+ * bits 0-1 are write only and won't be read back as
+ * set or not -- PCI0646U2 specs clarify this point.
+ */
pci_read_config_byte(pdev, MRDMODE, &mrdmode);
mrdmode &= ~0x30; /* IRQ set up */
mrdmode |= 0x02; /* Memory read line enable */
pci_write_config_byte(pdev, MRDMODE, mrdmode);
+#ifndef __IDE2LIBATA
/* PPC specific fixup copied from old driver */
#ifdef CONFIG_PPC
pci_write_config_byte(pdev, UDIDETCR0, 0xF0);
#endif
-
+#endif
return 0;
}
Index: b/drivers/ide/cmd64x.c
===================================================================
--- a/drivers/ide/cmd64x.c
+++ b/drivers/ide/cmd64x.c
@@ -20,168 +20,8 @@
#define DRV_NAME "cmd64x"
-/*
- * CMD64x specific registers definition.
- */
-#define CFR 0x50
-#define CFR_INTR_CH0 0x04
-
-#define CMDTIM 0x52
-#define ARTTIM0 0x53
-#define DRWTIM0 0x54
-#define ARTTIM1 0x55
-#define DRWTIM1 0x56
-#define ARTTIM23 0x57
-#define ARTTIM23_DIS_RA2 0x04
-#define ARTTIM23_DIS_RA3 0x08
-#define ARTTIM23_INTR_CH1 0x10
-#define DRWTIM2 0x58
-#define BRST 0x59
-#define DRWTIM3 0x5b
-
-#define BMIDECR0 0x70
-#define MRDMODE 0x71
-#define MRDMODE_INTR_CH0 0x04
-#define MRDMODE_INTR_CH1 0x08
-#define UDIDETCR0 0x73
-#define DTPR0 0x74
-#define BMIDECR1 0x78
-#define BMIDECSR 0x79
-#define UDIDETCR1 0x7B
-#define DTPR1 0x7C
-
-static void cmd64x_program_timings(ide_drive_t *drive, u8 mode)
-{
- ide_hwif_t *hwif = drive->hwif;
- struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
- int bus_speed = ide_pci_clk ? ide_pci_clk : 33;
- const unsigned long T = 1000000 / bus_speed;
- static const u8 recovery_values[] =
- {15, 15, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 0};
- static const u8 setup_values[] = {0x40, 0x40, 0x40, 0x80, 0, 0xc0};
- static const u8 arttim_regs[4] = {ARTTIM0, ARTTIM1, ARTTIM23, ARTTIM23};
- static const u8 drwtim_regs[4] = {DRWTIM0, DRWTIM1, DRWTIM2, DRWTIM3};
- struct ata_timing t;
- u8 arttim = 0;
-
- ata_timing_compute(drive->id, mode, drive->pio_mode, &t, T, 0);
-
- /*
- * In case we've got too long recovery phase, try to lengthen
- * the active phase
- */
- if (t.recover > 16) {
- t.active += t.recover - 16;
- t.recover = 16;
- }
- if (t.active > 16) /* shouldn't actually happen... */
- t.active = 16;
-
- /*
- * Convert values to internal chipset representation
- */
- t.recover = recovery_values[t.recover];
- t.active &= 0x0f;
-
- /* Program the active/recovery counts into the DRWTIM register */
- pci_write_config_byte(dev, drwtim_regs[drive->dn],
- (t.active << 4) | t.recover);
-
- /*
- * The primary channel has individual address setup timing registers
- * for each drive and the hardware selects the slowest timing itself.
- * The secondary channel has one common register and we have to select
- * the slowest address setup timing ourselves.
- */
- if (hwif->channel) {
- ide_drive_t *pair = ide_get_pair_dev(drive);
-
- if (pair) {
- struct ata_timing tp;
-
- ata_timing_compute(pair->id, pair->pio_mode,
- pair->pio_mode, &tp, T, 0);
- ata_timing_merge(&t, &tp, &t, ATA_TIMING_SETUP);
- if (pair->dma_mode) {
- ata_timing_compute(pair->id, pair->dma_mode,
- pair->pio_mode, &tp, T, 0);
- ata_timing_merge(&tp, &t, &t, ATA_TIMING_SETUP);
- }
- }
- }
-
- if (t.setup > 5) /* shouldn't actually happen... */
- t.setup = 5;
-
- /*
- * Program the address setup clocks into the ARTTIM registers.
- * Avoid clearing the secondary channel's interrupt bit.
- */
- (void) pci_read_config_byte (dev, arttim_regs[drive->dn], &arttim);
- if (hwif->channel)
- arttim &= ~ARTTIM23_INTR_CH1;
- arttim &= ~0xc0;
- arttim |= setup_values[t.setup];
- (void) pci_write_config_byte(dev, arttim_regs[drive->dn], arttim);
-}
-
-/*
- * Attempts to set drive's PIO mode.
- * Special cases are 8: prefetch off, 9: prefetch on (both never worked)
- */
-
-static void cmd64x_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
-{
- const u8 pio = drive->pio_mode - XFER_PIO_0;
-
- /*
- * Filter out the prefetch control values
- * to prevent PIO5 from being programmed
- */
- if (pio == 8 || pio == 9)
- return;
-
- cmd64x_program_timings(drive, XFER_PIO_0 + pio);
-}
-
-static void cmd64x_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
-{
- struct pci_dev *dev = to_pci_dev(hwif->dev);
- u8 unit = drive->dn & 0x01;
- u8 regU = 0, pciU = hwif->channel ? UDIDETCR1 : UDIDETCR0;
- const u8 speed = drive->dma_mode;
-
- pci_read_config_byte(dev, pciU, ®U);
- regU &= ~(unit ? 0xCA : 0x35);
-
- switch(speed) {
- case XFER_UDMA_5:
- regU |= unit ? 0x0A : 0x05;
- break;
- case XFER_UDMA_4:
- regU |= unit ? 0x4A : 0x15;
- break;
- case XFER_UDMA_3:
- regU |= unit ? 0x8A : 0x25;
- break;
- case XFER_UDMA_2:
- regU |= unit ? 0x42 : 0x11;
- break;
- case XFER_UDMA_1:
- regU |= unit ? 0x82 : 0x21;
- break;
- case XFER_UDMA_0:
- regU |= unit ? 0xC2 : 0x31;
- break;
- case XFER_MW_DMA_2:
- case XFER_MW_DMA_1:
- case XFER_MW_DMA_0:
- cmd64x_program_timings(drive, speed);
- break;
- }
-
- pci_write_config_byte(dev, pciU, regU);
-}
+#include <linux/ide2libata.h>
+#include "../ata/pata_cmd64x.h"
static void cmd648_clear_irq(ide_drive_t *drive)
{
@@ -265,52 +105,33 @@ static int cmd646_1_dma_end(ide_drive_t
static int init_chipset_cmd64x(struct pci_dev *dev)
{
- u8 mrdmode = 0;
-
- /* Set a good latency timer and cache line size value. */
- (void) pci_write_config_byte(dev, PCI_LATENCY_TIMER, 64);
- /* FIXME: pci_set_master() to ensure a good latency timer value */
-
- /*
- * Enable interrupts, select MEMORY READ LINE for reads.
- *
- * NOTE: although not mentioned in the PCI0646U specs,
- * bits 0-1 are write only and won't be read back as
- * set or not -- PCI0646U2 specs clarify this point.
- */
- (void) pci_read_config_byte (dev, MRDMODE, &mrdmode);
- mrdmode &= ~0x30;
- (void) pci_write_config_byte(dev, MRDMODE, (mrdmode | 0x02));
-
- return 0;
+ return cmd64x_fixup(&dev->dev);
}
static int cmd64x_cable_detect(ide_hwif_t *hwif)
{
struct pci_dev *dev = to_pci_dev(hwif->dev);
- u8 bmidecsr = 0, mask = hwif->channel ? 0x02 : 0x01;
switch (dev->device) {
case PCI_DEVICE_ID_CMD_648:
case PCI_DEVICE_ID_CMD_649:
- pci_read_config_byte(dev, BMIDECSR, &bmidecsr);
- return (bmidecsr & mask) ? ATA_CBL_PATA80 : ATA_CBL_PATA40;
+ return cmd648_cable_detect(hwif);
default:
return ATA_CBL_PATA40;
}
}
static const struct ide_port_ops cmd64x_port_ops = {
- .set_pio_mode = cmd64x_set_pio_mode,
- .set_dma_mode = cmd64x_set_dma_mode,
+ .set_pio_mode = cmd64x_set_piomode,
+ .set_dma_mode = cmd64x_set_dmamode,
.clear_irq = cmd64x_clear_irq,
.test_irq = cmd64x_test_irq,
.cable_detect = cmd64x_cable_detect,
};
static const struct ide_port_ops cmd648_port_ops = {
- .set_pio_mode = cmd64x_set_pio_mode,
- .set_dma_mode = cmd64x_set_dma_mode,
+ .set_pio_mode = cmd64x_set_piomode,
+ .set_dma_mode = cmd64x_set_dmamode,
.clear_irq = cmd648_clear_irq,
.test_irq = cmd648_test_irq,
.cable_detect = cmd64x_cable_detect,
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 42/68] pata_cs5520: move code to be re-used by ide2libata to pata_cs5520.h
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (40 preceding siblings ...)
2010-01-29 16:07 ` [PATCH 41/68] pata_cmd64x: convert to ide2libata Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:07 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:07 ` [PATCH 43/68] cs5520: convert to ide2libata Bartlomiej Zolnierkiewicz
` (26 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:07 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] pata_cs5520: move code to be re-used by ide2libata to pata_cs5520.h
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ata/pata_cs5520.c | 60 ----------------------------------------------
drivers/ata/pata_cs5520.h | 60 ++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 61 insertions(+), 59 deletions(-)
Index: b/drivers/ata/pata_cs5520.c
===================================================================
--- a/drivers/ata/pata_cs5520.c
+++ b/drivers/ata/pata_cs5520.c
@@ -43,65 +43,7 @@
#define DRV_NAME "pata_cs5520"
#define DRV_VERSION "0.6.6"
-struct pio_clocks
-{
- int address;
- int assert;
- int recovery;
-};
-
-static const struct pio_clocks cs5520_pio_clocks[]={
- {3, 6, 11},
- {2, 5, 6},
- {1, 4, 3},
- {1, 3, 2},
- {1, 2, 1}
-};
-
-/**
- * cs5520_set_timings - program PIO timings
- * @ap: ATA port
- * @adev: ATA device
- *
- * Program the PIO mode timings for the controller according to the pio
- * clocking table.
- */
-
-static void cs5520_set_timings(struct ata_port *ap, struct ata_device *adev, int pio)
-{
- struct pci_dev *pdev = to_pci_dev(ap->host->dev);
- int slave = adev->devno;
-
- pio -= XFER_PIO_0;
-
- /* Channel command timing */
- pci_write_config_byte(pdev, 0x62 + ap->port_no,
- (cs5520_pio_clocks[pio].recovery << 4) |
- (cs5520_pio_clocks[pio].assert));
- /* FIXME: should these use address ? */
- /* Read command timing */
- pci_write_config_byte(pdev, 0x64 + 4*ap->port_no + slave,
- (cs5520_pio_clocks[pio].recovery << 4) |
- (cs5520_pio_clocks[pio].assert));
- /* Write command timing */
- pci_write_config_byte(pdev, 0x66 + 4*ap->port_no + slave,
- (cs5520_pio_clocks[pio].recovery << 4) |
- (cs5520_pio_clocks[pio].assert));
-}
-
-/**
- * cs5520_set_piomode - program PIO timings
- * @ap: ATA port
- * @adev: ATA device
- *
- * Program the PIO mode timings for the controller according to the pio
- * clocking table.
- */
-
-static void cs5520_set_piomode(struct ata_port *ap, struct ata_device *adev)
-{
- cs5520_set_timings(ap, adev, adev->pio_mode);
-}
+#include "pata_cs5520.h"
static struct scsi_host_template cs5520_sht = {
ATA_BMDMA_SHT(DRV_NAME),
Index: b/drivers/ata/pata_cs5520.h
===================================================================
--- /dev/null
+++ b/drivers/ata/pata_cs5520.h
@@ -0,0 +1,60 @@
+
+struct pio_clocks {
+ int address;
+ int assert;
+ int recovery;
+};
+
+static const struct pio_clocks cs5520_pio_clocks[] = {
+ { 3, 6, 11 },
+ { 2, 5, 6 },
+ { 1, 4, 3 },
+ { 1, 3, 2 },
+ { 1, 2, 1 }
+};
+
+/**
+ * cs5520_set_timings - program PIO timings
+ * @ap: ATA port
+ * @adev: ATA device
+ *
+ * Program the PIO mode timings for the controller according to the pio
+ * clocking table.
+ */
+
+static void cs5520_set_timings(struct ata_port *ap, struct ata_device *adev,
+ int pio)
+{
+ struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+ int slave = adev->devno;
+
+ pio -= XFER_PIO_0;
+
+ /* Channel command timing */
+ pci_write_config_byte(pdev, 0x62 + ap->port_no,
+ (cs5520_pio_clocks[pio].recovery << 4) |
+ (cs5520_pio_clocks[pio].assert));
+ /* FIXME: should these use address ? */
+ /* Read command timing */
+ pci_write_config_byte(pdev, 0x64 + 4*ap->port_no + slave,
+ (cs5520_pio_clocks[pio].recovery << 4) |
+ (cs5520_pio_clocks[pio].assert));
+ /* Write command timing */
+ pci_write_config_byte(pdev, 0x66 + 4*ap->port_no + slave,
+ (cs5520_pio_clocks[pio].recovery << 4) |
+ (cs5520_pio_clocks[pio].assert));
+}
+
+/**
+ * cs5520_set_piomode - program PIO timings
+ * @ap: ATA port
+ * @adev: ATA device
+ *
+ * Program the PIO mode timings for the controller according to the pio
+ * clocking table.
+ */
+
+static void cs5520_set_piomode(struct ata_port *ap, struct ata_device *adev)
+{
+ cs5520_set_timings(ap, adev, adev->pio_mode);
+}
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 43/68] cs5520: convert to ide2libata
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (41 preceding siblings ...)
2010-01-29 16:07 ` [PATCH 42/68] pata_cs5520: move code to be re-used by ide2libata to pata_cs5520.h Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:07 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:07 ` [PATCH 44/68] pata_cs5530: move code to be re-used by ide2libata to pata_cs5530.h Bartlomiej Zolnierkiewicz
` (25 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:07 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] cs5520: convert to ide2libata
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ide/cs5520.c | 44 ++++----------------------------------------
1 file changed, 4 insertions(+), 40 deletions(-)
Index: b/drivers/ide/cs5520.c
===================================================================
--- a/drivers/ide/cs5520.c
+++ b/drivers/ide/cs5520.c
@@ -42,55 +42,19 @@
#define DRV_NAME "cs5520"
-struct pio_clocks
-{
- int address;
- int assert;
- int recovery;
-};
-
-static struct pio_clocks cs5520_pio_clocks[]={
- {3, 6, 11},
- {2, 5, 6},
- {1, 4, 3},
- {1, 3, 2},
- {1, 2, 1}
-};
-
-static void cs5520_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
-{
- struct pci_dev *pdev = to_pci_dev(hwif->dev);
- int controller = drive->dn > 1 ? 1 : 0;
- const u8 pio = drive->pio_mode - XFER_PIO_0;
-
- /* 8bit CAT/CRT - 8bit command timing for channel */
- pci_write_config_byte(pdev, 0x62 + controller,
- (cs5520_pio_clocks[pio].recovery << 4) |
- (cs5520_pio_clocks[pio].assert));
-
- /* 0x64 - 16bit Primary, 0x68 - 16bit Secondary */
-
- /* FIXME: should these use address ? */
- /* Data read timing */
- pci_write_config_byte(pdev, 0x64 + 4*controller + (drive->dn&1),
- (cs5520_pio_clocks[pio].recovery << 4) |
- (cs5520_pio_clocks[pio].assert));
- /* Write command timing */
- pci_write_config_byte(pdev, 0x66 + 4*controller + (drive->dn&1),
- (cs5520_pio_clocks[pio].recovery << 4) |
- (cs5520_pio_clocks[pio].assert));
-}
+#include <linux/ide2libata.h>
+#include "../ata/pata_cs5520.h"
static void cs5520_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
printk(KERN_ERR "cs55x0: bad ide timing.\n");
drive->pio_mode = XFER_PIO_0 + 0;
- cs5520_set_pio_mode(hwif, drive);
+ cs5520_set_piomode(hwif, drive);
}
static const struct ide_port_ops cs5520_port_ops = {
- .set_pio_mode = cs5520_set_pio_mode,
+ .set_pio_mode = cs5520_set_piomode,
.set_dma_mode = cs5520_set_dma_mode,
};
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 44/68] pata_cs5530: move code to be re-used by ide2libata to pata_cs5530.h
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (42 preceding siblings ...)
2010-01-29 16:07 ` [PATCH 43/68] cs5520: convert to ide2libata Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:07 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:07 ` [PATCH 45/68] cs5530: convert to ide2libata Bartlomiej Zolnierkiewicz
` (24 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:07 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] pata_cs5530: move code to be re-used by ide2libata to pata_cs5530.h
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ata/pata_cs5530.c | 178 --------------------------------------------
drivers/ata/pata_cs5530.h | 183 ++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 184 insertions(+), 177 deletions(-)
Index: b/drivers/ata/pata_cs5530.c
===================================================================
--- a/drivers/ata/pata_cs5530.c
+++ b/drivers/ata/pata_cs5530.c
@@ -43,93 +43,7 @@ static void __iomem *cs5530_port_base(st
return (void __iomem *)((bmdma & ~0x0F) + 0x20 + 0x10 * ap->port_no);
}
-/**
- * cs5530_set_piomode - PIO setup
- * @ap: ATA interface
- * @adev: device on the interface
- *
- * Set our PIO requirements. This is fairly simple on the CS5530
- * chips.
- */
-
-static void cs5530_set_piomode(struct ata_port *ap, struct ata_device *adev)
-{
- static const unsigned int cs5530_pio_timings[2][5] = {
- {0x00009172, 0x00012171, 0x00020080, 0x00032010, 0x00040010},
- {0xd1329172, 0x71212171, 0x30200080, 0x20102010, 0x00100010}
- };
- void __iomem *base = cs5530_port_base(ap);
- u32 tuning;
- int format;
-
- /* Find out which table to use */
- tuning = ioread32(base + 0x04);
- format = (tuning & 0x80000000UL) ? 1 : 0;
-
- /* Now load the right timing register */
- if (adev->devno)
- base += 0x08;
-
- iowrite32(cs5530_pio_timings[format][adev->pio_mode - XFER_PIO_0], base);
-}
-
-/**
- * cs5530_set_dmamode - DMA timing setup
- * @ap: ATA interface
- * @adev: Device being configured
- *
- * We cannot mix MWDMA and UDMA without reloading timings each switch
- * master to slave. We track the last DMA setup in order to minimise
- * reloads.
- */
-
-static void cs5530_set_dmamode(struct ata_port *ap, struct ata_device *adev)
-{
- void __iomem *base = cs5530_port_base(ap);
- u32 tuning, timing = 0;
- u8 reg;
-
- /* Find out which table to use */
- tuning = ioread32(base + 0x04);
-
- switch(adev->dma_mode) {
- case XFER_UDMA_0:
- timing = 0x00921250;break;
- case XFER_UDMA_1:
- timing = 0x00911140;break;
- case XFER_UDMA_2:
- timing = 0x00911030;break;
- case XFER_MW_DMA_0:
- timing = 0x00077771;break;
- case XFER_MW_DMA_1:
- timing = 0x00012121;break;
- case XFER_MW_DMA_2:
- timing = 0x00002020;break;
- default:
- BUG();
- }
- /* Merge in the PIO format bit */
- timing |= (tuning & 0x80000000UL);
- if (adev->devno == 0) /* Master */
- iowrite32(timing, base + 0x04);
- else {
- if (timing & 0x00100000)
- tuning |= 0x00100000; /* UDMA for both */
- else
- tuning &= ~0x00100000; /* MWDMA for both */
- iowrite32(tuning, base + 0x04);
- iowrite32(timing, base + 0x0C);
- }
-
- /* Set the DMA capable bit in the BMDMA area */
- reg = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
- reg |= (1 << (5 + adev->devno));
- iowrite8(reg, ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
-
- /* Remember the last DMA setup we did */
-
- ap->private_data = adev;
-}
+#include "pata_cs5530.h"
/**
* cs5530_qc_issue - command issue
@@ -195,96 +109,6 @@ static int cs5530_is_palmax(void)
return 0;
}
-
-/**
- * cs5530_init_chip - Chipset init
- * @gendev: device
- *
- * Perform the chip initialisation work that is shared between both
- * setup and resume paths
- */
-
-static int cs5530_init_chip(struct device *gendev)
-{
- struct pci_dev *master_0 = NULL, *cs5530_0 = NULL, *dev = NULL;
-
- while ((dev = pci_get_device(PCI_VENDOR_ID_CYRIX, PCI_ANY_ID, dev)) != NULL) {
- switch (dev->device) {
- case PCI_DEVICE_ID_CYRIX_PCI_MASTER:
- master_0 = pci_dev_get(dev);
- break;
- case PCI_DEVICE_ID_CYRIX_5530_LEGACY:
- cs5530_0 = pci_dev_get(dev);
- break;
- }
- }
- if (!master_0) {
- printk(KERN_ERR DRV_NAME ": unable to locate PCI MASTER function\n");
- goto fail_put;
- }
- if (!cs5530_0) {
- printk(KERN_ERR DRV_NAME ": unable to locate CS5530 LEGACY function\n");
- goto fail_put;
- }
-
- pci_set_master(cs5530_0);
- pci_try_set_mwi(cs5530_0);
-
- /*
- * Set PCI CacheLineSize to 16-bytes:
- * --> Write 0x04 into 8-bit PCI CACHELINESIZE reg of function 0 of the cs5530
- *
- * Note: This value is constant because the 5530 is only a Geode companion
- */
-
- pci_write_config_byte(cs5530_0, PCI_CACHE_LINE_SIZE, 0x04);
-
- /*
- * Disable trapping of UDMA register accesses (Win98 hack):
- * --> Write 0x5006 into 16-bit reg at offset 0xd0 of function 0 of the cs5530
- */
-
- pci_write_config_word(cs5530_0, 0xd0, 0x5006);
-
- /*
- * Bit-1 at 0x40 enables MemoryWriteAndInvalidate on internal X-bus:
- * The other settings are what is necessary to get the register
- * into a sane state for IDE DMA operation.
- */
-
- pci_write_config_byte(master_0, 0x40, 0x1e);
-
- /*
- * Set max PCI burst size (16-bytes seems to work best):
- * 16bytes: set bit-1 at 0x41 (reg value of 0x16)
- * all others: clear bit-1 at 0x41, and do:
- * 128bytes: OR 0x00 at 0x41
- * 256bytes: OR 0x04 at 0x41
- * 512bytes: OR 0x08 at 0x41
- * 1024bytes: OR 0x0c at 0x41
- */
-
- pci_write_config_byte(master_0, 0x41, 0x14);
-
- /*
- * These settings are necessary to get the chip
- * into a sane state for IDE DMA operation.
- */
-
- pci_write_config_byte(master_0, 0x42, 0x00);
- pci_write_config_byte(master_0, 0x43, 0xc1);
-
- pci_dev_put(master_0);
- pci_dev_put(cs5530_0);
- return 0;
-fail_put:
- if (master_0)
- pci_dev_put(master_0);
- if (cs5530_0)
- pci_dev_put(cs5530_0);
- return -EIO;
-}
-
/**
* cs5530_init_one - Initialise a CS5530
* @dev: PCI device
Index: b/drivers/ata/pata_cs5530.h
===================================================================
--- /dev/null
+++ b/drivers/ata/pata_cs5530.h
@@ -0,0 +1,183 @@
+
+/**
+ * cs5530_set_piomode - PIO setup
+ * @ap: ATA interface
+ * @adev: device on the interface
+ *
+ * Set our PIO requirements. This is fairly simple on the CS5530
+ * chips.
+ */
+
+static void cs5530_set_piomode(struct ata_port *ap, struct ata_device *adev)
+{
+ static const unsigned int cs5530_pio_timings[2][5] = {
+ {0x00009172, 0x00012171, 0x00020080, 0x00032010, 0x00040010},
+ {0xd1329172, 0x71212171, 0x30200080, 0x20102010, 0x00100010}
+ };
+ void __iomem *base = cs5530_port_base(ap);
+ u32 tuning;
+ int format;
+
+ /* Find out which table to use */
+ tuning = ioread32(base + 0x04);
+ format = (tuning & 0x80000000UL) ? 1 : 0;
+
+ /* Now load the right timing register */
+ if (adev->devno)
+ base += 0x08;
+
+ iowrite32(cs5530_pio_timings[format][adev->pio_mode - XFER_PIO_0],
+ base);
+}
+
+/**
+ * cs5530_set_dmamode - DMA timing setup
+ * @ap: ATA interface
+ * @adev: Device being configured
+ *
+ * We cannot mix MWDMA and UDMA without reloading timings each switch
+ * master to slave. We track the last DMA setup in order to minimise
+ * reloads.
+ */
+
+static void cs5530_set_dmamode(struct ata_port *ap, struct ata_device *adev)
+{
+ void __iomem *base = cs5530_port_base(ap);
+ u32 tuning, timing = 0;
+ u8 reg;
+
+ /* Find out which table to use */
+ tuning = ioread32(base + 0x04);
+
+ switch (adev->dma_mode) {
+ case XFER_UDMA_0:
+ timing = 0x00921250; break;
+ case XFER_UDMA_1:
+ timing = 0x00911140; break;
+ case XFER_UDMA_2:
+ timing = 0x00911030; break;
+ case XFER_MW_DMA_0:
+ timing = 0x00077771; break;
+ case XFER_MW_DMA_1:
+ timing = 0x00012121; break;
+ case XFER_MW_DMA_2:
+ timing = 0x00002020; break;
+ default:
+ BUG();
+ }
+ /* Merge in the PIO format bit */
+ timing |= (tuning & 0x80000000UL);
+ if (adev->devno == 0) /* Master */
+ iowrite32(timing, base + 0x04);
+ else {
+ if (timing & 0x00100000)
+ tuning |= 0x00100000; /* UDMA for both */
+ else
+ tuning &= ~0x00100000; /* MWDMA for both */
+ iowrite32(tuning, base + 0x04);
+ iowrite32(timing, base + 0x0C);
+ }
+
+ /* Set the DMA capable bit in the BMDMA area */
+ reg = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
+ reg |= (1 << (5 + adev->devno));
+ iowrite8(reg, ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
+
+ /* Remember the last DMA setup we did */
+
+ ap->private_data = adev;
+}
+
+
+/**
+ * cs5530_init_chip - Chipset init
+ * @gendev: device
+ *
+ * Perform the chip initialisation work that is shared between both
+ * setup and resume paths
+ */
+
+static int cs5530_init_chip(struct device *gendev)
+{
+ struct pci_dev *master_0 = NULL, *cs5530_0 = NULL, *dev = NULL;
+
+ while ((dev = pci_get_device(PCI_VENDOR_ID_CYRIX,
+ PCI_ANY_ID, dev)) != NULL) {
+ switch (dev->device) {
+ case PCI_DEVICE_ID_CYRIX_PCI_MASTER:
+ master_0 = pci_dev_get(dev);
+ break;
+ case PCI_DEVICE_ID_CYRIX_5530_LEGACY:
+ cs5530_0 = pci_dev_get(dev);
+ break;
+ }
+ }
+ if (!master_0) {
+ printk(KERN_ERR DRV_NAME
+ ": unable to locate PCI MASTER function\n");
+ goto fail_put;
+ }
+ if (!cs5530_0) {
+ printk(KERN_ERR DRV_NAME
+ ": unable to locate CS5530 LEGACY function\n");
+ goto fail_put;
+ }
+
+ pci_set_master(cs5530_0);
+ pci_try_set_mwi(cs5530_0);
+
+ /*
+ * Set PCI CacheLineSize to 16-bytes:
+ * --> Write 0x04 into 8-bit PCI CACHELINESIZE reg of function 0
+ *
+ * Note:
+ * This value is constant because the 5530 is only a Geode companion
+ */
+
+ pci_write_config_byte(cs5530_0, PCI_CACHE_LINE_SIZE, 0x04);
+
+ /*
+ * Disable trapping of UDMA register accesses (Win98 hack):
+ * --> Write 0x5006 into 16-bit reg at offset 0xd0 of function 0
+ */
+
+ pci_write_config_word(cs5530_0, 0xd0, 0x5006);
+
+ /*
+ * Bit-1 at 0x40 enables MemoryWriteAndInvalidate on internal X-bus:
+ * The other settings are what is necessary to get the register
+ * into a sane state for IDE DMA operation.
+ */
+
+ pci_write_config_byte(master_0, 0x40, 0x1e);
+
+ /*
+ * Set max PCI burst size (16-bytes seems to work best):
+ * 16bytes: set bit-1 at 0x41 (reg value of 0x16)
+ * all others: clear bit-1 at 0x41, and do:
+ * 128bytes: OR 0x00 at 0x41
+ * 256bytes: OR 0x04 at 0x41
+ * 512bytes: OR 0x08 at 0x41
+ * 1024bytes: OR 0x0c at 0x41
+ */
+
+ pci_write_config_byte(master_0, 0x41, 0x14);
+
+ /*
+ * These settings are necessary to get the chip
+ * into a sane state for IDE DMA operation.
+ */
+
+ pci_write_config_byte(master_0, 0x42, 0x00);
+ pci_write_config_byte(master_0, 0x43, 0xc1);
+
+ pci_dev_put(master_0);
+ pci_dev_put(cs5530_0);
+ return 0;
+fail_put:
+ if (master_0)
+ pci_dev_put(master_0);
+ if (cs5530_0)
+ pci_dev_put(cs5530_0);
+ return -EIO;
+}
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 45/68] cs5530: convert to ide2libata
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (43 preceding siblings ...)
2010-01-29 16:07 ` [PATCH 44/68] pata_cs5530: move code to be re-used by ide2libata to pata_cs5530.h Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:07 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:08 ` [PATCH 46/68] pata_cs5535: move code to be re-used by ide2libata to pata_cs5535.h Bartlomiej Zolnierkiewicz
` (23 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:07 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] cs5530: convert to ide2libata
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ata/pata_cs5530.h | 16 ++--
drivers/ide/cs5530.c | 149 ++++------------------------------------------
2 files changed, 25 insertions(+), 140 deletions(-)
Index: b/drivers/ata/pata_cs5530.h
===================================================================
--- a/drivers/ata/pata_cs5530.h
+++ b/drivers/ata/pata_cs5530.h
@@ -1,4 +1,9 @@
+static const unsigned int cs5530_pio_timings[2][5] = {
+ {0x00009172, 0x00012171, 0x00020080, 0x00032010, 0x00040010},
+ {0xd1329172, 0x71212171, 0x30200080, 0x20102010, 0x00100010}
+};
+
/**
* cs5530_set_piomode - PIO setup
* @ap: ATA interface
@@ -10,10 +15,6 @@
static void cs5530_set_piomode(struct ata_port *ap, struct ata_device *adev)
{
- static const unsigned int cs5530_pio_timings[2][5] = {
- {0x00009172, 0x00012171, 0x00020080, 0x00032010, 0x00040010},
- {0xd1329172, 0x71212171, 0x30200080, 0x20102010, 0x00100010}
- };
void __iomem *base = cs5530_port_base(ap);
u32 tuning;
int format;
@@ -44,8 +45,9 @@ static void cs5530_set_dmamode(struct at
{
void __iomem *base = cs5530_port_base(ap);
u32 tuning, timing = 0;
+#ifndef __IDE2LIBATA
u8 reg;
-
+#endif
/* Find out which table to use */
tuning = ioread32(base + 0x04);
@@ -77,15 +79,15 @@ static void cs5530_set_dmamode(struct at
iowrite32(tuning, base + 0x04);
iowrite32(timing, base + 0x0C);
}
-
+#ifndef __IDE2LIBATA
/* Set the DMA capable bit in the BMDMA area */
reg = ioread8(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
reg |= (1 << (5 + adev->devno));
iowrite8(reg, ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
/* Remember the last DMA setup we did */
-
ap->private_data = adev;
+#endif
}
Index: b/drivers/ide/cs5530.c
===================================================================
--- a/drivers/ide/cs5530.c
+++ b/drivers/ide/cs5530.c
@@ -23,15 +23,19 @@
#define DRV_NAME "cs5530"
-/*
- * Here are the standard PIO mode 0-4 timings for each "format".
- * Format-0 uses fast data reg timings, with slower command reg timings.
- * Format-1 uses fast timings for all registers, but won't work with all drives.
- */
-static unsigned int cs5530_pio_timings[2][5] = {
- {0x00009172, 0x00012171, 0x00020080, 0x00032010, 0x00040010},
- {0xd1329172, 0x71212171, 0x30200080, 0x20102010, 0x00100010}
-};
+static void __iomem *cs5530_port_base(ide_hwif_t *hwif)
+{
+ unsigned long bmdma = hwif->dma_base;
+
+ return (void __iomem *)((bmdma & ~0x0F) + 0x20 + 0x10 * hwif->port_no);
+}
+
+#include <linux/ide2libata.h>
+#define ioread32(p) inl((unsigned long)p)
+#define iowrite32(v, p) outl(v, (unsigned long)p)
+#include "../ata/pata_cs5530.h"
+#undef iowrite32
+#undef ioread32
/*
* After chip reset, the PIO timings are set to 0x0000e132, which is not valid.
@@ -40,26 +44,6 @@ static unsigned int cs5530_pio_timings[2
#define CS5530_BASEREG(hwif) (((hwif)->dma_base & ~0xf) + ((hwif)->channel ? 0x30 : 0x20))
/**
- * cs5530_set_pio_mode - set host controller for PIO mode
- * @hwif: port
- * @drive: drive
- *
- * Handles setting of PIO mode for the chipset.
- *
- * The init_hwif_cs5530() routine guarantees that all drives
- * will have valid default PIO timings set up before we get here.
- */
-
-static void cs5530_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
-{
- unsigned long basereg = CS5530_BASEREG(hwif);
- unsigned int format = (inl(basereg + 4) >> 31) & 1;
- const u8 pio = drive->pio_mode - XFER_PIO_0;
-
- outl(cs5530_pio_timings[format][pio], basereg + ((drive->dn & 1)<<3));
-}
-
-/**
* cs5530_udma_filter - UDMA filter
* @drive: drive
*
@@ -100,34 +84,6 @@ out:
return mask;
}
-static void cs5530_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
-{
- unsigned long basereg;
- unsigned int reg, timings = 0;
-
- switch (drive->dma_mode) {
- case XFER_UDMA_0: timings = 0x00921250; break;
- case XFER_UDMA_1: timings = 0x00911140; break;
- case XFER_UDMA_2: timings = 0x00911030; break;
- case XFER_MW_DMA_0: timings = 0x00077771; break;
- case XFER_MW_DMA_1: timings = 0x00012121; break;
- case XFER_MW_DMA_2: timings = 0x00002020; break;
- }
- basereg = CS5530_BASEREG(hwif);
- reg = inl(basereg + 4); /* get drive0 config register */
- timings |= reg & 0x80000000; /* preserve PIO format bit */
- if ((drive-> dn & 1) == 0) { /* are we configuring drive0? */
- outl(timings, basereg + 4); /* write drive0 config register */
- } else {
- if (timings & 0x00100000)
- reg |= 0x00100000; /* enable UDMA timings for both drives */
- else
- reg &= ~0x00100000; /* disable UDMA timings for both drives */
- outl(reg, basereg + 4); /* write drive0 config register */
- outl(timings, basereg + 12); /* write drive1 config register */
- }
-}
-
/**
* init_chipset_5530 - set up 5530 bridge
* @dev: PCI device
@@ -137,84 +93,11 @@ static void cs5530_set_dma_mode(ide_hwif
static int init_chipset_cs5530(struct pci_dev *dev)
{
- struct pci_dev *master_0 = NULL, *cs5530_0 = NULL;
-
if (pci_resource_start(dev, 4) == 0)
return -EFAULT;
- dev = NULL;
- while ((dev = pci_get_device(PCI_VENDOR_ID_CYRIX, PCI_ANY_ID, dev)) != NULL) {
- switch (dev->device) {
- case PCI_DEVICE_ID_CYRIX_PCI_MASTER:
- master_0 = pci_dev_get(dev);
- break;
- case PCI_DEVICE_ID_CYRIX_5530_LEGACY:
- cs5530_0 = pci_dev_get(dev);
- break;
- }
- }
- if (!master_0) {
- printk(KERN_ERR DRV_NAME ": unable to locate PCI MASTER function\n");
- goto out;
- }
- if (!cs5530_0) {
- printk(KERN_ERR DRV_NAME ": unable to locate CS5530 LEGACY function\n");
- goto out;
- }
-
- /*
- * Enable BusMaster and MemoryWriteAndInvalidate for the cs5530:
- * --> OR 0x14 into 16-bit PCI COMMAND reg of function 0 of the cs5530
- */
-
- pci_set_master(cs5530_0);
- pci_try_set_mwi(cs5530_0);
-
- /*
- * Set PCI CacheLineSize to 16-bytes:
- * --> Write 0x04 into 8-bit PCI CACHELINESIZE reg of function 0 of the cs5530
- */
-
- pci_write_config_byte(cs5530_0, PCI_CACHE_LINE_SIZE, 0x04);
-
- /*
- * Disable trapping of UDMA register accesses (Win98 hack):
- * --> Write 0x5006 into 16-bit reg at offset 0xd0 of function 0 of the cs5530
- */
-
- pci_write_config_word(cs5530_0, 0xd0, 0x5006);
-
- /*
- * Bit-1 at 0x40 enables MemoryWriteAndInvalidate on internal X-bus:
- * The other settings are what is necessary to get the register
- * into a sane state for IDE DMA operation.
- */
-
- pci_write_config_byte(master_0, 0x40, 0x1e);
-
- /*
- * Set max PCI burst size (16-bytes seems to work best):
- * 16bytes: set bit-1 at 0x41 (reg value of 0x16)
- * all others: clear bit-1 at 0x41, and do:
- * 128bytes: OR 0x00 at 0x41
- * 256bytes: OR 0x04 at 0x41
- * 512bytes: OR 0x08 at 0x41
- * 1024bytes: OR 0x0c at 0x41
- */
-
- pci_write_config_byte(master_0, 0x41, 0x14);
-
- /*
- * These settings are necessary to get the chip
- * into a sane state for IDE DMA operation.
- */
+ (void)cs5530_init_chip(&dev->dev);
- pci_write_config_byte(master_0, 0x42, 0x00);
- pci_write_config_byte(master_0, 0x43, 0xc1);
-
-out:
- pci_dev_put(master_0);
- pci_dev_put(cs5530_0);
return 0;
}
@@ -240,8 +123,8 @@ static void __devinit init_hwif_cs5530 (
}
static const struct ide_port_ops cs5530_port_ops = {
- .set_pio_mode = cs5530_set_pio_mode,
- .set_dma_mode = cs5530_set_dma_mode,
+ .set_pio_mode = cs5530_set_piomode,
+ .set_dma_mode = cs5530_set_dmamode,
.udma_filter = cs5530_udma_filter,
};
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 46/68] pata_cs5535: move code to be re-used by ide2libata to pata_cs5535.h
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (44 preceding siblings ...)
2010-01-29 16:07 ` [PATCH 45/68] cs5530: convert to ide2libata Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:08 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:08 ` [PATCH 47/68] cs5535: convert to ide2libata Bartlomiej Zolnierkiewicz
` (22 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:08 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] pata_cs5535: move code to be re-used by ide2libata to pata_cs5535.h
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ata/pata_cs5535.c | 113 ---------------------------------------------
drivers/ata/pata_cs5535.h | 114 ++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 115 insertions(+), 112 deletions(-)
Index: b/drivers/ata/pata_cs5535.c
===================================================================
--- a/drivers/ata/pata_cs5535.c
+++ b/drivers/ata/pata_cs5535.c
@@ -41,118 +41,7 @@
#define DRV_NAME "cs5535"
#define DRV_VERSION "0.2.12"
-/*
- * The Geode (Aka Athlon GX now) uses an internal MSR based
- * bus system for control. Demented but there you go.
- */
-
-#define MSR_ATAC_BASE 0x51300000
-#define ATAC_GLD_MSR_CAP (MSR_ATAC_BASE+0)
-#define ATAC_GLD_MSR_CONFIG (MSR_ATAC_BASE+0x01)
-#define ATAC_GLD_MSR_SMI (MSR_ATAC_BASE+0x02)
-#define ATAC_GLD_MSR_ERROR (MSR_ATAC_BASE+0x03)
-#define ATAC_GLD_MSR_PM (MSR_ATAC_BASE+0x04)
-#define ATAC_GLD_MSR_DIAG (MSR_ATAC_BASE+0x05)
-#define ATAC_IO_BAR (MSR_ATAC_BASE+0x08)
-#define ATAC_RESET (MSR_ATAC_BASE+0x10)
-#define ATAC_CH0D0_PIO (MSR_ATAC_BASE+0x20)
-#define ATAC_CH0D0_DMA (MSR_ATAC_BASE+0x21)
-#define ATAC_CH0D1_PIO (MSR_ATAC_BASE+0x22)
-#define ATAC_CH0D1_DMA (MSR_ATAC_BASE+0x23)
-#define ATAC_PCI_ABRTERR (MSR_ATAC_BASE+0x24)
-
-#define ATAC_BM0_CMD_PRIM 0x00
-#define ATAC_BM0_STS_PRIM 0x02
-#define ATAC_BM0_PRD 0x04
-
-#define CS5535_CABLE_DETECT 0x48
-
-/**
- * cs5535_cable_detect - detect cable type
- * @ap: Port to detect on
- *
- * Perform cable detection for ATA66 capable cable. Return a libata
- * cable type.
- */
-
-static int cs5535_cable_detect(struct ata_port *ap)
-{
- u8 cable;
- struct pci_dev *pdev = to_pci_dev(ap->host->dev);
-
- pci_read_config_byte(pdev, CS5535_CABLE_DETECT, &cable);
- if (cable & 1)
- return ATA_CBL_PATA80;
- else
- return ATA_CBL_PATA40;
-}
-
-/**
- * cs5535_set_piomode - PIO setup
- * @ap: ATA interface
- * @adev: device on the interface
- *
- * Set our PIO requirements. The CS5535 is pretty clean about all this
- */
-
-static void cs5535_set_piomode(struct ata_port *ap, struct ata_device *adev)
-{
- static const u16 pio_timings[5] = {
- 0xF7F4, 0xF173, 0x8141, 0x5131, 0x1131
- };
- static const u16 pio_cmd_timings[5] = {
- 0xF7F4, 0x53F3, 0x13F1, 0x5131, 0x1131
- };
- u32 reg, dummy;
- struct ata_device *pair = ata_dev_pair(adev);
-
- int mode = adev->pio_mode - XFER_PIO_0;
- int cmdmode = mode;
-
- /* Command timing has to be for the lowest of the pair of devices */
- if (pair) {
- int pairmode = pair->pio_mode - XFER_PIO_0;
- cmdmode = min(mode, pairmode);
- /* Write the other drive timing register if it changed */
- if (cmdmode < pairmode)
- wrmsr(ATAC_CH0D0_PIO + 2 * pair->devno,
- pio_cmd_timings[cmdmode] << 16 | pio_timings[pairmode], 0);
- }
- /* Write the drive timing register */
- wrmsr(ATAC_CH0D0_PIO + 2 * adev->devno,
- pio_cmd_timings[cmdmode] << 16 | pio_timings[mode], 0);
-
- /* Set the PIO "format 1" bit in the DMA timing register */
- rdmsr(ATAC_CH0D0_DMA + 2 * adev->devno, reg, dummy);
- wrmsr(ATAC_CH0D0_DMA + 2 * adev->devno, reg | 0x80000000UL, 0);
-}
-
-/**
- * cs5535_set_dmamode - DMA timing setup
- * @ap: ATA interface
- * @adev: Device being configured
- *
- */
-
-static void cs5535_set_dmamode(struct ata_port *ap, struct ata_device *adev)
-{
- static const u32 udma_timings[5] = {
- 0x7F7436A1, 0x7F733481, 0x7F723261, 0x7F713161, 0x7F703061
- };
- static const u32 mwdma_timings[3] = {
- 0x7F0FFFF3, 0x7F035352, 0x7F024241
- };
- u32 reg, dummy;
- int mode = adev->dma_mode;
-
- rdmsr(ATAC_CH0D0_DMA + 2 * adev->devno, reg, dummy);
- reg &= 0x80000000UL;
- if (mode >= XFER_UDMA_0)
- reg |= udma_timings[mode - XFER_UDMA_0];
- else
- reg |= mwdma_timings[mode - XFER_MW_DMA_0];
- wrmsr(ATAC_CH0D0_DMA + 2 * adev->devno, reg, 0);
-}
+#include "pata_cs5535.h"
static struct scsi_host_template cs5535_sht = {
ATA_BMDMA_SHT(DRV_NAME),
Index: b/drivers/ata/pata_cs5535.h
===================================================================
--- /dev/null
+++ b/drivers/ata/pata_cs5535.h
@@ -0,0 +1,114 @@
+
+/*
+ * The Geode (Aka Athlon GX now) uses an internal MSR based
+ * bus system for control. Demented but there you go.
+ */
+
+#define MSR_ATAC_BASE 0x51300000
+#define ATAC_GLD_MSR_CAP (MSR_ATAC_BASE+0)
+#define ATAC_GLD_MSR_CONFIG (MSR_ATAC_BASE+0x01)
+#define ATAC_GLD_MSR_SMI (MSR_ATAC_BASE+0x02)
+#define ATAC_GLD_MSR_ERROR (MSR_ATAC_BASE+0x03)
+#define ATAC_GLD_MSR_PM (MSR_ATAC_BASE+0x04)
+#define ATAC_GLD_MSR_DIAG (MSR_ATAC_BASE+0x05)
+#define ATAC_IO_BAR (MSR_ATAC_BASE+0x08)
+#define ATAC_RESET (MSR_ATAC_BASE+0x10)
+#define ATAC_CH0D0_PIO (MSR_ATAC_BASE+0x20)
+#define ATAC_CH0D0_DMA (MSR_ATAC_BASE+0x21)
+#define ATAC_CH0D1_PIO (MSR_ATAC_BASE+0x22)
+#define ATAC_CH0D1_DMA (MSR_ATAC_BASE+0x23)
+#define ATAC_PCI_ABRTERR (MSR_ATAC_BASE+0x24)
+
+#define ATAC_BM0_CMD_PRIM 0x00
+#define ATAC_BM0_STS_PRIM 0x02
+#define ATAC_BM0_PRD 0x04
+
+#define CS5535_CABLE_DETECT 0x48
+
+/**
+ * cs5535_cable_detect - detect cable type
+ * @ap: Port to detect on
+ *
+ * Perform cable detection for ATA66 capable cable. Return a libata
+ * cable type.
+ */
+
+static int cs5535_cable_detect(struct ata_port *ap)
+{
+ u8 cable;
+ struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+
+ pci_read_config_byte(pdev, CS5535_CABLE_DETECT, &cable);
+ if (cable & 1)
+ return ATA_CBL_PATA80;
+ else
+ return ATA_CBL_PATA40;
+}
+
+/**
+ * cs5535_set_piomode - PIO setup
+ * @ap: ATA interface
+ * @adev: device on the interface
+ *
+ * Set our PIO requirements. The CS5535 is pretty clean about all this
+ */
+
+static void cs5535_set_piomode(struct ata_port *ap, struct ata_device *adev)
+{
+ static const u16 pio_timings[5] = {
+ 0xF7F4, 0xF173, 0x8141, 0x5131, 0x1131
+ };
+ static const u16 pio_cmd_timings[5] = {
+ 0xF7F4, 0x53F3, 0x13F1, 0x5131, 0x1131
+ };
+ u32 reg, dummy;
+ struct ata_device *pair = ata_dev_pair(adev);
+
+ int mode = adev->pio_mode - XFER_PIO_0;
+ int cmdmode = mode;
+
+ /* Command timing has to be for the lowest of the pair of devices */
+ if (pair) {
+ int pairmode = pair->pio_mode - XFER_PIO_0;
+ cmdmode = min(mode, pairmode);
+ /* Write the other drive timing register if it changed */
+ if (cmdmode < pairmode)
+ wrmsr(ATAC_CH0D0_PIO + 2 * pair->devno,
+ pio_cmd_timings[cmdmode] << 16 |
+ pio_timings[pairmode], 0);
+ }
+ /* Write the drive timing register */
+ wrmsr(ATAC_CH0D0_PIO + 2 * adev->devno,
+ pio_cmd_timings[cmdmode] << 16 | pio_timings[mode], 0);
+
+ /* Set the PIO "format 1" bit in the DMA timing register */
+ rdmsr(ATAC_CH0D0_DMA + 2 * adev->devno, reg, dummy);
+ wrmsr(ATAC_CH0D0_DMA + 2 * adev->devno, reg | 0x80000000UL, 0);
+}
+
+/**
+ * cs5535_set_dmamode - DMA timing setup
+ * @ap: ATA interface
+ * @adev: Device being configured
+ *
+ */
+
+static void cs5535_set_dmamode(struct ata_port *ap, struct ata_device *adev)
+{
+ static const u32 udma_timings[5] = {
+ 0x7F7436A1, 0x7F733481, 0x7F723261, 0x7F713161, 0x7F703061
+ };
+ static const u32 mwdma_timings[3] = {
+ 0x7F0FFFF3, 0x7F035352, 0x7F024241
+ };
+ u32 reg, dummy;
+ int mode = adev->dma_mode;
+
+ rdmsr(ATAC_CH0D0_DMA + 2 * adev->devno, reg, dummy);
+ reg &= 0x80000000UL;
+ if (mode >= XFER_UDMA_0)
+ reg |= udma_timings[mode - XFER_UDMA_0];
+ else
+ reg |= mwdma_timings[mode - XFER_MW_DMA_0];
+ wrmsr(ATAC_CH0D0_DMA + 2 * adev->devno, reg, 0);
+}
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 47/68] cs5535: convert to ide2libata
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (45 preceding siblings ...)
2010-01-29 16:08 ` [PATCH 46/68] pata_cs5535: move code to be re-used by ide2libata to pata_cs5535.h Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:08 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:08 ` [PATCH 48/68] pata_cypress: move code to be re-used by ide2libata to pata_cypress.h Bartlomiej Zolnierkiewicz
` (21 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:08 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] cs5535: convert to ide2libata
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ide/cs5535.c | 141 +--------------------------------------------------
1 file changed, 4 insertions(+), 137 deletions(-)
Index: b/drivers/ide/cs5535.c
===================================================================
--- a/drivers/ide/cs5535.c
+++ b/drivers/ide/cs5535.c
@@ -28,145 +28,12 @@
#define DRV_NAME "cs5535"
-#define MSR_ATAC_BASE 0x51300000
-#define ATAC_GLD_MSR_CAP (MSR_ATAC_BASE+0)
-#define ATAC_GLD_MSR_CONFIG (MSR_ATAC_BASE+0x01)
-#define ATAC_GLD_MSR_SMI (MSR_ATAC_BASE+0x02)
-#define ATAC_GLD_MSR_ERROR (MSR_ATAC_BASE+0x03)
-#define ATAC_GLD_MSR_PM (MSR_ATAC_BASE+0x04)
-#define ATAC_GLD_MSR_DIAG (MSR_ATAC_BASE+0x05)
-#define ATAC_IO_BAR (MSR_ATAC_BASE+0x08)
-#define ATAC_RESET (MSR_ATAC_BASE+0x10)
-#define ATAC_CH0D0_PIO (MSR_ATAC_BASE+0x20)
-#define ATAC_CH0D0_DMA (MSR_ATAC_BASE+0x21)
-#define ATAC_CH0D1_PIO (MSR_ATAC_BASE+0x22)
-#define ATAC_CH0D1_DMA (MSR_ATAC_BASE+0x23)
-#define ATAC_PCI_ABRTERR (MSR_ATAC_BASE+0x24)
-#define ATAC_BM0_CMD_PRIM 0x00
-#define ATAC_BM0_STS_PRIM 0x02
-#define ATAC_BM0_PRD 0x04
-#define CS5535_CABLE_DETECT 0x48
-
-/* Format I PIO settings. We separate out cmd and data for safer timings */
-
-static unsigned int cs5535_pio_cmd_timings[5] =
-{ 0xF7F4, 0x53F3, 0x13F1, 0x5131, 0x1131 };
-static unsigned int cs5535_pio_dta_timings[5] =
-{ 0xF7F4, 0xF173, 0x8141, 0x5131, 0x1131 };
-
-static unsigned int cs5535_mwdma_timings[3] =
-{ 0x7F0FFFF3, 0x7F035352, 0x7f024241 };
-
-static unsigned int cs5535_udma_timings[5] =
-{ 0x7F7436A1, 0x7F733481, 0x7F723261, 0x7F713161, 0x7F703061 };
-
-/* Macros to check if the register is the reset value - reset value is an
- invalid timing and indicates the register has not been set previously */
-
-#define CS5535_BAD_PIO(timings) ( (timings&~0x80000000UL) == 0x00009172 )
-#define CS5535_BAD_DMA(timings) ( (timings & 0x000FFFFF) == 0x00077771 )
-
-/****
- * cs5535_set_speed - Configure the chipset to the new speed
- * @drive: Drive to set up
- * @speed: desired speed
- *
- * cs5535_set_speed() configures the chipset to a new speed.
- */
-static void cs5535_set_speed(ide_drive_t *drive, const u8 speed)
-{
- u32 reg = 0, dummy;
- u8 unit = drive->dn & 1;
-
- /* Set the PIO timings */
- if (speed < XFER_SW_DMA_0) {
- ide_drive_t *pair = ide_get_pair_dev(drive);
- u8 cmd, pioa;
-
- cmd = pioa = speed - XFER_PIO_0;
-
- if (pair) {
- u8 piob = pair->pio_mode - XFER_PIO_0;
-
- if (piob < cmd)
- cmd = piob;
- }
-
- /* Write the speed of the current drive */
- reg = (cs5535_pio_cmd_timings[cmd] << 16) |
- cs5535_pio_dta_timings[pioa];
- wrmsr(unit ? ATAC_CH0D1_PIO : ATAC_CH0D0_PIO, reg, 0);
-
- /* And if nessesary - change the speed of the other drive */
- rdmsr(unit ? ATAC_CH0D0_PIO : ATAC_CH0D1_PIO, reg, dummy);
-
- if (((reg >> 16) & cs5535_pio_cmd_timings[cmd]) !=
- cs5535_pio_cmd_timings[cmd]) {
- reg &= 0x0000FFFF;
- reg |= cs5535_pio_cmd_timings[cmd] << 16;
- wrmsr(unit ? ATAC_CH0D0_PIO : ATAC_CH0D1_PIO, reg, 0);
- }
-
- /* Set bit 31 of the DMA register for PIO format 1 timings */
- rdmsr(unit ? ATAC_CH0D1_DMA : ATAC_CH0D0_DMA, reg, dummy);
- wrmsr(unit ? ATAC_CH0D1_DMA : ATAC_CH0D0_DMA,
- reg | 0x80000000UL, 0);
- } else {
- rdmsr(unit ? ATAC_CH0D1_DMA : ATAC_CH0D0_DMA, reg, dummy);
-
- reg &= 0x80000000UL; /* Preserve the PIO format bit */
-
- if (speed >= XFER_UDMA_0 && speed <= XFER_UDMA_4)
- reg |= cs5535_udma_timings[speed - XFER_UDMA_0];
- else if (speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2)
- reg |= cs5535_mwdma_timings[speed - XFER_MW_DMA_0];
- else
- return;
-
- wrmsr(unit ? ATAC_CH0D1_DMA : ATAC_CH0D0_DMA, reg, 0);
- }
-}
-
-/**
- * cs5535_set_dma_mode - set host controller for DMA mode
- * @hwif: port
- * @drive: drive
- *
- * Programs the chipset for DMA mode.
- */
-
-static void cs5535_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
-{
- cs5535_set_speed(drive, drive->dma_mode);
-}
-
-/**
- * cs5535_set_pio_mode - set host controller for PIO mode
- * @hwif: port
- * @drive: drive
- *
- * A callback from the upper layers for PIO-only tuning.
- */
-
-static void cs5535_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
-{
- cs5535_set_speed(drive, drive->pio_mode);
-}
-
-static int cs5535_cable_detect(ide_hwif_t *hwif)
-{
- struct pci_dev *dev = to_pci_dev(hwif->dev);
- u8 bit;
-
- /* if a 80 wire cable was detected */
- pci_read_config_byte(dev, CS5535_CABLE_DETECT, &bit);
-
- return (bit & 1) ? ATA_CBL_PATA80 : ATA_CBL_PATA40;
-}
+#include <linux/ide2libata.h>
+#include "../ata/pata_cs5535.h"
static const struct ide_port_ops cs5535_port_ops = {
- .set_pio_mode = cs5535_set_pio_mode,
- .set_dma_mode = cs5535_set_dma_mode,
+ .set_pio_mode = cs5535_set_piomode,
+ .set_dma_mode = cs5535_set_dmamode,
.cable_detect = cs5535_cable_detect,
};
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 48/68] pata_cypress: move code to be re-used by ide2libata to pata_cypress.h
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (46 preceding siblings ...)
2010-01-29 16:08 ` [PATCH 47/68] cs5535: convert to ide2libata Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:08 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:08 ` [PATCH 49/68] cy82c693: convert to ide2libata Bartlomiej Zolnierkiewicz
` (20 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:08 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] pata_cypress: move code to be re-used by ide2libata to pata_cypress.h
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ata/pata_cypress.c | 88 ---------------------------------------------
drivers/ata/pata_cypress.h | 88 +++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 89 insertions(+), 87 deletions(-)
Index: b/drivers/ata/pata_cypress.c
===================================================================
--- a/drivers/ata/pata_cypress.c
+++ b/drivers/ata/pata_cypress.c
@@ -20,93 +20,7 @@
#define DRV_NAME "pata_cypress"
#define DRV_VERSION "0.1.5"
-/* here are the offset definitions for the registers */
-
-enum {
- CY82_IDE_CMDREG = 0x04,
- CY82_IDE_ADDRSETUP = 0x48,
- CY82_IDE_MASTER_IOR = 0x4C,
- CY82_IDE_MASTER_IOW = 0x4D,
- CY82_IDE_SLAVE_IOR = 0x4E,
- CY82_IDE_SLAVE_IOW = 0x4F,
- CY82_IDE_MASTER_8BIT = 0x50,
- CY82_IDE_SLAVE_8BIT = 0x51,
-
- CY82_INDEX_PORT = 0x22,
- CY82_DATA_PORT = 0x23,
-
- CY82_INDEX_CTRLREG1 = 0x01,
- CY82_INDEX_CHANNEL0 = 0x30,
- CY82_INDEX_CHANNEL1 = 0x31,
- CY82_INDEX_TIMEOUT = 0x32
-};
-
-/**
- * cy82c693_set_piomode - set initial PIO mode data
- * @ap: ATA interface
- * @adev: ATA device
- *
- * Called to do the PIO mode setup.
- */
-
-static void cy82c693_set_piomode(struct ata_port *ap, struct ata_device *adev)
-{
- struct pci_dev *pdev = to_pci_dev(ap->host->dev);
- struct ata_timing t;
- const unsigned long T = 1000000 / 33;
- short time_16, time_8;
- u32 addr;
-
- ata_timing_compute(adev->id, adev->pio_mode, adev->pio_mode, &t, T, 1);
-
- time_16 = clamp_val(t.recover - 1, 0, 15) |
- (clamp_val(t.active - 1, 0, 15) << 4);
- time_8 = clamp_val(t.act8b - 1, 0, 15) |
- (clamp_val(t.rec8b - 1, 0, 15) << 4);
-
- if (adev->devno == 0) {
- pci_read_config_dword(pdev, CY82_IDE_ADDRSETUP, &addr);
-
- addr &= ~0x0F; /* Mask bits */
- addr |= clamp_val(t.setup - 1, 0, 15);
-
- pci_write_config_dword(pdev, CY82_IDE_ADDRSETUP, addr);
- pci_write_config_byte(pdev, CY82_IDE_MASTER_IOR, time_16);
- pci_write_config_byte(pdev, CY82_IDE_MASTER_IOW, time_16);
- pci_write_config_byte(pdev, CY82_IDE_MASTER_8BIT, time_8);
- } else {
- pci_read_config_dword(pdev, CY82_IDE_ADDRSETUP, &addr);
-
- addr &= ~0xF0; /* Mask bits */
- addr |= (clamp_val(t.setup - 1, 0, 15) << 4);
-
- pci_write_config_dword(pdev, CY82_IDE_ADDRSETUP, addr);
- pci_write_config_byte(pdev, CY82_IDE_SLAVE_IOR, time_16);
- pci_write_config_byte(pdev, CY82_IDE_SLAVE_IOW, time_16);
- pci_write_config_byte(pdev, CY82_IDE_SLAVE_8BIT, time_8);
- }
-}
-
-/**
- * cy82c693_set_dmamode - set initial DMA mode data
- * @ap: ATA interface
- * @adev: ATA device
- *
- * Called to do the DMA mode setup.
- */
-
-static void cy82c693_set_dmamode(struct ata_port *ap, struct ata_device *adev)
-{
- int reg = CY82_INDEX_CHANNEL0 + ap->port_no;
-
- /* Be afraid, be very afraid. Magic registers in low I/O space */
- outb(reg, 0x22);
- outb(adev->dma_mode - XFER_MW_DMA_0, 0x23);
-
- /* 0x50 gives the best behaviour on the Alpha's using this chip */
- outb(CY82_INDEX_TIMEOUT, 0x22);
- outb(0x50, 0x23);
-}
+#include "pata_cypress.h"
static struct scsi_host_template cy82c693_sht = {
ATA_BMDMA_SHT(DRV_NAME),
Index: b/drivers/ata/pata_cypress.h
===================================================================
--- /dev/null
+++ b/drivers/ata/pata_cypress.h
@@ -0,0 +1,88 @@
+
+/* here are the offset definitions for the registers */
+
+enum {
+ CY82_IDE_CMDREG = 0x04,
+ CY82_IDE_ADDRSETUP = 0x48,
+ CY82_IDE_MASTER_IOR = 0x4C,
+ CY82_IDE_MASTER_IOW = 0x4D,
+ CY82_IDE_SLAVE_IOR = 0x4E,
+ CY82_IDE_SLAVE_IOW = 0x4F,
+ CY82_IDE_MASTER_8BIT = 0x50,
+ CY82_IDE_SLAVE_8BIT = 0x51,
+
+ CY82_INDEX_PORT = 0x22,
+ CY82_DATA_PORT = 0x23,
+
+ CY82_INDEX_CTRLREG1 = 0x01,
+ CY82_INDEX_CHANNEL0 = 0x30,
+ CY82_INDEX_CHANNEL1 = 0x31,
+ CY82_INDEX_TIMEOUT = 0x32
+};
+
+/**
+ * cy82c693_set_piomode - set initial PIO mode data
+ * @ap: ATA interface
+ * @adev: ATA device
+ *
+ * Called to do the PIO mode setup.
+ */
+
+static void cy82c693_set_piomode(struct ata_port *ap, struct ata_device *adev)
+{
+ struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+ struct ata_timing t;
+ const unsigned long T = 1000000 / 33;
+ short time_16, time_8;
+ u32 addr;
+
+ ata_timing_compute(adev->id, adev->pio_mode, adev->pio_mode, &t, T, 1);
+
+ time_16 = clamp_val(t.recover - 1, 0, 15) |
+ (clamp_val(t.active - 1, 0, 15) << 4);
+ time_8 = clamp_val(t.act8b - 1, 0, 15) |
+ (clamp_val(t.rec8b - 1, 0, 15) << 4);
+
+ if (adev->devno == 0) {
+ pci_read_config_dword(pdev, CY82_IDE_ADDRSETUP, &addr);
+
+ addr &= ~0x0F; /* Mask bits */
+ addr |= clamp_val(t.setup - 1, 0, 15);
+
+ pci_write_config_dword(pdev, CY82_IDE_ADDRSETUP, addr);
+ pci_write_config_byte(pdev, CY82_IDE_MASTER_IOR, time_16);
+ pci_write_config_byte(pdev, CY82_IDE_MASTER_IOW, time_16);
+ pci_write_config_byte(pdev, CY82_IDE_MASTER_8BIT, time_8);
+ } else {
+ pci_read_config_dword(pdev, CY82_IDE_ADDRSETUP, &addr);
+
+ addr &= ~0xF0; /* Mask bits */
+ addr |= (clamp_val(t.setup - 1, 0, 15) << 4);
+
+ pci_write_config_dword(pdev, CY82_IDE_ADDRSETUP, addr);
+ pci_write_config_byte(pdev, CY82_IDE_SLAVE_IOR, time_16);
+ pci_write_config_byte(pdev, CY82_IDE_SLAVE_IOW, time_16);
+ pci_write_config_byte(pdev, CY82_IDE_SLAVE_8BIT, time_8);
+ }
+}
+
+/**
+ * cy82c693_set_dmamode - set initial DMA mode data
+ * @ap: ATA interface
+ * @adev: ATA device
+ *
+ * Called to do the DMA mode setup.
+ */
+
+static void cy82c693_set_dmamode(struct ata_port *ap, struct ata_device *adev)
+{
+ int reg = CY82_INDEX_CHANNEL0 + ap->port_no;
+
+ /* Be afraid, be very afraid. Magic registers in low I/O space */
+ outb(reg, 0x22);
+ outb(adev->dma_mode - XFER_MW_DMA_0, 0x23);
+
+ /* 0x50 gives the best behaviour on the Alpha's using this chip */
+ outb(CY82_INDEX_TIMEOUT, 0x22);
+ outb(0x50, 0x23);
+}
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 49/68] cy82c693: convert to ide2libata
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (47 preceding siblings ...)
2010-01-29 16:08 ` [PATCH 48/68] pata_cypress: move code to be re-used by ide2libata to pata_cypress.h Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:08 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:08 ` [PATCH 50/68] pata_efar: move code to be re-used by ide2libata to pata_efar.h Bartlomiej Zolnierkiewicz
` (19 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:08 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] cy82c693: convert to ide2libata
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ata/pata_cypress.h | 30 ++++++++--
drivers/ide/cy82c693.c | 130 +--------------------------------------------
2 files changed, 29 insertions(+), 131 deletions(-)
Index: b/drivers/ata/pata_cypress.h
===================================================================
--- a/drivers/ata/pata_cypress.h
+++ b/drivers/ata/pata_cypress.h
@@ -30,12 +30,31 @@ enum {
static void cy82c693_set_piomode(struct ata_port *ap, struct ata_device *adev)
{
+#ifndef __IDE2LIBATA
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+ int bus_speed = 33;
+#else
+ struct pci_dev *pdev = ap->port_no ? to_pci_dev(ap->host->dev2)
+ : to_pci_dev(ap->host->dev);
+ int bus_speed = ide_pci_clk ? ide_pci_clk : 33;
+#endif
+ const unsigned long T = 1000000 / bus_speed;
struct ata_timing t;
- const unsigned long T = 1000000 / 33;
short time_16, time_8;
u32 addr;
+#ifdef __IDE2LIBATA
+ /* select primary or secondary channel */
+ if (ap->port_no > 0) { /* drive is on the secondary channel */
+ pdev = pci_get_slot(pdev->bus, pdev->devfn + 1);
+ if (!pdev) {
+ printk(KERN_ERR "%s: tune_drive: "
+ "Cannot find secondary interface!\n",
+ adev->name);
+ return;
+ }
+ }
+#endif
ata_timing_compute(adev->id, adev->pio_mode, adev->pio_mode, &t, T, 1);
time_16 = clamp_val(t.recover - 1, 0, 15) |
@@ -79,10 +98,11 @@ static void cy82c693_set_dmamode(struct
int reg = CY82_INDEX_CHANNEL0 + ap->port_no;
/* Be afraid, be very afraid. Magic registers in low I/O space */
- outb(reg, 0x22);
- outb(adev->dma_mode - XFER_MW_DMA_0, 0x23);
+ outb(reg, CY82_INDEX_PORT);
+ outb((adev->dma_mode - XFER_MW_DMA_0) |
+ ((adev->dma_mode & 0x10) >> 2), CY82_DATA_PORT);
/* 0x50 gives the best behaviour on the Alpha's using this chip */
- outb(CY82_INDEX_TIMEOUT, 0x22);
- outb(0x50, 0x23);
+ outb(CY82_INDEX_TIMEOUT, CY82_INDEX_PORT);
+ outb(0x50, CY82_DATA_PORT);
}
Index: b/drivers/ide/cy82c693.c
===================================================================
--- a/drivers/ide/cy82c693.c
+++ b/drivers/ide/cy82c693.c
@@ -18,130 +18,8 @@
#define DRV_NAME "cy82c693"
-/*
- * NOTE: the value for busmaster timeout is tricky and I got it by
- * trial and error! By using a to low value will cause DMA timeouts
- * and drop IDE performance, and by using a to high value will cause
- * audio playback to scatter.
- * If you know a better value or how to calc it, please let me know.
- */
-
-/* twice the value written in cy82c693ub datasheet */
-#define BUSMASTER_TIMEOUT 0x50
-/*
- * the value above was tested on my machine and it seems to work okay
- */
-
-/* here are the offset definitions for the registers */
-#define CY82_IDE_CMDREG 0x04
-#define CY82_IDE_ADDRSETUP 0x48
-#define CY82_IDE_MASTER_IOR 0x4C
-#define CY82_IDE_MASTER_IOW 0x4D
-#define CY82_IDE_SLAVE_IOR 0x4E
-#define CY82_IDE_SLAVE_IOW 0x4F
-#define CY82_IDE_MASTER_8BIT 0x50
-#define CY82_IDE_SLAVE_8BIT 0x51
-
-#define CY82_INDEX_PORT 0x22
-#define CY82_DATA_PORT 0x23
-
-#define CY82_INDEX_CHANNEL0 0x30
-#define CY82_INDEX_CHANNEL1 0x31
-#define CY82_INDEX_TIMEOUT 0x32
-
-/*
- * set DMA mode a specific channel for CY82C693
- */
-
-static void cy82c693_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
-{
- const u8 mode = drive->dma_mode;
- u8 single = (mode & 0x10) >> 4, index = 0, data = 0;
-
- index = hwif->channel ? CY82_INDEX_CHANNEL1 : CY82_INDEX_CHANNEL0;
-
- data = (mode & 3) | (single << 2);
-
- outb(index, CY82_INDEX_PORT);
- outb(data, CY82_DATA_PORT);
-
- /*
- * note: below we set the value for Bus Master IDE TimeOut Register
- * I'm not absolutly sure what this does, but it solved my problem
- * with IDE DMA and sound, so I now can play sound and work with
- * my IDE driver at the same time :-)
- *
- * If you know the correct (best) value for this register please
- * let me know - ASK
- */
-
- data = BUSMASTER_TIMEOUT;
- outb(CY82_INDEX_TIMEOUT, CY82_INDEX_PORT);
- outb(data, CY82_DATA_PORT);
-}
-
-static void cy82c693_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
-{
- struct pci_dev *dev = to_pci_dev(hwif->dev);
- int bus_speed = ide_pci_clk ? ide_pci_clk : 33;
- const unsigned long T = 1000000 / bus_speed;
- unsigned int addrCtrl;
- struct ata_timing t;
- u8 mode = drive->pio_mode, time_16, time_8;
-
- /* select primary or secondary channel */
- if (hwif->index > 0) { /* drive is on the secondary channel */
- dev = pci_get_slot(dev->bus, dev->devfn+1);
- if (!dev) {
- printk(KERN_ERR "%s: tune_drive: "
- "Cannot find secondary interface!\n",
- drive->name);
- return;
- }
- }
-
- ata_timing_compute(drive->id, mode, mode, &t, T, 1);
-
- time_16 = clamp_val(t.recover - 1, 0, 15) |
- (clamp_val(t.active - 1, 0, 15) << 4);
- time_8 = clamp_val(t.act8b - 1, 0, 15) |
- (clamp_val(t.rec8b - 1, 0, 15) << 4);
-
- /* now let's write the clocks registers */
- if ((drive->dn & 1) == 0) {
- /*
- * set master drive
- * address setup control register
- * is 32 bit !!!
- */
- pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl);
-
- addrCtrl &= (~0xF);
- addrCtrl |= clamp_val(t.setup - 1, 0, 15);
- pci_write_config_dword(dev, CY82_IDE_ADDRSETUP, addrCtrl);
-
- /* now let's set the remaining registers */
- pci_write_config_byte(dev, CY82_IDE_MASTER_IOR, time_16);
- pci_write_config_byte(dev, CY82_IDE_MASTER_IOW, time_16);
- pci_write_config_byte(dev, CY82_IDE_MASTER_8BIT, time_8);
- } else {
- /*
- * set slave drive
- * address setup control register
- * is 32 bit !!!
- */
- pci_read_config_dword(dev, CY82_IDE_ADDRSETUP, &addrCtrl);
-
- addrCtrl &= (~0xF0);
- addrCtrl |= (clamp_val(t.setup - 1, 0, 15) << 4);
- pci_write_config_dword(dev, CY82_IDE_ADDRSETUP, addrCtrl);
-
- /* now let's set the remaining registers */
- pci_write_config_byte(dev, CY82_IDE_SLAVE_IOR, time_16);
- pci_write_config_byte(dev, CY82_IDE_SLAVE_IOW, time_16);
- pci_write_config_byte(dev, CY82_IDE_SLAVE_8BIT, time_8);
- }
-}
+#include <linux/ide2libata.h>
+#include "../ata/pata_cypress.h"
static void __devinit init_iops_cy82c693(ide_hwif_t *hwif)
{
@@ -157,8 +35,8 @@ static void __devinit init_iops_cy82c693
}
static const struct ide_port_ops cy82c693_port_ops = {
- .set_pio_mode = cy82c693_set_pio_mode,
- .set_dma_mode = cy82c693_set_dma_mode,
+ .set_pio_mode = cy82c693_set_piomode,
+ .set_dma_mode = cy82c693_set_dmamode,
};
static const struct ide_port_info cy82c693_chipset __devinitdata = {
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 50/68] pata_efar: move code to be re-used by ide2libata to pata_efar.h
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (48 preceding siblings ...)
2010-01-29 16:08 ` [PATCH 49/68] cy82c693: convert to ide2libata Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:08 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:08 ` [PATCH 51/68] slc90e66: convert to ide2libata Bartlomiej Zolnierkiewicz
` (18 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:08 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] pata_efar: move code to be re-used by ide2libata to pata_efar.h
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ata/pata_efar.c | 151 -----------------------------------------------
drivers/ata/pata_efar.h | 152 ++++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 153 insertions(+), 150 deletions(-)
Index: b/drivers/ata/pata_efar.c
===================================================================
--- a/drivers/ata/pata_efar.c
+++ b/drivers/ata/pata_efar.c
@@ -49,156 +49,7 @@ static int efar_pre_reset(struct ata_lin
return ata_sff_prereset(link, deadline);
}
-/**
- * efar_cable_detect - check for 40/80 pin
- * @ap: Port
- *
- * Perform cable detection for the EFAR ATA interface. This is
- * different to the PIIX arrangement
- */
-
-static int efar_cable_detect(struct ata_port *ap)
-{
- struct pci_dev *pdev = to_pci_dev(ap->host->dev);
- u8 tmp;
-
- pci_read_config_byte(pdev, 0x47, &tmp);
- if (tmp & (2 >> ap->port_no))
- return ATA_CBL_PATA40;
- return ATA_CBL_PATA80;
-}
-
-static DEFINE_SPINLOCK(efar_lock);
-
-static void efar_set_timings(struct ata_port *ap, struct ata_device *adev,
- u8 pio, bool use_mwdma)
-{
- struct pci_dev *dev = to_pci_dev(ap->host->dev);
- unsigned long flags;
- unsigned int is_slave = (adev->devno != 0);
- u8 master_port = ap->port_no ? 0x42 : 0x40;
- u16 master_data;
- u8 slave_data;
- u8 udma_enable;
- int control = 0;
-
- /*
- * See Intel Document 298600-004 for the timing programing rules
- * for PIIX/ICH. The EFAR is a clone so very similar
- */
-
- static const /* ISP RTC */
- u8 timings[][2] = { { 0, 0 },
- { 0, 0 },
- { 1, 0 },
- { 2, 1 },
- { 2, 3 }, };
-
- if (pio > 1 || use_mwdma)
- control |= 1; /* TIME */
- if (ata_pio_need_iordy(adev) || use_mwdma)
- control |= 2; /* IE */
- /* Intel specifies that the prefetch/posting is for disk only */
- if (adev->class == ATA_DEV_ATA)
- control |= 4; /* PPE */
- /* If the drive MWDMA is faster than it can do PIO then
- we must force PIO into PIO0 */
- if (use_mwdma && adev->pio_mode < (XFER_PIO_0 + pio))
- /* Enable DMA timing only */
- control |= 8; /* PIO cycles in PIO0 */
-
- spin_lock_irqsave(&efar_lock, flags);
-
- pci_read_config_word(dev, master_port, &master_data);
-
- /* Set PPE, IE, and TIME as appropriate */
- if (is_slave == 0) {
- master_data &= 0xCCF0;
- master_data |= control;
- master_data |= (timings[pio][0] << 12) |
- (timings[pio][1] << 8);
- } else {
- int shift = 4 * ap->port_no;
-
- master_data &= 0xFF0F;
- master_data |= (control << 4);
-
- /* Slave timing in separate register */
- pci_read_config_byte(dev, 0x44, &slave_data);
- slave_data &= ap->port_no ? 0x0F : 0xF0;
- slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) << shift;
- }
-
- master_data |= 0x4000; /* Ensure SITRE is set */
- pci_write_config_word(dev, master_port, master_data);
- if (is_slave)
- pci_write_config_byte(dev, 0x44, slave_data);
-
- pci_read_config_byte(dev, 0x48, &udma_enable);
- udma_enable &= ~(1 << (2 * ap->port_no + adev->devno));
- pci_write_config_byte(dev, 0x48, udma_enable);
-
- spin_unlock_irqrestore(&efar_lock, flags);
-}
-
-/**
- * efar_set_piomode - Initialize host controller PATA PIO timings
- * @ap: Port whose timings we are configuring
- * @adev: Device to program
- *
- * Set PIO mode for device, in host controller PCI config space.
- *
- * LOCKING:
- * None (inherited from caller).
- */
-
-static void efar_set_piomode(struct ata_port *ap, struct ata_device *adev)
-{
- efar_set_timings(ap, adev, adev->pio_mode - XFER_PIO_0, 0);
-}
-
-/**
- * efar_set_dmamode - Initialize host controller PATA DMA timings
- * @ap: Port whose timings we are configuring
- * @adev: Device to program
- *
- * Set UDMA/MWDMA mode for device, in host controller PCI config space.
- *
- * LOCKING:
- * None (inherited from caller).
- */
-
-static void efar_set_dmamode (struct ata_port *ap, struct ata_device *adev)
-{
- struct pci_dev *dev = to_pci_dev(ap->host->dev);
- unsigned long flags;
- u8 speed = adev->dma_mode;
- int devid = adev->devno + 2 * ap->port_no;
- u8 udma_enable;
-
- if (speed >= XFER_UDMA_0) {
- unsigned int udma = speed - XFER_UDMA_0;
- u16 udma_timing;
-
- spin_lock_irqsave(&efar_lock, flags);
-
- pci_read_config_byte(dev, 0x48, &udma_enable);
-
- udma_enable |= (1 << devid);
-
- /* Load the UDMA mode number */
- pci_read_config_word(dev, 0x4A, &udma_timing);
- udma_timing &= ~(7 << (4 * devid));
- udma_timing |= udma << (4 * devid);
- pci_write_config_word(dev, 0x4A, udma_timing);
-
- pci_write_config_byte(dev, 0x48, udma_enable);
-
- spin_unlock_irqrestore(&efar_lock, flags);
- } else
- /* MWDMA is driven by the PIO timings. */
- efar_set_timings(ap, adev, ata_mwdma_to_pio(speed), 1);
-}
+#include "pata_efar.h"
static struct scsi_host_template efar_sht = {
ATA_BMDMA_SHT(DRV_NAME),
Index: b/drivers/ata/pata_efar.h
===================================================================
--- /dev/null
+++ b/drivers/ata/pata_efar.h
@@ -0,0 +1,152 @@
+
+/**
+ * efar_cable_detect - check for 40/80 pin
+ * @ap: Port
+ *
+ * Perform cable detection for the EFAR ATA interface. This is
+ * different to the PIIX arrangement
+ */
+
+static int efar_cable_detect(struct ata_port *ap)
+{
+ struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+ u8 tmp;
+
+ pci_read_config_byte(pdev, 0x47, &tmp);
+ if (tmp & (2 >> ap->port_no))
+ return ATA_CBL_PATA40;
+ return ATA_CBL_PATA80;
+}
+
+static DEFINE_SPINLOCK(efar_lock);
+
+static void efar_set_timings(struct ata_port *ap, struct ata_device *adev,
+ u8 pio, bool use_mwdma)
+{
+ struct pci_dev *dev = to_pci_dev(ap->host->dev);
+ unsigned long flags;
+ unsigned int is_slave = (adev->devno != 0);
+ u8 master_port = ap->port_no ? 0x42 : 0x40;
+ u16 master_data;
+ u8 slave_data;
+ u8 udma_enable;
+ int control = 0;
+
+ /*
+ * See Intel Document 298600-004 for the timing programing rules
+ * for PIIX/ICH. The EFAR is a clone so very similar
+ */
+
+ static const /* ISP RTC */
+ u8 timings[][2] = { { 0, 0 },
+ { 0, 0 },
+ { 1, 0 },
+ { 2, 1 },
+ { 2, 3 }, };
+
+ if (pio > 1 || use_mwdma)
+ control |= 1; /* TIME */
+ if (ata_pio_need_iordy(adev) || use_mwdma)
+ control |= 2; /* IE */
+ /* Intel specifies that the prefetch/posting is for disk only */
+ if (adev->class == ATA_DEV_ATA)
+ control |= 4; /* PPE */
+ /* If the drive MWDMA is faster than it can do PIO then
+ we must force PIO into PIO0 */
+ if (use_mwdma && adev->pio_mode < (XFER_PIO_0 + pio))
+ /* Enable DMA timing only */
+ control |= 8; /* PIO cycles in PIO0 */
+
+ spin_lock_irqsave(&efar_lock, flags);
+
+ pci_read_config_word(dev, master_port, &master_data);
+
+ /* Set PPE, IE, and TIME as appropriate */
+ if (is_slave == 0) {
+ master_data &= 0xCCF0;
+ master_data |= control;
+ master_data |= (timings[pio][0] << 12) |
+ (timings[pio][1] << 8);
+ } else {
+ int shift = 4 * ap->port_no;
+
+ master_data &= 0xFF0F;
+ master_data |= (control << 4);
+
+ /* Slave timing in separate register */
+ pci_read_config_byte(dev, 0x44, &slave_data);
+ slave_data &= ap->port_no ? 0x0F : 0xF0;
+ slave_data |=
+ ((timings[pio][0] << 2) | timings[pio][1]) << shift;
+ }
+
+ master_data |= 0x4000; /* Ensure SITRE is set */
+ pci_write_config_word(dev, master_port, master_data);
+ if (is_slave)
+ pci_write_config_byte(dev, 0x44, slave_data);
+
+ pci_read_config_byte(dev, 0x48, &udma_enable);
+ udma_enable &= ~(1 << (2 * ap->port_no + adev->devno));
+ pci_write_config_byte(dev, 0x48, udma_enable);
+
+ spin_unlock_irqrestore(&efar_lock, flags);
+}
+
+/**
+ * efar_set_piomode - Initialize host controller PATA PIO timings
+ * @ap: Port whose timings we are configuring
+ * @adev: Device to program
+ *
+ * Set PIO mode for device, in host controller PCI config space.
+ *
+ * LOCKING:
+ * None (inherited from caller).
+ */
+
+static void efar_set_piomode(struct ata_port *ap, struct ata_device *adev)
+{
+ efar_set_timings(ap, adev, adev->pio_mode - XFER_PIO_0, 0);
+}
+
+/**
+ * efar_set_dmamode - Initialize host controller PATA DMA timings
+ * @ap: Port whose timings we are configuring
+ * @adev: Device to program
+ *
+ * Set UDMA/MWDMA mode for device, in host controller PCI config space.
+ *
+ * LOCKING:
+ * None (inherited from caller).
+ */
+
+static void efar_set_dmamode(struct ata_port *ap, struct ata_device *adev)
+{
+ struct pci_dev *dev = to_pci_dev(ap->host->dev);
+ unsigned long flags;
+ u8 speed = adev->dma_mode;
+ int devid = adev->devno + 2 * ap->port_no;
+ u8 udma_enable;
+
+ if (speed >= XFER_UDMA_0) {
+ unsigned int udma = speed - XFER_UDMA_0;
+ u16 udma_timing;
+
+ spin_lock_irqsave(&efar_lock, flags);
+
+ pci_read_config_byte(dev, 0x48, &udma_enable);
+
+ udma_enable |= (1 << devid);
+
+ /* Load the UDMA mode number */
+ pci_read_config_word(dev, 0x4A, &udma_timing);
+ udma_timing &= ~(7 << (4 * devid));
+ udma_timing |= udma << (4 * devid);
+ pci_write_config_word(dev, 0x4A, udma_timing);
+
+ pci_write_config_byte(dev, 0x48, udma_enable);
+
+ spin_unlock_irqrestore(&efar_lock, flags);
+ } else
+ /* MWDMA is driven by the PIO timings. */
+ efar_set_timings(ap, adev, ata_mwdma_to_pio(speed), 1);
+}
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 51/68] slc90e66: convert to ide2libata
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (49 preceding siblings ...)
2010-01-29 16:08 ` [PATCH 50/68] pata_efar: move code to be re-used by ide2libata to pata_efar.h Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:08 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:08 ` [PATCH 52/68] pata_it8213: move code to be re-used by ide2libata to pata_it8213.h Bartlomiej Zolnierkiewicz
` (17 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:08 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] slc90e66: convert to ide2libata
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ata/pata_efar.h | 13 ++++-
drivers/ide/slc90e66.c | 113 ++----------------------------------------------
2 files changed, 16 insertions(+), 110 deletions(-)
Index: b/drivers/ata/pata_efar.h
===================================================================
--- a/drivers/ata/pata_efar.h
+++ b/drivers/ata/pata_efar.h
@@ -146,7 +146,16 @@ static void efar_set_dmamode(struct ata_
pci_write_config_byte(dev, 0x48, udma_enable);
spin_unlock_irqrestore(&efar_lock, flags);
- } else
- /* MWDMA is driven by the PIO timings. */
+ } else {
+ /* Normal DMA is driven by the PIO timings. */
+#ifdef __IDE2LIBATA
+ if (speed >= XFER_MW_DMA_0)
+ adev->pio_mode = ata_mwdma_to_pio(speed) + XFER_PIO_0;
+ else
+ adev->pio_mode = XFER_PIO_2; /* for SWDMA2 */
+ efar_set_timings(ap, adev, adev->pio_mode - XFER_PIO_0, 1);
+#else
efar_set_timings(ap, adev, ata_mwdma_to_pio(speed), 1);
+#endif
+ }
}
Index: b/drivers/ide/slc90e66.c
===================================================================
--- a/drivers/ide/slc90e66.c
+++ b/drivers/ide/slc90e66.c
@@ -16,116 +16,13 @@
#define DRV_NAME "slc90e66"
-static DEFINE_SPINLOCK(slc90e66_lock);
-
-static void slc90e66_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
-{
- struct pci_dev *dev = to_pci_dev(hwif->dev);
- int is_slave = drive->dn & 1;
- int master_port = hwif->channel ? 0x42 : 0x40;
- int slave_port = 0x44;
- unsigned long flags;
- u16 master_data;
- u8 slave_data;
- int control = 0;
- const u8 pio = drive->pio_mode - XFER_PIO_0;
-
- /* ISP RTC */
- static const u8 timings[][2] = {
- { 0, 0 },
- { 0, 0 },
- { 1, 0 },
- { 2, 1 },
- { 2, 3 }, };
-
- spin_lock_irqsave(&slc90e66_lock, flags);
- pci_read_config_word(dev, master_port, &master_data);
-
- if (pio > 1)
- control |= 1; /* Programmable timing on */
- if (drive->media == ide_disk)
- control |= 4; /* Prefetch, post write */
- if (ide_pio_need_iordy(drive, pio))
- control |= 2; /* IORDY */
- if (is_slave) {
- master_data |= 0x4000;
- master_data &= ~0x0070;
- /* Set PPE, IE and TIME */
- master_data |= control << 4;
- pci_read_config_byte(dev, slave_port, &slave_data);
- slave_data &= hwif->channel ? 0x0f : 0xf0;
- slave_data |= ((timings[pio][0] << 2) | timings[pio][1]) <<
- (hwif->channel ? 4 : 0);
- } else {
- master_data &= ~0x3307;
- /* enable PPE, IE and TIME */
- master_data |= control;
- master_data |= (timings[pio][0] << 12) | (timings[pio][1] << 8);
- }
- pci_write_config_word(dev, master_port, master_data);
- if (is_slave)
- pci_write_config_byte(dev, slave_port, slave_data);
- spin_unlock_irqrestore(&slc90e66_lock, flags);
-}
-
-static void slc90e66_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
-{
- struct pci_dev *dev = to_pci_dev(hwif->dev);
- u8 maslave = hwif->channel ? 0x42 : 0x40;
- int sitre = 0, a_speed = 7 << (drive->dn * 4);
- int u_speed = 0, u_flag = 1 << drive->dn;
- u16 reg4042, reg44, reg48, reg4a;
- const u8 speed = drive->dma_mode;
-
- pci_read_config_word(dev, maslave, ®4042);
- sitre = (reg4042 & 0x4000) ? 1 : 0;
- pci_read_config_word(dev, 0x44, ®44);
- pci_read_config_word(dev, 0x48, ®48);
- pci_read_config_word(dev, 0x4a, ®4a);
-
- if (speed >= XFER_UDMA_0) {
- u_speed = (speed - XFER_UDMA_0) << (drive->dn * 4);
-
- if (!(reg48 & u_flag))
- pci_write_config_word(dev, 0x48, reg48|u_flag);
- if ((reg4a & a_speed) != u_speed) {
- pci_write_config_word(dev, 0x4a, reg4a & ~a_speed);
- pci_read_config_word(dev, 0x4a, ®4a);
- pci_write_config_word(dev, 0x4a, reg4a|u_speed);
- }
- } else {
- const u8 mwdma_to_pio[] = { 0, 3, 4 };
-
- if (reg48 & u_flag)
- pci_write_config_word(dev, 0x48, reg48 & ~u_flag);
- if (reg4a & a_speed)
- pci_write_config_word(dev, 0x4a, reg4a & ~a_speed);
-
- if (speed >= XFER_MW_DMA_0)
- drive->pio_mode =
- mwdma_to_pio[speed - XFER_MW_DMA_0] + XFER_PIO_0;
- else
- drive->pio_mode = XFER_PIO_2; /* for SWDMA2 */
-
- slc90e66_set_pio_mode(hwif, drive);
- }
-}
-
-static int slc90e66_cable_detect(ide_hwif_t *hwif)
-{
- struct pci_dev *dev = to_pci_dev(hwif->dev);
- u8 reg47 = 0, mask = hwif->channel ? 0x01 : 0x02;
-
- pci_read_config_byte(dev, 0x47, ®47);
-
- /* bit[0(1)]: 0:80, 1:40 */
- return (reg47 & mask) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;
-}
+#include <linux/ide2libata.h>
+#include "../ata/pata_efar.h"
static const struct ide_port_ops slc90e66_port_ops = {
- .set_pio_mode = slc90e66_set_pio_mode,
- .set_dma_mode = slc90e66_set_dma_mode,
- .cable_detect = slc90e66_cable_detect,
+ .set_pio_mode = efar_set_piomode,
+ .set_dma_mode = efar_set_dmamode,
+ .cable_detect = efar_cable_detect,
};
static const struct ide_port_info slc90e66_chipset __devinitdata = {
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 52/68] pata_it8213: move code to be re-used by ide2libata to pata_it8213.h
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (50 preceding siblings ...)
2010-01-29 16:08 ` [PATCH 51/68] slc90e66: convert to ide2libata Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:08 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:08 ` [PATCH 53/68] it8213: convert to ide2libata Bartlomiej Zolnierkiewicz
` (16 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:08 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] pata_it8213: move code to be re-used by ide2libata to pata_it8213.h
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ata/pata_it8213.c | 150 ----------------------------------------------
drivers/ata/pata_it8213.h | 150 ++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 151 insertions(+), 149 deletions(-)
Index: b/drivers/ata/pata_it8213.c
===================================================================
--- a/drivers/ata/pata_it8213.c
+++ b/drivers/ata/pata_it8213.c
@@ -43,155 +43,7 @@ static int it8213_pre_reset(struct ata_l
return ata_sff_prereset(link, deadline);
}
-/**
- * it8213_cable_detect - check for 40/80 pin
- * @ap: Port
- *
- * Perform cable detection for the 8213 ATA interface. This is
- * different to the PIIX arrangement
- */
-
-static int it8213_cable_detect(struct ata_port *ap)
-{
- struct pci_dev *pdev = to_pci_dev(ap->host->dev);
- u8 tmp;
- pci_read_config_byte(pdev, 0x42, &tmp);
- if (tmp & 2) /* The initial docs are incorrect */
- return ATA_CBL_PATA40;
- return ATA_CBL_PATA80;
-}
-
-static void it8213_set_timings(struct ata_port *ap, struct ata_device *adev,
- u8 pio, bool use_mwdma)
-{
- struct pci_dev *dev = to_pci_dev(ap->host->dev);
- u8 master_port = ap->port_no ? 0x42 : 0x40;
- u16 master_data;
- int control = 0;
-
- /*
- * See Intel Document 298600-004 for the timing programing rules
- * for PIIX/ICH. The 8213 is a clone so very similar
- */
-
- static const /* ISP RTC */
- u8 timings[][2] = { { 0, 0 },
- { 0, 0 },
- { 1, 0 },
- { 2, 1 },
- { 2, 3 }, };
-
- if (pio > 1 || use_mwdma)
- control |= 1; /* TIME */
- if (ata_pio_need_iordy(adev) || use_mwdma)
- control |= 2; /* IE */
- /* Bit 2 is set for ATAPI on the IT8213 - reverse of ICH/PIIX */
- if (adev->class != ATA_DEV_ATA)
- control |= 4; /* PPE */
- /* If the drive MWDMA is faster than it can do PIO then
- we must force PIO into PIO0 */
- if (use_mwdma && adev->pio_mode < (XFER_PIO_0 + pio))
- /* Enable DMA timing only */
- control |= 8; /* PIO cycles in PIO0 */
-
- pci_read_config_word(dev, master_port, &master_data);
-
- /* Set PPE, IE, and TIME as appropriate */
- if (adev->devno == 0) {
- master_data &= 0xCCF0;
- master_data |= control;
- master_data |= (timings[pio][0] << 12) |
- (timings[pio][1] << 8);
- } else {
- u8 slave_data;
-
- master_data &= 0xFF0F;
- master_data |= (control << 4);
-
- /* Slave timing in separate register */
- pci_read_config_byte(dev, 0x44, &slave_data);
- slave_data &= 0xF0;
- slave_data |= (timings[pio][0] << 2) | timings[pio][1];
- pci_write_config_byte(dev, 0x44, slave_data);
- }
-
- master_data |= 0x4000; /* Ensure SITRE is set */
- pci_write_config_word(dev, master_port, master_data);
-}
-
-/**
- * it8213_set_piomode - Initialize host controller PATA PIO timings
- * @ap: Port whose timings we are configuring
- * @adev: Device whose timings we are configuring
- *
- * Set PIO mode for device, in host controller PCI config space.
- *
- * LOCKING:
- * None (inherited from caller).
- */
-
-static void it8213_set_piomode(struct ata_port *ap, struct ata_device *adev)
-{
- it8213_set_timings(ap, adev, adev->pio_mode - XFER_PIO_0, 0);
-}
-
-/**
- * it8213_set_dmamode - Initialize host controller PATA DMA timings
- * @ap: Port whose timings we are configuring
- * @adev: Device to program
- *
- * Set UDMA/MWDMA mode for device, in host controller PCI config space.
- * This device is basically an ICH alike.
- *
- * LOCKING:
- * None (inherited from caller).
- */
-
-static void it8213_set_dmamode (struct ata_port *ap, struct ata_device *adev)
-{
- struct pci_dev *dev = to_pci_dev(ap->host->dev);
- u8 speed = adev->dma_mode;
- int devid = adev->devno;
- u8 udma_enable;
-
- pci_read_config_byte(dev, 0x48, &udma_enable);
-
- if (speed >= XFER_UDMA_0) {
- unsigned int udma = speed - XFER_UDMA_0;
- u16 udma_timing;
- u16 ideconf;
- int u_clock, u_speed;
-
- /* Clocks follow the PIIX style */
- u_speed = min(2 - (udma & 1), udma);
- if (udma > 4)
- u_clock = 0x1000; /* 100Mhz */
- else if (udma > 2)
- u_clock = 1; /* 66Mhz */
- else
- u_clock = 0; /* 33Mhz */
-
- udma_enable |= (1 << devid);
-
- /* Load the UDMA cycle time */
- pci_read_config_word(dev, 0x4A, &udma_timing);
- udma_timing &= ~(3 << (4 * devid));
- udma_timing |= u_speed << (4 * devid);
- pci_write_config_word(dev, 0x4A, udma_timing);
-
- /* Load the clock selection */
- pci_read_config_word(dev, 0x54, &ideconf);
- ideconf &= ~(0x1001 << devid);
- ideconf |= u_clock << devid;
- pci_write_config_word(dev, 0x54, ideconf);
- } else {
- /* MWDMA is driven by the PIO timings. */
- it8213_set_timings(ap, adev, ata_mwdma_to_pio(speed), 1);
-
- udma_enable &= ~(1 << devid);
- }
- pci_write_config_byte(dev, 0x48, udma_enable);
-}
+#include "pata_it8213.h"
static struct scsi_host_template it8213_sht = {
ATA_BMDMA_SHT(DRV_NAME),
Index: b/drivers/ata/pata_it8213.h
===================================================================
--- /dev/null
+++ b/drivers/ata/pata_it8213.h
@@ -0,0 +1,150 @@
+
+/**
+ * it8213_cable_detect - check for 40/80 pin
+ * @ap: Port
+ *
+ * Perform cable detection for the 8213 ATA interface. This is
+ * different to the PIIX arrangement
+ */
+
+static int it8213_cable_detect(struct ata_port *ap)
+{
+ struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+ u8 tmp;
+ pci_read_config_byte(pdev, 0x42, &tmp);
+ if (tmp & 2) /* The initial docs are incorrect */
+ return ATA_CBL_PATA40;
+ return ATA_CBL_PATA80;
+}
+
+static void it8213_set_timings(struct ata_port *ap, struct ata_device *adev,
+ u8 pio, bool use_mwdma)
+{
+ struct pci_dev *dev = to_pci_dev(ap->host->dev);
+ u8 master_port = ap->port_no ? 0x42 : 0x40;
+ u16 master_data;
+ int control = 0;
+
+ /*
+ * See Intel Document 298600-004 for the timing programing rules
+ * for PIIX/ICH. The 8213 is a clone so very similar
+ */
+
+ static const /* ISP RTC */
+ u8 timings[][2] = { { 0, 0 },
+ { 0, 0 },
+ { 1, 0 },
+ { 2, 1 },
+ { 2, 3 }, };
+
+ if (pio > 1 || use_mwdma)
+ control |= 1; /* TIME */
+ if (ata_pio_need_iordy(adev) || use_mwdma)
+ control |= 2; /* IE */
+ /* Bit 2 is set for ATAPI on the IT8213 - reverse of ICH/PIIX */
+ if (adev->class != ATA_DEV_ATA)
+ control |= 4; /* PPE */
+ /* If the drive MWDMA is faster than it can do PIO then
+ we must force PIO into PIO0 */
+ if (use_mwdma && adev->pio_mode < (XFER_PIO_0 + pio))
+ /* Enable DMA timing only */
+ control |= 8; /* PIO cycles in PIO0 */
+
+ pci_read_config_word(dev, master_port, &master_data);
+
+ /* Set PPE, IE, and TIME as appropriate */
+ if (adev->devno == 0) {
+ master_data &= 0xCCF0;
+ master_data |= control;
+ master_data |= (timings[pio][0] << 12) |
+ (timings[pio][1] << 8);
+ } else {
+ u8 slave_data;
+
+ master_data &= 0xFF0F;
+ master_data |= (control << 4);
+
+ /* Slave timing in separate register */
+ pci_read_config_byte(dev, 0x44, &slave_data);
+ slave_data &= 0xF0;
+ slave_data |= (timings[pio][0] << 2) | timings[pio][1];
+ pci_write_config_byte(dev, 0x44, slave_data);
+ }
+
+ master_data |= 0x4000; /* Ensure SITRE is set */
+ pci_write_config_word(dev, master_port, master_data);
+}
+
+/**
+ * it8213_set_piomode - Initialize host controller PATA PIO timings
+ * @ap: Port whose timings we are configuring
+ * @adev: Device whose timings we are configuring
+ *
+ * Set PIO mode for device, in host controller PCI config space.
+ *
+ * LOCKING:
+ * None (inherited from caller).
+ */
+
+static void it8213_set_piomode(struct ata_port *ap, struct ata_device *adev)
+{
+ it8213_set_timings(ap, adev, adev->pio_mode - XFER_PIO_0, 0);
+}
+
+/**
+ * it8213_set_dmamode - Initialize host controller PATA DMA timings
+ * @ap: Port whose timings we are configuring
+ * @adev: Device to program
+ *
+ * Set UDMA/MWDMA mode for device, in host controller PCI config space.
+ * This device is basically an ICH alike.
+ *
+ * LOCKING:
+ * None (inherited from caller).
+ */
+
+static void it8213_set_dmamode(struct ata_port *ap, struct ata_device *adev)
+{
+ struct pci_dev *dev = to_pci_dev(ap->host->dev);
+ u8 speed = adev->dma_mode;
+ int devid = adev->devno;
+ u8 udma_enable;
+
+ pci_read_config_byte(dev, 0x48, &udma_enable);
+
+ if (speed >= XFER_UDMA_0) {
+ unsigned int udma = speed - XFER_UDMA_0;
+ u16 udma_timing;
+ u16 ideconf;
+ int u_clock, u_speed;
+
+ /* Clocks follow the PIIX style */
+ u_speed = min(2 - (udma & 1), udma);
+ if (udma > 4)
+ u_clock = 0x1000; /* 100Mhz */
+ else if (udma > 2)
+ u_clock = 1; /* 66Mhz */
+ else
+ u_clock = 0; /* 33Mhz */
+
+ udma_enable |= (1 << devid);
+
+ /* Load the UDMA cycle time */
+ pci_read_config_word(dev, 0x4A, &udma_timing);
+ udma_timing &= ~(3 << (4 * devid));
+ udma_timing |= u_speed << (4 * devid);
+ pci_write_config_word(dev, 0x4A, udma_timing);
+
+ /* Load the clock selection */
+ pci_read_config_word(dev, 0x54, &ideconf);
+ ideconf &= ~(0x1001 << devid);
+ ideconf |= u_clock << devid;
+ pci_write_config_word(dev, 0x54, ideconf);
+ } else {
+ /* MWDMA is driven by the PIO timings. */
+ it8213_set_timings(ap, adev, ata_mwdma_to_pio(speed), 1);
+
+ udma_enable &= ~(1 << devid);
+ }
+ pci_write_config_byte(dev, 0x48, udma_enable);
+}
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 53/68] it8213: convert to ide2libata
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (51 preceding siblings ...)
2010-01-29 16:08 ` [PATCH 52/68] pata_it8213: move code to be re-used by ide2libata to pata_it8213.h Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:08 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:08 ` [PATCH 54/68] pata_it821x: move code to be re-used by ide2libata to pata_it821x.h Bartlomiej Zolnierkiewicz
` (15 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:08 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] it8213: convert to ide2libata
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ata/pata_it8213.h | 11 +++
drivers/ide/it8213.c | 138 +---------------------------------------------
2 files changed, 13 insertions(+), 136 deletions(-)
Index: b/drivers/ata/pata_it8213.h
===================================================================
--- a/drivers/ata/pata_it8213.h
+++ b/drivers/ata/pata_it8213.h
@@ -141,9 +141,16 @@ static void it8213_set_dmamode(struct at
ideconf |= u_clock << devid;
pci_write_config_word(dev, 0x54, ideconf);
} else {
- /* MWDMA is driven by the PIO timings. */
+ /* Normal DMA is driven by the PIO timings. */
+#ifdef __IDE2LIBATA
+ if (speed >= XFER_MW_DMA_0)
+ adev->pio_mode = ata_mwdma_to_pio(speed) + XFER_PIO_0;
+ else
+ adev->pio_mode = XFER_PIO_2; /* for SWDMA2 */
+ it8213_set_timings(ap, adev, adev->pio_mode - XFER_PIO_0, 1);
+#else
it8213_set_timings(ap, adev, ata_mwdma_to_pio(speed), 1);
-
+#endif
udma_enable &= ~(1 << devid);
}
pci_write_config_byte(dev, 0x48, udma_enable);
Index: b/drivers/ide/it8213.c
===================================================================
--- a/drivers/ide/it8213.c
+++ b/drivers/ide/it8213.c
@@ -15,142 +15,12 @@
#define DRV_NAME "it8213"
-/**
- * it8213_set_pio_mode - set host controller for PIO mode
- * @hwif: port
- * @drive: drive
- *
- * Set the interface PIO mode.
- */
-
-static void it8213_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
-{
- struct pci_dev *dev = to_pci_dev(hwif->dev);
- int is_slave = drive->dn & 1;
- int master_port = 0x40;
- int slave_port = 0x44;
- unsigned long flags;
- u16 master_data;
- u8 slave_data;
- static DEFINE_SPINLOCK(tune_lock);
- int control = 0;
- const u8 pio = drive->pio_mode - XFER_PIO_0;
-
- static const u8 timings[][2] = {
- { 0, 0 },
- { 0, 0 },
- { 1, 0 },
- { 2, 1 },
- { 2, 3 }, };
-
- spin_lock_irqsave(&tune_lock, flags);
- pci_read_config_word(dev, master_port, &master_data);
-
- if (pio > 1)
- control |= 1; /* Programmable timing on */
- if (drive->media != ide_disk)
- control |= 4; /* ATAPI */
- if (ide_pio_need_iordy(drive, pio))
- control |= 2; /* IORDY */
- if (is_slave) {
- master_data |= 0x4000;
- master_data &= ~0x0070;
- master_data = master_data | (control << 4);
- pci_read_config_byte(dev, slave_port, &slave_data);
- slave_data = slave_data & 0xf0;
- slave_data = slave_data | (timings[pio][0] << 2) | timings[pio][1];
- } else {
- master_data &= ~0x3307;
- master_data = master_data | control;
- master_data = master_data | (timings[pio][0] << 12) | (timings[pio][1] << 8);
- }
- pci_write_config_word(dev, master_port, master_data);
- if (is_slave)
- pci_write_config_byte(dev, slave_port, slave_data);
- spin_unlock_irqrestore(&tune_lock, flags);
-}
-
-/**
- * it8213_set_dma_mode - set host controller for DMA mode
- * @hwif: port
- * @drive: drive
- *
- * Tune the ITE chipset for the DMA mode.
- */
-
-static void it8213_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
-{
- struct pci_dev *dev = to_pci_dev(hwif->dev);
- u8 maslave = 0x40;
- int a_speed = 3 << (drive->dn * 4);
- int u_flag = 1 << drive->dn;
- int v_flag = 0x01 << drive->dn;
- int w_flag = 0x10 << drive->dn;
- int u_speed = 0;
- u16 reg4042, reg4a;
- u8 reg48, reg54, reg55;
- const u8 speed = drive->dma_mode;
-
- pci_read_config_word(dev, maslave, ®4042);
- pci_read_config_byte(dev, 0x48, ®48);
- pci_read_config_word(dev, 0x4a, ®4a);
- pci_read_config_byte(dev, 0x54, ®54);
- pci_read_config_byte(dev, 0x55, ®55);
-
- if (speed >= XFER_UDMA_0) {
- u8 udma = speed - XFER_UDMA_0;
-
- u_speed = min_t(u8, 2 - (udma & 1), udma) << (drive->dn * 4);
-
- if (!(reg48 & u_flag))
- pci_write_config_byte(dev, 0x48, reg48 | u_flag);
- if (speed >= XFER_UDMA_5)
- pci_write_config_byte(dev, 0x55, (u8) reg55|w_flag);
- else
- pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag);
-
- if ((reg4a & a_speed) != u_speed)
- pci_write_config_word(dev, 0x4a, (reg4a & ~a_speed) | u_speed);
- if (speed > XFER_UDMA_2) {
- if (!(reg54 & v_flag))
- pci_write_config_byte(dev, 0x54, reg54 | v_flag);
- } else
- pci_write_config_byte(dev, 0x54, reg54 & ~v_flag);
- } else {
- const u8 mwdma_to_pio[] = { 0, 3, 4 };
-
- if (reg48 & u_flag)
- pci_write_config_byte(dev, 0x48, reg48 & ~u_flag);
- if (reg4a & a_speed)
- pci_write_config_word(dev, 0x4a, reg4a & ~a_speed);
- if (reg54 & v_flag)
- pci_write_config_byte(dev, 0x54, reg54 & ~v_flag);
- if (reg55 & w_flag)
- pci_write_config_byte(dev, 0x55, (u8) reg55 & ~w_flag);
-
- if (speed >= XFER_MW_DMA_0)
- drive->pio_mode =
- mwdma_to_pio[speed - XFER_MW_DMA_0] + XFER_PIO_0;
- else
- drive->pio_mode = XFER_PIO_2; /* for SWDMA2 */
-
- it8213_set_pio_mode(hwif, drive);
- }
-}
-
-static int it8213_cable_detect(ide_hwif_t *hwif)
-{
- struct pci_dev *dev = to_pci_dev(hwif->dev);
- u8 reg42h = 0;
-
- pci_read_config_byte(dev, 0x42, ®42h);
-
- return (reg42h & 0x02) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;
-}
+#include <linux/ide2libata.h>
+#include "../ata/pata_it8213.h"
static const struct ide_port_ops it8213_port_ops = {
- .set_pio_mode = it8213_set_pio_mode,
- .set_dma_mode = it8213_set_dma_mode,
+ .set_pio_mode = it8213_set_piomode,
+ .set_dma_mode = it8213_set_dmamode,
.cable_detect = it8213_cable_detect,
};
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 54/68] pata_it821x: move code to be re-used by ide2libata to pata_it821x.h
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (52 preceding siblings ...)
2010-01-29 16:08 ` [PATCH 53/68] it8213: convert to ide2libata Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:08 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:09 ` [PATCH 55/68] it821x: convert to ide2libata Bartlomiej Zolnierkiewicz
` (14 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:08 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] pata_it821x: move code to be re-used by ide2libata to pata_it821x.h
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ata/pata_it821x.c | 319 ----------------------------------------------
drivers/ata/pata_it821x.h | 318 +++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 319 insertions(+), 318 deletions(-)
Index: b/drivers/ata/pata_it821x.c
===================================================================
--- a/drivers/ata/pata_it821x.c
+++ b/drivers/ata/pata_it821x.c
@@ -19,51 +19,6 @@
* http://www.ite.com.tw/pc/IT8212F_V04.pdf
* Some other documents are NDA.
*
- * The ITE8212 isn't exactly a standard IDE controller. It has two
- * modes. In pass through mode then it is an IDE controller. In its smart
- * mode its actually quite a capable hardware raid controller disguised
- * as an IDE controller. Smart mode only understands DMA read/write and
- * identify, none of the fancier commands apply. The IT8211 is identical
- * in other respects but lacks the raid mode.
- *
- * Errata:
- * o Rev 0x10 also requires master/slave hold the same DMA timings and
- * cannot do ATAPI MWDMA.
- * o The identify data for raid volumes lacks CHS info (technically ok)
- * but also fails to set the LBA28 and other bits. We fix these in
- * the IDE probe quirk code.
- * o If you write LBA48 sized I/O's (ie > 256 sector) in smart mode
- * raid then the controller firmware dies
- * o Smart mode without RAID doesn't clear all the necessary identify
- * bits to reduce the command set to the one used
- *
- * This has a few impacts on the driver
- * - In pass through mode we do all the work you would expect
- * - In smart mode the clocking set up is done by the controller generally
- * but we must watch the other limits and filter.
- * - There are a few extra vendor commands that actually talk to the
- * controller but only work PIO with no IRQ.
- *
- * Vendor areas of the identify block in smart mode are used for the
- * timing and policy set up. Each HDD in raid mode also has a serial
- * block on the disk. The hardware extra commands are get/set chip status,
- * rebuild, get rebuild status.
- *
- * In Linux the driver supports pass through mode as if the device was
- * just another IDE controller. If the smart mode is running then
- * volumes are managed by the controller firmware and each IDE "disk"
- * is a raid volume. Even more cute - the controller can do automated
- * hotplug and rebuild.
- *
- * The pass through controller itself is a little demented. It has a
- * flaw that it has a single set of PIO/MWDMA timings per channel so
- * non UDMA devices restrict each others performance. It also has a
- * single clock source per channel so mixed UDMA100/133 performance
- * isn't perfect and we have to pick a clock. Thankfully none of this
- * matters in smart mode. ATAPI DMA is not currently supported.
- *
- * It seems the smart mode is a win for RAID1/RAID10 but otherwise not.
- *
* TODO
* - ATAPI and other speed filtering
* - RAID configuration ioctls
@@ -78,260 +33,10 @@
#include <scsi/scsi_host.h>
#include <linux/libata.h>
-
#define DRV_NAME "pata_it821x"
#define DRV_VERSION "0.4.2"
-struct it821x_dev
-{
- unsigned int smart:1, /* Are we in smart raid mode */
- timing10:1; /* Rev 0x10 */
- u8 clock_mode; /* 0, ATA_50 or ATA_66 */
- u8 want[2][2]; /* Mode/Pri log for master slave */
- /* We need these for switching the clock when DMA goes on/off
- The high byte is the 66Mhz timing */
- u16 pio[2]; /* Cached PIO values */
- u16 mwdma[2]; /* Cached MWDMA values */
- u16 udma[2]; /* Cached UDMA values (per drive) */
- u16 last_device; /* Master or slave loaded ? */
-};
-
-#define ATA_66 0
-#define ATA_50 1
-#define ATA_ANY 2
-
-#define UDMA_OFF 0
-#define MWDMA_OFF 0
-
-/*
- * We allow users to force the card into non raid mode without
- * flashing the alternative BIOS. This is also necessary right now
- * for embedded platforms that cannot run a PC BIOS but are using this
- * device.
- */
-
-static int it8212_noraid;
-
-/**
- * it821x_program - program the PIO/MWDMA registers
- * @ap: ATA port
- * @adev: Device to program
- * @timing: Timing value (66Mhz in top 8bits, 50 in the low 8)
- *
- * Program the PIO/MWDMA timing for this channel according to the
- * current clock. These share the same register so are managed by
- * the DMA start/stop sequence as with the old driver.
- */
-
-static void it821x_program(struct ata_port *ap, struct ata_device *adev, u16 timing)
-{
- struct pci_dev *pdev = to_pci_dev(ap->host->dev);
- struct it821x_dev *itdev = ap->private_data;
- int channel = ap->port_no;
- u8 conf;
-
- /* Program PIO/MWDMA timing bits */
- if (itdev->clock_mode == ATA_66)
- conf = timing >> 8;
- else
- conf = timing & 0xFF;
- pci_write_config_byte(pdev, 0x54 + 4 * channel, conf);
-}
-
-
-/**
- * it821x_program_udma - program the UDMA registers
- * @ap: ATA port
- * @adev: ATA device to update
- * @timing: Timing bits. Top 8 are for 66Mhz bottom for 50Mhz
- *
- * Program the UDMA timing for this drive according to the
- * current clock. Handles the dual clocks and also knows about
- * the errata on the 0x10 revision. The UDMA errata is partly handled
- * here and partly in start_dma.
- */
-
-static void it821x_program_udma(struct ata_port *ap, struct ata_device *adev, u16 timing)
-{
- struct it821x_dev *itdev = ap->private_data;
- struct pci_dev *pdev = to_pci_dev(ap->host->dev);
- int channel = ap->port_no;
- int unit = adev->devno;
- u8 conf;
-
- /* Program UDMA timing bits */
- if (itdev->clock_mode == ATA_66)
- conf = timing >> 8;
- else
- conf = timing & 0xFF;
- if (itdev->timing10 == 0)
- pci_write_config_byte(pdev, 0x56 + 4 * channel + unit, conf);
- else {
- /* Early revision must be programmed for both together */
- pci_write_config_byte(pdev, 0x56 + 4 * channel, conf);
- pci_write_config_byte(pdev, 0x56 + 4 * channel + 1, conf);
- }
-}
-
-/**
- * it821x_clock_strategy
- * @ap: ATA interface
- * @adev: ATA device being updated
- *
- * Select between the 50 and 66Mhz base clocks to get the best
- * results for this interface.
- */
-
-static void it821x_clock_strategy(struct ata_port *ap, struct ata_device *adev)
-{
- struct pci_dev *pdev = to_pci_dev(ap->host->dev);
- struct it821x_dev *itdev = ap->private_data;
- u8 unit = adev->devno;
- struct ata_device *pair = ata_dev_pair(adev);
-
- int clock, altclock;
- u8 v;
- int sel = 0;
-
- /* Look for the most wanted clocking */
- if (itdev->want[0][0] > itdev->want[1][0]) {
- clock = itdev->want[0][1];
- altclock = itdev->want[1][1];
- } else {
- clock = itdev->want[1][1];
- altclock = itdev->want[0][1];
- }
-
- /* Master doesn't care does the slave ? */
- if (clock == ATA_ANY)
- clock = altclock;
-
- /* Nobody cares - keep the same clock */
- if (clock == ATA_ANY)
- return;
- /* No change */
- if (clock == itdev->clock_mode)
- return;
-
- /* Load this into the controller */
- if (clock == ATA_66)
- itdev->clock_mode = ATA_66;
- else {
- itdev->clock_mode = ATA_50;
- sel = 1;
- }
- pci_read_config_byte(pdev, 0x50, &v);
- v &= ~(1 << (1 + ap->port_no));
- v |= sel << (1 + ap->port_no);
- pci_write_config_byte(pdev, 0x50, v);
-
- /*
- * Reprogram the UDMA/PIO of the pair drive for the switch
- * MWDMA will be dealt with by the dma switcher
- */
- if (pair && itdev->udma[1-unit] != UDMA_OFF) {
- it821x_program_udma(ap, pair, itdev->udma[1-unit]);
- it821x_program(ap, pair, itdev->pio[1-unit]);
- }
- /*
- * Reprogram the UDMA/PIO of our drive for the switch.
- * MWDMA will be dealt with by the dma switcher
- */
- if (itdev->udma[unit] != UDMA_OFF) {
- it821x_program_udma(ap, adev, itdev->udma[unit]);
- it821x_program(ap, adev, itdev->pio[unit]);
- }
-}
-
-/**
- * it821x_passthru_set_piomode - set PIO mode data
- * @ap: ATA interface
- * @adev: ATA device
- *
- * Configure for PIO mode. This is complicated as the register is
- * shared by PIO and MWDMA and for both channels.
- */
-
-static void it821x_passthru_set_piomode(struct ata_port *ap, struct ata_device *adev)
-{
- /* Spec says 89 ref driver uses 88 */
- static const u16 pio[] = { 0xAA88, 0xA382, 0xA181, 0x3332, 0x3121 };
- static const u8 pio_want[] = { ATA_66, ATA_66, ATA_66, ATA_66, ATA_ANY };
-
- struct it821x_dev *itdev = ap->private_data;
- int unit = adev->devno;
- int mode_wanted = adev->pio_mode - XFER_PIO_0;
-
- /* We prefer 66Mhz clock for PIO 0-3, don't care for PIO4 */
- itdev->want[unit][1] = pio_want[mode_wanted];
- itdev->want[unit][0] = 1; /* PIO is lowest priority */
- itdev->pio[unit] = pio[mode_wanted];
- it821x_clock_strategy(ap, adev);
- it821x_program(ap, adev, itdev->pio[unit]);
-}
-
-/**
- * it821x_passthru_set_dmamode - set initial DMA mode data
- * @ap: ATA interface
- * @adev: ATA device
- *
- * Set up the DMA modes. The actions taken depend heavily on the mode
- * to use. If UDMA is used as is hopefully the usual case then the
- * timing register is private and we need only consider the clock. If
- * we are using MWDMA then we have to manage the setting ourself as
- * we switch devices and mode.
- */
-
-static void it821x_passthru_set_dmamode(struct ata_port *ap, struct ata_device *adev)
-{
- static const u16 dma[] = { 0x8866, 0x3222, 0x3121 };
- static const u8 mwdma_want[] = { ATA_ANY, ATA_66, ATA_ANY };
- static const u16 udma[] = { 0x4433, 0x4231, 0x3121, 0x2121, 0x1111, 0x2211, 0x1111 };
- static const u8 udma_want[] = { ATA_ANY, ATA_50, ATA_ANY, ATA_66, ATA_66, ATA_50, ATA_66 };
-
- struct pci_dev *pdev = to_pci_dev(ap->host->dev);
- struct it821x_dev *itdev = ap->private_data;
- int channel = ap->port_no;
- int unit = adev->devno;
- u8 conf;
-
- if (adev->dma_mode >= XFER_UDMA_0) {
- int mode_wanted = adev->dma_mode - XFER_UDMA_0;
-
- itdev->want[unit][1] = udma_want[mode_wanted];
- itdev->want[unit][0] = 3; /* UDMA is high priority */
- itdev->mwdma[unit] = MWDMA_OFF;
- itdev->udma[unit] = udma[mode_wanted];
- if (mode_wanted >= 5)
- itdev->udma[unit] |= 0x8080; /* UDMA 5/6 select on */
-
- /* UDMA on. Again revision 0x10 must do the pair */
- pci_read_config_byte(pdev, 0x50, &conf);
- if (itdev->timing10)
- conf &= channel ? 0x9F: 0xE7;
- else
- conf &= ~ (1 << (3 + 2 * channel + unit));
- pci_write_config_byte(pdev, 0x50, conf);
- it821x_clock_strategy(ap, adev);
- it821x_program_udma(ap, adev, itdev->udma[unit]);
- } else {
- int mode_wanted = adev->dma_mode - XFER_MW_DMA_0;
-
- itdev->want[unit][1] = mwdma_want[mode_wanted];
- itdev->want[unit][0] = 2; /* MWDMA is low priority */
- itdev->mwdma[unit] = dma[mode_wanted];
- itdev->udma[unit] = UDMA_OFF;
-
- /* UDMA bits off - Revision 0x10 do them in pairs */
- pci_read_config_byte(pdev, 0x50, &conf);
- if (itdev->timing10)
- conf |= channel ? 0x60: 0x18;
- else
- conf |= 1 << (3 + 2 * channel + unit);
- pci_write_config_byte(pdev, 0x50, conf);
- it821x_clock_strategy(ap, adev);
- }
-}
+#include "pata_it821x.h"
/**
* it821x_passthru_dma_start - DMA start callback
@@ -846,28 +551,6 @@ static struct ata_port_operations it821x
.port_start = it821x_port_start,
};
-static void it821x_disable_raid(struct pci_dev *pdev)
-{
- /* Neither the RDC nor the IT8211 */
- if (pdev->vendor != PCI_VENDOR_ID_ITE ||
- pdev->device != PCI_DEVICE_ID_ITE_8212)
- return;
-
- /* Reset local CPU, and set BIOS not ready */
- pci_write_config_byte(pdev, 0x5E, 0x01);
-
- /* Set to bypass mode, and reset PCI bus */
- pci_write_config_byte(pdev, 0x50, 0x00);
- pci_write_config_word(pdev, PCI_COMMAND,
- PCI_COMMAND_PARITY | PCI_COMMAND_IO |
- PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
- pci_write_config_word(pdev, 0x40, 0xA0F3);
-
- pci_write_config_dword(pdev,0x4C, 0x02040204);
- pci_write_config_byte(pdev, 0x42, 0x36);
- pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x20);
-}
-
static int it821x_fixup(struct device *dev)
{
struct pci_dev *pdev = to_pci_dev(dev);
Index: b/drivers/ata/pata_it821x.h
===================================================================
--- /dev/null
+++ b/drivers/ata/pata_it821x.h
@@ -0,0 +1,318 @@
+/*
+ * The ITE8212 isn't exactly a standard IDE controller. It has two
+ * modes. In pass through mode then it is an IDE controller. In its smart
+ * mode its actually quite a capable hardware raid controller disguised
+ * as an IDE controller. Smart mode only understands DMA read/write and
+ * identify, none of the fancier commands apply. The IT8211 is identical
+ * in other respects but lacks the raid mode.
+ *
+ * Errata:
+ * o Rev 0x10 also requires master/slave hold the same DMA timings and
+ * cannot do ATAPI MWDMA.
+ * o The identify data for raid volumes lacks CHS info (technically ok)
+ * but also fails to set the LBA28 and other bits. We fix these in
+ * the IDE probe quirk code.
+ * o If you write LBA48 sized I/O's (ie > 256 sector) in smart mode
+ * raid then the controller firmware dies
+ * o Smart mode without RAID doesn't clear all the necessary identify
+ * bits to reduce the command set to the one used
+ *
+ * This has a few impacts on the driver
+ * - In pass through mode we do all the work you would expect
+ * - In smart mode the clocking set up is done by the controller generally
+ * but we must watch the other limits and filter.
+ * - There are a few extra vendor commands that actually talk to the
+ * controller but only work PIO with no IRQ.
+ *
+ * Vendor areas of the identify block in smart mode are used for the
+ * timing and policy set up. Each HDD in raid mode also has a serial
+ * block on the disk. The hardware extra commands are get/set chip status,
+ * rebuild, get rebuild status.
+ *
+ * In Linux the driver supports pass through mode as if the device was
+ * just another IDE controller. If the smart mode is running then
+ * volumes are managed by the controller firmware and each IDE "disk"
+ * is a raid volume. Even more cute - the controller can do automated
+ * hotplug and rebuild.
+ *
+ * The pass through controller itself is a little demented. It has a
+ * flaw that it has a single set of PIO/MWDMA timings per channel so
+ * non UDMA devices restrict each others performance. It also has a
+ * single clock source per channel so mixed UDMA100/133 performance
+ * isn't perfect and we have to pick a clock. Thankfully none of this
+ * matters in smart mode. ATAPI DMA is not currently supported.
+ *
+ * It seems the smart mode is a win for RAID1/RAID10 but otherwise not.
+ */
+
+struct it821x_dev {
+ unsigned int smart:1, /* Are we in smart raid mode */
+ timing10:1; /* Rev 0x10 */
+ u8 clock_mode; /* 0, ATA_50 or ATA_66 */
+ u8 want[2][2]; /* Mode/Pri log for master slave */
+ /* We need these for switching the clock when DMA goes on/off
+ The high byte is the 66Mhz timing */
+ u16 pio[2]; /* Cached PIO values */
+ u16 mwdma[2]; /* Cached MWDMA values */
+ u16 udma[2]; /* Cached UDMA values (per drive) */
+ u16 last_device; /* Master or slave loaded ? */
+};
+
+#define ATA_66 0
+#define ATA_50 1
+#define ATA_ANY 2
+
+#define UDMA_OFF 0
+#define MWDMA_OFF 0
+
+/*
+ * We allow users to force the card into non raid mode without
+ * flashing the alternative BIOS. This is also necessary right now
+ * for embedded platforms that cannot run a PC BIOS but are using this
+ * device.
+ */
+
+static int it8212_noraid;
+
+/**
+ * it821x_program - program the PIO/MWDMA registers
+ * @ap: ATA port
+ * @adev: Device to program
+ * @timing: Timing value (66Mhz in top 8bits, 50 in the low 8)
+ *
+ * Program the PIO/MWDMA timing for this channel according to the
+ * current clock. These share the same register so are managed by
+ * the DMA start/stop sequence as with the old driver.
+ */
+
+static void it821x_program(struct ata_port *ap, struct ata_device *adev, u16 timing)
+{
+ struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+ struct it821x_dev *itdev = ap->private_data;
+ int channel = ap->port_no;
+ u8 conf;
+
+ /* Program PIO/MWDMA timing bits */
+ if (itdev->clock_mode == ATA_66)
+ conf = timing >> 8;
+ else
+ conf = timing & 0xFF;
+ pci_write_config_byte(pdev, 0x54 + 4 * channel, conf);
+}
+
+
+/**
+ * it821x_program_udma - program the UDMA registers
+ * @ap: ATA port
+ * @adev: ATA device to update
+ * @timing: Timing bits. Top 8 are for 66Mhz bottom for 50Mhz
+ *
+ * Program the UDMA timing for this drive according to the
+ * current clock. Handles the dual clocks and also knows about
+ * the errata on the 0x10 revision. The UDMA errata is partly handled
+ * here and partly in start_dma.
+ */
+
+static void it821x_program_udma(struct ata_port *ap, struct ata_device *adev, u16 timing)
+{
+ struct it821x_dev *itdev = ap->private_data;
+ struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+ int channel = ap->port_no;
+ int unit = adev->devno;
+ u8 conf;
+
+ /* Program UDMA timing bits */
+ if (itdev->clock_mode == ATA_66)
+ conf = timing >> 8;
+ else
+ conf = timing & 0xFF;
+ if (itdev->timing10 == 0)
+ pci_write_config_byte(pdev, 0x56 + 4 * channel + unit, conf);
+ else {
+ /* Early revision must be programmed for both together */
+ pci_write_config_byte(pdev, 0x56 + 4 * channel, conf);
+ pci_write_config_byte(pdev, 0x56 + 4 * channel + 1, conf);
+ }
+}
+
+/**
+ * it821x_clock_strategy
+ * @ap: ATA interface
+ * @adev: ATA device being updated
+ *
+ * Select between the 50 and 66Mhz base clocks to get the best
+ * results for this interface.
+ */
+
+static void it821x_clock_strategy(struct ata_port *ap, struct ata_device *adev)
+{
+ struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+ struct it821x_dev *itdev = ap->private_data;
+ u8 unit = adev->devno;
+ struct ata_device *pair = ata_dev_pair(adev);
+
+ int clock, altclock;
+ u8 v;
+ int sel = 0;
+
+ /* Look for the most wanted clocking */
+ if (itdev->want[0][0] > itdev->want[1][0]) {
+ clock = itdev->want[0][1];
+ altclock = itdev->want[1][1];
+ } else {
+ clock = itdev->want[1][1];
+ altclock = itdev->want[0][1];
+ }
+
+ /* Master doesn't care does the slave ? */
+ if (clock == ATA_ANY)
+ clock = altclock;
+
+ /* Nobody cares - keep the same clock */
+ if (clock == ATA_ANY)
+ return;
+ /* No change */
+ if (clock == itdev->clock_mode)
+ return;
+
+ /* Load this into the controller */
+ if (clock == ATA_66)
+ itdev->clock_mode = ATA_66;
+ else {
+ itdev->clock_mode = ATA_50;
+ sel = 1;
+ }
+ pci_read_config_byte(pdev, 0x50, &v);
+ v &= ~(1 << (1 + ap->port_no));
+ v |= sel << (1 + ap->port_no);
+ pci_write_config_byte(pdev, 0x50, v);
+
+ /*
+ * Reprogram the UDMA/PIO of the pair drive for the switch
+ * MWDMA will be dealt with by the dma switcher
+ */
+ if (pair && itdev->udma[1-unit] != UDMA_OFF) {
+ it821x_program_udma(ap, pair, itdev->udma[1-unit]);
+ it821x_program(ap, pair, itdev->pio[1-unit]);
+ }
+ /*
+ * Reprogram the UDMA/PIO of our drive for the switch.
+ * MWDMA will be dealt with by the dma switcher
+ */
+ if (itdev->udma[unit] != UDMA_OFF) {
+ it821x_program_udma(ap, adev, itdev->udma[unit]);
+ it821x_program(ap, adev, itdev->pio[unit]);
+ }
+}
+
+/**
+ * it821x_passthru_set_piomode - set PIO mode data
+ * @ap: ATA interface
+ * @adev: ATA device
+ *
+ * Configure for PIO mode. This is complicated as the register is
+ * shared by PIO and MWDMA and for both channels.
+ */
+
+static void it821x_passthru_set_piomode(struct ata_port *ap, struct ata_device *adev)
+{
+ /* Spec says 89 ref driver uses 88 */
+ static const u16 pio[] = { 0xAA88, 0xA382, 0xA181, 0x3332, 0x3121 };
+ static const u8 pio_want[] = { ATA_66, ATA_66, ATA_66, ATA_66, ATA_ANY };
+
+ struct it821x_dev *itdev = ap->private_data;
+ int unit = adev->devno;
+ int mode_wanted = adev->pio_mode - XFER_PIO_0;
+
+ /* We prefer 66Mhz clock for PIO 0-3, don't care for PIO4 */
+ itdev->want[unit][1] = pio_want[mode_wanted];
+ itdev->want[unit][0] = 1; /* PIO is lowest priority */
+ itdev->pio[unit] = pio[mode_wanted];
+ it821x_clock_strategy(ap, adev);
+ it821x_program(ap, adev, itdev->pio[unit]);
+}
+
+/**
+ * it821x_passthru_set_dmamode - set initial DMA mode data
+ * @ap: ATA interface
+ * @adev: ATA device
+ *
+ * Set up the DMA modes. The actions taken depend heavily on the mode
+ * to use. If UDMA is used as is hopefully the usual case then the
+ * timing register is private and we need only consider the clock. If
+ * we are using MWDMA then we have to manage the setting ourself as
+ * we switch devices and mode.
+ */
+
+static void it821x_passthru_set_dmamode(struct ata_port *ap, struct ata_device *adev)
+{
+ static const u16 dma[] = { 0x8866, 0x3222, 0x3121 };
+ static const u8 mwdma_want[] = { ATA_ANY, ATA_66, ATA_ANY };
+ static const u16 udma[] = { 0x4433, 0x4231, 0x3121, 0x2121, 0x1111, 0x2211, 0x1111 };
+ static const u8 udma_want[] = { ATA_ANY, ATA_50, ATA_ANY, ATA_66, ATA_66, ATA_50, ATA_66 };
+
+ struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+ struct it821x_dev *itdev = ap->private_data;
+ int channel = ap->port_no;
+ int unit = adev->devno;
+ u8 conf;
+
+ if (adev->dma_mode >= XFER_UDMA_0) {
+ int mode_wanted = adev->dma_mode - XFER_UDMA_0;
+
+ itdev->want[unit][1] = udma_want[mode_wanted];
+ itdev->want[unit][0] = 3; /* UDMA is high priority */
+ itdev->mwdma[unit] = MWDMA_OFF;
+ itdev->udma[unit] = udma[mode_wanted];
+ if (mode_wanted >= 5)
+ itdev->udma[unit] |= 0x8080; /* UDMA 5/6 select on */
+
+ /* UDMA on. Again revision 0x10 must do the pair */
+ pci_read_config_byte(pdev, 0x50, &conf);
+ if (itdev->timing10)
+ conf &= channel ? 0x9F : 0xE7;
+ else
+ conf &= ~(1 << (3 + 2 * channel + unit));
+ pci_write_config_byte(pdev, 0x50, conf);
+ it821x_clock_strategy(ap, adev);
+ it821x_program_udma(ap, adev, itdev->udma[unit]);
+ } else {
+ int mode_wanted = adev->dma_mode - XFER_MW_DMA_0;
+
+ itdev->want[unit][1] = mwdma_want[mode_wanted];
+ itdev->want[unit][0] = 2; /* MWDMA is low priority */
+ itdev->mwdma[unit] = dma[mode_wanted];
+ itdev->udma[unit] = UDMA_OFF;
+
+ /* UDMA bits off - Revision 0x10 do them in pairs */
+ pci_read_config_byte(pdev, 0x50, &conf);
+ if (itdev->timing10)
+ conf |= channel ? 0x60 : 0x18;
+ else
+ conf |= 1 << (3 + 2 * channel + unit);
+ pci_write_config_byte(pdev, 0x50, conf);
+ it821x_clock_strategy(ap, adev);
+ }
+}
+
+static void it821x_disable_raid(struct pci_dev *pdev)
+{
+ /* Neither the RDC nor the IT8211 */
+ if (pdev->vendor != PCI_VENDOR_ID_ITE ||
+ pdev->device != PCI_DEVICE_ID_ITE_8212)
+ return;
+
+ /* Reset local CPU, and set BIOS not ready */
+ pci_write_config_byte(pdev, 0x5E, 0x01);
+
+ /* Set to bypass mode, and reset PCI bus */
+ pci_write_config_byte(pdev, 0x50, 0x00);
+ pci_write_config_word(pdev, PCI_COMMAND,
+ PCI_COMMAND_PARITY | PCI_COMMAND_IO |
+ PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
+ pci_write_config_word(pdev, 0x40, 0xA0F3);
+
+ pci_write_config_dword(pdev, 0x4C, 0x02040204);
+ pci_write_config_byte(pdev, 0x42, 0x36);
+ pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x20);
+}
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 55/68] it821x: convert to ide2libata
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (53 preceding siblings ...)
2010-01-29 16:08 ` [PATCH 54/68] pata_it821x: move code to be re-used by ide2libata to pata_it821x.h Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:09 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:09 ` [PATCH 56/68] pata_pdc202xx_old: move code to be re-used by ide2libata to pata_pdc202xx_old.h Bartlomiej Zolnierkiewicz
` (13 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:09 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] it821x: convert to ide2libata
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ata/pata_it821x.h | 21 ++
drivers/ide/it821x.c | 373 ----------------------------------------------
2 files changed, 28 insertions(+), 366 deletions(-)
Index: b/drivers/ata/pata_it821x.h
===================================================================
--- a/drivers/ata/pata_it821x.h
+++ b/drivers/ata/pata_it821x.h
@@ -55,7 +55,11 @@ struct it821x_dev {
u16 pio[2]; /* Cached PIO values */
u16 mwdma[2]; /* Cached MWDMA values */
u16 udma[2]; /* Cached UDMA values (per drive) */
+#ifndef __IDE2LIBATA
u16 last_device; /* Master or slave loaded ? */
+#else
+ u16 quirks;
+#endif
};
#define ATA_66 0
@@ -223,7 +227,21 @@ static void it821x_passthru_set_piomode(
struct it821x_dev *itdev = ap->private_data;
int unit = adev->devno;
int mode_wanted = adev->pio_mode - XFER_PIO_0;
+#ifdef __IDE2LIBATA
+ struct ata_device *pair = ata_dev_pair(adev);
+ /*
+ * Compute the best PIO mode we can for a given device. We must
+ * pick a speed that does not cause problems with the other device
+ * on the cable.
+ */
+ if (pair) {
+ u8 pair_pio = pair->pio_mode - XFER_PIO_0;
+ /* trim PIO to the slowest of the master/slave */
+ if (pair_pio < mode_wanted)
+ mode_wanted = pair_pio;
+ }
+#endif
/* We prefer 66Mhz clock for PIO 0-3, don't care for PIO4 */
itdev->want[unit][1] = pio_want[mode_wanted];
itdev->want[unit][0] = 1; /* PIO is lowest priority */
@@ -297,11 +315,12 @@ static void it821x_passthru_set_dmamode(
static void it821x_disable_raid(struct pci_dev *pdev)
{
+#ifndef __IDE2LIBATA
/* Neither the RDC nor the IT8211 */
if (pdev->vendor != PCI_VENDOR_ID_ITE ||
pdev->device != PCI_DEVICE_ID_ITE_8212)
return;
-
+#endif
/* Reset local CPU, and set BIOS not ready */
pci_write_config_byte(pdev, 0x5E, 0x01);
Index: b/drivers/ide/it821x.c
===================================================================
--- a/drivers/ide/it821x.c
+++ b/drivers/ide/it821x.c
@@ -8,51 +8,6 @@
* Documentation:
* Datasheet is freely available, some other documents under NDA.
*
- * The ITE8212 isn't exactly a standard IDE controller. It has two
- * modes. In pass through mode then it is an IDE controller. In its smart
- * mode its actually quite a capable hardware raid controller disguised
- * as an IDE controller. Smart mode only understands DMA read/write and
- * identify, none of the fancier commands apply. The IT8211 is identical
- * in other respects but lacks the raid mode.
- *
- * Errata:
- * o Rev 0x10 also requires master/slave hold the same DMA timings and
- * cannot do ATAPI MWDMA.
- * o The identify data for raid volumes lacks CHS info (technically ok)
- * but also fails to set the LBA28 and other bits. We fix these in
- * the IDE probe quirk code.
- * o If you write LBA48 sized I/O's (ie > 256 sector) in smart mode
- * raid then the controller firmware dies
- * o Smart mode without RAID doesn't clear all the necessary identify
- * bits to reduce the command set to the one used
- *
- * This has a few impacts on the driver
- * - In pass through mode we do all the work you would expect
- * - In smart mode the clocking set up is done by the controller generally
- * but we must watch the other limits and filter.
- * - There are a few extra vendor commands that actually talk to the
- * controller but only work PIO with no IRQ.
- *
- * Vendor areas of the identify block in smart mode are used for the
- * timing and policy set up. Each HDD in raid mode also has a serial
- * block on the disk. The hardware extra commands are get/set chip status,
- * rebuild, get rebuild status.
- *
- * In Linux the driver supports pass through mode as if the device was
- * just another IDE controller. If the smart mode is running then
- * volumes are managed by the controller firmware and each IDE "disk"
- * is a raid volume. Even more cute - the controller can do automated
- * hotplug and rebuild.
- *
- * The pass through controller itself is a little demented. It has a
- * flaw that it has a single set of PIO/MWDMA timings per channel so
- * non UDMA devices restrict each others performance. It also has a
- * single clock source per channel so mixed UDMA100/133 performance
- * isn't perfect and we have to pick a clock. Thankfully none of this
- * matters in smart mode. ATAPI DMA is not currently supported.
- *
- * It seems the smart mode is a win for RAID1/RAID10 but otherwise not.
- *
* TODO
* - ATAPI UDMA is ok but not MWDMA it seems
* - RAID configuration ioctls
@@ -69,280 +24,8 @@
#define QUIRK_VORTEX86 1
-struct it821x_dev
-{
- unsigned int smart:1, /* Are we in smart raid mode */
- timing10:1; /* Rev 0x10 */
- u8 clock_mode; /* 0, ATA_50 or ATA_66 */
- u8 want[2][2]; /* Mode/Pri log for master slave */
- /* We need these for switching the clock when DMA goes on/off
- The high byte is the 66Mhz timing */
- u16 pio[2]; /* Cached PIO values */
- u16 mwdma[2]; /* Cached MWDMA values */
- u16 udma[2]; /* Cached UDMA values (per drive) */
- u16 quirks;
-};
-
-#define ATA_66 0
-#define ATA_50 1
-#define ATA_ANY 2
-
-#define UDMA_OFF 0
-#define MWDMA_OFF 0
-
-/*
- * We allow users to force the card into non raid mode without
- * flashing the alternative BIOS. This is also necessary right now
- * for embedded platforms that cannot run a PC BIOS but are using this
- * device.
- */
-
-static int it8212_noraid;
-
-/**
- * it821x_program - program the PIO/MWDMA registers
- * @drive: drive to tune
- * @timing: timing info
- *
- * Program the PIO/MWDMA timing for this channel according to the
- * current clock.
- */
-
-static void it821x_program(ide_drive_t *drive, u16 timing)
-{
- ide_hwif_t *hwif = drive->hwif;
- struct pci_dev *dev = to_pci_dev(hwif->dev);
- struct it821x_dev *itdev = ide_get_hwifdata(hwif);
- int channel = hwif->channel;
- u8 conf;
-
- /* Program PIO/MWDMA timing bits */
- if(itdev->clock_mode == ATA_66)
- conf = timing >> 8;
- else
- conf = timing & 0xFF;
-
- pci_write_config_byte(dev, 0x54 + 4 * channel, conf);
-}
-
-/**
- * it821x_program_udma - program the UDMA registers
- * @drive: drive to tune
- * @timing: timing info
- *
- * Program the UDMA timing for this drive according to the
- * current clock.
- */
-
-static void it821x_program_udma(ide_drive_t *drive, u16 timing)
-{
- ide_hwif_t *hwif = drive->hwif;
- struct pci_dev *dev = to_pci_dev(hwif->dev);
- struct it821x_dev *itdev = ide_get_hwifdata(hwif);
- int channel = hwif->channel;
- u8 unit = drive->dn & 1, conf;
-
- /* Program UDMA timing bits */
- if(itdev->clock_mode == ATA_66)
- conf = timing >> 8;
- else
- conf = timing & 0xFF;
-
- if (itdev->timing10 == 0)
- pci_write_config_byte(dev, 0x56 + 4 * channel + unit, conf);
- else {
- pci_write_config_byte(dev, 0x56 + 4 * channel, conf);
- pci_write_config_byte(dev, 0x56 + 4 * channel + 1, conf);
- }
-}
-
-/**
- * it821x_clock_strategy
- * @drive: drive to set up
- *
- * Select between the 50 and 66Mhz base clocks to get the best
- * results for this interface.
- */
-
-static void it821x_clock_strategy(ide_drive_t *drive)
-{
- ide_hwif_t *hwif = drive->hwif;
- struct pci_dev *dev = to_pci_dev(hwif->dev);
- struct it821x_dev *itdev = ide_get_hwifdata(hwif);
- ide_drive_t *pair = ide_get_pair_dev(drive);
- int clock, altclock, sel = 0;
- u8 unit = drive->dn & 1, v;
-
- if(itdev->want[0][0] > itdev->want[1][0]) {
- clock = itdev->want[0][1];
- altclock = itdev->want[1][1];
- } else {
- clock = itdev->want[1][1];
- altclock = itdev->want[0][1];
- }
-
- /*
- * if both clocks can be used for the mode with the higher priority
- * use the clock needed by the mode with the lower priority
- */
- if (clock == ATA_ANY)
- clock = altclock;
-
- /* Nobody cares - keep the same clock */
- if(clock == ATA_ANY)
- return;
- /* No change */
- if(clock == itdev->clock_mode)
- return;
-
- /* Load this into the controller ? */
- if(clock == ATA_66)
- itdev->clock_mode = ATA_66;
- else {
- itdev->clock_mode = ATA_50;
- sel = 1;
- }
-
- pci_read_config_byte(dev, 0x50, &v);
- v &= ~(1 << (1 + hwif->channel));
- v |= sel << (1 + hwif->channel);
- pci_write_config_byte(dev, 0x50, v);
-
- /*
- * Reprogram the UDMA/PIO of the pair drive for the switch
- * MWDMA will be dealt with by the dma switcher
- */
- if(pair && itdev->udma[1-unit] != UDMA_OFF) {
- it821x_program_udma(pair, itdev->udma[1-unit]);
- it821x_program(pair, itdev->pio[1-unit]);
- }
- /*
- * Reprogram the UDMA/PIO of our drive for the switch.
- * MWDMA will be dealt with by the dma switcher
- */
- if(itdev->udma[unit] != UDMA_OFF) {
- it821x_program_udma(drive, itdev->udma[unit]);
- it821x_program(drive, itdev->pio[unit]);
- }
-}
-
-/**
- * it821x_set_pio_mode - set host controller for PIO mode
- * @hwif: port
- * @drive: drive
- *
- * Tune the host to the desired PIO mode taking into the consideration
- * the maximum PIO mode supported by the other device on the cable.
- */
-
-static void it821x_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
-{
- struct it821x_dev *itdev = ide_get_hwifdata(hwif);
- ide_drive_t *pair = ide_get_pair_dev(drive);
- const u8 pio = drive->pio_mode - XFER_PIO_0;
- u8 unit = drive->dn & 1, set_pio = pio;
-
- /* Spec says 89 ref driver uses 88 */
- static u16 pio_timings[]= { 0xAA88, 0xA382, 0xA181, 0x3332, 0x3121 };
- static u8 pio_want[] = { ATA_66, ATA_66, ATA_66, ATA_66, ATA_ANY };
-
- /*
- * Compute the best PIO mode we can for a given device. We must
- * pick a speed that does not cause problems with the other device
- * on the cable.
- */
- if (pair) {
- u8 pair_pio = pair->pio_mode - XFER_PIO_0;
- /* trim PIO to the slowest of the master/slave */
- if (pair_pio < set_pio)
- set_pio = pair_pio;
- }
-
- /* We prefer 66Mhz clock for PIO 0-3, don't care for PIO4 */
- itdev->want[unit][1] = pio_want[set_pio];
- itdev->want[unit][0] = 1; /* PIO is lowest priority */
- itdev->pio[unit] = pio_timings[set_pio];
- it821x_clock_strategy(drive);
- it821x_program(drive, itdev->pio[unit]);
-}
-
-/**
- * it821x_tune_mwdma - tune a channel for MWDMA
- * @drive: drive to set up
- * @mode_wanted: the target operating mode
- *
- * Load the timing settings for this device mode into the
- * controller when doing MWDMA in pass through mode. The caller
- * must manage the whole lack of per device MWDMA/PIO timings and
- * the shared MWDMA/PIO timing register.
- */
-
-static void it821x_tune_mwdma(ide_drive_t *drive, u8 mode_wanted)
-{
- ide_hwif_t *hwif = drive->hwif;
- struct pci_dev *dev = to_pci_dev(hwif->dev);
- struct it821x_dev *itdev = (void *)ide_get_hwifdata(hwif);
- u8 unit = drive->dn & 1, channel = hwif->channel, conf;
-
- static u16 dma[] = { 0x8866, 0x3222, 0x3121 };
- static u8 mwdma_want[] = { ATA_ANY, ATA_66, ATA_ANY };
-
- itdev->want[unit][1] = mwdma_want[mode_wanted];
- itdev->want[unit][0] = 2; /* MWDMA is low priority */
- itdev->mwdma[unit] = dma[mode_wanted];
- itdev->udma[unit] = UDMA_OFF;
-
- /* UDMA bits off - Revision 0x10 do them in pairs */
- pci_read_config_byte(dev, 0x50, &conf);
- if (itdev->timing10)
- conf |= channel ? 0x60: 0x18;
- else
- conf |= 1 << (3 + 2 * channel + unit);
- pci_write_config_byte(dev, 0x50, conf);
-
- it821x_clock_strategy(drive);
- /* FIXME: do we need to program this ? */
- /* it821x_program(drive, itdev->mwdma[unit]); */
-}
-
-/**
- * it821x_tune_udma - tune a channel for UDMA
- * @drive: drive to set up
- * @mode_wanted: the target operating mode
- *
- * Load the timing settings for this device mode into the
- * controller when doing UDMA modes in pass through.
- */
-
-static void it821x_tune_udma(ide_drive_t *drive, u8 mode_wanted)
-{
- ide_hwif_t *hwif = drive->hwif;
- struct pci_dev *dev = to_pci_dev(hwif->dev);
- struct it821x_dev *itdev = ide_get_hwifdata(hwif);
- u8 unit = drive->dn & 1, channel = hwif->channel, conf;
-
- static u16 udma[] = { 0x4433, 0x4231, 0x3121, 0x2121, 0x1111, 0x2211, 0x1111 };
- static u8 udma_want[] = { ATA_ANY, ATA_50, ATA_ANY, ATA_66, ATA_66, ATA_50, ATA_66 };
-
- itdev->want[unit][1] = udma_want[mode_wanted];
- itdev->want[unit][0] = 3; /* UDMA is high priority */
- itdev->mwdma[unit] = MWDMA_OFF;
- itdev->udma[unit] = udma[mode_wanted];
- if(mode_wanted >= 5)
- itdev->udma[unit] |= 0x8080; /* UDMA 5/6 select on */
-
- /* UDMA on. Again revision 0x10 must do the pair */
- pci_read_config_byte(dev, 0x50, &conf);
- if (itdev->timing10)
- conf &= channel ? 0x9F: 0xE7;
- else
- conf &= ~ (1 << (3 + 2 * channel + unit));
- pci_write_config_byte(dev, 0x50, conf);
-
- it821x_clock_strategy(drive);
- it821x_program_udma(drive, itdev->udma[unit]);
-
-}
+#include <linux/ide2libata.h>
+#include "../ata/pata_it821x.h"
/**
* it821x_dma_read - DMA hook
@@ -364,9 +47,9 @@ static void it821x_dma_start(ide_drive_t
u8 unit = drive->dn & 1;
if(itdev->mwdma[unit] != MWDMA_OFF)
- it821x_program(drive, itdev->mwdma[unit]);
+ it821x_program(hwif, drive, itdev->mwdma[unit]);
else if(itdev->udma[unit] != UDMA_OFF && itdev->timing10)
- it821x_program_udma(drive, itdev->udma[unit]);
+ it821x_program_udma(hwif, drive, itdev->udma[unit]);
ide_dma_start(drive);
}
@@ -387,34 +70,11 @@ static int it821x_dma_end(ide_drive_t *d
u8 unit = drive->dn & 1;
if(itdev->mwdma[unit] != MWDMA_OFF)
- it821x_program(drive, itdev->pio[unit]);
+ it821x_program(hwif, drive, itdev->pio[unit]);
return ret;
}
/**
- * it821x_set_dma_mode - set host controller for DMA mode
- * @hwif: port
- * @drive: drive
- *
- * Tune the ITE chipset for the desired DMA mode.
- */
-
-static void it821x_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
-{
- const u8 speed = drive->dma_mode;
-
- /*
- * MWDMA tuning is really hard because our MWDMA and PIO
- * timings are kept in the same place. We can switch in the
- * host dma on/off callbacks.
- */
- if (speed >= XFER_UDMA_0 && speed <= XFER_UDMA_6)
- it821x_tune_udma(drive, speed - XFER_UDMA_0);
- else if (speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2)
- it821x_tune_mwdma(drive, speed - XFER_MW_DMA_0);
-}
-
-/**
* it821x_cable_detect - cable detection
* @hwif: interface to check
*
@@ -587,23 +247,6 @@ static void __devinit init_hwif_it821x(i
}
}
-static void it8212_disable_raid(struct pci_dev *dev)
-{
- /* Reset local CPU, and set BIOS not ready */
- pci_write_config_byte(dev, 0x5E, 0x01);
-
- /* Set to bypass mode, and reset PCI bus */
- pci_write_config_byte(dev, 0x50, 0x00);
- pci_write_config_word(dev, PCI_COMMAND,
- PCI_COMMAND_PARITY | PCI_COMMAND_IO |
- PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
- pci_write_config_word(dev, 0x40, 0xA0F3);
-
- pci_write_config_dword(dev,0x4C, 0x02040204);
- pci_write_config_byte(dev, 0x42, 0x36);
- pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0x20);
-}
-
static int init_chipset_it821x(struct pci_dev *dev)
{
u8 conf;
@@ -613,7 +256,7 @@ static int init_chipset_it821x(struct pc
if (it8212_noraid) {
printk(KERN_INFO DRV_NAME " %s: forcing bypass mode\n",
pci_name(dev));
- it8212_disable_raid(dev);
+ it821x_disable_raid(dev);
}
pci_read_config_byte(dev, 0x50, &conf);
printk(KERN_INFO DRV_NAME " %s: controller in %s mode\n",
@@ -623,8 +266,8 @@ static int init_chipset_it821x(struct pc
static const struct ide_port_ops it821x_port_ops = {
/* it821x_set_{pio,dma}_mode() are only used in pass-through mode */
- .set_pio_mode = it821x_set_pio_mode,
- .set_dma_mode = it821x_set_dma_mode,
+ .set_pio_mode = it821x_passthru_set_piomode,
+ .set_dma_mode = it821x_passthru_set_dmamode,
.quirkproc = it821x_quirkproc,
.cable_detect = it821x_cable_detect,
};
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 56/68] pata_pdc202xx_old: move code to be re-used by ide2libata to pata_pdc202xx_old.h
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (54 preceding siblings ...)
2010-01-29 16:09 ` [PATCH 55/68] it821x: convert to ide2libata Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:09 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:09 ` [PATCH 57/68] pdc202xx_old: convert to ide2libata Bartlomiej Zolnierkiewicz
` (12 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:09 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] pata_pdc202xx_old: move code to be re-used by ide2libata to pata_pdc202xx_old.h
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ata/pata_pdc202xx_old.c | 109 ----------------------------------------
drivers/ata/pata_pdc202xx_old.h | 109 ++++++++++++++++++++++++++++++++++++++++
2 files changed, 110 insertions(+), 108 deletions(-)
Index: b/drivers/ata/pata_pdc202xx_old.c
===================================================================
--- a/drivers/ata/pata_pdc202xx_old.c
+++ b/drivers/ata/pata_pdc202xx_old.c
@@ -24,114 +24,7 @@
#define DRV_NAME "pata_pdc202xx_old"
#define DRV_VERSION "0.4.3"
-static int pdc2026x_cable_detect(struct ata_port *ap)
-{
- struct pci_dev *pdev = to_pci_dev(ap->host->dev);
- u16 cis;
-
- pci_read_config_word(pdev, 0x50, &cis);
- if (cis & (1 << (10 + ap->port_no)))
- return ATA_CBL_PATA40;
- return ATA_CBL_PATA80;
-}
-
-/**
- * pdc202xx_configure_piomode - set chip PIO timing
- * @ap: ATA interface
- * @adev: ATA device
- * @pio: PIO mode
- *
- * Called to do the PIO mode setup. Our timing registers are shared
- * so a configure_dmamode call will undo any work we do here and vice
- * versa
- */
-
-static void pdc202xx_configure_piomode(struct ata_port *ap, struct ata_device *adev, int pio)
-{
- struct pci_dev *pdev = to_pci_dev(ap->host->dev);
- int port = 0x60 + 8 * ap->port_no + 4 * adev->devno;
- static u16 pio_timing[5] = {
- 0x0913, 0x050C , 0x0308, 0x0206, 0x0104
- };
- u8 r_ap, r_bp;
-
- pci_read_config_byte(pdev, port, &r_ap);
- pci_read_config_byte(pdev, port + 1, &r_bp);
- r_ap &= ~0x3F; /* Preserve ERRDY_EN, SYNC_IN */
- r_bp &= ~0x1F;
- r_ap |= (pio_timing[pio] >> 8);
- r_bp |= (pio_timing[pio] & 0xFF);
-
- if (ata_pio_need_iordy(adev))
- r_ap |= 0x20; /* IORDY enable */
- if (adev->class == ATA_DEV_ATA)
- r_ap |= 0x10; /* FIFO enable */
- pci_write_config_byte(pdev, port, r_ap);
- pci_write_config_byte(pdev, port + 1, r_bp);
-}
-
-/**
- * pdc202xx_set_piomode - set initial PIO mode data
- * @ap: ATA interface
- * @adev: ATA device
- *
- * Called to do the PIO mode setup. Our timing registers are shared
- * but we want to set the PIO timing by default.
- */
-
-static void pdc202xx_set_piomode(struct ata_port *ap, struct ata_device *adev)
-{
- pdc202xx_configure_piomode(ap, adev, adev->pio_mode - XFER_PIO_0);
-}
-
-/**
- * pdc202xx_configure_dmamode - set DMA mode in chip
- * @ap: ATA interface
- * @adev: ATA device
- *
- * Load DMA cycle times into the chip ready for a DMA transfer
- * to occur.
- */
-
-static void pdc202xx_set_dmamode(struct ata_port *ap, struct ata_device *adev)
-{
- struct pci_dev *pdev = to_pci_dev(ap->host->dev);
- int port = 0x60 + 8 * ap->port_no + 4 * adev->devno;
- static u8 udma_timing[6][2] = {
- { 0x60, 0x03 }, /* 33 Mhz Clock */
- { 0x40, 0x02 },
- { 0x20, 0x01 },
- { 0x40, 0x02 }, /* 66 Mhz Clock */
- { 0x20, 0x01 },
- { 0x20, 0x01 }
- };
- static u8 mdma_timing[3][2] = {
- { 0xe0, 0x0f },
- { 0x60, 0x04 },
- { 0x60, 0x03 },
- };
- u8 r_bp, r_cp;
-
- pci_read_config_byte(pdev, port + 1, &r_bp);
- pci_read_config_byte(pdev, port + 2, &r_cp);
-
- r_bp &= ~0xE0;
- r_cp &= ~0x0F;
-
- if (adev->dma_mode >= XFER_UDMA_0) {
- int speed = adev->dma_mode - XFER_UDMA_0;
- r_bp |= udma_timing[speed][0];
- r_cp |= udma_timing[speed][1];
-
- } else {
- int speed = adev->dma_mode - XFER_MW_DMA_0;
- r_bp |= mdma_timing[speed][0];
- r_cp |= mdma_timing[speed][1];
- }
- pci_write_config_byte(pdev, port + 1, r_bp);
- pci_write_config_byte(pdev, port + 2, r_cp);
-
-}
+#include "pata_pdc202xx_old.h"
/**
* pdc2026x_bmdma_start - DMA engine begin
Index: b/drivers/ata/pata_pdc202xx_old.h
===================================================================
--- /dev/null
+++ b/drivers/ata/pata_pdc202xx_old.h
@@ -0,0 +1,109 @@
+
+static int pdc2026x_cable_detect(struct ata_port *ap)
+{
+ struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+ u16 cis;
+
+ pci_read_config_word(pdev, 0x50, &cis);
+ if (cis & (1 << (10 + ap->port_no)))
+ return ATA_CBL_PATA40;
+ return ATA_CBL_PATA80;
+}
+
+/**
+ * pdc202xx_configure_piomode - set chip PIO timing
+ * @ap: ATA interface
+ * @adev: ATA device
+ * @pio: PIO mode
+ *
+ * Called to do the PIO mode setup. Our timing registers are shared
+ * so a configure_dmamode call will undo any work we do here and vice
+ * versa
+ */
+
+static void pdc202xx_configure_piomode(struct ata_port *ap, struct ata_device *adev, int pio)
+{
+ struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+ int port = 0x60 + 8 * ap->port_no + 4 * adev->devno;
+ static u16 pio_timing[5] = {
+ 0x0913, 0x050C , 0x0308, 0x0206, 0x0104
+ };
+ u8 r_ap, r_bp;
+
+ pci_read_config_byte(pdev, port, &r_ap);
+ pci_read_config_byte(pdev, port + 1, &r_bp);
+ r_ap &= ~0x3F; /* Preserve ERRDY_EN, SYNC_IN */
+ r_bp &= ~0x1F;
+ r_ap |= (pio_timing[pio] >> 8);
+ r_bp |= (pio_timing[pio] & 0xFF);
+
+ if (ata_pio_need_iordy(adev))
+ r_ap |= 0x20; /* IORDY enable */
+ if (adev->class == ATA_DEV_ATA)
+ r_ap |= 0x10; /* FIFO enable */
+ pci_write_config_byte(pdev, port, r_ap);
+ pci_write_config_byte(pdev, port + 1, r_bp);
+}
+
+/**
+ * pdc202xx_set_piomode - set initial PIO mode data
+ * @ap: ATA interface
+ * @adev: ATA device
+ *
+ * Called to do the PIO mode setup. Our timing registers are shared
+ * but we want to set the PIO timing by default.
+ */
+
+static void pdc202xx_set_piomode(struct ata_port *ap, struct ata_device *adev)
+{
+ pdc202xx_configure_piomode(ap, adev, adev->pio_mode - XFER_PIO_0);
+}
+
+/**
+ * pdc202xx_configure_dmamode - set DMA mode in chip
+ * @ap: ATA interface
+ * @adev: ATA device
+ *
+ * Load DMA cycle times into the chip ready for a DMA transfer
+ * to occur.
+ */
+
+static void pdc202xx_set_dmamode(struct ata_port *ap, struct ata_device *adev)
+{
+ struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+ int port = 0x60 + 8 * ap->port_no + 4 * adev->devno;
+ static u8 udma_timing[6][2] = {
+ { 0x60, 0x03 }, /* 33 Mhz Clock */
+ { 0x40, 0x02 },
+ { 0x20, 0x01 },
+ { 0x40, 0x02 }, /* 66 Mhz Clock */
+ { 0x20, 0x01 },
+ { 0x20, 0x01 }
+ };
+ static u8 mdma_timing[3][2] = {
+ { 0xe0, 0x0f },
+ { 0x60, 0x04 },
+ { 0x60, 0x03 },
+ };
+ u8 r_bp, r_cp;
+
+ pci_read_config_byte(pdev, port + 1, &r_bp);
+ pci_read_config_byte(pdev, port + 2, &r_cp);
+
+ r_bp &= ~0xE0;
+ r_cp &= ~0x0F;
+
+ if (adev->dma_mode >= XFER_UDMA_0) {
+ int speed = adev->dma_mode - XFER_UDMA_0;
+ r_bp |= udma_timing[speed][0];
+ r_cp |= udma_timing[speed][1];
+
+ } else {
+ int speed = adev->dma_mode - XFER_MW_DMA_0;
+ r_bp |= mdma_timing[speed][0];
+ r_cp |= mdma_timing[speed][1];
+ }
+ pci_write_config_byte(pdev, port + 1, r_bp);
+ pci_write_config_byte(pdev, port + 2, r_cp);
+
+}
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 57/68] pdc202xx_old: convert to ide2libata
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (55 preceding siblings ...)
2010-01-29 16:09 ` [PATCH 56/68] pata_pdc202xx_old: move code to be re-used by ide2libata to pata_pdc202xx_old.h Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:09 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:09 ` [PATCH 58/68] pata_sc1200: move code to be re-used by ide2libata to pata_sc1200.h Bartlomiej Zolnierkiewicz
` (11 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:09 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] pdc202xx_old: convert to ide2libata
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ata/pata_pdc202xx_old.h | 12 ++++++
drivers/ide/pdc202xx_old.c | 80 +++-------------------------------------
2 files changed, 18 insertions(+), 74 deletions(-)
Index: b/drivers/ata/pata_pdc202xx_old.h
===================================================================
--- a/drivers/ata/pata_pdc202xx_old.h
+++ b/drivers/ata/pata_pdc202xx_old.h
@@ -1,7 +1,11 @@
static int pdc2026x_cable_detect(struct ata_port *ap)
{
+#ifndef __IDE2LIBATA
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+#else
+ struct pci_dev *pdev = to_pci_dev(ap->dev);
+#endif
u16 cis;
pci_read_config_word(pdev, 0x50, &cis);
@@ -23,7 +27,11 @@ static int pdc2026x_cable_detect(struct
static void pdc202xx_configure_piomode(struct ata_port *ap, struct ata_device *adev, int pio)
{
+#ifndef __IDE2LIBATA
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+#else
+ struct pci_dev *pdev = to_pci_dev(ap->dev);
+#endif
int port = 0x60 + 8 * ap->port_no + 4 * adev->devno;
static u16 pio_timing[5] = {
0x0913, 0x050C , 0x0308, 0x0206, 0x0104
@@ -70,7 +78,11 @@ static void pdc202xx_set_piomode(struct
static void pdc202xx_set_dmamode(struct ata_port *ap, struct ata_device *adev)
{
+#ifndef __IDE2LIBATA
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+#else
+ struct pci_dev *pdev = to_pci_dev(ap->dev);
+#endif
int port = 0x60 + 8 * ap->port_no + 4 * adev->devno;
static u8 udma_timing[6][2] = {
{ 0x60, 0x03 }, /* 33 Mhz Clock */
Index: b/drivers/ide/pdc202xx_old.c
===================================================================
--- a/drivers/ide/pdc202xx_old.c
+++ b/drivers/ide/pdc202xx_old.c
@@ -21,66 +21,8 @@
#define DRV_NAME "pdc202xx_old"
-static void pdc202xx_set_mode(ide_hwif_t *hwif, ide_drive_t *drive)
-{
- struct pci_dev *dev = to_pci_dev(hwif->dev);
- u8 drive_pci = 0x60 + (drive->dn << 2);
- const u8 speed = drive->dma_mode;
-
- u8 AP = 0, BP = 0, CP = 0;
- u8 TA = 0, TB = 0, TC = 0;
-
- pci_read_config_byte(dev, drive_pci, &AP);
- pci_read_config_byte(dev, drive_pci + 1, &BP);
- pci_read_config_byte(dev, drive_pci + 2, &CP);
-
- switch(speed) {
- case XFER_UDMA_5:
- case XFER_UDMA_4: TB = 0x20; TC = 0x01; break;
- case XFER_UDMA_2: TB = 0x20; TC = 0x01; break;
- case XFER_UDMA_3:
- case XFER_UDMA_1: TB = 0x40; TC = 0x02; break;
- case XFER_UDMA_0:
- case XFER_MW_DMA_2: TB = 0x60; TC = 0x03; break;
- case XFER_MW_DMA_1: TB = 0x60; TC = 0x04; break;
- case XFER_MW_DMA_0: TB = 0xE0; TC = 0x0F; break;
- case XFER_PIO_4: TA = 0x01; TB = 0x04; break;
- case XFER_PIO_3: TA = 0x02; TB = 0x06; break;
- case XFER_PIO_2: TA = 0x03; TB = 0x08; break;
- case XFER_PIO_1: TA = 0x05; TB = 0x0C; break;
- case XFER_PIO_0:
- default: TA = 0x09; TB = 0x13; break;
- }
-
- if (speed < XFER_SW_DMA_0) {
- /*
- * preserve SYNC_INT / ERDDY_EN bits while clearing
- * Prefetch_EN / IORDY_EN / PA[3:0] bits of register A
- */
- AP &= ~0x3f;
- if (ide_pio_need_iordy(drive, speed - XFER_PIO_0))
- AP |= 0x20; /* set IORDY_EN bit */
- if (drive->media == ide_disk)
- AP |= 0x10; /* set Prefetch_EN bit */
- /* clear PB[4:0] bits of register B */
- BP &= ~0x1f;
- pci_write_config_byte(dev, drive_pci, AP | TA);
- pci_write_config_byte(dev, drive_pci + 1, BP | TB);
- } else {
- /* clear MB[2:0] bits of register B */
- BP &= ~0xe0;
- /* clear MC[3:0] bits of register C */
- CP &= ~0x0f;
- pci_write_config_byte(dev, drive_pci + 1, BP | TB);
- pci_write_config_byte(dev, drive_pci + 2, CP | TC);
- }
-}
-
-static void pdc202xx_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
-{
- drive->dma_mode = drive->pio_mode;
- pdc202xx_set_mode(hwif, drive);
-}
+#include <linux/ide2libata.h>
+#include "../ata/pata_pdc202xx_old.h"
static int pdc202xx_test_irq(ide_hwif_t *hwif)
{
@@ -103,16 +45,6 @@ static int pdc202xx_test_irq(ide_hwif_t
}
}
-static int pdc2026x_cable_detect(ide_hwif_t *hwif)
-{
- struct pci_dev *dev = to_pci_dev(hwif->dev);
- u16 CIS, mask = hwif->channel ? (1 << 11) : (1 << 10);
-
- pci_read_config_word(dev, 0x50, &CIS);
-
- return (CIS & mask) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;
-}
-
/*
* Set the control register to use the 66MHz system
* clock for UDMA 3/4/5 mode operation when necessary.
@@ -233,14 +165,14 @@ static void __devinit pdc202ata4_fixup_i
IDE_HFLAG_OFF_BOARD)
static const struct ide_port_ops pdc20246_port_ops = {
- .set_pio_mode = pdc202xx_set_pio_mode,
- .set_dma_mode = pdc202xx_set_mode,
+ .set_pio_mode = pdc202xx_set_piomode,
+ .set_dma_mode = pdc202xx_set_dmamode,
.test_irq = pdc202xx_test_irq,
};
static const struct ide_port_ops pdc2026x_port_ops = {
- .set_pio_mode = pdc202xx_set_pio_mode,
- .set_dma_mode = pdc202xx_set_mode,
+ .set_pio_mode = pdc202xx_set_piomode,
+ .set_dma_mode = pdc202xx_set_dmamode,
.cable_detect = pdc2026x_cable_detect,
};
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 58/68] pata_sc1200: move code to be re-used by ide2libata to pata_sc1200.h
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (56 preceding siblings ...)
2010-01-29 16:09 ` [PATCH 57/68] pdc202xx_old: convert to ide2libata Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:09 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:09 ` [PATCH 59/68] sc1200: convert to ide2libata Bartlomiej Zolnierkiewicz
` (10 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:09 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] pata_sc1200: move code to be re-used by ide2libata to pata_sc1200.h
Convert C99 style comments while at it.
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ata/pata_sc1200.c | 108 --------------------------------------------
drivers/ata/pata_sc1200.h | 112 ++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 113 insertions(+), 107 deletions(-)
Index: b/drivers/ata/pata_sc1200.c
===================================================================
--- a/drivers/ata/pata_sc1200.c
+++ b/drivers/ata/pata_sc1200.c
@@ -41,113 +41,7 @@
#define DRV_NAME "sc1200"
#define DRV_VERSION "0.2.6"
-#define SC1200_REV_A 0x00
-#define SC1200_REV_B1 0x01
-#define SC1200_REV_B3 0x02
-#define SC1200_REV_C1 0x03
-#define SC1200_REV_D1 0x04
-
-/**
- * sc1200_clock - PCI clock
- *
- * Return the PCI bus clocking for the SC1200 chipset configuration
- * in use. We return 0 for 33MHz 1 for 48MHz and 2 for 66Mhz
- */
-
-static int sc1200_clock(void)
-{
- /* Magic registers that give us the chipset data */
- u8 chip_id = inb(0x903C);
- u8 silicon_rev = inb(0x903D);
- u16 pci_clock;
-
- if (chip_id == 0x04 && silicon_rev < SC1200_REV_B1)
- return 0; /* 33 MHz mode */
-
- /* Clock generator configuration 0x901E its 8/9 are the PCI clocking
- 0/3 is 33Mhz 1 is 48 2 is 66 */
-
- pci_clock = inw(0x901E);
- pci_clock >>= 8;
- pci_clock &= 0x03;
- if (pci_clock == 3)
- pci_clock = 0;
- return pci_clock;
-}
-
-/**
- * sc1200_set_piomode - PIO setup
- * @ap: ATA interface
- * @adev: device on the interface
- *
- * Set our PIO requirements. This is fairly simple on the SC1200
- */
-
-static void sc1200_set_piomode(struct ata_port *ap, struct ata_device *adev)
-{
- static const u32 pio_timings[4][5] = {
- {0x00009172, 0x00012171, 0x00020080, 0x00032010, 0x00040010}, // format0 33Mhz
- {0xd1329172, 0x71212171, 0x30200080, 0x20102010, 0x00100010}, // format1, 33Mhz
- {0xfaa3f4f3, 0xc23232b2, 0x513101c1, 0x31213121, 0x10211021}, // format1, 48Mhz
- {0xfff4fff4, 0xf35353d3, 0x814102f1, 0x42314231, 0x11311131} // format1, 66Mhz
- };
-
- struct pci_dev *pdev = to_pci_dev(ap->host->dev);
- u32 format;
- unsigned int reg = 0x40 + 0x10 * ap->port_no;
- int mode = adev->pio_mode - XFER_PIO_0;
-
- pci_read_config_dword(pdev, reg + 4, &format);
- format >>= 31;
- format += sc1200_clock();
- pci_write_config_dword(pdev, reg + 8 * adev->devno,
- pio_timings[format][mode]);
-}
-
-/**
- * sc1200_set_dmamode - DMA timing setup
- * @ap: ATA interface
- * @adev: Device being configured
- *
- * We cannot mix MWDMA and UDMA without reloading timings each switch
- * master to slave.
- */
-
-static void sc1200_set_dmamode(struct ata_port *ap, struct ata_device *adev)
-{
- static const u32 udma_timing[3][3] = {
- { 0x00921250, 0x00911140, 0x00911030 },
- { 0x00932470, 0x00922260, 0x00922140 },
- { 0x009436A1, 0x00933481, 0x00923261 }
- };
-
- static const u32 mwdma_timing[3][3] = {
- { 0x00077771, 0x00012121, 0x00002020 },
- { 0x000BBBB2, 0x00024241, 0x00013131 },
- { 0x000FFFF3, 0x00035352, 0x00015151 }
- };
-
- int clock = sc1200_clock();
- struct pci_dev *pdev = to_pci_dev(ap->host->dev);
- unsigned int reg = 0x40 + 0x10 * ap->port_no;
- int mode = adev->dma_mode;
- u32 format;
-
- if (mode >= XFER_UDMA_0)
- format = udma_timing[clock][mode - XFER_UDMA_0];
- else
- format = mwdma_timing[clock][mode - XFER_MW_DMA_0];
-
- if (adev->devno == 0) {
- u32 timings;
-
- pci_read_config_dword(pdev, reg + 4, &timings);
- timings &= 0x80000000UL;
- timings |= format;
- pci_write_config_dword(pdev, reg + 4, timings);
- } else
- pci_write_config_dword(pdev, reg + 12, format);
-}
+#include "pata_sc1200.h"
/**
* sc1200_qc_issue - command issue
Index: b/drivers/ata/pata_sc1200.h
===================================================================
--- /dev/null
+++ b/drivers/ata/pata_sc1200.h
@@ -0,0 +1,112 @@
+
+#define SC1200_REV_A 0x00
+#define SC1200_REV_B1 0x01
+#define SC1200_REV_B3 0x02
+#define SC1200_REV_C1 0x03
+#define SC1200_REV_D1 0x04
+
+/**
+ * sc1200_clock - PCI clock
+ *
+ * Return the PCI bus clocking for the SC1200 chipset configuration
+ * in use. We return 0 for 33MHz 1 for 48MHz and 2 for 66Mhz
+ */
+
+static int sc1200_clock(void)
+{
+ /* Magic registers that give us the chipset data */
+ u8 chip_id = inb(0x903C);
+ u8 silicon_rev = inb(0x903D);
+ u16 pci_clock;
+
+ if (chip_id == 0x04 && silicon_rev < SC1200_REV_B1)
+ return 0; /* 33 MHz mode */
+
+ /* Clock generator configuration 0x901E its 8/9 are the PCI clocking
+ 0/3 is 33Mhz 1 is 48 2 is 66 */
+
+ pci_clock = inw(0x901E);
+ pci_clock >>= 8;
+ pci_clock &= 0x03;
+ if (pci_clock == 3)
+ pci_clock = 0;
+ return pci_clock;
+}
+
+/**
+ * sc1200_set_piomode - PIO setup
+ * @ap: ATA interface
+ * @adev: device on the interface
+ *
+ * Set our PIO requirements. This is fairly simple on the SC1200
+ */
+
+static void sc1200_set_piomode(struct ata_port *ap, struct ata_device *adev)
+{
+ static const u32 pio_timings[4][5] = {
+ /* format0 33Mhz */
+ {0x00009172, 0x00012171, 0x00020080, 0x00032010, 0x00040010},
+ /* format1, 33Mhz */
+ {0xd1329172, 0x71212171, 0x30200080, 0x20102010, 0x00100010},
+ /* format1, 48Mhz */
+ {0xfaa3f4f3, 0xc23232b2, 0x513101c1, 0x31213121, 0x10211021},
+ /* format1, 66Mhz */
+ {0xfff4fff4, 0xf35353d3, 0x814102f1, 0x42314231, 0x11311131}
+ };
+
+ struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+ u32 format;
+ unsigned int reg = 0x40 + 0x10 * ap->port_no;
+ int mode = adev->pio_mode - XFER_PIO_0;
+
+ pci_read_config_dword(pdev, reg + 4, &format);
+ format >>= 31;
+ format += sc1200_clock();
+ pci_write_config_dword(pdev, reg + 8 * adev->devno,
+ pio_timings[format][mode]);
+}
+
+/**
+ * sc1200_set_dmamode - DMA timing setup
+ * @ap: ATA interface
+ * @adev: Device being configured
+ *
+ * We cannot mix MWDMA and UDMA without reloading timings each switch
+ * master to slave.
+ */
+
+static void sc1200_set_dmamode(struct ata_port *ap, struct ata_device *adev)
+{
+ static const u32 udma_timing[3][3] = {
+ { 0x00921250, 0x00911140, 0x00911030 },
+ { 0x00932470, 0x00922260, 0x00922140 },
+ { 0x009436A1, 0x00933481, 0x00923261 }
+ };
+
+ static const u32 mwdma_timing[3][3] = {
+ { 0x00077771, 0x00012121, 0x00002020 },
+ { 0x000BBBB2, 0x00024241, 0x00013131 },
+ { 0x000FFFF3, 0x00035352, 0x00015151 }
+ };
+
+ int clock = sc1200_clock();
+ struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+ unsigned int reg = 0x40 + 0x10 * ap->port_no;
+ int mode = adev->dma_mode;
+ u32 format;
+
+ if (mode >= XFER_UDMA_0)
+ format = udma_timing[clock][mode - XFER_UDMA_0];
+ else
+ format = mwdma_timing[clock][mode - XFER_MW_DMA_0];
+
+ if (adev->devno == 0) {
+ u32 timings;
+
+ pci_read_config_dword(pdev, reg + 4, &timings);
+ timings &= 0x80000000UL;
+ timings |= format;
+ pci_write_config_dword(pdev, reg + 4, timings);
+ } else
+ pci_write_config_dword(pdev, reg + 12, format);
+}
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 59/68] sc1200: convert to ide2libata
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (57 preceding siblings ...)
2010-01-29 16:09 ` [PATCH 58/68] pata_sc1200: move code to be re-used by ide2libata to pata_sc1200.h Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:09 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:09 ` [PATCH 60/68] pata_serverworks: move cable handling to pata_serverworks.h Bartlomiej Zolnierkiewicz
` (9 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:09 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] sc1200: convert to ide2libata
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ide/sc1200.c | 113 +--------------------------------------------------
1 file changed, 4 insertions(+), 109 deletions(-)
Index: b/drivers/ide/sc1200.c
===================================================================
--- a/drivers/ide/sc1200.c
+++ b/drivers/ide/sc1200.c
@@ -23,73 +23,8 @@
#define DRV_NAME "sc1200"
-#define SC1200_REV_A 0x00
-#define SC1200_REV_B1 0x01
-#define SC1200_REV_B3 0x02
-#define SC1200_REV_C1 0x03
-#define SC1200_REV_D1 0x04
-
-#define PCI_CLK_33 0x00
-#define PCI_CLK_48 0x01
-#define PCI_CLK_66 0x02
-#define PCI_CLK_33A 0x03
-
-static unsigned short sc1200_get_pci_clock (void)
-{
- unsigned char chip_id, silicon_revision;
- unsigned int pci_clock;
- /*
- * Check the silicon revision, as not all versions of the chip
- * have the register with the fast PCI bus timings.
- */
- chip_id = inb (0x903c);
- silicon_revision = inb (0x903d);
-
- // Read the fast pci clock frequency
- if (chip_id == 0x04 && silicon_revision < SC1200_REV_B1) {
- pci_clock = PCI_CLK_33;
- } else {
- // check clock generator configuration (cfcc)
- // the clock is in bits 8 and 9 of this word
-
- pci_clock = inw (0x901e);
- pci_clock >>= 8;
- pci_clock &= 0x03;
- if (pci_clock == PCI_CLK_33A)
- pci_clock = PCI_CLK_33;
- }
- return pci_clock;
-}
-
-/*
- * Here are the standard PIO mode 0-4 timings for each "format".
- * Format-0 uses fast data reg timings, with slower command reg timings.
- * Format-1 uses fast timings for all registers, but won't work with all drives.
- */
-static const unsigned int sc1200_pio_timings[4][5] =
- {{0x00009172, 0x00012171, 0x00020080, 0x00032010, 0x00040010}, // format0 33Mhz
- {0xd1329172, 0x71212171, 0x30200080, 0x20102010, 0x00100010}, // format1, 33Mhz
- {0xfaa3f4f3, 0xc23232b2, 0x513101c1, 0x31213121, 0x10211021}, // format1, 48Mhz
- {0xfff4fff4, 0xf35353d3, 0x814102f1, 0x42314231, 0x11311131}}; // format1, 66Mhz
-
-/*
- * After chip reset, the PIO timings are set to 0x00009172, which is not valid.
- */
-//#define SC1200_BAD_PIO(timings) (((timings)&~0x80000000)==0x00009172)
-
-static void sc1200_tunepio(ide_drive_t *drive, u8 pio)
-{
- ide_hwif_t *hwif = drive->hwif;
- struct pci_dev *pdev = to_pci_dev(hwif->dev);
- unsigned int basereg = hwif->channel ? 0x50 : 0x40, format = 0;
-
- pci_read_config_dword(pdev, basereg + 4, &format);
- format = (format >> 31) & 1;
- if (format)
- format += sc1200_get_pci_clock();
- pci_write_config_dword(pdev, basereg + ((drive->dn & 1) << 3),
- sc1200_pio_timings[format][pio]);
-}
+#include <linux/ide2libata.h>
+#include "../ata/pata_sc1200.h"
/*
* The SC1200 specifies that two drives sharing a cable cannot mix
@@ -122,46 +57,6 @@ out:
return mask;
}
-static void sc1200_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
-{
- struct pci_dev *dev = to_pci_dev(hwif->dev);
- unsigned int reg, timings;
- unsigned short pci_clock;
- unsigned int basereg = hwif->channel ? 0x50 : 0x40;
- const u8 mode = drive->dma_mode;
-
- static const u32 udma_timing[3][3] = {
- { 0x00921250, 0x00911140, 0x00911030 },
- { 0x00932470, 0x00922260, 0x00922140 },
- { 0x009436a1, 0x00933481, 0x00923261 },
- };
-
- static const u32 mwdma_timing[3][3] = {
- { 0x00077771, 0x00012121, 0x00002020 },
- { 0x000bbbb2, 0x00024241, 0x00013131 },
- { 0x000ffff3, 0x00035352, 0x00015151 },
- };
-
- pci_clock = sc1200_get_pci_clock();
-
- /*
- * Note that each DMA mode has several timings associated with it.
- * The correct timing depends on the fast PCI clock freq.
- */
-
- if (mode >= XFER_UDMA_0)
- timings = udma_timing[pci_clock][mode - XFER_UDMA_0];
- else
- timings = mwdma_timing[pci_clock][mode - XFER_MW_DMA_0];
-
- if ((drive->dn & 1) == 0) {
- pci_read_config_dword(dev, basereg + 4, ®);
- timings |= reg & 0x80000000; /* preserve PIO format bit */
- pci_write_config_dword(dev, basereg + 4, timings);
- } else
- pci_write_config_dword(dev, basereg + 12, timings);
-}
-
/* Replacement for the standard ide_dma_end action in
* dma_proc.
*
@@ -218,7 +113,7 @@ static void sc1200_set_pio_mode(ide_hwif
return;
}
- sc1200_tunepio(drive, pio);
+ sc1200_set_piomode(hwif, drive);
}
#ifdef CONFIG_PM
@@ -275,7 +170,7 @@ static int sc1200_resume (struct pci_dev
static const struct ide_port_ops sc1200_port_ops = {
.set_pio_mode = sc1200_set_pio_mode,
- .set_dma_mode = sc1200_set_dma_mode,
+ .set_dma_mode = sc1200_set_dmamode,
.udma_filter = sc1200_udma_filter,
};
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 60/68] pata_serverworks: move cable handling to pata_serverworks.h
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (58 preceding siblings ...)
2010-01-29 16:09 ` [PATCH 59/68] sc1200: convert to ide2libata Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:09 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:09 ` [PATCH 61/68] serverworks: convert to ide2libata Bartlomiej Zolnierkiewicz
` (8 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:09 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] pata_serverworks: move cable handling to pata_serverworks.h
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ata/pata_serverworks.c | 282 ----------------------------------------
drivers/ata/pata_serverworks.h | 283 +++++++++++++++++++++++++++++++++++++++++
2 files changed, 284 insertions(+), 281 deletions(-)
Index: b/drivers/ata/pata_serverworks.c
===================================================================
--- a/drivers/ata/pata_serverworks.c
+++ b/drivers/ata/pata_serverworks.c
@@ -14,18 +14,6 @@
*
* RCC/ServerWorks IDE driver for Linux
*
- * OSB4: `Open South Bridge' IDE Interface (fn 1)
- * supports UDMA mode 2 (33 MB/s)
- *
- * CSB5: `Champion South Bridge' IDE Interface (fn 1)
- * all revisions support UDMA mode 4 (66 MB/s)
- * revision A2.0 and up support UDMA mode 5 (100 MB/s)
- *
- * *** The CSB5 does not provide ANY register ***
- * *** to detect 80-conductor cable presence. ***
- *
- * CSB6: `Champion South Bridge' IDE Interface (optional: third channel)
- *
* Documentation:
* Available under NDA only. Errata info very hard to get.
*/
@@ -42,102 +30,7 @@
#define DRV_NAME "pata_serverworks"
#define DRV_VERSION "0.4.3"
-#define SVWKS_CSB5_REVISION_NEW 0x92 /* min PCI_REVISION_ID for UDMA5 (A2.0) */
-#define SVWKS_CSB6_REVISION 0xa0 /* min PCI_REVISION_ID for UDMA4 (A1.0) */
-
-/* Seagate Barracuda ATA IV Family drives in UDMA mode 5
- * can overrun their FIFOs when used with the CSB5 */
-
-static const char *csb_bad_ata100[] = {
- "ST320011A",
- "ST340016A",
- "ST360021A",
- "ST380021A",
- NULL
-};
-
-/**
- * oem_cable - Dell/Sun serverworks cable detection
- * @ap: ATA port to do cable detect
- *
- * Dell PowerEdge and Sun Cobalt 'Alpine' hide the 40/80 pin select
- * for their interfaces in the top two bits of the subsystem ID.
- */
-
-static int oem_cable(struct ata_port *ap)
-{
- struct pci_dev *pdev = to_pci_dev(ap->host->dev);
-
- if (pdev->subsystem_device & (1 << (ap->port_no + 14)))
- return ATA_CBL_PATA80;
- return ATA_CBL_PATA40;
-}
-
-struct sv_cable_table {
- int device;
- int subvendor;
- int (*cable_detect)(struct ata_port *ap);
-};
-
-static struct sv_cable_table cable_detect[] = {
- { PCI_DEVICE_ID_SERVERWORKS_CSB5IDE, PCI_VENDOR_ID_DELL, oem_cable },
- { PCI_DEVICE_ID_SERVERWORKS_CSB6IDE, PCI_VENDOR_ID_DELL, oem_cable },
- { PCI_DEVICE_ID_SERVERWORKS_CSB5IDE, PCI_VENDOR_ID_SUN, oem_cable },
- { PCI_DEVICE_ID_SERVERWORKS_OSB4IDE, PCI_ANY_ID, ata_cable_40wire },
- { PCI_DEVICE_ID_SERVERWORKS_CSB5IDE, PCI_ANY_ID, ata_cable_unknown },
- { PCI_DEVICE_ID_SERVERWORKS_CSB6IDE, PCI_ANY_ID, ata_cable_unknown },
- { PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2, PCI_ANY_ID, ata_cable_unknown },
- { PCI_DEVICE_ID_SERVERWORKS_HT1000IDE, PCI_ANY_ID, ata_cable_unknown },
- { }
-};
-
-/**
- * serverworks_cable_detect - cable detection
- * @ap: ATA port
- *
- * Perform cable detection according to the device and subvendor
- * identifications
- */
-
-static int serverworks_cable_detect(struct ata_port *ap)
-{
- struct pci_dev *pdev = to_pci_dev(ap->host->dev);
- struct sv_cable_table *cb = cable_detect;
-
- while(cb->device) {
- if (cb->device == pdev->device &&
- (cb->subvendor == pdev->subsystem_vendor ||
- cb->subvendor == PCI_ANY_ID)) {
- return cb->cable_detect(ap);
- }
- cb++;
- }
-
- BUG();
- return -1; /* kill compiler warning */
-}
-
-/**
- * serverworks_is_csb - Check for CSB or OSB
- * @pdev: PCI device to check
- *
- * Returns true if the device being checked is known to be a CSB
- * series device.
- */
-
-static u8 serverworks_is_csb(struct pci_dev *pdev)
-{
- switch (pdev->device) {
- case PCI_DEVICE_ID_SERVERWORKS_CSB5IDE:
- case PCI_DEVICE_ID_SERVERWORKS_CSB6IDE:
- case PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2:
- case PCI_DEVICE_ID_SERVERWORKS_HT1000IDE:
- return 1;
- default:
- break;
- }
- return 0;
-}
+#include "pata_serverworks.h"
/**
* serverworks_osb4_filter - mode selection filter
@@ -156,7 +49,6 @@ static unsigned long serverworks_osb4_fi
return ata_bmdma_mode_filter(adev, mask);
}
-
/**
* serverworks_csb_filter - mode selection filter
* @adev: ATA device
@@ -185,72 +77,6 @@ static unsigned long serverworks_csb_fil
return ata_bmdma_mode_filter(adev, mask);
}
-/**
- * serverworks_set_piomode - set initial PIO mode data
- * @ap: ATA interface
- * @adev: ATA device
- *
- * Program the OSB4/CSB5 timing registers for PIO. The PIO register
- * load is done as a simple lookup.
- */
-static void serverworks_set_piomode(struct ata_port *ap, struct ata_device *adev)
-{
- static const u8 pio_mode[] = { 0x5d, 0x47, 0x34, 0x22, 0x20 };
- int offset = 1 + 2 * ap->port_no - adev->devno;
- int devbits = (2 * ap->port_no + adev->devno) * 4;
- u16 csb5_pio;
- struct pci_dev *pdev = to_pci_dev(ap->host->dev);
- int pio = adev->pio_mode - XFER_PIO_0;
-
- pci_write_config_byte(pdev, 0x40 + offset, pio_mode[pio]);
-
- /* The OSB4 just requires the timing but the CSB series want the
- mode number as well */
- if (serverworks_is_csb(pdev)) {
- pci_read_config_word(pdev, 0x4A, &csb5_pio);
- csb5_pio &= ~(0x0F << devbits);
- pci_write_config_word(pdev, 0x4A, csb5_pio | (pio << devbits));
- }
-}
-
-/**
- * serverworks_set_dmamode - set initial DMA mode data
- * @ap: ATA interface
- * @adev: ATA device
- *
- * Program the MWDMA/UDMA modes for the serverworks OSB4/CSB5
- * chipset. The MWDMA mode values are pulled from a lookup table
- * while the chipset uses mode number for UDMA.
- */
-
-static void serverworks_set_dmamode(struct ata_port *ap, struct ata_device *adev)
-{
- static const u8 dma_mode[] = { 0x77, 0x21, 0x20 };
- int offset = 1 + 2 * ap->port_no - adev->devno;
- int devbits = 2 * ap->port_no + adev->devno;
- u8 ultra;
- u8 ultra_cfg;
- struct pci_dev *pdev = to_pci_dev(ap->host->dev);
-
- pci_read_config_byte(pdev, 0x54, &ultra_cfg);
- pci_read_config_byte(pdev, 0x56 + ap->port_no, &ultra);
- ultra &= ~(0x0F << (adev->devno * 4));
-
- if (adev->dma_mode >= XFER_UDMA_0) {
- pci_write_config_byte(pdev, 0x44 + offset, 0x20);
-
- ultra |= (adev->dma_mode - XFER_UDMA_0)
- << (adev->devno * 4);
- ultra_cfg |= (1 << devbits);
- } else {
- pci_write_config_byte(pdev, 0x44 + offset,
- dma_mode[adev->dma_mode - XFER_MW_DMA_0]);
- ultra_cfg &= ~(1 << devbits);
- }
- pci_write_config_byte(pdev, 0x56 + ap->port_no, ultra);
- pci_write_config_byte(pdev, 0x54, ultra_cfg);
-}
-
static struct scsi_host_template serverworks_sht = {
ATA_BMDMA_SHT(DRV_NAME),
};
@@ -268,112 +94,6 @@ static struct ata_port_operations server
.mode_filter = serverworks_csb_filter,
};
-static int serverworks_fixup_osb4(struct pci_dev *pdev)
-{
- u32 reg;
- struct pci_dev *isa_dev = pci_get_device(PCI_VENDOR_ID_SERVERWORKS,
- PCI_DEVICE_ID_SERVERWORKS_OSB4, NULL);
- if (isa_dev) {
- pci_read_config_dword(isa_dev, 0x64, ®);
- reg &= ~0x00002000; /* disable 600ns interrupt mask */
- if (!(reg & 0x00004000))
- printk(KERN_DEBUG DRV_NAME ": UDMA not BIOS enabled.\n");
- reg |= 0x00004000; /* enable UDMA/33 support */
- pci_write_config_dword(isa_dev, 0x64, reg);
- pci_dev_put(isa_dev);
- return 0;
- }
- printk(KERN_WARNING DRV_NAME ": Unable to find bridge.\n");
- return -ENODEV;
-}
-
-static int serverworks_fixup_csb(struct pci_dev *pdev)
-{
- u8 btr;
-
- /* Third Channel Test */
- if (!(PCI_FUNC(pdev->devfn) & 1)) {
- struct pci_dev * findev = NULL;
- u32 reg4c = 0;
- findev = pci_get_device(PCI_VENDOR_ID_SERVERWORKS,
- PCI_DEVICE_ID_SERVERWORKS_CSB5, NULL);
- if (findev) {
- pci_read_config_dword(findev, 0x4C, ®4c);
- reg4c &= ~0x000007FF;
- reg4c |= 0x00000040;
- reg4c |= 0x00000020;
- pci_write_config_dword(findev, 0x4C, reg4c);
- pci_dev_put(findev);
- }
- } else {
- struct pci_dev * findev = NULL;
- u8 reg41 = 0;
-
- findev = pci_get_device(PCI_VENDOR_ID_SERVERWORKS,
- PCI_DEVICE_ID_SERVERWORKS_CSB6, NULL);
- if (findev) {
- pci_read_config_byte(findev, 0x41, ®41);
- reg41 &= ~0x40;
- pci_write_config_byte(findev, 0x41, reg41);
- pci_dev_put(findev);
- }
- }
- /* setup the UDMA Control register
- *
- * 1. clear bit 6 to enable DMA
- * 2. enable DMA modes with bits 0-1
- * 00 : legacy
- * 01 : udma2
- * 10 : udma2/udma4
- * 11 : udma2/udma4/udma5
- */
- pci_read_config_byte(pdev, 0x5A, &btr);
- btr &= ~0x40;
- if (!(PCI_FUNC(pdev->devfn) & 1))
- btr |= 0x2;
- else
- btr |= (pdev->revision >= SVWKS_CSB5_REVISION_NEW) ? 0x3 : 0x2;
- pci_write_config_byte(pdev, 0x5A, btr);
-
- return btr;
-}
-
-static void serverworks_fixup_ht1000(struct pci_dev *pdev)
-{
- u8 btr;
- /* Setup HT1000 SouthBridge Controller - Single Channel Only */
- pci_read_config_byte(pdev, 0x5A, &btr);
- btr &= ~0x40;
- btr |= 0x3;
- pci_write_config_byte(pdev, 0x5A, btr);
-}
-
-static int serverworks_fixup(struct pci_dev *pdev)
-{
- int rc = 0;
-
- /* Force master latency timer to 64 PCI clocks */
- pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x40);
-
- switch (pdev->device) {
- case PCI_DEVICE_ID_SERVERWORKS_OSB4IDE:
- rc = serverworks_fixup_osb4(pdev);
- break;
- case PCI_DEVICE_ID_SERVERWORKS_CSB5IDE:
- ata_pci_bmdma_clear_simplex(pdev);
- /* fall through */
- case PCI_DEVICE_ID_SERVERWORKS_CSB6IDE:
- case PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2:
- rc = serverworks_fixup_csb(pdev);
- break;
- case PCI_DEVICE_ID_SERVERWORKS_HT1000IDE:
- serverworks_fixup_ht1000(pdev);
- break;
- }
-
- return rc;
-}
-
static int serverworks_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
{
static const struct ata_port_info info[4] = {
Index: b/drivers/ata/pata_serverworks.h
===================================================================
--- /dev/null
+++ b/drivers/ata/pata_serverworks.h
@@ -0,0 +1,283 @@
+
+/*
+ * OSB4: `Open South Bridge' IDE Interface (fn 1)
+ * supports UDMA mode 2 (33 MB/s)
+ *
+ * CSB5: `Champion South Bridge' IDE Interface (fn 1)
+ * all revisions support UDMA mode 4 (66 MB/s)
+ * revision A2.0 and up support UDMA mode 5 (100 MB/s)
+ *
+ * *** The CSB5 does not provide ANY register ***
+ * *** to detect 80-conductor cable presence. ***
+ *
+ * CSB6: `Champion South Bridge' IDE Interface (optional: third channel)
+ */
+
+#define SVWKS_CSB5_REVISION_NEW 0x92 /* min PCI_REVISION_ID for UDMA5 (A2.0) */
+#define SVWKS_CSB6_REVISION 0xa0 /* min PCI_REVISION_ID for UDMA4 (A1.0) */
+
+/* Seagate Barracuda ATA IV Family drives in UDMA mode 5
+ * can overrun their FIFOs when used with the CSB5 */
+
+static const char *csb_bad_ata100[] = {
+ "ST320011A",
+ "ST340016A",
+ "ST360021A",
+ "ST380021A",
+ NULL
+};
+
+/**
+ * oem_cable - Dell/Sun serverworks cable detection
+ * @ap: ATA port to do cable detect
+ *
+ * Dell PowerEdge and Sun Cobalt 'Alpine' hide the 40/80 pin select
+ * for their interfaces in the top two bits of the subsystem ID.
+ */
+
+static int oem_cable(struct ata_port *ap)
+{
+ struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+
+ if (pdev->subsystem_device & (1 << (ap->port_no + 14)))
+ return ATA_CBL_PATA80;
+ return ATA_CBL_PATA40;
+}
+
+struct sv_cable_table {
+ int device;
+ int subvendor;
+ int (*cable_detect)(struct ata_port *ap);
+};
+
+static struct sv_cable_table cable_detect[] = {
+ { PCI_DEVICE_ID_SERVERWORKS_CSB5IDE, PCI_VENDOR_ID_DELL, oem_cable },
+ { PCI_DEVICE_ID_SERVERWORKS_CSB6IDE, PCI_VENDOR_ID_DELL, oem_cable },
+ { PCI_DEVICE_ID_SERVERWORKS_CSB5IDE, PCI_VENDOR_ID_SUN, oem_cable },
+ { PCI_DEVICE_ID_SERVERWORKS_OSB4IDE, PCI_ANY_ID, ata_cable_40wire },
+ { PCI_DEVICE_ID_SERVERWORKS_CSB5IDE, PCI_ANY_ID, ata_cable_unknown },
+ { PCI_DEVICE_ID_SERVERWORKS_CSB6IDE, PCI_ANY_ID, ata_cable_unknown },
+ { PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2, PCI_ANY_ID, ata_cable_unknown },
+ { PCI_DEVICE_ID_SERVERWORKS_HT1000IDE, PCI_ANY_ID, ata_cable_unknown },
+ { }
+};
+
+/**
+ * serverworks_cable_detect - cable detection
+ * @ap: ATA port
+ *
+ * Perform cable detection according to the device and subvendor
+ * identifications
+ */
+
+static int serverworks_cable_detect(struct ata_port *ap)
+{
+ struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+ struct sv_cable_table *cb = cable_detect;
+
+ while (cb->device) {
+ if (cb->device == pdev->device &&
+ (cb->subvendor == pdev->subsystem_vendor ||
+ cb->subvendor == PCI_ANY_ID)) {
+ return cb->cable_detect(ap);
+ }
+ cb++;
+ }
+
+ BUG();
+ return -1; /* kill compiler warning */
+}
+
+/**
+ * serverworks_is_csb - Check for CSB or OSB
+ * @pdev: PCI device to check
+ *
+ * Returns true if the device being checked is known to be a CSB
+ * series device.
+ */
+
+static u8 serverworks_is_csb(struct pci_dev *pdev)
+{
+ switch (pdev->device) {
+ case PCI_DEVICE_ID_SERVERWORKS_CSB5IDE:
+ case PCI_DEVICE_ID_SERVERWORKS_CSB6IDE:
+ case PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2:
+ case PCI_DEVICE_ID_SERVERWORKS_HT1000IDE:
+ return 1;
+ default:
+ break;
+ }
+ return 0;
+}
+
+/**
+ * serverworks_set_piomode - set initial PIO mode data
+ * @ap: ATA interface
+ * @adev: ATA device
+ *
+ * Program the OSB4/CSB5 timing registers for PIO. The PIO register
+ * load is done as a simple lookup.
+ */
+static void serverworks_set_piomode(struct ata_port *ap, struct ata_device *adev)
+{
+ static const u8 pio_mode[] = { 0x5d, 0x47, 0x34, 0x22, 0x20 };
+ int offset = 1 + 2 * ap->port_no - adev->devno;
+ int devbits = (2 * ap->port_no + adev->devno) * 4;
+ u16 csb5_pio;
+ struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+ int pio = adev->pio_mode - XFER_PIO_0;
+
+ pci_write_config_byte(pdev, 0x40 + offset, pio_mode[pio]);
+
+ /* The OSB4 just requires the timing but the CSB series want the
+ mode number as well */
+ if (serverworks_is_csb(pdev)) {
+ pci_read_config_word(pdev, 0x4A, &csb5_pio);
+ csb5_pio &= ~(0x0F << devbits);
+ pci_write_config_word(pdev, 0x4A, csb5_pio | (pio << devbits));
+ }
+}
+
+/**
+ * serverworks_set_dmamode - set initial DMA mode data
+ * @ap: ATA interface
+ * @adev: ATA device
+ *
+ * Program the MWDMA/UDMA modes for the serverworks OSB4/CSB5
+ * chipset. The MWDMA mode values are pulled from a lookup table
+ * while the chipset uses mode number for UDMA.
+ */
+
+static void serverworks_set_dmamode(struct ata_port *ap, struct ata_device *adev)
+{
+ static const u8 dma_mode[] = { 0x77, 0x21, 0x20 };
+ int offset = 1 + 2 * ap->port_no - adev->devno;
+ int devbits = 2 * ap->port_no + adev->devno;
+ u8 ultra;
+ u8 ultra_cfg;
+ struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+
+ pci_read_config_byte(pdev, 0x54, &ultra_cfg);
+ pci_read_config_byte(pdev, 0x56 + ap->port_no, &ultra);
+ ultra &= ~(0x0F << (adev->devno * 4));
+
+ if (adev->dma_mode >= XFER_UDMA_0) {
+ pci_write_config_byte(pdev, 0x44 + offset, 0x20);
+
+ ultra |= (adev->dma_mode - XFER_UDMA_0)
+ << (adev->devno * 4);
+ ultra_cfg |= (1 << devbits);
+ } else {
+ pci_write_config_byte(pdev, 0x44 + offset,
+ dma_mode[adev->dma_mode - XFER_MW_DMA_0]);
+ ultra_cfg &= ~(1 << devbits);
+ }
+ pci_write_config_byte(pdev, 0x56 + ap->port_no, ultra);
+ pci_write_config_byte(pdev, 0x54, ultra_cfg);
+}
+
+static int serverworks_fixup_osb4(struct pci_dev *pdev)
+{
+ u32 reg;
+ struct pci_dev *isa_dev = pci_get_device(PCI_VENDOR_ID_SERVERWORKS,
+ PCI_DEVICE_ID_SERVERWORKS_OSB4, NULL);
+ if (isa_dev) {
+ pci_read_config_dword(isa_dev, 0x64, ®);
+ reg &= ~0x00002000; /* disable 600ns interrupt mask */
+ if (!(reg & 0x00004000))
+ printk(KERN_DEBUG DRV_NAME ": UDMA not BIOS enabled.\n");
+ reg |= 0x00004000; /* enable UDMA/33 support */
+ pci_write_config_dword(isa_dev, 0x64, reg);
+ pci_dev_put(isa_dev);
+ return 0;
+ }
+ printk(KERN_WARNING DRV_NAME ": Unable to find bridge.\n");
+ return -ENODEV;
+}
+
+static int serverworks_fixup_csb(struct pci_dev *pdev)
+{
+ u8 btr;
+
+ /* Third Channel Test */
+ if (!(PCI_FUNC(pdev->devfn) & 1)) {
+ struct pci_dev *findev = NULL;
+ u32 reg4c = 0;
+ findev = pci_get_device(PCI_VENDOR_ID_SERVERWORKS,
+ PCI_DEVICE_ID_SERVERWORKS_CSB5, NULL);
+ if (findev) {
+ pci_read_config_dword(findev, 0x4C, ®4c);
+ reg4c &= ~0x000007FF;
+ reg4c |= 0x00000040;
+ reg4c |= 0x00000020;
+ pci_write_config_dword(findev, 0x4C, reg4c);
+ pci_dev_put(findev);
+ }
+ } else {
+ struct pci_dev *findev = NULL;
+ u8 reg41 = 0;
+
+ findev = pci_get_device(PCI_VENDOR_ID_SERVERWORKS,
+ PCI_DEVICE_ID_SERVERWORKS_CSB6, NULL);
+ if (findev) {
+ pci_read_config_byte(findev, 0x41, ®41);
+ reg41 &= ~0x40;
+ pci_write_config_byte(findev, 0x41, reg41);
+ pci_dev_put(findev);
+ }
+ }
+ /* setup the UDMA Control register
+ *
+ * 1. clear bit 6 to enable DMA
+ * 2. enable DMA modes with bits 0-1
+ * 00 : legacy
+ * 01 : udma2
+ * 10 : udma2/udma4
+ * 11 : udma2/udma4/udma5
+ */
+ pci_read_config_byte(pdev, 0x5A, &btr);
+ btr &= ~0x40;
+ if (!(PCI_FUNC(pdev->devfn) & 1))
+ btr |= 0x2;
+ else
+ btr |= (pdev->revision >= SVWKS_CSB5_REVISION_NEW) ? 0x3 : 0x2;
+ pci_write_config_byte(pdev, 0x5A, btr);
+
+ return btr;
+}
+
+static void serverworks_fixup_ht1000(struct pci_dev *pdev)
+{
+ u8 btr;
+ /* Setup HT1000 SouthBridge Controller - Single Channel Only */
+ pci_read_config_byte(pdev, 0x5A, &btr);
+ btr &= ~0x40;
+ btr |= 0x3;
+ pci_write_config_byte(pdev, 0x5A, btr);
+}
+
+static int serverworks_fixup(struct pci_dev *pdev)
+{
+ int rc = 0;
+
+ /* Force master latency timer to 64 PCI clocks */
+ pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0x40);
+
+ switch (pdev->device) {
+ case PCI_DEVICE_ID_SERVERWORKS_OSB4IDE:
+ rc = serverworks_fixup_osb4(pdev);
+ break;
+ case PCI_DEVICE_ID_SERVERWORKS_CSB5IDE:
+ ata_pci_bmdma_clear_simplex(pdev);
+ /* fall through */
+ case PCI_DEVICE_ID_SERVERWORKS_CSB6IDE:
+ case PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2:
+ rc = serverworks_fixup_csb(pdev);
+ break;
+ case PCI_DEVICE_ID_SERVERWORKS_HT1000IDE:
+ serverworks_fixup_ht1000(pdev);
+ break;
+ }
+
+ return rc;
+}
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 61/68] serverworks: convert to ide2libata
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (59 preceding siblings ...)
2010-01-29 16:09 ` [PATCH 60/68] pata_serverworks: move cable handling to pata_serverworks.h Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:09 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:09 ` [PATCH 62/68] pata_sl82c105: move code to be re-used by ide2libata to pata_sl82c105.h Bartlomiej Zolnierkiewicz
` (7 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:09 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] serverworks: convert to ide2libata
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ata/pata_serverworks.h | 20 ++
drivers/ide/serverworks.c | 281 ++---------------------------------------
2 files changed, 40 insertions(+), 261 deletions(-)
Index: b/drivers/ata/pata_serverworks.h
===================================================================
--- a/drivers/ata/pata_serverworks.h
+++ b/drivers/ata/pata_serverworks.h
@@ -11,6 +11,9 @@
* *** to detect 80-conductor cable presence. ***
*
* CSB6: `Champion South Bridge' IDE Interface (optional: third channel)
+ *
+ * HT1000: AKA BCM5785 - Hypertransport Southbridge for Opteron systems. IDE
+ * controller same as the CSB6. Single channel ATA100 only.
*/
#define SVWKS_CSB5_REVISION_NEW 0x92 /* min PCI_REVISION_ID for UDMA5 (A2.0) */
@@ -213,6 +216,10 @@ static int serverworks_fixup_csb(struct
pci_write_config_dword(findev, 0x4C, reg4c);
pci_dev_put(findev);
}
+#ifdef __IDE2LIBATA
+ outb_p(0x06, 0x0c00);
+ pdev->irq = inb_p(0x0c01);
+#endif
} else {
struct pci_dev *findev = NULL;
u8 reg41 = 0;
@@ -225,6 +232,17 @@ static int serverworks_fixup_csb(struct
pci_write_config_byte(findev, 0x41, reg41);
pci_dev_put(findev);
}
+#ifdef __IDE2LIBATA
+ /*
+ * This is a device pin issue on CSB6.
+ * Since there will be a future raid mode,
+ * early versions of the chipset require the
+ * interrupt pin to be set, and it is a compatibility
+ * mode issue.
+ */
+ if ((pdev->class >> 8) == PCI_CLASS_STORAGE_IDE)
+ pdev->irq = 0;
+#endif
}
/* setup the UDMA Control register
*
@@ -268,7 +286,9 @@ static int serverworks_fixup(struct pci_
rc = serverworks_fixup_osb4(pdev);
break;
case PCI_DEVICE_ID_SERVERWORKS_CSB5IDE:
+#ifndef __IDE2LIBATA
ata_pci_bmdma_clear_simplex(pdev);
+#endif
/* fall through */
case PCI_DEVICE_ID_SERVERWORKS_CSB6IDE:
case PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2:
Index: b/drivers/ide/serverworks.c
===================================================================
--- a/drivers/ide/serverworks.c
+++ b/drivers/ide/serverworks.c
@@ -8,21 +8,6 @@
*
* RCC/ServerWorks IDE driver for Linux
*
- * OSB4: `Open South Bridge' IDE Interface (fn 1)
- * supports UDMA mode 2 (33 MB/s)
- *
- * CSB5: `Champion South Bridge' IDE Interface (fn 1)
- * all revisions support UDMA mode 4 (66 MB/s)
- * revision A2.0 and up support UDMA mode 5 (100 MB/s)
- *
- * *** The CSB5 does not provide ANY register ***
- * *** to detect 80-conductor cable presence. ***
- *
- * CSB6: `Champion South Bridge' IDE Interface (optional: third channel)
- *
- * HT1000: AKA BCM5785 - Hypertransport Southbridge for Opteron systems. IDE
- * controller same as the CSB6. Single channel ATA100 only.
- *
* Documentation:
* Available under NDA only. Errata info very hard to get.
*
@@ -39,19 +24,6 @@
#define DRV_NAME "serverworks"
-#define SVWKS_CSB5_REVISION_NEW 0x92 /* min PCI_REVISION_ID for UDMA5 (A2.0) */
-#define SVWKS_CSB6_REVISION 0xa0 /* min PCI_REVISION_ID for UDMA4 (A1.0) */
-
-/* Seagate Barracuda ATA IV Family drives in UDMA mode 5
- * can overrun their FIFOs when used with the CSB5 */
-static const char *svwks_bad_ata100[] = {
- "ST320011A",
- "ST340016A",
- "ST360021A",
- "ST380021A",
- NULL
-};
-
static int check_in_drive_lists (ide_drive_t *drive, const char **list)
{
char *m = (char *)&drive->id[ATA_ID_PROD];
@@ -62,6 +34,19 @@ static int check_in_drive_lists (ide_dri
return 0;
}
+static int ata_cable_40wire(ide_hwif_t *hwif)
+{
+ return ATA_CBL_PATA40;
+}
+
+static int ata_cable_unknown(ide_hwif_t *hwif)
+{
+ return ATA_CBL_PATA80;
+}
+
+#include <linux/ide2libata.h>
+#include "../ata/pata_serverworks.h"
+
static u8 svwks_udma_filter(ide_drive_t *drive)
{
struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
@@ -78,7 +63,7 @@ static u8 svwks_udma_filter(ide_drive_t
/* If someone decides to do UDMA133 on CSB5 the same
issue will bite so be inclusive */
- if (mode > 2 && check_in_drive_lists(drive, svwks_bad_ata100))
+ if (mode > 2 && check_in_drive_lists(drive, csb_bad_ata100))
mode = 2;
switch(mode) {
@@ -92,249 +77,23 @@ static u8 svwks_udma_filter(ide_drive_t
}
}
-static u8 svwks_csb_check (struct pci_dev *dev)
-{
- switch (dev->device) {
- case PCI_DEVICE_ID_SERVERWORKS_CSB5IDE:
- case PCI_DEVICE_ID_SERVERWORKS_CSB6IDE:
- case PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2:
- case PCI_DEVICE_ID_SERVERWORKS_HT1000IDE:
- return 1;
- default:
- break;
- }
- return 0;
-}
-
-static void svwks_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
-{
- static const u8 pio_modes[] = { 0x5d, 0x47, 0x34, 0x22, 0x20 };
- static const u8 drive_pci[] = { 0x41, 0x40, 0x43, 0x42 };
-
- struct pci_dev *dev = to_pci_dev(hwif->dev);
- const u8 pio = drive->pio_mode - XFER_PIO_0;
-
- pci_write_config_byte(dev, drive_pci[drive->dn], pio_modes[pio]);
-
- if (svwks_csb_check(dev)) {
- u16 csb_pio = 0;
-
- pci_read_config_word(dev, 0x4a, &csb_pio);
-
- csb_pio &= ~(0x0f << (4 * drive->dn));
- csb_pio |= (pio << (4 * drive->dn));
-
- pci_write_config_word(dev, 0x4a, csb_pio);
- }
-}
-
-static void svwks_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
-{
- static const u8 udma_modes[] = { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05 };
- static const u8 dma_modes[] = { 0x77, 0x21, 0x20 };
- static const u8 drive_pci2[] = { 0x45, 0x44, 0x47, 0x46 };
-
- struct pci_dev *dev = to_pci_dev(hwif->dev);
- const u8 speed = drive->dma_mode;
- u8 unit = drive->dn & 1;
-
- u8 ultra_enable = 0, ultra_timing = 0, dma_timing = 0;
-
- pci_read_config_byte(dev, (0x56|hwif->channel), &ultra_timing);
- pci_read_config_byte(dev, 0x54, &ultra_enable);
-
- ultra_timing &= ~(0x0F << (4*unit));
- ultra_enable &= ~(0x01 << drive->dn);
-
- if (speed >= XFER_UDMA_0) {
- dma_timing |= dma_modes[2];
- ultra_timing |= (udma_modes[speed - XFER_UDMA_0] << (4 * unit));
- ultra_enable |= (0x01 << drive->dn);
- } else if (speed >= XFER_MW_DMA_0)
- dma_timing |= dma_modes[speed - XFER_MW_DMA_0];
-
- pci_write_config_byte(dev, drive_pci2[drive->dn], dma_timing);
- pci_write_config_byte(dev, (0x56|hwif->channel), ultra_timing);
- pci_write_config_byte(dev, 0x54, ultra_enable);
-}
-
static int init_chipset_svwks(struct pci_dev *dev)
{
- unsigned int reg;
- u8 btr;
-
- /* force Master Latency Timer value to 64 PCICLKs */
- pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0x40);
-
- /* OSB4 : South Bridge and IDE */
- if (dev->device == PCI_DEVICE_ID_SERVERWORKS_OSB4IDE) {
- struct pci_dev *isa_dev =
- pci_get_device(PCI_VENDOR_ID_SERVERWORKS,
- PCI_DEVICE_ID_SERVERWORKS_OSB4, NULL);
- if (isa_dev) {
- pci_read_config_dword(isa_dev, 0x64, ®);
- reg &= ~0x00002000; /* disable 600ns interrupt mask */
- if(!(reg & 0x00004000))
- printk(KERN_DEBUG DRV_NAME " %s: UDMA not BIOS "
- "enabled.\n", pci_name(dev));
- reg |= 0x00004000; /* enable UDMA/33 support */
- pci_write_config_dword(isa_dev, 0x64, reg);
- pci_dev_put(isa_dev);
- }
- }
-
- /* setup CSB5/CSB6 : South Bridge and IDE option RAID */
- else if ((dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB5IDE) ||
- (dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE) ||
- (dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2)) {
-
- /* Third Channel Test */
- if (!(PCI_FUNC(dev->devfn) & 1)) {
- struct pci_dev * findev = NULL;
- u32 reg4c = 0;
- findev = pci_get_device(PCI_VENDOR_ID_SERVERWORKS,
- PCI_DEVICE_ID_SERVERWORKS_CSB5, NULL);
- if (findev) {
- pci_read_config_dword(findev, 0x4C, ®4c);
- reg4c &= ~0x000007FF;
- reg4c |= 0x00000040;
- reg4c |= 0x00000020;
- pci_write_config_dword(findev, 0x4C, reg4c);
- pci_dev_put(findev);
- }
- outb_p(0x06, 0x0c00);
- dev->irq = inb_p(0x0c01);
- } else {
- struct pci_dev * findev = NULL;
- u8 reg41 = 0;
-
- findev = pci_get_device(PCI_VENDOR_ID_SERVERWORKS,
- PCI_DEVICE_ID_SERVERWORKS_CSB6, NULL);
- if (findev) {
- pci_read_config_byte(findev, 0x41, ®41);
- reg41 &= ~0x40;
- pci_write_config_byte(findev, 0x41, reg41);
- pci_dev_put(findev);
- }
- /*
- * This is a device pin issue on CSB6.
- * Since there will be a future raid mode,
- * early versions of the chipset require the
- * interrupt pin to be set, and it is a compatibility
- * mode issue.
- */
- if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE)
- dev->irq = 0;
- }
-// pci_read_config_dword(dev, 0x40, &pioreg)
-// pci_write_config_dword(dev, 0x40, 0x99999999);
-// pci_read_config_dword(dev, 0x44, &dmareg);
-// pci_write_config_dword(dev, 0x44, 0xFFFFFFFF);
- /* setup the UDMA Control register
- *
- * 1. clear bit 6 to enable DMA
- * 2. enable DMA modes with bits 0-1
- * 00 : legacy
- * 01 : udma2
- * 10 : udma2/udma4
- * 11 : udma2/udma4/udma5
- */
- pci_read_config_byte(dev, 0x5A, &btr);
- btr &= ~0x40;
- if (!(PCI_FUNC(dev->devfn) & 1))
- btr |= 0x2;
- else
- btr |= (dev->revision >= SVWKS_CSB5_REVISION_NEW) ? 0x3 : 0x2;
- pci_write_config_byte(dev, 0x5A, btr);
- }
- /* Setup HT1000 SouthBridge Controller - Single Channel Only */
- else if (dev->device == PCI_DEVICE_ID_SERVERWORKS_HT1000IDE) {
- pci_read_config_byte(dev, 0x5A, &btr);
- btr &= ~0x40;
- btr |= 0x3;
- pci_write_config_byte(dev, 0x5A, btr);
- }
+ (void)serverworks_fixup(dev);
return 0;
}
-static u8 ata66_svwks_svwks(ide_hwif_t *hwif)
-{
- return ATA_CBL_PATA80;
-}
-
-/* On Dell PowerEdge servers with a CSB5/CSB6, the top two bits
- * of the subsystem device ID indicate presence of an 80-pin cable.
- * Bit 15 clear = secondary IDE channel does not have 80-pin cable.
- * Bit 15 set = secondary IDE channel has 80-pin cable.
- * Bit 14 clear = primary IDE channel does not have 80-pin cable.
- * Bit 14 set = primary IDE channel has 80-pin cable.
- */
-static u8 ata66_svwks_dell(ide_hwif_t *hwif)
-{
- struct pci_dev *dev = to_pci_dev(hwif->dev);
-
- if (dev->subsystem_vendor == PCI_VENDOR_ID_DELL &&
- dev->vendor == PCI_VENDOR_ID_SERVERWORKS &&
- (dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB5IDE ||
- dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE))
- return ((1 << (hwif->channel + 14)) &
- dev->subsystem_device) ? ATA_CBL_PATA80 : ATA_CBL_PATA40;
- return ATA_CBL_PATA40;
-}
-
-/* Sun Cobalt Alpine hardware avoids the 80-pin cable
- * detect issue by attaching the drives directly to the board.
- * This check follows the Dell precedent (how scary is that?!)
- *
- * WARNING: this only works on Alpine hardware!
- */
-static u8 ata66_svwks_cobalt(ide_hwif_t *hwif)
-{
- struct pci_dev *dev = to_pci_dev(hwif->dev);
-
- if (dev->subsystem_vendor == PCI_VENDOR_ID_SUN &&
- dev->vendor == PCI_VENDOR_ID_SERVERWORKS &&
- dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB5IDE)
- return ((1 << (hwif->channel + 14)) &
- dev->subsystem_device) ? ATA_CBL_PATA80 : ATA_CBL_PATA40;
- return ATA_CBL_PATA40;
-}
-
-static int svwks_cable_detect(ide_hwif_t *hwif)
-{
- struct pci_dev *dev = to_pci_dev(hwif->dev);
-
- /* Server Works */
- if (dev->subsystem_vendor == PCI_VENDOR_ID_SERVERWORKS)
- return ata66_svwks_svwks (hwif);
-
- /* Dell PowerEdge */
- if (dev->subsystem_vendor == PCI_VENDOR_ID_DELL)
- return ata66_svwks_dell (hwif);
-
- /* Cobalt Alpine */
- if (dev->subsystem_vendor == PCI_VENDOR_ID_SUN)
- return ata66_svwks_cobalt (hwif);
-
- /* Per Specified Design by OEM, and ASIC Architect */
- if ((dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE) ||
- (dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2))
- return ATA_CBL_PATA80;
-
- return ATA_CBL_PATA40;
-}
-
static const struct ide_port_ops osb4_port_ops = {
- .set_pio_mode = svwks_set_pio_mode,
- .set_dma_mode = svwks_set_dma_mode,
+ .set_pio_mode = serverworks_set_piomode,
+ .set_dma_mode = serverworks_set_dmamode,
};
static const struct ide_port_ops svwks_port_ops = {
- .set_pio_mode = svwks_set_pio_mode,
- .set_dma_mode = svwks_set_dma_mode,
+ .set_pio_mode = serverworks_set_piomode,
+ .set_dma_mode = serverworks_set_dmamode,
.udma_filter = svwks_udma_filter,
- .cable_detect = svwks_cable_detect,
+ .cable_detect = serverworks_cable_detect,
};
static const struct ide_port_info serverworks_chipsets[] __devinitdata = {
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 62/68] pata_sl82c105: move code to be re-used by ide2libata to pata_sl82c105.h
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (60 preceding siblings ...)
2010-01-29 16:09 ` [PATCH 61/68] serverworks: convert to ide2libata Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:09 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:09 ` [PATCH 63/68] sl82c105: convert to ide2libata Bartlomiej Zolnierkiewicz
` (6 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:09 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] pata_sl82c105: move code to be re-used by ide2libata to pata_sl82c105.h
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ata/pata_sl82c105.c | 106 --------------------------------------------
drivers/ata/pata_sl82c105.h | 106 ++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 107 insertions(+), 105 deletions(-)
Index: b/drivers/ata/pata_sl82c105.c
===================================================================
--- a/drivers/ata/pata_sl82c105.c
+++ b/drivers/ata/pata_sl82c105.c
@@ -28,18 +28,7 @@
#define DRV_NAME "pata_sl82c105"
#define DRV_VERSION "0.3.3"
-enum {
- /*
- * SL82C105 PCI config register 0x40 bits.
- */
- CTRL_IDE_IRQB = (1 << 30),
- CTRL_IDE_IRQA = (1 << 28),
- CTRL_LEGIRQ = (1 << 11),
- CTRL_P1F16 = (1 << 5),
- CTRL_P1EN = (1 << 4),
- CTRL_P0F16 = (1 << 1),
- CTRL_P0EN = (1 << 0)
-};
+#include "pata_sl82c105.h"
/**
* sl82c105_pre_reset - probe begin
@@ -104,50 +93,6 @@ static void sl82c105_set_piomode(struct
}
/**
- * sl82c105_configure_dmamode - set DMA mode in chip
- * @ap: ATA interface
- * @adev: ATA device
- *
- * Load DMA cycle times into the chip ready for a DMA transfer
- * to occur.
- */
-
-static void sl82c105_configure_dmamode(struct ata_port *ap, struct ata_device *adev)
-{
- struct pci_dev *pdev = to_pci_dev(ap->host->dev);
- static u16 dma_timing[3] = {
- 0x707, 0x201, 0x200
- };
- u16 dummy;
- int timing = 0x44 + (8 * ap->port_no) + (4 * adev->devno);
- int dma = adev->dma_mode - XFER_MW_DMA_0;
-
- pci_write_config_word(pdev, timing, dma_timing[dma]);
- /* Can we lose this oddity of the old driver */
- pci_read_config_word(pdev, timing, &dummy);
-}
-
-/**
- * sl82c105_reset_engine - Reset the DMA engine
- * @ap: ATA interface
- *
- * The sl82c105 has some serious problems with the DMA engine
- * when transfers don't run as expected or ATAPI is used. The
- * recommended fix is to reset the engine each use using a chip
- * test register.
- */
-
-static void sl82c105_reset_engine(struct ata_port *ap)
-{
- struct pci_dev *pdev = to_pci_dev(ap->host->dev);
- u16 val;
-
- pci_read_config_word(pdev, 0x7E, &val);
- pci_write_config_word(pdev, 0x7E, val | 4);
- pci_write_config_word(pdev, 0x7E, val & ~4);
-}
-
-/**
* sl82c105_bmdma_start - DMA engine begin
* @qc: ATA command
*
@@ -242,55 +187,6 @@ static struct ata_port_operations sl82c1
.prereset = sl82c105_pre_reset,
};
-/**
- * sl82c105_bridge_revision - find bridge version
- * @pdev: PCI device for the ATA function
- *
- * Locates the PCI bridge associated with the ATA function and
- * providing it is a Winbond 553 reports the revision. If it cannot
- * find a revision or the right device it returns -1
- */
-
-static int sl82c105_bridge_revision(struct pci_dev *pdev)
-{
- struct pci_dev *bridge;
-
- /*
- * The bridge should be part of the same device, but function 0.
- */
- bridge = pci_get_slot(pdev->bus,
- PCI_DEVFN(PCI_SLOT(pdev->devfn), 0));
- if (!bridge)
- return -1;
-
- /*
- * Make sure it is a Winbond 553 and is an ISA bridge.
- */
- if (bridge->vendor != PCI_VENDOR_ID_WINBOND ||
- bridge->device != PCI_DEVICE_ID_WINBOND_83C553 ||
- bridge->class >> 8 != PCI_CLASS_BRIDGE_ISA) {
- pci_dev_put(bridge);
- return -1;
- }
- /*
- * We need to find function 0's revision, not function 1
- */
- pci_dev_put(bridge);
- return bridge->revision;
-}
-
-static int sl82c105_fixup(struct device *dev)
-{
- struct pci_dev *pdev = to_pci_dev(dev);
- u32 val;
-
- pci_read_config_dword(pdev, 0x40, &val);
- val |= CTRL_P0EN | CTRL_P0F16 | CTRL_P1F16;
- pci_write_config_dword(pdev, 0x40, val);
-
- return 0;
-}
-
static int sl82c105_init_one(struct pci_dev *dev, const struct pci_device_id *id)
{
static const struct ata_port_info info_dma = {
Index: b/drivers/ata/pata_sl82c105.h
===================================================================
--- /dev/null
+++ b/drivers/ata/pata_sl82c105.h
@@ -0,0 +1,106 @@
+
+enum {
+ /*
+ * SL82C105 PCI config register 0x40 bits.
+ */
+ CTRL_IDE_IRQB = (1 << 30),
+ CTRL_IDE_IRQA = (1 << 28),
+ CTRL_LEGIRQ = (1 << 11),
+ CTRL_P1F16 = (1 << 5),
+ CTRL_P1EN = (1 << 4),
+ CTRL_P0F16 = (1 << 1),
+ CTRL_P0EN = (1 << 0)
+};
+
+/**
+ * sl82c105_configure_dmamode - set DMA mode in chip
+ * @ap: ATA interface
+ * @adev: ATA device
+ *
+ * Load DMA cycle times into the chip ready for a DMA transfer
+ * to occur.
+ */
+
+static void sl82c105_configure_dmamode(struct ata_port *ap, struct ata_device *adev)
+{
+ struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+ static u16 dma_timing[3] = {
+ 0x707, 0x201, 0x200
+ };
+ u16 dummy;
+ int timing = 0x44 + (8 * ap->port_no) + (4 * adev->devno);
+ int dma = adev->dma_mode - XFER_MW_DMA_0;
+
+ pci_write_config_word(pdev, timing, dma_timing[dma]);
+ /* Can we lose this oddity of the old driver */
+ pci_read_config_word(pdev, timing, &dummy);
+}
+
+/**
+ * sl82c105_reset_engine - Reset the DMA engine
+ * @ap: ATA interface
+ *
+ * The sl82c105 has some serious problems with the DMA engine
+ * when transfers don't run as expected or ATAPI is used. The
+ * recommended fix is to reset the engine each use using a chip
+ * test register.
+ */
+
+static void sl82c105_reset_engine(struct ata_port *ap)
+{
+ struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+ u16 val;
+
+ pci_read_config_word(pdev, 0x7E, &val);
+ pci_write_config_word(pdev, 0x7E, val | 4);
+ pci_write_config_word(pdev, 0x7E, val & ~4);
+}
+
+/**
+ * sl82c105_bridge_revision - find bridge version
+ * @pdev: PCI device for the ATA function
+ *
+ * Locates the PCI bridge associated with the ATA function and
+ * providing it is a Winbond 553 reports the revision. If it cannot
+ * find a revision or the right device it returns -1
+ */
+
+static int sl82c105_bridge_revision(struct pci_dev *pdev)
+{
+ struct pci_dev *bridge;
+
+ /*
+ * The bridge should be part of the same device, but function 0.
+ */
+ bridge = pci_get_slot(pdev->bus,
+ PCI_DEVFN(PCI_SLOT(pdev->devfn), 0));
+ if (!bridge)
+ return -1;
+
+ /*
+ * Make sure it is a Winbond 553 and is an ISA bridge.
+ */
+ if (bridge->vendor != PCI_VENDOR_ID_WINBOND ||
+ bridge->device != PCI_DEVICE_ID_WINBOND_83C553 ||
+ bridge->class >> 8 != PCI_CLASS_BRIDGE_ISA) {
+ pci_dev_put(bridge);
+ return -1;
+ }
+ /*
+ * We need to find function 0's revision, not function 1
+ */
+ pci_dev_put(bridge);
+ return bridge->revision;
+}
+
+static int sl82c105_fixup(struct device *dev)
+{
+ struct pci_dev *pdev = to_pci_dev(dev);
+ u32 val;
+
+ pci_read_config_dword(pdev, 0x40, &val);
+ val |= CTRL_P0EN | CTRL_P0F16 | CTRL_P1F16;
+ pci_write_config_dword(pdev, 0x40, val);
+
+ return 0;
+}
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 63/68] sl82c105: convert to ide2libata
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (61 preceding siblings ...)
2010-01-29 16:09 ` [PATCH 62/68] pata_sl82c105: move code to be re-used by ide2libata to pata_sl82c105.h Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:09 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:10 ` [PATCH 64/68] pata_triflex: move code to be re-used by ide2libata to pata_triflex.h Bartlomiej Zolnierkiewicz
` (5 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:09 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] sl82c105: convert to ide2libata
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ata/pata_sl82c105.h | 4 +
drivers/ide/sl82c105.c | 103 +++-----------------------------------------
2 files changed, 12 insertions(+), 95 deletions(-)
Index: b/drivers/ata/pata_sl82c105.h
===================================================================
--- a/drivers/ata/pata_sl82c105.h
+++ b/drivers/ata/pata_sl82c105.h
@@ -27,13 +27,17 @@ static void sl82c105_configure_dmamode(s
static u16 dma_timing[3] = {
0x707, 0x201, 0x200
};
+#ifndef __IDE2LIBATA
u16 dummy;
+#endif
int timing = 0x44 + (8 * ap->port_no) + (4 * adev->devno);
int dma = adev->dma_mode - XFER_MW_DMA_0;
pci_write_config_word(pdev, timing, dma_timing[dma]);
+#ifndef __IDE2LIBATA
/* Can we lose this oddity of the old driver */
pci_read_config_word(pdev, timing, &dummy);
+#endif
}
/**
Index: b/drivers/ide/sl82c105.c
===================================================================
--- a/drivers/ide/sl82c105.c
+++ b/drivers/ide/sl82c105.c
@@ -24,16 +24,8 @@
#define DRV_NAME "sl82c105"
-/*
- * SL82C105 PCI config register 0x40 bits.
- */
-#define CTRL_IDE_IRQB (1 << 30)
-#define CTRL_IDE_IRQA (1 << 28)
-#define CTRL_LEGIRQ (1 << 11)
-#define CTRL_P1F16 (1 << 5)
-#define CTRL_P1EN (1 << 4)
-#define CTRL_P0F16 (1 << 1)
-#define CTRL_P0EN (1 << 0)
+#include <linux/ide2libata.h>
+#include "../ata/pata_sl82c105.h"
/*
* Convert a PIO mode and cycle time to the required on/off times
@@ -89,25 +81,8 @@ static void sl82c105_set_pio_mode(ide_hw
ide_pio_cycle_time(drive, pio), drv_ctrl);
}
-/*
- * Configure the chipset for DMA mode.
- */
static void sl82c105_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- static u16 mwdma_timings[] = {0x0707, 0x0201, 0x0200};
- unsigned long timings = (unsigned long)ide_get_drivedata(drive);
- u16 drv_ctrl;
- const u8 speed = drive->dma_mode;
-
- drv_ctrl = mwdma_timings[speed - XFER_MW_DMA_0];
-
- /*
- * Store the DMA timings so that we can actually program
- * them when DMA will be turned on...
- */
- timings &= 0x0000ffff;
- timings |= (unsigned long)drv_ctrl << 16;
- ide_set_drivedata(drive, (void *)timings);
}
static int sl82c105_test_irq(ide_hwif_t *hwif)
@@ -121,23 +96,6 @@ static int sl82c105_test_irq(ide_hwif_t
}
/*
- * The SL82C105 holds off all IDE interrupts while in DMA mode until
- * all DMA activity is completed. Sometimes this causes problems (eg,
- * when the drive wants to report an error condition).
- *
- * 0x7e is a "chip testing" register. Bit 2 resets the DMA controller
- * state machine. We need to kick this to work around various bugs.
- */
-static inline void sl82c105_reset_host(struct pci_dev *dev)
-{
- u16 val;
-
- pci_read_config_word(dev, 0x7e, &val);
- pci_write_config_word(dev, 0x7e, val | (1 << 2));
- pci_write_config_word(dev, 0x7e, val & ~(1 << 2));
-}
-
-/*
* If we get an IRQ timeout, it might be that the DMA state machine
* got confused. Fix from Todd Inglett. Details from Winbond.
*
@@ -171,7 +129,7 @@ static void sl82c105_dma_lost_irq(ide_dr
printk(KERN_INFO "sl82c105: DMA was enabled\n");
}
- sl82c105_reset_host(dev);
+ sl82c105_reset_engine(hwif);
}
/*
@@ -184,22 +142,16 @@ static void sl82c105_dma_lost_irq(ide_dr
*/
static void sl82c105_dma_start(ide_drive_t *drive)
{
- ide_hwif_t *hwif = drive->hwif;
- struct pci_dev *dev = to_pci_dev(hwif->dev);
- int reg = 0x44 + drive->dn * 4;
-
- pci_write_config_word(dev, reg,
- (unsigned long)ide_get_drivedata(drive) >> 16);
+ ide_hwif_t *hwif = drive->hwif;
- sl82c105_reset_host(dev);
+ sl82c105_configure_dmamode(hwif, drive);
+ sl82c105_reset_engine(hwif);
ide_dma_start(drive);
}
static void sl82c105_dma_clear(ide_drive_t *drive)
{
- struct pci_dev *dev = to_pci_dev(drive->hwif->dev);
-
- sl82c105_reset_host(dev);
+ sl82c105_reset_engine(drive->hwif);
}
static int sl82c105_dma_end(ide_drive_t *drive)
@@ -229,39 +181,6 @@ static void sl82c105_resetproc(ide_drive
}
/*
- * Return the revision of the Winbond bridge
- * which this function is part of.
- */
-static u8 sl82c105_bridge_revision(struct pci_dev *dev)
-{
- struct pci_dev *bridge;
-
- /*
- * The bridge should be part of the same device, but function 0.
- */
- bridge = pci_get_bus_and_slot(dev->bus->number,
- PCI_DEVFN(PCI_SLOT(dev->devfn), 0));
- if (!bridge)
- return -1;
-
- /*
- * Make sure it is a Winbond 553 and is an ISA bridge.
- */
- if (bridge->vendor != PCI_VENDOR_ID_WINBOND ||
- bridge->device != PCI_DEVICE_ID_WINBOND_83C553 ||
- bridge->class >> 8 != PCI_CLASS_BRIDGE_ISA) {
- pci_dev_put(bridge);
- return -1;
- }
- /*
- * We need to find function 0's revision, not function 1
- */
- pci_dev_put(bridge);
-
- return bridge->revision;
-}
-
-/*
* Enable the PCI device
*
* --BenH: It's arch fixup code that should enable channels that
@@ -271,13 +190,7 @@ static u8 sl82c105_bridge_revision(struc
*/
static int init_chipset_sl82c105(struct pci_dev *dev)
{
- u32 val;
-
- pci_read_config_dword(dev, 0x40, &val);
- val |= CTRL_P0EN | CTRL_P0F16 | CTRL_P1F16;
- pci_write_config_dword(dev, 0x40, val);
-
- return 0;
+ return sl82c105_fixup(&dev->dev);
}
static const struct ide_port_ops sl82c105_port_ops = {
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 64/68] pata_triflex: move code to be re-used by ide2libata to pata_triflex.h
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (62 preceding siblings ...)
2010-01-29 16:09 ` [PATCH 63/68] sl82c105: convert to ide2libata Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:10 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:10 ` [PATCH 65/68] triflex: convert to ide2libata Bartlomiej Zolnierkiewicz
` (4 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:10 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] pata_triflex: move code to be re-used by ide2libata to pata_triflex.h
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ata/pata_triflex.c | 72 ---------------------------------------------
drivers/ata/pata_triflex.h | 69 +++++++++++++++++++++++++++++++++++++++++++
2 files changed, 70 insertions(+), 71 deletions(-)
Index: b/drivers/ata/pata_triflex.c
===================================================================
--- a/drivers/ata/pata_triflex.c
+++ b/drivers/ata/pata_triflex.c
@@ -69,77 +69,7 @@ static int triflex_prereset(struct ata_l
return ata_sff_prereset(link, deadline);
}
-
-
-/**
- * triflex_load_timing - timing configuration
- * @ap: ATA interface
- * @adev: Device on the bus
- * @speed: speed to configure
- *
- * The Triflex has one set of timings per device per channel. This
- * means we must do some switching. As the PIO and DMA timings don't
- * match we have to do some reloading unlike PIIX devices where tuning
- * tricks can avoid it.
- */
-
-static void triflex_load_timing(struct ata_port *ap, struct ata_device *adev, int speed)
-{
- struct pci_dev *pdev = to_pci_dev(ap->host->dev);
- u32 timing = 0;
- u32 triflex_timing, old_triflex_timing;
- int channel_offset = ap->port_no ? 0x74: 0x70;
- unsigned int is_slave = (adev->devno != 0);
-
-
- pci_read_config_dword(pdev, channel_offset, &old_triflex_timing);
- triflex_timing = old_triflex_timing;
-
- switch(speed)
- {
- case XFER_MW_DMA_2:
- timing = 0x0103;break;
- case XFER_MW_DMA_1:
- timing = 0x0203;break;
- case XFER_MW_DMA_0:
- timing = 0x0808;break;
- case XFER_SW_DMA_2:
- case XFER_SW_DMA_1:
- case XFER_SW_DMA_0:
- timing = 0x0F0F;break;
- case XFER_PIO_4:
- timing = 0x0202;break;
- case XFER_PIO_3:
- timing = 0x0204;break;
- case XFER_PIO_2:
- timing = 0x0404;break;
- case XFER_PIO_1:
- timing = 0x0508;break;
- case XFER_PIO_0:
- timing = 0x0808;break;
- default:
- BUG();
- }
- triflex_timing &= ~ (0xFFFF << (16 * is_slave));
- triflex_timing |= (timing << (16 * is_slave));
-
- if (triflex_timing != old_triflex_timing)
- pci_write_config_dword(pdev, channel_offset, triflex_timing);
-}
-
-/**
- * triflex_set_piomode - set initial PIO mode data
- * @ap: ATA interface
- * @adev: ATA device
- *
- * Use the timing loader to set up the PIO mode. We have to do this
- * because DMA start/stop will only be called once DMA occurs. If there
- * has been no DMA then the PIO timings are still needed.
- */
-static void triflex_set_piomode(struct ata_port *ap, struct ata_device *adev)
-{
- triflex_load_timing(ap, adev, adev->pio_mode);
-}
+#include "pata_triflex.h"
/**
* triflex_dma_start - DMA start callback
Index: b/drivers/ata/pata_triflex.h
===================================================================
--- /dev/null
+++ b/drivers/ata/pata_triflex.h
@@ -0,0 +1,69 @@
+
+/**
+ * triflex_load_timing - timing configuration
+ * @ap: ATA interface
+ * @adev: Device on the bus
+ * @speed: speed to configure
+ *
+ * The Triflex has one set of timings per device per channel. This
+ * means we must do some switching. As the PIO and DMA timings don't
+ * match we have to do some reloading unlike PIIX devices where tuning
+ * tricks can avoid it.
+ */
+
+static void triflex_load_timing(struct ata_port *ap, struct ata_device *adev,
+ int speed)
+{
+ struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+ u32 timing = 0;
+ u32 triflex_timing, old_triflex_timing;
+ int channel_offset = ap->port_no ? 0x74 : 0x70;
+ unsigned int is_slave = (adev->devno != 0);
+
+ pci_read_config_dword(pdev, channel_offset, &old_triflex_timing);
+ triflex_timing = old_triflex_timing;
+
+ switch (speed) {
+ case XFER_MW_DMA_2:
+ timing = 0x0103; break;
+ case XFER_MW_DMA_1:
+ timing = 0x0203; break;
+ case XFER_MW_DMA_0:
+ timing = 0x0808; break;
+ case XFER_SW_DMA_2:
+ case XFER_SW_DMA_1:
+ case XFER_SW_DMA_0:
+ timing = 0x0F0F; break;
+ case XFER_PIO_4:
+ timing = 0x0202; break;
+ case XFER_PIO_3:
+ timing = 0x0204; break;
+ case XFER_PIO_2:
+ timing = 0x0404; break;
+ case XFER_PIO_1:
+ timing = 0x0508; break;
+ case XFER_PIO_0:
+ timing = 0x0808; break;
+ default:
+ BUG();
+ }
+ triflex_timing &= ~(0xFFFF << (16 * is_slave));
+ triflex_timing |= (timing << (16 * is_slave));
+
+ if (triflex_timing != old_triflex_timing)
+ pci_write_config_dword(pdev, channel_offset, triflex_timing);
+}
+
+/**
+ * triflex_set_piomode - set initial PIO mode data
+ * @ap: ATA interface
+ * @adev: ATA device
+ *
+ * Use the timing loader to set up the PIO mode. We have to do this
+ * because DMA start/stop will only be called once DMA occurs. If there
+ * has been no DMA then the PIO timings are still needed.
+ */
+static void triflex_set_piomode(struct ata_port *ap, struct ata_device *adev)
+{
+ triflex_load_timing(ap, adev, adev->pio_mode);
+}
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 65/68] triflex: convert to ide2libata
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (63 preceding siblings ...)
2010-01-29 16:10 ` [PATCH 64/68] pata_triflex: move code to be re-used by ide2libata to pata_triflex.h Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:10 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:10 ` [PATCH 66/68] pata_via: factor out code for finding ISA bridge Bartlomiej Zolnierkiewicz
` (3 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:10 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] triflex: convert to ide2libata
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ide/triflex.c | 57 +++++---------------------------------------------
1 file changed, 6 insertions(+), 51 deletions(-)
Index: b/drivers/ide/triflex.c
===================================================================
--- a/drivers/ide/triflex.c
+++ b/drivers/ide/triflex.c
@@ -34,62 +34,17 @@
#define DRV_NAME "triflex"
-static void triflex_set_mode(ide_hwif_t *hwif, ide_drive_t *drive)
-{
- struct pci_dev *dev = to_pci_dev(hwif->dev);
- u32 triflex_timings = 0;
- u16 timing = 0;
- u8 channel_offset = hwif->channel ? 0x74 : 0x70, unit = drive->dn & 1;
-
- pci_read_config_dword(dev, channel_offset, &triflex_timings);
-
- switch (drive->dma_mode) {
- case XFER_MW_DMA_2:
- timing = 0x0103;
- break;
- case XFER_MW_DMA_1:
- timing = 0x0203;
- break;
- case XFER_MW_DMA_0:
- timing = 0x0808;
- break;
- case XFER_SW_DMA_2:
- case XFER_SW_DMA_1:
- case XFER_SW_DMA_0:
- timing = 0x0f0f;
- break;
- case XFER_PIO_4:
- timing = 0x0202;
- break;
- case XFER_PIO_3:
- timing = 0x0204;
- break;
- case XFER_PIO_2:
- timing = 0x0404;
- break;
- case XFER_PIO_1:
- timing = 0x0508;
- break;
- case XFER_PIO_0:
- timing = 0x0808;
- break;
- }
-
- triflex_timings &= ~(0xFFFF << (16 * unit));
- triflex_timings |= (timing << (16 * unit));
-
- pci_write_config_dword(dev, channel_offset, triflex_timings);
-}
+#include <linux/ide2libata.h>
+#include "../ata/pata_triflex.h"
-static void triflex_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
+static void triflex_set_dmamode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- drive->dma_mode = drive->pio_mode;
- triflex_set_mode(hwif, drive);
+ triflex_load_timing(hwif, drive, drive->dma_mode);
}
static const struct ide_port_ops triflex_port_ops = {
- .set_pio_mode = triflex_set_pio_mode,
- .set_dma_mode = triflex_set_mode,
+ .set_pio_mode = triflex_set_piomode,
+ .set_dma_mode = triflex_set_dmamode,
};
static const struct ide_port_info triflex_device __devinitdata = {
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 66/68] pata_via: factor out code for finding ISA bridge
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (64 preceding siblings ...)
2010-01-29 16:10 ` [PATCH 65/68] triflex: convert to ide2libata Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:10 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:10 ` [PATCH 67/68] pata_via: move code to be re-used by ide2libata to pata_via.h Bartlomiej Zolnierkiewicz
` (2 subsequent siblings)
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:10 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] pata_via: factor out code for finding ISA bridge
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ata/pata_via.c | 35 +++++++++++++++++++++++------------
1 file changed, 23 insertions(+), 12 deletions(-)
Index: b/drivers/ata/pata_via.c
===================================================================
--- a/drivers/ata/pata_via.c
+++ b/drivers/ata/pata_via.c
@@ -431,6 +431,28 @@ static struct ata_port_operations via_po
.sff_data_xfer = ata_sff_data_xfer_noirq,
};
+static const struct via_isa_bridge *via_config_find(void)
+{
+ const struct via_isa_bridge *config;
+ struct pci_dev *isa;
+
+ for (config = via_isa_bridges; config->id != PCI_DEVICE_ID_VIA_ANON;
+ config++) {
+ isa = pci_get_device(PCI_VENDOR_ID_VIA +
+ !!(config->flags & VIA_BAD_ID), config->id, NULL);
+ if (isa) {
+ u8 rev = isa->revision;
+
+ pci_dev_put(isa);
+
+ if (rev >= config->rev_min && rev <= config->rev_max)
+ break;
+ }
+ }
+
+ return config;
+}
+
/**
* via_config_fifo - set up the FIFO
* @pdev: PCI device
@@ -544,7 +566,6 @@ static int via_init_one(struct pci_dev *
.port_ops = &via_port_ops
};
const struct ata_port_info *ppi[] = { NULL, NULL };
- struct pci_dev *isa;
const struct via_isa_bridge *config;
static int printed_version;
u8 enable;
@@ -563,17 +584,7 @@ static int via_init_one(struct pci_dev *
/* To find out how the IDE will behave and what features we
actually have to look at the bridge not the IDE controller */
- for (config = via_isa_bridges; config->id != PCI_DEVICE_ID_VIA_ANON;
- config++)
- if ((isa = pci_get_device(PCI_VENDOR_ID_VIA +
- !!(config->flags & VIA_BAD_ID),
- config->id, NULL))) {
- u8 rev = isa->revision;
- pci_dev_put(isa);
-
- if (rev >= config->rev_min && rev <= config->rev_max)
- break;
- }
+ config = via_config_find();
if (!(config->flags & VIA_NO_ENABLES)) {
/* 0x40 low bits indicate enabled channels */
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 67/68] pata_via: move code to be re-used by ide2libata to pata_via.h
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (65 preceding siblings ...)
2010-01-29 16:10 ` [PATCH 66/68] pata_via: factor out code for finding ISA bridge Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:10 ` Bartlomiej Zolnierkiewicz
2010-01-29 16:10 ` [PATCH 68/68] via82cxxx: convert to ide2libata Bartlomiej Zolnierkiewicz
2010-01-29 21:40 ` [PATCH 00/68] ide2libata Jeff Garzik
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:10 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] pata_via: move code to be re-used by ide2libata to pata_via.h
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ata/pata_via.c | 237 -----------------------------------------------
drivers/ata/pata_via.h | 242 +++++++++++++++++++++++++++++++++++++++++++++++++
2 files changed, 242 insertions(+), 237 deletions(-)
Index: b/drivers/ata/pata_via.c
===================================================================
--- a/drivers/ata/pata_via.c
+++ b/drivers/ata/pata_via.c
@@ -64,64 +64,6 @@
#define DRV_NAME "pata_via"
#define DRV_VERSION "0.3.4"
-enum {
- VIA_BAD_PREQ = 0x01, /* Crashes if PREQ# till DDACK# set */
- VIA_BAD_CLK66 = 0x02, /* 66 MHz clock doesn't work correctly */
- VIA_SET_FIFO = 0x04, /* Needs to have FIFO split set */
- VIA_NO_UNMASK = 0x08, /* Doesn't work with IRQ unmasking on */
- VIA_BAD_ID = 0x10, /* Has wrong vendor ID (0x1107) */
- VIA_BAD_AST = 0x20, /* Don't touch Address Setup Timing */
- VIA_NO_ENABLES = 0x40, /* Has no enablebits */
- VIA_SATA_PATA = 0x80, /* SATA/PATA combined configuration */
-};
-
-enum {
- VIA_IDFLAG_SINGLE = (1 << 0), /* single channel controller) */
-};
-
-/*
- * VIA SouthBridge chips.
- */
-
-static const struct via_isa_bridge {
- const char *name;
- u16 id;
- u8 rev_min;
- u8 rev_max;
- u8 udma_mask;
- u8 flags;
-} via_isa_bridges[] = {
- { "vx855", PCI_DEVICE_ID_VIA_VX855, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
- { "vx800", PCI_DEVICE_ID_VIA_VX800, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
- { "vt8261", PCI_DEVICE_ID_VIA_8261, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
- { "vt8237s", PCI_DEVICE_ID_VIA_8237S, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
- { "vt8251", PCI_DEVICE_ID_VIA_8251, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
- { "cx700", PCI_DEVICE_ID_VIA_CX700, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
- { "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_NO_ENABLES },
- { "vt6415", PCI_DEVICE_ID_VIA_6415, 0x00, 0xff, ATA_UDMA6, VIA_BAD_AST | VIA_NO_ENABLES },
- { "vt8237a", PCI_DEVICE_ID_VIA_8237A, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
- { "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
- { "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
- { "vt8233a", PCI_DEVICE_ID_VIA_8233A, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
- { "vt8233c", PCI_DEVICE_ID_VIA_8233C_0, 0x00, 0x2f, ATA_UDMA5, },
- { "vt8233", PCI_DEVICE_ID_VIA_8233_0, 0x00, 0x2f, ATA_UDMA5, },
- { "vt8231", PCI_DEVICE_ID_VIA_8231, 0x00, 0x2f, ATA_UDMA5, },
- { "vt82c686b", PCI_DEVICE_ID_VIA_82C686, 0x40, 0x4f, ATA_UDMA5, },
- { "vt82c686a", PCI_DEVICE_ID_VIA_82C686, 0x10, 0x2f, ATA_UDMA4, },
- { "vt82c686", PCI_DEVICE_ID_VIA_82C686, 0x00, 0x0f, ATA_UDMA2, VIA_BAD_CLK66 },
- { "vt82c596b", PCI_DEVICE_ID_VIA_82C596, 0x10, 0x2f, ATA_UDMA4, },
- { "vt82c596a", PCI_DEVICE_ID_VIA_82C596, 0x00, 0x0f, ATA_UDMA2, VIA_BAD_CLK66 },
- { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, ATA_UDMA2, VIA_SET_FIFO },
- { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, ATA_UDMA2, VIA_SET_FIFO | VIA_BAD_PREQ },
- { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, ATA_UDMA2, VIA_SET_FIFO },
- { "vt82c586a", PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, ATA_UDMA2, VIA_SET_FIFO },
- { "vt82c586", PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f, 0x00, VIA_SET_FIFO },
- { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, 0x00, VIA_SET_FIFO | VIA_NO_UNMASK },
- { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, 0x00, VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID },
- { "vtxxxx", PCI_DEVICE_ID_VIA_ANON, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
- { NULL }
-};
-
struct via_port {
u8 cached_device;
};
@@ -188,108 +130,6 @@ static int via_pre_reset(struct ata_link
return ata_sff_prereset(link, deadline);
}
-
-/**
- * via_do_set_mode - set transfer mode data
- * @ap: ATA interface
- * @adev: ATA device
- * @mode: ATA mode being programmed
- * @set_ast: Set to program address setup
- * @udma_type: UDMA mode/format of registers
- *
- * Program the VIA registers for DMA and PIO modes. Uses the ata timing
- * support in order to compute modes.
- *
- * FIXME: Hotplug will require we serialize multiple mode changes
- * on the two channels.
- */
-
-static void via_do_set_mode(struct ata_port *ap, struct ata_device *adev,
- int mode, int set_ast, int udma_type)
-{
- struct pci_dev *pdev = to_pci_dev(ap->host->dev);
- struct ata_device *peer = ata_dev_pair(adev);
- struct ata_timing t, p;
- static int via_clock = 33333; /* Bus clock in kHZ */
- unsigned long T = 1000000000 / via_clock;
- unsigned long UT = T;
- int ut;
- int offset = 3 - (2*ap->port_no) - adev->devno;
-
- switch (udma_type) {
- case ATA_UDMA4:
- UT = T / 2; break;
- case ATA_UDMA5:
- UT = T / 3; break;
- case ATA_UDMA6:
- UT = T / 4; break;
- }
-
- /* Calculate the timing values we require */
- ata_timing_compute(adev->id, mode, adev->pio_mode, &t, T, UT);
-
- /* We share 8bit timing so we must merge the constraints */
- if (peer) {
- if (peer->pio_mode) {
- ata_timing_compute(peer->id, peer->pio_mode,
- peer->pio_mode, &p, T, UT);
- ata_timing_merge(&p, &t, &t, ATA_TIMING_8BIT);
- }
- }
-
- /* Address setup is programmable but breaks on UDMA133 setups */
- if (set_ast) {
- u8 setup; /* 2 bits per drive */
- int shift = 2 * offset;
-
- pci_read_config_byte(pdev, 0x4C, &setup);
- setup &= ~(3 << shift);
- setup |= (clamp_val(t.setup, 1, 4) - 1) << shift;
- pci_write_config_byte(pdev, 0x4C, setup);
- }
-
- /* Load the PIO mode bits */
- pci_write_config_byte(pdev, 0x4F - ap->port_no,
- ((clamp_val(t.act8b, 1, 16) - 1) << 4) | (clamp_val(t.rec8b, 1, 16) - 1));
- pci_write_config_byte(pdev, 0x48 + offset,
- ((clamp_val(t.active, 1, 16) - 1) << 4) | (clamp_val(t.recover, 1, 16) - 1));
-
- /* Load the UDMA bits according to type */
- switch (udma_type) {
- case ATA_UDMA2:
- default:
- ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 5) - 2)) : 0x03;
- break;
- case ATA_UDMA4:
- ut = t.udma ? (0xe8 | (clamp_val(t.udma, 2, 9) - 2)) : 0x0f;
- break;
- case ATA_UDMA5:
- ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 9) - 2)) : 0x07;
- break;
- case ATA_UDMA6:
- ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 9) - 2)) : 0x07;
- break;
- }
-
- /* Set UDMA unless device is not UDMA capable */
- if (udma_type) {
- u8 udma_etc;
-
- pci_read_config_byte(pdev, 0x50 + offset, &udma_etc);
-
- /* clear transfer mode bit */
- udma_etc &= ~0x20;
-
- if (t.udma) {
- /* preserve 80-wire cable detection bit */
- udma_etc &= 0x10;
- udma_etc |= ut;
- }
-
- pci_write_config_byte(pdev, 0x50 + offset, udma_etc);
- }
-}
-
static void via_set_piomode(struct ata_port *ap, struct ata_device *adev)
{
const struct via_isa_bridge *config = ap->host->private_data;
@@ -431,83 +271,6 @@ static struct ata_port_operations via_po
.sff_data_xfer = ata_sff_data_xfer_noirq,
};
-static const struct via_isa_bridge *via_config_find(void)
-{
- const struct via_isa_bridge *config;
- struct pci_dev *isa;
-
- for (config = via_isa_bridges; config->id != PCI_DEVICE_ID_VIA_ANON;
- config++) {
- isa = pci_get_device(PCI_VENDOR_ID_VIA +
- !!(config->flags & VIA_BAD_ID), config->id, NULL);
- if (isa) {
- u8 rev = isa->revision;
-
- pci_dev_put(isa);
-
- if (rev >= config->rev_min && rev <= config->rev_max)
- break;
- }
- }
-
- return config;
-}
-
-/**
- * via_config_fifo - set up the FIFO
- * @pdev: PCI device
- * @flags: configuration flags
- *
- * Set the FIFO properties for this device if necessary. Used both on
- * set up and on and the resume path
- */
-
-static void via_config_fifo(struct pci_dev *pdev, unsigned int flags)
-{
- u8 enable;
-
- /* 0x40 low bits indicate enabled channels */
- pci_read_config_byte(pdev, 0x40 , &enable);
- enable &= 3;
-
- if (flags & VIA_SET_FIFO) {
- static const u8 fifo_setting[4] = {0x00, 0x60, 0x00, 0x20};
- u8 fifo;
-
- pci_read_config_byte(pdev, 0x43, &fifo);
-
- /* Clear PREQ# until DDACK# for errata */
- if (flags & VIA_BAD_PREQ)
- fifo &= 0x7F;
- else
- fifo &= 0x9f;
- /* Turn on FIFO for enabled channels */
- fifo |= fifo_setting[enable];
- pci_write_config_byte(pdev, 0x43, fifo);
- }
-}
-
-static void via_fixup(struct pci_dev *pdev, const struct via_isa_bridge *config)
-{
- u32 timing;
-
- /* Initialise the FIFO for the enabled channels. */
- via_config_fifo(pdev, config->flags);
-
- if (config->udma_mask == ATA_UDMA4) {
- /* The 66 MHz devices require we enable the clock */
- pci_read_config_dword(pdev, 0x50, &timing);
- timing |= 0x80008;
- pci_write_config_dword(pdev, 0x50, timing);
- }
- if (config->flags & VIA_BAD_CLK66) {
- /* Disable the 66MHz clock on problem devices */
- pci_read_config_dword(pdev, 0x50, &timing);
- timing &= ~0x80008;
- pci_write_config_dword(pdev, 0x50, timing);
- }
-}
-
/**
* via_init_one - discovery callback
* @pdev: PCI device
Index: b/drivers/ata/pata_via.h
===================================================================
--- a/drivers/ata/pata_via.h
+++ b/drivers/ata/pata_via.h
@@ -1,4 +1,64 @@
+#ifdef __LINUX_LIBATA_H__
+enum {
+ VIA_BAD_PREQ = 0x01, /* Crashes if PREQ# till DDACK# set */
+ VIA_BAD_CLK66 = 0x02, /* 66 MHz clock doesn't work correctly */
+ VIA_SET_FIFO = 0x04, /* Needs to have FIFO split set */
+ VIA_NO_UNMASK = 0x08, /* Doesn't work with IRQ unmasking on */
+ VIA_BAD_ID = 0x10, /* Has wrong vendor ID (0x1107) */
+ VIA_BAD_AST = 0x20, /* Don't touch Address Setup Timing */
+ VIA_NO_ENABLES = 0x40, /* Has no enablebits */
+ VIA_SATA_PATA = 0x80, /* SATA/PATA combined configuration */
+};
+
+enum {
+ VIA_IDFLAG_SINGLE = (1 << 0), /* single channel controller */
+};
+
+/*
+ * VIA SouthBridge chips.
+ */
+
+static const struct via_isa_bridge {
+ const char *name;
+ u16 id;
+ u8 rev_min;
+ u8 rev_max;
+ u8 udma_mask;
+ u8 flags;
+} via_isa_bridges[] = {
+ { "vx855", PCI_DEVICE_ID_VIA_VX855, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
+ { "vx800", PCI_DEVICE_ID_VIA_VX800, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
+ { "vt8261", PCI_DEVICE_ID_VIA_8261, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
+ { "vt8237s", PCI_DEVICE_ID_VIA_8237S, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
+ { "vt8251", PCI_DEVICE_ID_VIA_8251, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
+ { "cx700", PCI_DEVICE_ID_VIA_CX700, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
+ { "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_NO_ENABLES },
+ { "vt6415", PCI_DEVICE_ID_VIA_6415, 0x00, 0xff, ATA_UDMA6, VIA_BAD_AST | VIA_NO_ENABLES },
+ { "vt8237a", PCI_DEVICE_ID_VIA_8237A, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
+ { "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
+ { "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
+ { "vt8233a", PCI_DEVICE_ID_VIA_8233A, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
+ { "vt8233c", PCI_DEVICE_ID_VIA_8233C_0, 0x00, 0x2f, ATA_UDMA5, },
+ { "vt8233", PCI_DEVICE_ID_VIA_8233_0, 0x00, 0x2f, ATA_UDMA5, },
+ { "vt8231", PCI_DEVICE_ID_VIA_8231, 0x00, 0x2f, ATA_UDMA5, },
+ { "vt82c686b", PCI_DEVICE_ID_VIA_82C686, 0x40, 0x4f, ATA_UDMA5, },
+ { "vt82c686a", PCI_DEVICE_ID_VIA_82C686, 0x10, 0x2f, ATA_UDMA4, },
+ { "vt82c686", PCI_DEVICE_ID_VIA_82C686, 0x00, 0x0f, ATA_UDMA2, VIA_BAD_CLK66 },
+ { "vt82c596b", PCI_DEVICE_ID_VIA_82C596, 0x10, 0x2f, ATA_UDMA4, },
+ { "vt82c596a", PCI_DEVICE_ID_VIA_82C596, 0x00, 0x0f, ATA_UDMA2, VIA_BAD_CLK66 },
+ { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, ATA_UDMA2, VIA_SET_FIFO },
+ { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, ATA_UDMA2, VIA_SET_FIFO | VIA_BAD_PREQ },
+ { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, ATA_UDMA2, VIA_SET_FIFO },
+ { "vt82c586a", PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, ATA_UDMA2, VIA_SET_FIFO },
+ { "vt82c586", PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f, 0x00, VIA_SET_FIFO },
+ { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, 0x00, VIA_SET_FIFO | VIA_NO_UNMASK },
+ { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, 0x00, VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID },
+ { "vtxxxx", PCI_DEVICE_ID_VIA_ANON, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
+ { NULL }
+};
+#endif
+
#include <linux/dmi.h>
/*
@@ -27,3 +87,185 @@ static int via_cable_override(struct pci
return 1;
return 0;
}
+
+#ifdef __LINUX_LIBATA_H__
+/**
+ * via_do_set_mode - set transfer mode data
+ * @ap: ATA interface
+ * @adev: ATA device
+ * @mode: ATA mode being programmed
+ * @set_ast: Set to program address setup
+ * @udma_type: UDMA mode/format of registers
+ *
+ * Program the VIA registers for DMA and PIO modes. Uses the ata timing
+ * support in order to compute modes.
+ *
+ * FIXME: Hotplug will require we serialize multiple mode changes
+ * on the two channels.
+ */
+
+static void via_do_set_mode(struct ata_port *ap, struct ata_device *adev,
+ int mode, int set_ast, int udma_type)
+{
+ struct pci_dev *pdev = to_pci_dev(ap->host->dev);
+ struct ata_device *peer = ata_dev_pair(adev);
+ struct ata_timing t, p;
+ static int via_clock = 33333; /* Bus clock in kHZ */
+ unsigned long T = 1000000000 / via_clock;
+ unsigned long UT = T;
+ int ut;
+ int offset = 3 - (2*ap->port_no) - adev->devno;
+
+ switch (udma_type) {
+ case ATA_UDMA4:
+ UT = T / 2; break;
+ case ATA_UDMA5:
+ UT = T / 3; break;
+ case ATA_UDMA6:
+ UT = T / 4; break;
+ }
+
+ /* Calculate the timing values we require */
+ ata_timing_compute(adev->id, mode, adev->pio_mode, &t, T, UT);
+
+ /* We share 8bit timing so we must merge the constraints */
+ if (peer) {
+ if (peer->pio_mode) {
+ ata_timing_compute(peer->id, peer->pio_mode,
+ peer->pio_mode, &p, T, UT);
+ ata_timing_merge(&p, &t, &t, ATA_TIMING_8BIT);
+ }
+ }
+
+ /* Address setup is programmable but breaks on UDMA133 setups */
+ if (set_ast) {
+ u8 setup; /* 2 bits per drive */
+ int shift = 2 * offset;
+
+ pci_read_config_byte(pdev, 0x4C, &setup);
+ setup &= ~(3 << shift);
+ setup |= (clamp_val(t.setup, 1, 4) - 1) << shift;
+ pci_write_config_byte(pdev, 0x4C, setup);
+ }
+
+ /* Load the PIO mode bits */
+ pci_write_config_byte(pdev, 0x4F - ap->port_no,
+ ((clamp_val(t.act8b, 1, 16) - 1) << 4) |
+ (clamp_val(t.rec8b, 1, 16) - 1));
+ pci_write_config_byte(pdev, 0x48 + offset,
+ ((clamp_val(t.active, 1, 16) - 1) << 4) |
+ (clamp_val(t.recover, 1, 16) - 1));
+
+ /* Load the UDMA bits according to type */
+ switch (udma_type) {
+ case ATA_UDMA2:
+ default:
+ ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 5) - 2)) : 0x03;
+ break;
+ case ATA_UDMA4:
+ ut = t.udma ? (0xe8 | (clamp_val(t.udma, 2, 9) - 2)) : 0x0f;
+ break;
+ case ATA_UDMA5:
+ ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 9) - 2)) : 0x07;
+ break;
+ case ATA_UDMA6:
+ ut = t.udma ? (0xe0 | (clamp_val(t.udma, 2, 9) - 2)) : 0x07;
+ break;
+ }
+
+ /* Set UDMA unless device is not UDMA capable */
+ if (udma_type) {
+ u8 udma_etc;
+
+ pci_read_config_byte(pdev, 0x50 + offset, &udma_etc);
+
+ /* clear transfer mode bit */
+ udma_etc &= ~0x20;
+
+ if (t.udma) {
+ /* preserve 80-wire cable detection bit */
+ udma_etc &= 0x10;
+ udma_etc |= ut;
+ }
+
+ pci_write_config_byte(pdev, 0x50 + offset, udma_etc);
+ }
+}
+
+static const struct via_isa_bridge *via_config_find(void)
+{
+ const struct via_isa_bridge *config;
+ struct pci_dev *isa;
+
+ for (config = via_isa_bridges; config->id != PCI_DEVICE_ID_VIA_ANON;
+ config++) {
+ isa = pci_get_device(PCI_VENDOR_ID_VIA +
+ !!(config->flags & VIA_BAD_ID), config->id, NULL);
+ if (isa) {
+ u8 rev = isa->revision;
+
+ pci_dev_put(isa);
+
+ if (rev >= config->rev_min && rev <= config->rev_max)
+ break;
+ }
+ }
+
+ return config;
+}
+
+/**
+ * via_config_fifo - set up the FIFO
+ * @pdev: PCI device
+ * @flags: configuration flags
+ *
+ * Set the FIFO properties for this device if necessary. Used both on
+ * set up and on and the resume path
+ */
+
+static void via_config_fifo(struct pci_dev *pdev, unsigned int flags)
+{
+ u8 enable;
+
+ /* 0x40 low bits indicate enabled channels */
+ pci_read_config_byte(pdev, 0x40 , &enable);
+ enable &= 3;
+
+ if (flags & VIA_SET_FIFO) {
+ static const u8 fifo_setting[4] = {0x00, 0x60, 0x00, 0x20};
+ u8 fifo;
+
+ pci_read_config_byte(pdev, 0x43, &fifo);
+
+ /* Clear PREQ# until DDACK# for errata */
+ if (flags & VIA_BAD_PREQ)
+ fifo &= 0x7F;
+ else
+ fifo &= 0x9f;
+ /* Turn on FIFO for enabled channels */
+ fifo |= fifo_setting[enable];
+ pci_write_config_byte(pdev, 0x43, fifo);
+ }
+}
+
+static void via_fixup(struct pci_dev *pdev, const struct via_isa_bridge *config)
+{
+ u32 timing;
+
+ /* Initialise the FIFO for the enabled channels. */
+ via_config_fifo(pdev, config->flags);
+
+ if (config->udma_mask == ATA_UDMA4) {
+ /* The 66 MHz devices require we enable the clock */
+ pci_read_config_dword(pdev, 0x50, &timing);
+ timing |= 0x80008;
+ pci_write_config_dword(pdev, 0x50, timing);
+ }
+ if (config->flags & VIA_BAD_CLK66) {
+ /* Disable the 66MHz clock on problem devices */
+ pci_read_config_dword(pdev, 0x50, &timing);
+ timing &= ~0x80008;
+ pci_write_config_dword(pdev, 0x50, timing);
+ }
+}
+#endif
^ permalink raw reply [flat|nested] 86+ messages in thread* [PATCH 68/68] via82cxxx: convert to ide2libata
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (66 preceding siblings ...)
2010-01-29 16:10 ` [PATCH 67/68] pata_via: move code to be re-used by ide2libata to pata_via.h Bartlomiej Zolnierkiewicz
@ 2010-01-29 16:10 ` Bartlomiej Zolnierkiewicz
2010-01-29 21:40 ` [PATCH 00/68] ide2libata Jeff Garzik
68 siblings, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 16:10 UTC (permalink / raw)
To: linux-ide; +Cc: Bartlomiej Zolnierkiewicz, linux-kernel
From: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Subject: [PATCH] via82cxxx: convert to ide2libata
Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
---
drivers/ata/pata_via.h | 8 -
drivers/ide/via82cxxx.c | 261 ++++--------------------------------------------
2 files changed, 28 insertions(+), 241 deletions(-)
Index: b/drivers/ata/pata_via.h
===================================================================
--- a/drivers/ata/pata_via.h
+++ b/drivers/ata/pata_via.h
@@ -1,5 +1,4 @@
-#ifdef __LINUX_LIBATA_H__
enum {
VIA_BAD_PREQ = 0x01, /* Crashes if PREQ# till DDACK# set */
VIA_BAD_CLK66 = 0x02, /* 66 MHz clock doesn't work correctly */
@@ -12,7 +11,7 @@ enum {
};
enum {
- VIA_IDFLAG_SINGLE = (1 << 0), /* single channel controller */
+ VIA_IDFLAG_SINGLE = (1 << 1), /* single channel controller */
};
/*
@@ -57,7 +56,6 @@ static const struct via_isa_bridge {
{ "vtxxxx", PCI_DEVICE_ID_VIA_ANON, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
{ NULL }
};
-#endif
#include <linux/dmi.h>
@@ -88,7 +86,6 @@ static int via_cable_override(struct pci
return 0;
}
-#ifdef __LINUX_LIBATA_H__
/**
* via_do_set_mode - set transfer mode data
* @ap: ATA interface
@@ -110,7 +107,9 @@ static void via_do_set_mode(struct ata_p
struct pci_dev *pdev = to_pci_dev(ap->host->dev);
struct ata_device *peer = ata_dev_pair(adev);
struct ata_timing t, p;
+#ifndef __IDE2LIBATA
static int via_clock = 33333; /* Bus clock in kHZ */
+#endif
unsigned long T = 1000000000 / via_clock;
unsigned long UT = T;
int ut;
@@ -268,4 +267,3 @@ static void via_fixup(struct pci_dev *pd
pci_write_config_dword(pdev, 0x50, timing);
}
}
-#endif
Index: b/drivers/ide/via82cxxx.c
===================================================================
--- a/drivers/ide/via82cxxx.c
+++ b/drivers/ide/via82cxxx.c
@@ -36,177 +36,20 @@
#define DRV_NAME "via82cxxx"
-#define VIA_IDE_ENABLE 0x40
-#define VIA_IDE_CONFIG 0x41
-#define VIA_FIFO_CONFIG 0x43
-#define VIA_MISC_1 0x44
-#define VIA_MISC_2 0x45
-#define VIA_MISC_3 0x46
-#define VIA_DRIVE_TIMING 0x48
-#define VIA_8BIT_TIMING 0x4e
-#define VIA_ADDRESS_SETUP 0x4c
-#define VIA_UDMA_TIMING 0x50
-
-#define VIA_BAD_PREQ 0x01 /* Crashes if PREQ# till DDACK# set */
-#define VIA_BAD_CLK66 0x02 /* 66 MHz clock doesn't work correctly */
-#define VIA_SET_FIFO 0x04 /* Needs to have FIFO split set */
-#define VIA_NO_UNMASK 0x08 /* Doesn't work with IRQ unmasking on */
-#define VIA_BAD_ID 0x10 /* Has wrong vendor ID (0x1107) */
-#define VIA_BAD_AST 0x20 /* Don't touch Address Setup Timing */
-#define VIA_SATA_PATA 0x80 /* SATA/PATA combined configuration */
-
-enum {
- VIA_IDFLAG_SINGLE = (1 << 1), /* single channel controller */
-};
-
-/*
- * VIA SouthBridge chips.
- */
-
-static struct via_isa_bridge {
- char *name;
- u16 id;
- u8 rev_min;
- u8 rev_max;
- u8 udma_mask;
- u8 flags;
-} via_isa_bridges[] = {
- { "vx855", PCI_DEVICE_ID_VIA_VX855, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
- { "vx800", PCI_DEVICE_ID_VIA_VX800, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
- { "cx700", PCI_DEVICE_ID_VIA_CX700, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST | VIA_SATA_PATA },
- { "vt8261", PCI_DEVICE_ID_VIA_8261, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
- { "vt8237s", PCI_DEVICE_ID_VIA_8237S, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
- { "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
- { "vt6415", PCI_DEVICE_ID_VIA_6410, 0x00, 0xff, ATA_UDMA6, VIA_BAD_AST },
- { "vt8251", PCI_DEVICE_ID_VIA_8251, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
- { "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
- { "vt8237a", PCI_DEVICE_ID_VIA_8237A, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
- { "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
- { "vt8233a", PCI_DEVICE_ID_VIA_8233A, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
- { "vt8233c", PCI_DEVICE_ID_VIA_8233C_0, 0x00, 0x2f, ATA_UDMA5, },
- { "vt8233", PCI_DEVICE_ID_VIA_8233_0, 0x00, 0x2f, ATA_UDMA5, },
- { "vt8231", PCI_DEVICE_ID_VIA_8231, 0x00, 0x2f, ATA_UDMA5, },
- { "vt82c686b", PCI_DEVICE_ID_VIA_82C686, 0x40, 0x4f, ATA_UDMA5, },
- { "vt82c686a", PCI_DEVICE_ID_VIA_82C686, 0x10, 0x2f, ATA_UDMA4, },
- { "vt82c686", PCI_DEVICE_ID_VIA_82C686, 0x00, 0x0f, ATA_UDMA2, VIA_BAD_CLK66 },
- { "vt82c596b", PCI_DEVICE_ID_VIA_82C596, 0x10, 0x2f, ATA_UDMA4, },
- { "vt82c596a", PCI_DEVICE_ID_VIA_82C596, 0x00, 0x0f, ATA_UDMA2, VIA_BAD_CLK66 },
- { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x47, 0x4f, ATA_UDMA2, VIA_SET_FIFO },
- { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x40, 0x46, ATA_UDMA2, VIA_SET_FIFO | VIA_BAD_PREQ },
- { "vt82c586b", PCI_DEVICE_ID_VIA_82C586_0, 0x30, 0x3f, ATA_UDMA2, VIA_SET_FIFO },
- { "vt82c586a", PCI_DEVICE_ID_VIA_82C586_0, 0x20, 0x2f, ATA_UDMA2, VIA_SET_FIFO },
- { "vt82c586", PCI_DEVICE_ID_VIA_82C586_0, 0x00, 0x0f, 0x00, VIA_SET_FIFO },
- { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, 0x00, VIA_SET_FIFO | VIA_NO_UNMASK },
- { "vt82c576", PCI_DEVICE_ID_VIA_82C576, 0x00, 0x2f, 0x00, VIA_SET_FIFO | VIA_NO_UNMASK | VIA_BAD_ID },
- { "vtxxxx", PCI_DEVICE_ID_VIA_ANON, 0x00, 0x2f, ATA_UDMA6, VIA_BAD_AST },
- { NULL }
-};
-
static unsigned int via_clock;
static char *via_dma[] = { "16", "25", "33", "44", "66", "100", "133" };
+#include <linux/ide2libata.h>
+#include "../ata/pata_via.h"
+
struct via82cxxx_dev
{
- struct via_isa_bridge *via_config;
+ const struct via_isa_bridge *via_config;
unsigned int via_80w;
u8 cached_device[2];
};
/**
- * via_set_speed - write timing registers
- * @dev: PCI device
- * @dn: device
- * @timing: IDE timing data to use
- *
- * via_set_speed writes timing values to the chipset registers
- */
-
-static void via_set_speed(ide_hwif_t *hwif, u8 dn, struct ata_timing *timing)
-{
- struct pci_dev *dev = to_pci_dev(hwif->dev);
- struct ide_host *host = pci_get_drvdata(dev);
- struct via82cxxx_dev *vdev = host->host_priv;
- u8 t;
-
- if (~vdev->via_config->flags & VIA_BAD_AST) {
- pci_read_config_byte(dev, VIA_ADDRESS_SETUP, &t);
- t = (t & ~(3 << ((3 - dn) << 1))) | ((clamp_val(timing->setup, 1, 4) - 1) << ((3 - dn) << 1));
- pci_write_config_byte(dev, VIA_ADDRESS_SETUP, t);
- }
-
- pci_write_config_byte(dev, VIA_8BIT_TIMING + (1 - (dn >> 1)),
- ((clamp_val(timing->act8b, 1, 16) - 1) << 4) | (clamp_val(timing->rec8b, 1, 16) - 1));
-
- pci_write_config_byte(dev, VIA_DRIVE_TIMING + (3 - dn),
- ((clamp_val(timing->active, 1, 16) - 1) << 4) | (clamp_val(timing->recover, 1, 16) - 1));
-
- switch (vdev->via_config->udma_mask) {
- case ATA_UDMA2: t = timing->udma ? (0xe0 | (clamp_val(timing->udma, 2, 5) - 2)) : 0x03; break;
- case ATA_UDMA4: t = timing->udma ? (0xe8 | (clamp_val(timing->udma, 2, 9) - 2)) : 0x0f; break;
- case ATA_UDMA5: t = timing->udma ? (0xe0 | (clamp_val(timing->udma, 2, 9) - 2)) : 0x07; break;
- case ATA_UDMA6: t = timing->udma ? (0xe0 | (clamp_val(timing->udma, 2, 9) - 2)) : 0x07; break;
- }
-
- /* Set UDMA unless device is not UDMA capable */
- if (vdev->via_config->udma_mask) {
- u8 udma_etc;
-
- pci_read_config_byte(dev, VIA_UDMA_TIMING + 3 - dn, &udma_etc);
-
- /* clear transfer mode bit */
- udma_etc &= ~0x20;
-
- if (timing->udma) {
- /* preserve 80-wire cable detection bit */
- udma_etc &= 0x10;
- udma_etc |= t;
- }
-
- pci_write_config_byte(dev, VIA_UDMA_TIMING + 3 - dn, udma_etc);
- }
-}
-
-/**
- * via_set_drive - configure transfer mode
- * @hwif: port
- * @drive: Drive to set up
- *
- * via_set_drive() computes timing values configures the chipset to
- * a desired transfer mode. It also can be called by upper layers.
- */
-
-static void via_set_drive(ide_hwif_t *hwif, ide_drive_t *drive)
-{
- ide_drive_t *peer = ide_get_pair_dev(drive);
- struct pci_dev *dev = to_pci_dev(hwif->dev);
- struct ide_host *host = pci_get_drvdata(dev);
- struct via82cxxx_dev *vdev = host->host_priv;
- struct ata_timing t, p;
- unsigned int T, UT;
- const u8 speed = drive->dma_mode;
-
- T = 1000000000 / via_clock;
-
- switch (vdev->via_config->udma_mask) {
- case ATA_UDMA2: UT = T; break;
- case ATA_UDMA4: UT = T/2; break;
- case ATA_UDMA5: UT = T/3; break;
- case ATA_UDMA6: UT = T/4; break;
- default: UT = T;
- }
-
- ata_timing_compute(drive->id, speed, drive->pio_mode, &t, T, UT);
-
- if (peer) {
- ata_timing_compute(peer->id, peer->pio_mode,
- peer->pio_mode, &p, T, UT);
- ata_timing_merge(&p, &t, &t, ATA_TIMING_8BIT);
- }
-
- via_set_speed(hwif, drive->dn, &t);
-}
-
-/**
* via_set_pio_mode - set host controller for PIO mode
* @hwif: port
* @drive: drive
@@ -216,8 +59,20 @@ static void via_set_drive(ide_hwif_t *hw
static void via_set_pio_mode(ide_hwif_t *hwif, ide_drive_t *drive)
{
- drive->dma_mode = drive->pio_mode;
- via_set_drive(hwif, drive);
+ const struct via_isa_bridge *config = drive->hwif->host->host_priv;
+ int set_ast = (config->flags & VIA_BAD_AST) ? 0 : 1;
+
+ via_do_set_mode(hwif, drive, drive->pio_mode, set_ast,
+ config->udma_mask);
+}
+
+static void via_set_dma_mode(ide_hwif_t *hwif, ide_drive_t *drive)
+{
+ const struct via_isa_bridge *config = drive->hwif->host->host_priv;
+ int set_ast = (config->flags & VIA_BAD_AST) ? 0 : 1;
+
+ via_do_set_mode(hwif, drive, drive->dma_mode, set_ast,
+ config->udma_mask);
}
static u8 via_udma_filter(ide_drive_t *drive)
@@ -238,25 +93,6 @@ static u8 via_udma_filter(ide_drive_t *d
return hwif->ultra_mask;
}
-static struct via_isa_bridge *via_config_find(struct pci_dev **isa)
-{
- struct via_isa_bridge *via_config;
-
- for (via_config = via_isa_bridges;
- via_config->id != PCI_DEVICE_ID_VIA_ANON; via_config++)
- if ((*isa = pci_get_device(PCI_VENDOR_ID_VIA +
- !!(via_config->flags & VIA_BAD_ID),
- via_config->id, NULL))) {
-
- if ((*isa)->revision >= via_config->rev_min &&
- (*isa)->revision <= via_config->rev_max)
- break;
- pci_dev_put(*isa);
- }
-
- return via_config;
-}
-
/*
* Check and handle 80-wire cable presence
*/
@@ -316,60 +152,16 @@ static int init_chipset_via82cxxx(struct
{
struct ide_host *host = pci_get_drvdata(dev);
struct via82cxxx_dev *vdev = host->host_priv;
- struct via_isa_bridge *via_config = vdev->via_config;
- u8 t, v;
u32 u;
- /*
- * Detect cable and configure Clk66
- */
- pci_read_config_dword(dev, VIA_UDMA_TIMING, &u);
-
+ pci_read_config_dword(dev, 0x50, &u);
via_cable_detect(vdev, u);
- if (via_config->udma_mask == ATA_UDMA4) {
- /* Enable Clk66 */
- pci_write_config_dword(dev, VIA_UDMA_TIMING, u|0x80008);
- } else if (via_config->flags & VIA_BAD_CLK66) {
- /* Would cause trouble on 596a and 686 */
- pci_write_config_dword(dev, VIA_UDMA_TIMING, u & ~0x80008);
- }
-
- /*
- * Check whether interfaces are enabled.
- */
-
- pci_read_config_byte(dev, VIA_IDE_ENABLE, &v);
-
- /*
- * Set up FIFO sizes and thresholds.
- */
-
- pci_read_config_byte(dev, VIA_FIFO_CONFIG, &t);
-
- /* Disable PREQ# till DDACK# */
- if (via_config->flags & VIA_BAD_PREQ) {
- /* Would crash on 586b rev 41 */
- t &= 0x7f;
- }
-
- /* Fix FIFO split between channels */
- if (via_config->flags & VIA_SET_FIFO) {
- t &= (t & 0x9f);
- switch (v & 3) {
- case 2: t |= 0x00; break; /* 16 on primary */
- case 1: t |= 0x60; break; /* 16 on secondary */
- case 3: t |= 0x20; break; /* 8 pri 8 sec */
- }
- }
-
- pci_write_config_byte(dev, VIA_FIFO_CONFIG, t);
+ via_fixup(dev, vdev->via_config);
return 0;
}
-#include "../ata/pata_via.h"
-
static int via82cxxx_cable_detect(ide_hwif_t *hwif)
{
struct pci_dev *pdev = to_pci_dev(hwif->dev);
@@ -390,7 +182,7 @@ static int via82cxxx_cable_detect(ide_hw
static const struct ide_port_ops via_port_ops = {
.set_pio_mode = via_set_pio_mode,
- .set_dma_mode = via_set_drive,
+ .set_dma_mode = via_set_dma_mode,
.cable_detect = via82cxxx_cable_detect,
.udma_filter = via_udma_filter,
};
@@ -466,8 +258,7 @@ static const struct ide_port_info via82c
static int __devinit via_init_one(struct pci_dev *dev, const struct pci_device_id *id)
{
- struct pci_dev *isa = NULL;
- struct via_isa_bridge *via_config;
+ const struct via_isa_bridge *via_config;
struct via82cxxx_dev *vdev;
int rc;
u8 idx = id->driver_data;
@@ -478,19 +269,17 @@ static int __devinit via_init_one(struct
/*
* Find the ISA bridge and check we know what it is.
*/
- via_config = via_config_find(&isa);
+ via_config = via_config_find();
/*
* Print the boot message.
*/
- printk(KERN_INFO DRV_NAME " %s: VIA %s (rev %02x) IDE %sDMA%s\n",
- pci_name(dev), via_config->name, isa->revision,
+ printk(KERN_INFO DRV_NAME " %s: VIA %s IDE %sDMA%s\n",
+ pci_name(dev), via_config->name,
via_config->udma_mask ? "U" : "MW",
via_dma[via_config->udma_mask ?
(fls(via_config->udma_mask) - 1) : 0]);
- pci_dev_put(isa);
-
/*
* Determine system bus clock.
*/
^ permalink raw reply [flat|nested] 86+ messages in thread* Re: [PATCH 00/68] ide2libata
2010-01-29 16:03 [PATCH 00/68] ide2libata Bartlomiej Zolnierkiewicz
` (67 preceding siblings ...)
2010-01-29 16:10 ` [PATCH 68/68] via82cxxx: convert to ide2libata Bartlomiej Zolnierkiewicz
@ 2010-01-29 21:40 ` Jeff Garzik
2010-01-29 22:24 ` Bartlomiej Zolnierkiewicz
2010-01-29 23:25 ` Alan Cox
68 siblings, 2 replies; 86+ messages in thread
From: Jeff Garzik @ 2010-01-29 21:40 UTC (permalink / raw)
To: Bartlomiej Zolnierkiewicz; +Cc: linux-ide, linux-kernel
On 01/29/2010 11:03 AM, Bartlomiej Zolnierkiewicz wrote:
> Hi,
>
> Here is a patchset (on top of atang-v3.1 tree) applying "out-of-the-box"
> thinking to duplicated libata PATA and IDE subsystem host driver sets.
> Namely, it modifies IDE API slightly to match libata's one more, adds
> a tiny source-code level translation layer (ide2libata.h header file
> which consists of only 17 lines of code) and then converts host drivers
> to use shared source code for low-level operations (all drivers have
> been carefully audited during porting to minimize the probability of
> adding regressions accidentally). As an end result it is much easier
> to maintain both driver sets (differences between 'new'/'old' drivers
> are now apparent and there is no longer a need to manually back-port
> many classes of bugfixes) and over 2500 LOC are gone.
Interesting.
I'm fine with applying patches 2-5, but I am definitely interested to
hear what others think about this. Clearly, LOC is reduced, but that's
not the only factor in code maintenance.
With regards to libata and old-IDE, I have always thought the ideal
scenario was to leave old-IDE in bugfix-only mode, with next-to-no API
or driver churn besides that which is absolutely required for the fix.
En masse backporting bug fixes is what's known as a one-time cost. Once
the majority of libata PATA drivers reach bugfix and feature parity, the
need for code sharing is reduced greatly.
The ide2libata proposal creates on-going costs, not just a one-time
cost, because the old-IDE drivers will have -increased- potential for
problems when a libata PATA driver is modified. Such is the -cost- of
heavily intertwined code sharing. A single header change implies that
two, not one, drivers might break. That weakens the "leave it alone"
stability promise of old-IDE.
Waiting for other comments... this patchset is not an onerous burden to
libata, but I think it creates nasty cross-tree issues, potentially
perturbing old-IDE.
Jeff
^ permalink raw reply [flat|nested] 86+ messages in thread* Re: [PATCH 00/68] ide2libata
2010-01-29 21:40 ` [PATCH 00/68] ide2libata Jeff Garzik
@ 2010-01-29 22:24 ` Bartlomiej Zolnierkiewicz
2010-01-29 23:25 ` Alan Cox
1 sibling, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-29 22:24 UTC (permalink / raw)
To: Jeff Garzik; +Cc: linux-ide, linux-kernel
On Friday 29 January 2010 10:40:47 pm Jeff Garzik wrote:
> On 01/29/2010 11:03 AM, Bartlomiej Zolnierkiewicz wrote:
> > Hi,
> >
> > Here is a patchset (on top of atang-v3.1 tree) applying "out-of-the-box"
> > thinking to duplicated libata PATA and IDE subsystem host driver sets.
> > Namely, it modifies IDE API slightly to match libata's one more, adds
> > a tiny source-code level translation layer (ide2libata.h header file
> > which consists of only 17 lines of code) and then converts host drivers
> > to use shared source code for low-level operations (all drivers have
> > been carefully audited during porting to minimize the probability of
> > adding regressions accidentally). As an end result it is much easier
> > to maintain both driver sets (differences between 'new'/'old' drivers
> > are now apparent and there is no longer a need to manually back-port
> > many classes of bugfixes) and over 2500 LOC are gone.
>
> Interesting.
>
> I'm fine with applying patches 2-5, but I am definitely interested to
> hear what others think about this. Clearly, LOC is reduced, but that's
> not the only factor in code maintenance.
>
> With regards to libata and old-IDE, I have always thought the ideal
> scenario was to leave old-IDE in bugfix-only mode, with next-to-no API
> or driver churn besides that which is absolutely required for the fix.
>
> En masse backporting bug fixes is what's known as a one-time cost. Once
> the majority of libata PATA drivers reach bugfix and feature parity, the
> need for code sharing is reduced greatly.
>
> The ide2libata proposal creates on-going costs, not just a one-time
> cost, because the old-IDE drivers will have -increased- potential for
> problems when a libata PATA driver is modified. Such is the -cost- of
> heavily intertwined code sharing. A single header change implies that
> two, not one, drivers might break. That weakens the "leave it alone"
> stability promise of old-IDE.
I understand your concerns (especially given that libata PATA drivers
are unmaintained) but this patchset is for atang tree which is what I use
personally and I have no problem with maintaining it as long as I find it
useful (porting few hundreds patches once in few months against upstream
is much cheaper in terms of time/sanity than obligatory discussions on
whether to document known end-user visible limitations in driver's Kconfig
help text or in driver's source code how etc.).
Starting with 2.6.33 kernel.org users will be covered with a dedicated
patch and if distribution users want some changes that are in atang they
should ping their distribution about it, not me (if some distribution
would like to pay for the work on integrating some changes and/or getting
other ATA changes integrated please contact me in private).
IOW I'm just doing what I find useful/interesting for me and I don't care
much personally if it ever reaches upstream. I post patches mainly for
an extra review and to prevent duplication of efforts. If people find them
useful, great. If not, well, not a big deal (having 2000 commits upstream
changes a perspective a bit)..
> Waiting for other comments... this patchset is not an onerous burden to
> libata, but I think it creates nasty cross-tree issues, potentially
> perturbing old-IDE.
I'm rather time constrained these days so I think that I'll skip such type
of discussion entirely (though technical comments like bugs in patches etc.
are warmly welcomed and appreciated)..
--
Bartlomiej Zolnierkiewicz
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [PATCH 00/68] ide2libata
2010-01-29 21:40 ` [PATCH 00/68] ide2libata Jeff Garzik
2010-01-29 22:24 ` Bartlomiej Zolnierkiewicz
@ 2010-01-29 23:25 ` Alan Cox
2010-01-30 15:24 ` Bartlomiej Zolnierkiewicz
2010-02-01 7:47 ` David Miller
1 sibling, 2 replies; 86+ messages in thread
From: Alan Cox @ 2010-01-29 23:25 UTC (permalink / raw)
To: Jeff Garzik; +Cc: Bartlomiej Zolnierkiewicz, linux-ide, linux-kernel
> I'm fine with applying patches 2-5, but I am definitely interested to
> hear what others think about this. Clearly, LOC is reduced, but that's
> not the only factor in code maintenance.
I think it will be a nightmare for maintenance with all the includes and
the like plus the ifdefs making it very hard to read the drivers and
maintain them.
Some of it could be cleanly split. The 40wire lists for example could all
be merged into one with a function taking the pci_dev of the controller
which did a lookup based on vendor/dev/svid/sdid. That would put them all
in one logical clean C file and makes sense as a split point for the code.
> En masse backporting bug fixes is what's known as a one-time cost. Once
> the majority of libata PATA drivers reach bugfix and feature parity, the
> need for code sharing is reduced greatly.
One problem is telling which of the bits in the old IDE stack are
- bug fixes
- bugs
- cargo culting
- irrelevant
So I think its an extremely useful exercise to figure out what subtle
differences there are between the drivers. It's not then a trivial
assumption that they can just be pasted over. The include stuff though is
too ugly to merge even if its an excellent research project to identify
the differences and quirks.
The old IDE "maintenance mode" seems to be drifting - the rate of change
is rather high for that claim.
Alan
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [PATCH 00/68] ide2libata
2010-01-29 23:25 ` Alan Cox
@ 2010-01-30 15:24 ` Bartlomiej Zolnierkiewicz
2010-02-01 7:47 ` David Miller
1 sibling, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-01-30 15:24 UTC (permalink / raw)
To: Alan Cox; +Cc: Jeff Garzik, linux-ide, linux-kernel
On Saturday 30 January 2010 12:25:40 am Alan Cox wrote:
> So I think its an extremely useful exercise to figure out what subtle
> differences there are between the drivers. It's not then a trivial
> assumption that they can just be pasted over. The include stuff though is
Fully agreed, that is why a fair deal of review work went into making
sure that porting of a each driver to ide2libata doesn't cause functionality
changes.
> too ugly to merge even if its an excellent research project to identify
> the differences and quirks.
Well, looks acceptable to me when the alternative is a duplicated code
(though I don't insists on getting it merged anyway)..
--
Bartlomiej Zolnierkiewicz
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [PATCH 00/68] ide2libata
2010-01-29 23:25 ` Alan Cox
2010-01-30 15:24 ` Bartlomiej Zolnierkiewicz
@ 2010-02-01 7:47 ` David Miller
2010-02-01 9:31 ` Bartlomiej Zolnierkiewicz
2010-02-01 11:07 ` Alan Cox
1 sibling, 2 replies; 86+ messages in thread
From: David Miller @ 2010-02-01 7:47 UTC (permalink / raw)
To: alan; +Cc: jeff, bzolnier, linux-ide, linux-kernel
From: Alan Cox <alan@lxorguk.ukuu.org.uk>
Date: Fri, 29 Jan 2010 23:25:40 +0000
> The old IDE "maintenance mode" seems to be drifting - the rate of change
> is rather high for that claim.
I think there's another angle to this.
By making the IDE layer build from the same code as the ATA
driver, the legacy IDE layer gets an indirect tester base.
I like that.
However what I don't like is how this is implemented. We shouldn't
pretend the data structures are the same by using macros in some
header file, we should truly abstract out the data types properly such
that these drivers in fact use the same datastructures.
For the price of a few series of data structure morphs, we eliminate
the tester-base issue of legacy IDE. There's one driver for both
ATA and legacy IDE, the stuff in front is just a presentation and
probing layer, nothing more.
The cost and risk is testing the morphing changes, but I think the
scales tip towards making this truly worth it.
Bart, thanks for working on this and publishing what you came up
with.
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [PATCH 00/68] ide2libata
2010-02-01 7:47 ` David Miller
@ 2010-02-01 9:31 ` Bartlomiej Zolnierkiewicz
2010-02-01 11:07 ` Alan Cox
1 sibling, 0 replies; 86+ messages in thread
From: Bartlomiej Zolnierkiewicz @ 2010-02-01 9:31 UTC (permalink / raw)
To: David Miller; +Cc: alan, jeff, linux-ide, linux-kernel
On Monday 01 February 2010 08:47:26 am David Miller wrote:
> However what I don't like is how this is implemented. We shouldn't
> pretend the data structures are the same by using macros in some
> header file, we should truly abstract out the data types properly such
> that these drivers in fact use the same datastructures.
The hardest part is done and the idea is proved so this indeed would be
a natural next step..
> For the price of a few series of data structure morphs, we eliminate
> the tester-base issue of legacy IDE. There's one driver for both
> ATA and legacy IDE, the stuff in front is just a presentation and
> probing layer, nothing more.
Hmm.. sounds exactly like the direction in which IDE has been going for
the last few years.. :)
--
Bartlomiej Zolnierkiewicz
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [PATCH 00/68] ide2libata
2010-02-01 7:47 ` David Miller
2010-02-01 9:31 ` Bartlomiej Zolnierkiewicz
@ 2010-02-01 11:07 ` Alan Cox
2010-02-01 11:17 ` David Miller
1 sibling, 1 reply; 86+ messages in thread
From: Alan Cox @ 2010-02-01 11:07 UTC (permalink / raw)
To: David Miller; +Cc: jeff, bzolnier, linux-ide, linux-kernel
> The cost and risk is testing the morphing changes, but I think the
> scales tip towards making this truly worth it.
The cost and risk is taking two stable and quite maintainable stacks and
turning them into one unmaintainable broken one..
I'm a little surprised that the old IDE layer which was supposed to be
maintenance only is getting this treatment - except for the research
value of seeing what the differences are in the drivers.
I'm amazed that you'd suggest trashing the current ATA stack to make the
maintenance of the old ones easier - which aren't supposed to be in flux
in the first place.
Alan
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [PATCH 00/68] ide2libata
2010-02-01 11:07 ` Alan Cox
@ 2010-02-01 11:17 ` David Miller
2010-02-01 11:48 ` Alan Cox
0 siblings, 1 reply; 86+ messages in thread
From: David Miller @ 2010-02-01 11:17 UTC (permalink / raw)
To: alan; +Cc: jeff, bzolnier, linux-ide, linux-kernel
From: Alan Cox <alan@lxorguk.ukuu.org.uk>
Date: Mon, 1 Feb 2010 11:07:23 +0000
> I'm amazed that you'd suggest trashing the current ATA stack to make the
> maintenance of the old ones easier - which aren't supposed to be in flux
> in the first place.
I'm not, I'm saying leave the ATA stack as it is, but make the IDE
legacy layer such that PATA drivers can compile into it.
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [PATCH 00/68] ide2libata
2010-02-01 11:17 ` David Miller
@ 2010-02-01 11:48 ` Alan Cox
2010-02-01 12:48 ` David Miller
0 siblings, 1 reply; 86+ messages in thread
From: Alan Cox @ 2010-02-01 11:48 UTC (permalink / raw)
To: David Miller; +Cc: jeff, bzolnier, linux-ide, linux-kernel
On Mon, 01 Feb 2010 03:17:25 -0800 (PST)
David Miller <davem@davemloft.net> wrote:
> From: Alan Cox <alan@lxorguk.ukuu.org.uk>
> Date: Mon, 1 Feb 2010 11:07:23 +0000
>
> > I'm amazed that you'd suggest trashing the current ATA stack to make the
> > maintenance of the old ones easier - which aren't supposed to be in flux
> > in the first place.
>
> I'm not, I'm saying leave the ATA stack as it is, but make the IDE
> legacy layer such that PATA drivers can compile into it.
I don't see the use of that either. The work has sone use in figuring out
what the technical differences are between the old and new, and to review
differences to see why the exist and if they matter.
The only way around that would actually be remotely useful for doing odd
debug checks would be the ability to run the old stack drivers under
libata. Even then it would probably be far simpler to move differences
over one by one and test them so as to understand what is actually going
on and fix a bug.
The old drivers contain a fair amount of crap, magic and gueswork so a
good deal of human analysis and testing is needed to move any change
around and prove it's real and valid not guesswork and fudging.
Alan
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [PATCH 00/68] ide2libata
2010-02-01 11:48 ` Alan Cox
@ 2010-02-01 12:48 ` David Miller
2010-02-01 12:58 ` Alan Cox
0 siblings, 1 reply; 86+ messages in thread
From: David Miller @ 2010-02-01 12:48 UTC (permalink / raw)
To: alan; +Cc: jeff, bzolnier, linux-ide, linux-kernel
From: Alan Cox <alan@lxorguk.ukuu.org.uk>
Date: Mon, 1 Feb 2010 11:48:24 +0000
> On Mon, 01 Feb 2010 03:17:25 -0800 (PST)
> David Miller <davem@davemloft.net> wrote:
>
>> From: Alan Cox <alan@lxorguk.ukuu.org.uk>
>> Date: Mon, 1 Feb 2010 11:07:23 +0000
>>
>> > I'm amazed that you'd suggest trashing the current ATA stack to make the
>> > maintenance of the old ones easier - which aren't supposed to be in flux
>> > in the first place.
>>
>> I'm not, I'm saying leave the ATA stack as it is, but make the IDE
>> legacy layer such that PATA drivers can compile into it.
>
> I don't see the use of that either. The work has sone use in figuring out
> what the technical differences are between the old and new, and to review
> differences to see why the exist and if they matter.
And if you find the differences and that they matter, what are
you going to do, only fix things in one direction?
That won't make any sense.
And if the goal is to sort things out and keep things in sync,
what better way than to keep then physically in sync?
> The old drivers contain a fair amount of crap, magic and gueswork so a
> good deal of human analysis and testing is needed to move any change
> around and prove it's real and valid not guesswork and fudging.
And then once that hard work is done, we kind of just toss it
for one side of the equation?
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [PATCH 00/68] ide2libata
2010-02-01 12:48 ` David Miller
@ 2010-02-01 12:58 ` Alan Cox
2010-02-01 13:14 ` David Miller
0 siblings, 1 reply; 86+ messages in thread
From: Alan Cox @ 2010-02-01 12:58 UTC (permalink / raw)
To: David Miller; +Cc: jeff, bzolnier, linux-ide, linux-kernel
> > The old drivers contain a fair amount of crap, magic and gueswork so a
> > good deal of human analysis and testing is needed to move any change
> > around and prove it's real and valid not guesswork and fudging.
>
> And then once that hard work is done, we kind of just toss it
> for one side of the equation?
I don't where you got that idea from.
The "merge" makes it harder to maintain both, adds lots of ifdefs and
artificial divisions of code stuffed into include files. Its ugly as sin
and makes *both* sets of drivers harder to maintain.
So it's quite clearly cheaper and more efficient to propogate any
relevant fixes both directions than produce a single ifdef and include
filled turdpile that can't be maintained at all. It's not as if either
set of drivers change on a regular basis.
Plus I'd point out the calling patterns, locking and the assumptions of
the two stacks are not quite the same. There are also things the old
stack can't do (eg hotplug, queued commands, intelligent serializing
of command sequences) or that the current stack can't do (generally
because they make no sense moving forward but also stuff like user
issued SETXFER snooping)
Alan
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [PATCH 00/68] ide2libata
2010-02-01 12:58 ` Alan Cox
@ 2010-02-01 13:14 ` David Miller
2010-02-02 23:10 ` Jeff Garzik
0 siblings, 1 reply; 86+ messages in thread
From: David Miller @ 2010-02-01 13:14 UTC (permalink / raw)
To: alan; +Cc: jeff, bzolnier, linux-ide, linux-kernel
From: Alan Cox <alan@lxorguk.ukuu.org.uk>
Date: Mon, 1 Feb 2010 12:58:45 +0000
>> > The old drivers contain a fair amount of crap, magic and gueswork so a
>> > good deal of human analysis and testing is needed to move any change
>> > around and prove it's real and valid not guesswork and fudging.
>>
>> And then once that hard work is done, we kind of just toss it
>> for one side of the equation?
>
> I don't where you got that idea from.
>
> The "merge" makes it harder to maintain both, adds lots of ifdefs and
> artificial divisions of code stuffed into include files. Its ugly as sin
> and makes *both* sets of drivers harder to maintain.
I have not advocated the ifdef implementation.
I have advocated one where the data structures are actually
the same, and there are no ifdefs.
Please reread my initial reply.
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [PATCH 00/68] ide2libata
2010-02-01 13:14 ` David Miller
@ 2010-02-02 23:10 ` Jeff Garzik
2010-02-02 23:19 ` David Miller
0 siblings, 1 reply; 86+ messages in thread
From: Jeff Garzik @ 2010-02-02 23:10 UTC (permalink / raw)
To: David Miller; +Cc: alan, bzolnier, linux-ide, linux-kernel
On 02/01/2010 06:17 AM, David Miller wrote:
> And then once that hard work is done, we kind of just toss it
> for one side of the equation?
[...]
On 02/01/2010 08:14 AM, David Miller wrote:
> I have not advocated the ifdef implementation.
>
> I have advocated one where the data structures are actually
> the same, and there are no ifdefs.
It all sounds like the exact opposite of what you said seven months ago:
I'm going to treat IDE as pure legacy, rather than as
competition with the PATA drivers which is what people whould
be moving over to.
And more importantly I refuse to apply any driver patch that
isn't actually tested on said hardware.
It's either legacy, or it isn't. It's either bug-fixes-only, or it
isn't. Touching, quite literally, _100%_ of the IDE drivers does not
meet the criteria of "pure legacy" nor likely "actually tested on said
hardware."
But hey... if you want to accept patches slowly turning IDE into
libata, that's your call :) It just seems quite contrary to what has
been sold to the remaining IDE users.
Jeff
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [PATCH 00/68] ide2libata
2010-02-02 23:10 ` Jeff Garzik
@ 2010-02-02 23:19 ` David Miller
2010-02-02 23:27 ` Alan Cox
0 siblings, 1 reply; 86+ messages in thread
From: David Miller @ 2010-02-02 23:19 UTC (permalink / raw)
To: jeff; +Cc: alan, bzolnier, linux-ide, linux-kernel
From: Jeff Garzik <jeff@garzik.org>
Date: Tue, 02 Feb 2010 18:10:07 -0500
> But hey... if you want to accept patches slowly turning IDE into
> libata, that's your call :) It just seems quite contrary to what has
> been sold to the remaining IDE users.
What I said back then was based upon the presumption that
the drivers has a small tester base, thus any change to
any particular driver isn't likely to get much testing.
If the drivers get truly shared between IDE and ATA, that
presumption is entirely removed, the ATA testers will
be hitting the same driver code that whatever remaining
IDE users will be.
So if the sharing can be done in a sane manner, I'm OK
with that kind of plan.
What Bart has posted with all of the ifdefs and stuff,
I've stated over and over I don't agree with and don't
think is sane.
Doing it by making the data structures actually be the
same, and not using any ifdefs, that would be sane to me.
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [PATCH 00/68] ide2libata
2010-02-02 23:19 ` David Miller
@ 2010-02-02 23:27 ` Alan Cox
2010-02-02 23:29 ` David Miller
0 siblings, 1 reply; 86+ messages in thread
From: Alan Cox @ 2010-02-02 23:27 UTC (permalink / raw)
To: David Miller; +Cc: jeff, bzolnier, linux-ide, linux-kernel
> If the drivers get truly shared between IDE and ATA, that
> presumption is entirely removed, the ATA testers will
> be hitting the same driver code that whatever remaining
> IDE users will be.
Assuming the data structures matching does that is a bit like assuming
you can test one TCP stack using another one because they use the same
packet format.
^ permalink raw reply [flat|nested] 86+ messages in thread
* Re: [PATCH 00/68] ide2libata
2010-02-02 23:27 ` Alan Cox
@ 2010-02-02 23:29 ` David Miller
0 siblings, 0 replies; 86+ messages in thread
From: David Miller @ 2010-02-02 23:29 UTC (permalink / raw)
To: alan; +Cc: jeff, bzolnier, linux-ide, linux-kernel
From: Alan Cox <alan@lxorguk.ukuu.org.uk>
Date: Tue, 2 Feb 2010 23:27:48 +0000
>> If the drivers get truly shared between IDE and ATA, that
>> presumption is entirely removed, the ATA testers will
>> be hitting the same driver code that whatever remaining
>> IDE users will be.
>
> Assuming the data structures matching does that is a bit like assuming
> you can test one TCP stack using another one because they use the same
> packet format.
I don't really think those two situations are the same.
And Bart's patch set show that things are pretty darn
close already.
^ permalink raw reply [flat|nested] 86+ messages in thread