* [U-Boot] [PATCH] Marvell GuruPlug Board Support
@ 2010-03-15 11:05 Siddarth Gore
2010-03-15 12:13 ` Prafulla Wadaskar
0 siblings, 1 reply; 15+ messages in thread
From: Siddarth Gore @ 2010-03-15 11:05 UTC (permalink / raw)
To: u-boot
GuruPlug Standard: 1 Gb Ethernet, 2 USB 2.0
GuruPlug Plus: 2 Gb Ethernet, 2 USB 2.0, 1 eSATA, 1 uSD slot
Reference: http://plugcomputer.org
This patch is for GuruPlug Plus, but it supports Standard version
as well.
Signed-off-by: Siddarth Gore <gores@marvell.com>
---
MAINTAINERS | 4 +
MAKEALL | 1 +
Makefile | 3 +
board/Marvell/guruplug/Makefile | 51 +++++++++
board/Marvell/guruplug/config.mk | 28 +++++
board/Marvell/guruplug/guruplug.c | 167 +++++++++++++++++++++++++++++
board/Marvell/guruplug/guruplug.h | 39 +++++++
board/Marvell/guruplug/kwbimage.cfg | 162 ++++++++++++++++++++++++++++
include/configs/guruplug.h | 199 +++++++++++++++++++++++++++++++++++
9 files changed, 654 insertions(+), 0 deletions(-)
create mode 100644 board/Marvell/guruplug/Makefile
create mode 100644 board/Marvell/guruplug/config.mk
create mode 100644 board/Marvell/guruplug/guruplug.c
create mode 100644 board/Marvell/guruplug/guruplug.h
create mode 100644 board/Marvell/guruplug/kwbimage.cfg
create mode 100644 include/configs/guruplug.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 80057ce..f102cd8 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -765,6 +765,10 @@ Prafulla Wadaskar <prafulla@marvell.com>
rd6281a ARM926EJS (Kirkwood SoC)
sheevaplug ARM926EJS (Kirkwood SoC)
+Siddarth Gore <gores@marvell.com>
+
+ guruplug ARM926EJS (Kirkwood SoC)
+
Richard Woodruff <r-woodruff2@ti.com>
omap2420h4 ARM1136EJS
diff --git a/MAKEALL b/MAKEALL
index beacb5f..b15c2d1 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -562,6 +562,7 @@ LIST_ARM9=" \
edb9312 \
edb9315 \
edb9315a \
+ guruplug \
imx27lite \
lpd7a400 \
mv88f6281gtw_ge \
diff --git a/Makefile b/Makefile
index d801e25..30d5968 100644
--- a/Makefile
+++ b/Makefile
@@ -2952,6 +2952,9 @@ davinci_dm365evm_config : unconfig
davinci_dm6467evm_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs dm6467evm davinci davinci
+guruplug_config: unconfig
+ @$(MKCONFIG) $(@:_config=) arm arm926ejs $(@:_config=) Marvell kirkwood
+
imx27lite_config: unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs imx27lite logicpd mx27
diff --git a/board/Marvell/guruplug/Makefile b/board/Marvell/guruplug/Makefile
new file mode 100644
index 0000000..99748a7
--- /dev/null
+++ b/board/Marvell/guruplug/Makefile
@@ -0,0 +1,51 @@
+#
+# (C) Copyright 2009
+# Marvell Semiconductor <www.marvell.com>
+# Written-by: Siddarth Gore <gores@marvell.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+# MA 02110-1301 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).a
+
+COBJS := guruplug.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/Marvell/guruplug/config.mk b/board/Marvell/guruplug/config.mk
new file mode 100644
index 0000000..e183477
--- /dev/null
+++ b/board/Marvell/guruplug/config.mk
@@ -0,0 +1,28 @@
+#
+# (C) Copyright 2009
+# Marvell Semiconductor <www.marvell.com>
+# Written-by: Siddarth Gore <gores@marvell.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+# MA 02110-1301 USA
+#
+
+TEXT_BASE = 0x00600000
+
+# Kirkwood Boot Image configuration file
+KWD_CONFIG = $(SRCTREE)/board/$(BOARDDIR)/kwbimage.cfg
diff --git a/board/Marvell/guruplug/guruplug.c b/board/Marvell/guruplug/guruplug.c
new file mode 100644
index 0000000..52b530a
--- /dev/null
+++ b/board/Marvell/guruplug/guruplug.c
@@ -0,0 +1,167 @@
+/*
+ * (C) Copyright 2009
+ * Marvell Semiconductor <www.marvell.com>
+ * Written-by: Siddarth Gore <gores@marvell.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#include <common.h>
+#include <miiphy.h>
+#include <asm/arch/kirkwood.h>
+#include <asm/arch/mpp.h>
+#include "guruplug.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+ /*
+ * default gpio configuration
+ * There are maximum 64 gpios controlled through 2 sets of registers
+ * the below configuration configures mainly initial LED status
+ */
+ kw_config_gpio(GURUPLUG_OE_VAL_LOW,
+ GURUPLUG_OE_VAL_HIGH,
+ GURUPLUG_OE_LOW, GURUPLUG_OE_HIGH);
+
+ /* Multi-Purpose Pins Functionality configuration */
+ u32 kwmpp_config[] = {
+ MPP0_NF_IO2,
+ MPP1_NF_IO3,
+ MPP2_NF_IO4,
+ MPP3_NF_IO5,
+ MPP4_NF_IO6,
+ MPP5_NF_IO7,
+ MPP6_SYSRST_OUTn,
+ MPP7_GPO,
+ MPP8_TW_SDA,
+ MPP9_TW_SCK,
+ MPP10_UART0_TXD,
+ MPP11_UART0_RXD,
+ MPP12_SD_CLK,
+ MPP13_SD_CMD,
+ MPP14_SD_D0,
+ MPP15_SD_D1,
+ MPP16_SD_D2,
+ MPP17_SD_D3,
+ MPP18_NF_IO0,
+ MPP19_NF_IO1,
+ MPP20_GE1_0,
+ MPP21_GE1_1,
+ MPP22_GE1_2,
+ MPP23_GE1_3,
+ MPP24_GE1_4,
+ MPP25_GE1_5,
+ MPP26_GE1_6,
+ MPP27_GE1_7,
+ MPP28_GE1_8,
+ MPP29_GE1_9,
+ MPP30_GE1_10,
+ MPP31_GE1_11,
+ MPP32_GE1_12,
+ MPP33_GE1_13,
+ MPP34_GE1_14,
+ MPP35_GE1_15,
+ MPP36_GPIO,
+ MPP37_GPIO,
+ MPP38_GPIO,
+ MPP39_GPIO,
+ MPP40_TDM_SPI_SCK,
+ MPP41_TDM_SPI_MISO,
+ MPP42_TDM_SPI_MOSI,
+ MPP43_GPIO,
+ MPP44_GPIO,
+ MPP45_GPIO,
+ MPP46_GPIO,
+ MPP47_GPIO,
+ MPP48_GPIO,
+ MPP49_GPIO,
+ 0
+ };
+ kirkwood_mpp_conf(kwmpp_config);
+
+ /*
+ * arch number of board
+ */
+ gd->bd->bi_arch_number = MACH_TYPE_GURUPLUG;
+
+ /* adress of boot parameters */
+ gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
+
+ return 0;
+}
+
+int dram_init(void)
+{
+ int i;
+
+ for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
+ gd->bd->bi_dram[i].start = kw_sdram_bar(i);
+ gd->bd->bi_dram[i].size = kw_sdram_bs(i);
+ }
+ return 0;
+}
+
+#ifdef CONFIG_RESET_PHY_R
+void mv_phy_88e1121_init(char *name)
+{
+ u16 reg;
+ u16 devadr;
+
+ if (miiphy_set_current_dev(name))
+ return;
+
+ /* command to read PHY dev address */
+ if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) {
+ printf("Err..%s could not read PHY dev address\n",
+ __FUNCTION__);
+ return;
+ }
+
+ /*
+ * Enable RGMII delay on Tx and Rx for CPU port
+ * Ref: sec 4.7.2 of chip datasheet
+ */
+ miiphy_write(name, devadr, MV88E1121_PGADR_REG, 2);
+ miiphy_read(name, devadr, MV88E1121_MAC_CTRL2_REG, ®);
+ reg |= (MV88E1121_RGMII_RXTM_CTRL | MV88E1121_RGMII_TXTM_CTRL);
+ miiphy_write(name, devadr, MV88E1121_MAC_CTRL2_REG, reg);
+ miiphy_write(name, devadr, MV88E1121_PGADR_REG, 0);
+
+ /* reset the phy */
+ if (miiphy_read (name, devadr, PHY_BMCR, ®) != 0) {
+ printf("Err..(%s) PHY status read failed\n", __FUNCTION__);
+ return;
+ }
+ if (miiphy_write (name, devadr, PHY_BMCR, reg | 0x8000) != 0) {
+ printf("Err..(%s) PHY reset failed\n", __FUNCTION__);
+ return;
+ }
+
+ printf("88E1121 Initialized on %s\n", name);
+}
+
+void reset_phy(void)
+{
+ /* configure and initialize both PHY's */
+ mv_phy_88e1121_init("egiga0");
+ mv_phy_88e1121_init("egiga1");
+}
+#endif /* CONFIG_RESET_PHY_R */
diff --git a/board/Marvell/guruplug/guruplug.h b/board/Marvell/guruplug/guruplug.h
new file mode 100644
index 0000000..21ef8e9
--- /dev/null
+++ b/board/Marvell/guruplug/guruplug.h
@@ -0,0 +1,39 @@
+/*
+ * (C) Copyright 2009
+ * Marvell Semiconductor <www.marvell.com>
+ * Written-by: Siddarth Gore <gores@marvell.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#ifndef __GURUPLUG_H
+#define __GURUPLUG_H
+
+#define GURUPLUG_OE_LOW (~(0))
+#define GURUPLUG_OE_HIGH (~(0))
+#define GURUPLUG_OE_VAL_LOW 0
+#define GURUPLUG_OE_VAL_HIGH (0xf << 16) /* LED Pins high */
+
+/* PHY related */
+#define MV88E1121_MAC_CTRL2_REG 21
+#define MV88E1121_PGADR_REG 22
+#define MV88E1121_RGMII_TXTM_CTRL (1 << 4)
+#define MV88E1121_RGMII_RXTM_CTRL (1 << 5)
+
+#endif /* __GURUPLUG_H */
diff --git a/board/Marvell/guruplug/kwbimage.cfg b/board/Marvell/guruplug/kwbimage.cfg
new file mode 100644
index 0000000..2afd927
--- /dev/null
+++ b/board/Marvell/guruplug/kwbimage.cfg
@@ -0,0 +1,162 @@
+#
+# (C) Copyright 2009
+# Marvell Semiconductor <www.marvell.com>
+# Written-by: Siddarth Gore <gores@marvell.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+# MA 02110-1301 USA
+#
+# Refer docs/README.kwimage for more details about how-to configure
+# and create kirkwood boot image
+#
+
+# Boot Media configurations
+BOOT_FROM nand
+NAND_ECC_MODE default
+NAND_PAGE_SIZE 0x0800
+
+# SOC registers configuration using bootrom header extension
+# Maximum KWBIMAGE_MAX_CONFIG configurations allowed
+
+# Configure RGMII-0/1 interface pad voltage to 1.8V
+DATA 0xFFD100e0 0x1b1b9b9b
+
+#Dram initalization for SINGLE x16 CL=5 @ 400MHz
+DATA 0xFFD01400 0x43000c30 # DDR Configuration register
+# bit13-0: 0xc30 (3120 DDR2 clks refresh rate)
+# bit23-14: zero
+# bit24: 1= enable exit self refresh mode on DDR access
+# bit25: 1 required
+# bit29-26: zero
+# bit31-30: 01
+
+DATA 0xFFD01404 0x37543000 # DDR Controller Control Low
+# bit 4: 0=addr/cmd in smame cycle
+# bit 5: 0=clk is driven during self refresh, we don't care for APX
+# bit 6: 0=use recommended falling edge of clk for addr/cmd
+# bit14: 0=input buffer always powered up
+# bit18: 1=cpu lock transaction enabled
+# bit23-20: 5=recommended value for CL=5 and STARTBURST_DEL disabled bit31=0
+# bit27-24: 7= CL+2, STARTBURST sample stages, for freqs 400MHz, unbuffered DIMM
+# bit30-28: 3 required
+# bit31: 0=no additional STARTBURST delay
+
+DATA 0xFFD01408 0x22125451 # DDR Timing (Low) (active cycles value +1)
+# bit3-0: TRAS lsbs
+# bit7-4: TRCD
+# bit11- 8: TRP
+# bit15-12: TWR
+# bit19-16: TWTR
+# bit20: TRAS msb
+# bit23-21: 0x0
+# bit27-24: TRRD
+# bit31-28: TRTP
+
+DATA 0xFFD0140C 0x00000a33 # DDR Timing (High)
+# bit6-0: TRFC
+# bit8-7: TR2R
+# bit10-9: TR2W
+# bit12-11: TW2W
+# bit31-13: zero required
+
+DATA 0xFFD01410 0x000000cc # DDR Address Control
+# bit1-0: 01, Cs0width=x8
+# bit3-2: 10, Cs0size=1Gb
+# bit5-4: 01, Cs1width=x8
+# bit7-6: 10, Cs1size=1Gb
+# bit9-8: 00, Cs2width=nonexistent
+# bit11-10: 00, Cs2size =nonexistent
+# bit13-12: 00, Cs3width=nonexistent
+# bit15-14: 00, Cs3size =nonexistent
+# bit16: 0, Cs0AddrSel
+# bit17: 0, Cs1AddrSel
+# bit18: 0, Cs2AddrSel
+# bit19: 0, Cs3AddrSel
+# bit31-20: 0 required
+
+DATA 0xFFD01414 0x00000000 # DDR Open Pages Control
+# bit0: 0, OpenPage enabled
+# bit31-1: 0 required
+
+DATA 0xFFD01418 0x00000000 # DDR Operation
+# bit3-0: 0x0, DDR cmd
+# bit31-4: 0 required
+
+DATA 0xFFD0141C 0x00000C52 # DDR Mode
+# bit2-0: 2, BurstLen=2 required
+# bit3: 0, BurstType=0 required
+# bit6-4: 4, CL=5
+# bit7: 0, TestMode=0 normal
+# bit8: 0, DLL reset=0 normal
+# bit11-9: 6, auto-precharge write recovery ????????????
+# bit12: 0, PD must be zero
+# bit31-13: 0 required
+
+DATA 0xFFD01420 0x00000040 # DDR Extended Mode
+# bit0: 0, DDR DLL enabled
+# bit1: 0, DDR drive strenght normal
+# bit2: 0, DDR ODT control lsd (disabled)
+# bit5-3: 000, required
+# bit6: 1, DDR ODT control msb, (disabled)
+# bit9-7: 000, required
+# bit10: 0, differential DQS enabled
+# bit11: 0, required
+# bit12: 0, DDR output buffer enabled
+# bit31-13: 0 required
+
+DATA 0xFFD01424 0x0000F17F # DDR Controller Control High
+# bit2-0: 111, required
+# bit3 : 1 , MBUS Burst Chop disabled
+# bit6-4: 111, required
+# bit7 : 0
+# bit8 : 1 , add writepath sample stage, must be 1 for DDR freq >= 300MHz
+# bit9 : 0 , no half clock cycle addition to dataout
+# bit10 : 0 , 1/4 clock cycle skew enabled for addr/ctl signals
+# bit11 : 0 , 1/4 clock cycle skew disabled for write mesh
+# bit15-12: 1111 required
+# bit31-16: 0 required
+
+DATA 0xFFD01428 0x00085520 # DDR2 ODT Read Timing (default values)
+DATA 0xFFD0147C 0x00008552 # DDR2 ODT Write Timing (default values)
+
+DATA 0xFFD01500 0x00000000 # CS[0]n Base address to 0x0
+DATA 0xFFD01504 0x0FFFFFF1 # CS[0]n Size
+# bit0: 1, Window enabled
+# bit1: 0, Write Protect disabled
+# bit3-2: 00, CS0 hit selected
+# bit23-4: ones, required
+# bit31-24: 0x0F, Size (i.e. 256MB)
+
+DATA 0xFFD01508 0x10000000 # CS[1]n Base address to 256Mb
+DATA 0xFFD0150C 0x0FFFFFF5 # CS[1]n Size 256Mb Window enabled for CS1
+
+DATA 0xFFD01514 0x00000000 # CS[2]n Size, window disabled
+DATA 0xFFD0151C 0x00000000 # CS[3]n Size, window disabled
+
+DATA 0xFFD01494 0x00030000 # DDR ODT Control (Low)
+DATA 0xFFD01498 0x00000000 # DDR ODT Control (High)
+# bit1-0: 00, ODT0 controlled by ODT Control (low) register above
+# bit3-2: 01, ODT1 active NEVER!
+# bit31-4: zero, required
+
+DATA 0xFFD0149C 0x0000E803 # CPU ODT Control
+DATA 0xFFD01480 0x00000001 # DDR Initialization Control
+#bit0=1, enable DDR init upon this register write
+
+# End of Header extension
+DATA 0x0 0x0
diff --git a/include/configs/guruplug.h b/include/configs/guruplug.h
new file mode 100644
index 0000000..1da79e6
--- /dev/null
+++ b/include/configs/guruplug.h
@@ -0,0 +1,199 @@
+/*
+ * (C) Copyright 2009
+ * Marvell Semiconductor <www.marvell.com>
+ * Written-by: Siddarth Gore <gores@marvell.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#ifndef _CONFIG_GURUPLUG_H
+#define _CONFIG_GURUPLUG_H
+
+/*
+ * Version number information
+ */
+#define CONFIG_IDENT_STRING "\nMarvell-GuruPlug"
+
+/*
+ * High Level Configuration Options (easy to change)
+ */
+#define CONFIG_MARVELL 1
+#define CONFIG_ARM926EJS 1 /* Basic Architecture */
+#define CONFIG_SHEEVA_88SV131 1 /* CPU Core subversion */
+#define CONFIG_KIRKWOOD 1 /* SOC Family Name */
+#define CONFIG_KW88F6281 1 /* SOC Name */
+#define CONFIG_MACH_GURUPLUG /* Machine type */
+
+#define CONFIG_MD5 /* get_random_hex on krikwood needs MD5 support */
+#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
+#define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */
+#define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */
+
+/*
+ * CLKs configurations
+ */
+#define CONFIG_SYS_HZ 1000
+
+/*
+ * NS16550 Configuration
+ */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE (-4)
+#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK
+#define CONFIG_SYS_NS16550_COM1 KW_UART0_BASE
+
+/*
+ * Serial Port configuration
+ * The following definitions let you select what serial you want to use
+ * for your console driver.
+ */
+
+#define CONFIG_CONS_INDEX 1 /*Console on UART0 */
+#define CONFIG_BAUDRATE 115200
+#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \
+ 115200,230400, 460800, 921600 }
+/* auto boot */
+#define CONFIG_BOOTDELAY 3 /* default enable autoboot */
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization.
+ */
+#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
+#define CONFIG_INITRD_TAG 1 /* enable INITRD tag */
+#define CONFIG_SETUP_MEMORY_TAGS 1 /* enable memory tag */
+
+#define CONFIG_SYS_PROMPT "Marvell>> " /* Command Prompt */
+#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
+ +sizeof(CONFIG_SYS_PROMPT) + 16) /* Print Buff */
+/*
+ * Commands configuration
+ */
+#define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */
+#include <config_cmd_default.h>
+#define CONFIG_CMD_AUTOSCRIPT
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_USB
+
+/*
+ * NAND configuration
+ */
+#ifdef CONFIG_CMD_NAND
+#define CONFIG_NAND_KIRKWOOD
+#define CONFIG_SYS_MAX_NAND_DEVICE 1
+#define NAND_MAX_CHIPS 1
+#define CONFIG_SYS_NAND_BASE 0xD8000000 /* KW_DEFADR_NANDF */
+#define NAND_ALLOW_ERASE_ALL 1
+#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */
+#endif
+
+/*
+ * Environment variables configurations
+ */
+#ifdef CONFIG_CMD_NAND
+#define CONFIG_ENV_IS_IN_NAND 1
+#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K */
+#else
+#define CONFIG_ENV_IS_NOWHERE 1 /* if env in SDRAM */
+#endif
+/*
+ * max 4k env size is enough, but in case of nand
+ * it has to be rounded to sector size
+ */
+#define CONFIG_ENV_SIZE 0x20000 /* 128k */
+#define CONFIG_ENV_ADDR 0x40000
+#define CONFIG_ENV_OFFSET 0x40000 /* env starts here */
+
+/*
+ * Default environment variables
+ */
+#define CONFIG_BOOTCOMMAND "setenv ethact egiga0; " \
+ "${x_bootcmd_ethernet}; setenv ethact egiga1; " \
+ "${x_bootcmd_ethernet}; ${x_bootcmd_usb}; ${x_bootcmd_kernel}; "\
+ "setenv bootargs ${x_bootargs} ${x_bootargs_root}; " \
+ "bootm 0x6400000;"
+
+#define CONFIG_EXTRA_ENV_SETTINGS "x_bootcmd_ethernet" \
+ "=ping 192.168.2.1\0" \
+ "x_bootcmd_usb=usb start\0" \
+ "x_bootcmd_kernel=nand read.e 0x6400000 0x100000 0x400000\0" \
+ "x_bootargs=console=ttyS0,115200\0" \
+ "x_bootargs_root=ubi.mtd=2 root=ubi0:rootfs rootfstype=ubifs\0"
+
+/*
+ * Size of malloc() pool
+ */
+#define CONFIG_SYS_MALLOC_LEN (1024 * 128) /* 128kB for malloc() */
+/* size in bytes reserved for initial data */
+#define CONFIG_SYS_GBL_DATA_SIZE 128
+
+/*
+ * Other required minimal configurations
+ */
+#define CONFIG_CONSOLE_INFO_QUIET /* some code reduction */
+#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */
+#define CONFIG_ARCH_MISC_INIT /* call arch_misc_init() */
+#define CONFIG_DISPLAY_CPUINFO /* Display cpu info */
+#define CONFIG_NR_DRAM_BANKS 4
+#define CONFIG_STACKSIZE 0x00100000 /* regular stack- 1M */
+#define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */
+#define CONFIG_SYS_MEMTEST_START 0x00800000 /* 8M */
+#define CONFIG_SYS_MEMTEST_END 0x1fffffff /*(_512M -1) */
+#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */
+#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
+
+/*
+ * Ethernet Driver configuration
+ */
+#ifdef CONFIG_CMD_NET
+#define CONFIG_NETCONSOLE /* include NetConsole support */
+#define CONFIG_NET_MULTI /* specify more that one ports available */
+#define CONFIG_MII /* expose smi ove miiphy interface */
+#define CONFIG_CMD_MII
+#define CONFIG_KIRKWOOD_EGIGA /* Enable kirkwood Gbe Controller Driver */
+#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */
+#define CONFIG_KIRKWOOD_EGIGA_PORTS {1,1} /* enable both ports */
+#define CONFIG_PHY_BASE_ADR 0
+#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */
+#define CONFIG_RESET_PHY_R /* use reset_phy() to init mv8831116 PHY */
+#endif /* CONFIG_CMD_NET */
+
+/*
+ * USB/EHCI
+ */
+#ifdef CONFIG_CMD_USB
+#define CONFIG_USB_EHCI /* Enable EHCI USB support */
+#define CONFIG_USB_EHCI_KIRKWOOD /* on Kirkwood platform */
+#define CONFIG_EHCI_IS_TDI
+#define CONFIG_USB_STORAGE
+#define CONFIG_DOS_PARTITION
+#define CONFIG_ISO_PARTITION
+#define CONFIG_SUPPORT_VFAT
+#endif /* CONFIG_CMD_USB */
+
+#define CONFIG_SYS_ALT_MEMTEST
+
+#endif /* _CONFIG_GURUPLUG_H */
--
1.6.0.3
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [U-Boot] [PATCH] Marvell GuruPlug Board Support
2010-03-15 11:05 [U-Boot] [PATCH] Marvell GuruPlug Board Support Siddarth Gore
@ 2010-03-15 12:13 ` Prafulla Wadaskar
2010-03-15 13:26 ` Siddarth Gore
0 siblings, 1 reply; 15+ messages in thread
From: Prafulla Wadaskar @ 2010-03-15 12:13 UTC (permalink / raw)
To: u-boot
> -----Original Message-----
> From: Siddarth Gore [mailto:gores at marvell.com]
> Sent: Monday, March 15, 2010 4:36 PM
> To: u-boot at lists.denx.de
> Cc: Prafulla Wadaskar; Siddarth Gore
> Subject: [PATCH] Marvell GuruPlug Board Support
>
> GuruPlug Standard: 1 Gb Ethernet, 2 USB 2.0
> GuruPlug Plus: 2 Gb Ethernet, 2 USB 2.0, 1 eSATA, 1 uSD slot
>
> Reference: http://plugcomputer.org
Hi Siddarth
http://www.globalscaletechnologies.com/t-guruplugdetails.aspx
Will be better reference to explain this board
>
> This patch is for GuruPlug Plus, but it supports Standard version
> as well.
>
> Signed-off-by: Siddarth Gore <gores@marvell.com>
> ---
> MAINTAINERS | 4 +
> MAKEALL | 1 +
> Makefile | 3 +
> board/Marvell/guruplug/Makefile | 51 +++++++++
> board/Marvell/guruplug/config.mk | 28 +++++
> board/Marvell/guruplug/guruplug.c | 167
> +++++++++++++++++++++++++++++
> board/Marvell/guruplug/guruplug.h | 39 +++++++
> board/Marvell/guruplug/kwbimage.cfg | 162
> ++++++++++++++++++++++++++++
> include/configs/guruplug.h | 199
> +++++++++++++++++++++++++++++++++++
> 9 files changed, 654 insertions(+), 0 deletions(-)
> create mode 100644 board/Marvell/guruplug/Makefile
> create mode 100644 board/Marvell/guruplug/config.mk
> create mode 100644 board/Marvell/guruplug/guruplug.c
> create mode 100644 board/Marvell/guruplug/guruplug.h
> create mode 100644 board/Marvell/guruplug/kwbimage.cfg
> create mode 100644 include/configs/guruplug.h
>
...snip...
> +++ b/board/Marvell/guruplug/guruplug.c
> @@ -0,0 +1,167 @@
> +/*
> + * (C) Copyright 2009
> + * Marvell Semiconductor <www.marvell.com>
> + * Written-by: Siddarth Gore <gores@marvell.com>
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
> + * MA 02110-1301 USA
> + */
> +
> +#include <common.h>
> +#include <miiphy.h>
> +#include <asm/arch/kirkwood.h>
> +#include <asm/arch/mpp.h>
> +#include "guruplug.h"
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +int board_init(void)
> +{
> + /*
> + * default gpio configuration
> + * There are maximum 64 gpios controlled through 2 sets
> of registers
> + * the below configuration configures mainly initial LED status
> + */
> + kw_config_gpio(GURUPLUG_OE_VAL_LOW,
> + GURUPLUG_OE_VAL_HIGH,
> + GURUPLUG_OE_LOW, GURUPLUG_OE_HIGH);
> +
> + /* Multi-Purpose Pins Functionality configuration */
It will be good if you comment out for the MPPs that you are configuring
> + u32 kwmpp_config[] = {
> + MPP0_NF_IO2,
> + MPP1_NF_IO3,
> + MPP2_NF_IO4,
> + MPP3_NF_IO5,
> + MPP4_NF_IO6,
> + MPP5_NF_IO7,
> + MPP6_SYSRST_OUTn,
> + MPP7_GPO,
> + MPP8_TW_SDA,
> + MPP9_TW_SCK,
> + MPP10_UART0_TXD,
> + MPP11_UART0_RXD,
> + MPP12_SD_CLK,
> + MPP13_SD_CMD,
> + MPP14_SD_D0,
> + MPP15_SD_D1,
> + MPP16_SD_D2,
> + MPP17_SD_D3,
> + MPP18_NF_IO0,
> + MPP19_NF_IO1,
> + MPP20_GE1_0,
> + MPP21_GE1_1,
> + MPP22_GE1_2,
> + MPP23_GE1_3,
> + MPP24_GE1_4,
> + MPP25_GE1_5,
> + MPP26_GE1_6,
> + MPP27_GE1_7,
> + MPP28_GE1_8,
> + MPP29_GE1_9,
> + MPP30_GE1_10,
> + MPP31_GE1_11,
> + MPP32_GE1_12,
> + MPP33_GE1_13,
> + MPP34_GE1_14,
> + MPP35_GE1_15,
> + MPP36_GPIO,
> + MPP37_GPIO,
> + MPP38_GPIO,
> + MPP39_GPIO,
> + MPP40_TDM_SPI_SCK,
> + MPP41_TDM_SPI_MISO,
> + MPP42_TDM_SPI_MOSI,
> + MPP43_GPIO,
> + MPP44_GPIO,
> + MPP45_GPIO,
> + MPP46_GPIO,
> + MPP47_GPIO,
> + MPP48_GPIO,
> + MPP49_GPIO,
> + 0
> + };
> + kirkwood_mpp_conf(kwmpp_config);
> +
..snip...
> +++ b/board/Marvell/guruplug/guruplug.h
> @@ -0,0 +1,39 @@
> +/*
> + * (C) Copyright 2009
> + * Marvell Semiconductor <www.marvell.com>
> + * Written-by: Siddarth Gore <gores@marvell.com>
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
> + * MA 02110-1301 USA
> + */
> +
> +#ifndef __GURUPLUG_H
> +#define __GURUPLUG_H
> +
> +#define GURUPLUG_OE_LOW (~(0))
> +#define GURUPLUG_OE_HIGH (~(0))
> +#define GURUPLUG_OE_VAL_LOW 0
> +#define GURUPLUG_OE_VAL_HIGH (0xf << 16) /* LED Pins high */
Same here, pls explain the each bit and associated LED used for
...snip...
> +++ b/include/configs/guruplug.h
> @@ -0,0 +1,199 @@
> +/*
> + * (C) Copyright 2009
> + * Marvell Semiconductor <www.marvell.com>
> + * Written-by: Siddarth Gore <gores@marvell.com>
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
> + * MA 02110-1301 USA
> + */
> +
> +#ifndef _CONFIG_GURUPLUG_H
> +#define _CONFIG_GURUPLUG_H
...snip...
> +/*
> + * Default environment variables
> + */
> +#define CONFIG_BOOTCOMMAND "setenv ethact egiga0; " \
> + "${x_bootcmd_ethernet}; setenv ethact egiga1; " \
> + "${x_bootcmd_ethernet}; ${x_bootcmd_usb};
> ${x_bootcmd_kernel}; "\
> + "setenv bootargs ${x_bootargs} ${x_bootargs_root}; " \
> + "bootm 0x6400000;"
> +
> +#define CONFIG_EXTRA_ENV_SETTINGS "x_bootcmd_ethernet" \
> + "=ping 192.168.2.1\0" \
It's better if you shift "x_bootcmd_ethernet" to below line to make it more readable
..snip..
> +#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */
> +#define CONFIG_RESET_PHY_R /* use reset_phy() to init
> mv8831116 PHY */
Comments need to be in lined with used PHY
Apart from above cosmetic changes, the patch looks okay to me
Regards..
Prafulla . .
^ permalink raw reply [flat|nested] 15+ messages in thread
* [U-Boot] [PATCH] Marvell GuruPlug Board Support
2010-03-15 12:13 ` Prafulla Wadaskar
@ 2010-03-15 13:26 ` Siddarth Gore
2010-03-15 13:42 ` Siddarth Gore
0 siblings, 1 reply; 15+ messages in thread
From: Siddarth Gore @ 2010-03-15 13:26 UTC (permalink / raw)
To: u-boot
On Mon, 2010-03-15 at 05:13 -0700, Prafulla Wadaskar wrote:
>
> > -----Original Message-----
> > From: Siddarth Gore [mailto:gores at marvell.com]
> > Sent: Monday, March 15, 2010 4:36 PM
> > To: u-boot at lists.denx.de
> > Cc: Prafulla Wadaskar; Siddarth Gore
> > Subject: [PATCH] Marvell GuruPlug Board Support
> >
> > GuruPlug Standard: 1 Gb Ethernet, 2 USB 2.0
> > GuruPlug Plus: 2 Gb Ethernet, 2 USB 2.0, 1 eSATA, 1 uSD slot
> >
> > Reference: http://plugcomputer.org
>
> Hi Siddarth
>
Hi Prafulla
> http://www.globalscaletechnologies.com/t-guruplugdetails.aspx
> Will be better reference to explain this board
>
i thought this link might stop working after some time so wanted to give
a more permanent link. i will add both.
> >
> > This patch is for GuruPlug Plus, but it supports Standard version
> > as well.
> >
> > Signed-off-by: Siddarth Gore <gores@marvell.com>
> > ---
> > MAINTAINERS | 4 +
> > MAKEALL | 1 +
> > Makefile | 3 +
> > board/Marvell/guruplug/Makefile | 51 +++++++++
> > board/Marvell/guruplug/config.mk | 28 +++++
> > board/Marvell/guruplug/guruplug.c | 167
> > +++++++++++++++++++++++++++++
> > board/Marvell/guruplug/guruplug.h | 39 +++++++
> > board/Marvell/guruplug/kwbimage.cfg | 162
> > ++++++++++++++++++++++++++++
> > include/configs/guruplug.h | 199
> > +++++++++++++++++++++++++++++++++++
> > 9 files changed, 654 insertions(+), 0 deletions(-)
> > create mode 100644 board/Marvell/guruplug/Makefile
> > create mode 100644 board/Marvell/guruplug/config.mk
> > create mode 100644 board/Marvell/guruplug/guruplug.c
> > create mode 100644 board/Marvell/guruplug/guruplug.h
> > create mode 100644 board/Marvell/guruplug/kwbimage.cfg
> > create mode 100644 include/configs/guruplug.h
> >
> ...snip...
> > +++ b/board/Marvell/guruplug/guruplug.c
> > @@ -0,0 +1,167 @@
> > +/*
> > + * (C) Copyright 2009
> > + * Marvell Semiconductor <www.marvell.com>
> > + * Written-by: Siddarth Gore <gores@marvell.com>
> > + *
> > + * See file CREDITS for list of people who contributed to this
> > + * project.
> > + *
> > + * This program is free software; you can redistribute it and/or
> > + * modify it under the terms of the GNU General Public License as
> > + * published by the Free Software Foundation; either version 2 of
> > + * the License, or (at your option) any later version.
> > + *
> > + * This program is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> > + * GNU General Public License for more details.
> > + *
> > + * You should have received a copy of the GNU General Public License
> > + * along with this program; if not, write to the Free Software
> > + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
> > + * MA 02110-1301 USA
> > + */
> > +
> > +#include <common.h>
> > +#include <miiphy.h>
> > +#include <asm/arch/kirkwood.h>
> > +#include <asm/arch/mpp.h>
> > +#include "guruplug.h"
> > +
> > +DECLARE_GLOBAL_DATA_PTR;
> > +
> > +int board_init(void)
> > +{
> > + /*
> > + * default gpio configuration
> > + * There are maximum 64 gpios controlled through 2 sets
> > of registers
> > + * the below configuration configures mainly initial LED status
> > + */
> > + kw_config_gpio(GURUPLUG_OE_VAL_LOW,
> > + GURUPLUG_OE_VAL_HIGH,
> > + GURUPLUG_OE_LOW, GURUPLUG_OE_HIGH);
> > +
> > + /* Multi-Purpose Pins Functionality configuration */
>
> It will be good if you comment out for the MPPs that you are configuring
>
done
> > + u32 kwmpp_config[] = {
> > + MPP0_NF_IO2,
> > + MPP1_NF_IO3,
> > + MPP2_NF_IO4,
> > + MPP3_NF_IO5,
> > + MPP4_NF_IO6,
> > + MPP5_NF_IO7,
> > + MPP6_SYSRST_OUTn,
> > + MPP7_GPO,
> > + MPP8_TW_SDA,
> > + MPP9_TW_SCK,
> > + MPP10_UART0_TXD,
> > + MPP11_UART0_RXD,
> > + MPP12_SD_CLK,
> > + MPP13_SD_CMD,
> > + MPP14_SD_D0,
> > + MPP15_SD_D1,
> > + MPP16_SD_D2,
> > + MPP17_SD_D3,
> > + MPP18_NF_IO0,
> > + MPP19_NF_IO1,
> > + MPP20_GE1_0,
> > + MPP21_GE1_1,
> > + MPP22_GE1_2,
> > + MPP23_GE1_3,
> > + MPP24_GE1_4,
> > + MPP25_GE1_5,
> > + MPP26_GE1_6,
> > + MPP27_GE1_7,
> > + MPP28_GE1_8,
> > + MPP29_GE1_9,
> > + MPP30_GE1_10,
> > + MPP31_GE1_11,
> > + MPP32_GE1_12,
> > + MPP33_GE1_13,
> > + MPP34_GE1_14,
> > + MPP35_GE1_15,
> > + MPP36_GPIO,
> > + MPP37_GPIO,
> > + MPP38_GPIO,
> > + MPP39_GPIO,
> > + MPP40_TDM_SPI_SCK,
> > + MPP41_TDM_SPI_MISO,
> > + MPP42_TDM_SPI_MOSI,
> > + MPP43_GPIO,
> > + MPP44_GPIO,
> > + MPP45_GPIO,
> > + MPP46_GPIO,
> > + MPP47_GPIO,
> > + MPP48_GPIO,
> > + MPP49_GPIO,
> > + 0
> > + };
> > + kirkwood_mpp_conf(kwmpp_config);
> > +
>
> ..snip...
> > +++ b/board/Marvell/guruplug/guruplug.h
> > @@ -0,0 +1,39 @@
> > +/*
> > + * (C) Copyright 2009
> > + * Marvell Semiconductor <www.marvell.com>
> > + * Written-by: Siddarth Gore <gores@marvell.com>
> > + *
> > + * See file CREDITS for list of people who contributed to this
> > + * project.
> > + *
> > + * This program is free software; you can redistribute it and/or
> > + * modify it under the terms of the GNU General Public License as
> > + * published by the Free Software Foundation; either version 2 of
> > + * the License, or (at your option) any later version.
> > + *
> > + * This program is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> > + * GNU General Public License for more details.
> > + *
> > + * You should have received a copy of the GNU General Public License
> > + * along with this program; if not, write to the Free Software
> > + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
> > + * MA 02110-1301 USA
> > + */
> > +
> > +#ifndef __GURUPLUG_H
> > +#define __GURUPLUG_H
> > +
> > +#define GURUPLUG_OE_LOW (~(0))
> > +#define GURUPLUG_OE_HIGH (~(0))
> > +#define GURUPLUG_OE_VAL_LOW 0
> > +#define GURUPLUG_OE_VAL_HIGH (0xf << 16) /* LED Pins high */
>
> Same here, pls explain the each bit and associated LED used for
>
done in the mpp config table
> ...snip...
> > +++ b/include/configs/guruplug.h
> > @@ -0,0 +1,199 @@
> > +/*
> > + * (C) Copyright 2009
> > + * Marvell Semiconductor <www.marvell.com>
> > + * Written-by: Siddarth Gore <gores@marvell.com>
> > + *
> > + * See file CREDITS for list of people who contributed to this
> > + * project.
> > + *
> > + * This program is free software; you can redistribute it and/or
> > + * modify it under the terms of the GNU General Public License as
> > + * published by the Free Software Foundation; either version 2 of
> > + * the License, or (at your option) any later version.
> > + *
> > + * This program is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> > + * GNU General Public License for more details.
> > + *
> > + * You should have received a copy of the GNU General Public License
> > + * along with this program; if not, write to the Free Software
> > + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
> > + * MA 02110-1301 USA
> > + */
> > +
> > +#ifndef _CONFIG_GURUPLUG_H
> > +#define _CONFIG_GURUPLUG_H
>
> ...snip...
> > +/*
> > + * Default environment variables
> > + */
> > +#define CONFIG_BOOTCOMMAND "setenv ethact egiga0; " \
> > + "${x_bootcmd_ethernet}; setenv ethact egiga1; " \
> > + "${x_bootcmd_ethernet}; ${x_bootcmd_usb};
> > ${x_bootcmd_kernel}; "\
> > + "setenv bootargs ${x_bootargs} ${x_bootargs_root}; " \
> > + "bootm 0x6400000;"
> > +
> > +#define CONFIG_EXTRA_ENV_SETTINGS "x_bootcmd_ethernet" \
> > + "=ping 192.168.2.1\0" \
>
> It's better if you shift "x_bootcmd_ethernet" to below line to make it more readable
>
done
> ..snip..
> > +#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */
> > +#define CONFIG_RESET_PHY_R /* use reset_phy() to init
> > mv8831116 PHY */
>
> Comments need to be in lined with used PHY
>
done
> Apart from above cosmetic changes, the patch looks okay to me
>
i will resend the patch with the changes.
-siddarth
> Regards..
> Prafulla . .
^ permalink raw reply [flat|nested] 15+ messages in thread
* [U-Boot] [PATCH] Marvell GuruPlug Board Support
2010-03-15 13:26 ` Siddarth Gore
@ 2010-03-15 13:42 ` Siddarth Gore
2010-03-15 16:08 ` Wolfgang Denk
2010-03-15 16:11 ` [U-Boot] [PATCH] " Wolfgang Denk
0 siblings, 2 replies; 15+ messages in thread
From: Siddarth Gore @ 2010-03-15 13:42 UTC (permalink / raw)
To: u-boot
GuruPlug Standard: 1 Gb Ethernet, 2 USB 2.0
GuruPlug Plus: 2 Gb Ethernet, 2 USB 2.0, 1 eSATA, 1 uSD slot
References:
http://www.globalscaletechnologies.com/t-guruplugdetails.aspx
http://plugcomputer.org
This patch is for GuruPlug Plus, but it supports Standard version
as well.
Signed-off-by: Siddarth Gore <gores@marvell.com>
---
MAINTAINERS | 4 +
MAKEALL | 1 +
Makefile | 3 +
board/Marvell/guruplug/Makefile | 51 +++++++++
board/Marvell/guruplug/config.mk | 28 +++++
board/Marvell/guruplug/guruplug.c | 167 +++++++++++++++++++++++++++++
board/Marvell/guruplug/guruplug.h | 39 +++++++
board/Marvell/guruplug/kwbimage.cfg | 162 ++++++++++++++++++++++++++++
include/configs/guruplug.h | 199 +++++++++++++++++++++++++++++++++++
9 files changed, 654 insertions(+), 0 deletions(-)
create mode 100644 board/Marvell/guruplug/Makefile
create mode 100644 board/Marvell/guruplug/config.mk
create mode 100644 board/Marvell/guruplug/guruplug.c
create mode 100644 board/Marvell/guruplug/guruplug.h
create mode 100644 board/Marvell/guruplug/kwbimage.cfg
create mode 100644 include/configs/guruplug.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 80057ce..f102cd8 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -765,6 +765,10 @@ Prafulla Wadaskar <prafulla@marvell.com>
rd6281a ARM926EJS (Kirkwood SoC)
sheevaplug ARM926EJS (Kirkwood SoC)
+Siddarth Gore <gores@marvell.com>
+
+ guruplug ARM926EJS (Kirkwood SoC)
+
Richard Woodruff <r-woodruff2@ti.com>
omap2420h4 ARM1136EJS
diff --git a/MAKEALL b/MAKEALL
index beacb5f..b15c2d1 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -562,6 +562,7 @@ LIST_ARM9=" \
edb9312 \
edb9315 \
edb9315a \
+ guruplug \
imx27lite \
lpd7a400 \
mv88f6281gtw_ge \
diff --git a/Makefile b/Makefile
index d801e25..30d5968 100644
--- a/Makefile
+++ b/Makefile
@@ -2952,6 +2952,9 @@ davinci_dm365evm_config : unconfig
davinci_dm6467evm_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs dm6467evm davinci davinci
+guruplug_config: unconfig
+ @$(MKCONFIG) $(@:_config=) arm arm926ejs $(@:_config=) Marvell kirkwood
+
imx27lite_config: unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs imx27lite logicpd mx27
diff --git a/board/Marvell/guruplug/Makefile b/board/Marvell/guruplug/Makefile
new file mode 100644
index 0000000..99748a7
--- /dev/null
+++ b/board/Marvell/guruplug/Makefile
@@ -0,0 +1,51 @@
+#
+# (C) Copyright 2009
+# Marvell Semiconductor <www.marvell.com>
+# Written-by: Siddarth Gore <gores@marvell.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+# MA 02110-1301 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).a
+
+COBJS := guruplug.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/Marvell/guruplug/config.mk b/board/Marvell/guruplug/config.mk
new file mode 100644
index 0000000..e183477
--- /dev/null
+++ b/board/Marvell/guruplug/config.mk
@@ -0,0 +1,28 @@
+#
+# (C) Copyright 2009
+# Marvell Semiconductor <www.marvell.com>
+# Written-by: Siddarth Gore <gores@marvell.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+# MA 02110-1301 USA
+#
+
+TEXT_BASE = 0x00600000
+
+# Kirkwood Boot Image configuration file
+KWD_CONFIG = $(SRCTREE)/board/$(BOARDDIR)/kwbimage.cfg
diff --git a/board/Marvell/guruplug/guruplug.c b/board/Marvell/guruplug/guruplug.c
new file mode 100644
index 0000000..ba47ca1
--- /dev/null
+++ b/board/Marvell/guruplug/guruplug.c
@@ -0,0 +1,167 @@
+/*
+ * (C) Copyright 2009
+ * Marvell Semiconductor <www.marvell.com>
+ * Written-by: Siddarth Gore <gores@marvell.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#include <common.h>
+#include <miiphy.h>
+#include <asm/arch/kirkwood.h>
+#include <asm/arch/mpp.h>
+#include "guruplug.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+ /*
+ * default gpio configuration
+ * There are maximum 64 gpios controlled through 2 sets of registers
+ * the below configuration configures mainly initial LED status
+ */
+ kw_config_gpio(GURUPLUG_OE_VAL_LOW,
+ GURUPLUG_OE_VAL_HIGH,
+ GURUPLUG_OE_LOW, GURUPLUG_OE_HIGH);
+
+ /* Multi-Purpose Pins Functionality configuration */
+ u32 kwmpp_config[] = {
+ MPP0_NF_IO2,
+ MPP1_NF_IO3,
+ MPP2_NF_IO4,
+ MPP3_NF_IO5,
+ MPP4_NF_IO6,
+ MPP5_NF_IO7,
+ MPP6_SYSRST_OUTn,
+ MPP7_GPO, /* GPIO_RST */
+ MPP8_TW_SDA,
+ MPP9_TW_SCK,
+ MPP10_UART0_TXD,
+ MPP11_UART0_RXD,
+ MPP12_SD_CLK,
+ MPP13_SD_CMD,
+ MPP14_SD_D0,
+ MPP15_SD_D1,
+ MPP16_SD_D2,
+ MPP17_SD_D3,
+ MPP18_NF_IO0,
+ MPP19_NF_IO1,
+ MPP20_GE1_0,
+ MPP21_GE1_1,
+ MPP22_GE1_2,
+ MPP23_GE1_3,
+ MPP24_GE1_4,
+ MPP25_GE1_5,
+ MPP26_GE1_6,
+ MPP27_GE1_7,
+ MPP28_GE1_8,
+ MPP29_GE1_9,
+ MPP30_GE1_10,
+ MPP31_GE1_11,
+ MPP32_GE1_12,
+ MPP33_GE1_13,
+ MPP34_GE1_14,
+ MPP35_GE1_15,
+ MPP36_GPIO,
+ MPP37_GPIO,
+ MPP38_GPIO,
+ MPP39_GPIO,
+ MPP40_TDM_SPI_SCK,
+ MPP41_TDM_SPI_MISO,
+ MPP42_TDM_SPI_MOSI,
+ MPP43_GPIO,
+ MPP44_GPIO,
+ MPP45_GPIO,
+ MPP46_GPIO, /* M_RLED */
+ MPP47_GPIO, /* M_GLED */
+ MPP48_GPIO, /* B_RLED */
+ MPP49_GPIO, /* B_GLED */
+ 0
+ };
+ kirkwood_mpp_conf(kwmpp_config);
+
+ /*
+ * arch number of board
+ */
+ gd->bd->bi_arch_number = MACH_TYPE_GURUPLUG;
+
+ /* adress of boot parameters */
+ gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
+
+ return 0;
+}
+
+int dram_init(void)
+{
+ int i;
+
+ for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
+ gd->bd->bi_dram[i].start = kw_sdram_bar(i);
+ gd->bd->bi_dram[i].size = kw_sdram_bs(i);
+ }
+ return 0;
+}
+
+#ifdef CONFIG_RESET_PHY_R
+void mv_phy_88e1121_init(char *name)
+{
+ u16 reg;
+ u16 devadr;
+
+ if (miiphy_set_current_dev(name))
+ return;
+
+ /* command to read PHY dev address */
+ if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) {
+ printf("Err..%s could not read PHY dev address\n",
+ __FUNCTION__);
+ return;
+ }
+
+ /*
+ * Enable RGMII delay on Tx and Rx for CPU port
+ * Ref: sec 4.7.2 of chip datasheet
+ */
+ miiphy_write(name, devadr, MV88E1121_PGADR_REG, 2);
+ miiphy_read(name, devadr, MV88E1121_MAC_CTRL2_REG, ®);
+ reg |= (MV88E1121_RGMII_RXTM_CTRL | MV88E1121_RGMII_TXTM_CTRL);
+ miiphy_write(name, devadr, MV88E1121_MAC_CTRL2_REG, reg);
+ miiphy_write(name, devadr, MV88E1121_PGADR_REG, 0);
+
+ /* reset the phy */
+ if (miiphy_read (name, devadr, PHY_BMCR, ®) != 0) {
+ printf("Err..(%s) PHY status read failed\n", __FUNCTION__);
+ return;
+ }
+ if (miiphy_write (name, devadr, PHY_BMCR, reg | 0x8000) != 0) {
+ printf("Err..(%s) PHY reset failed\n", __FUNCTION__);
+ return;
+ }
+
+ printf("88E1121 Initialized on %s\n", name);
+}
+
+void reset_phy(void)
+{
+ /* configure and initialize both PHY's */
+ mv_phy_88e1121_init("egiga0");
+ mv_phy_88e1121_init("egiga1");
+}
+#endif /* CONFIG_RESET_PHY_R */
diff --git a/board/Marvell/guruplug/guruplug.h b/board/Marvell/guruplug/guruplug.h
new file mode 100644
index 0000000..5bc16b4
--- /dev/null
+++ b/board/Marvell/guruplug/guruplug.h
@@ -0,0 +1,39 @@
+/*
+ * (C) Copyright 2009
+ * Marvell Semiconductor <www.marvell.com>
+ * Written-by: Siddarth Gore <gores@marvell.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#ifndef __GURUPLUG_H
+#define __GURUPLUG_H
+
+#define GURUPLUG_OE_LOW (~(0))
+#define GURUPLUG_OE_HIGH (~(0))
+#define GURUPLUG_OE_VAL_LOW 0
+#define GURUPLUG_OE_VAL_HIGH (0xf << 16) /* 4 LED Pins high */
+
+/* PHY related */
+#define MV88E1121_MAC_CTRL2_REG 21
+#define MV88E1121_PGADR_REG 22
+#define MV88E1121_RGMII_TXTM_CTRL (1 << 4)
+#define MV88E1121_RGMII_RXTM_CTRL (1 << 5)
+
+#endif /* __GURUPLUG_H */
diff --git a/board/Marvell/guruplug/kwbimage.cfg b/board/Marvell/guruplug/kwbimage.cfg
new file mode 100644
index 0000000..2afd927
--- /dev/null
+++ b/board/Marvell/guruplug/kwbimage.cfg
@@ -0,0 +1,162 @@
+#
+# (C) Copyright 2009
+# Marvell Semiconductor <www.marvell.com>
+# Written-by: Siddarth Gore <gores@marvell.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+# MA 02110-1301 USA
+#
+# Refer docs/README.kwimage for more details about how-to configure
+# and create kirkwood boot image
+#
+
+# Boot Media configurations
+BOOT_FROM nand
+NAND_ECC_MODE default
+NAND_PAGE_SIZE 0x0800
+
+# SOC registers configuration using bootrom header extension
+# Maximum KWBIMAGE_MAX_CONFIG configurations allowed
+
+# Configure RGMII-0/1 interface pad voltage to 1.8V
+DATA 0xFFD100e0 0x1b1b9b9b
+
+#Dram initalization for SINGLE x16 CL=5 @ 400MHz
+DATA 0xFFD01400 0x43000c30 # DDR Configuration register
+# bit13-0: 0xc30 (3120 DDR2 clks refresh rate)
+# bit23-14: zero
+# bit24: 1= enable exit self refresh mode on DDR access
+# bit25: 1 required
+# bit29-26: zero
+# bit31-30: 01
+
+DATA 0xFFD01404 0x37543000 # DDR Controller Control Low
+# bit 4: 0=addr/cmd in smame cycle
+# bit 5: 0=clk is driven during self refresh, we don't care for APX
+# bit 6: 0=use recommended falling edge of clk for addr/cmd
+# bit14: 0=input buffer always powered up
+# bit18: 1=cpu lock transaction enabled
+# bit23-20: 5=recommended value for CL=5 and STARTBURST_DEL disabled bit31=0
+# bit27-24: 7= CL+2, STARTBURST sample stages, for freqs 400MHz, unbuffered DIMM
+# bit30-28: 3 required
+# bit31: 0=no additional STARTBURST delay
+
+DATA 0xFFD01408 0x22125451 # DDR Timing (Low) (active cycles value +1)
+# bit3-0: TRAS lsbs
+# bit7-4: TRCD
+# bit11- 8: TRP
+# bit15-12: TWR
+# bit19-16: TWTR
+# bit20: TRAS msb
+# bit23-21: 0x0
+# bit27-24: TRRD
+# bit31-28: TRTP
+
+DATA 0xFFD0140C 0x00000a33 # DDR Timing (High)
+# bit6-0: TRFC
+# bit8-7: TR2R
+# bit10-9: TR2W
+# bit12-11: TW2W
+# bit31-13: zero required
+
+DATA 0xFFD01410 0x000000cc # DDR Address Control
+# bit1-0: 01, Cs0width=x8
+# bit3-2: 10, Cs0size=1Gb
+# bit5-4: 01, Cs1width=x8
+# bit7-6: 10, Cs1size=1Gb
+# bit9-8: 00, Cs2width=nonexistent
+# bit11-10: 00, Cs2size =nonexistent
+# bit13-12: 00, Cs3width=nonexistent
+# bit15-14: 00, Cs3size =nonexistent
+# bit16: 0, Cs0AddrSel
+# bit17: 0, Cs1AddrSel
+# bit18: 0, Cs2AddrSel
+# bit19: 0, Cs3AddrSel
+# bit31-20: 0 required
+
+DATA 0xFFD01414 0x00000000 # DDR Open Pages Control
+# bit0: 0, OpenPage enabled
+# bit31-1: 0 required
+
+DATA 0xFFD01418 0x00000000 # DDR Operation
+# bit3-0: 0x0, DDR cmd
+# bit31-4: 0 required
+
+DATA 0xFFD0141C 0x00000C52 # DDR Mode
+# bit2-0: 2, BurstLen=2 required
+# bit3: 0, BurstType=0 required
+# bit6-4: 4, CL=5
+# bit7: 0, TestMode=0 normal
+# bit8: 0, DLL reset=0 normal
+# bit11-9: 6, auto-precharge write recovery ????????????
+# bit12: 0, PD must be zero
+# bit31-13: 0 required
+
+DATA 0xFFD01420 0x00000040 # DDR Extended Mode
+# bit0: 0, DDR DLL enabled
+# bit1: 0, DDR drive strenght normal
+# bit2: 0, DDR ODT control lsd (disabled)
+# bit5-3: 000, required
+# bit6: 1, DDR ODT control msb, (disabled)
+# bit9-7: 000, required
+# bit10: 0, differential DQS enabled
+# bit11: 0, required
+# bit12: 0, DDR output buffer enabled
+# bit31-13: 0 required
+
+DATA 0xFFD01424 0x0000F17F # DDR Controller Control High
+# bit2-0: 111, required
+# bit3 : 1 , MBUS Burst Chop disabled
+# bit6-4: 111, required
+# bit7 : 0
+# bit8 : 1 , add writepath sample stage, must be 1 for DDR freq >= 300MHz
+# bit9 : 0 , no half clock cycle addition to dataout
+# bit10 : 0 , 1/4 clock cycle skew enabled for addr/ctl signals
+# bit11 : 0 , 1/4 clock cycle skew disabled for write mesh
+# bit15-12: 1111 required
+# bit31-16: 0 required
+
+DATA 0xFFD01428 0x00085520 # DDR2 ODT Read Timing (default values)
+DATA 0xFFD0147C 0x00008552 # DDR2 ODT Write Timing (default values)
+
+DATA 0xFFD01500 0x00000000 # CS[0]n Base address to 0x0
+DATA 0xFFD01504 0x0FFFFFF1 # CS[0]n Size
+# bit0: 1, Window enabled
+# bit1: 0, Write Protect disabled
+# bit3-2: 00, CS0 hit selected
+# bit23-4: ones, required
+# bit31-24: 0x0F, Size (i.e. 256MB)
+
+DATA 0xFFD01508 0x10000000 # CS[1]n Base address to 256Mb
+DATA 0xFFD0150C 0x0FFFFFF5 # CS[1]n Size 256Mb Window enabled for CS1
+
+DATA 0xFFD01514 0x00000000 # CS[2]n Size, window disabled
+DATA 0xFFD0151C 0x00000000 # CS[3]n Size, window disabled
+
+DATA 0xFFD01494 0x00030000 # DDR ODT Control (Low)
+DATA 0xFFD01498 0x00000000 # DDR ODT Control (High)
+# bit1-0: 00, ODT0 controlled by ODT Control (low) register above
+# bit3-2: 01, ODT1 active NEVER!
+# bit31-4: zero, required
+
+DATA 0xFFD0149C 0x0000E803 # CPU ODT Control
+DATA 0xFFD01480 0x00000001 # DDR Initialization Control
+#bit0=1, enable DDR init upon this register write
+
+# End of Header extension
+DATA 0x0 0x0
diff --git a/include/configs/guruplug.h b/include/configs/guruplug.h
new file mode 100644
index 0000000..7953873
--- /dev/null
+++ b/include/configs/guruplug.h
@@ -0,0 +1,199 @@
+/*
+ * (C) Copyright 2009
+ * Marvell Semiconductor <www.marvell.com>
+ * Written-by: Siddarth Gore <gores@marvell.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#ifndef _CONFIG_GURUPLUG_H
+#define _CONFIG_GURUPLUG_H
+
+/*
+ * Version number information
+ */
+#define CONFIG_IDENT_STRING "\nMarvell-GuruPlug"
+
+/*
+ * High Level Configuration Options (easy to change)
+ */
+#define CONFIG_MARVELL 1
+#define CONFIG_ARM926EJS 1 /* Basic Architecture */
+#define CONFIG_SHEEVA_88SV131 1 /* CPU Core subversion */
+#define CONFIG_KIRKWOOD 1 /* SOC Family Name */
+#define CONFIG_KW88F6281 1 /* SOC Name */
+#define CONFIG_MACH_GURUPLUG /* Machine type */
+
+#define CONFIG_MD5 /* get_random_hex on krikwood needs MD5 support */
+#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
+#define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */
+#define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */
+
+/*
+ * CLKs configurations
+ */
+#define CONFIG_SYS_HZ 1000
+
+/*
+ * NS16550 Configuration
+ */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE (-4)
+#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK
+#define CONFIG_SYS_NS16550_COM1 KW_UART0_BASE
+
+/*
+ * Serial Port configuration
+ * The following definitions let you select what serial you want to use
+ * for your console driver.
+ */
+
+#define CONFIG_CONS_INDEX 1 /*Console on UART0 */
+#define CONFIG_BAUDRATE 115200
+#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \
+ 115200,230400, 460800, 921600 }
+/* auto boot */
+#define CONFIG_BOOTDELAY 3 /* default enable autoboot */
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization.
+ */
+#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
+#define CONFIG_INITRD_TAG 1 /* enable INITRD tag */
+#define CONFIG_SETUP_MEMORY_TAGS 1 /* enable memory tag */
+
+#define CONFIG_SYS_PROMPT "Marvell>> " /* Command Prompt */
+#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
+ +sizeof(CONFIG_SYS_PROMPT) + 16) /* Print Buff */
+/*
+ * Commands configuration
+ */
+#define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */
+#include <config_cmd_default.h>
+#define CONFIG_CMD_AUTOSCRIPT
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_USB
+
+/*
+ * NAND configuration
+ */
+#ifdef CONFIG_CMD_NAND
+#define CONFIG_NAND_KIRKWOOD
+#define CONFIG_SYS_MAX_NAND_DEVICE 1
+#define NAND_MAX_CHIPS 1
+#define CONFIG_SYS_NAND_BASE 0xD8000000 /* KW_DEFADR_NANDF */
+#define NAND_ALLOW_ERASE_ALL 1
+#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */
+#endif
+
+/*
+ * Environment variables configurations
+ */
+#ifdef CONFIG_CMD_NAND
+#define CONFIG_ENV_IS_IN_NAND 1
+#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K */
+#else
+#define CONFIG_ENV_IS_NOWHERE 1 /* if env in SDRAM */
+#endif
+/*
+ * max 4k env size is enough, but in case of nand
+ * it has to be rounded to sector size
+ */
+#define CONFIG_ENV_SIZE 0x20000 /* 128k */
+#define CONFIG_ENV_ADDR 0x40000
+#define CONFIG_ENV_OFFSET 0x40000 /* env starts here */
+
+/*
+ * Default environment variables
+ */
+#define CONFIG_BOOTCOMMAND "setenv ethact egiga0; " \
+ "${x_bootcmd_ethernet}; setenv ethact egiga1; " \
+ "${x_bootcmd_ethernet}; ${x_bootcmd_usb}; ${x_bootcmd_kernel}; "\
+ "setenv bootargs ${x_bootargs} ${x_bootargs_root}; " \
+ "bootm 0x6400000;"
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "x_bootcmd_ethernet=ping 192.168.2.1\0" \
+ "x_bootcmd_usb=usb start\0" \
+ "x_bootcmd_kernel=nand read.e 0x6400000 0x100000 0x400000\0" \
+ "x_bootargs=console=ttyS0,115200\0" \
+ "x_bootargs_root=ubi.mtd=2 root=ubi0:rootfs rootfstype=ubifs\0"
+
+/*
+ * Size of malloc() pool
+ */
+#define CONFIG_SYS_MALLOC_LEN (1024 * 128) /* 128kB for malloc() */
+/* size in bytes reserved for initial data */
+#define CONFIG_SYS_GBL_DATA_SIZE 128
+
+/*
+ * Other required minimal configurations
+ */
+#define CONFIG_CONSOLE_INFO_QUIET /* some code reduction */
+#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */
+#define CONFIG_ARCH_MISC_INIT /* call arch_misc_init() */
+#define CONFIG_DISPLAY_CPUINFO /* Display cpu info */
+#define CONFIG_NR_DRAM_BANKS 4
+#define CONFIG_STACKSIZE 0x00100000 /* regular stack- 1M */
+#define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */
+#define CONFIG_SYS_MEMTEST_START 0x00800000 /* 8M */
+#define CONFIG_SYS_MEMTEST_END 0x1fffffff /*(_512M -1) */
+#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */
+#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
+
+/*
+ * Ethernet Driver configuration
+ */
+#ifdef CONFIG_CMD_NET
+#define CONFIG_NETCONSOLE /* include NetConsole support */
+#define CONFIG_NET_MULTI /* specify more that one ports available */
+#define CONFIG_MII /* expose smi ove miiphy interface */
+#define CONFIG_CMD_MII
+#define CONFIG_KIRKWOOD_EGIGA /* Enable kirkwood Gbe Controller Driver */
+#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */
+#define CONFIG_KIRKWOOD_EGIGA_PORTS {1,1} /* enable both ports */
+#define CONFIG_PHY_BASE_ADR 0
+#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */
+#define CONFIG_RESET_PHY_R /* use reset_phy() to init mv88e1121 PHY */
+#endif /* CONFIG_CMD_NET */
+
+/*
+ * USB/EHCI
+ */
+#ifdef CONFIG_CMD_USB
+#define CONFIG_USB_EHCI /* Enable EHCI USB support */
+#define CONFIG_USB_EHCI_KIRKWOOD /* on Kirkwood platform */
+#define CONFIG_EHCI_IS_TDI
+#define CONFIG_USB_STORAGE
+#define CONFIG_DOS_PARTITION
+#define CONFIG_ISO_PARTITION
+#define CONFIG_SUPPORT_VFAT
+#endif /* CONFIG_CMD_USB */
+
+#define CONFIG_SYS_ALT_MEMTEST
+
+#endif /* _CONFIG_GURUPLUG_H */
--
1.6.0.3
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [U-Boot] [PATCH] Marvell GuruPlug Board Support
2010-03-15 13:42 ` Siddarth Gore
@ 2010-03-15 16:08 ` Wolfgang Denk
2010-03-17 7:01 ` Prafulla Wadaskar
` (3 more replies)
2010-03-15 16:11 ` [U-Boot] [PATCH] " Wolfgang Denk
1 sibling, 4 replies; 15+ messages in thread
From: Wolfgang Denk @ 2010-03-15 16:08 UTC (permalink / raw)
To: u-boot
Dear Siddarth Gore,
In message <1268660568-23022-1-git-send-email-gores@marvell.com> you wrote:
...
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 80057ce..f102cd8 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -765,6 +765,10 @@ Prafulla Wadaskar <prafulla@marvell.com>
> rd6281a ARM926EJS (Kirkwood SoC)
> sheevaplug ARM926EJS (Kirkwood SoC)
>
> +Siddarth Gore <gores@marvell.com>
> +
> + guruplug ARM926EJS (Kirkwood SoC)
> +
> Richard Woodruff <r-woodruff2@ti.com>
Please keep list of maintainers sorted by last name.
> --- /dev/null
> +++ b/board/Marvell/guruplug/config.mk
> @@ -0,0 +1,28 @@
...
> +TEXT_BASE = 0x00600000
> +
> +# Kirkwood Boot Image configuration file
Please don't add such trailers. Move the description upto the start of
the file - if you really think you need one. It's probably better just
to drop this.
> +KWD_CONFIG = $(SRCTREE)/board/$(BOARDDIR)/kwbimage.cfg
> diff --git a/board/Marvell/guruplug/guruplug.c b/board/Marvell/guruplug/guruplug.c
> new file mode 100644
> index 0000000..ba47ca1
> --- /dev/null
> +++ b/board/Marvell/guruplug/guruplug.c
> @@ -0,0 +1,167 @@
> +/*
> + * (C) Copyright 2009
> + * Marvell Semiconductor <www.marvell.com>
> + * Written-by: Siddarth Gore <gores@marvell.com>
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
> + * MA 02110-1301 USA
> + */
> +
> +#include <common.h>
> +#include <miiphy.h>
> +#include <asm/arch/kirkwood.h>
> +#include <asm/arch/mpp.h>
> +#include "guruplug.h"
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +int board_init(void)
> +{
> + /*
> + * default gpio configuration
> + * There are maximum 64 gpios controlled through 2 sets of registers
> + * the below configuration configures mainly initial LED status
> + */
> + kw_config_gpio(GURUPLUG_OE_VAL_LOW,
> + GURUPLUG_OE_VAL_HIGH,
> + GURUPLUG_OE_LOW, GURUPLUG_OE_HIGH);
> +
> + /* Multi-Purpose Pins Functionality configuration */
> + u32 kwmpp_config[] = {
> + MPP0_NF_IO2,
> + MPP1_NF_IO3,
> + MPP2_NF_IO4,
> + MPP3_NF_IO5,
> + MPP4_NF_IO6,
> + MPP5_NF_IO7,
> + MPP6_SYSRST_OUTn,
> + MPP7_GPO, /* GPIO_RST */
> + MPP8_TW_SDA,
> + MPP9_TW_SCK,
> + MPP10_UART0_TXD,
> + MPP11_UART0_RXD,
> + MPP12_SD_CLK,
> + MPP13_SD_CMD,
> + MPP14_SD_D0,
> + MPP15_SD_D1,
> + MPP16_SD_D2,
> + MPP17_SD_D3,
> + MPP18_NF_IO0,
> + MPP19_NF_IO1,
> + MPP20_GE1_0,
> + MPP21_GE1_1,
> + MPP22_GE1_2,
> + MPP23_GE1_3,
> + MPP24_GE1_4,
> + MPP25_GE1_5,
> + MPP26_GE1_6,
> + MPP27_GE1_7,
> + MPP28_GE1_8,
> + MPP29_GE1_9,
> + MPP30_GE1_10,
> + MPP31_GE1_11,
> + MPP32_GE1_12,
> + MPP33_GE1_13,
> + MPP34_GE1_14,
> + MPP35_GE1_15,
> + MPP36_GPIO,
> + MPP37_GPIO,
> + MPP38_GPIO,
> + MPP39_GPIO,
> + MPP40_TDM_SPI_SCK,
> + MPP41_TDM_SPI_MISO,
> + MPP42_TDM_SPI_MOSI,
> + MPP43_GPIO,
> + MPP44_GPIO,
> + MPP45_GPIO,
> + MPP46_GPIO, /* M_RLED */
> + MPP47_GPIO, /* M_GLED */
> + MPP48_GPIO, /* B_RLED */
> + MPP49_GPIO, /* B_GLED */
> + 0
> + };
> + kirkwood_mpp_conf(kwmpp_config);
> +
> + /*
> + * arch number of board
> + */
> + gd->bd->bi_arch_number = MACH_TYPE_GURUPLUG;
> +
> + /* adress of boot parameters */
> + gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
> +
> + return 0;
> +}
> +
> +int dram_init(void)
> +{
> + int i;
> +
> + for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
> + gd->bd->bi_dram[i].start = kw_sdram_bar(i);
> + gd->bd->bi_dram[i].size = kw_sdram_bs(i);
> + }
> + return 0;
> +}
> +
> +#ifdef CONFIG_RESET_PHY_R
> +void mv_phy_88e1121_init(char *name)
> +{
> + u16 reg;
> + u16 devadr;
> +
> + if (miiphy_set_current_dev(name))
> + return;
> +
> + /* command to read PHY dev address */
> + if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) {
> + printf("Err..%s could not read PHY dev address\n",
> + __FUNCTION__);
> + return;
> + }
> +
> + /*
> + * Enable RGMII delay on Tx and Rx for CPU port
> + * Ref: sec 4.7.2 of chip datasheet
> + */
> + miiphy_write(name, devadr, MV88E1121_PGADR_REG, 2);
> + miiphy_read(name, devadr, MV88E1121_MAC_CTRL2_REG, ®);
> + reg |= (MV88E1121_RGMII_RXTM_CTRL | MV88E1121_RGMII_TXTM_CTRL);
> + miiphy_write(name, devadr, MV88E1121_MAC_CTRL2_REG, reg);
> + miiphy_write(name, devadr, MV88E1121_PGADR_REG, 0);
> +
> + /* reset the phy */
> + if (miiphy_read (name, devadr, PHY_BMCR, ®) != 0) {
> + printf("Err..(%s) PHY status read failed\n", __FUNCTION__);
> + return;
> + }
> + if (miiphy_write (name, devadr, PHY_BMCR, reg | 0x8000) != 0) {
> + printf("Err..(%s) PHY reset failed\n", __FUNCTION__);
> + return;
> + }
> +
> + printf("88E1121 Initialized on %s\n", name);
> +}
We have pretty much identical code already in mv_phy_88e1116_init()
[in "board/Marvell/rd6281a/rd6281a.c"], in reset_phy() [in
"board/Marvell/openrd_base/openrd_base.c"], in reset_phy(0 [in
"board/Marvell/sheevaplug/sheevaplug.c"] and I don't know where else.
I object against adding more and more copies of the same code. Please
factor out the common part into a single implementation, and call this
everwhere where such code is used. Thanks.
...
> --- /dev/null
> +++ b/board/Marvell/guruplug/guruplug.h
> @@ -0,0 +1,39 @@
....
> +#define GURUPLUG_OE_LOW (~(0))
> +#define GURUPLUG_OE_HIGH (~(0))
Is this correct? Both LOW and HIGH use the same value??
...
> +#define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */
> +#include <config_cmd_default.h>
> +#define CONFIG_CMD_AUTOSCRIPT
CONFIG_CMD_AUTOSCRIPT has been deprecated long ago. Please fix.
> +/*
> + * Other required minimal configurations
> + */
In which way is this "minimal" ?
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Uncertain fortune is thoroughly mastered by the equity of the calcu-
lation. - Blaise Pascal
^ permalink raw reply [flat|nested] 15+ messages in thread
* [U-Boot] [PATCH] Marvell GuruPlug Board Support
2010-03-15 13:42 ` Siddarth Gore
2010-03-15 16:08 ` Wolfgang Denk
@ 2010-03-15 16:11 ` Wolfgang Denk
1 sibling, 0 replies; 15+ messages in thread
From: Wolfgang Denk @ 2010-03-15 16:11 UTC (permalink / raw)
To: u-boot
Dear Siddarth Gore,
In message <1268660568-23022-1-git-send-email-gores@marvell.com> you wrote:
> GuruPlug Standard: 1 Gb Ethernet, 2 USB 2.0
> GuruPlug Plus: 2 Gb Ethernet, 2 USB 2.0, 1 eSATA, 1 uSD slot
>
> References:
> http://www.globalscaletechnologies.com/t-guruplugdetails.aspx
> http://plugcomputer.org
>
> This patch is for GuruPlug Plus, but it supports Standard version
> as well.
And please: when resubmitting a (modified) patch, then mark it as such
by using "[PATCH v2]" etc. in the subject, and add a description of
the changes (compared to the previous version(s) of the patch) below
the "---" line.
Thanks.
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
If you believe that feeling bad or worrying long enough will change a
past or future event, then you are residing on another planet with a
different reality system.
^ permalink raw reply [flat|nested] 15+ messages in thread
* [U-Boot] [PATCH] Marvell GuruPlug Board Support
2010-03-15 16:08 ` Wolfgang Denk
@ 2010-03-17 7:01 ` Prafulla Wadaskar
2010-03-18 5:28 ` Siddarth Gore
` (2 subsequent siblings)
3 siblings, 0 replies; 15+ messages in thread
From: Prafulla Wadaskar @ 2010-03-17 7:01 UTC (permalink / raw)
To: u-boot
> -----Original Message-----
> From: u-boot-bounces at lists.denx.de
> [mailto:u-boot-bounces at lists.denx.de] On Behalf Of Wolfgang Denk
> Sent: Monday, March 15, 2010 9:38 PM
> To: Siddarth Gore
> Cc: u-boot at lists.denx.de; Ashish Karkare; Prabhanjan Sarnaik
> Subject: Re: [U-Boot] [PATCH] Marvell GuruPlug Board Support
...snip...
> > +
> > +#ifdef CONFIG_RESET_PHY_R
> > +void mv_phy_88e1121_init(char *name)
> > +{
> > + u16 reg;
> > + u16 devadr;
> > +
> > + if (miiphy_set_current_dev(name))
> > + return;
> > +
> > + /* command to read PHY dev address */
> > + if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) {
> > + printf("Err..%s could not read PHY dev address\n",
> > + __FUNCTION__);
> > + return;
> > + }
> > +
> > + /*
> > + * Enable RGMII delay on Tx and Rx for CPU port
> > + * Ref: sec 4.7.2 of chip datasheet
> > + */
> > + miiphy_write(name, devadr, MV88E1121_PGADR_REG, 2);
> > + miiphy_read(name, devadr, MV88E1121_MAC_CTRL2_REG, ®);
> > + reg |= (MV88E1121_RGMII_RXTM_CTRL | MV88E1121_RGMII_TXTM_CTRL);
> > + miiphy_write(name, devadr, MV88E1121_MAC_CTRL2_REG, reg);
> > + miiphy_write(name, devadr, MV88E1121_PGADR_REG, 0);
> > +
> > + /* reset the phy */
> > + if (miiphy_read (name, devadr, PHY_BMCR, ®) != 0) {
> > + printf("Err..(%s) PHY status read failed\n",
> __FUNCTION__);
> > + return;
> > + }
> > + if (miiphy_write (name, devadr, PHY_BMCR, reg | 0x8000) != 0) {
> > + printf("Err..(%s) PHY reset failed\n", __FUNCTION__);
> > + return;
> > + }
> > +
> > + printf("88E1121 Initialized on %s\n", name);
> > +}
>
> We have pretty much identical code already in mv_phy_88e1116_init()
> [in "board/Marvell/rd6281a/rd6281a.c"], in reset_phy() [in
> "board/Marvell/openrd_base/openrd_base.c"], in reset_phy(0 [in
> "board/Marvell/sheevaplug/sheevaplug.c"] and I don't know where else.
>
> I object against adding more and more copies of the same code. Please
> factor out the common part into a single implementation, and call this
> everwhere where such code is used. Thanks.
Hi Wolfgang
I agree with you.
Pls have a look at old reference http://lists.denx.de/pipermail/u-boot/2009-June/053621.html
I would be keen to do this cleanup.
Can someone make new PHY framework available,
If not I will be glad to provide Drivers for Marvell PHYs.
Regards..
Prafulla . .
^ permalink raw reply [flat|nested] 15+ messages in thread
* [U-Boot] [PATCH] Marvell GuruPlug Board Support
2010-03-15 16:08 ` Wolfgang Denk
2010-03-17 7:01 ` Prafulla Wadaskar
@ 2010-03-18 5:28 ` Siddarth Gore
2010-03-18 6:43 ` Prafulla Wadaskar
2010-03-18 8:38 ` Wolfgang Denk
2010-03-18 6:52 ` Siddarth Gore
2010-03-18 7:42 ` [U-Boot] [PATCH v2] " Siddarth Gore
3 siblings, 2 replies; 15+ messages in thread
From: Siddarth Gore @ 2010-03-18 5:28 UTC (permalink / raw)
To: u-boot
On Mon, 2010-03-15 at 09:08 -0700, Wolfgang Denk wrote:
> Dear Siddarth Gore,
>
> In message <1268660568-23022-1-git-send-email-gores@marvell.com> you wrote:
> ...
> > diff --git a/MAINTAINERS b/MAINTAINERS
> > index 80057ce..f102cd8 100644
> > --- a/MAINTAINERS
> > +++ b/MAINTAINERS
> > @@ -765,6 +765,10 @@ Prafulla Wadaskar <prafulla@marvell.com>
> > rd6281a ARM926EJS (Kirkwood SoC)
> > sheevaplug ARM926EJS (Kirkwood SoC)
> >
> > +Siddarth Gore <gores@marvell.com>
> > +
> > + guruplug ARM926EJS (Kirkwood SoC)
> > +
> > Richard Woodruff <r-woodruff2@ti.com>
>
> Please keep list of maintainers sorted by last name.
>
ok. done.
> > --- /dev/null
> > +++ b/board/Marvell/guruplug/config.mk
> > @@ -0,0 +1,28 @@
> ...
> > +TEXT_BASE = 0x00600000
> > +
> > +# Kirkwood Boot Image configuration file
>
> Please don't add such trailers. Move the description upto the start of
> the file - if you really think you need one. It's probably better just
> to drop this.
>
ok. removed this comment.
> > +KWD_CONFIG = $(SRCTREE)/board/$(BOARDDIR)/kwbimage.cfg
> > diff --git a/board/Marvell/guruplug/guruplug.c b/board/Marvell/guruplug/guruplug.c
> > new file mode 100644
> > index 0000000..ba47ca1
> > --- /dev/null
> > +++ b/board/Marvell/guruplug/guruplug.c
> > @@ -0,0 +1,167 @@
> > +/*
> > + * (C) Copyright 2009
> > + * Marvell Semiconductor <www.marvell.com>
> > + * Written-by: Siddarth Gore <gores@marvell.com>
> > + *
> > + * See file CREDITS for list of people who contributed to this
> > + * project.
> > + *
> > + * This program is free software; you can redistribute it and/or
> > + * modify it under the terms of the GNU General Public License as
> > + * published by the Free Software Foundation; either version 2 of
> > + * the License, or (at your option) any later version.
> > + *
> > + * This program is distributed in the hope that it will be useful,
> > + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> > + * GNU General Public License for more details.
> > + *
> > + * You should have received a copy of the GNU General Public License
> > + * along with this program; if not, write to the Free Software
> > + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
> > + * MA 02110-1301 USA
> > + */
> > +
> > +#include <common.h>
> > +#include <miiphy.h>
> > +#include <asm/arch/kirkwood.h>
> > +#include <asm/arch/mpp.h>
> > +#include "guruplug.h"
> > +
> > +DECLARE_GLOBAL_DATA_PTR;
> > +
> > +int board_init(void)
> > +{
> > + /*
> > + * default gpio configuration
> > + * There are maximum 64 gpios controlled through 2 sets of registers
> > + * the below configuration configures mainly initial LED status
> > + */
> > + kw_config_gpio(GURUPLUG_OE_VAL_LOW,
> > + GURUPLUG_OE_VAL_HIGH,
> > + GURUPLUG_OE_LOW, GURUPLUG_OE_HIGH);
> > +
> > + /* Multi-Purpose Pins Functionality configuration */
> > + u32 kwmpp_config[] = {
> > + MPP0_NF_IO2,
> > + MPP1_NF_IO3,
> > + MPP2_NF_IO4,
> > + MPP3_NF_IO5,
> > + MPP4_NF_IO6,
> > + MPP5_NF_IO7,
> > + MPP6_SYSRST_OUTn,
> > + MPP7_GPO, /* GPIO_RST */
> > + MPP8_TW_SDA,
> > + MPP9_TW_SCK,
> > + MPP10_UART0_TXD,
> > + MPP11_UART0_RXD,
> > + MPP12_SD_CLK,
> > + MPP13_SD_CMD,
> > + MPP14_SD_D0,
> > + MPP15_SD_D1,
> > + MPP16_SD_D2,
> > + MPP17_SD_D3,
> > + MPP18_NF_IO0,
> > + MPP19_NF_IO1,
> > + MPP20_GE1_0,
> > + MPP21_GE1_1,
> > + MPP22_GE1_2,
> > + MPP23_GE1_3,
> > + MPP24_GE1_4,
> > + MPP25_GE1_5,
> > + MPP26_GE1_6,
> > + MPP27_GE1_7,
> > + MPP28_GE1_8,
> > + MPP29_GE1_9,
> > + MPP30_GE1_10,
> > + MPP31_GE1_11,
> > + MPP32_GE1_12,
> > + MPP33_GE1_13,
> > + MPP34_GE1_14,
> > + MPP35_GE1_15,
> > + MPP36_GPIO,
> > + MPP37_GPIO,
> > + MPP38_GPIO,
> > + MPP39_GPIO,
> > + MPP40_TDM_SPI_SCK,
> > + MPP41_TDM_SPI_MISO,
> > + MPP42_TDM_SPI_MOSI,
> > + MPP43_GPIO,
> > + MPP44_GPIO,
> > + MPP45_GPIO,
> > + MPP46_GPIO, /* M_RLED */
> > + MPP47_GPIO, /* M_GLED */
> > + MPP48_GPIO, /* B_RLED */
> > + MPP49_GPIO, /* B_GLED */
> > + 0
> > + };
> > + kirkwood_mpp_conf(kwmpp_config);
> > +
> > + /*
> > + * arch number of board
> > + */
> > + gd->bd->bi_arch_number = MACH_TYPE_GURUPLUG;
> > +
> > + /* adress of boot parameters */
> > + gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
> > +
> > + return 0;
> > +}
> > +
> > +int dram_init(void)
> > +{
> > + int i;
> > +
> > + for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
> > + gd->bd->bi_dram[i].start = kw_sdram_bar(i);
> > + gd->bd->bi_dram[i].size = kw_sdram_bs(i);
> > + }
> > + return 0;
> > +}
> > +
> > +#ifdef CONFIG_RESET_PHY_R
> > +void mv_phy_88e1121_init(char *name)
> > +{
> > + u16 reg;
> > + u16 devadr;
> > +
> > + if (miiphy_set_current_dev(name))
> > + return;
> > +
> > + /* command to read PHY dev address */
> > + if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) {
> > + printf("Err..%s could not read PHY dev address\n",
> > + __FUNCTION__);
> > + return;
> > + }
> > +
> > + /*
> > + * Enable RGMII delay on Tx and Rx for CPU port
> > + * Ref: sec 4.7.2 of chip datasheet
> > + */
> > + miiphy_write(name, devadr, MV88E1121_PGADR_REG, 2);
> > + miiphy_read(name, devadr, MV88E1121_MAC_CTRL2_REG, ®);
> > + reg |= (MV88E1121_RGMII_RXTM_CTRL | MV88E1121_RGMII_TXTM_CTRL);
> > + miiphy_write(name, devadr, MV88E1121_MAC_CTRL2_REG, reg);
> > + miiphy_write(name, devadr, MV88E1121_PGADR_REG, 0);
> > +
> > + /* reset the phy */
> > + if (miiphy_read (name, devadr, PHY_BMCR, ®) != 0) {
> > + printf("Err..(%s) PHY status read failed\n", __FUNCTION__);
> > + return;
> > + }
> > + if (miiphy_write (name, devadr, PHY_BMCR, reg | 0x8000) != 0) {
> > + printf("Err..(%s) PHY reset failed\n", __FUNCTION__);
> > + return;
> > + }
> > +
> > + printf("88E1121 Initialized on %s\n", name);
> > +}
>
> We have pretty much identical code already in mv_phy_88e1116_init()
> [in "board/Marvell/rd6281a/rd6281a.c"], in reset_phy() [in
> "board/Marvell/openrd_base/openrd_base.c"], in reset_phy(0 [in
> "board/Marvell/sheevaplug/sheevaplug.c"] and I don't know where else.
>
> I object against adding more and more copies of the same code. Please
> factor out the common part into a single implementation, and call this
> everwhere where such code is used. Thanks.
>
i can create a new file ethphy.c in board/Marvell/common and put this
code there. but if we are going to move to a phy driver (as Prafulla
suggested) then that wont be necessary. Please advise.
Also i think we should maintain different init functions for 1116 and
1121 as they represent different phy families, even though the code is
pretty much the same right now.
>
> ...
> > --- /dev/null
> > +++ b/board/Marvell/guruplug/guruplug.h
> > @@ -0,0 +1,39 @@
> ....
> > +#define GURUPLUG_OE_LOW (~(0))
> > +#define GURUPLUG_OE_HIGH (~(0))
>
> Is this correct? Both LOW and HIGH use the same value??
>
> ...
> > +#define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */
> > +#include <config_cmd_default.h>
> > +#define CONFIG_CMD_AUTOSCRIPT
>
> CONFIG_CMD_AUTOSCRIPT has been deprecated long ago. Please fix.
>
ok. removed this.
> > +/*
> > + * Other required minimal configurations
> > + */
>
> In which way is this "minimal" ?
>
ok. removed the word 'minimal' from the comment.
-siddarth
>
> Best regards,
>
> Wolfgang Denk
>
> --
> DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
> Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
> Uncertain fortune is thoroughly mastered by the equity of the calcu-
> lation. - Blaise Pascal
^ permalink raw reply [flat|nested] 15+ messages in thread
* [U-Boot] [PATCH] Marvell GuruPlug Board Support
2010-03-18 5:28 ` Siddarth Gore
@ 2010-03-18 6:43 ` Prafulla Wadaskar
2010-03-18 8:38 ` Wolfgang Denk
1 sibling, 0 replies; 15+ messages in thread
From: Prafulla Wadaskar @ 2010-03-18 6:43 UTC (permalink / raw)
To: u-boot
> -----Original Message-----
> From: u-boot-bounces at lists.denx.de
> [mailto:u-boot-bounces at lists.denx.de] On Behalf Of Siddarth Gore
> Sent: Thursday, March 18, 2010 10:59 AM
> To: Wolfgang Denk
> Cc: u-boot at lists.denx.de; Ashish Karkare; Prabhanjan Sarnaik
> Subject: Re: [U-Boot] [PATCH] Marvell GuruPlug Board Support
...snip...
> >
> > We have pretty much identical code already in mv_phy_88e1116_init()
> > [in "board/Marvell/rd6281a/rd6281a.c"], in reset_phy() [in
> > "board/Marvell/openrd_base/openrd_base.c"], in reset_phy(0 [in
> > "board/Marvell/sheevaplug/sheevaplug.c"] and I don't know
> where else.
> >
> > I object against adding more and more copies of the same
> code. Please
> > factor out the common part into a single implementation,
> and call this
> > everwhere where such code is used. Thanks.
> >
> i can create a new file ethphy.c in board/Marvell/common and put this
> code there. but if we are going to move to a phy driver (as Prafulla
> suggested) then that wont be necessary. Please advise.
>
> Also i think we should maintain different init functions for 1116 and
> 1121 as they represent different phy families, even though the code is
> pretty much the same right now.
Hi Siddarth
I think you keep this part as it is as of now,
Once Ben suggest something, I will post the cleanup patch
Regards..
Prafulla ..
^ permalink raw reply [flat|nested] 15+ messages in thread
* [U-Boot] [PATCH] Marvell GuruPlug Board Support
2010-03-15 16:08 ` Wolfgang Denk
2010-03-17 7:01 ` Prafulla Wadaskar
2010-03-18 5:28 ` Siddarth Gore
@ 2010-03-18 6:52 ` Siddarth Gore
2010-03-18 7:42 ` [U-Boot] [PATCH v2] " Siddarth Gore
3 siblings, 0 replies; 15+ messages in thread
From: Siddarth Gore @ 2010-03-18 6:52 UTC (permalink / raw)
To: u-boot
On Mon, 2010-03-15 at 09:08 -0700, Wolfgang Denk wrote:
> ...
> > --- /dev/null
> > +++ b/board/Marvell/guruplug/guruplug.h
> > @@ -0,0 +1,39 @@
> ....
> > +#define GURUPLUG_OE_LOW (~(0))
> > +#define GURUPLUG_OE_HIGH (~(0))
>
> Is this correct? Both LOW and HIGH use the same value??
>
Sorry. forget to respond to this one.
Yes this is correct. LOW and HIGH does not represent logic levels here.
The registers which control GPIO pins 0 though 31 are suffixed LOW and
those which control the rest are suffixed HIGH.
-siddarth
^ permalink raw reply [flat|nested] 15+ messages in thread
* [U-Boot] [PATCH v2] Marvell GuruPlug Board Support
2010-03-15 16:08 ` Wolfgang Denk
` (2 preceding siblings ...)
2010-03-18 6:52 ` Siddarth Gore
@ 2010-03-18 7:42 ` Siddarth Gore
2010-03-18 8:02 ` Prafulla Wadaskar
2010-03-21 19:45 ` Wolfgang Denk
3 siblings, 2 replies; 15+ messages in thread
From: Siddarth Gore @ 2010-03-18 7:42 UTC (permalink / raw)
To: u-boot
GuruPlug Standard: 1 Gb Ethernet, 2 USB 2.0
GuruPlug Plus: 2 Gb Ethernet, 2 USB 2.0, 1 eSATA, 1 uSD slot
References:
http://www.globalscaletechnologies.com/t-guruplugdetails.aspx
http://plugcomputer.org
This patch is for GuruPlug Plus, but it supports Standard version
as well.
Signed-off-by: Siddarth Gore <gores@marvell.com>
---
Changes compared to the previous version (messaage-id:
1268660568-23022-1-git-send-email-gores at marvell.com)
- maintainers entry sorted according to last name
- removed trailing comment from board/Marvell/guruplug/config.mk
- removed CONFIG_CMD_AUTOSCRIPT from include/configs/guruplug.h
- removed word 'minimal' from comment in include/configs/guruplug.h
MAINTAINERS | 4 +
MAKEALL | 1 +
Makefile | 3 +
board/Marvell/guruplug/Makefile | 51 +++++++++
board/Marvell/guruplug/config.mk | 27 +++++
board/Marvell/guruplug/guruplug.c | 167 +++++++++++++++++++++++++++++
board/Marvell/guruplug/guruplug.h | 39 +++++++
board/Marvell/guruplug/kwbimage.cfg | 162 ++++++++++++++++++++++++++++
include/configs/guruplug.h | 198 +++++++++++++++++++++++++++++++++++
9 files changed, 652 insertions(+), 0 deletions(-)
create mode 100644 board/Marvell/guruplug/Makefile
create mode 100644 board/Marvell/guruplug/config.mk
create mode 100644 board/Marvell/guruplug/guruplug.c
create mode 100644 board/Marvell/guruplug/guruplug.h
create mode 100644 board/Marvell/guruplug/kwbimage.cfg
create mode 100644 include/configs/guruplug.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 80057ce..ed0731d 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -195,6 +195,10 @@ Niklaus Giger <niklaus.giger@netstal.com>
MCU25 PPC405GPr
HCU5 PPC440EPx
+Siddarth Gore <gores@marvell.com>
+
+ guruplug ARM926EJS (Kirkwood SoC)
+
Frank Gottschling <fgottschling@eltec.de>
MHPC MPC8xx
diff --git a/MAKEALL b/MAKEALL
index beacb5f..b15c2d1 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -562,6 +562,7 @@ LIST_ARM9=" \
edb9312 \
edb9315 \
edb9315a \
+ guruplug \
imx27lite \
lpd7a400 \
mv88f6281gtw_ge \
diff --git a/Makefile b/Makefile
index d801e25..30d5968 100644
--- a/Makefile
+++ b/Makefile
@@ -2952,6 +2952,9 @@ davinci_dm365evm_config : unconfig
davinci_dm6467evm_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs dm6467evm davinci davinci
+guruplug_config: unconfig
+ @$(MKCONFIG) $(@:_config=) arm arm926ejs $(@:_config=) Marvell kirkwood
+
imx27lite_config: unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs imx27lite logicpd mx27
diff --git a/board/Marvell/guruplug/Makefile b/board/Marvell/guruplug/Makefile
new file mode 100644
index 0000000..99748a7
--- /dev/null
+++ b/board/Marvell/guruplug/Makefile
@@ -0,0 +1,51 @@
+#
+# (C) Copyright 2009
+# Marvell Semiconductor <www.marvell.com>
+# Written-by: Siddarth Gore <gores@marvell.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+# MA 02110-1301 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).a
+
+COBJS := guruplug.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/Marvell/guruplug/config.mk b/board/Marvell/guruplug/config.mk
new file mode 100644
index 0000000..caa26b6
--- /dev/null
+++ b/board/Marvell/guruplug/config.mk
@@ -0,0 +1,27 @@
+#
+# (C) Copyright 2009
+# Marvell Semiconductor <www.marvell.com>
+# Written-by: Siddarth Gore <gores@marvell.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+# MA 02110-1301 USA
+#
+
+TEXT_BASE = 0x00600000
+
+KWD_CONFIG = $(SRCTREE)/board/$(BOARDDIR)/kwbimage.cfg
diff --git a/board/Marvell/guruplug/guruplug.c b/board/Marvell/guruplug/guruplug.c
new file mode 100644
index 0000000..ba47ca1
--- /dev/null
+++ b/board/Marvell/guruplug/guruplug.c
@@ -0,0 +1,167 @@
+/*
+ * (C) Copyright 2009
+ * Marvell Semiconductor <www.marvell.com>
+ * Written-by: Siddarth Gore <gores@marvell.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#include <common.h>
+#include <miiphy.h>
+#include <asm/arch/kirkwood.h>
+#include <asm/arch/mpp.h>
+#include "guruplug.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+ /*
+ * default gpio configuration
+ * There are maximum 64 gpios controlled through 2 sets of registers
+ * the below configuration configures mainly initial LED status
+ */
+ kw_config_gpio(GURUPLUG_OE_VAL_LOW,
+ GURUPLUG_OE_VAL_HIGH,
+ GURUPLUG_OE_LOW, GURUPLUG_OE_HIGH);
+
+ /* Multi-Purpose Pins Functionality configuration */
+ u32 kwmpp_config[] = {
+ MPP0_NF_IO2,
+ MPP1_NF_IO3,
+ MPP2_NF_IO4,
+ MPP3_NF_IO5,
+ MPP4_NF_IO6,
+ MPP5_NF_IO7,
+ MPP6_SYSRST_OUTn,
+ MPP7_GPO, /* GPIO_RST */
+ MPP8_TW_SDA,
+ MPP9_TW_SCK,
+ MPP10_UART0_TXD,
+ MPP11_UART0_RXD,
+ MPP12_SD_CLK,
+ MPP13_SD_CMD,
+ MPP14_SD_D0,
+ MPP15_SD_D1,
+ MPP16_SD_D2,
+ MPP17_SD_D3,
+ MPP18_NF_IO0,
+ MPP19_NF_IO1,
+ MPP20_GE1_0,
+ MPP21_GE1_1,
+ MPP22_GE1_2,
+ MPP23_GE1_3,
+ MPP24_GE1_4,
+ MPP25_GE1_5,
+ MPP26_GE1_6,
+ MPP27_GE1_7,
+ MPP28_GE1_8,
+ MPP29_GE1_9,
+ MPP30_GE1_10,
+ MPP31_GE1_11,
+ MPP32_GE1_12,
+ MPP33_GE1_13,
+ MPP34_GE1_14,
+ MPP35_GE1_15,
+ MPP36_GPIO,
+ MPP37_GPIO,
+ MPP38_GPIO,
+ MPP39_GPIO,
+ MPP40_TDM_SPI_SCK,
+ MPP41_TDM_SPI_MISO,
+ MPP42_TDM_SPI_MOSI,
+ MPP43_GPIO,
+ MPP44_GPIO,
+ MPP45_GPIO,
+ MPP46_GPIO, /* M_RLED */
+ MPP47_GPIO, /* M_GLED */
+ MPP48_GPIO, /* B_RLED */
+ MPP49_GPIO, /* B_GLED */
+ 0
+ };
+ kirkwood_mpp_conf(kwmpp_config);
+
+ /*
+ * arch number of board
+ */
+ gd->bd->bi_arch_number = MACH_TYPE_GURUPLUG;
+
+ /* adress of boot parameters */
+ gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
+
+ return 0;
+}
+
+int dram_init(void)
+{
+ int i;
+
+ for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
+ gd->bd->bi_dram[i].start = kw_sdram_bar(i);
+ gd->bd->bi_dram[i].size = kw_sdram_bs(i);
+ }
+ return 0;
+}
+
+#ifdef CONFIG_RESET_PHY_R
+void mv_phy_88e1121_init(char *name)
+{
+ u16 reg;
+ u16 devadr;
+
+ if (miiphy_set_current_dev(name))
+ return;
+
+ /* command to read PHY dev address */
+ if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) {
+ printf("Err..%s could not read PHY dev address\n",
+ __FUNCTION__);
+ return;
+ }
+
+ /*
+ * Enable RGMII delay on Tx and Rx for CPU port
+ * Ref: sec 4.7.2 of chip datasheet
+ */
+ miiphy_write(name, devadr, MV88E1121_PGADR_REG, 2);
+ miiphy_read(name, devadr, MV88E1121_MAC_CTRL2_REG, ®);
+ reg |= (MV88E1121_RGMII_RXTM_CTRL | MV88E1121_RGMII_TXTM_CTRL);
+ miiphy_write(name, devadr, MV88E1121_MAC_CTRL2_REG, reg);
+ miiphy_write(name, devadr, MV88E1121_PGADR_REG, 0);
+
+ /* reset the phy */
+ if (miiphy_read (name, devadr, PHY_BMCR, ®) != 0) {
+ printf("Err..(%s) PHY status read failed\n", __FUNCTION__);
+ return;
+ }
+ if (miiphy_write (name, devadr, PHY_BMCR, reg | 0x8000) != 0) {
+ printf("Err..(%s) PHY reset failed\n", __FUNCTION__);
+ return;
+ }
+
+ printf("88E1121 Initialized on %s\n", name);
+}
+
+void reset_phy(void)
+{
+ /* configure and initialize both PHY's */
+ mv_phy_88e1121_init("egiga0");
+ mv_phy_88e1121_init("egiga1");
+}
+#endif /* CONFIG_RESET_PHY_R */
diff --git a/board/Marvell/guruplug/guruplug.h b/board/Marvell/guruplug/guruplug.h
new file mode 100644
index 0000000..5bc16b4
--- /dev/null
+++ b/board/Marvell/guruplug/guruplug.h
@@ -0,0 +1,39 @@
+/*
+ * (C) Copyright 2009
+ * Marvell Semiconductor <www.marvell.com>
+ * Written-by: Siddarth Gore <gores@marvell.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#ifndef __GURUPLUG_H
+#define __GURUPLUG_H
+
+#define GURUPLUG_OE_LOW (~(0))
+#define GURUPLUG_OE_HIGH (~(0))
+#define GURUPLUG_OE_VAL_LOW 0
+#define GURUPLUG_OE_VAL_HIGH (0xf << 16) /* 4 LED Pins high */
+
+/* PHY related */
+#define MV88E1121_MAC_CTRL2_REG 21
+#define MV88E1121_PGADR_REG 22
+#define MV88E1121_RGMII_TXTM_CTRL (1 << 4)
+#define MV88E1121_RGMII_RXTM_CTRL (1 << 5)
+
+#endif /* __GURUPLUG_H */
diff --git a/board/Marvell/guruplug/kwbimage.cfg b/board/Marvell/guruplug/kwbimage.cfg
new file mode 100644
index 0000000..2afd927
--- /dev/null
+++ b/board/Marvell/guruplug/kwbimage.cfg
@@ -0,0 +1,162 @@
+#
+# (C) Copyright 2009
+# Marvell Semiconductor <www.marvell.com>
+# Written-by: Siddarth Gore <gores@marvell.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+# MA 02110-1301 USA
+#
+# Refer docs/README.kwimage for more details about how-to configure
+# and create kirkwood boot image
+#
+
+# Boot Media configurations
+BOOT_FROM nand
+NAND_ECC_MODE default
+NAND_PAGE_SIZE 0x0800
+
+# SOC registers configuration using bootrom header extension
+# Maximum KWBIMAGE_MAX_CONFIG configurations allowed
+
+# Configure RGMII-0/1 interface pad voltage to 1.8V
+DATA 0xFFD100e0 0x1b1b9b9b
+
+#Dram initalization for SINGLE x16 CL=5 @ 400MHz
+DATA 0xFFD01400 0x43000c30 # DDR Configuration register
+# bit13-0: 0xc30 (3120 DDR2 clks refresh rate)
+# bit23-14: zero
+# bit24: 1= enable exit self refresh mode on DDR access
+# bit25: 1 required
+# bit29-26: zero
+# bit31-30: 01
+
+DATA 0xFFD01404 0x37543000 # DDR Controller Control Low
+# bit 4: 0=addr/cmd in smame cycle
+# bit 5: 0=clk is driven during self refresh, we don't care for APX
+# bit 6: 0=use recommended falling edge of clk for addr/cmd
+# bit14: 0=input buffer always powered up
+# bit18: 1=cpu lock transaction enabled
+# bit23-20: 5=recommended value for CL=5 and STARTBURST_DEL disabled bit31=0
+# bit27-24: 7= CL+2, STARTBURST sample stages, for freqs 400MHz, unbuffered DIMM
+# bit30-28: 3 required
+# bit31: 0=no additional STARTBURST delay
+
+DATA 0xFFD01408 0x22125451 # DDR Timing (Low) (active cycles value +1)
+# bit3-0: TRAS lsbs
+# bit7-4: TRCD
+# bit11- 8: TRP
+# bit15-12: TWR
+# bit19-16: TWTR
+# bit20: TRAS msb
+# bit23-21: 0x0
+# bit27-24: TRRD
+# bit31-28: TRTP
+
+DATA 0xFFD0140C 0x00000a33 # DDR Timing (High)
+# bit6-0: TRFC
+# bit8-7: TR2R
+# bit10-9: TR2W
+# bit12-11: TW2W
+# bit31-13: zero required
+
+DATA 0xFFD01410 0x000000cc # DDR Address Control
+# bit1-0: 01, Cs0width=x8
+# bit3-2: 10, Cs0size=1Gb
+# bit5-4: 01, Cs1width=x8
+# bit7-6: 10, Cs1size=1Gb
+# bit9-8: 00, Cs2width=nonexistent
+# bit11-10: 00, Cs2size =nonexistent
+# bit13-12: 00, Cs3width=nonexistent
+# bit15-14: 00, Cs3size =nonexistent
+# bit16: 0, Cs0AddrSel
+# bit17: 0, Cs1AddrSel
+# bit18: 0, Cs2AddrSel
+# bit19: 0, Cs3AddrSel
+# bit31-20: 0 required
+
+DATA 0xFFD01414 0x00000000 # DDR Open Pages Control
+# bit0: 0, OpenPage enabled
+# bit31-1: 0 required
+
+DATA 0xFFD01418 0x00000000 # DDR Operation
+# bit3-0: 0x0, DDR cmd
+# bit31-4: 0 required
+
+DATA 0xFFD0141C 0x00000C52 # DDR Mode
+# bit2-0: 2, BurstLen=2 required
+# bit3: 0, BurstType=0 required
+# bit6-4: 4, CL=5
+# bit7: 0, TestMode=0 normal
+# bit8: 0, DLL reset=0 normal
+# bit11-9: 6, auto-precharge write recovery ????????????
+# bit12: 0, PD must be zero
+# bit31-13: 0 required
+
+DATA 0xFFD01420 0x00000040 # DDR Extended Mode
+# bit0: 0, DDR DLL enabled
+# bit1: 0, DDR drive strenght normal
+# bit2: 0, DDR ODT control lsd (disabled)
+# bit5-3: 000, required
+# bit6: 1, DDR ODT control msb, (disabled)
+# bit9-7: 000, required
+# bit10: 0, differential DQS enabled
+# bit11: 0, required
+# bit12: 0, DDR output buffer enabled
+# bit31-13: 0 required
+
+DATA 0xFFD01424 0x0000F17F # DDR Controller Control High
+# bit2-0: 111, required
+# bit3 : 1 , MBUS Burst Chop disabled
+# bit6-4: 111, required
+# bit7 : 0
+# bit8 : 1 , add writepath sample stage, must be 1 for DDR freq >= 300MHz
+# bit9 : 0 , no half clock cycle addition to dataout
+# bit10 : 0 , 1/4 clock cycle skew enabled for addr/ctl signals
+# bit11 : 0 , 1/4 clock cycle skew disabled for write mesh
+# bit15-12: 1111 required
+# bit31-16: 0 required
+
+DATA 0xFFD01428 0x00085520 # DDR2 ODT Read Timing (default values)
+DATA 0xFFD0147C 0x00008552 # DDR2 ODT Write Timing (default values)
+
+DATA 0xFFD01500 0x00000000 # CS[0]n Base address to 0x0
+DATA 0xFFD01504 0x0FFFFFF1 # CS[0]n Size
+# bit0: 1, Window enabled
+# bit1: 0, Write Protect disabled
+# bit3-2: 00, CS0 hit selected
+# bit23-4: ones, required
+# bit31-24: 0x0F, Size (i.e. 256MB)
+
+DATA 0xFFD01508 0x10000000 # CS[1]n Base address to 256Mb
+DATA 0xFFD0150C 0x0FFFFFF5 # CS[1]n Size 256Mb Window enabled for CS1
+
+DATA 0xFFD01514 0x00000000 # CS[2]n Size, window disabled
+DATA 0xFFD0151C 0x00000000 # CS[3]n Size, window disabled
+
+DATA 0xFFD01494 0x00030000 # DDR ODT Control (Low)
+DATA 0xFFD01498 0x00000000 # DDR ODT Control (High)
+# bit1-0: 00, ODT0 controlled by ODT Control (low) register above
+# bit3-2: 01, ODT1 active NEVER!
+# bit31-4: zero, required
+
+DATA 0xFFD0149C 0x0000E803 # CPU ODT Control
+DATA 0xFFD01480 0x00000001 # DDR Initialization Control
+#bit0=1, enable DDR init upon this register write
+
+# End of Header extension
+DATA 0x0 0x0
diff --git a/include/configs/guruplug.h b/include/configs/guruplug.h
new file mode 100644
index 0000000..2fbc6ad
--- /dev/null
+++ b/include/configs/guruplug.h
@@ -0,0 +1,198 @@
+/*
+ * (C) Copyright 2009
+ * Marvell Semiconductor <www.marvell.com>
+ * Written-by: Siddarth Gore <gores@marvell.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+
+#ifndef _CONFIG_GURUPLUG_H
+#define _CONFIG_GURUPLUG_H
+
+/*
+ * Version number information
+ */
+#define CONFIG_IDENT_STRING "\nMarvell-GuruPlug"
+
+/*
+ * High Level Configuration Options (easy to change)
+ */
+#define CONFIG_MARVELL 1
+#define CONFIG_ARM926EJS 1 /* Basic Architecture */
+#define CONFIG_SHEEVA_88SV131 1 /* CPU Core subversion */
+#define CONFIG_KIRKWOOD 1 /* SOC Family Name */
+#define CONFIG_KW88F6281 1 /* SOC Name */
+#define CONFIG_MACH_GURUPLUG /* Machine type */
+
+#define CONFIG_MD5 /* get_random_hex on krikwood needs MD5 support */
+#define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */
+#define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */
+#define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */
+
+/*
+ * CLKs configurations
+ */
+#define CONFIG_SYS_HZ 1000
+
+/*
+ * NS16550 Configuration
+ */
+#define CONFIG_SYS_NS16550
+#define CONFIG_SYS_NS16550_SERIAL
+#define CONFIG_SYS_NS16550_REG_SIZE (-4)
+#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_TCLK
+#define CONFIG_SYS_NS16550_COM1 KW_UART0_BASE
+
+/*
+ * Serial Port configuration
+ * The following definitions let you select what serial you want to use
+ * for your console driver.
+ */
+
+#define CONFIG_CONS_INDEX 1 /*Console on UART0 */
+#define CONFIG_BAUDRATE 115200
+#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, \
+ 115200,230400, 460800, 921600 }
+/* auto boot */
+#define CONFIG_BOOTDELAY 3 /* default enable autoboot */
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization.
+ */
+#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
+#define CONFIG_INITRD_TAG 1 /* enable INITRD tag */
+#define CONFIG_SETUP_MEMORY_TAGS 1 /* enable memory tag */
+
+#define CONFIG_SYS_PROMPT "Marvell>> " /* Command Prompt */
+#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buff Size */
+#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \
+ +sizeof(CONFIG_SYS_PROMPT) + 16) /* Print Buff */
+/*
+ * Commands configuration
+ */
+#define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */
+#include <config_cmd_default.h>
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_USB
+
+/*
+ * NAND configuration
+ */
+#ifdef CONFIG_CMD_NAND
+#define CONFIG_NAND_KIRKWOOD
+#define CONFIG_SYS_MAX_NAND_DEVICE 1
+#define NAND_MAX_CHIPS 1
+#define CONFIG_SYS_NAND_BASE 0xD8000000 /* KW_DEFADR_NANDF */
+#define NAND_ALLOW_ERASE_ALL 1
+#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */
+#endif
+
+/*
+ * Environment variables configurations
+ */
+#ifdef CONFIG_CMD_NAND
+#define CONFIG_ENV_IS_IN_NAND 1
+#define CONFIG_ENV_SECT_SIZE 0x20000 /* 128K */
+#else
+#define CONFIG_ENV_IS_NOWHERE 1 /* if env in SDRAM */
+#endif
+/*
+ * max 4k env size is enough, but in case of nand
+ * it has to be rounded to sector size
+ */
+#define CONFIG_ENV_SIZE 0x20000 /* 128k */
+#define CONFIG_ENV_ADDR 0x40000
+#define CONFIG_ENV_OFFSET 0x40000 /* env starts here */
+
+/*
+ * Default environment variables
+ */
+#define CONFIG_BOOTCOMMAND "setenv ethact egiga0; " \
+ "${x_bootcmd_ethernet}; setenv ethact egiga1; " \
+ "${x_bootcmd_ethernet}; ${x_bootcmd_usb}; ${x_bootcmd_kernel}; "\
+ "setenv bootargs ${x_bootargs} ${x_bootargs_root}; " \
+ "bootm 0x6400000;"
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "x_bootcmd_ethernet=ping 192.168.2.1\0" \
+ "x_bootcmd_usb=usb start\0" \
+ "x_bootcmd_kernel=nand read.e 0x6400000 0x100000 0x400000\0" \
+ "x_bootargs=console=ttyS0,115200\0" \
+ "x_bootargs_root=ubi.mtd=2 root=ubi0:rootfs rootfstype=ubifs\0"
+
+/*
+ * Size of malloc() pool
+ */
+#define CONFIG_SYS_MALLOC_LEN (1024 * 128) /* 128kB for malloc() */
+/* size in bytes reserved for initial data */
+#define CONFIG_SYS_GBL_DATA_SIZE 128
+
+/*
+ * Other required configurations
+ */
+#define CONFIG_CONSOLE_INFO_QUIET /* some code reduction */
+#define CONFIG_ARCH_CPU_INIT /* call arch_cpu_init() */
+#define CONFIG_ARCH_MISC_INIT /* call arch_misc_init() */
+#define CONFIG_DISPLAY_CPUINFO /* Display cpu info */
+#define CONFIG_NR_DRAM_BANKS 4
+#define CONFIG_STACKSIZE 0x00100000 /* regular stack- 1M */
+#define CONFIG_SYS_LOAD_ADDR 0x00800000 /* default load adr- 8M */
+#define CONFIG_SYS_MEMTEST_START 0x00800000 /* 8M */
+#define CONFIG_SYS_MEMTEST_END 0x1fffffff /*(_512M -1) */
+#define CONFIG_SYS_RESET_ADDRESS 0xffff0000 /* Rst Vector Adr */
+#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
+
+/*
+ * Ethernet Driver configuration
+ */
+#ifdef CONFIG_CMD_NET
+#define CONFIG_NETCONSOLE /* include NetConsole support */
+#define CONFIG_NET_MULTI /* specify more that one ports available */
+#define CONFIG_MII /* expose smi ove miiphy interface */
+#define CONFIG_CMD_MII
+#define CONFIG_KIRKWOOD_EGIGA /* Enable kirkwood Gbe Controller Driver */
+#define CONFIG_SYS_FAULT_ECHO_LINK_DOWN /* detect link using phy */
+#define CONFIG_KIRKWOOD_EGIGA_PORTS {1,1} /* enable both ports */
+#define CONFIG_PHY_BASE_ADR 0
+#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */
+#define CONFIG_RESET_PHY_R /* use reset_phy() to init mv88e1121 PHY */
+#endif /* CONFIG_CMD_NET */
+
+/*
+ * USB/EHCI
+ */
+#ifdef CONFIG_CMD_USB
+#define CONFIG_USB_EHCI /* Enable EHCI USB support */
+#define CONFIG_USB_EHCI_KIRKWOOD /* on Kirkwood platform */
+#define CONFIG_EHCI_IS_TDI
+#define CONFIG_USB_STORAGE
+#define CONFIG_DOS_PARTITION
+#define CONFIG_ISO_PARTITION
+#define CONFIG_SUPPORT_VFAT
+#endif /* CONFIG_CMD_USB */
+
+#define CONFIG_SYS_ALT_MEMTEST
+
+#endif /* _CONFIG_GURUPLUG_H */
--
1.6.0.3
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [U-Boot] [PATCH v2] Marvell GuruPlug Board Support
2010-03-18 7:42 ` [U-Boot] [PATCH v2] " Siddarth Gore
@ 2010-03-18 8:02 ` Prafulla Wadaskar
2010-03-21 19:45 ` Wolfgang Denk
1 sibling, 0 replies; 15+ messages in thread
From: Prafulla Wadaskar @ 2010-03-18 8:02 UTC (permalink / raw)
To: u-boot
> -----Original Message-----
> From: Siddarth Gore [mailto:gores at marvell.com]
> Sent: Thursday, March 18, 2010 1:12 PM
> To: u-boot at lists.denx.de
> Cc: Prafulla Wadaskar; Prabhanjan Sarnaik; Ashish Karkare;
> Siddarth Gore
> Subject: [PATCH v2] Marvell GuruPlug Board Support
>
> GuruPlug Standard: 1 Gb Ethernet, 2 USB 2.0
> GuruPlug Plus: 2 Gb Ethernet, 2 USB 2.0, 1 eSATA, 1 uSD slot
>
> References:
> http://www.globalscaletechnologies.com/t-guruplugdetails.aspx
> http://plugcomputer.org
>
> This patch is for GuruPlug Plus, but it supports Standard version
> as well.
>
> Signed-off-by: Siddarth Gore <gores@marvell.com>
> ---
> Changes compared to the previous version (messaage-id:
> 1268660568-23022-1-git-send-email-gores at marvell.com)
> - maintainers entry sorted according to last name
> - removed trailing comment from board/Marvell/guruplug/config.mk
> - removed CONFIG_CMD_AUTOSCRIPT from include/configs/guruplug.h
> - removed word 'minimal' from comment in include/configs/guruplug.h
>
> MAINTAINERS | 4 +
> MAKEALL | 1 +
> Makefile | 3 +
> board/Marvell/guruplug/Makefile | 51 +++++++++
> board/Marvell/guruplug/config.mk | 27 +++++
> board/Marvell/guruplug/guruplug.c | 167
> +++++++++++++++++++++++++++++
> board/Marvell/guruplug/guruplug.h | 39 +++++++
> board/Marvell/guruplug/kwbimage.cfg | 162
> ++++++++++++++++++++++++++++
> include/configs/guruplug.h | 198
> +++++++++++++++++++++++++++++++++++
> 9 files changed, 652 insertions(+), 0 deletions(-)
> create mode 100644 board/Marvell/guruplug/Makefile
> create mode 100644 board/Marvell/guruplug/config.mk
> create mode 100644 board/Marvell/guruplug/guruplug.c
> create mode 100644 board/Marvell/guruplug/guruplug.h
> create mode 100644 board/Marvell/guruplug/kwbimage.cfg
> create mode 100644 include/configs/guruplug.h
>
Looks okay to me
Regards..
Prafulla . .
^ permalink raw reply [flat|nested] 15+ messages in thread
* [U-Boot] [PATCH] Marvell GuruPlug Board Support
2010-03-18 5:28 ` Siddarth Gore
2010-03-18 6:43 ` Prafulla Wadaskar
@ 2010-03-18 8:38 ` Wolfgang Denk
1 sibling, 0 replies; 15+ messages in thread
From: Wolfgang Denk @ 2010-03-18 8:38 UTC (permalink / raw)
To: u-boot
Dear Siddarth Gore,
In message <1268890125.23313.27.camel@pe-dt434> you wrote:
>
...
> > We have pretty much identical code already in mv_phy_88e1116_init()
> > [in "board/Marvell/rd6281a/rd6281a.c"], in reset_phy() [in
> > "board/Marvell/openrd_base/openrd_base.c"], in reset_phy(0 [in
> > "board/Marvell/sheevaplug/sheevaplug.c"] and I don't know where else.
> >
> > I object against adding more and more copies of the same code. Please
> > factor out the common part into a single implementation, and call this
> > everwhere where such code is used. Thanks.
> >
> i can create a new file ethphy.c in board/Marvell/common and put this
> code there. but if we are going to move to a phy driver (as Prafulla
> suggested) then that wont be necessary. Please advise.
Is there any actual development for a generic PHY support layer going
on anywhere? I must have missed this, then. If there is such a thing,
it should be used, obviously.
> Also i think we should maintain different init functions for 1116 and
> 1121 as they represent different phy families, even though the code is
> pretty much the same right now.
If the code is the same, then duplication makes no sense to me.
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Space is big. You just won't believe how vastly, hugely, mind-
bogglingly big it is. I mean, you may think it's a long way down the
road to the drug store, but that's just peanuts to space.
-- The Hitchhiker's Guide to the Galaxy
^ permalink raw reply [flat|nested] 15+ messages in thread
* [U-Boot] [PATCH v2] Marvell GuruPlug Board Support
2010-03-18 7:42 ` [U-Boot] [PATCH v2] " Siddarth Gore
2010-03-18 8:02 ` Prafulla Wadaskar
@ 2010-03-21 19:45 ` Wolfgang Denk
2010-04-06 11:26 ` Prafulla Wadaskar
1 sibling, 1 reply; 15+ messages in thread
From: Wolfgang Denk @ 2010-03-21 19:45 UTC (permalink / raw)
To: u-boot
Dear Tom, dear Prafulla,
In message <1268898134-10793-1-git-send-email-gores@marvell.com> you wrote:
> GuruPlug Standard: 1 Gb Ethernet, 2 USB 2.0
> GuruPlug Plus: 2 Gb Ethernet, 2 USB 2.0, 1 eSATA, 1 uSD slot
>
> References:
> http://www.globalscaletechnologies.com/t-guruplugdetails.aspx
> http://plugcomputer.org
>
> This patch is for GuruPlug Plus, but it supports Standard version
> as well.
>
> Signed-off-by: Siddarth Gore <gores@marvell.com>
> ---
> Changes compared to the previous version (messaage-id:
> 1268660568-23022-1-git-send-email-gores at marvell.com)
> - maintainers entry sorted according to last name
> - removed trailing comment from board/Marvell/guruplug/config.mk
> - removed CONFIG_CMD_AUTOSCRIPT from include/configs/guruplug.h
> - removed word 'minimal' from comment in include/configs/guruplug.h
>
> MAINTAINERS | 4 +
> MAKEALL | 1 +
> Makefile | 3 +
> board/Marvell/guruplug/Makefile | 51 +++++++++
> board/Marvell/guruplug/config.mk | 27 +++++
> board/Marvell/guruplug/guruplug.c | 167 +++++++++++++++++++++++++++++
> board/Marvell/guruplug/guruplug.h | 39 +++++++
> board/Marvell/guruplug/kwbimage.cfg | 162 ++++++++++++++++++++++++++++
> include/configs/guruplug.h | 198 +++++++++++++++++++++++++++++++++++
> 9 files changed, 652 insertions(+), 0 deletions(-)
> create mode 100644 board/Marvell/guruplug/Makefile
> create mode 100644 board/Marvell/guruplug/config.mk
> create mode 100644 board/Marvell/guruplug/guruplug.c
> create mode 100644 board/Marvell/guruplug/guruplug.h
> create mode 100644 board/Marvell/guruplug/kwbimage.cfg
> create mode 100644 include/configs/guruplug.h
Reviewed-by: Wolfgang Denk <wd@denx.de>
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Every little picofarad has a nanohenry all its own. - Don Vonada
^ permalink raw reply [flat|nested] 15+ messages in thread
* [U-Boot] [PATCH v2] Marvell GuruPlug Board Support
2010-03-21 19:45 ` Wolfgang Denk
@ 2010-04-06 11:26 ` Prafulla Wadaskar
0 siblings, 0 replies; 15+ messages in thread
From: Prafulla Wadaskar @ 2010-04-06 11:26 UTC (permalink / raw)
To: u-boot
> -----Original Message-----
> From: Wolfgang Denk [mailto:wd at denx.de]
> Sent: Monday, March 22, 2010 1:16 AM
> To: Tom; Prafulla Wadaskar
> Cc: Siddarth Gore; u-boot at lists.denx.de; Ashish Karkare;
> Prabhanjan Sarnaik
> Subject: Re: [U-Boot] [PATCH v2] Marvell GuruPlug Board Support
>
> Dear Tom, dear Prafulla,
>
> In message
> <1268898134-10793-1-git-send-email-gores@marvell.com> you wrote:
> > GuruPlug Standard: 1 Gb Ethernet, 2 USB 2.0
> > GuruPlug Plus: 2 Gb Ethernet, 2 USB 2.0, 1 eSATA, 1 uSD slot
> >
> > References:
> > http://www.globalscaletechnologies.com/t-guruplugdetails.aspx
> > http://plugcomputer.org
> >
> > This patch is for GuruPlug Plus, but it supports Standard version
> > as well.
> >
> > Signed-off-by: Siddarth Gore <gores@marvell.com>
> > ---
> > Changes compared to the previous version (messaage-id:
> > 1268660568-23022-1-git-send-email-gores at marvell.com)
> > - maintainers entry sorted according to last name
> > - removed trailing comment from board/Marvell/guruplug/config.mk
> > - removed CONFIG_CMD_AUTOSCRIPT from include/configs/guruplug.h
> > - removed word 'minimal' from comment in include/configs/guruplug.h
> >
> > MAINTAINERS | 4 +
> > MAKEALL | 1 +
> > Makefile | 3 +
> > board/Marvell/guruplug/Makefile | 51 +++++++++
> > board/Marvell/guruplug/config.mk | 27 +++++
> > board/Marvell/guruplug/guruplug.c | 167
> +++++++++++++++++++++++++++++
> > board/Marvell/guruplug/guruplug.h | 39 +++++++
> > board/Marvell/guruplug/kwbimage.cfg | 162
> ++++++++++++++++++++++++++++
> > include/configs/guruplug.h | 198
> +++++++++++++++++++++++++++++++++++
> > 9 files changed, 652 insertions(+), 0 deletions(-)
> > create mode 100644 board/Marvell/guruplug/Makefile
> > create mode 100644 board/Marvell/guruplug/config.mk
> > create mode 100644 board/Marvell/guruplug/guruplug.c
> > create mode 100644 board/Marvell/guruplug/guruplug.h
> > create mode 100644 board/Marvell/guruplug/kwbimage.cfg
> > create mode 100644 include/configs/guruplug.h
>
> Reviewed-by: Wolfgang Denk <wd@denx.de>
Applied to u-boot-marvell.git master branch
Regards..
Prafulla . .
^ permalink raw reply [flat|nested] 15+ messages in thread
end of thread, other threads:[~2010-04-06 11:26 UTC | newest]
Thread overview: 15+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2010-03-15 11:05 [U-Boot] [PATCH] Marvell GuruPlug Board Support Siddarth Gore
2010-03-15 12:13 ` Prafulla Wadaskar
2010-03-15 13:26 ` Siddarth Gore
2010-03-15 13:42 ` Siddarth Gore
2010-03-15 16:08 ` Wolfgang Denk
2010-03-17 7:01 ` Prafulla Wadaskar
2010-03-18 5:28 ` Siddarth Gore
2010-03-18 6:43 ` Prafulla Wadaskar
2010-03-18 8:38 ` Wolfgang Denk
2010-03-18 6:52 ` Siddarth Gore
2010-03-18 7:42 ` [U-Boot] [PATCH v2] " Siddarth Gore
2010-03-18 8:02 ` Prafulla Wadaskar
2010-03-21 19:45 ` Wolfgang Denk
2010-04-06 11:26 ` Prafulla Wadaskar
2010-03-15 16:11 ` [U-Boot] [PATCH] " Wolfgang Denk
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.