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* libertas: DAT1 signal IRQ in 1-bit SDIO mode
@ 2010-03-29 18:24 Daniel Mack
       [not found] ` <4BB0FE7A.6090709@embwise.com>
  0 siblings, 1 reply; 3+ messages in thread
From: Daniel Mack @ 2010-03-29 18:24 UTC (permalink / raw)
  To: libertas-dev; +Cc: linux-mmc

Hi,

I'm still fighting with a MX31 SDHC controller connected to a 8686
module via SDIO. As the libertas firmware uses multiblock transfers,
this can't work in 4bit SDIO mode due to a bug in the SDHC controller
of the MX31 silicon. This is now finally also confirmed by Freescale.

So the only way around this is to use 1-bit transfers. This appears to
work stable now as long as I don't let the host controller announce the
capability of serving SDIO IRQs (MMC_CAP_SDIO_IRQ). The IRQ flag is then
polled by the MMC core which is a performance drawback of course, but at
least it finally works.

However, I also implemented code for proper SDIO IRQ hardware handling
for this controller, but the hardware condition is never triggered. I
measured with an oscilloscope and found out the 8686 does not actually
drive the DAT1 line (which is used as IRQ in 1-bit SDIO mode) low when
it is supposed to do.

My question is - did anyone ever use the chip in this mode? Is that a
firmware bug?

Any pointers appreciated - I would like to post my pending patches for
that issue asap, but need to clear that last issue first.

Thanks,
Daniel


^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2010-03-30 17:50 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2010-03-29 18:24 libertas: DAT1 signal IRQ in 1-bit SDIO mode Daniel Mack
     [not found] ` <4BB0FE7A.6090709@embwise.com>
2010-03-30  9:05   ` Daniel Mack
2010-03-30 17:50   ` Daniel Mack

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