[Qemu-devel] [PATCH] target-arm: Handle 'smc' as an undefined instruction

[Qemu-devel] [PATCH] target-arm: Handle 'smc' as an undefined instruction

[Adam Lackorzynski]

Handle smc as an undefined instruction instead of having it wrongly
interpreted as some other one.

Signed-off-by: Adam Lackorzynski <adam@os.inf.tu-dresden.de>
---
 target-arm/translate.c |    7 ++++++-
 1 files changed, 6 insertions(+), 1 deletions(-)

diff --git a/target-arm/translate.c b/target-arm/translate.c
index 6fcdd7e..c1d55ed 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -6346,7 +6346,12 @@ static void disas_arm_insn(CPUState * env, DisasContext *s)
             dead_tmp(tmp2);
             store_reg(s, rd, tmp);
             break;
-        case 7: /* bkpt */
+        case 7:
+            /* SMC? */
+            if ((insn & 0xfffffff0) == 0xe1600070) {
+                goto illegal_op;
+            }
+            /* bkpt */
             gen_set_condexec(s);
             gen_set_pc_im(s->pc - 4);
             gen_exception(EXCP_BKPT);
-- 
1.7.1

Re: [Qemu-devel] [PATCH] target-arm: Handle 'smc' as an undefined instruction

[Peter Maydell]

On Thu, Sep 02, 2010 at 11:40:50PM +0200, Adam Lackorzynski wrote:
> +        case 7:
> +            /* SMC? */
> +            if ((insn & 0xfffffff0) == 0xe1600070) {
> +                goto illegal_op;
> +            }
> +            /* bkpt */

This doesn't look right to me. SMC in the ARM encoding is a standard
conditionalised instruction, so you shouldn't be mandating that the
cond field is 0xe.

I think the correct way to distinguish BKPT from SMC is to look at
bits [22..21] of the instruction: 01 for BKPT, 11 for SMC and
other combinations are UNDEFINED. This is in 'op1' at this point
in the code...

-- Peter Maydell

Re: [Qemu-devel] [PATCH] target-arm: Handle 'smc' as an undefined instruction

[Adam Lackorzynski]

On Thu Sep 02, 2010 at 23:14:23 +0100, Peter Maydell wrote:
> On Thu, Sep 02, 2010 at 11:40:50PM +0200, Adam Lackorzynski wrote:
> > +        case 7:
> > +            /* SMC? */
> > +            if ((insn & 0xfffffff0) == 0xe1600070) {
> > +                goto illegal_op;
> > +            }
> > +            /* bkpt */
> 
> This doesn't look right to me. SMC in the ARM encoding is a standard
> conditionalised instruction, so you shouldn't be mandating that the
> cond field is 0xe.

True.

> I think the correct way to distinguish BKPT from SMC is to look at
> bits [22..21] of the instruction: 01 for BKPT, 11 for SMC and
> other combinations are UNDEFINED. This is in 'op1' at this point
> in the code...

target-arm: Handle 'smc' as an undefined instruction

Refine check on bkpt so that smc is handled as an undefined instruction.

Signed-off-by: Adam Lackorzynski <adam@os.inf.tu-dresden.de>
---
 target-arm/translate.c |    6 +++++-
 1 files changed, 5 insertions(+), 1 deletions(-)

diff --git a/target-arm/translate.c b/target-arm/translate.c
index 6fcdd7e..fac4f5d 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -6346,7 +6346,11 @@ static void disas_arm_insn(CPUState * env, DisasContext *s)
             dead_tmp(tmp2);
             store_reg(s, rd, tmp);
             break;
-        case 7: /* bkpt */
+        case 7:
+            if (op1 != 1) {
+                goto illegal_op;
+            }
+            /* bkpt */
             gen_set_condexec(s);
             gen_set_pc_im(s->pc - 4);
             gen_exception(EXCP_BKPT);
-- 
1.7.1


Thanks,
Adam
-- 
Adam                 adam@os.inf.tu-dresden.de
  Lackorzynski         http://os.inf.tu-dresden.de/~adam/

Re: [Qemu-devel] [PATCH] target-arm: Handle 'smc' as an undefined instruction

[Peter Maydell]

On 4 November 2010 22:21, Adam Lackorzynski <adam@os.inf.tu-dresden.de> wrote:
>
> Refine check on bkpt so that smc and undefined instruction encodings are
> handled as an undefined instruction and trap.
>
> Signed-off-by: Adam Lackorzynski <adam@os.inf.tu-dresden.de>

This patch looks good to me. I note that there's actually an implementation
of SMC and at least some of the TrustZone extension in the qemu-meego
tree. However, for the moment this patch is correct: SMC should UNDEF on
cores without TrustZone (which is what current qemu effectively is).

Acked-by: Peter Maydell <peter.maydell@linaro.org>

-- PMM

[Qemu-devel] [PATCH] target-arm: Handle 'smc' as an undefined instruction

[Adam Lackorzynski]

Refine check on bkpt so that smc and undefined instruction encodings are
handled as an undefined instruction and trap.

Signed-off-by: Adam Lackorzynski <adam@os.inf.tu-dresden.de>
---
 target-arm/translate.c |    9 ++++++++-
 1 files changed, 8 insertions(+), 1 deletions(-)

diff --git a/target-arm/translate.c b/target-arm/translate.c
index 99464ab..c7283e3 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -6346,7 +6346,14 @@ static void disas_arm_insn(CPUState * env, DisasContext *s)
             dead_tmp(tmp2);
             store_reg(s, rd, tmp);
             break;
-        case 7: /* bkpt */
+        case 7:
+            /* SMC instruction (op1 == 3)
+               and undefined instructions (op1 == 0 || op1 == 2)
+               will trap */
+            if (op1 != 1) {
+                goto illegal_op;
+            }
+            /* bkpt */
             gen_set_condexec(s);
             gen_set_pc_im(s->pc - 4);
             gen_exception(EXCP_BKPT);
-- 
1.7.2.3


Adam
-- 
Adam                 adam@os.inf.tu-dresden.de
  Lackorzynski         http://os.inf.tu-dresden.de/~adam/

[Qemu-devel] [PATCH] target-arm: Handle 'smc' as an undefined instruction

[Adam Lackorzynski]

Refine check on bkpt so that smc and undefined instruction encodings are
handled as an undefined instruction and trap.

Signed-off-by: Adam Lackorzynski <adam@os.inf.tu-dresden.de>
---
 target-arm/translate.c |    9 ++++++++-
 1 files changed, 8 insertions(+), 1 deletions(-)

diff --git a/target-arm/translate.c b/target-arm/translate.c
index 6fcdd7e..9ac1f8b 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -6346,7 +6346,14 @@ static void disas_arm_insn(CPUState * env, DisasContext *s)
             dead_tmp(tmp2);
             store_reg(s, rd, tmp);
             break;
-        case 7: /* bkpt */
+        case 7:
+            /* SMC instruction (op1 == 3)
+               and undefined instructions (op1 == 0 || op1 == 2)
+               will trap */
+            if (op1 != 1) {
+                goto illegal_op;
+            }
+            /* bkpt */
             gen_set_condexec(s);
             gen_set_pc_im(s->pc - 4);
             gen_exception(EXCP_BKPT);
-- 
1.7.1


Adam
-- 
Adam                 adam@os.inf.tu-dresden.de
  Lackorzynski         http://os.inf.tu-dresden.de/~adam/

Re: [Qemu-devel] [PATCH] target-arm: Handle 'smc' as an undefined instruction

[Stefan Weil]

Am 02.09.2010 22:27, schrieb Adam Lackorzynski:
> Handle smc as an undefined instruction instead of having it wrongly
> interpreted as some other one.
>
> Signed-off-by: Adam Lackorzynski<adam@os.inf.tu-dresden.de>
> ---
>   target-arm/translate.c |    6 +++++-
>   1 files changed, 5 insertions(+), 1 deletions(-)
>
> diff --git a/target-arm/translate.c b/target-arm/translate.c
> index 6fcdd7e..9b5d650 100644
> --- a/target-arm/translate.c
> +++ b/target-arm/translate.c
> @@ -6346,7 +6346,11 @@ static void disas_arm_insn(CPUState * env, DisasContext *s)
>               dead_tmp(tmp2);
>               store_reg(s, rd, tmp);
>               break;
> -        case 7: /* bkpt */
> +        case 7:
> +            /* SMC? */
> +            if ((insn&  0xfffffff0) == 0xe1600070)
> +              goto illegal_op;
>    

QEMU's CODING_STYLE requires {} here.


> +            /* bkpt */
>               gen_set_condexec(s);
>               gen_set_pc_im(s->pc - 4);
>               gen_exception(EXCP_BKPT);
>    

[Qemu-devel] [PATCH] target-arm: Handle 'smc' as an undefined instruction

[Adam Lackorzynski]

Handle smc as an undefined instruction instead of having it wrongly
interpreted as some other one.

Signed-off-by: Adam Lackorzynski <adam@os.inf.tu-dresden.de>
---
 target-arm/translate.c |    6 +++++-
 1 files changed, 5 insertions(+), 1 deletions(-)

diff --git a/target-arm/translate.c b/target-arm/translate.c
index 6fcdd7e..9b5d650 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -6346,7 +6346,11 @@ static void disas_arm_insn(CPUState * env, DisasContext *s)
             dead_tmp(tmp2);
             store_reg(s, rd, tmp);
             break;
-        case 7: /* bkpt */
+        case 7:
+            /* SMC? */
+            if ((insn & 0xfffffff0) == 0xe1600070)
+              goto illegal_op;
+            /* bkpt */
             gen_set_condexec(s);
             gen_set_pc_im(s->pc - 4);
             gen_exception(EXCP_BKPT);
-- 
1.7.1

[Qemu-devel] [PATCH] target-arm: Handle 'smc' as an undefined instruction

[Adam Lackorzynski]

Handle smc as undefined instruction instead of having it wrongly interpreted
as some other instruction.

Signed-off-by: Adam Lackorzynski <adam@os.inf.tu-dresden.de>
---
 target-arm/translate.c |    6 +++++-
 1 files changed, 5 insertions(+), 1 deletions(-)

diff --git a/target-arm/translate.c b/target-arm/translate.c
index 0eccca5..afd6716 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -6344,7 +6344,11 @@ static void disas_arm_insn(CPUState * env, DisasContext *s)
             dead_tmp(tmp2);
             store_reg(s, rd, tmp);
             break;
-        case 7: /* bkpt */
+        case 7:
+            /* SMC? */
+            if ((insn & 0xfffffff0) == 0xe1600070)
+              goto illegal_op;
+            /* bkpt */
             gen_set_condexec(s);
             gen_set_pc_im(s->pc - 4);
             gen_exception(EXCP_BKPT);
-- 
1.7.1

[Qemu-devel] [PATCH] target-arm: Handle 'smc' as an undefined instruction

[Adam Lackorzynski]

Signed-off-by: Adam Lackorzynski <adam@os.inf.tu-dresden.de>
---
 target-arm/translate.c |    6 +++++-
 1 files changed, 5 insertions(+), 1 deletions(-)

diff --git a/target-arm/translate.c b/target-arm/translate.c
index 0eccca5..afd6716 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -6344,7 +6344,11 @@ static void disas_arm_insn(CPUState * env, DisasContext *s)
             dead_tmp(tmp2);
             store_reg(s, rd, tmp);
             break;
-        case 7: /* bkpt */
+        case 7:
+            /* SMC? */
+            if ((insn & 0xfffffff0) == 0xe1600070)
+              goto illegal_op;
+            /* bkpt */
             gen_set_condexec(s);
             gen_set_pc_im(s->pc - 4);
             gen_exception(EXCP_BKPT);
-- 
1.7.1


Adam
-- 
Adam                 adam@os.inf.tu-dresden.de
  Lackorzynski         http://os.inf.tu-dresden.de/~adam/