[PATCH v3 0/4] Enabling patches of 2 early consoles for Intel MID platforms

[PATCH v3 0/4] Enabling patches of 2 early consoles for Intel MID platforms

[Feng Tang]

Hi all,

This serie mainly enables 2 early consoles named mrst and hsu for
Intel MID platforms. please help to review, thanks,

- Feng

Changelog:
	v3:
	     * Fix a warning for mrst.h
	     * Add 2 helper funcs for fixed address mapping as
	       suggested by Ingo
	     * Rename the mrst_earlyprintk.c to early_printk_mrst.c
	     * Clean the code and fix typoes upon Ingo's comments
	v2:
	     * Code clean as suggested by Ingo 
----------------------------------------------------------------

Feng Tang (4):
  x86, mrst: make mrst_identify_cpu() inlne inside mrst.h
  x86: add two helper macros for fixed address mapping
  x86, earlyprintk: add earlyprintk for Intel Moorestown platform
  x86, earlyprintk: add hsu early console for Intel Medfield platform

 arch/x86/Kconfig.debug              |    4 +
 arch/x86/include/asm/fixmap.h       |   15 ++
 arch/x86/include/asm/mrst.h         |   10 +-
 arch/x86/kernel/Makefile            |    1 +
 arch/x86/kernel/early_printk.c      |   13 ++
 arch/x86/kernel/early_printk_mrst.c |  319 +++++++++++++++++++++++++++++++++++
 6 files changed, 361 insertions(+), 1 deletions(-)
 mode change 100644 => 100755 arch/x86/include/asm/fixmap.h
 create mode 100644 arch/x86/kernel/early_printk_mrst.c

[PATCH v3 1/4] x86, mrst: make mrst_identify_cpu() inlne inside mrst.h

[Feng Tang]

Otherwise there will be some compilation warning for those .c
files which include mrst.h

Signed-off-by: Feng Tang <feng.tang@intel.com>
Cc: x86@kernel.org
---
 arch/x86/include/asm/mrst.h |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/arch/x86/include/asm/mrst.h b/arch/x86/include/asm/mrst.h
index 1635074..33fc296 100644
--- a/arch/x86/include/asm/mrst.h
+++ b/arch/x86/include/asm/mrst.h
@@ -26,7 +26,7 @@ enum mrst_cpu_type {
 };
 
 extern enum mrst_cpu_type __mrst_cpu_chip;
-static enum mrst_cpu_type mrst_identify_cpu(void)
+static inline enum mrst_cpu_type mrst_identify_cpu(void)
 {
 	return __mrst_cpu_chip;
 }
-- 
1.7.0.4

[PATCH v3 2/4] x86: add two helper macros for fixed address mapping

[Feng Tang]

Sometimes fixmap will be used to map an physical address which
is not PAGE align, so to use it we need first map it and then
add the address offset to the mapped fixed address. These 2 new
helpers are suggested by Ingo Molnar to make the process simpler.

For a physicall address like "phys", a directly usable virtual
address can be get by
	virt = (void *)set_fixmap_offset(fixed_idx, phys);
or
	virt = (void *)set_fixmap_offset_nocache(fixed_idx, phys);
(depends on whether the physical address is cachable or not).

Signed-off-by: Feng Tang <feng.tang@intel.com>
Cc: x86@kernel.org
---
 arch/x86/include/asm/fixmap.h |   15 +++++++++++++++
 1 files changed, 15 insertions(+), 0 deletions(-)
 mode change 100644 => 100755 arch/x86/include/asm/fixmap.h

diff --git a/arch/x86/include/asm/fixmap.h b/arch/x86/include/asm/fixmap.h
old mode 100644
new mode 100755
index d07b44f..4d293dc
--- a/arch/x86/include/asm/fixmap.h
+++ b/arch/x86/include/asm/fixmap.h
@@ -214,5 +214,20 @@ static inline unsigned long virt_to_fix(const unsigned long vaddr)
 	BUG_ON(vaddr >= FIXADDR_TOP || vaddr < FIXADDR_START);
 	return __virt_to_fix(vaddr);
 }
+
+/* Return an pointer with offset calculated */
+static inline unsigned long __set_fixmap_offset(enum fixed_addresses idx,
+				phys_addr_t phys, pgprot_t flags)
+{
+	__set_fixmap(idx, phys, flags);
+	return fix_to_virt(idx) + (phys & (PAGE_SIZE - 1));
+}
+
+#define set_fixmap_offset(idx, phys)			\
+	__set_fixmap_offset(idx, phys, PAGE_KERNEL)
+
+#define set_fixmap_offset_nocache(idx, phys)			\
+	__set_fixmap_offset(idx, phys, PAGE_KERNEL_NOCACHE)
+
 #endif /* !__ASSEMBLY__ */
 #endif /* _ASM_X86_FIXMAP_H */
-- 
1.7.0.4

[PATCH v3 3/4] x86, earlyprintk: add earlyprintk for Intel Moorestown platform

[Feng Tang]

Intel Moorestown platform has a spi-uart device(Maxim3110), which
connects to a Designware spi core controller. This patch will add
early console function based on it.

As it will be used long before Linux spi subsystem get initialised,
we simply directly manipulate the spi controller's register to
acheive the early console func. This is safe as it will be disabled
when devices subsytem get initialised.

To use it, user need enable CONFIG_X86_MRST_EARLY_PRINTK in kenrel
config and add "earlyprintk=mrst" in kernel command line.

Signed-off-by: Feng Tang <feng.tang@intel.com>
Cc: x86 maintainers <x86@kernel.org>
Signed-off-by: Alan Cox <alan@linux.intel.com>
---
 arch/x86/Kconfig.debug              |    4 +
 arch/x86/include/asm/mrst.h         |    5 +
 arch/x86/kernel/Makefile            |    1 +
 arch/x86/kernel/early_printk.c      |    7 +
 arch/x86/kernel/early_printk_mrst.c |  232 +++++++++++++++++++++++++++++++++++
 5 files changed, 249 insertions(+), 0 deletions(-)
 create mode 100644 arch/x86/kernel/early_printk_mrst.c

diff --git a/arch/x86/Kconfig.debug b/arch/x86/Kconfig.debug
index 7508508..e5bb96b 100644
--- a/arch/x86/Kconfig.debug
+++ b/arch/x86/Kconfig.debug
@@ -43,6 +43,10 @@ config EARLY_PRINTK
 	  with klogd/syslogd or the X server. You should normally N here,
 	  unless you want to debug such a crash.
 
+config EARLY_PRINTK_MRST
+	bool "Early printk for MRST platform support"
+	depends on EARLY_PRINTK && X86_MRST
+
 config EARLY_PRINTK_DBGP
 	bool "Early printk via EHCI debug port"
 	depends on EARLY_PRINTK && PCI
diff --git a/arch/x86/include/asm/mrst.h b/arch/x86/include/asm/mrst.h
index 33fc296..d0ea5bc 100644
--- a/arch/x86/include/asm/mrst.h
+++ b/arch/x86/include/asm/mrst.h
@@ -10,6 +10,9 @@
  */
 #ifndef _ASM_X86_MRST_H
 #define _ASM_X86_MRST_H
+
+#include <linux/sfi.h>
+
 extern int pci_mrst_init(void);
 int __init sfi_parse_mrtc(struct sfi_table_header *table);
 
@@ -42,4 +45,6 @@ extern enum mrst_timer_options mrst_timer_options;
 #define SFI_MTMR_MAX_NUM 8
 #define SFI_MRTC_MAX	8
 
+extern struct console early_mrst_console;
+extern void mrst_early_console_init(void);
 #endif /* _ASM_X86_MRST_H */
diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile
index 0925676..4024754 100644
--- a/arch/x86/kernel/Makefile
+++ b/arch/x86/kernel/Makefile
@@ -83,6 +83,7 @@ obj-$(CONFIG_DOUBLEFAULT) 	+= doublefault_32.o
 obj-$(CONFIG_KGDB)		+= kgdb.o
 obj-$(CONFIG_VM86)		+= vm86_32.o
 obj-$(CONFIG_EARLY_PRINTK)	+= early_printk.o
+obj-$(CONFIG_EARLY_PRINTK_MRST)	+= early_printk_mrst.o
 
 obj-$(CONFIG_HPET_TIMER) 	+= hpet.o
 obj-$(CONFIG_APB_TIMER)		+= apb_timer.o
diff --git a/arch/x86/kernel/early_printk.c b/arch/x86/kernel/early_printk.c
index fa99bae..6082463 100644
--- a/arch/x86/kernel/early_printk.c
+++ b/arch/x86/kernel/early_printk.c
@@ -14,6 +14,7 @@
 #include <xen/hvc-console.h>
 #include <asm/pci-direct.h>
 #include <asm/fixmap.h>
+#include <asm/mrst.h>
 #include <asm/pgtable.h>
 #include <linux/usb/ehci_def.h>
 
@@ -239,6 +240,12 @@ static int __init setup_early_printk(char *buf)
 		if (!strncmp(buf, "xen", 3))
 			early_console_register(&xenboot_console, keep);
 #endif
+#ifdef CONFIG_X86_MRST_EARLY_PRINTK
+		if (!strncmp(buf, "mrst", 4)) {
+			mrst_early_console_init();
+			early_console_register(&early_mrst_console, keep);
+		}
+#endif
 		buf++;
 	}
 	return 0;
diff --git a/arch/x86/kernel/early_printk_mrst.c b/arch/x86/kernel/early_printk_mrst.c
new file mode 100644
index 0000000..05d27e1
--- /dev/null
+++ b/arch/x86/kernel/early_printk_mrst.c
@@ -0,0 +1,232 @@
+/*
+ * early_printk_mrst.c - spi-uart early printk for Intel Moorestown platform
+ *
+ * Copyright (c) 2008-2010, Intel Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; version 2
+ * of the License.
+ */
+
+#include <linux/kmsg_dump.h>
+#include <linux/console.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/io.h>
+
+#include <asm/fixmap.h>
+#include <asm/pgtable.h>
+#include <asm/mrst.h>
+
+#define MRST_SPI_TIMEOUT		0x200000
+#define MRST_REGBASE_SPI0		0xff128000
+#define MRST_REGBASE_SPI1		0xff128400
+#define MRST_CLK_SPI0_REG		0xff11d86c
+
+/* Bit fields in CTRLR0 */
+#define SPI_DFS_OFFSET			0
+
+#define SPI_FRF_OFFSET			4
+#define SPI_FRF_SPI			0x0
+#define SPI_FRF_SSP			0x1
+#define SPI_FRF_MICROWIRE		0x2
+#define SPI_FRF_RESV			0x3
+
+#define SPI_MODE_OFFSET			6
+#define SPI_SCPH_OFFSET			6
+#define SPI_SCOL_OFFSET			7
+#define SPI_TMOD_OFFSET			8
+#define	SPI_TMOD_TR			0x0		/* xmit & recv */
+#define SPI_TMOD_TO			0x1		/* xmit only */
+#define SPI_TMOD_RO			0x2		/* recv only */
+#define SPI_TMOD_EPROMREAD		0x3		/* eeprom read mode */
+
+#define SPI_SLVOE_OFFSET		10
+#define SPI_SRL_OFFSET			11
+#define SPI_CFS_OFFSET			12
+
+/* Bit fields in SR, 7 bits */
+#define SR_MASK				0x7f		/* cover 7 bits */
+#define SR_BUSY				(1 << 0)
+#define SR_TF_NOT_FULL			(1 << 1)
+#define SR_TF_EMPT			(1 << 2)
+#define SR_RF_NOT_EMPT			(1 << 3)
+#define SR_RF_FULL			(1 << 4)
+#define SR_TX_ERR			(1 << 5)
+#define SR_DCOL				(1 << 6)
+
+struct dw_spi_reg {
+	u32	ctrl0;
+	u32	ctrl1;
+	u32	ssienr;
+	u32	mwcr;
+	u32	ser;
+	u32	baudr;
+	u32	txfltr;
+	u32	rxfltr;
+	u32	txflr;
+	u32	rxflr;
+	u32	sr;
+	u32	imr;
+	u32	isr;
+	u32	risr;
+	u32	txoicr;
+	u32	rxoicr;
+	u32	rxuicr;
+	u32	msticr;
+	u32	icr;
+	u32	dmacr;
+	u32	dmatdlr;
+	u32	dmardlr;
+	u32	idr;
+	u32	version;
+
+	/* Currently operates as 32 bits, though only the low 16 bits matter */
+	u32	dr;
+} __packed;
+
+#define dw_readl(dw, name)		__raw_readl(&(dw)->name)
+#define dw_writel(dw, name, val)	__raw_writel((val), &(dw)->name)
+
+/* Default use SPI0 register for mrst, we will detect Penwell and use SPI1 */
+static unsigned long mrst_spi_paddr = MRST_REGBASE_SPI0;
+
+static u32 *pclk_spi0;
+/* Always contains an accessable address, start with 0 */
+static struct dw_spi_reg *pspi;
+
+static struct kmsg_dumper dw_dumper;
+static int dumper_registered;
+
+static void dw_kmsg_dump(struct kmsg_dumper *dumper,
+			enum kmsg_dump_reason reason,
+			const char *s1, unsigned long l1,
+			const char *s2, unsigned long l2)
+{
+	int i;
+
+	/* When run to this, we'd better re-init the HW */
+	mrst_early_console_init();
+
+	for (i = 0; i < l1; i++)
+		early_mrst_console.write(&early_mrst_console, s1 + i, 1);
+	for (i = 0; i < l2; i++)
+		early_mrst_console.write(&early_mrst_console, s2 + i, 1);
+}
+
+/* Set the ratio rate to 115200, 8n1, IRQ disabled */
+static void max3110_write_config(void)
+{
+	u16 config;
+
+	config = 0xc001;
+	dw_writel(pspi, dr, config);
+}
+
+/* Translate char to a eligible word and send to max3110 */
+static void max3110_write_data(char c)
+{
+	u16 data;
+
+	data = 0x8000 | c;
+	dw_writel(pspi, dr, data);
+}
+
+void mrst_early_console_init(void)
+{
+	u32 ctrlr0 = 0;
+	u32 spi0_cdiv;
+	u32 freq; /* Freqency info only need be searched once */
+
+	/* Base clk is 100 MHz, the actual clk = 100M / (clk_divider + 1) */
+	pclk_spi0 = (void *)set_fixmap_offset_nocache(FIX_EARLYCON_MEM_BASE,
+							MRST_CLK_SPI0_REG);
+	spi0_cdiv = ((*pclk_spi0) & 0xe00) >> 9;
+	freq = 100000000 / (spi0_cdiv + 1);
+
+	if (mrst_identify_cpu() == MRST_CPU_CHIP_PENWELL)
+		mrst_spi_paddr = MRST_REGBASE_SPI1;
+
+	pspi = (void *)set_fixmap_offset_nocache(FIX_EARLYCON_MEM_BASE,
+						mrst_spi_paddr);
+
+	/* Disable SPI controller */
+	dw_writel(pspi, ssienr, 0);
+
+	/* Set control param, 8 bits, transmit only mode */
+	ctrlr0 = dw_readl(pspi, ctrl0);
+
+	ctrlr0 &= 0xfcc0;
+	ctrlr0 |= 0xf | (SPI_FRF_SPI << SPI_FRF_OFFSET)
+		      | (SPI_TMOD_TO << SPI_TMOD_OFFSET);
+	dw_writel(pspi, ctrl0, ctrlr0);
+
+	/*
+	 * Change the spi0 clk to comply with 115200 bps, use 100000 to
+	 * calculate the clk dividor to make the clock a little slower
+	 * than real baud rate.
+	 */
+	dw_writel(pspi, baudr, freq/100000);
+
+	/* Disable all INT for early phase */
+	dw_writel(pspi, imr, 0x0);
+
+	/* Set the cs to spi-uart */
+	dw_writel(pspi, ser, 0x2);
+
+	/* Enable the HW, the last step for HW init */
+	dw_writel(pspi, ssienr, 0x1);
+
+	/* Set the default configuration */
+	max3110_write_config();
+
+	/* Register the kmsg dumper */
+	if (!dumper_registered) {
+		dw_dumper.dump = dw_kmsg_dump;
+		kmsg_dump_register(&dw_dumper);
+		dumper_registered = 1;
+	}
+}
+
+/* Slave select should be called in the read/write function */
+static void early_mrst_spi_putc(char c)
+{
+	unsigned int timeout;
+	u32 sr;
+
+	timeout = MRST_SPI_TIMEOUT;
+	/* Early putc needs to make sure the TX FIFO is not full */
+	while (--timeout) {
+		sr = dw_readl(pspi, sr);
+		if (!(sr & SR_TF_NOT_FULL))
+			cpu_relax();
+		else
+			break;
+	}
+
+	if (!timeout)
+		pr_warning("MRST earlycon: timed out\n");
+	else
+		max3110_write_data(c);
+}
+
+/* Early SPI only uses polling mode */
+static void early_mrst_spi_write(struct console *con, const char *str, unsigned n)
+{
+	int i;
+
+	for (i = 0; i < n && *str; i++) {
+		if (*str == '\n')
+			early_mrst_spi_putc('\r');
+		early_mrst_spi_putc(*str);
+		str++;
+	}
+}
+
+struct console early_mrst_console = {
+	.name =		"earlymrst",
+	.write =	early_mrst_spi_write,
+	.flags =	CON_PRINTBUFFER,
+	.index =	-1,
+};
-- 
1.7.0.4

[PATCH v3 4/4] x86, earlyprintk: add hsu early console for Intel Medfield platform

[Feng Tang]

Intel Medfield platform has a high speed UART device, which could act
as a early console. To enable early printk of HSU console, simply add
"earlyprintk=hsu" in kernel command line.

Currently we put the code in the early_printk_mrst.c as it is also for
Intel MID platforms like the mrst early console

Signed-off-by: Feng Tang <feng.tang@intel.com>
Cc: x86 maintainers <x86@kernel.org>
Signed-off-by: Alan Cox <alan@linux.intel.com>
---
 arch/x86/include/asm/mrst.h         |    3 +
 arch/x86/kernel/early_printk.c      |    6 ++
 arch/x86/kernel/early_printk_mrst.c |   89 ++++++++++++++++++++++++++++++++++-
 3 files changed, 97 insertions(+), 1 deletions(-)

diff --git a/arch/x86/include/asm/mrst.h b/arch/x86/include/asm/mrst.h
index d0ea5bc..4a711a6 100644
--- a/arch/x86/include/asm/mrst.h
+++ b/arch/x86/include/asm/mrst.h
@@ -47,4 +47,7 @@ extern enum mrst_timer_options mrst_timer_options;
 
 extern struct console early_mrst_console;
 extern void mrst_early_console_init(void);
+
+extern struct console early_hsu_console;
+extern void hsu_early_console_init(void);
 #endif /* _ASM_X86_MRST_H */
diff --git a/arch/x86/kernel/early_printk.c b/arch/x86/kernel/early_printk.c
index 6082463..4572f25 100644
--- a/arch/x86/kernel/early_printk.c
+++ b/arch/x86/kernel/early_printk.c
@@ -245,6 +245,12 @@ static int __init setup_early_printk(char *buf)
 			mrst_early_console_init();
 			early_console_register(&early_mrst_console, keep);
 		}
+
+		if (!strncmp(buf, "hsu", 3)) {
+			hsu_early_console_init();
+			early_console_register(&early_hsu_console, keep);
+		}
+
 #endif
 		buf++;
 	}
diff --git a/arch/x86/kernel/early_printk_mrst.c b/arch/x86/kernel/early_printk_mrst.c
index 05d27e1..65df603 100644
--- a/arch/x86/kernel/early_printk_mrst.c
+++ b/arch/x86/kernel/early_printk_mrst.c
@@ -1,5 +1,5 @@
 /*
- * early_printk_mrst.c - spi-uart early printk for Intel Moorestown platform
+ * early_printk_mrst.c - early consoles for Intel MID platforms
  *
  * Copyright (c) 2008-2010, Intel Corporation
  *
@@ -9,9 +9,19 @@
  * of the License.
  */
 
+/*
+ * This file implements two early consoles named mrst and hsu.
+ * mrst is based on Maxim3110 spi-uart device, it exists in both
+ * Moorestown and Medfield platforms, while hsu is based on a High
+ * Speed UART device which only exists in the Medfield platform
+ */
+
+#include <linux/serial_reg.h>
+#include <linux/serial_mfd.h>
 #include <linux/kmsg_dump.h>
 #include <linux/console.h>
 #include <linux/kernel.h>
+#include <linux/delay.h>
 #include <linux/init.h>
 #include <linux/io.h>
 
@@ -230,3 +240,80 @@ struct console early_mrst_console = {
 	.flags =	CON_PRINTBUFFER,
 	.index =	-1,
 };
+
+/*
+ * Following is the early console based on Medfield HSU (High
+ * Speed UART) device.
+ */
+#define HSU_PORT2_PADDR		0xffa28180
+
+static void __iomem *phsu;
+
+void hsu_early_console_init(void)
+{
+	u8 lcr;
+
+	phsu = (void *)set_fixmap_offset_nocache(FIX_EARLYCON_MEM_BASE,
+							HSU_PORT2_PADDR);
+
+	/* Disable FIFO */
+	writeb(0x0, phsu + UART_FCR);
+
+	/* Set to default 115200 bps, 8n1 */
+	lcr = readb(phsu + UART_LCR);
+	writeb((0x80 | lcr), phsu + UART_LCR);
+	writeb(0x18, phsu + UART_DLL);
+	writeb(lcr,  phsu + UART_LCR);
+	writel(0x3600, phsu + UART_MUL*4);
+
+	writeb(0x8, phsu + UART_MCR);
+	writeb(0x7, phsu + UART_FCR);
+	writeb(0x3, phsu + UART_LCR);
+
+	/* Clear IRQ status */
+	readb(phsu + UART_LSR);
+	readb(phsu + UART_RX);
+	readb(phsu + UART_IIR);
+	readb(phsu + UART_MSR);
+
+	/* Enable FIFO */
+	writeb(0x7, phsu + UART_FCR);
+}
+
+#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
+
+static void early_hsu_putc(char ch)
+{
+	unsigned int timeout = 10000; /* 10ms */
+	u8 status;
+
+	while (--timeout) {
+		status = readb(phsu + UART_LSR);
+		if (status & BOTH_EMPTY)
+			break;
+		udelay(1);
+	}
+
+	/* Only write the char when there was no timeout */
+	if (timeout)
+		writeb(ch, phsu + UART_TX);
+}
+
+static void early_hsu_write(struct console *con, const char *str, unsigned n)
+{
+	int i;
+
+	for (i = 0; i < n && *str; i++) {
+		if (*str == '\n')
+			early_hsu_putc('\r');
+		early_hsu_putc(*str);
+		str++;
+	}
+}
+
+struct console early_hsu_console = {
+	.name =		"earlyhsu",
+	.write =	early_hsu_write,
+	.flags =	CON_PRINTBUFFER,
+	.index =	-1,
+};
-- 
1.7.0.4

Re: [PATCH v3 0/4] Enabling patches of 2 early consoles for Intel MID platforms

[Ingo Molnar]

* Feng Tang <feng.tang@intel.com> wrote:

> Hi all,
> 
> This serie mainly enables 2 early consoles named mrst and hsu for
> Intel MID platforms. please help to review, thanks,
> 
> - Feng
> 
> Changelog:
> 	v3:
> 	     * Fix a warning for mrst.h
> 	     * Add 2 helper funcs for fixed address mapping as
> 	       suggested by Ingo
> 	     * Rename the mrst_earlyprintk.c to early_printk_mrst.c
> 	     * Clean the code and fix typoes upon Ingo's comments
> 	v2:
> 	     * Code clean as suggested by Ingo 

Thanks, this series looks really good!

> Feng Tang (4):
>   x86, mrst: make mrst_identify_cpu() inlne inside mrst.h
>   x86: add two helper macros for fixed address mapping
>   x86, earlyprintk: add earlyprintk for Intel Moorestown platform
>   x86, earlyprintk: add hsu early console for Intel Medfield platform
> 
>  arch/x86/Kconfig.debug              |    4 +
>  arch/x86/include/asm/fixmap.h       |   15 ++
>  arch/x86/include/asm/mrst.h         |   10 +-
>  arch/x86/kernel/Makefile            |    1 +
>  arch/x86/kernel/early_printk.c      |   13 ++
>  arch/x86/kernel/early_printk_mrst.c |  319 +++++++++++++++++++++++++++++++++++
>  6 files changed, 361 insertions(+), 1 deletions(-)
>  mode change 100644 => 100755 arch/x86/include/asm/fixmap.h
>  create mode 100644 arch/x86/kernel/early_printk_mrst.c

Wrt. integration: i'd prefer to carry these four patches in the 
tip:x86/early-printk tree (to be merged into v2.6.37), because
there's some interaction with other x86 bits.

AFAICS the two serial patches:

 [PATCH 1/2] serial: mrst_max3110: some code cleanup
 [PATCH 2/2] mrst_max3110: Make the IRQ option runtime

Are structurally independent from the earlyprintk patches and could be 
carried separately in the serial tree.

Alan, Greg, what's your preference?

Thanks,

	Ingo

Re: [PATCH v3 0/4] Enabling patches of 2 early consoles for Intel MID platforms

[Greg KH]

On Mon, Sep 13, 2010 at 10:40:45AM +0200, Ingo Molnar wrote:
> 
> * Feng Tang <feng.tang@intel.com> wrote:
> 
> > Hi all,
> > 
> > This serie mainly enables 2 early consoles named mrst and hsu for
> > Intel MID platforms. please help to review, thanks,
> > 
> > - Feng
> > 
> > Changelog:
> > 	v3:
> > 	     * Fix a warning for mrst.h
> > 	     * Add 2 helper funcs for fixed address mapping as
> > 	       suggested by Ingo
> > 	     * Rename the mrst_earlyprintk.c to early_printk_mrst.c
> > 	     * Clean the code and fix typoes upon Ingo's comments
> > 	v2:
> > 	     * Code clean as suggested by Ingo 
> 
> Thanks, this series looks really good!
> 
> > Feng Tang (4):
> >   x86, mrst: make mrst_identify_cpu() inlne inside mrst.h
> >   x86: add two helper macros for fixed address mapping
> >   x86, earlyprintk: add earlyprintk for Intel Moorestown platform
> >   x86, earlyprintk: add hsu early console for Intel Medfield platform
> > 
> >  arch/x86/Kconfig.debug              |    4 +
> >  arch/x86/include/asm/fixmap.h       |   15 ++
> >  arch/x86/include/asm/mrst.h         |   10 +-
> >  arch/x86/kernel/Makefile            |    1 +
> >  arch/x86/kernel/early_printk.c      |   13 ++
> >  arch/x86/kernel/early_printk_mrst.c |  319 +++++++++++++++++++++++++++++++++++
> >  6 files changed, 361 insertions(+), 1 deletions(-)
> >  mode change 100644 => 100755 arch/x86/include/asm/fixmap.h
> >  create mode 100644 arch/x86/kernel/early_printk_mrst.c
> 
> Wrt. integration: i'd prefer to carry these four patches in the 
> tip:x86/early-printk tree (to be merged into v2.6.37), because
> there's some interaction with other x86 bits.

No objection from me.

> AFAICS the two serial patches:
> 
>  [PATCH 1/2] serial: mrst_max3110: some code cleanup
>  [PATCH 2/2] mrst_max3110: Make the IRQ option runtime
> 
> Are structurally independent from the earlyprintk patches and could be 
> carried separately in the serial tree.
> 
> Alan, Greg, what's your preference?

I can carry these in the tty tree fine.  They don't depend on the x86
patches, right?

thanks,

greg k-h

Re: [PATCH v3 0/4] Enabling patches of 2 early consoles for Intel MID platforms

[Ingo Molnar]

* Greg KH <greg@kroah.com> wrote:

> On Mon, Sep 13, 2010 at 10:40:45AM +0200, Ingo Molnar wrote:
> > 
> > * Feng Tang <feng.tang@intel.com> wrote:
> > 
> > > Hi all,
> > > 
> > > This serie mainly enables 2 early consoles named mrst and hsu for
> > > Intel MID platforms. please help to review, thanks,
> > > 
> > > - Feng
> > > 
> > > Changelog:
> > > 	v3:
> > > 	     * Fix a warning for mrst.h
> > > 	     * Add 2 helper funcs for fixed address mapping as
> > > 	       suggested by Ingo
> > > 	     * Rename the mrst_earlyprintk.c to early_printk_mrst.c
> > > 	     * Clean the code and fix typoes upon Ingo's comments
> > > 	v2:
> > > 	     * Code clean as suggested by Ingo 
> > 
> > Thanks, this series looks really good!
> > 
> > > Feng Tang (4):
> > >   x86, mrst: make mrst_identify_cpu() inlne inside mrst.h
> > >   x86: add two helper macros for fixed address mapping
> > >   x86, earlyprintk: add earlyprintk for Intel Moorestown platform
> > >   x86, earlyprintk: add hsu early console for Intel Medfield platform
> > > 
> > >  arch/x86/Kconfig.debug              |    4 +
> > >  arch/x86/include/asm/fixmap.h       |   15 ++
> > >  arch/x86/include/asm/mrst.h         |   10 +-
> > >  arch/x86/kernel/Makefile            |    1 +
> > >  arch/x86/kernel/early_printk.c      |   13 ++
> > >  arch/x86/kernel/early_printk_mrst.c |  319 +++++++++++++++++++++++++++++++++++
> > >  6 files changed, 361 insertions(+), 1 deletions(-)
> > >  mode change 100644 => 100755 arch/x86/include/asm/fixmap.h
> > >  create mode 100644 arch/x86/kernel/early_printk_mrst.c
> > 
> > Wrt. integration: i'd prefer to carry these four patches in the 
> > tip:x86/early-printk tree (to be merged into v2.6.37), because
> > there's some interaction with other x86 bits.
> 
> No objection from me.
> 
> > AFAICS the two serial patches:
> > 
> >  [PATCH 1/2] serial: mrst_max3110: some code cleanup
> >  [PATCH 2/2] mrst_max3110: Make the IRQ option runtime
> > 
> > Are structurally independent from the earlyprintk patches and could be 
> > carried separately in the serial tree.
> > 
> > Alan, Greg, what's your preference?
> 
> I can carry these in the tty tree fine.  They don't depend on the x86 
> patches, right?

Yeah, as far as i've checked they dont. (havent actually tested that 
tho)

Thanks,

	Ingo

Re: [PATCH v3 1/4] x86, mrst: make mrst_identify_cpu() inlne inside mrst.h

[Alan Cox]

On Mon, 13 Sep 2010 15:08:53 +0800
Feng Tang <feng.tang@intel.com> wrote:

> Otherwise there will be some compilation warning for those .c
> files which include mrst.h

I've sent this to Ingo four or five times already and been ignored.

Re: [PATCH v3 1/4] x86, mrst: make mrst_identify_cpu() inlne inside mrst.h

[Ingo Molnar]

* Alan Cox <alan@linux.intel.com> wrote:

> On Mon, 13 Sep 2010 15:08:53 +0800
> Feng Tang <feng.tang@intel.com> wrote:
> 
> > Otherwise there will be some compilation warning for those .c files 
> > which include mrst.h
> 
> I've sent this to Ingo four or five times already and been ignored.

I did a search of my mbox for all mails containing 'mrst_identify_cpu', 
and the one by Feng Tang sent yesterday is the only one - none from you. 
Searched the spam folder and the separate lkml folder too.

So where are those 4-5 emails, got any link perhaps?

Thanks,

	Ingo

Re: [PATCH v3 1/4] x86, mrst: make mrst_identify_cpu() inlne inside mrst.h

[Alan Cox]

On Tue, 14 Sep 2010 19:57:26 +0200
Ingo Molnar <mingo@elte.hu> wrote:

> 
> * Alan Cox <alan@linux.intel.com> wrote:
> 
> > On Mon, 13 Sep 2010 15:08:53 +0800
> > Feng Tang <feng.tang@intel.com> wrote:
> > 
> > > Otherwise there will be some compilation warning for those .c files 
> > > which include mrst.h
> > 
> > I've sent this to Ingo four or five times already and been ignored.
> 
> I did a search of my mbox for all mails containing 'mrst_identify_cpu', 
> and the one by Feng Tang sent yesterday is the only one - none from you. 
> Searched the spam folder and the separate lkml folder too.
> 
> So where are those 4-5 emails, got any link perhaps?

They went to your address and my logs show they hit Intel internally but
I can't really see beyond that - I've mailed you directly a different
email to try and work out where they vanished so if you see this and no
direct mail then that would explain much. If you see both but didn't see
the mail recently about SFI device creation from me then it's specific to
the stgit setup sent emails.

Alan

Re: [PATCH v3 1/4] x86, mrst: make mrst_identify_cpu() inlne inside mrst.h

[Ingo Molnar]

* Alan Cox <alan@lxorguk.ukuu.org.uk> wrote:

> On Tue, 14 Sep 2010 19:57:26 +0200
> Ingo Molnar <mingo@elte.hu> wrote:
> 
> > 
> > * Alan Cox <alan@linux.intel.com> wrote:
> > 
> > > On Mon, 13 Sep 2010 15:08:53 +0800
> > > Feng Tang <feng.tang@intel.com> wrote:
> > > 
> > > > Otherwise there will be some compilation warning for those .c files 
> > > > which include mrst.h
> > > 
> > > I've sent this to Ingo four or five times already and been ignored.
> > 
> > I did a search of my mbox for all mails containing 
> > 'mrst_identify_cpu', and the one by Feng Tang sent yesterday is the 
> > only one - none from you. Searched the spam folder and the separate 
> > lkml folder too.
> > 
> > So where are those 4-5 emails, got any link perhaps?
> 
> They went to your address and my logs show they hit Intel internally 
> but I can't really see beyond that - I've mailed you directly a 
> different email to try and work out where they vanished so if you see 
> this and no direct mail then that would explain much. If you see both 
> but didn't see the mail recently about SFI device creation from me 
> then it's specific to the stgit setup sent emails.

I think there must be an email problem somewhere. I did get the:

  [RFC PATCH] x86/mrst: add SFI platform device parsing code

mail and the earlyprintk mails - but before that the only patch i got 
from you was:

  [PATCH] IPC driver for Intel Mobile Internet Device (MID) platforms

back in April ... i.e. nothing for many months.

Thanks,

	Ingo

Re: [PATCH v3 4/4] x86, earlyprintk: add hsu early console for Intel Medfield platform

[Konrad Rzeszutek Wilk]

On Mon, Sep 13, 2010 at 03:08:56PM +0800, Feng Tang wrote:
> Intel Medfield platform has a high speed UART device, which could act
> as a early console. To enable early printk of HSU console, simply add
> "earlyprintk=hsu" in kernel command line.
> 
> Currently we put the code in the early_printk_mrst.c as it is also for
> Intel MID platforms like the mrst early console
> 
> Signed-off-by: Feng Tang <feng.tang@intel.com>
> Cc: x86 maintainers <x86@kernel.org>
> Signed-off-by: Alan Cox <alan@linux.intel.com>
> ---
>  arch/x86/include/asm/mrst.h         |    3 +
>  arch/x86/kernel/early_printk.c      |    6 ++
>  arch/x86/kernel/early_printk_mrst.c |   89 ++++++++++++++++++++++++++++++++++-
>  3 files changed, 97 insertions(+), 1 deletions(-)
> 
> diff --git a/arch/x86/include/asm/mrst.h b/arch/x86/include/asm/mrst.h
> index d0ea5bc..4a711a6 100644
> --- a/arch/x86/include/asm/mrst.h
> +++ b/arch/x86/include/asm/mrst.h
> @@ -47,4 +47,7 @@ extern enum mrst_timer_options mrst_timer_options;
>  
>  extern struct console early_mrst_console;
>  extern void mrst_early_console_init(void);
> +
> +extern struct console early_hsu_console;
> +extern void hsu_early_console_init(void);
>  #endif /* _ASM_X86_MRST_H */
> diff --git a/arch/x86/kernel/early_printk.c b/arch/x86/kernel/early_printk.c
> index 6082463..4572f25 100644
> --- a/arch/x86/kernel/early_printk.c
> +++ b/arch/x86/kernel/early_printk.c
> @@ -245,6 +245,12 @@ static int __init setup_early_printk(char *buf)
>  			mrst_early_console_init();
>  			early_console_register(&early_mrst_console, keep);
>  		}
> +
> +		if (!strncmp(buf, "hsu", 3)) {
> +			hsu_early_console_init();
> +			early_console_register(&early_hsu_console, keep);
> +		}
> +
>  #endif
>  		buf++;
>  	}
> diff --git a/arch/x86/kernel/early_printk_mrst.c b/arch/x86/kernel/early_printk_mrst.c
> index 05d27e1..65df603 100644
> --- a/arch/x86/kernel/early_printk_mrst.c
> +++ b/arch/x86/kernel/early_printk_mrst.c
> @@ -1,5 +1,5 @@
>  /*
> - * early_printk_mrst.c - spi-uart early printk for Intel Moorestown platform
> + * early_printk_mrst.c - early consoles for Intel MID platforms
>   *
>   * Copyright (c) 2008-2010, Intel Corporation
>   *
> @@ -9,9 +9,19 @@
>   * of the License.
>   */
>  
> +/*
> + * This file implements two early consoles named mrst and hsu.
> + * mrst is based on Maxim3110 spi-uart device, it exists in both
> + * Moorestown and Medfield platforms, while hsu is based on a High
> + * Speed UART device which only exists in the Medfield platform
> + */
> +
> +#include <linux/serial_reg.h>
> +#include <linux/serial_mfd.h>
>  #include <linux/kmsg_dump.h>
>  #include <linux/console.h>
>  #include <linux/kernel.h>
> +#include <linux/delay.h>
>  #include <linux/init.h>
>  #include <linux/io.h>
>  
> @@ -230,3 +240,80 @@ struct console early_mrst_console = {
>  	.flags =	CON_PRINTBUFFER,
>  	.index =	-1,
>  };
> +
> +/*
> + * Following is the early console based on Medfield HSU (High
> + * Speed UART) device.

Is there a link to a PDF of the device in question?

> + */
> +#define HSU_PORT2_PADDR		0xffa28180

Is it _always_ that address?
> +
> +static void __iomem *phsu;
> +
> +void hsu_early_console_init(void)
> +{
> +	u8 lcr;
> +
> +	phsu = (void *)set_fixmap_offset_nocache(FIX_EARLYCON_MEM_BASE,
> +							HSU_PORT2_PADDR);
> +
> +	/* Disable FIFO */
> +	writeb(0x0, phsu + UART_FCR);

No detection? What happens if you don't have the device (say in production it gets removed)
and we try to use earlyprintk=hsu? Won't we have some trouble?

> +
> +	/* Set to default 115200 bps, 8n1 */

Is that OK? Should there be some parsing of the baudrate data?
> +	lcr = readb(phsu + UART_LCR);
> +	writeb((0x80 | lcr), phsu + UART_LCR);
> +	writeb(0x18, phsu + UART_DLL);
> +	writeb(lcr,  phsu + UART_LCR);
> +	writel(0x3600, phsu + UART_MUL*4);

Re: [PATCH v3 4/4] x86, earlyprintk: add hsu early console for Intel Medfield platform

[Alan Cox]

> Is there a link to a PDF of the device in question?

Not that I know of at least so far.

> > + */
> > +#define HSU_PORT2_PADDR		0xffa28180
> 
> Is it _always_ that address?

Yes.

> > +
> > +static void __iomem *phsu;
> > +
> > +void hsu_early_console_init(void)
> > +{
> > +	u8 lcr;
> > +
> > +	phsu = (void
> > *)set_fixmap_offset_nocache(FIX_EARLYCON_MEM_BASE,
> > +
> > HSU_PORT2_PADDR); +
> > +	/* Disable FIFO */
> > +	writeb(0x0, phsu + UART_FCR);
> 
> No detection? What happens if you don't have the device (say in
> production it gets removed) and we try to use earlyprintk=hsu? Won't
> we have some trouble?

Same as if you try and use the other serial console drivers that way.
It's a bit tricky to do much about because to be sure you've got this
stuff you need to have done a whole ton of work which then makes the
early console pointless.

> 
> > +
> > +	/* Set to default 115200 bps, 8n1 */
> 
> Is that OK? Should there be some parsing of the baudrate data?

For a serial console yes - for an early console robustness is
everything, and its an embedded development environment so fixed
configuration really isn't a problem.

[tip:x86/mrst] x86: Add two helper macros for fixed address mapping

[tip-bot for Feng Tang]

Commit-ID:  5a47c7dae861c3ca3edf178546641909851bf715
Gitweb:     http://git.kernel.org/tip/5a47c7dae861c3ca3edf178546641909851bf715
Author:     Feng Tang <feng.tang@intel.com>
AuthorDate: Mon, 13 Sep 2010 15:08:54 +0800
Committer:  Ingo Molnar <mingo@elte.hu>
CommitDate: Fri, 8 Oct 2010 10:01:46 +0200

x86: Add two helper macros for fixed address mapping

Sometimes fixmap will be used to map an physical address which
is not PAGE align, so to use it we need first map it and then
add the address offset to the mapped fixed address. These 2 new
helpers are suggested by Ingo Molnar to make the process
simpler.

For a physicall address like "phys", a directly usable virtual
address can be get by
	virt = (void *)set_fixmap_offset(fixed_idx, phys);
or
	virt = (void *)set_fixmap_offset_nocache(fixed_idx, phys);
(depends on whether the physical address is cachable or not).

Signed-off-by: Feng Tang <feng.tang@intel.com>
Cc: alan@linux.intel.com
Cc: greg@kroah.com
Cc: x86@kernel.org
LKML-Reference: <1284361736-23011-3-git-send-email-feng.tang@intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
---
 arch/x86/include/asm/fixmap.h |   15 +++++++++++++++
 1 files changed, 15 insertions(+), 0 deletions(-)

diff --git a/arch/x86/include/asm/fixmap.h b/arch/x86/include/asm/fixmap.h
index d07b44f..4d293dc 100644
--- a/arch/x86/include/asm/fixmap.h
+++ b/arch/x86/include/asm/fixmap.h
@@ -214,5 +214,20 @@ static inline unsigned long virt_to_fix(const unsigned long vaddr)
 	BUG_ON(vaddr >= FIXADDR_TOP || vaddr < FIXADDR_START);
 	return __virt_to_fix(vaddr);
 }
+
+/* Return an pointer with offset calculated */
+static inline unsigned long __set_fixmap_offset(enum fixed_addresses idx,
+				phys_addr_t phys, pgprot_t flags)
+{
+	__set_fixmap(idx, phys, flags);
+	return fix_to_virt(idx) + (phys & (PAGE_SIZE - 1));
+}
+
+#define set_fixmap_offset(idx, phys)			\
+	__set_fixmap_offset(idx, phys, PAGE_KERNEL)
+
+#define set_fixmap_offset_nocache(idx, phys)			\
+	__set_fixmap_offset(idx, phys, PAGE_KERNEL_NOCACHE)
+
 #endif /* !__ASSEMBLY__ */
 #endif /* _ASM_X86_FIXMAP_H */

[tip:x86/mrst] x86, earlyprintk: Add earlyprintk for Intel Moorestown platform

[tip-bot for Feng Tang]

Commit-ID:  c20b5c3318fe45e4f33f01a91ccead645dfdf619
Gitweb:     http://git.kernel.org/tip/c20b5c3318fe45e4f33f01a91ccead645dfdf619
Author:     Feng Tang <feng.tang@intel.com>
AuthorDate: Mon, 13 Sep 2010 15:08:55 +0800
Committer:  Ingo Molnar <mingo@elte.hu>
CommitDate: Fri, 8 Oct 2010 10:01:47 +0200

x86, earlyprintk: Add earlyprintk for Intel Moorestown platform

Intel Moorestown platform has a spi-uart device(Maxim3110),
which connects to a Designware spi core controller. This patch
will add early console function based on it.

As it will be used long before Linux spi subsystem get
initialised, we simply directly manipulate the spi controller's
register to acheive the early console func. This is safe as it
will be disabled when devices subsytem get initialised.

To use it, user need enable CONFIG_X86_MRST_EARLY_PRINTK in
kenrel config and add "earlyprintk=mrst" in kernel command line.

Signed-off-by: Feng Tang <feng.tang@intel.com>
Acked-by: Alan Cox <alan@linux.intel.com>
Cc: greg@kroah.com
LKML-Reference: <1284361736-23011-4-git-send-email-feng.tang@intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
---
 arch/x86/Kconfig.debug              |    4 +
 arch/x86/include/asm/mrst.h         |    5 +
 arch/x86/kernel/Makefile            |    1 +
 arch/x86/kernel/early_printk.c      |    7 +
 arch/x86/kernel/early_printk_mrst.c |  232 +++++++++++++++++++++++++++++++++++
 5 files changed, 249 insertions(+), 0 deletions(-)

diff --git a/arch/x86/Kconfig.debug b/arch/x86/Kconfig.debug
index 7508508..e5bb96b 100644
--- a/arch/x86/Kconfig.debug
+++ b/arch/x86/Kconfig.debug
@@ -43,6 +43,10 @@ config EARLY_PRINTK
 	  with klogd/syslogd or the X server. You should normally N here,
 	  unless you want to debug such a crash.
 
+config EARLY_PRINTK_MRST
+	bool "Early printk for MRST platform support"
+	depends on EARLY_PRINTK && X86_MRST
+
 config EARLY_PRINTK_DBGP
 	bool "Early printk via EHCI debug port"
 	depends on EARLY_PRINTK && PCI
diff --git a/arch/x86/include/asm/mrst.h b/arch/x86/include/asm/mrst.h
index 33fc296..d0ea5bc 100644
--- a/arch/x86/include/asm/mrst.h
+++ b/arch/x86/include/asm/mrst.h
@@ -10,6 +10,9 @@
  */
 #ifndef _ASM_X86_MRST_H
 #define _ASM_X86_MRST_H
+
+#include <linux/sfi.h>
+
 extern int pci_mrst_init(void);
 int __init sfi_parse_mrtc(struct sfi_table_header *table);
 
@@ -42,4 +45,6 @@ extern enum mrst_timer_options mrst_timer_options;
 #define SFI_MTMR_MAX_NUM 8
 #define SFI_MRTC_MAX	8
 
+extern struct console early_mrst_console;
+extern void mrst_early_console_init(void);
 #endif /* _ASM_X86_MRST_H */
diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile
index fedf32a..3cd01d0 100644
--- a/arch/x86/kernel/Makefile
+++ b/arch/x86/kernel/Makefile
@@ -85,6 +85,7 @@ obj-$(CONFIG_DOUBLEFAULT) 	+= doublefault_32.o
 obj-$(CONFIG_KGDB)		+= kgdb.o
 obj-$(CONFIG_VM86)		+= vm86_32.o
 obj-$(CONFIG_EARLY_PRINTK)	+= early_printk.o
+obj-$(CONFIG_EARLY_PRINTK_MRST)	+= early_printk_mrst.o
 
 obj-$(CONFIG_HPET_TIMER) 	+= hpet.o
 obj-$(CONFIG_APB_TIMER)		+= apb_timer.o
diff --git a/arch/x86/kernel/early_printk.c b/arch/x86/kernel/early_printk.c
index fa99bae..6082463 100644
--- a/arch/x86/kernel/early_printk.c
+++ b/arch/x86/kernel/early_printk.c
@@ -14,6 +14,7 @@
 #include <xen/hvc-console.h>
 #include <asm/pci-direct.h>
 #include <asm/fixmap.h>
+#include <asm/mrst.h>
 #include <asm/pgtable.h>
 #include <linux/usb/ehci_def.h>
 
@@ -239,6 +240,12 @@ static int __init setup_early_printk(char *buf)
 		if (!strncmp(buf, "xen", 3))
 			early_console_register(&xenboot_console, keep);
 #endif
+#ifdef CONFIG_X86_MRST_EARLY_PRINTK
+		if (!strncmp(buf, "mrst", 4)) {
+			mrst_early_console_init();
+			early_console_register(&early_mrst_console, keep);
+		}
+#endif
 		buf++;
 	}
 	return 0;
diff --git a/arch/x86/kernel/early_printk_mrst.c b/arch/x86/kernel/early_printk_mrst.c
new file mode 100644
index 0000000..05d27e1
--- /dev/null
+++ b/arch/x86/kernel/early_printk_mrst.c
@@ -0,0 +1,232 @@
+/*
+ * early_printk_mrst.c - spi-uart early printk for Intel Moorestown platform
+ *
+ * Copyright (c) 2008-2010, Intel Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; version 2
+ * of the License.
+ */
+
+#include <linux/kmsg_dump.h>
+#include <linux/console.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/io.h>
+
+#include <asm/fixmap.h>
+#include <asm/pgtable.h>
+#include <asm/mrst.h>
+
+#define MRST_SPI_TIMEOUT		0x200000
+#define MRST_REGBASE_SPI0		0xff128000
+#define MRST_REGBASE_SPI1		0xff128400
+#define MRST_CLK_SPI0_REG		0xff11d86c
+
+/* Bit fields in CTRLR0 */
+#define SPI_DFS_OFFSET			0
+
+#define SPI_FRF_OFFSET			4
+#define SPI_FRF_SPI			0x0
+#define SPI_FRF_SSP			0x1
+#define SPI_FRF_MICROWIRE		0x2
+#define SPI_FRF_RESV			0x3
+
+#define SPI_MODE_OFFSET			6
+#define SPI_SCPH_OFFSET			6
+#define SPI_SCOL_OFFSET			7
+#define SPI_TMOD_OFFSET			8
+#define	SPI_TMOD_TR			0x0		/* xmit & recv */
+#define SPI_TMOD_TO			0x1		/* xmit only */
+#define SPI_TMOD_RO			0x2		/* recv only */
+#define SPI_TMOD_EPROMREAD		0x3		/* eeprom read mode */
+
+#define SPI_SLVOE_OFFSET		10
+#define SPI_SRL_OFFSET			11
+#define SPI_CFS_OFFSET			12
+
+/* Bit fields in SR, 7 bits */
+#define SR_MASK				0x7f		/* cover 7 bits */
+#define SR_BUSY				(1 << 0)
+#define SR_TF_NOT_FULL			(1 << 1)
+#define SR_TF_EMPT			(1 << 2)
+#define SR_RF_NOT_EMPT			(1 << 3)
+#define SR_RF_FULL			(1 << 4)
+#define SR_TX_ERR			(1 << 5)
+#define SR_DCOL				(1 << 6)
+
+struct dw_spi_reg {
+	u32	ctrl0;
+	u32	ctrl1;
+	u32	ssienr;
+	u32	mwcr;
+	u32	ser;
+	u32	baudr;
+	u32	txfltr;
+	u32	rxfltr;
+	u32	txflr;
+	u32	rxflr;
+	u32	sr;
+	u32	imr;
+	u32	isr;
+	u32	risr;
+	u32	txoicr;
+	u32	rxoicr;
+	u32	rxuicr;
+	u32	msticr;
+	u32	icr;
+	u32	dmacr;
+	u32	dmatdlr;
+	u32	dmardlr;
+	u32	idr;
+	u32	version;
+
+	/* Currently operates as 32 bits, though only the low 16 bits matter */
+	u32	dr;
+} __packed;
+
+#define dw_readl(dw, name)		__raw_readl(&(dw)->name)
+#define dw_writel(dw, name, val)	__raw_writel((val), &(dw)->name)
+
+/* Default use SPI0 register for mrst, we will detect Penwell and use SPI1 */
+static unsigned long mrst_spi_paddr = MRST_REGBASE_SPI0;
+
+static u32 *pclk_spi0;
+/* Always contains an accessable address, start with 0 */
+static struct dw_spi_reg *pspi;
+
+static struct kmsg_dumper dw_dumper;
+static int dumper_registered;
+
+static void dw_kmsg_dump(struct kmsg_dumper *dumper,
+			enum kmsg_dump_reason reason,
+			const char *s1, unsigned long l1,
+			const char *s2, unsigned long l2)
+{
+	int i;
+
+	/* When run to this, we'd better re-init the HW */
+	mrst_early_console_init();
+
+	for (i = 0; i < l1; i++)
+		early_mrst_console.write(&early_mrst_console, s1 + i, 1);
+	for (i = 0; i < l2; i++)
+		early_mrst_console.write(&early_mrst_console, s2 + i, 1);
+}
+
+/* Set the ratio rate to 115200, 8n1, IRQ disabled */
+static void max3110_write_config(void)
+{
+	u16 config;
+
+	config = 0xc001;
+	dw_writel(pspi, dr, config);
+}
+
+/* Translate char to a eligible word and send to max3110 */
+static void max3110_write_data(char c)
+{
+	u16 data;
+
+	data = 0x8000 | c;
+	dw_writel(pspi, dr, data);
+}
+
+void mrst_early_console_init(void)
+{
+	u32 ctrlr0 = 0;
+	u32 spi0_cdiv;
+	u32 freq; /* Freqency info only need be searched once */
+
+	/* Base clk is 100 MHz, the actual clk = 100M / (clk_divider + 1) */
+	pclk_spi0 = (void *)set_fixmap_offset_nocache(FIX_EARLYCON_MEM_BASE,
+							MRST_CLK_SPI0_REG);
+	spi0_cdiv = ((*pclk_spi0) & 0xe00) >> 9;
+	freq = 100000000 / (spi0_cdiv + 1);
+
+	if (mrst_identify_cpu() == MRST_CPU_CHIP_PENWELL)
+		mrst_spi_paddr = MRST_REGBASE_SPI1;
+
+	pspi = (void *)set_fixmap_offset_nocache(FIX_EARLYCON_MEM_BASE,
+						mrst_spi_paddr);
+
+	/* Disable SPI controller */
+	dw_writel(pspi, ssienr, 0);
+
+	/* Set control param, 8 bits, transmit only mode */
+	ctrlr0 = dw_readl(pspi, ctrl0);
+
+	ctrlr0 &= 0xfcc0;
+	ctrlr0 |= 0xf | (SPI_FRF_SPI << SPI_FRF_OFFSET)
+		      | (SPI_TMOD_TO << SPI_TMOD_OFFSET);
+	dw_writel(pspi, ctrl0, ctrlr0);
+
+	/*
+	 * Change the spi0 clk to comply with 115200 bps, use 100000 to
+	 * calculate the clk dividor to make the clock a little slower
+	 * than real baud rate.
+	 */
+	dw_writel(pspi, baudr, freq/100000);
+
+	/* Disable all INT for early phase */
+	dw_writel(pspi, imr, 0x0);
+
+	/* Set the cs to spi-uart */
+	dw_writel(pspi, ser, 0x2);
+
+	/* Enable the HW, the last step for HW init */
+	dw_writel(pspi, ssienr, 0x1);
+
+	/* Set the default configuration */
+	max3110_write_config();
+
+	/* Register the kmsg dumper */
+	if (!dumper_registered) {
+		dw_dumper.dump = dw_kmsg_dump;
+		kmsg_dump_register(&dw_dumper);
+		dumper_registered = 1;
+	}
+}
+
+/* Slave select should be called in the read/write function */
+static void early_mrst_spi_putc(char c)
+{
+	unsigned int timeout;
+	u32 sr;
+
+	timeout = MRST_SPI_TIMEOUT;
+	/* Early putc needs to make sure the TX FIFO is not full */
+	while (--timeout) {
+		sr = dw_readl(pspi, sr);
+		if (!(sr & SR_TF_NOT_FULL))
+			cpu_relax();
+		else
+			break;
+	}
+
+	if (!timeout)
+		pr_warning("MRST earlycon: timed out\n");
+	else
+		max3110_write_data(c);
+}
+
+/* Early SPI only uses polling mode */
+static void early_mrst_spi_write(struct console *con, const char *str, unsigned n)
+{
+	int i;
+
+	for (i = 0; i < n && *str; i++) {
+		if (*str == '\n')
+			early_mrst_spi_putc('\r');
+		early_mrst_spi_putc(*str);
+		str++;
+	}
+}
+
+struct console early_mrst_console = {
+	.name =		"earlymrst",
+	.write =	early_mrst_spi_write,
+	.flags =	CON_PRINTBUFFER,
+	.index =	-1,
+};

[tip:x86/mrst] x86, earlyprintk: Add hsu early console for Intel Medfield platform

[tip-bot for Feng Tang]

Commit-ID:  4d033556f1bfaa7604b951bfadd17aaf1b74e4c5
Gitweb:     http://git.kernel.org/tip/4d033556f1bfaa7604b951bfadd17aaf1b74e4c5
Author:     Feng Tang <feng.tang@intel.com>
AuthorDate: Mon, 13 Sep 2010 15:08:56 +0800
Committer:  Ingo Molnar <mingo@elte.hu>
CommitDate: Fri, 8 Oct 2010 10:01:47 +0200

x86, earlyprintk: Add hsu early console for Intel Medfield platform

Intel Medfield platform has a high speed UART device, which
could act as a early console. To enable early printk of HSU
console, simply add "earlyprintk=hsu" in kernel command line.

Currently we put the code in the early_printk_mrst.c as it is
also for Intel MID platforms like the mrst early console

Signed-off-by: Feng Tang <feng.tang@intel.com>
Acked-by: Alan Cox <alan@linux.intel.com>
Cc: greg@kroah.com
LKML-Reference: <1284361736-23011-5-git-send-email-feng.tang@intel.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
---
 arch/x86/include/asm/mrst.h         |    3 +
 arch/x86/kernel/early_printk.c      |    6 ++
 arch/x86/kernel/early_printk_mrst.c |   89 ++++++++++++++++++++++++++++++++++-
 3 files changed, 97 insertions(+), 1 deletions(-)

diff --git a/arch/x86/include/asm/mrst.h b/arch/x86/include/asm/mrst.h
index d0ea5bc..4a711a6 100644
--- a/arch/x86/include/asm/mrst.h
+++ b/arch/x86/include/asm/mrst.h
@@ -47,4 +47,7 @@ extern enum mrst_timer_options mrst_timer_options;
 
 extern struct console early_mrst_console;
 extern void mrst_early_console_init(void);
+
+extern struct console early_hsu_console;
+extern void hsu_early_console_init(void);
 #endif /* _ASM_X86_MRST_H */
diff --git a/arch/x86/kernel/early_printk.c b/arch/x86/kernel/early_printk.c
index 6082463..4572f25 100644
--- a/arch/x86/kernel/early_printk.c
+++ b/arch/x86/kernel/early_printk.c
@@ -245,6 +245,12 @@ static int __init setup_early_printk(char *buf)
 			mrst_early_console_init();
 			early_console_register(&early_mrst_console, keep);
 		}
+
+		if (!strncmp(buf, "hsu", 3)) {
+			hsu_early_console_init();
+			early_console_register(&early_hsu_console, keep);
+		}
+
 #endif
 		buf++;
 	}
diff --git a/arch/x86/kernel/early_printk_mrst.c b/arch/x86/kernel/early_printk_mrst.c
index 05d27e1..65df603 100644
--- a/arch/x86/kernel/early_printk_mrst.c
+++ b/arch/x86/kernel/early_printk_mrst.c
@@ -1,5 +1,5 @@
 /*
- * early_printk_mrst.c - spi-uart early printk for Intel Moorestown platform
+ * early_printk_mrst.c - early consoles for Intel MID platforms
  *
  * Copyright (c) 2008-2010, Intel Corporation
  *
@@ -9,9 +9,19 @@
  * of the License.
  */
 
+/*
+ * This file implements two early consoles named mrst and hsu.
+ * mrst is based on Maxim3110 spi-uart device, it exists in both
+ * Moorestown and Medfield platforms, while hsu is based on a High
+ * Speed UART device which only exists in the Medfield platform
+ */
+
+#include <linux/serial_reg.h>
+#include <linux/serial_mfd.h>
 #include <linux/kmsg_dump.h>
 #include <linux/console.h>
 #include <linux/kernel.h>
+#include <linux/delay.h>
 #include <linux/init.h>
 #include <linux/io.h>
 
@@ -230,3 +240,80 @@ struct console early_mrst_console = {
 	.flags =	CON_PRINTBUFFER,
 	.index =	-1,
 };
+
+/*
+ * Following is the early console based on Medfield HSU (High
+ * Speed UART) device.
+ */
+#define HSU_PORT2_PADDR		0xffa28180
+
+static void __iomem *phsu;
+
+void hsu_early_console_init(void)
+{
+	u8 lcr;
+
+	phsu = (void *)set_fixmap_offset_nocache(FIX_EARLYCON_MEM_BASE,
+							HSU_PORT2_PADDR);
+
+	/* Disable FIFO */
+	writeb(0x0, phsu + UART_FCR);
+
+	/* Set to default 115200 bps, 8n1 */
+	lcr = readb(phsu + UART_LCR);
+	writeb((0x80 | lcr), phsu + UART_LCR);
+	writeb(0x18, phsu + UART_DLL);
+	writeb(lcr,  phsu + UART_LCR);
+	writel(0x3600, phsu + UART_MUL*4);
+
+	writeb(0x8, phsu + UART_MCR);
+	writeb(0x7, phsu + UART_FCR);
+	writeb(0x3, phsu + UART_LCR);
+
+	/* Clear IRQ status */
+	readb(phsu + UART_LSR);
+	readb(phsu + UART_RX);
+	readb(phsu + UART_IIR);
+	readb(phsu + UART_MSR);
+
+	/* Enable FIFO */
+	writeb(0x7, phsu + UART_FCR);
+}
+
+#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
+
+static void early_hsu_putc(char ch)
+{
+	unsigned int timeout = 10000; /* 10ms */
+	u8 status;
+
+	while (--timeout) {
+		status = readb(phsu + UART_LSR);
+		if (status & BOTH_EMPTY)
+			break;
+		udelay(1);
+	}
+
+	/* Only write the char when there was no timeout */
+	if (timeout)
+		writeb(ch, phsu + UART_TX);
+}
+
+static void early_hsu_write(struct console *con, const char *str, unsigned n)
+{
+	int i;
+
+	for (i = 0; i < n && *str; i++) {
+		if (*str == '\n')
+			early_hsu_putc('\r');
+		early_hsu_putc(*str);
+		str++;
+	}
+}
+
+struct console early_hsu_console = {
+	.name =		"earlyhsu",
+	.write =	early_hsu_write,
+	.flags =	CON_PRINTBUFFER,
+	.index =	-1,
+};