[U-Boot] [PATCH] ppc4xx: Fix CATcenter build and add it to MAKEALL

[U-Boot] [PATCH] ppc4xx: Fix CATcenter build and add it to MAKEALL

[Stefan Roese]

Signed-off-by: Stefan Roese <sr@denx.de>
---
 MAKEALL                     |    1 +
 include/configs/CATcenter.h |   23 ++---------------------
 2 files changed, 3 insertions(+), 21 deletions(-)

diff --git a/MAKEALL b/MAKEALL
index b34ae33..6002ade 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -195,6 +195,7 @@ LIST_4xx="		\
 	CANBT		\
 	canyonlands	\
 	canyonlands_nand \
+	CATcenter	\
 	CMS700		\
 	CPCI2DP		\
 	CPCI405		\
diff --git a/include/configs/CATcenter.h b/include/configs/CATcenter.h
index 229a513..002435e 100644
--- a/include/configs/CATcenter.h
+++ b/include/configs/CATcenter.h
@@ -105,6 +105,7 @@
 #define CONFIG_SYS_LOADS_BAUD_CHANGE	1	/* allow baudrate change	*/
 
 
+#define CONFIG_PPC4xx_EMAC
 #undef CONFIG_EXT_PHY
 #define CONFIG_NET_MULTI	1
 
@@ -398,6 +399,7 @@
  * I2C EEPROM (CAT24WC16) for environment
  */
 #define CONFIG_HARD_I2C			/* I2c with hardware support */
+#define CONFIG_PPC4XX_I2C		/* use PPC4xx driver		*/
 #define CONFIG_SYS_I2C_SPEED		400000	/* I2C speed and slave address */
 #define CONFIG_SYS_I2C_SLAVE		0x7F
 
@@ -410,16 +412,6 @@
 					/* last 4 bits of the address	*/
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	10   /* and takes up to 10 msec */
 
-/*-----------------------------------------------------------------------
- * Cache Configuration
- */
-#define CONFIG_SYS_DCACHE_SIZE		16384	/* For AMCC 405 CPUs, older 405 ppc's	*/
-					/* have only 8kB, 16kB is save here	*/
-#define CONFIG_SYS_CACHELINE_SIZE	32	/* ...			*/
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_SYS_CACHELINE_SHIFT	5	/* log base 2 of the above value	*/
-#endif
-
 /*
  * Init Memory Controller:
  *
@@ -570,17 +562,6 @@
 #define		DIMM_READ_ADDR 0xAB
 #define		DIMM_WRITE_ADDR 0xAA
 
-#define CPC0_PLLMR0  (CNTRL_DCR_BASE+0x0)  /* PLL mode 0 register		*/
-#define CPC0_BOOT    (CNTRL_DCR_BASE+0x1)  /* Chip Clock Status register	*/
-#define CPC0_CR1     (CNTRL_DCR_BASE+0x2)  /* Chip Control 1 register		*/
-#define CPC0_EPRCSR  (CNTRL_DCR_BASE+0x3)  /* EMAC PHY Rcv Clk Src register	*/
-#define CPC0_PLLMR1  (CNTRL_DCR_BASE+0x4)  /* PLL mode 1 register		*/
-#define CPC0_UCR     (CNTRL_DCR_BASE+0x5)  /* UART Control register		*/
-#define CPC0_SRR     (CNTRL_DCR_BASE+0x6)  /* Soft Reset register		*/
-#define CPC0_JTAGID  (CNTRL_DCR_BASE+0x7)  /* JTAG ID register			*/
-#define CPC0_SPARE   (CNTRL_DCR_BASE+0x8)  /* Spare DCR				*/
-#define CPC0_PCI     (CNTRL_DCR_BASE+0x9)  /* PCI Control register		*/
-
 /* Defines for CPC0_PLLMR1 Register fields */
 #define PLL_ACTIVE		0x80000000
 #define CPC0_PLLMR1_SSCS	0x80000000
-- 
1.7.2.3

[U-Boot] [PATCH] ppc4xx: Fix CATcenter build and add it to MAKEALL

[Stefan Roese]

On Monday 13 September 2010 09:41:54 Stefan Roese wrote:
> Signed-off-by: Stefan Roese <sr@denx.de>

Applied to u-boot-ppc4xx/master. Thanks.

Cheers,
Stefan

--
DENX Software Engineering GmbH,      MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich,  Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-0 Fax: (+49)-8142-66989-80 Email: office at denx.de

[U-Boot] [PATCH] ppc4xx: Fix CATcenter build and add it to MAKEALL

[Wolfgang Denk]

Dear Stefan Roese,

In message <1284363714-11355-1-git-send-email-sr@denx.de> you wrote:
> Signed-off-by: Stefan Roese <sr@denx.de>
> ---
>  MAKEALL                     |    1 +
>  include/configs/CATcenter.h |   23 ++---------------------
>  2 files changed, 3 insertions(+), 21 deletions(-)
> 
> diff --git a/MAKEALL b/MAKEALL
> index b34ae33..6002ade 100755
> --- a/MAKEALL
> +++ b/MAKEALL
> @@ -195,6 +195,7 @@ LIST_4xx="		\
>  	CANBT		\
>  	canyonlands	\
>  	canyonlands_nand \
> +	CATcenter	\
>  	CMS700		\
>  	CPCI2DP		\
>  	CPCI405		\

This will result in a merge conflict when pulling into "next", where
this entry does not exist any more as it gets auto-generated fro
boards.cfg

Can we please omit this from this patch?


Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH,     MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
"The glory of creation is in its infinite diversity." "And in the way
our differences combine to create meaning and beauty."
	-- Dr. Miranda Jones and Spock, "Is There in Truth No Beauty?",
	   stardate 5630.8

[U-Boot] [PATCH] ppc4xx: Fix CATcenter build and add it to MAKEALL

[Stefan Roese]

Hi Wolfgang,

On Wednesday 22 September 2010 22:52:03 Wolfgang Denk wrote:
> > +	CATcenter	\
> > 
> >  	CMS700		\
> >  	CPCI2DP		\
> >  	CPCI405		\
> 
> This will result in a merge conflict when pulling into "next", where
> this entry does not exist any more as it gets auto-generated fro
> boards.cfg
> 
> Can we please omit this from this patch?

Yes, will send an updated patch in a few minutes.
 
Cheers,
Stefan

--
DENX Software Engineering GmbH,      MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich,  Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-0 Fax: (+49)-8142-66989-80 Email: office at denx.de