[PATCH 1/2] ARM: mach-shmobile: clock-sh7372: Add FSIDIV clock support

[PATCH 1/2] ARM: mach-shmobile: clock-sh7372: Add FSIDIV clock support

[Kuninori Morimoto]

This patch add late_main_clks clock array,
because these clock needs div6 clocks for use

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
---
 arch/arm/mach-shmobile/clock-sh7372.c        |  132 ++++++++++++++++++++++++++
 arch/arm/mach-shmobile/include/mach/sh7372.h |    2 +
 2 files changed, 134 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c
index 8b9f50a..6f8eabe 100644
--- a/arch/arm/mach-shmobile/clock-sh7372.c
+++ b/arch/arm/mach-shmobile/clock-sh7372.c
@@ -50,6 +50,9 @@
 #define SMSTPCR3	0xe615013c
 #define SMSTPCR4	0xe6150140
 
+#define FSIDIVA		0xFE1F8000
+#define FSIDIVB		0xFE1F8008
+
 /* Platforms must set frequency on their DV_CLKI pin */
 struct clk sh7372_dv_clki_clk = {
 };
@@ -417,6 +420,132 @@ static struct clk div6_reparent_clks[DIV6_REPARENT_NR] = {
 				      fsibckcr_parent, ARRAY_SIZE(fsibckcr_parent), 6, 2),
 };
 
+/* FSI DIV */
+
+static void fsidiv_init(struct clk *clk)
+{
+	clk->enable_reg = ioremap_nocache((unsigned long)clk->enable_reg, 8);
+}
+
+static unsigned long fsidiv_recalc(struct clk *clk)
+{
+	unsigned long value = __raw_readl(clk->enable_reg);
+
+	if ((value & 0x3) != 0x3)
+		return 0;
+
+	value = (value >> 16) & 0xffff;
+
+	if (value < 2)
+		return 0;
+
+	return clk->parent->rate / value;
+}
+
+static long fsidiv_round_rate(struct clk *clk, unsigned long rate)
+{
+	/*
+	 * FSIDIV doesn't have freq_table.
+	 * it mean fsidiv can not use clk_rate_table_round.
+	 * self calculate here
+	 */
+	unsigned long rate_error, rate_error_prev = ~0UL;
+	unsigned long rate_best_fit = rate;
+	unsigned long highest, lowest;
+	int i;
+
+	highest = lowest = 0;
+
+	for (i = 2; i <= 0xffff; i++) {
+		unsigned long freq = clk->parent->rate / i;
+
+		if (freq > highest)
+			highest = freq;
+		if (freq < lowest)
+			lowest = freq;
+
+		rate_error = abs(freq - rate);
+		if (rate_error < rate_error_prev) {
+			rate_best_fit = freq;
+			rate_error_prev = rate_error;
+		}
+
+		if (rate_error = 0)
+			break;
+	}
+
+	if (rate >= highest)
+		rate_best_fit = highest;
+	if (rate <= lowest)
+		rate_best_fit = lowest;
+
+	return rate_best_fit;
+}
+
+static void fsidiv_disable(struct clk *clk)
+{
+	__raw_writel(0, clk->enable_reg);
+}
+
+static int fsidiv_enable(struct clk *clk)
+{
+	unsigned long value;
+
+	value  = __raw_readl(clk->enable_reg) >> 16;
+	if (value < 2) {
+		fsidiv_disable(clk);
+		return -ENOENT;
+	}
+
+	__raw_writel((value << 16) | 0x3, clk->enable_reg);
+
+	return 0;
+}
+
+static int fsidiv_set_rate(struct clk *clk,
+			   unsigned long rate, int algo_id)
+{
+	int idx;
+
+	if (clk->parent->rate = rate) {
+		fsidiv_disable(clk);
+		return 0;
+	}
+
+	idx = (clk->parent->rate / rate) & 0xffff;
+	if (idx < 2)
+		return -ENOENT;
+
+	__raw_writel(idx << 16, clk->enable_reg);
+	return fsidiv_enable(clk);
+}
+
+static struct clk_ops fsidiv_clk_ops = {
+	.init		= fsidiv_init,
+	.recalc		= fsidiv_recalc,
+	.round_rate	= fsidiv_round_rate,
+	.set_rate	= fsidiv_set_rate,
+	.enable		= fsidiv_enable,
+	.disable	= fsidiv_disable,
+};
+
+struct clk sh7372_fsidiva_clk = {
+	.ops		= &fsidiv_clk_ops,
+	.parent		= &div6_reparent_clks[DIV6_FSIA], /* late install */
+	.enable_reg	= (void __iomem *)FSIDIVA,
+};
+
+struct clk sh7372_fsidivb_clk = {
+	.ops		= &fsidiv_clk_ops,
+	.parent		= &div6_reparent_clks[DIV6_FSIB],  /* late install */
+	.enable_reg	= (void __iomem *)FSIDIVB,
+};
+
+static struct clk *late_main_clks[] = {
+	&sh7372_fsidiva_clk,
+	&sh7372_fsidivb_clk,
+};
+
 enum { MSTP001,
        MSTP131, MSTP130,
        MSTP129, MSTP128, MSTP127, MSTP126,
@@ -582,6 +711,9 @@ void __init sh7372_clock_init(void)
 	if (!ret)
 		ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR);
 
+	for (k = 0; !ret && (k < ARRAY_SIZE(late_main_clks)); k++)
+		ret = clk_register(late_main_clks[k]);
+
 	clkdev_add_table(lookups, ARRAY_SIZE(lookups));
 
 	if (!ret)
diff --git a/arch/arm/mach-shmobile/include/mach/sh7372.h b/arch/arm/mach-shmobile/include/mach/sh7372.h
index 147775a..e4f9004 100644
--- a/arch/arm/mach-shmobile/include/mach/sh7372.h
+++ b/arch/arm/mach-shmobile/include/mach/sh7372.h
@@ -464,5 +464,7 @@ extern struct clk sh7372_dv_clki_div2_clk;
 extern struct clk sh7372_pllc2_clk;
 extern struct clk sh7372_fsiack_clk;
 extern struct clk sh7372_fsibck_clk;
+extern struct clk sh7372_fsidiva_clk;
+extern struct clk sh7372_fsidivb_clk;
 
 #endif /* __ASM_SH7372_H__ */
-- 
1.7.0.4

Re: [PATCH 1/2] ARM: mach-shmobile: clock-sh7372: Add FSIDIV clock

[Guennadi Liakhovetski]

On Fri, 1 Oct 2010, Kuninori Morimoto wrote:

> 
> This patch add late_main_clks clock array,
> because these clock needs div6 clocks for use
> 
> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
> ---
>  arch/arm/mach-shmobile/clock-sh7372.c        |  132 ++++++++++++++++++++++++++
>  arch/arm/mach-shmobile/include/mach/sh7372.h |    2 +
>  2 files changed, 134 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c
> index 8b9f50a..6f8eabe 100644
> --- a/arch/arm/mach-shmobile/clock-sh7372.c
> +++ b/arch/arm/mach-shmobile/clock-sh7372.c
> @@ -50,6 +50,9 @@
>  #define SMSTPCR3	0xe615013c
>  #define SMSTPCR4	0xe6150140
>  
> +#define FSIDIVA		0xFE1F8000
> +#define FSIDIVB		0xFE1F8008
> +
>  /* Platforms must set frequency on their DV_CLKI pin */
>  struct clk sh7372_dv_clki_clk = {
>  };
> @@ -417,6 +420,132 @@ static struct clk div6_reparent_clks[DIV6_REPARENT_NR] = {
>  				      fsibckcr_parent, ARRAY_SIZE(fsibckcr_parent), 6, 2),
>  };
>  
> +/* FSI DIV */
> +
> +static void fsidiv_init(struct clk *clk)
> +{
> +	clk->enable_reg = ioremap_nocache((unsigned long)clk->enable_reg, 8);

What happens, if ioremap() fails? On the whole, for some reason I don't 
really like this

void x_init(struct foo *x)
{
	x->reg = ioremap(x->reg, N);
}

approach very much... But maybe it's just me. Why not just add the ioremap 
to this loop

> @@ -582,6 +711,9 @@ void __init sh7372_clock_init(void)
>  	if (!ret)
>  		ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR);
>  
> +	for (k = 0; !ret && (k < ARRAY_SIZE(late_main_clks)); k++)
> +		ret = clk_register(late_main_clks[k]);
> +
>  	clkdev_add_table(lookups, ARRAY_SIZE(lookups));
>  
>  	if (!ret)

and only register the respective clock, if it succeeds?

Thanks
Guennadi
---
Guennadi Liakhovetski, Ph.D.
Freelance Open-Source Software Developer
http://www.open-technology.de/

Re: [PATCH 1/2] ARM: mach-shmobile: clock-sh7372: Add FSIDIV clock support

[Magnus Damm]

On Sat, Oct 2, 2010 at 1:21 AM, Guennadi Liakhovetski
<g.liakhovetski@gmx.de> wrote:
> On Fri, 1 Oct 2010, Kuninori Morimoto wrote:
>
>>
>> This patch add late_main_clks clock array,
>> because these clock needs div6 clocks for use
>>
>> Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
>> ---
>>  arch/arm/mach-shmobile/clock-sh7372.c        |  132 ++++++++++++++++++++++++++
>>  arch/arm/mach-shmobile/include/mach/sh7372.h |    2 +
>>  2 files changed, 134 insertions(+), 0 deletions(-)
>>
>> diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c
>> index 8b9f50a..6f8eabe 100644
>> --- a/arch/arm/mach-shmobile/clock-sh7372.c
>> +++ b/arch/arm/mach-shmobile/clock-sh7372.c
>> @@ -50,6 +50,9 @@
>>  #define SMSTPCR3     0xe615013c
>>  #define SMSTPCR4     0xe6150140
>>
>> +#define FSIDIVA              0xFE1F8000
>> +#define FSIDIVB              0xFE1F8008
>> +
>>  /* Platforms must set frequency on their DV_CLKI pin */
>>  struct clk sh7372_dv_clki_clk = {
>>  };
>> @@ -417,6 +420,132 @@ static struct clk div6_reparent_clks[DIV6_REPARENT_NR] = {
>>                                     fsibckcr_parent, ARRAY_SIZE(fsibckcr_parent), 6, 2),
>>  };
>>
>> +/* FSI DIV */
>> +
>> +static void fsidiv_init(struct clk *clk)
>> +{
>> +     clk->enable_reg = ioremap_nocache((unsigned long)clk->enable_reg, 8);
>
> What happens, if ioremap() fails? On the whole, for some reason I don't
> really like this

Perhaps ->init should have a return value?

But I recall Paul disliking that idea?

> void x_init(struct foo *x)
> {
>        x->reg = ioremap(x->reg, N);
> }
>
> approach very much... But maybe it's just me. Why not just add the ioremap
> to this loop
>
>> @@ -582,6 +711,9 @@ void __init sh7372_clock_init(void)
>>       if (!ret)
>>               ret = sh_clk_mstp32_register(mstp_clks, MSTP_NR);
>>
>> +     for (k = 0; !ret && (k < ARRAY_SIZE(late_main_clks)); k++)
>> +             ret = clk_register(late_main_clks[k]);
>> +
>>       clkdev_add_table(lookups, ARRAY_SIZE(lookups));
>>
>>       if (!ret)
>
> and only register the respective clock, if it succeeds?

If so then we need to move out the per-clock type init code from all
the clock callbacks to the common per-cpu init routine. I'd rather see
the per-clock type code kept together.

/ magnus

Re: [PATCH 1/2] ARM: mach-shmobile: clock-sh7372: Add FSIDIV clock support

[Paul Mundt]

On Mon, Oct 04, 2010 at 12:35:54PM +0900, Magnus Damm wrote:
> On Sat, Oct 2, 2010 at 1:21 AM, Guennadi Liakhovetski
> <g.liakhovetski@gmx.de> wrote:
> > On Fri, 1 Oct 2010, Kuninori Morimoto wrote:
> >> +static void fsidiv_init(struct clk *clk)
> >> +{
> >> + ? ? clk->enable_reg = ioremap_nocache((unsigned long)clk->enable_reg, 8);
> >
> > What happens, if ioremap() fails? On the whole, for some reason I don't
> > really like this
> 
> Perhaps ->init should have a return value?
> 
> But I recall Paul disliking that idea?
> 
Yes, ->init() had some special purposes back in a previous incarnation of
the clock framework, but it's not something that we want to really bother
with anymore. It was never intended for setting up mappings or anything
like that, which is why it never had a return value. As we move towards a
generic struct clk/clk_ops the ->init() thing will be wholly unsupported,
so the intent now is simply to keep it around for the legacy CPG users.

Having said that, I've spent a bit of time thinking about how to solve
this cleanly. At the moment we can assume that clocks nested under a
given topology will have their registers grouped fairly close together,
with the one-off clocks or root clocks/PLLs having special mappings of
their own to contend with.

The solution I've come up with is to associate a memory window mapping
with a struct clk, where they can set their own range, leave it unset to
inherit from the root clock, or if the root clock likewise fails to set a
mapping then we hand down a dummy mapping that provides BSS cleared
offsets for permitting the I/O routines to transparently take them in to
account. We can of course short-circuit the root clock groveling and bail
out on a previous extant mapping from any parent, and perhaps that's the
better option, but it's pretty trivial to change that behaviour later on
if a need arises.

Thoughts?

---


diff --git a/drivers/sh/clk.c b/drivers/sh/clk.c
index 661a801..a20d309 100644
--- a/drivers/sh/clk.c
+++ b/drivers/sh/clk.c
@@ -25,6 +25,7 @@
 #include <linux/sysdev.h>
 #include <linux/seq_file.h>
 #include <linux/err.h>
+#include <linux/io.h>
 #include <linux/platform_device.h>
 #include <linux/debugfs.h>
 #include <linux/cpufreq.h>
@@ -233,6 +234,14 @@ EXPORT_SYMBOL_GPL(clk_enable);
 
 static LIST_HEAD(root_clks);
 
+static struct clk *lookup_root_clock(struct clk *clk)
+{
+	while (clk->parent)
+		clk = clk->parent;
+
+	return clk;
+}
+
 /**
  * recalculate_root_clocks - recalculate and propagate all root clocks
  *
@@ -251,8 +260,76 @@ void recalculate_root_clocks(void)
 	}
 }
 
+static struct clk_mapping dummy_mapping;
+
+static int clk_establish_mapping(struct clk *clk)
+{
+	struct clk_mapping *mapping = clk->mapping;
+
+	/*
+	 * Propagate mappings.
+	 */
+	if (!mapping) {
+		struct clk *clkp;
+
+		/*
+		 * dummy mapping for root clocks with no specified ranges
+		 */
+		if (!clk->parent) {
+			clk->mapping = &dummy_mapping;
+			return 0;
+		}
+
+		/*
+		 * If we're on a child clock and it provides no mapping of its
+		 * own, inherit the mapping from its root clock.
+		 */
+		clkp = lookup_root_clock(clk);
+		mapping = clkp->mapping;
+		BUG_ON(!mapping);
+	}
+
+	/*
+	 * Establish initial mapping.
+	 */
+	if (!mapping->base && mapping->phys) {
+		kref_init(&mapping->ref);
+		mapping->base = ioremap_nocache(mapping->phys, mapping->len);
+		if (unlikely(!mapping->base))
+			return -ENXIO;
+	} else
+		/* Existing mapping */
+		kref_get(&mapping->ref);
+
+	clk->mapping = mapping;
+	return 0;
+}
+
+static void clk_destroy_mapping(struct kref *kref)
+{
+	struct clk_mapping *mapping;
+
+	mapping = container_of(kref, struct clk_mapping, ref);
+
+	iounmap(mapping->base);
+}
+
+static void clk_teardown_mapping(struct clk *clk)
+{
+	struct clk_mapping *mapping = clk->mapping;
+
+	/* Nothing to do */
+	if (mapping = &dummy_mapping)
+		return;
+
+	kref_put(&mapping->ref, clk_destroy_mapping);
+	clk->mapping = NULL;
+}
+
 int clk_register(struct clk *clk)
 {
+	int ret;
+
 	if (clk = NULL || IS_ERR(clk))
 		return -EINVAL;
 
@@ -267,6 +344,10 @@ int clk_register(struct clk *clk)
 	INIT_LIST_HEAD(&clk->children);
 	clk->usecount = 0;
 
+	ret = clk_establish_mapping(clk);
+	if (unlikely(ret))
+		goto out_unlock;
+
 	if (clk->parent)
 		list_add(&clk->sibling, &clk->parent->children);
 	else
@@ -275,9 +356,11 @@ int clk_register(struct clk *clk)
 	list_add(&clk->node, &clock_list);
 	if (clk->ops && clk->ops->init)
 		clk->ops->init(clk);
+
+out_unlock:
 	mutex_unlock(&clock_list_sem);
 
-	return 0;
+	return ret;
 }
 EXPORT_SYMBOL_GPL(clk_register);
 
@@ -286,6 +369,7 @@ void clk_unregister(struct clk *clk)
 	mutex_lock(&clock_list_sem);
 	list_del(&clk->sibling);
 	list_del(&clk->node);
+	clk_teardown_mapping(clk);
 	mutex_unlock(&clock_list_sem);
 }
 EXPORT_SYMBOL_GPL(clk_unregister);
diff --git a/include/linux/sh_clk.h b/include/linux/sh_clk.h
index ecdfea5..8ae3770 100644
--- a/include/linux/sh_clk.h
+++ b/include/linux/sh_clk.h
@@ -4,11 +4,20 @@
 #include <linux/list.h>
 #include <linux/seq_file.h>
 #include <linux/cpufreq.h>
+#include <linux/types.h>
+#include <linux/kref.h>
 #include <linux/clk.h>
 #include <linux/err.h>
 
 struct clk;
 
+struct clk_mapping {
+	phys_addr_t		phys;
+	void __iomem		*base;
+	unsigned long		len;
+	struct kref		ref;
+};
+
 struct clk_ops {
 	void (*init)(struct clk *clk);
 	int (*enable)(struct clk *clk);
@@ -42,6 +51,7 @@ struct clk {
 	unsigned long		arch_flags;
 	void			*priv;
 	struct dentry		*dentry;
+	struct clk_mapping	*mapping;
 	struct cpufreq_frequency_table *freq_table;
 };
 

Re: [PATCH 1/2] ARM: mach-shmobile: clock-sh7372: Add FSIDIV clock

[Kuninori Morimoto]

Dear Paul

I used your patch
But

> +static int clk_establish_mapping(struct clk *clk)
> +{
> +	struct clk_mapping *mapping = clk->mapping;
> +
> +	/*
> +	 * Propagate mappings.
> +	 */
> +	if (!mapping) {
> +		struct clk *clkp;
> +
> +		/*
> +		 * dummy mapping for root clocks with no specified ranges
> +		 */
> +		if (!clk->parent) {
> +			clk->mapping = &dummy_mapping;
> +			return 0;
> +		}
> +
> +		/*
> +		 * If we're on a child clock and it provides no mapping of its
> +		 * own, inherit the mapping from its root clock.
> +		 */
> +		clkp = lookup_root_clock(clk);
> +		mapping = clkp->mapping;
> +		BUG_ON(!mapping);
> +	}
> +
> +	/*
> +	 * Establish initial mapping.
> +	 */
> +	if (!mapping->base && mapping->phys) {
> +		kref_init(&mapping->ref);
> +		mapping->base = ioremap_nocache(mapping->phys, mapping->len);
> +		if (unlikely(!mapping->base))
> +			return -ENXIO;
> +	} else
> +		/* Existing mapping */
> +		kref_get(&mapping->ref);
> +
> +	clk->mapping = mapping;
> +	return 0;
> +}

If I use this patch on AP4,
It said

------------[ cut here ]------------
WARNING: at /opt/usr/src/WORK/morimoto/gitlinux/linux-2.6/lib/kref.c:34 kref_get
+0x20/0x3c()
Modules linked in:
[<c002802c>] (unwind_backtrace+0x0/0xe4) from [<c0031154>] (warn_slowpath_common
+0x4c/0x64)
[<c0031154>] (warn_slowpath_common+0x4c/0x64) from [<c0031184>] (warn_slowpath_n
ull+0x18/0x1c)
[<c0031184>] (warn_slowpath_null+0x18/0x1c) from [<c014a798>] (kref_get+0x20/0x3
c)
[<c014a798>] (kref_get+0x20/0x3c) from [<c01d9fec>] (clk_register+0xdc/0x190)
[<c01d9fec>] (clk_register+0xdc/0x190) from [<c000b8dc>] (sh7372_clock_init+0x20
/0xcc)
[<c000b8dc>] (sh7372_clock_init+0x20/0xcc) from [<c000b9f8>] (ap4evb_timer_init+
0x8/0x30)
[<c000b9f8>] (ap4evb_timer_init+0x8/0x30) from [<c0009d30>] (time_init+0x14/0x1c
)
[<c0009d30>] (time_init+0x14/0x1c) from [<c0008834>] (start_kernel+0x154/0x244)
[<c0008834>] (start_kernel+0x154/0x244) from [<40008034>] (0x40008034)
---[ end trace 1b75b31a2719ed1c ]---

Best regards
--
Kuninori Morimoto
 

Re: [PATCH 1/2] ARM: mach-shmobile: clock-sh7372: Add FSIDIV clock support

[Paul Mundt]

On Thu, Oct 14, 2010 at 05:50:42PM +0900, Kuninori Morimoto wrote:
> If I use this patch on AP4,
> It said
> 
> ------------[ cut here ]------------
> WARNING: at /opt/usr/src/WORK/morimoto/gitlinux/linux-2.6/lib/kref.c:34 kref_get
> +0x20/0x3c()
> Modules linked in:
> [<c002802c>] (unwind_backtrace+0x0/0xe4) from [<c0031154>] (warn_slowpath_common
> +0x4c/0x64)
> [<c0031154>] (warn_slowpath_common+0x4c/0x64) from [<c0031184>] (warn_slowpath_n
> ull+0x18/0x1c)
> [<c0031184>] (warn_slowpath_null+0x18/0x1c) from [<c014a798>] (kref_get+0x20/0x3
> c)
> [<c014a798>] (kref_get+0x20/0x3c) from [<c01d9fec>] (clk_register+0xdc/0x190)
> [<c01d9fec>] (clk_register+0xdc/0x190) from [<c000b8dc>] (sh7372_clock_init+0x20
> /0xcc)
> [<c000b8dc>] (sh7372_clock_init+0x20/0xcc) from [<c000b9f8>] (ap4evb_timer_init+
> 0x8/0x30)
> [<c000b9f8>] (ap4evb_timer_init+0x8/0x30) from [<c0009d30>] (time_init+0x14/0x1c
> )
> [<c0009d30>] (time_init+0x14/0x1c) from [<c0008834>] (start_kernel+0x154/0x244)
> [<c0008834>] (start_kernel+0x154/0x244) from [<40008034>] (0x40008034)
> ---[ end trace 1b75b31a2719ed1c ]---
> 
Yes, I noticed after I sent it. You can fix this by changing it to:

	if (mapping->base)
		kref_get(..)

Or I can send you an updated path if you prefer.

Re: [PATCH 1/2] ARM: mach-shmobile: clock-sh7372: Add FSIDIV clock

[Kuninori Morimoto]

Dear Paul

> Yes, I noticed after I sent it. You can fix this by changing it to:
> 
> 	if (mapping->base)
> 		kref_get(..)
> 
> Or I can send you an updated path if you prefer.

Thank you I understand.
I can modify it by myself.

Best regards
--
Kuninori Morimoto
 

[PATCH 1/2] ARM: mach-shmobile: clock-sh73a0: add FSI clock

[Kuninori Morimoto]

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
---
 arch/arm/mach-shmobile/clock-sh73a0.c |    4 +++-
 1 files changed, 3 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
index 472d1f5..77a86dd 100644
--- a/arch/arm/mach-shmobile/clock-sh73a0.c
+++ b/arch/arm/mach-shmobile/clock-sh73a0.c
@@ -477,7 +477,7 @@ enum { MSTP001,
 	MSTP129, MSTP128, MSTP127, MSTP126, MSTP125, MSTP118, MSTP116, MSTP100,
 	MSTP219,
 	MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
-	MSTP331, MSTP329, MSTP325, MSTP323, MSTP318,
+	MSTP331, MSTP329, MSTP328, MSTP325, MSTP323, MSTP318,
 	MSTP314, MSTP313, MSTP312, MSTP311,
 	MSTP303, MSTP302, MSTP301, MSTP300,
 	MSTP411, MSTP410, MSTP403,
@@ -506,6 +506,7 @@ static struct clk mstp_clks[MSTP_NR] = {
 	[MSTP200] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 0, 0), /* SCIFA4 */
 	[MSTP331] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 31, 0), /* SCIFA6 */
 	[MSTP329] = MSTP(&r_clk, SMSTPCR3, 29, 0), /* CMT10 */
+	[MSTP328] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 28, 0), /*FSI*/
 	[MSTP325] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 25, 0), /* IrDA */
 	[MSTP323] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 23, 0), /* IIC1 */
 	[MSTP318] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 18, 0), /* SY-DMAC */
@@ -561,6 +562,7 @@ static struct clk_lookup lookups[] = {
 	CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP200]), /* SCIFA4 */
 	CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP331]), /* SCIFA6 */
 	CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), /* CMT10 */
+	CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]), /* FSI */
 	CLKDEV_DEV_ID("sh_irda.0", &mstp_clks[MSTP325]), /* IrDA */
 	CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* I2C1 */
 	CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[MSTP318]), /* SY-DMAC */
-- 
1.7.5.4

[PATCH 1/2] ARM: mach-shmobile: clock-sh73a0: add FSI clock

[Kuninori Morimoto]

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
---
 arch/arm/mach-shmobile/clock-sh73a0.c |    4 +++-
 1 files changed, 3 insertions(+), 1 deletions(-)

diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c
index 472d1f5..77a86dd 100644
--- a/arch/arm/mach-shmobile/clock-sh73a0.c
+++ b/arch/arm/mach-shmobile/clock-sh73a0.c
@@ -477,7 +477,7 @@ enum { MSTP001,
 	MSTP129, MSTP128, MSTP127, MSTP126, MSTP125, MSTP118, MSTP116, MSTP100,
 	MSTP219,
 	MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
-	MSTP331, MSTP329, MSTP325, MSTP323, MSTP318,
+	MSTP331, MSTP329, MSTP328, MSTP325, MSTP323, MSTP318,
 	MSTP314, MSTP313, MSTP312, MSTP311,
 	MSTP303, MSTP302, MSTP301, MSTP300,
 	MSTP411, MSTP410, MSTP403,
@@ -506,6 +506,7 @@ static struct clk mstp_clks[MSTP_NR] = {
 	[MSTP200] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 0, 0), /* SCIFA4 */
 	[MSTP331] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 31, 0), /* SCIFA6 */
 	[MSTP329] = MSTP(&r_clk, SMSTPCR3, 29, 0), /* CMT10 */
+	[MSTP328] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 28, 0), /*FSI*/
 	[MSTP325] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 25, 0), /* IrDA */
 	[MSTP323] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 23, 0), /* IIC1 */
 	[MSTP318] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 18, 0), /* SY-DMAC */
@@ -561,6 +562,7 @@ static struct clk_lookup lookups[] = {
 	CLKDEV_DEV_ID("sh-sci.4", &mstp_clks[MSTP200]), /* SCIFA4 */
 	CLKDEV_DEV_ID("sh-sci.6", &mstp_clks[MSTP331]), /* SCIFA6 */
 	CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), /* CMT10 */
+	CLKDEV_DEV_ID("sh_fsi2", &mstp_clks[MSTP328]), /* FSI */
 	CLKDEV_DEV_ID("sh_irda.0", &mstp_clks[MSTP325]), /* IrDA */
 	CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* I2C1 */
 	CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[MSTP318]), /* SY-DMAC */
-- 
1.7.5.4