* [Qemu-devel] [PATCH] target-mips: fix translation of MT instructions
@ 2010-10-29 14:48 Nathan Froyd
2010-12-22 10:32 ` Aurelien Jarno
0 siblings, 1 reply; 2+ messages in thread
From: Nathan Froyd @ 2010-10-29 14:48 UTC (permalink / raw)
To: qemu-devel
The translation of dmt/emt/dvpe/evpe was doing the moral equivalent of:
int x;
... /* no initialization of x */
x = f (x);
which confused later bits of TCG rather badly, leading to crashes.
Fix the helpers to only return results (those instructions have no
inputs), and fix the translation code accordingly.
Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
---
target-mips/helper.h | 8 ++++----
target-mips/op_helper.c | 28 ++++++++--------------------
target-mips/translate.c | 8 ++++----
3 files changed, 16 insertions(+), 28 deletions(-)
diff --git a/target-mips/helper.h b/target-mips/helper.h
index cb13fb2..297ab64 100644
--- a/target-mips/helper.h
+++ b/target-mips/helper.h
@@ -154,10 +154,10 @@ DEF_HELPER_2(mttlo, void, tl, i32)
DEF_HELPER_2(mtthi, void, tl, i32)
DEF_HELPER_2(mttacx, void, tl, i32)
DEF_HELPER_1(mttdsp, void, tl)
-DEF_HELPER_1(dmt, tl, tl)
-DEF_HELPER_1(emt, tl, tl)
-DEF_HELPER_1(dvpe, tl, tl)
-DEF_HELPER_1(evpe, tl, tl)
+DEF_HELPER_0(dmt, tl)
+DEF_HELPER_0(emt, tl)
+DEF_HELPER_0(dvpe, tl)
+DEF_HELPER_0(evpe, tl)
#endif /* !CONFIG_USER_ONLY */
/* microMIPS functions */
diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c
index 41abd57..ec6864d 100644
--- a/target-mips/op_helper.c
+++ b/target-mips/op_helper.c
@@ -1554,40 +1554,28 @@ void helper_mttdsp(target_ulong arg1)
}
/* MIPS MT functions */
-target_ulong helper_dmt(target_ulong arg1)
+target_ulong helper_dmt(void)
{
// TODO
- arg1 = 0;
- // rt = arg1
-
- return arg1;
+ return 0;
}
-target_ulong helper_emt(target_ulong arg1)
+target_ulong helper_emt(void)
{
// TODO
- arg1 = 0;
- // rt = arg1
-
- return arg1;
+ return 0;
}
-target_ulong helper_dvpe(target_ulong arg1)
+target_ulong helper_dvpe(void)
{
// TODO
- arg1 = 0;
- // rt = arg1
-
- return arg1;
+ return 0;
}
-target_ulong helper_evpe(target_ulong arg1)
+target_ulong helper_evpe(void)
{
// TODO
- arg1 = 0;
- // rt = arg1
-
- return arg1;
+ return 0;
}
#endif /* !CONFIG_USER_ONLY */
diff --git a/target-mips/translate.c b/target-mips/translate.c
index d62c615..c4c44c1 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -12033,22 +12033,22 @@ static void decode_opc (CPUState *env, DisasContext *ctx, int *is_branch)
switch (op2) {
case OPC_DMT:
check_insn(env, ctx, ASE_MT);
- gen_helper_dmt(t0, t0);
+ gen_helper_dmt(t0);
gen_store_gpr(t0, rt);
break;
case OPC_EMT:
check_insn(env, ctx, ASE_MT);
- gen_helper_emt(t0, t0);
+ gen_helper_emt(t0);
gen_store_gpr(t0, rt);
break;
case OPC_DVPE:
check_insn(env, ctx, ASE_MT);
- gen_helper_dvpe(t0, t0);
+ gen_helper_dvpe(t0);
gen_store_gpr(t0, rt);
break;
case OPC_EVPE:
check_insn(env, ctx, ASE_MT);
- gen_helper_evpe(t0, t0);
+ gen_helper_evpe(t0);
gen_store_gpr(t0, rt);
break;
case OPC_DI:
--
1.6.3.2
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [Qemu-devel] [PATCH] target-mips: fix translation of MT instructions
2010-10-29 14:48 [Qemu-devel] [PATCH] target-mips: fix translation of MT instructions Nathan Froyd
@ 2010-12-22 10:32 ` Aurelien Jarno
0 siblings, 0 replies; 2+ messages in thread
From: Aurelien Jarno @ 2010-12-22 10:32 UTC (permalink / raw)
To: Nathan Froyd; +Cc: qemu-devel
On Fri, Oct 29, 2010 at 07:48:46AM -0700, Nathan Froyd wrote:
> The translation of dmt/emt/dvpe/evpe was doing the moral equivalent of:
>
> int x;
> ... /* no initialization of x */
> x = f (x);
>
> which confused later bits of TCG rather badly, leading to crashes.
>
> Fix the helpers to only return results (those instructions have no
> inputs), and fix the translation code accordingly.
>
> Signed-off-by: Nathan Froyd <froydnj@codesourcery.com>
Thanks, applied.
> ---
> target-mips/helper.h | 8 ++++----
> target-mips/op_helper.c | 28 ++++++++--------------------
> target-mips/translate.c | 8 ++++----
> 3 files changed, 16 insertions(+), 28 deletions(-)
>
> diff --git a/target-mips/helper.h b/target-mips/helper.h
> index cb13fb2..297ab64 100644
> --- a/target-mips/helper.h
> +++ b/target-mips/helper.h
> @@ -154,10 +154,10 @@ DEF_HELPER_2(mttlo, void, tl, i32)
> DEF_HELPER_2(mtthi, void, tl, i32)
> DEF_HELPER_2(mttacx, void, tl, i32)
> DEF_HELPER_1(mttdsp, void, tl)
> -DEF_HELPER_1(dmt, tl, tl)
> -DEF_HELPER_1(emt, tl, tl)
> -DEF_HELPER_1(dvpe, tl, tl)
> -DEF_HELPER_1(evpe, tl, tl)
> +DEF_HELPER_0(dmt, tl)
> +DEF_HELPER_0(emt, tl)
> +DEF_HELPER_0(dvpe, tl)
> +DEF_HELPER_0(evpe, tl)
> #endif /* !CONFIG_USER_ONLY */
>
> /* microMIPS functions */
> diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c
> index 41abd57..ec6864d 100644
> --- a/target-mips/op_helper.c
> +++ b/target-mips/op_helper.c
> @@ -1554,40 +1554,28 @@ void helper_mttdsp(target_ulong arg1)
> }
>
> /* MIPS MT functions */
> -target_ulong helper_dmt(target_ulong arg1)
> +target_ulong helper_dmt(void)
> {
> // TODO
> - arg1 = 0;
> - // rt = arg1
> -
> - return arg1;
> + return 0;
> }
>
> -target_ulong helper_emt(target_ulong arg1)
> +target_ulong helper_emt(void)
> {
> // TODO
> - arg1 = 0;
> - // rt = arg1
> -
> - return arg1;
> + return 0;
> }
>
> -target_ulong helper_dvpe(target_ulong arg1)
> +target_ulong helper_dvpe(void)
> {
> // TODO
> - arg1 = 0;
> - // rt = arg1
> -
> - return arg1;
> + return 0;
> }
>
> -target_ulong helper_evpe(target_ulong arg1)
> +target_ulong helper_evpe(void)
> {
> // TODO
> - arg1 = 0;
> - // rt = arg1
> -
> - return arg1;
> + return 0;
> }
> #endif /* !CONFIG_USER_ONLY */
>
> diff --git a/target-mips/translate.c b/target-mips/translate.c
> index d62c615..c4c44c1 100644
> --- a/target-mips/translate.c
> +++ b/target-mips/translate.c
> @@ -12033,22 +12033,22 @@ static void decode_opc (CPUState *env, DisasContext *ctx, int *is_branch)
> switch (op2) {
> case OPC_DMT:
> check_insn(env, ctx, ASE_MT);
> - gen_helper_dmt(t0, t0);
> + gen_helper_dmt(t0);
> gen_store_gpr(t0, rt);
> break;
> case OPC_EMT:
> check_insn(env, ctx, ASE_MT);
> - gen_helper_emt(t0, t0);
> + gen_helper_emt(t0);
> gen_store_gpr(t0, rt);
> break;
> case OPC_DVPE:
> check_insn(env, ctx, ASE_MT);
> - gen_helper_dvpe(t0, t0);
> + gen_helper_dvpe(t0);
> gen_store_gpr(t0, rt);
> break;
> case OPC_EVPE:
> check_insn(env, ctx, ASE_MT);
> - gen_helper_evpe(t0, t0);
> + gen_helper_evpe(t0);
> gen_store_gpr(t0, rt);
> break;
> case OPC_DI:
> --
> 1.6.3.2
>
>
>
--
Aurelien Jarno GPG: 1024D/F1BCDB73
aurelien@aurel32.net http://www.aurel32.net
^ permalink raw reply [flat|nested] 2+ messages in thread
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2010-10-29 14:48 [Qemu-devel] [PATCH] target-mips: fix translation of MT instructions Nathan Froyd
2010-12-22 10:32 ` Aurelien Jarno
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