State of LDP3430 platform

State of LDP3430 platform

[Russell King - ARM Linux]

As previously requested.

The following is the behaviour of the latest mainline kernel on the LDP3430
platform.

------------[ cut here ]------------
WARNING: at arch/arm/mach-omap2/omap_hwmod.c:1185 _omap_hwmod_enable+0x34/0x114()
omap_hwmod: wd_timer2: enabled state can only be entered from initialized, idle, or disabled state
Modules linked in:
---[ end trace 1b75b31a2719ed1c ]---
wd_timer2: Could not enable clocks for omap2_disable_wdt
...
Waiting 2sec before mounting root device...
mmc0: host does not support reading read-only switch. assuming write-enable.
mmc0: new high speed SD card at address 0002
mmcblk0: mmc0:0002 00000 971 MiB
 mmcblk0: p1 p2
EXT3-fs: barriers not enabled
mmcblk0: retrying using single block read
kjournald starting.  Commit interval 5 seconds
EXT3-fs (mmcblk0p2): warning: mounting fs with errors, running e2fsck is recommended
EXT3-fs (mmcblk0p2): using internal journal
EXT3-fs (mmcblk0p2): recovery complete
EXT3-fs (mmcblk0p2): mounted filesystem with writeback data mode
VFS: Mounted root (ext3 filesystem) on device 179:2.
Freeing init memory: 144K
mmcblk0: retrying using single block read
INIT: version 2.86 booting
mmcblk0: retrying using single block read
modprobe: FATAL: Could not load /lib/modules/2.6.37-rc4+/modules.dep: No such file or directory

Error opening /dev/fb0: No such device
.udev/ already exists on the static /dev!
Starting the hotplug events dispatcher udevd
udevd (429): /proc/429/oom_adj is deprecated, please use /proc/429/oom_score_adj instead.
mmcblk0: retrying using single block read
mmcblk0: retrying using single block read
Synthesizing the initial hotplug events
<spontaneous reboot>

My guess is it's the watchdog which hwmod apparantly can't deal with.
Note also LDP framebuffer doesn't appear to work in this configuration:

CONFIG_OMAP2_VRAM=y
CONFIG_OMAP2_VRFB=y
CONFIG_OMAP2_DSS=y
CONFIG_OMAP2_VRAM_SIZE=2
CONFIG_OMAP2_DSS_DEBUG_SUPPORT=y
CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS=y
CONFIG_OMAP2_DSS_DPI=y
# CONFIG_OMAP2_DSS_RFBI is not set
CONFIG_OMAP2_DSS_VENC=y
# CONFIG_OMAP2_DSS_SDI is not set
# CONFIG_OMAP2_DSS_DSI is not set
# CONFIG_OMAP2_DSS_FAKE_VSYNC is not set
CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=0
CONFIG_FB_OMAP2=y
CONFIG_FB_OMAP2_DEBUG_SUPPORT=y
CONFIG_FB_OMAP2_NUM_FBS=3

#
# OMAP2/3 Display Device Drivers
#
CONFIG_PANEL_GENERIC=y
CONFIG_PANEL_SHARP_LS037V7DW01=m

With the FB_OMAP driver, it looks like the screen isn't being correctly
driven - the openhand logo appears in outline with green splodges in
places (but unfortunately, because of the reboot, it doesn't stay there
for long enough to get a photo of it.)


Full boot messages below (with FB_OMAP2):

Texas Instruments X-Loader 1.41mmc
Starting OS Bootloader from NAND ...


U-Boot 1.1.4 (May 19 2008 - 14:27:52)

OMAP3430-GP rev 2, CPU-OPP2 L3-133MHz
OMAP3430LAB 0.1 Version + mDDR (Boot NAND)
DRAM:  128 MB
NAND:256 MiB
In:    serial
Out:   serial
Err:   serial
Battery levels: main 3863 mV, backup 2394 mV
LAN9x18 (0x92110000) detected.
Read mac address: 00:08:EE:02:24:B2
start Auto negotiation... (take ~2sec)
Auto negotiation complete, 100BaseTX, full duplex
Hit any key to stop autoboot:  0
OMAP34XX LAB # setenv bootargs 'console=ttyO2,115200n8 noinitrd vmalloc=1G mem=128M root=/dev/mmcblk0p2 rw ip=none rootdelay=2 video=omap24xxfb:rotation=270'
OMAP34XX LAB # dhcp; bootm
LAN9x18 (0x92110000) detected.
Read mac address: 00:08:EE:02:24:B2
start Auto negotiation... (take ~2sec)
Auto negotiation complete, 100BaseTX, full duplex
BOOTP broadcast 1
DHCP client bound to address 192.168.0.251
TFTP from server 192.168.0.4; our IP address is 192.168.0.251
Filename '/var/boot/kernels/arm-0008ee0224b2'.
Load address: 0x80000000
Loading: #################################################################
         #################################################################
         #################################################################
         #################################################################
         #################################################################
         #########################################
done
Bytes transferred = 1872004 (1c9084 hex)
## Booting image at 80000000 ...
   Image Name:   Linux-2.6.37-rc4+
   Image Type:   ARM Linux Kernel Image (uncompressed)
   Data Size:    1871940 Bytes =  1.8 MB
   Load Address: 80008000
   Entry Point:  80008000
   Verifying Checksum ... OK
OK

Starting kernel ...

Uncompressing Linux... done, booting the kernel.
Linux version 2.6.37-rc4+ (rmk@rmk-PC) (gcc version 4.3.5 (GCC) ) #53 Mon Dec 6 12:32:53 GMT 2010
CPU: ARMv7 Processor [411fc082] revision 2 (ARMv7), cr=10c53c7f
CPU: VIPT nonaliasing data cache, VIPT nonaliasing instruction cache
Machine: OMAP LDP board
vmalloc area is too big, limiting to 864MB
Reserving 2097152 bytes SDRAM for VRAM
Memory policy: ECC disabled, Data cache writeback
OMAP3430/3530 ES2.1 (l2cache iva sgx neon isp )
SRAM: Mapped pa 0x40200000 to va 0xfe400000 size: 0x10000
pcpu-alloc: s0 r0 d32768 u32768 alloc=1*32768
pcpu-alloc: [0] 0
Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 32000
Kernel command line: console=ttyO2,115200n8 noinitrd vmalloc=1G mem=128M root=/dev/mmcblk0p2 rw ip=none rootdelay=2 video=omap24xxfb:rotation=270
PID hash table entries: 128 (order: -3, 512 bytes)
Dentry cache hash table entries: 4096 (order: 2, 16384 bytes)
Inode-cache hash table entries: 2048 (order: 1, 8192 bytes)
Memory: 126MB = 126MB total
Memory: 124416k/124416k available, 6656k reserved, 96256K highmem
Virtual kernel memory layout:
    vector  : 0xffff0000 - 0xffff1000   (   4 kB)
    fixmap  : 0xfff00000 - 0xfffe0000   ( 896 kB)
    DMA     : 0xffc00000 - 0xffe00000   (   2 MB)
    vmalloc : 0xc2800000 - 0xf8000000   ( 856 MB)
    lowmem  : 0xc0000000 - 0xc2000000   (  32 MB)
    pkmap   : 0xbfe00000 - 0xc0000000   (   2 MB)
    modules : 0xbf000000 - 0xbfe00000   (  14 MB)
      .init : 0xc0008000 - 0xc002c000   ( 144 kB)
      .text : 0xc002c000 - 0xc0329098   (3061 kB)
      .data : 0xc032a000 - 0xc03551c0   ( 173 kB)
NR_IRQS:402
Clocking rate (Crystal/Core/MPU): 26.0/266/500 MHz
Reprogramming SDRC clock to 266000000 Hz
dpll3_m2_clk rate change failed: -22
GPMC revision 5.0
IRQ: Found an INTC at 0xfa200000 (revision 4.0) with 96 interrupts
Total of 96 interrupts on 1 active controller
OMAP GPIO hardware version 2.5
OMAP clockevent source: GPTIMER1 at 32768 Hz
Console: colour dummy device 80x30
Calibrating delay loop... 499.92 BogoMIPS (lpj=1949696)
pid_max: default: 32768 minimum: 301
Mount-cache hash table entries: 512
CPU: Testing write buffer coherency: ok
regulator: core version 0.5
regulator: dummy:
NET: Registered protocol family 16
------------[ cut here ]------------
WARNING: at arch/arm/mach-omap2/omap_hwmod.c:1185 _omap_hwmod_enable+0x34/0x114()
omap_hwmod: wd_timer2: enabled state can only be entered from initialized, idle, or disabled state
Modules linked in:
---[ end trace 1b75b31a2719ed1c ]---
wd_timer2: Could not enable clocks for omap2_disable_wdt
OMAP DMA hardware revision 4.0
bio: create slab <bio-0> at 0
SCSI subsystem initialized
i2c_omap i2c_omap.1: bus 1 rev3.12 at 2600 kHz
twl4030: PIH (irq 7) chaining IRQs 368..375
twl4030: power (irq 373) chaining IRQs 376..383
twl4030: gpio (irq 368) chaining IRQs 384..401
regulator: VMMC1: 1850 <--> 3150 mV at 3150 mV normal standby
i2c_omap i2c_omap.2: bus 2 rev3.12 at 400 kHz
i2c_omap i2c_omap.3: bus 3 rev3.12 at 400 kHz
Advanced Linux Sound Architecture Driver Version 1.0.23.
Switching to clocksource 32k_counter
NET: Registered protocol family 2
IP route cache hash table entries: 1024 (order: 0, 4096 bytes)
TCP established hash table entries: 1024 (order: 1, 8192 bytes)
TCP bind hash table entries: 1024 (order: 0, 4096 bytes)
TCP: Hash tables configured (established 1024 bind 1024)
TCP reno registered
UDP hash table entries: 256 (order: 0, 4096 bytes)
UDP-Lite hash table entries: 256 (order: 0, 4096 bytes)
NET: Registered protocol family 1
RPC: Registered udp transport module.
RPC: Registered tcp transport module.
RPC: Registered tcp NFSv4.1 backchannel transport module.
NetWinder Floating Point Emulator V0.97 (double precision)
highmem bounce pool size: 64 pages
VFS: Disk quotas dquot_6.5.2
Dquot-cache hash table entries: 1024 (order 0, 4096 bytes)
msgmni has been set to 55
io scheduler noop registered
io scheduler deadline registered
io scheduler cfq registered (default)
Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
omap-hsuart.0: ttyO0 at MMIO 0x4806a000 (irq = 72) is a OMAP UART0
omap-hsuart.1: ttyO1 at MMIO 0x4806c000 (irq = 73) is a OMAP UART1
omap-hsuart.2: ttyO2 at MMIO 0x49020000 (irq = 74) is a OMAP UART2
console [ttyO2] enabled
brd: module loaded
loop: module loaded
smsc911x: Driver version 2008-10-21.
smsc911x-mdio: probed
eth0: attached PHY driver [SMSC LAN8700] (mii_bus:phy_addr=ffffffff:01, irq=-1)
net eth0: MAC Address: 00:08:ee:02:24:b2
ads7846 spi1.0: unable to get regulator: -19
twl_rtc twl_rtc: rtc core: registered twl_rtc as rtc0
i2c /dev entries driver
Driver for 1-wire Dallas network protocol.
ALSA device list:
  No soundcards found.
TCP cubic registered
VFP support v0.3: implementor 41 architecture 3 part 30 variant c rev 1
omapfb omapfb: no displays
omapfb omapfb: failed to setup omapfb
omapfb: probe of omapfb failed with error -22
twl_rtc twl_rtc: setting system clock to 2000-01-01 00:11:25 UTC (946685485)
Waiting 2sec before mounting root device...
mmc0: host does not support reading read-only switch. assuming write-enable.
mmc0: new high speed SD card at address 0002
mmcblk0: mmc0:0002 00000 971 MiB
 mmcblk0: p1 p2
EXT3-fs: barriers not enabled
mmcblk0: retrying using single block read
kjournald starting.  Commit interval 5 seconds
EXT3-fs (mmcblk0p2): warning: mounting fs with errors, running e2fsck is recommended
EXT3-fs (mmcblk0p2): using internal journal
EXT3-fs (mmcblk0p2): recovery complete
EXT3-fs (mmcblk0p2): mounted filesystem with writeback data mode
VFS: Mounted root (ext3 filesystem) on device 179:2.
Freeing init memory: 144K
mmcblk0: retrying using single block read
INIT: version 2.86 booting
mmcblk0: retrying using single block read
modprobe: FATAL: Could not load /lib/modules/2.6.37-rc4+/modules.dep: No such file or directory

Error opening /dev/fb0: No such device
.udev/ already exists on the static /dev!
Starting the hotplug events dispatcher udevd
udevd (429): /proc/429/oom_adj is deprecated, please use /proc/429/oom_score_adj instead.
mmcblk0: retrying using single block read
mmcblk0: retrying using single block read
Synthesizing the initial hotplug events

Texas Instruments X-Loader 1.41mmc
Starting OS Bootloader from NAND ...

Re: State of LDP3430 platform

[Tony Lindgren]

* Russell King - ARM Linux <linux@arm.linux.org.uk> [101206 04:45]:
>
> ------------[ cut here ]------------
> WARNING: at arch/arm/mach-omap2/omap_hwmod.c:1185 _omap_hwmod_enable+0x34/0x114()
> omap_hwmod: wd_timer2: enabled state can only be entered from initialized, idle, or disabled state
> Modules linked in:
> ---[ end trace 1b75b31a2719ed1c ]---
> wd_timer2: Could not enable clocks for omap2_disable_wdt

It seems like there's a problem handling a watchdog that's enabled
in the bootloader.. But that's not the only problem, looks like I'm
getting this on overo:

omap_device: omap_wdt.-1: new worst case activate latency 0: 122070
OMAP Watchdog Timer Rev 0x31: initial timeout 60 sec
omap_device: omap_wdt.-1: new worst case deactivate latency 0: 30517
twl4030_wdt twl4030_wdt: Failed to register misc device
twl4030_wdt: probe of twl4030_wdt failed with error -16

Regards,

Tony
 

Re: State of LDP3430 platform

[Russell King - ARM Linux]

On Mon, Dec 06, 2010 at 07:59:59AM -0800, Tony Lindgren wrote:
> * Russell King - ARM Linux <linux@arm.linux.org.uk> [101206 04:45]:
> >
> > ------------[ cut here ]------------
> > WARNING: at arch/arm/mach-omap2/omap_hwmod.c:1185 _omap_hwmod_enable+0x34/0x114()
> > omap_hwmod: wd_timer2: enabled state can only be entered from initialized, idle, or disabled state
> > Modules linked in:
> > ---[ end trace 1b75b31a2719ed1c ]---
> > wd_timer2: Could not enable clocks for omap2_disable_wdt
> 
> It seems like there's a problem handling a watchdog that's enabled
> in the bootloader.. But that's not the only problem, looks like I'm
> getting this on overo:
> 
> omap_device: omap_wdt.-1: new worst case activate latency 0: 122070
> OMAP Watchdog Timer Rev 0x31: initial timeout 60 sec
> omap_device: omap_wdt.-1: new worst case deactivate latency 0: 30517
> twl4030_wdt twl4030_wdt: Failed to register misc device
> twl4030_wdt: probe of twl4030_wdt failed with error -16

-16 = -EBUSY, which is probably because you have two watchdogs.  The
watchdog subsystem has one minor device number, so you can only have
one watchdog registered.

Re: State of LDP3430 platform

[Tony Lindgren]

* Russell King - ARM Linux <linux@arm.linux.org.uk> [101206 09:12]:
> On Mon, Dec 06, 2010 at 07:59:59AM -0800, Tony Lindgren wrote:
> > * Russell King - ARM Linux <linux@arm.linux.org.uk> [101206 04:45]:
> > >
> > > ------------[ cut here ]------------
> > > WARNING: at arch/arm/mach-omap2/omap_hwmod.c:1185 _omap_hwmod_enable+0x34/0x114()
> > > omap_hwmod: wd_timer2: enabled state can only be entered from initialized, idle, or disabled state
> > > Modules linked in:
> > > ---[ end trace 1b75b31a2719ed1c ]---
> > > wd_timer2: Could not enable clocks for omap2_disable_wdt
> > 
> > It seems like there's a problem handling a watchdog that's enabled
> > in the bootloader.. But that's not the only problem, looks like I'm
> > getting this on overo:
> > 
> > omap_device: omap_wdt.-1: new worst case activate latency 0: 122070
> > OMAP Watchdog Timer Rev 0x31: initial timeout 60 sec
> > omap_device: omap_wdt.-1: new worst case deactivate latency 0: 30517
> > twl4030_wdt twl4030_wdt: Failed to register misc device
> > twl4030_wdt: probe of twl4030_wdt failed with error -16
> 
> -16 = -EBUSY, which is probably because you have two watchdogs.  The
> watchdog subsystem has one minor device number, so you can only have
> one watchdog registered.

Yeah that's it. Looks like omap2plus_defconfig has:

CONFIG_WATCHDOG=y
CONFIG_OMAP_WATCHDOG=y
CONFIG_TWL4030_WATCHDOG=y

Any external watchdog(s) should be set up to be secondary watchdogs
kicked by the omap watchdog as discussed earlier.

Regards,

Tony

Re: State of LDP3430 platform

[Tony Lindgren]

* Russell King - ARM Linux <linux@arm.linux.org.uk> [101206 04:45]:
>
> NET: Registered protocol family 16
> ------------[ cut here ]------------
> WARNING: at arch/arm/mach-omap2/omap_hwmod.c:1185 _omap_hwmod_enable+0x34/0x114()
> omap_hwmod: wd_timer2: enabled state can only be entered from initialized, idle, or disabled state
> Modules linked in:
> ---[ end trace 1b75b31a2719ed1c ]---
> wd_timer2: Could not enable clocks for omap2_disable_wdt

Can you check if these patches posted by Paul earlier help?

OMAP: wd_timer: update integration code to use new hwmod change
https://patchwork.kernel.org/patch/327472/

OMAP2+: wd_timer: disable on boot via hwmod postsetup mechanism
https://patchwork.kernel.org/patch/327492/

OMAP: wd_timer: remove old, dead probing code
https://patchwork.kernel.org/patch/327482/

Regards,

Tony

Re: State of LDP3430 platform

[Paul Walmsley]

On Mon, 6 Dec 2010, Tony Lindgren wrote:

> * Russell King - ARM Linux <linux@arm.linux.org.uk> [101206 04:45]:
> >
> > NET: Registered protocol family 16
> > ------------[ cut here ]------------
> > WARNING: at arch/arm/mach-omap2/omap_hwmod.c:1185 _omap_hwmod_enable+0x34/0x114()
> > omap_hwmod: wd_timer2: enabled state can only be entered from initialized, idle, or disabled state
> > Modules linked in:
> > ---[ end trace 1b75b31a2719ed1c ]---
> > wd_timer2: Could not enable clocks for omap2_disable_wdt
> 
> Can you check if these patches posted by Paul earlier help?
> 
> OMAP: wd_timer: update integration code to use new hwmod change
> https://patchwork.kernel.org/patch/327472/
> 
> OMAP2+: wd_timer: disable on boot via hwmod postsetup mechanism
> https://patchwork.kernel.org/patch/327492/
> 
> OMAP: wd_timer: remove old, dead probing code
> https://patchwork.kernel.org/patch/327482/

Just FYI, those will need this series ("OMAP2+: hwmod core upgrades 
for 2.6.38: first set") applied first:

http://www.mail-archive.com/linux-omap@vger.kernel.org/msg38632.html


- Paul

Re: State of LDP3430 platform

[Russell King - ARM Linux]

On Mon, Dec 06, 2010 at 11:27:45AM -0700, Paul Walmsley wrote:
> On Mon, 6 Dec 2010, Tony Lindgren wrote:
> 
> > * Russell King - ARM Linux <linux@arm.linux.org.uk> [101206 04:45]:
> > >
> > > NET: Registered protocol family 16
> > > ------------[ cut here ]------------
> > > WARNING: at arch/arm/mach-omap2/omap_hwmod.c:1185 _omap_hwmod_enable+0x34/0x114()
> > > omap_hwmod: wd_timer2: enabled state can only be entered from initialized, idle, or disabled state
> > > Modules linked in:
> > > ---[ end trace 1b75b31a2719ed1c ]---
> > > wd_timer2: Could not enable clocks for omap2_disable_wdt
> > 
> > Can you check if these patches posted by Paul earlier help?
> > 
> > OMAP: wd_timer: update integration code to use new hwmod change
> > https://patchwork.kernel.org/patch/327472/
> > 
> > OMAP2+: wd_timer: disable on boot via hwmod postsetup mechanism
> > https://patchwork.kernel.org/patch/327492/
> > 
> > OMAP: wd_timer: remove old, dead probing code
> > https://patchwork.kernel.org/patch/327482/
> 
> Just FYI, those will need this series ("OMAP2+: hwmod core upgrades 
> for 2.6.38: first set") applied first:
> 
> http://www.mail-archive.com/linux-omap@vger.kernel.org/msg38632.html

So LDP will remain unusable until after the 2.6.38 merge window?

Re: State of LDP3430 platform

[Paul Walmsley]

On Tue, 7 Dec 2010, Russell King - ARM Linux wrote:

> So LDP will remain unusable until after the 2.6.38 merge window?

I don't think that Tony or I realized that LDP3430 was broken until your 
E-mail.  Usually I use a BeagleBoard 35xx for OMAP3430 testing, and I 
think Tony uses an Overo.  The BeagleBoard boots cleanly with v2.6.37-rc5.

I do have a LDP3430 here though.  It doesn't boot past:

[    0.000000] Linux version 2.6.37-rc5 (paul@twilight) (gcc version 4.3.2 (Sourcery G++ Lite 2008q3-72) ) #68 SMP Tue Dec 7 17:42:20
[    0.000000] CPU: ARMv7 Processor [411fc083] revision 3 (ARMv7), cr=10c53c7f
[    0.000000] CPU: VIPT nonaliasing data cache, VIPT nonaliasing instruction cache
[    0.000000] Machine: OMAP Zoom2 board
[    0.000000] debug: ignoring loglevel setting.
[    0.000000] bootconsole [earlycon0] enabled
[    0.000000] Memory policy: ECC disabled, Data cache writeback
[    0.000000] OMAP3430/3530 ES3.1 (l2cache iva sgx neon isp )
[    0.000000] SRAM: Mapped pa 0x40200000 to va 0xfe400000 size: 0x10000

Looking into it now.


- Paul

Re: State of LDP3430 platform

[Paul Walmsley]

On Tue, 7 Dec 2010, Paul Walmsley wrote:

> I do have a LDP3430 here though.  It doesn't boot past:
> 
> [    0.000000] Linux version 2.6.37-rc5 (paul@twilight) (gcc version 4.3.2 (Sourcery G++ Lite 2008q3-72) ) #68 SMP Tue Dec 7 17:42:20
> [    0.000000] CPU: ARMv7 Processor [411fc083] revision 3 (ARMv7), cr=10c53c7f
> [    0.000000] CPU: VIPT nonaliasing data cache, VIPT nonaliasing instruction cache
> [    0.000000] Machine: OMAP Zoom2 board
> [    0.000000] debug: ignoring loglevel setting.
> [    0.000000] bootconsole [earlycon0] enabled
> [    0.000000] Memory policy: ECC disabled, Data cache writeback
> [    0.000000] OMAP3430/3530 ES3.1 (l2cache iva sgx neon isp )
> [    0.000000] SRAM: Mapped pa 0x40200000 to va 0xfe400000 size: 0x10000
> 
> Looking into it now.

My Zoom2 dies in the memset() in omap2_map_sram().  Not sure why, since 
yours seems to make it quite a bit further.  It dies in the same place 
with 2.6.36.  The Zoom2 here may be broken; it does not receive regular 
use.

Regarding the watchdog problem, unfortunately, I can't reproduce on the 
BeagleBoard with v2.6.37-rc5 with either omap2plus_defconfig or 
omap2plus_defconfig without CONFIG_WATCHDOG.  If you send along your 
.config, one of us can try to reproduce the problem with it.  Do the 
2.6.38 hwmod and wdt patchsets fix the problem for .38, at least?


- Paul

Re: State of LDP3430 platform

[Tony Lindgren]

* Paul Walmsley <paul@pwsan.com> [101207 19:30]:
> On Tue, 7 Dec 2010, Paul Walmsley wrote:
> 
> Regarding the watchdog problem, unfortunately, I can't reproduce on the 
> BeagleBoard with v2.6.37-rc5 with either omap2plus_defconfig or 
> omap2plus_defconfig without CONFIG_WATCHDOG.  If you send along your 
> .config, one of us can try to reproduce the problem with it.  Do the 
> 2.6.38 hwmod and wdt patchsets fix the problem for .38, at least?

I've been seeing this on my omap4 panda. While debugging it, I left
u-boot console only running for a few minutes to see if that stays up.
It did.. And after doing that somehow now my panda boots all the way
and stays up. Weird.

Tony

Re: State of LDP3430 platform

[Paul Walmsley]

On Fri, 14 Jan 2011, Tony Lindgren wrote:

> * Paul Walmsley <paul@pwsan.com> [101207 19:30]:
> > On Tue, 7 Dec 2010, Paul Walmsley wrote:
> > 
> > Regarding the watchdog problem, unfortunately, I can't reproduce on the 
> > BeagleBoard with v2.6.37-rc5 with either omap2plus_defconfig or 
> > omap2plus_defconfig without CONFIG_WATCHDOG.  If you send along your 
> > .config, one of us can try to reproduce the problem with it.  Do the 
> > 2.6.38 hwmod and wdt patchsets fix the problem for .38, at least?
> 
> I've been seeing this on my omap4 panda. While debugging it, I left
> u-boot console only running for a few minutes to see if that stays up.
> It did.. And after doing that somehow now my panda boots all the way
> and stays up. Weird.

Hmmm, do you think the watchdog is what's killing it?  I don't think 
leaving u-boot running would affect that?


- Paul

Re: State of LDP3430 platform

[Russell King - ARM Linux]

On Sat, Jan 15, 2011 at 12:38:46PM -0700, Paul Walmsley wrote:
> On Fri, 14 Jan 2011, Tony Lindgren wrote:
> 
> > * Paul Walmsley <paul@pwsan.com> [101207 19:30]:
> > > On Tue, 7 Dec 2010, Paul Walmsley wrote:
> > > 
> > > Regarding the watchdog problem, unfortunately, I can't reproduce on the 
> > > BeagleBoard with v2.6.37-rc5 with either omap2plus_defconfig or 
> > > omap2plus_defconfig without CONFIG_WATCHDOG.  If you send along your 
> > > .config, one of us can try to reproduce the problem with it.  Do the 
> > > 2.6.38 hwmod and wdt patchsets fix the problem for .38, at least?
> > 
> > I've been seeing this on my omap4 panda. While debugging it, I left
> > u-boot console only running for a few minutes to see if that stays up.
> > It did.. And after doing that somehow now my panda boots all the way
> > and stays up. Weird.
> 
> Hmmm, do you think the watchdog is what's killing it?  I don't think 
> leaving u-boot running would affect that?

Right, well, the LDP3430 (and probably all OMAP) is broken by my
init_sched_clock() changes because I gave up with testing on OMAP
platforms.

Why does OMAP initialize its clock sources soo late, outside of
the timer initialization?  This means you have no counter in place
(except for the jiffies counter) during early boot.

Is there a reason why OMAP uniquely does this?

RE: State of LDP3430 platform

[Woodruff, Richard]

> From: Tony Lindgren [mailto:tony@atomide.com]
> Sent: Friday, January 14, 2011 6:03 PM

> I've been seeing this on my omap4 panda. While debugging it, I left
> u-boot console only running for a few minutes to see if that stays up.
> It did.. And after doing that somehow now my panda boots all the way
> and stays up. Weird.

That is a bit weird.  U-boot doesn't do much of anything but spin waiting for characters on serial.  The watchdog normally isn't used.

Thinking back I have experienced goofiness along these lines before.  This had to do with some bad timer initial state assumptions.  The timer's count values and states entering the kernel have caused a trip up.  I had fixed some of these years back.  Its possible some could have snuck back with all the recoding.  Many times the simple have some unanticipated twist.

The watchdog is something which the old kernel used to fall on also.  There were a couple simple trip ups:
        -1- people forgot to turn clock on all together
        -2- next, it was touched before clock frame work was initialized
        -1+2- some code only 'wrote' to watchdog registers.  When memory attribute is device, generally the imprecise abort is ignored by the arm.  But some times weirdness slipped in around memory weak memory attribute mishandling.

Sounds like a fun bug/puzzle which good ole Lauterbach would help in.

Regards,
Richard W.

Re: State of LDP3430 platform

[Russell King - ARM Linux]

On Sat, Jan 15, 2011 at 11:37:44PM +0000, Russell King - ARM Linux wrote:
> On Sat, Jan 15, 2011 at 12:38:46PM -0700, Paul Walmsley wrote:
> > On Fri, 14 Jan 2011, Tony Lindgren wrote:
> > 
> > > * Paul Walmsley <paul@pwsan.com> [101207 19:30]:
> > > > On Tue, 7 Dec 2010, Paul Walmsley wrote:
> > > > 
> > > > Regarding the watchdog problem, unfortunately, I can't reproduce on the 
> > > > BeagleBoard with v2.6.37-rc5 with either omap2plus_defconfig or 
> > > > omap2plus_defconfig without CONFIG_WATCHDOG.  If you send along your 
> > > > .config, one of us can try to reproduce the problem with it.  Do the 
> > > > 2.6.38 hwmod and wdt patchsets fix the problem for .38, at least?
> > > 
> > > I've been seeing this on my omap4 panda. While debugging it, I left
> > > u-boot console only running for a few minutes to see if that stays up.
> > > It did.. And after doing that somehow now my panda boots all the way
> > > and stays up. Weird.
> > 
> > Hmmm, do you think the watchdog is what's killing it?  I don't think 
> > leaving u-boot running would affect that?
> 
> Right, well, the LDP3430 (and probably all OMAP) is broken by my
> init_sched_clock() changes because I gave up with testing on OMAP
> platforms.
> 
> Why does OMAP initialize its clock sources soo late, outside of
> the timer initialization?  This means you have no counter in place
> (except for the jiffies counter) during early boot.
> 
> Is there a reason why OMAP uniquely does this?

Right... with that initialization fixed, the LDP3430 boots, and doesn't
reboot during userspace bring-up.  However it doesn't seem to reach a
login prompt (presumably because the change of serial device naming.)

I'm still seeing a flood of MMC errors, eg:

mmcblk0: error -84 transferring data, sector 1847929, nr 184,
 cmd response 0x900, card status 0x900

This means it's regularly seeing data CRC errors.  The original kernel
supplied with the LDP3430 reports no data CRC errors.

RE: State of LDP3430 platform

[Woodruff, Richard]

> From: Russell King - ARM Linux [mailto:linux@arm.linux.org.uk]
> Sent: Saturday, January 15, 2011 5:38 PM
> Why does OMAP initialize its clock sources soo late, outside of
> the timer initialization?  This means you have no counter in place
> (except for the jiffies counter) during early boot.
>
> Is there a reason why OMAP uniquely does this?

Not any good reason.  I'm aware of historic porting issue and the missed/hidden need for early init for some time services.

1st attempts to do really early init (like 7 years back) were messed as not all kernel services used to be available when the time early time init functions happened.

It was hidden because u-boot had already turned on the same clock the kernel level driver used. So there was no failure (until the kernel used something else).

Recurring breaks & fixes happened to out of trees as owners changed.  The mainline never enabled driver till recently.

Regards,
Richard W.

Re: State of LDP3430 platform

[Russell King - ARM Linux]

On Sat, Jan 15, 2011 at 06:05:24PM -0600, Woodruff, Richard wrote:
> > From: Russell King - ARM Linux [mailto:linux@arm.linux.org.uk]
> > Sent: Saturday, January 15, 2011 5:38 PM
> > Why does OMAP initialize its clock sources soo late, outside of
> > the timer initialization?  This means you have no counter in place
> > (except for the jiffies counter) during early boot.
> >
> > Is there a reason why OMAP uniquely does this?
> 
> Not any good reason.  I'm aware of historic porting issue and the missed/
> hidden need for early init for some time services.
> 
> 1st attempts to do really early init (like 7 years back) were messed as
> not all kernel services used to be available when the time early time
> init functions happened.

The background here is:

We now have common generic sched_clock() support which provides true
full 64-bit nanosecond time measurements, as required by the scheduler
code.

We need sched_clock() initialized before the first use which matters -
which is inside sched_init().

As sched_init() is called by generic code, we don't have much choice over
where it happens during the kernel boot - any change will need a very
good justification because it's risking breaking other architectures.

The only preceding hook we have into generic code is setup_arch(), and
I now provide a .init_early platform callback to setup sched_clock().
The point at which init_sched_clock*() is called defines the sched_clock()
time zero.

However, this is too early to setup the sched_clock() keep-alive soft
timer - this is delayed until the time_init() callback.  This happens
after sched_init(), so we expect that init_sched_clock() will have been
called by this point - and given that it's already been used, this is
not an unreasonable assumption.  This is fine as we expect that the
counter backing the sched_clock() implementation will not wrap between
these two calls - and to make sure we kick off an update at this point.

So, as a platform, there are two places where init_sched_clock() is
callable - either .init_early (preferred) or the sys_timer .init method
(if it must be late).

If sched_clock() support is enabled, then init_sched_clock() must have
been called no later than the return of sys_timer .init method otherwise
you will get an oops (which is what is happening) when the first update
cycle is kicked off.

RE: State of LDP3430 platform

[Paul Walmsley]

On Sat, 15 Jan 2011, Woodruff, Richard wrote:

> Recurring breaks & fixes happened to out of trees as owners changed.  

If a change breaks something in out-of-tree code, and a patch can be 
created that is valid and correct for the mainline tree, then patches are 
certainly welcomed on the public mailing lists.


- Paul

Re: State of LDP3430 platform

[Paul Walmsley]

On Sat, 15 Jan 2011, Russell King - ARM Linux wrote:

> On Sat, Jan 15, 2011 at 12:38:46PM -0700, Paul Walmsley wrote:
> > On Fri, 14 Jan 2011, Tony Lindgren wrote:
> > 
> > > * Paul Walmsley <paul@pwsan.com> [101207 19:30]:
> > > > On Tue, 7 Dec 2010, Paul Walmsley wrote:
> > > > 
> > > > Regarding the watchdog problem, unfortunately, I can't reproduce on the 
> > > > BeagleBoard with v2.6.37-rc5 with either omap2plus_defconfig or 
> > > > omap2plus_defconfig without CONFIG_WATCHDOG.  If you send along your 
> > > > .config, one of us can try to reproduce the problem with it.  Do the 
> > > > 2.6.38 hwmod and wdt patchsets fix the problem for .38, at least?
> > > 
> > > I've been seeing this on my omap4 panda. While debugging it, I left
> > > u-boot console only running for a few minutes to see if that stays up.
> > > It did.. And after doing that somehow now my panda boots all the way
> > > and stays up. Weird.
> > 
> > Hmmm, do you think the watchdog is what's killing it?  I don't think 
> > leaving u-boot running would affect that?
> 
> Right, well, the LDP3430 (and probably all OMAP) is broken by my
> init_sched_clock() changes because I gave up with testing on OMAP
> platforms.
> 
> Why does OMAP initialize its clock sources soo late, outside of
> the timer initialization?  This means you have no counter in place
> (except for the jiffies counter) during early boot.
> 
> Is there a reason why OMAP uniquely does this?

I don't think so.

Patch attached.


- Paul


[PATCH] OMAP: counter_32k: init clocksource as part of machine timer init

Linus's master branch, currently at commit
1b59be2a6cdcb5a12e18d8315c07c94a624de48f ("Merge branch 'slab/urgent'
of git://git.kernel.org/pub/scm/linux/kernel/git/penberg/slab-2.6"),
crashes during boot on OMAP4430 ES2.0 Panda:

[    0.000000] OMAP clockevent source: GPTIMER1 at 32768 Hz
[    0.000000] Unable to handle kernel NULL pointer dereference at virtual address 00000000
[    0.000000] pgd = c0004000
[    0.000000] [00000000] *pgd=00000000
[    0.000000] Internal error: Oops: 80000005 [#1] SMP
[    0.000000] last sysfs file:
[    0.000000] Modules linked in:
[    0.000000] CPU: 0    Tainted: G        W    (2.6.37-07734-g2467802 #7)
[    0.000000] PC is at 0x0
[    0.000000] LR is at sched_clock_poll+0x2c/0x3c
[    0.000000] pc : [<00000000>]    lr : [<c0060b74>]    psr: 600001d3
[    0.000000] sp : c058bfd0  ip : c058a000  fp : 00000000
[    0.000000] r10: 00000000  r9 : 411fc092  r8 : 800330c8
[    0.000000] r7 : c05a08e0  r6 : c0034c48  r5 : c05ffc40  r4 : c0034c4c
[    0.000000] r3 : c05ffe6c  r2 : c05a0bc0  r1 : c059f098  r0 : 00000000
[    0.000000] Flags: nZCv  IRQs off  FIQs off  Mode SVC_32  ISA ARM  Segment kernel
[    0.000000] Control: 10c53c7f  Table: 8000404a  DAC: 00000017

This is due to the recent ARM init_sched_clock() changes and the late
initialization of the counter_32k clock source:

   http://marc.info/?l=linux-omap&m=129513468605208&w=2

Fix by initializing the counter_32k clocksource during the machine timer
initialization.

Reported-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Paul Walmsley <paul@pwsan.com>

---
 arch/arm/mach-omap1/time.c               |    7 +++++++
 arch/arm/mach-omap2/timer-gp.c           |   10 ++++++++--
 arch/arm/plat-omap/counter_32k.c         |    3 +--
 arch/arm/plat-omap/include/plat/common.h |    1 +
 4 files changed, 17 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c
index ed7a61f..6ec65e5 100644
--- a/arch/arm/mach-omap1/time.c
+++ b/arch/arm/mach-omap1/time.c
@@ -244,6 +244,13 @@ static void __init omap_timer_init(void)
 
 	omap_init_mpu_timer(rate);
 	omap_init_clocksource(rate);
+	/*
+	 * XXX Since this file seems to deal mostly with the MPU timer,
+	 * this doesn't seem like the correct place for the sync timer
+	 * clocksource init.
+	 */
+	if (!cpu_is_omap7xx() && !cpu_is_omap15xx())
+		omap_init_clocksource_32k();
 }
 
 struct sys_timer omap_timer = {
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c
index 4e48e78..57d53e0 100644
--- a/arch/arm/mach-omap2/timer-gp.c
+++ b/arch/arm/mach-omap2/timer-gp.c
@@ -42,6 +42,8 @@
 
 #include "timer-gp.h"
 
+#include <plat/common.h>
+
 /* MAX_GPTIMER_ID: number of GPTIMERs on the chip */
 #define MAX_GPTIMER_ID		12
 
@@ -176,10 +178,14 @@ static void __init omap2_gp_clockevent_init(void)
 /* 
  * When 32k-timer is enabled, don't use GPTimer for clocksource
  * instead, just leave default clocksource which uses the 32k
- * sync counter.  See clocksource setup in see plat-omap/common.c. 
+ * sync counter.  See clocksource setup in plat-omap/timer-32k.c
  */
 
-static inline void __init omap2_gp_clocksource_init(void) {}
+static void __init omap2_gp_clocksource_init(void)
+{
+	omap_init_clocksource_32k();
+}
+
 #else
 /*
  * clocksource
diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c
index ea46440..0367998 100644
--- a/arch/arm/plat-omap/counter_32k.c
+++ b/arch/arm/plat-omap/counter_32k.c
@@ -160,7 +160,7 @@ void read_persistent_clock(struct timespec *ts)
 	*ts = *tsp;
 }
 
-static int __init omap_init_clocksource_32k(void)
+int __init omap_init_clocksource_32k(void)
 {
 	static char err[] __initdata = KERN_ERR
 			"%s: can't register clocksource!\n";
@@ -195,7 +195,6 @@ static int __init omap_init_clocksource_32k(void)
 	}
 	return 0;
 }
-arch_initcall(omap_init_clocksource_32k);
 
 #endif	/* !(defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP15XX)) */
 
diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h
index 6b8088e..84c707f 100644
--- a/arch/arm/plat-omap/include/plat/common.h
+++ b/arch/arm/plat-omap/include/plat/common.h
@@ -35,6 +35,7 @@ struct sys_timer;
 
 extern void omap_map_common_io(void);
 extern struct sys_timer omap_timer;
+extern int __init omap_init_clocksource_32k(void);
 
 extern void omap_reserve(void);
 
-- 
1.7.2.3

State of LDP3430 platform

[Paul Walmsley]

On Sat, 15 Jan 2011, Russell King - ARM Linux wrote:

> On Sat, Jan 15, 2011 at 12:38:46PM -0700, Paul Walmsley wrote:
> > On Fri, 14 Jan 2011, Tony Lindgren wrote:
> > 
> > > * Paul Walmsley <paul@pwsan.com> [101207 19:30]:
> > > > On Tue, 7 Dec 2010, Paul Walmsley wrote:
> > > > 
> > > > Regarding the watchdog problem, unfortunately, I can't reproduce on the 
> > > > BeagleBoard with v2.6.37-rc5 with either omap2plus_defconfig or 
> > > > omap2plus_defconfig without CONFIG_WATCHDOG.  If you send along your 
> > > > .config, one of us can try to reproduce the problem with it.  Do the 
> > > > 2.6.38 hwmod and wdt patchsets fix the problem for .38, at least?
> > > 
> > > I've been seeing this on my omap4 panda. While debugging it, I left
> > > u-boot console only running for a few minutes to see if that stays up.
> > > It did.. And after doing that somehow now my panda boots all the way
> > > and stays up. Weird.
> > 
> > Hmmm, do you think the watchdog is what's killing it?  I don't think 
> > leaving u-boot running would affect that?
> 
> Right, well, the LDP3430 (and probably all OMAP) is broken by my
> init_sched_clock() changes because I gave up with testing on OMAP
> platforms.
> 
> Why does OMAP initialize its clock sources soo late, outside of
> the timer initialization?  This means you have no counter in place
> (except for the jiffies counter) during early boot.
> 
> Is there a reason why OMAP uniquely does this?

I don't think so.

Patch attached.


- Paul


[PATCH] OMAP: counter_32k: init clocksource as part of machine timer init

Linus's master branch, currently at commit
1b59be2a6cdcb5a12e18d8315c07c94a624de48f ("Merge branch 'slab/urgent'
of git://git.kernel.org/pub/scm/linux/kernel/git/penberg/slab-2.6"),
crashes during boot on OMAP4430 ES2.0 Panda:

[    0.000000] OMAP clockevent source: GPTIMER1 at 32768 Hz
[    0.000000] Unable to handle kernel NULL pointer dereference at virtual address 00000000
[    0.000000] pgd = c0004000
[    0.000000] [00000000] *pgd=00000000
[    0.000000] Internal error: Oops: 80000005 [#1] SMP
[    0.000000] last sysfs file:
[    0.000000] Modules linked in:
[    0.000000] CPU: 0    Tainted: G        W    (2.6.37-07734-g2467802 #7)
[    0.000000] PC is at 0x0
[    0.000000] LR is at sched_clock_poll+0x2c/0x3c
[    0.000000] pc : [<00000000>]    lr : [<c0060b74>]    psr: 600001d3
[    0.000000] sp : c058bfd0  ip : c058a000  fp : 00000000
[    0.000000] r10: 00000000  r9 : 411fc092  r8 : 800330c8
[    0.000000] r7 : c05a08e0  r6 : c0034c48  r5 : c05ffc40  r4 : c0034c4c
[    0.000000] r3 : c05ffe6c  r2 : c05a0bc0  r1 : c059f098  r0 : 00000000
[    0.000000] Flags: nZCv  IRQs off  FIQs off  Mode SVC_32  ISA ARM  Segment kernel
[    0.000000] Control: 10c53c7f  Table: 8000404a  DAC: 00000017

This is due to the recent ARM init_sched_clock() changes and the late
initialization of the counter_32k clock source:

   http://marc.info/?l=linux-omap&m=129513468605208&w=2

Fix by initializing the counter_32k clocksource during the machine timer
initialization.

Reported-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Paul Walmsley <paul@pwsan.com>

---
 arch/arm/mach-omap1/time.c               |    7 +++++++
 arch/arm/mach-omap2/timer-gp.c           |   10 ++++++++--
 arch/arm/plat-omap/counter_32k.c         |    3 +--
 arch/arm/plat-omap/include/plat/common.h |    1 +
 4 files changed, 17 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c
index ed7a61f..6ec65e5 100644
--- a/arch/arm/mach-omap1/time.c
+++ b/arch/arm/mach-omap1/time.c
@@ -244,6 +244,13 @@ static void __init omap_timer_init(void)
 
 	omap_init_mpu_timer(rate);
 	omap_init_clocksource(rate);
+	/*
+	 * XXX Since this file seems to deal mostly with the MPU timer,
+	 * this doesn't seem like the correct place for the sync timer
+	 * clocksource init.
+	 */
+	if (!cpu_is_omap7xx() && !cpu_is_omap15xx())
+		omap_init_clocksource_32k();
 }
 
 struct sys_timer omap_timer = {
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c
index 4e48e78..57d53e0 100644
--- a/arch/arm/mach-omap2/timer-gp.c
+++ b/arch/arm/mach-omap2/timer-gp.c
@@ -42,6 +42,8 @@
 
 #include "timer-gp.h"
 
+#include <plat/common.h>
+
 /* MAX_GPTIMER_ID: number of GPTIMERs on the chip */
 #define MAX_GPTIMER_ID		12
 
@@ -176,10 +178,14 @@ static void __init omap2_gp_clockevent_init(void)
 /* 
  * When 32k-timer is enabled, don't use GPTimer for clocksource
  * instead, just leave default clocksource which uses the 32k
- * sync counter.  See clocksource setup in see plat-omap/common.c. 
+ * sync counter.  See clocksource setup in plat-omap/timer-32k.c
  */
 
-static inline void __init omap2_gp_clocksource_init(void) {}
+static void __init omap2_gp_clocksource_init(void)
+{
+	omap_init_clocksource_32k();
+}
+
 #else
 /*
  * clocksource
diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c
index ea46440..0367998 100644
--- a/arch/arm/plat-omap/counter_32k.c
+++ b/arch/arm/plat-omap/counter_32k.c
@@ -160,7 +160,7 @@ void read_persistent_clock(struct timespec *ts)
 	*ts = *tsp;
 }
 
-static int __init omap_init_clocksource_32k(void)
+int __init omap_init_clocksource_32k(void)
 {
 	static char err[] __initdata = KERN_ERR
 			"%s: can't register clocksource!\n";
@@ -195,7 +195,6 @@ static int __init omap_init_clocksource_32k(void)
 	}
 	return 0;
 }
-arch_initcall(omap_init_clocksource_32k);
 
 #endif	/* !(defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP15XX)) */
 
diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h
index 6b8088e..84c707f 100644
--- a/arch/arm/plat-omap/include/plat/common.h
+++ b/arch/arm/plat-omap/include/plat/common.h
@@ -35,6 +35,7 @@ struct sys_timer;
 
 extern void omap_map_common_io(void);
 extern struct sys_timer omap_timer;
+extern int __init omap_init_clocksource_32k(void);
 
 extern void omap_reserve(void);
 
-- 
1.7.2.3

Re: State of LDP3430 platform

[Thomas Weber]

Am 16.01.2011 05:32, schrieb Paul Walmsley:
> On Sat, 15 Jan 2011, Russell King - ARM Linux wrote:
>
>> On Sat, Jan 15, 2011 at 12:38:46PM -0700, Paul Walmsley wrote:
>>> On Fri, 14 Jan 2011, Tony Lindgren wrote:
>>>
>>>> * Paul Walmsley <paul@pwsan.com> [101207 19:30]:
>>>>> On Tue, 7 Dec 2010, Paul Walmsley wrote:
>>>>>
>>>>> Regarding the watchdog problem, unfortunately, I can't reproduce on the 
>>>>> BeagleBoard with v2.6.37-rc5 with either omap2plus_defconfig or 
>>>>> omap2plus_defconfig without CONFIG_WATCHDOG.  If you send along your 
>>>>> .config, one of us can try to reproduce the problem with it.  Do the 
>>>>> 2.6.38 hwmod and wdt patchsets fix the problem for .38, at least?
>>>> I've been seeing this on my omap4 panda. While debugging it, I left
>>>> u-boot console only running for a few minutes to see if that stays up.
>>>> It did.. And after doing that somehow now my panda boots all the way
>>>> and stays up. Weird.
>>> Hmmm, do you think the watchdog is what's killing it?  I don't think 
>>> leaving u-boot running would affect that?
>> Right, well, the LDP3430 (and probably all OMAP) is broken by my
>> init_sched_clock() changes because I gave up with testing on OMAP
>> platforms.
>>
>> Why does OMAP initialize its clock sources soo late, outside of
>> the timer initialization?  This means you have no counter in place
>> (except for the jiffies counter) during early boot.
>>
>> Is there a reason why OMAP uniquely does this?
> I don't think so.
>
> Patch attached.
>
>
> - Paul
>
>
> [PATCH] OMAP: counter_32k: init clocksource as part of machine timer init
>
> Linus's master branch, currently at commit
> 1b59be2a6cdcb5a12e18d8315c07c94a624de48f ("Merge branch 'slab/urgent'
> of git://git.kernel.org/pub/scm/linux/kernel/git/penberg/slab-2.6"),
> crashes during boot on OMAP4430 ES2.0 Panda:
>
> [    0.000000] OMAP clockevent source: GPTIMER1 at 32768 Hz
> [    0.000000] Unable to handle kernel NULL pointer dereference at virtual address 00000000
> [    0.000000] pgd = c0004000
> [    0.000000] [00000000] *pgd=00000000
> [    0.000000] Internal error: Oops: 80000005 [#1] SMP
> [    0.000000] last sysfs file:
> [    0.000000] Modules linked in:
> [    0.000000] CPU: 0    Tainted: G        W    (2.6.37-07734-g2467802 #7)
> [    0.000000] PC is at 0x0
> [    0.000000] LR is at sched_clock_poll+0x2c/0x3c
> [    0.000000] pc : [<00000000>]    lr : [<c0060b74>]    psr: 600001d3
> [    0.000000] sp : c058bfd0  ip : c058a000  fp : 00000000
> [    0.000000] r10: 00000000  r9 : 411fc092  r8 : 800330c8
> [    0.000000] r7 : c05a08e0  r6 : c0034c48  r5 : c05ffc40  r4 : c0034c4c
> [    0.000000] r3 : c05ffe6c  r2 : c05a0bc0  r1 : c059f098  r0 : 00000000
> [    0.000000] Flags: nZCv  IRQs off  FIQs off  Mode SVC_32  ISA ARM  Segment kernel
> [    0.000000] Control: 10c53c7f  Table: 8000404a  DAC: 00000017
>
> This is due to the recent ARM init_sched_clock() changes and the late
> initialization of the counter_32k clock source:
>
>    http://marc.info/?l=linux-omap&m=129513468605208&w=2
>
> Fix by initializing the counter_32k clocksource during the machine timer
> initialization.
>
> Reported-by: Russell King <rmk+kernel@arm.linux.org.uk>
> Signed-off-by: Paul Walmsley <paul@pwsan.com>
>
> ---
>  arch/arm/mach-omap1/time.c               |    7 +++++++
>  arch/arm/mach-omap2/timer-gp.c           |   10 ++++++++--
>  arch/arm/plat-omap/counter_32k.c         |    3 +--
>  arch/arm/plat-omap/include/plat/common.h |    1 +
>  4 files changed, 17 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c
> index ed7a61f..6ec65e5 100644
> --- a/arch/arm/mach-omap1/time.c
> +++ b/arch/arm/mach-omap1/time.c
> @@ -244,6 +244,13 @@ static void __init omap_timer_init(void)
>  
>  	omap_init_mpu_timer(rate);
>  	omap_init_clocksource(rate);
> +	/*
> +	 * XXX Since this file seems to deal mostly with the MPU timer,
> +	 * this doesn't seem like the correct place for the sync timer
> +	 * clocksource init.
> +	 */
> +	if (!cpu_is_omap7xx() && !cpu_is_omap15xx())
> +		omap_init_clocksource_32k();
>  }
>  
>  struct sys_timer omap_timer = {
> diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c
> index 4e48e78..57d53e0 100644
> --- a/arch/arm/mach-omap2/timer-gp.c
> +++ b/arch/arm/mach-omap2/timer-gp.c
> @@ -42,6 +42,8 @@
>  
>  #include "timer-gp.h"
>  
> +#include <plat/common.h>
> +
>  /* MAX_GPTIMER_ID: number of GPTIMERs on the chip */
>  #define MAX_GPTIMER_ID		12
>  
> @@ -176,10 +178,14 @@ static void __init omap2_gp_clockevent_init(void)
>  /* 
>   * When 32k-timer is enabled, don't use GPTimer for clocksource
>   * instead, just leave default clocksource which uses the 32k
> - * sync counter.  See clocksource setup in see plat-omap/common.c. 
> + * sync counter.  See clocksource setup in plat-omap/timer-32k.c
>   */
>  
> -static inline void __init omap2_gp_clocksource_init(void) {}
> +static void __init omap2_gp_clocksource_init(void)
> +{
> +	omap_init_clocksource_32k();
> +}
> +
>  #else
>  /*
>   * clocksource
> diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c
> index ea46440..0367998 100644
> --- a/arch/arm/plat-omap/counter_32k.c
> +++ b/arch/arm/plat-omap/counter_32k.c
> @@ -160,7 +160,7 @@ void read_persistent_clock(struct timespec *ts)
>  	*ts = *tsp;
>  }
>  
> -static int __init omap_init_clocksource_32k(void)
> +int __init omap_init_clocksource_32k(void)
>  {
>  	static char err[] __initdata = KERN_ERR
>  			"%s: can't register clocksource!\n";
> @@ -195,7 +195,6 @@ static int __init omap_init_clocksource_32k(void)
>  	}
>  	return 0;
>  }
> -arch_initcall(omap_init_clocksource_32k);
>  
>  #endif	/* !(defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP15XX)) */
>  
> diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h
> index 6b8088e..84c707f 100644
> --- a/arch/arm/plat-omap/include/plat/common.h
> +++ b/arch/arm/plat-omap/include/plat/common.h
> @@ -35,6 +35,7 @@ struct sys_timer;
>  
>  extern void omap_map_common_io(void);
>  extern struct sys_timer omap_timer;
> +extern int __init omap_init_clocksource_32k(void);
>  
>  extern void omap_reserve(void);
>  

This patch works on Devkit8000. Thanks.

Tested-by: Thomas Weber <weber@corscience.de>

State of LDP3430 platform

[Thomas Weber]

Am 16.01.2011 05:32, schrieb Paul Walmsley:
> On Sat, 15 Jan 2011, Russell King - ARM Linux wrote:
>
>> On Sat, Jan 15, 2011 at 12:38:46PM -0700, Paul Walmsley wrote:
>>> On Fri, 14 Jan 2011, Tony Lindgren wrote:
>>>
>>>> * Paul Walmsley <paul@pwsan.com> [101207 19:30]:
>>>>> On Tue, 7 Dec 2010, Paul Walmsley wrote:
>>>>>
>>>>> Regarding the watchdog problem, unfortunately, I can't reproduce on the 
>>>>> BeagleBoard with v2.6.37-rc5 with either omap2plus_defconfig or 
>>>>> omap2plus_defconfig without CONFIG_WATCHDOG.  If you send along your 
>>>>> .config, one of us can try to reproduce the problem with it.  Do the 
>>>>> 2.6.38 hwmod and wdt patchsets fix the problem for .38, at least?
>>>> I've been seeing this on my omap4 panda. While debugging it, I left
>>>> u-boot console only running for a few minutes to see if that stays up.
>>>> It did.. And after doing that somehow now my panda boots all the way
>>>> and stays up. Weird.
>>> Hmmm, do you think the watchdog is what's killing it?  I don't think 
>>> leaving u-boot running would affect that?
>> Right, well, the LDP3430 (and probably all OMAP) is broken by my
>> init_sched_clock() changes because I gave up with testing on OMAP
>> platforms.
>>
>> Why does OMAP initialize its clock sources soo late, outside of
>> the timer initialization?  This means you have no counter in place
>> (except for the jiffies counter) during early boot.
>>
>> Is there a reason why OMAP uniquely does this?
> I don't think so.
>
> Patch attached.
>
>
> - Paul
>
>
> [PATCH] OMAP: counter_32k: init clocksource as part of machine timer init
>
> Linus's master branch, currently at commit
> 1b59be2a6cdcb5a12e18d8315c07c94a624de48f ("Merge branch 'slab/urgent'
> of git://git.kernel.org/pub/scm/linux/kernel/git/penberg/slab-2.6"),
> crashes during boot on OMAP4430 ES2.0 Panda:
>
> [    0.000000] OMAP clockevent source: GPTIMER1 at 32768 Hz
> [    0.000000] Unable to handle kernel NULL pointer dereference at virtual address 00000000
> [    0.000000] pgd = c0004000
> [    0.000000] [00000000] *pgd=00000000
> [    0.000000] Internal error: Oops: 80000005 [#1] SMP
> [    0.000000] last sysfs file:
> [    0.000000] Modules linked in:
> [    0.000000] CPU: 0    Tainted: G        W    (2.6.37-07734-g2467802 #7)
> [    0.000000] PC is at 0x0
> [    0.000000] LR is at sched_clock_poll+0x2c/0x3c
> [    0.000000] pc : [<00000000>]    lr : [<c0060b74>]    psr: 600001d3
> [    0.000000] sp : c058bfd0  ip : c058a000  fp : 00000000
> [    0.000000] r10: 00000000  r9 : 411fc092  r8 : 800330c8
> [    0.000000] r7 : c05a08e0  r6 : c0034c48  r5 : c05ffc40  r4 : c0034c4c
> [    0.000000] r3 : c05ffe6c  r2 : c05a0bc0  r1 : c059f098  r0 : 00000000
> [    0.000000] Flags: nZCv  IRQs off  FIQs off  Mode SVC_32  ISA ARM  Segment kernel
> [    0.000000] Control: 10c53c7f  Table: 8000404a  DAC: 00000017
>
> This is due to the recent ARM init_sched_clock() changes and the late
> initialization of the counter_32k clock source:
>
>    http://marc.info/?l=linux-omap&m=129513468605208&w=2
>
> Fix by initializing the counter_32k clocksource during the machine timer
> initialization.
>
> Reported-by: Russell King <rmk+kernel@arm.linux.org.uk>
> Signed-off-by: Paul Walmsley <paul@pwsan.com>
>
> ---
>  arch/arm/mach-omap1/time.c               |    7 +++++++
>  arch/arm/mach-omap2/timer-gp.c           |   10 ++++++++--
>  arch/arm/plat-omap/counter_32k.c         |    3 +--
>  arch/arm/plat-omap/include/plat/common.h |    1 +
>  4 files changed, 17 insertions(+), 4 deletions(-)
>
> diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c
> index ed7a61f..6ec65e5 100644
> --- a/arch/arm/mach-omap1/time.c
> +++ b/arch/arm/mach-omap1/time.c
> @@ -244,6 +244,13 @@ static void __init omap_timer_init(void)
>  
>  	omap_init_mpu_timer(rate);
>  	omap_init_clocksource(rate);
> +	/*
> +	 * XXX Since this file seems to deal mostly with the MPU timer,
> +	 * this doesn't seem like the correct place for the sync timer
> +	 * clocksource init.
> +	 */
> +	if (!cpu_is_omap7xx() && !cpu_is_omap15xx())
> +		omap_init_clocksource_32k();
>  }
>  
>  struct sys_timer omap_timer = {
> diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c
> index 4e48e78..57d53e0 100644
> --- a/arch/arm/mach-omap2/timer-gp.c
> +++ b/arch/arm/mach-omap2/timer-gp.c
> @@ -42,6 +42,8 @@
>  
>  #include "timer-gp.h"
>  
> +#include <plat/common.h>
> +
>  /* MAX_GPTIMER_ID: number of GPTIMERs on the chip */
>  #define MAX_GPTIMER_ID		12
>  
> @@ -176,10 +178,14 @@ static void __init omap2_gp_clockevent_init(void)
>  /* 
>   * When 32k-timer is enabled, don't use GPTimer for clocksource
>   * instead, just leave default clocksource which uses the 32k
> - * sync counter.  See clocksource setup in see plat-omap/common.c. 
> + * sync counter.  See clocksource setup in plat-omap/timer-32k.c
>   */
>  
> -static inline void __init omap2_gp_clocksource_init(void) {}
> +static void __init omap2_gp_clocksource_init(void)
> +{
> +	omap_init_clocksource_32k();
> +}
> +
>  #else
>  /*
>   * clocksource
> diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c
> index ea46440..0367998 100644
> --- a/arch/arm/plat-omap/counter_32k.c
> +++ b/arch/arm/plat-omap/counter_32k.c
> @@ -160,7 +160,7 @@ void read_persistent_clock(struct timespec *ts)
>  	*ts = *tsp;
>  }
>  
> -static int __init omap_init_clocksource_32k(void)
> +int __init omap_init_clocksource_32k(void)
>  {
>  	static char err[] __initdata = KERN_ERR
>  			"%s: can't register clocksource!\n";
> @@ -195,7 +195,6 @@ static int __init omap_init_clocksource_32k(void)
>  	}
>  	return 0;
>  }
> -arch_initcall(omap_init_clocksource_32k);
>  
>  #endif	/* !(defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP15XX)) */
>  
> diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h
> index 6b8088e..84c707f 100644
> --- a/arch/arm/plat-omap/include/plat/common.h
> +++ b/arch/arm/plat-omap/include/plat/common.h
> @@ -35,6 +35,7 @@ struct sys_timer;
>  
>  extern void omap_map_common_io(void);
>  extern struct sys_timer omap_timer;
> +extern int __init omap_init_clocksource_32k(void);
>  
>  extern void omap_reserve(void);
>  

This patch works on Devkit8000. Thanks.

Tested-by: Thomas Weber <weber@corscience.de>

Re: State of LDP3430 platform

[Tony Lindgren]

* Woodruff, Richard <r-woodruff2@ti.com> [110115 15:48]:
> 
> > From: Tony Lindgren [mailto:tony@atomide.com]
> > Sent: Friday, January 14, 2011 6:03 PM
> 
> > I've been seeing this on my omap4 panda. While debugging it, I left
> > u-boot console only running for a few minutes to see if that stays up.
> > It did.. And after doing that somehow now my panda boots all the way
> > and stays up. Weird.
> 
> That is a bit weird.  U-boot doesn't do much of anything but spin waiting for characters on serial.  The watchdog normally isn't used.
> 
> Thinking back I have experienced goofiness along these lines before.  This had to do with some bad timer initial state assumptions.  The timer's count values and states entering the kernel have caused a trip up.  I had fixed some of these years back.  Its possible some could have snuck back with all the recoding.  Many times the simple have some unanticipated twist.
> 
> The watchdog is something which the old kernel used to fall on also.  There were a couple simple trip ups:
>         -1- people forgot to turn clock on all together
>         -2- next, it was touched before clock frame work was initialized
>         -1+2- some code only 'wrote' to watchdog registers.  When memory attribute is device, generally the imprecise abort is ignored by the arm.  But some times weirdness slipped in around memory weak memory attribute mishandling.
> 
> Sounds like a fun bug/puzzle which good ole Lauterbach would help in.

This happened for a few days both with 2.6.37 and current mainline
kernel. After I started debugging it went away with no changes to
anything.. So can't debug any further at this point unfortunately.

Regards,

Tony

RE: State of LDP3430 platform

[Woodruff, Richard]

> From: Tony Lindgren [mailto:tony@atomide.com]
> Sent: Monday, January 17, 2011 11:35 AM

> This happened for a few days both with 2.6.37 and current mainline
> kernel. After I started debugging it went away with no changes to
> anything.. So can't debug any further at this point unfortunately.

Odd. You might experiment with cold reset vs. warm reset for booting.  Initial values of some blocks will be different.

Reset tree is something not usually considered. The behavior depends on what level and when it is asserted. Software tends to act like all resets have same effect and this is not the case. I've seen folks burned in PM context several times at both OMAP and PMIC level.

Also... something happen behind your back.  You can program up the PMIC to take a softreset and issue a hardreset.

Regards,
Richard W.

Re: State of LDP3430 platform

[Tony Lindgren]

Hi,

* Paul Walmsley <paul@pwsan.com> [110115 20:31]:
> --- a/arch/arm/mach-omap1/time.c
> +++ b/arch/arm/mach-omap1/time.c
> @@ -244,6 +244,13 @@ static void __init omap_timer_init(void)
>  
>  	omap_init_mpu_timer(rate);
>  	omap_init_clocksource(rate);
> +	/*
> +	 * XXX Since this file seems to deal mostly with the MPU timer,
> +	 * this doesn't seem like the correct place for the sync timer
> +	 * clocksource init.
> +	 */
> +	if (!cpu_is_omap7xx() && !cpu_is_omap15xx())
> +		omap_init_clocksource_32k();
>  }
>  
>  struct sys_timer omap_timer = {

To me it looks like the omap_init_clocksource_32k() call should be
in arch/arm/mach-omap1/timer32k.c instead.

Regards,

Tony

State of LDP3430 platform

[Tony Lindgren]

Hi,

* Paul Walmsley <paul@pwsan.com> [110115 20:31]:
> --- a/arch/arm/mach-omap1/time.c
> +++ b/arch/arm/mach-omap1/time.c
> @@ -244,6 +244,13 @@ static void __init omap_timer_init(void)
>  
>  	omap_init_mpu_timer(rate);
>  	omap_init_clocksource(rate);
> +	/*
> +	 * XXX Since this file seems to deal mostly with the MPU timer,
> +	 * this doesn't seem like the correct place for the sync timer
> +	 * clocksource init.
> +	 */
> +	if (!cpu_is_omap7xx() && !cpu_is_omap15xx())
> +		omap_init_clocksource_32k();
>  }
>  
>  struct sys_timer omap_timer = {

To me it looks like the omap_init_clocksource_32k() call should be
in arch/arm/mach-omap1/timer32k.c instead.

Regards,

Tony

Re: State of LDP3430 platform

[Paul Walmsley]

On Mon, 17 Jan 2011, Tony Lindgren wrote:

> * Paul Walmsley <paul@pwsan.com> [110115 20:31]:
> > --- a/arch/arm/mach-omap1/time.c
> > +++ b/arch/arm/mach-omap1/time.c
> > @@ -244,6 +244,13 @@ static void __init omap_timer_init(void)
> >  
> >  	omap_init_mpu_timer(rate);
> >  	omap_init_clocksource(rate);
> > +	/*
> > +	 * XXX Since this file seems to deal mostly with the MPU timer,
> > +	 * this doesn't seem like the correct place for the sync timer
> > +	 * clocksource init.
> > +	 */
> > +	if (!cpu_is_omap7xx() && !cpu_is_omap15xx())
> > +		omap_init_clocksource_32k();
> >  }
> >  
> >  struct sys_timer omap_timer = {
> 
> To me it looks like the omap_init_clocksource_32k() call should be
> in arch/arm/mach-omap1/timer32k.c instead.

Just FYI for the lists; Tony and I talked about this off-list; he'll deal 
with this in a subsequent patch to avoid changing the OMAP1 clocksource 
behavior during this patch.


- Paul

State of LDP3430 platform

[Paul Walmsley]

On Mon, 17 Jan 2011, Tony Lindgren wrote:

> * Paul Walmsley <paul@pwsan.com> [110115 20:31]:
> > --- a/arch/arm/mach-omap1/time.c
> > +++ b/arch/arm/mach-omap1/time.c
> > @@ -244,6 +244,13 @@ static void __init omap_timer_init(void)
> >  
> >  	omap_init_mpu_timer(rate);
> >  	omap_init_clocksource(rate);
> > +	/*
> > +	 * XXX Since this file seems to deal mostly with the MPU timer,
> > +	 * this doesn't seem like the correct place for the sync timer
> > +	 * clocksource init.
> > +	 */
> > +	if (!cpu_is_omap7xx() && !cpu_is_omap15xx())
> > +		omap_init_clocksource_32k();
> >  }
> >  
> >  struct sys_timer omap_timer = {
> 
> To me it looks like the omap_init_clocksource_32k() call should be
> in arch/arm/mach-omap1/timer32k.c instead.

Just FYI for the lists; Tony and I talked about this off-list; he'll deal 
with this in a subsequent patch to avoid changing the OMAP1 clocksource 
behavior during this patch.


- Paul

Re: State of LDP3430 platform

[Paul Walmsley]

Here's a slightly updated version of this patch, fixing a bug in one of 
the comments, and revising the commit message.  There's no functional 
difference between this and the previous version of this patch.


- Paul

[PATCH] OMAP: counter_32k: init clocksource as part of machine timer init

After commit dc548fbbd2ecd0fc3b02301d551e5f8e19ae58fd ("ARM: omap: convert 
sched_clock() to use new infrastructure"), OMAPs that use the 32KiHz 
"synchronization timer" as their clocksource crash during boot:

[    0.000000] OMAP clockevent source: GPTIMER1 at 32768 Hz
[    0.000000] Unable to handle kernel NULL pointer dereference at virtual address 00000000
[    0.000000] pgd = c0004000
[    0.000000] [00000000] *pgd=00000000
[    0.000000] Internal error: Oops: 80000005 [#1] SMP
[    0.000000] last sysfs file:
[    0.000000] Modules linked in:
[    0.000000] CPU: 0    Tainted: G        W    (2.6.37-07734-g2467802 #7)
[    0.000000] PC is at 0x0
[    0.000000] LR is at sched_clock_poll+0x2c/0x3c
[    0.000000] pc : [<00000000>]    lr : [<c0060b74>]    psr: 600001d3
[    0.000000] sp : c058bfd0  ip : c058a000  fp : 00000000
[    0.000000] r10: 00000000  r9 : 411fc092  r8 : 800330c8
[    0.000000] r7 : c05a08e0  r6 : c0034c48  r5 : c05ffc40  r4 : c0034c4c
[    0.000000] r3 : c05ffe6c  r2 : c05a0bc0  r1 : c059f098  r0 : 00000000
[    0.000000] Flags: nZCv  IRQs off  FIQs off  Mode SVC_32  ISA ARM  Segment kernel
[    0.000000] Control: 10c53c7f  Table: 8000404a  DAC: 00000017

This is due to the recent ARM init_sched_clock() changes and the late
initialization of the counter_32k clock source.  More information here:

   http://marc.info/?l=linux-omap&m=129513468605208&w=2

Fix by initializing the counter_32k clocksource during the machine timer
initialization.

Reported-by: Russell King <rmk+kernel@arm.linux.org.uk>
Tested-by: Thomas Weber <weber@corscience.de>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
---
 arch/arm/mach-omap1/time.c               |    7 +++++++
 arch/arm/mach-omap2/timer-gp.c           |   10 ++++++++--
 arch/arm/plat-omap/counter_32k.c         |    3 +--
 arch/arm/plat-omap/include/plat/common.h |    1 +
 4 files changed, 17 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c
index ed7a61f..6ec65e5 100644
--- a/arch/arm/mach-omap1/time.c
+++ b/arch/arm/mach-omap1/time.c
@@ -244,6 +244,13 @@ static void __init omap_timer_init(void)
 
 	omap_init_mpu_timer(rate);
 	omap_init_clocksource(rate);
+	/*
+	 * XXX Since this file seems to deal mostly with the MPU timer,
+	 * this doesn't seem like the correct place for the sync timer
+	 * clocksource init.
+	 */
+	if (!cpu_is_omap7xx() && !cpu_is_omap15xx())
+		omap_init_clocksource_32k();
 }
 
 struct sys_timer omap_timer = {
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c
index 4e48e78..7b7c268 100644
--- a/arch/arm/mach-omap2/timer-gp.c
+++ b/arch/arm/mach-omap2/timer-gp.c
@@ -42,6 +42,8 @@
 
 #include "timer-gp.h"
 
+#include <plat/common.h>
+
 /* MAX_GPTIMER_ID: number of GPTIMERs on the chip */
 #define MAX_GPTIMER_ID		12
 
@@ -176,10 +178,14 @@ static void __init omap2_gp_clockevent_init(void)
 /* 
  * When 32k-timer is enabled, don't use GPTimer for clocksource
  * instead, just leave default clocksource which uses the 32k
- * sync counter.  See clocksource setup in see plat-omap/common.c. 
+ * sync counter.  See clocksource setup in plat-omap/counter_32k.c
  */
 
-static inline void __init omap2_gp_clocksource_init(void) {}
+static void __init omap2_gp_clocksource_init(void)
+{
+	omap_init_clocksource_32k();
+}
+
 #else
 /*
  * clocksource
diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c
index ea46440..0367998 100644
--- a/arch/arm/plat-omap/counter_32k.c
+++ b/arch/arm/plat-omap/counter_32k.c
@@ -160,7 +160,7 @@ void read_persistent_clock(struct timespec *ts)
 	*ts = *tsp;
 }
 
-static int __init omap_init_clocksource_32k(void)
+int __init omap_init_clocksource_32k(void)
 {
 	static char err[] __initdata = KERN_ERR
 			"%s: can't register clocksource!\n";
@@ -195,7 +195,6 @@ static int __init omap_init_clocksource_32k(void)
 	}
 	return 0;
 }
-arch_initcall(omap_init_clocksource_32k);
 
 #endif	/* !(defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP15XX)) */
 
diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h
index 6b8088e..84c707f 100644
--- a/arch/arm/plat-omap/include/plat/common.h
+++ b/arch/arm/plat-omap/include/plat/common.h
@@ -35,6 +35,7 @@ struct sys_timer;
 
 extern void omap_map_common_io(void);
 extern struct sys_timer omap_timer;
+extern int __init omap_init_clocksource_32k(void);
 
 extern void omap_reserve(void);
 
-- 
1.7.2.3

State of LDP3430 platform

[Paul Walmsley]

Here's a slightly updated version of this patch, fixing a bug in one of 
the comments, and revising the commit message.  There's no functional 
difference between this and the previous version of this patch.


- Paul

[PATCH] OMAP: counter_32k: init clocksource as part of machine timer init

After commit dc548fbbd2ecd0fc3b02301d551e5f8e19ae58fd ("ARM: omap: convert 
sched_clock() to use new infrastructure"), OMAPs that use the 32KiHz 
"synchronization timer" as their clocksource crash during boot:

[    0.000000] OMAP clockevent source: GPTIMER1 at 32768 Hz
[    0.000000] Unable to handle kernel NULL pointer dereference at virtual address 00000000
[    0.000000] pgd = c0004000
[    0.000000] [00000000] *pgd=00000000
[    0.000000] Internal error: Oops: 80000005 [#1] SMP
[    0.000000] last sysfs file:
[    0.000000] Modules linked in:
[    0.000000] CPU: 0    Tainted: G        W    (2.6.37-07734-g2467802 #7)
[    0.000000] PC is at 0x0
[    0.000000] LR is at sched_clock_poll+0x2c/0x3c
[    0.000000] pc : [<00000000>]    lr : [<c0060b74>]    psr: 600001d3
[    0.000000] sp : c058bfd0  ip : c058a000  fp : 00000000
[    0.000000] r10: 00000000  r9 : 411fc092  r8 : 800330c8
[    0.000000] r7 : c05a08e0  r6 : c0034c48  r5 : c05ffc40  r4 : c0034c4c
[    0.000000] r3 : c05ffe6c  r2 : c05a0bc0  r1 : c059f098  r0 : 00000000
[    0.000000] Flags: nZCv  IRQs off  FIQs off  Mode SVC_32  ISA ARM  Segment kernel
[    0.000000] Control: 10c53c7f  Table: 8000404a  DAC: 00000017

This is due to the recent ARM init_sched_clock() changes and the late
initialization of the counter_32k clock source.  More information here:

   http://marc.info/?l=linux-omap&m=129513468605208&w=2

Fix by initializing the counter_32k clocksource during the machine timer
initialization.

Reported-by: Russell King <rmk+kernel@arm.linux.org.uk>
Tested-by: Thomas Weber <weber@corscience.de>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
---
 arch/arm/mach-omap1/time.c               |    7 +++++++
 arch/arm/mach-omap2/timer-gp.c           |   10 ++++++++--
 arch/arm/plat-omap/counter_32k.c         |    3 +--
 arch/arm/plat-omap/include/plat/common.h |    1 +
 4 files changed, 17 insertions(+), 4 deletions(-)

diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c
index ed7a61f..6ec65e5 100644
--- a/arch/arm/mach-omap1/time.c
+++ b/arch/arm/mach-omap1/time.c
@@ -244,6 +244,13 @@ static void __init omap_timer_init(void)
 
 	omap_init_mpu_timer(rate);
 	omap_init_clocksource(rate);
+	/*
+	 * XXX Since this file seems to deal mostly with the MPU timer,
+	 * this doesn't seem like the correct place for the sync timer
+	 * clocksource init.
+	 */
+	if (!cpu_is_omap7xx() && !cpu_is_omap15xx())
+		omap_init_clocksource_32k();
 }
 
 struct sys_timer omap_timer = {
diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c
index 4e48e78..7b7c268 100644
--- a/arch/arm/mach-omap2/timer-gp.c
+++ b/arch/arm/mach-omap2/timer-gp.c
@@ -42,6 +42,8 @@
 
 #include "timer-gp.h"
 
+#include <plat/common.h>
+
 /* MAX_GPTIMER_ID: number of GPTIMERs on the chip */
 #define MAX_GPTIMER_ID		12
 
@@ -176,10 +178,14 @@ static void __init omap2_gp_clockevent_init(void)
 /* 
  * When 32k-timer is enabled, don't use GPTimer for clocksource
  * instead, just leave default clocksource which uses the 32k
- * sync counter.  See clocksource setup in see plat-omap/common.c. 
+ * sync counter.  See clocksource setup in plat-omap/counter_32k.c
  */
 
-static inline void __init omap2_gp_clocksource_init(void) {}
+static void __init omap2_gp_clocksource_init(void)
+{
+	omap_init_clocksource_32k();
+}
+
 #else
 /*
  * clocksource
diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c
index ea46440..0367998 100644
--- a/arch/arm/plat-omap/counter_32k.c
+++ b/arch/arm/plat-omap/counter_32k.c
@@ -160,7 +160,7 @@ void read_persistent_clock(struct timespec *ts)
 	*ts = *tsp;
 }
 
-static int __init omap_init_clocksource_32k(void)
+int __init omap_init_clocksource_32k(void)
 {
 	static char err[] __initdata = KERN_ERR
 			"%s: can't register clocksource!\n";
@@ -195,7 +195,6 @@ static int __init omap_init_clocksource_32k(void)
 	}
 	return 0;
 }
-arch_initcall(omap_init_clocksource_32k);
 
 #endif	/* !(defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP15XX)) */
 
diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h
index 6b8088e..84c707f 100644
--- a/arch/arm/plat-omap/include/plat/common.h
+++ b/arch/arm/plat-omap/include/plat/common.h
@@ -35,6 +35,7 @@ struct sys_timer;
 
 extern void omap_map_common_io(void);
 extern struct sys_timer omap_timer;
+extern int __init omap_init_clocksource_32k(void);
 
 extern void omap_reserve(void);
 
-- 
1.7.2.3

[PATCH] omap1: Fix sched_clock for the MPU timer (Re: State of LDP3430 platform)

[Tony Lindgren]

* Paul Walmsley <paul@pwsan.com> [110118 11:35]:
> 
> Here's a slightly updated version of this patch, fixing a bug in one of 
> the comments, and revising the commit message.  There's no functional 
> difference between this and the previous version of this patch.

Thanks, here are two patches to fix the MPU timer, and then allow
compiling in both the MPU timer and the 32KiHz timer.

Tony

From: Tony Lindgren <tony@atomide.com>
Date: Tue, 18 Jan 2011 13:25:39 -0800
Subject: [PATCH] omap1: Fix sched_clock for the MPU timer

Otherwise systems using the MPU timer will hang.

Signed-off-by: Tony Lindgren <tony@atomide.com>

--- a/arch/arm/mach-omap1/time.c
+++ b/arch/arm/mach-omap1/time.c
@@ -44,11 +44,14 @@
 #include <linux/clocksource.h>
 #include <linux/clockchips.h>
 #include <linux/io.h>
+#include <linux/sched.h>
 
 #include <asm/system.h>
 #include <mach/hardware.h>
 #include <asm/leds.h>
 #include <asm/irq.h>
+#include <asm/sched_clock.h>
+
 #include <asm/mach/irq.h>
 #include <asm/mach/time.h>
 
@@ -67,7 +70,7 @@ typedef struct {
 ((volatile omap_mpu_timer_regs_t*)OMAP1_IO_ADDRESS(OMAP_MPU_TIMER_BASE +	\
 				 (n)*OMAP_MPU_TIMER_OFFSET))
 
-static inline unsigned long omap_mpu_timer_read(int nr)
+static inline unsigned long notrace omap_mpu_timer_read(int nr)
 {
 	volatile omap_mpu_timer_regs_t* timer = omap_mpu_timer_base(nr);
 	return timer->read_tim;
@@ -212,11 +215,21 @@ static struct clocksource clocksource_mpu = {
 	.flags		= CLOCK_SOURCE_IS_CONTINUOUS,
 };
 
+static DEFINE_CLOCK_DATA(cd);
+
+static void notrace mpu_update_sched_clock(void)
+{
+	u32 cyc = mpu_read(&clocksource_mpu);
+	update_sched_clock(&cd, cyc, (u32)~0);
+}
+
 static void __init omap_init_clocksource(unsigned long rate)
 {
 	static char err[] __initdata = KERN_ERR
 			"%s: can't register clocksource!\n";
 
+	init_sched_clock(&cd, mpu_update_sched_clock, 32, rate);
+
 	setup_irq(INT_TIMER2, &omap_mpu_timer2_irq);
 	omap_mpu_timer_start(1, ~0, 1);
 

[PATCH] omap1: Fix sched_clock for the MPU timer (Re: State of LDP3430 platform)

[Tony Lindgren]

* Paul Walmsley <paul@pwsan.com> [110118 11:35]:
> 
> Here's a slightly updated version of this patch, fixing a bug in one of 
> the comments, and revising the commit message.  There's no functional 
> difference between this and the previous version of this patch.

Thanks, here are two patches to fix the MPU timer, and then allow
compiling in both the MPU timer and the 32KiHz timer.

Tony

From: Tony Lindgren <tony@atomide.com>
Date: Tue, 18 Jan 2011 13:25:39 -0800
Subject: [PATCH] omap1: Fix sched_clock for the MPU timer

Otherwise systems using the MPU timer will hang.

Signed-off-by: Tony Lindgren <tony@atomide.com>

--- a/arch/arm/mach-omap1/time.c
+++ b/arch/arm/mach-omap1/time.c
@@ -44,11 +44,14 @@
 #include <linux/clocksource.h>
 #include <linux/clockchips.h>
 #include <linux/io.h>
+#include <linux/sched.h>
 
 #include <asm/system.h>
 #include <mach/hardware.h>
 #include <asm/leds.h>
 #include <asm/irq.h>
+#include <asm/sched_clock.h>
+
 #include <asm/mach/irq.h>
 #include <asm/mach/time.h>
 
@@ -67,7 +70,7 @@ typedef struct {
 ((volatile omap_mpu_timer_regs_t*)OMAP1_IO_ADDRESS(OMAP_MPU_TIMER_BASE +	\
 				 (n)*OMAP_MPU_TIMER_OFFSET))
 
-static inline unsigned long omap_mpu_timer_read(int nr)
+static inline unsigned long notrace omap_mpu_timer_read(int nr)
 {
 	volatile omap_mpu_timer_regs_t* timer = omap_mpu_timer_base(nr);
 	return timer->read_tim;
@@ -212,11 +215,21 @@ static struct clocksource clocksource_mpu = {
 	.flags		= CLOCK_SOURCE_IS_CONTINUOUS,
 };
 
+static DEFINE_CLOCK_DATA(cd);
+
+static void notrace mpu_update_sched_clock(void)
+{
+	u32 cyc = mpu_read(&clocksource_mpu);
+	update_sched_clock(&cd, cyc, (u32)~0);
+}
+
 static void __init omap_init_clocksource(unsigned long rate)
 {
 	static char err[] __initdata = KERN_ERR
 			"%s: can't register clocksource!\n";
 
+	init_sched_clock(&cd, mpu_update_sched_clock, 32, rate);
+
 	setup_irq(INT_TIMER2, &omap_mpu_timer2_irq);
 	omap_mpu_timer_start(1, ~0, 1);
 

[PATCH] omap1: Fix booting for 15xx and 730 with omap1_defconfig (Re: State of LDP3430 platform)

[Tony Lindgren]

For omap15xx and 730 we need to use the MPU timer
as the 32K timer is not available. For omap16xx
we want to use the 32K timer because of PM. Fix this
by allowing to build in both timers.

Signed-off-by: Tony Lindgren <tony@atomide.com>

--- a/arch/arm/mach-omap1/Kconfig
+++ b/arch/arm/mach-omap1/Kconfig
@@ -9,6 +9,7 @@ config ARCH_OMAP730
 	depends on ARCH_OMAP1
 	bool "OMAP730 Based System"
 	select CPU_ARM926T
+	select OMAP_MPU_TIMER
 	select ARCH_OMAP_OTG
 
 config ARCH_OMAP850
@@ -22,6 +23,7 @@ config ARCH_OMAP15XX
 	default y
 	bool "OMAP15xx Based System"
 	select CPU_ARM925T
+	select OMAP_MPU_TIMER
 
 config ARCH_OMAP16XX
 	depends on ARCH_OMAP1
--- a/arch/arm/mach-omap1/Makefile
+++ b/arch/arm/mach-omap1/Makefile
@@ -3,12 +3,11 @@
 #
 
 # Common support
-obj-y := io.o id.o sram.o irq.o mux.o flash.o serial.o devices.o dma.o
+obj-y := io.o id.o sram.o time.o irq.o mux.o flash.o serial.o devices.o dma.o
 obj-y += clock.o clock_data.o opp_data.o
 
 obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
 
-obj-$(CONFIG_OMAP_MPU_TIMER)	+= time.o
 obj-$(CONFIG_OMAP_32K_TIMER)	+= timer32k.o
 
 # Power Management
--- a/arch/arm/mach-omap1/time.c
+++ b/arch/arm/mach-omap1/time.c
@@ -57,6 +57,8 @@
 
 #include <plat/common.h>
 
+#ifdef CONFIG_OMAP_MPU_TIMER
+
 #define OMAP_MPU_TIMER_BASE		OMAP_MPU_TIMER1_BASE
 #define OMAP_MPU_TIMER_OFFSET		0x100
 
@@ -237,12 +239,7 @@ static void __init omap_init_clocksource(unsigned long rate)
 		printk(err, clocksource_mpu.name);
 }
 
-/*
- * ---------------------------------------------------------------------------
- * Timer initialization
- * ---------------------------------------------------------------------------
- */
-static void __init omap_timer_init(void)
+static void __init omap_mpu_timer_init(void)
 {
 	struct clk	*ck_ref = clk_get(NULL, "ck_ref");
 	unsigned long	rate;
@@ -257,13 +254,38 @@ static void __init omap_timer_init(void)
 
 	omap_init_mpu_timer(rate);
 	omap_init_clocksource(rate);
-	/*
-	 * XXX Since this file seems to deal mostly with the MPU timer,
-	 * this doesn't seem like the correct place for the sync timer
-	 * clocksource init.
-	 */
-	if (!cpu_is_omap7xx() && !cpu_is_omap15xx())
-		omap_init_clocksource_32k();
+}
+
+#else
+static inline void omap_mpu_timer_init(void)
+{
+	pr_err("Bogus timer, should not happen\n");
+}
+#endif	/* CONFIG_OMAP_MPU_TIMER */
+
+static inline int omap_32k_timer_usable(void)
+{
+	int res = false;
+
+	if (cpu_is_omap730() || cpu_is_omap15xx())
+		return res;
+
+#ifdef CONFIG_OMAP_32K_TIMER
+	res = omap_32k_timer_init();
+#endif
+
+	return res;
+}
+
+/*
+ * ---------------------------------------------------------------------------
+ * Timer initialization
+ * ---------------------------------------------------------------------------
+ */
+static void __init omap_timer_init(void)
+{
+	if (!omap_32k_timer_usable())
+		omap_mpu_timer_init();
 }
 
 struct sys_timer omap_timer = {
--- a/arch/arm/mach-omap1/timer32k.c
+++ b/arch/arm/mach-omap1/timer32k.c
@@ -52,10 +52,9 @@
 #include <asm/irq.h>
 #include <asm/mach/irq.h>
 #include <asm/mach/time.h>
+#include <plat/common.h>
 #include <plat/dmtimer.h>
 
-struct sys_timer omap_timer;
-
 /*
  * ---------------------------------------------------------------------------
  * 32KHz OS timer
@@ -181,14 +180,14 @@ static __init void omap_init_32k_timer(void)
  * Timer initialization
  * ---------------------------------------------------------------------------
  */
-static void __init omap_timer_init(void)
+bool __init omap_32k_timer_init(void)
 {
+	omap_init_clocksource_32k();
+
 #ifdef CONFIG_OMAP_DM_TIMER
 	omap_dm_timer_init();
 #endif
 	omap_init_32k_timer();
-}
 
-struct sys_timer omap_timer = {
-	.init		= omap_timer_init,
-};
+	return true;
+}
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -144,12 +144,9 @@ config OMAP_IOMMU_DEBUG
 config OMAP_IOMMU_IVA2
 	bool
 
-choice
-	prompt "System timer"
-	default OMAP_32K_TIMER if !ARCH_OMAP15XX
-
 config OMAP_MPU_TIMER
 	bool "Use mpu timer"
+	depends on ARCH_OMAP1
 	help
 	  Select this option if you want to use the OMAP mpu timer. This
 	  timer provides more intra-tick resolution than the 32KHz timer,
@@ -158,6 +155,7 @@ config OMAP_MPU_TIMER
 config OMAP_32K_TIMER
 	bool "Use 32KHz timer"
 	depends on ARCH_OMAP16XX || ARCH_OMAP2PLUS
+	default y if (ARCH_OMAP16XX || ARCH_OMAP2PLUS)
 	help
 	  Select this option if you want to enable the OMAP 32KHz timer.
 	  This timer saves power compared to the OMAP_MPU_TIMER, and has
@@ -165,8 +163,6 @@ config OMAP_32K_TIMER
 	  intra-tick resolution than OMAP_MPU_TIMER. The 32KHz timer is
 	  currently only available for OMAP16XX, 24XX, 34XX and OMAP4.
 
-endchoice
-
 config OMAP3_L2_AUX_SECURE_SAVE_RESTORE
 	bool "OMAP3 HS/EMU save and restore for L2 AUX control register"
 	depends on ARCH_OMAP3 && PM
--- a/arch/arm/plat-omap/counter_32k.c
+++ b/arch/arm/plat-omap/counter_32k.c
@@ -36,8 +36,6 @@
 
 #define OMAP16XX_TIMER_32K_SYNCHRONIZED		0xfffbc410
 
-#if !(defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP15XX))
-
 #include <linux/clocksource.h>
 
 /*
@@ -195,6 +193,3 @@ int __init omap_init_clocksource_32k(void)
 	}
 	return 0;
 }
-
-#endif	/* !(defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP15XX)) */
-
--- a/arch/arm/plat-omap/include/plat/common.h
+++ b/arch/arm/plat-omap/include/plat/common.h
@@ -35,6 +35,7 @@ struct sys_timer;
 
 extern void omap_map_common_io(void);
 extern struct sys_timer omap_timer;
+extern bool omap_32k_timer_init(void);
 extern int __init omap_init_clocksource_32k(void);
 
 extern void omap_reserve(void);

[PATCH] omap1: Fix booting for 15xx and 730 with omap1_defconfig (Re: State of LDP3430 platform)

[Tony Lindgren]

For omap15xx and 730 we need to use the MPU timer
as the 32K timer is not available. For omap16xx
we want to use the 32K timer because of PM. Fix this
by allowing to build in both timers.

Signed-off-by: Tony Lindgren <tony@atomide.com>

--- a/arch/arm/mach-omap1/Kconfig
+++ b/arch/arm/mach-omap1/Kconfig
@@ -9,6 +9,7 @@ config ARCH_OMAP730
 	depends on ARCH_OMAP1
 	bool "OMAP730 Based System"
 	select CPU_ARM926T
+	select OMAP_MPU_TIMER
 	select ARCH_OMAP_OTG
 
 config ARCH_OMAP850
@@ -22,6 +23,7 @@ config ARCH_OMAP15XX
 	default y
 	bool "OMAP15xx Based System"
 	select CPU_ARM925T
+	select OMAP_MPU_TIMER
 
 config ARCH_OMAP16XX
 	depends on ARCH_OMAP1
--- a/arch/arm/mach-omap1/Makefile
+++ b/arch/arm/mach-omap1/Makefile
@@ -3,12 +3,11 @@
 #
 
 # Common support
-obj-y := io.o id.o sram.o irq.o mux.o flash.o serial.o devices.o dma.o
+obj-y := io.o id.o sram.o time.o irq.o mux.o flash.o serial.o devices.o dma.o
 obj-y += clock.o clock_data.o opp_data.o
 
 obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o
 
-obj-$(CONFIG_OMAP_MPU_TIMER)	+= time.o
 obj-$(CONFIG_OMAP_32K_TIMER)	+= timer32k.o
 
 # Power Management
--- a/arch/arm/mach-omap1/time.c
+++ b/arch/arm/mach-omap1/time.c
@@ -57,6 +57,8 @@
 
 #include <plat/common.h>
 
+#ifdef CONFIG_OMAP_MPU_TIMER
+
 #define OMAP_MPU_TIMER_BASE		OMAP_MPU_TIMER1_BASE
 #define OMAP_MPU_TIMER_OFFSET		0x100
 
@@ -237,12 +239,7 @@ static void __init omap_init_clocksource(unsigned long rate)
 		printk(err, clocksource_mpu.name);
 }
 
-/*
- * ---------------------------------------------------------------------------
- * Timer initialization
- * ---------------------------------------------------------------------------
- */
-static void __init omap_timer_init(void)
+static void __init omap_mpu_timer_init(void)
 {
 	struct clk	*ck_ref = clk_get(NULL, "ck_ref");
 	unsigned long	rate;
@@ -257,13 +254,38 @@ static void __init omap_timer_init(void)
 
 	omap_init_mpu_timer(rate);
 	omap_init_clocksource(rate);
-	/*
-	 * XXX Since this file seems to deal mostly with the MPU timer,
-	 * this doesn't seem like the correct place for the sync timer
-	 * clocksource init.
-	 */
-	if (!cpu_is_omap7xx() && !cpu_is_omap15xx())
-		omap_init_clocksource_32k();
+}
+
+#else
+static inline void omap_mpu_timer_init(void)
+{
+	pr_err("Bogus timer, should not happen\n");
+}
+#endif	/* CONFIG_OMAP_MPU_TIMER */
+
+static inline int omap_32k_timer_usable(void)
+{
+	int res = false;
+
+	if (cpu_is_omap730() || cpu_is_omap15xx())
+		return res;
+
+#ifdef CONFIG_OMAP_32K_TIMER
+	res = omap_32k_timer_init();
+#endif
+
+	return res;
+}
+
+/*
+ * ---------------------------------------------------------------------------
+ * Timer initialization
+ * ---------------------------------------------------------------------------
+ */
+static void __init omap_timer_init(void)
+{
+	if (!omap_32k_timer_usable())
+		omap_mpu_timer_init();
 }
 
 struct sys_timer omap_timer = {
--- a/arch/arm/mach-omap1/timer32k.c
+++ b/arch/arm/mach-omap1/timer32k.c
@@ -52,10 +52,9 @@
 #include <asm/irq.h>
 #include <asm/mach/irq.h>
 #include <asm/mach/time.h>
+#include <plat/common.h>
 #include <plat/dmtimer.h>
 
-struct sys_timer omap_timer;
-
 /*
  * ---------------------------------------------------------------------------
  * 32KHz OS timer
@@ -181,14 +180,14 @@ static __init void omap_init_32k_timer(void)
  * Timer initialization
  * ---------------------------------------------------------------------------
  */
-static void __init omap_timer_init(void)
+bool __init omap_32k_timer_init(void)
 {
+	omap_init_clocksource_32k();
+
 #ifdef CONFIG_OMAP_DM_TIMER
 	omap_dm_timer_init();
 #endif
 	omap_init_32k_timer();
-}
 
-struct sys_timer omap_timer = {
-	.init		= omap_timer_init,
-};
+	return true;
+}
--- a/arch/arm/plat-omap/Kconfig
+++ b/arch/arm/plat-omap/Kconfig
@@ -144,12 +144,9 @@ config OMAP_IOMMU_DEBUG
 config OMAP_IOMMU_IVA2
 	bool
 
-choice
-	prompt "System timer"
-	default OMAP_32K_TIMER if !ARCH_OMAP15XX
-
 config OMAP_MPU_TIMER
 	bool "Use mpu timer"
+	depends on ARCH_OMAP1
 	help
 	  Select this option if you want to use the OMAP mpu timer. This
 	  timer provides more intra-tick resolution than the 32KHz timer,
@@ -158,6 +155,7 @@ config OMAP_MPU_TIMER
 config OMAP_32K_TIMER
 	bool "Use 32KHz timer"
 	depends on ARCH_OMAP16XX || ARCH_OMAP2PLUS
+	default y if (ARCH_OMAP16XX || ARCH_OMAP2PLUS)
 	help
 	  Select this option if you want to enable the OMAP 32KHz timer.
 	  This timer saves power compared to the OMAP_MPU_TIMER, and has
@@ -165,8 +163,6 @@ config OMAP_32K_TIMER
 	  intra-tick resolution than OMAP_MPU_TIMER. The 32KHz timer is
 	  currently only available for OMAP16XX, 24XX, 34XX and OMAP4.
 
-endchoice
-
 config OMAP3_L2_AUX_SECURE_SAVE_RESTORE
 	bool "OMAP3 HS/EMU save and restore for L2 AUX control register"
 	depends on ARCH_OMAP3 && PM
--- a/arch/arm/plat-omap/counter_32k.c
+++ b/arch/arm/plat-omap/counter_32k.c
@@ -36,8 +36,6 @@
 
 #define OMAP16XX_TIMER_32K_SYNCHRONIZED		0xfffbc410
 
-#if !(defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP15XX))
-
 #include <linux/clocksource.h>
 
 /*
@@ -195,6 +193,3 @@ int __init omap_init_clocksource_32k(void)
 	}
 	return 0;
 }
-
-#endif	/* !(defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP15XX)) */
-
--- a/arch/arm/plat-omap/include/plat/common.h
+++ b/arch/arm/plat-omap/include/plat/common.h
@@ -35,6 +35,7 @@ struct sys_timer;
 
 extern void omap_map_common_io(void);
 extern struct sys_timer omap_timer;
+extern bool omap_32k_timer_init(void);
 extern int __init omap_init_clocksource_32k(void);
 
 extern void omap_reserve(void);

Re: [PATCH] omap1: Fix booting for 15xx and 730 with omap1_defconfig (Re: State of LDP3430 platform)

[Tony Lindgren]

* Tony Lindgren <tony@atomide.com> [110118 14:34]:
> For omap15xx and 730 we need to use the MPU timer
> as the 32K timer is not available. For omap16xx
> we want to use the 32K timer because of PM. Fix this
> by allowing to build in both timers.

This still needs one more patch to deal with the
sched_clock for MPU timer..

Tony

[PATCH] omap1: Fix booting for 15xx and 730 with omap1_defconfig (Re: State of LDP3430 platform)

[Tony Lindgren]

* Tony Lindgren <tony@atomide.com> [110118 14:34]:
> For omap15xx and 730 we need to use the MPU timer
> as the 32K timer is not available. For omap16xx
> we want to use the 32K timer because of PM. Fix this
> by allowing to build in both timers.

This still needs one more patch to deal with the
sched_clock for MPU timer..

Tony

Re: State of LDP3430 platform

[Jarkko Nikula]

On Tue, 18 Jan 2011 12:36:26 -0700 (MST)
Paul Walmsley <paul@pwsan.com> wrote:

> This is due to the recent ARM init_sched_clock() changes and the late
> initialization of the counter_32k clock source.  More information here:
> 
>    http://marc.info/?l=linux-omap&m=129513468605208&w=2
> 
> Fix by initializing the counter_32k clocksource during the machine timer
> initialization.
> 
> Reported-by: Russell King <rmk+kernel@arm.linux.org.uk>
> Tested-by: Thomas Weber <weber@corscience.de>
> Signed-off-by: Paul Walmsley <paul@pwsan.com>
> ---
Thanks Paul. My tested-by is late as this in already in your pull
request but wanted to comment that this makes the mainline working on
omap3 after commit 211baa7
"ARM: sched_clock: allow init_sched_clock() to be called early"

-- 
Jarkko

State of LDP3430 platform

[Jarkko Nikula]

On Tue, 18 Jan 2011 12:36:26 -0700 (MST)
Paul Walmsley <paul@pwsan.com> wrote:

> This is due to the recent ARM init_sched_clock() changes and the late
> initialization of the counter_32k clock source.  More information here:
> 
>    http://marc.info/?l=linux-omap&m=129513468605208&w=2
> 
> Fix by initializing the counter_32k clocksource during the machine timer
> initialization.
> 
> Reported-by: Russell King <rmk+kernel@arm.linux.org.uk>
> Tested-by: Thomas Weber <weber@corscience.de>
> Signed-off-by: Paul Walmsley <paul@pwsan.com>
> ---
Thanks Paul. My tested-by is late as this in already in your pull
request but wanted to comment that this makes the mainline working on
omap3 after commit 211baa7
"ARM: sched_clock: allow init_sched_clock() to be called early"

-- 
Jarkko

[PATCH] omap1: Fix sched_clock implementation when both MPU timer and 32K timer are used (Re: State of LDP3430 platform)

[Tony Lindgren]

* Tony Lindgren <tony@atomide.com> [110118 15:20]:
> * Tony Lindgren <tony@atomide.com> [110118 14:34]:
> > For omap15xx and 730 we need to use the MPU timer
> > as the 32K timer is not available. For omap16xx
> > we want to use the 32K timer because of PM. Fix this
> > by allowing to build in both timers.
> 
> This still needs one more patch to deal with the
> sched_clock for MPU timer..

And here's that patch to make sched_clock work with both
timers.

Tony

From: Tony Lindgren <tony@atomide.com>
Date: Tue, 18 Jan 2011 17:00:00 -0800
Subject: [PATCH] omap1: Fix sched_clock implementation when both MPU timer and 32K timer are used

Earlier patches select HAVE_SCHED_CLOCK for omaps. To have working sched_clock
also for MPU timer, we need to implement it in a way where the right one gets
selected during the runtime.

Signed-off-by: Tony Lindgren <tony@atomide.com>

--- a/arch/arm/mach-omap1/time.c
+++ b/arch/arm/mach-omap1/time.c
@@ -219,6 +219,24 @@ static struct clocksource clocksource_mpu = {
 
 static DEFINE_CLOCK_DATA(cd);
 
+static inline unsigned long long notrace _omap_mpu_sched_clock(void)
+{
+	u32 cyc = mpu_read(&clocksource_mpu);
+	return cyc_to_sched_clock(&cd, cyc, (u32)~0);
+}
+
+#ifndef CONFIG_OMAP_32K_TIMER
+unsigned long long notrace sched_clock(void)
+{
+	return _omap_mpu_sched_clock();
+}
+#else
+static unsigned long long notrace omap_mpu_sched_clock(void)
+{
+	return _omap_mpu_sched_clock();
+}
+#endif
+
 static void notrace mpu_update_sched_clock(void)
 {
 	u32 cyc = mpu_read(&clocksource_mpu);
@@ -262,6 +280,30 @@ static inline void omap_mpu_timer_init(void)
 }
 #endif	/* CONFIG_OMAP_MPU_TIMER */
 
+#if defined(CONFIG_OMAP_MPU_TIMER) && defined(CONFIG_OMAP_32K_TIMER)
+static unsigned long long (*preferred_sched_clock)(void);
+
+unsigned long long notrace sched_clock(void)
+{
+	if (!preferred_sched_clock)
+		return 0;
+
+	return preferred_sched_clock();
+}
+
+static inline void preferred_sched_clock_init(bool use_32k_sched_clock)
+{
+	if (use_32k_sched_clock)
+		preferred_sched_clock = omap_32k_sched_clock;
+	else
+		preferred_sched_clock = omap_mpu_sched_clock;
+}
+#else
+static inline void preferred_sched_clock_init(bool use_32k_sched_clcok)
+{
+}
+#endif
+
 static inline int omap_32k_timer_usable(void)
 {
 	int res = false;
@@ -283,8 +325,12 @@ static inline int omap_32k_timer_usable(void)
  */
 static void __init omap_timer_init(void)
 {
-	if (!omap_32k_timer_usable())
+	if (omap_32k_timer_usable()) {
+		preferred_sched_clock_init(1);
+	} else {
 		omap_mpu_timer_init();
+		preferred_sched_clock_init(0);
+	}
 }
 
 struct sys_timer omap_timer = {
--- a/arch/arm/plat-omap/counter_32k.c
+++ b/arch/arm/plat-omap/counter_32k.c
@@ -120,12 +120,24 @@ static DEFINE_CLOCK_DATA(cd);
 #define SC_MULT		4000000000u
 #define SC_SHIFT	17
 
-unsigned long long notrace sched_clock(void)
+static inline unsigned long long notrace _omap_32k_sched_clock(void)
 {
 	u32 cyc = clocksource_32k.read(&clocksource_32k);
 	return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0, SC_MULT, SC_SHIFT);
 }
 
+#ifndef CONFIG_OMAP_MPU_TIMER
+unsigned long long notrace sched_clock(void)
+{
+	return _omap_32k_sched_clock();
+}
+#else
+unsigned long long notrace omap_32k_sched_clock(void)
+{
+	return _omap_32k_sched_clock();
+}
+#endif
+
 static void notrace omap_update_sched_clock(void)
 {
 	u32 cyc = clocksource_32k.read(&clocksource_32k);
--- a/arch/arm/plat-omap/include/plat/common.h
+++ b/arch/arm/plat-omap/include/plat/common.h
@@ -37,6 +37,7 @@ extern void omap_map_common_io(void);
 extern struct sys_timer omap_timer;
 extern bool omap_32k_timer_init(void);
 extern int __init omap_init_clocksource_32k(void);
+extern unsigned long long notrace omap_32k_sched_clock(void);
 
 extern void omap_reserve(void);
 

[PATCH] omap1: Fix sched_clock implementation when both MPU timer and 32K timer are used (Re: State of LDP3430 platform)

[Tony Lindgren]

* Tony Lindgren <tony@atomide.com> [110118 15:20]:
> * Tony Lindgren <tony@atomide.com> [110118 14:34]:
> > For omap15xx and 730 we need to use the MPU timer
> > as the 32K timer is not available. For omap16xx
> > we want to use the 32K timer because of PM. Fix this
> > by allowing to build in both timers.
> 
> This still needs one more patch to deal with the
> sched_clock for MPU timer..

And here's that patch to make sched_clock work with both
timers.

Tony

From: Tony Lindgren <tony@atomide.com>
Date: Tue, 18 Jan 2011 17:00:00 -0800
Subject: [PATCH] omap1: Fix sched_clock implementation when both MPU timer and 32K timer are used

Earlier patches select HAVE_SCHED_CLOCK for omaps. To have working sched_clock
also for MPU timer, we need to implement it in a way where the right one gets
selected during the runtime.

Signed-off-by: Tony Lindgren <tony@atomide.com>

--- a/arch/arm/mach-omap1/time.c
+++ b/arch/arm/mach-omap1/time.c
@@ -219,6 +219,24 @@ static struct clocksource clocksource_mpu = {
 
 static DEFINE_CLOCK_DATA(cd);
 
+static inline unsigned long long notrace _omap_mpu_sched_clock(void)
+{
+	u32 cyc = mpu_read(&clocksource_mpu);
+	return cyc_to_sched_clock(&cd, cyc, (u32)~0);
+}
+
+#ifndef CONFIG_OMAP_32K_TIMER
+unsigned long long notrace sched_clock(void)
+{
+	return _omap_mpu_sched_clock();
+}
+#else
+static unsigned long long notrace omap_mpu_sched_clock(void)
+{
+	return _omap_mpu_sched_clock();
+}
+#endif
+
 static void notrace mpu_update_sched_clock(void)
 {
 	u32 cyc = mpu_read(&clocksource_mpu);
@@ -262,6 +280,30 @@ static inline void omap_mpu_timer_init(void)
 }
 #endif	/* CONFIG_OMAP_MPU_TIMER */
 
+#if defined(CONFIG_OMAP_MPU_TIMER) && defined(CONFIG_OMAP_32K_TIMER)
+static unsigned long long (*preferred_sched_clock)(void);
+
+unsigned long long notrace sched_clock(void)
+{
+	if (!preferred_sched_clock)
+		return 0;
+
+	return preferred_sched_clock();
+}
+
+static inline void preferred_sched_clock_init(bool use_32k_sched_clock)
+{
+	if (use_32k_sched_clock)
+		preferred_sched_clock = omap_32k_sched_clock;
+	else
+		preferred_sched_clock = omap_mpu_sched_clock;
+}
+#else
+static inline void preferred_sched_clock_init(bool use_32k_sched_clcok)
+{
+}
+#endif
+
 static inline int omap_32k_timer_usable(void)
 {
 	int res = false;
@@ -283,8 +325,12 @@ static inline int omap_32k_timer_usable(void)
  */
 static void __init omap_timer_init(void)
 {
-	if (!omap_32k_timer_usable())
+	if (omap_32k_timer_usable()) {
+		preferred_sched_clock_init(1);
+	} else {
 		omap_mpu_timer_init();
+		preferred_sched_clock_init(0);
+	}
 }
 
 struct sys_timer omap_timer = {
--- a/arch/arm/plat-omap/counter_32k.c
+++ b/arch/arm/plat-omap/counter_32k.c
@@ -120,12 +120,24 @@ static DEFINE_CLOCK_DATA(cd);
 #define SC_MULT		4000000000u
 #define SC_SHIFT	17
 
-unsigned long long notrace sched_clock(void)
+static inline unsigned long long notrace _omap_32k_sched_clock(void)
 {
 	u32 cyc = clocksource_32k.read(&clocksource_32k);
 	return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0, SC_MULT, SC_SHIFT);
 }
 
+#ifndef CONFIG_OMAP_MPU_TIMER
+unsigned long long notrace sched_clock(void)
+{
+	return _omap_32k_sched_clock();
+}
+#else
+unsigned long long notrace omap_32k_sched_clock(void)
+{
+	return _omap_32k_sched_clock();
+}
+#endif
+
 static void notrace omap_update_sched_clock(void)
 {
 	u32 cyc = clocksource_32k.read(&clocksource_32k);
--- a/arch/arm/plat-omap/include/plat/common.h
+++ b/arch/arm/plat-omap/include/plat/common.h
@@ -37,6 +37,7 @@ extern void omap_map_common_io(void);
 extern struct sys_timer omap_timer;
 extern bool omap_32k_timer_init(void);
 extern int __init omap_init_clocksource_32k(void);
+extern unsigned long long notrace omap_32k_sched_clock(void);
 
 extern void omap_reserve(void);
 

Re: [PATCH] omap1: Fix sched_clock for the MPU timer (Re: State of LDP3430 platform)

[Tony Lindgren]

* Tony Lindgren <tony@atomide.com> [110118 14:25]:
> * Paul Walmsley <paul@pwsan.com> [110118 11:35]:
> > 
> > Here's a slightly updated version of this patch, fixing a bug in one of 
> > the comments, and revising the commit message.  There's no functional 
> > difference between this and the previous version of this patch.
> 
> Thanks, here are two patches to fix the MPU timer, and then allow
> compiling in both the MPU timer and the 32KiHz timer.

I've updated this patch with the following fix to reset the timer
first to get correct PRINTK_TIME timestamps.

Regards,

Tony

--- a/arch/arm/mach-omap1/time.c
+++ b/arch/arm/mach-omap1/time.c
@@ -228,10 +228,9 @@ static void __init omap_init_clocksource(unsigned long rate)
 	static char err[] __initdata = KERN_ERR
 			"%s: can't register clocksource!\n";
 
-	init_sched_clock(&cd, mpu_update_sched_clock, 32, rate);
-
 	setup_irq(INT_TIMER2, &omap_mpu_timer2_irq);
 	omap_mpu_timer_start(1, ~0, 1);
+	init_sched_clock(&cd, mpu_update_sched_clock, 32, rate);
 
 	if (clocksource_register_hz(&clocksource_mpu, rate))
 		printk(err, clocksource_mpu.name);

[PATCH] omap1: Fix sched_clock for the MPU timer (Re: State of LDP3430 platform)

[Tony Lindgren]

* Tony Lindgren <tony@atomide.com> [110118 14:25]:
> * Paul Walmsley <paul@pwsan.com> [110118 11:35]:
> > 
> > Here's a slightly updated version of this patch, fixing a bug in one of 
> > the comments, and revising the commit message.  There's no functional 
> > difference between this and the previous version of this patch.
> 
> Thanks, here are two patches to fix the MPU timer, and then allow
> compiling in both the MPU timer and the 32KiHz timer.

I've updated this patch with the following fix to reset the timer
first to get correct PRINTK_TIME timestamps.

Regards,

Tony

--- a/arch/arm/mach-omap1/time.c
+++ b/arch/arm/mach-omap1/time.c
@@ -228,10 +228,9 @@ static void __init omap_init_clocksource(unsigned long rate)
 	static char err[] __initdata = KERN_ERR
 			"%s: can't register clocksource!\n";
 
-	init_sched_clock(&cd, mpu_update_sched_clock, 32, rate);
-
 	setup_irq(INT_TIMER2, &omap_mpu_timer2_irq);
 	omap_mpu_timer_start(1, ~0, 1);
+	init_sched_clock(&cd, mpu_update_sched_clock, 32, rate);
 
 	if (clocksource_register_hz(&clocksource_mpu, rate))
 		printk(err, clocksource_mpu.name);

Re: State of LDP3430 platform

[Russell King - ARM Linux]

Another LDP3430 report...

The LDP3430 seems to be getting there, but:

1. LCD screen seems wrong.  The X display looks rather large, and
   flickery - looks like the LCD timing parameters are wrong.  Some
   text disappears off the RHS.

   fbset reports:
	mode "240x320-510"
		# D: 48.001 MHz, H: 168.424 kHz, V: 510.375 Hz
		geometry 240 320 240 320 16
		timings 20833 3 39 2 7 3 1
		accel false
		rgba 5/11,6/5,5/0,0/0

   kernel config:
	CONFIG_FB_OMAP=y
	CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE=2

   with the supplied kernel:
	mode "640x480-64"
		# D: 21.601 MHz, H: 31.396 kHz, V: 63.813 Hz
		geometry 640 480 640 640 16
		timings 46295 40 4 8 2 4 2
		accel false
		rgba 5/11,6/5,5/0,0/0
   so the LCD timings in the kernel appear to be wrong for the panel
   on the LDP.  What is 'CONFIG_FB_OMAP_LCD_VGA'?  There's *no* help
   for this configuration option so god only knows what it's right
   setting should be.  Please give it some help text to explain what
   it is and what it does.

2. Keyboard - numeric keys produce wrong ascii for their labelled
   function.  This is from /dev/tty1 with X running:

	1 gives nothing	2 gives 4	3 gives 7
	4 gives 2	5 gives 5	6 gives 8
	7 gives 3	8 gives nothing	9 gives 9
	* gives nothing	0 gives E	# gives nothing

   off-hook (green phone) gives 0
   on-hook (red phone) gives <1b><5b><31><39><7e>

   Killing X and then running evtest on /dev/input/event1 doesn't
   return any events, neither does reading /dev/tty1 for the twl4030
   keypad - the numeric keys are completely dead.  /proc/interrupts
   shows no new interrupt counts when pressing the key for
   'twl4030_keypad'.  Unbinding/rebinding the twl4030 driver doesn't
   sort it out, neither does restarting X.

Re: State of LDP3430 platform

[Russell King - ARM Linux]

On Sat, Feb 12, 2011 at 04:02:16PM +0000, Russell King - ARM Linux wrote:
> Another LDP3430 report...
> 
> The LDP3430 seems to be getting there, but:
> 
> 1. LCD screen seems wrong.  The X display looks rather large, and
>    flickery - looks like the LCD timing parameters are wrong.  Some
>    text disappears off the RHS.
> 
>    fbset reports:
> 	mode "240x320-510"
> 		# D: 48.001 MHz, H: 168.424 kHz, V: 510.375 Hz
> 		geometry 240 320 240 320 16
> 		timings 20833 3 39 2 7 3 1
> 		accel false
> 		rgba 5/11,6/5,5/0,0/0
> 
>    kernel config:
> 	CONFIG_FB_OMAP=y
> 	CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE=2
> 
>    with the supplied kernel:
> 	mode "640x480-64"
> 		# D: 21.601 MHz, H: 31.396 kHz, V: 63.813 Hz
> 		geometry 640 480 640 640 16
> 		timings 46295 40 4 8 2 4 2
> 		accel false
> 		rgba 5/11,6/5,5/0,0/0
>    so the LCD timings in the kernel appear to be wrong for the panel
>    on the LDP.  What is 'CONFIG_FB_OMAP_LCD_VGA'?  There's *no* help
>    for this configuration option so god only knows what it's right
>    setting should be.  Please give it some help text to explain what
>    it is and what it does.

LCD works better with FB_OMAP_LCD_VGA set, but why is this necessary?

> 2. Keyboard - numeric keys produce wrong ascii for their labelled
>    function.  This is from /dev/tty1 with X running:
> 
> 	1 gives nothing	2 gives 4	3 gives 7
> 	4 gives 2	5 gives 5	6 gives 8
> 	7 gives 3	8 gives nothing	9 gives 9
> 	* gives nothing	0 gives E	# gives nothing
> 
>    off-hook (green phone) gives 0
>    on-hook (red phone) gives <1b><5b><31><39><7e>
> 
>    Killing X and then running evtest on /dev/input/event1 doesn't
>    return any events, neither does reading /dev/tty1 for the twl4030
>    keypad - the numeric keys are completely dead.  /proc/interrupts
>    shows no new interrupt counts when pressing the key for
>    'twl4030_keypad'.  Unbinding/rebinding the twl4030 driver doesn't
>    sort it out, neither does restarting X.

3. Touchscreen is dead, presumably because no devices are bound to
   ads7846 SPI driver.

ls -al /sys/bus/spi/devices/
total 0
drwxr-xr-x  2 root root 0 Jan  1 01:02 .
drwxr-xr-x  4 root root 0 Jan  1 01:02 ..
lrwxrwxrwx  1 root root 0 Jan  1 01:02 spi1.0 -> ../../../devices/platform/omap2_mcspi.1/spi1.0

is the only SPI device which appears, but is unbound.  I'm sure this used
to work at some point.

Re: State of LDP3430 platform

[Tony Lindgren]

* Russell King - ARM Linux <linux@arm.linux.org.uk> [110212 08:09]:
> On Sat, Feb 12, 2011 at 04:02:16PM +0000, Russell King - ARM Linux wrote:
> > Another LDP3430 report...
> > 
> > The LDP3430 seems to be getting there, but:
> > 
> > 1. LCD screen seems wrong.  The X display looks rather large, and
> >    flickery - looks like the LCD timing parameters are wrong.  Some
> >    text disappears off the RHS.
> > 
> >    fbset reports:
> > 	mode "240x320-510"
> > 		# D: 48.001 MHz, H: 168.424 kHz, V: 510.375 Hz
> > 		geometry 240 320 240 320 16
> > 		timings 20833 3 39 2 7 3 1
> > 		accel false
> > 		rgba 5/11,6/5,5/0,0/0
> > 
> >    kernel config:
> > 	CONFIG_FB_OMAP=y
> > 	CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE=2
> > 
> >    with the supplied kernel:
> > 	mode "640x480-64"
> > 		# D: 21.601 MHz, H: 31.396 kHz, V: 63.813 Hz
> > 		geometry 640 480 640 640 16
> > 		timings 46295 40 4 8 2 4 2
> > 		accel false
> > 		rgba 5/11,6/5,5/0,0/0
> >    so the LCD timings in the kernel appear to be wrong for the panel
> >    on the LDP.  What is 'CONFIG_FB_OMAP_LCD_VGA'?  There's *no* help
> >    for this configuration option so god only knows what it's right
> >    setting should be.  Please give it some help text to explain what
> >    it is and what it does.
> 
> LCD works better with FB_OMAP_LCD_VGA set, but why is this necessary?
> 
> > 2. Keyboard - numeric keys produce wrong ascii for their labelled
> >    function.  This is from /dev/tty1 with X running:
> > 
> > 	1 gives nothing	2 gives 4	3 gives 7
> > 	4 gives 2	5 gives 5	6 gives 8
> > 	7 gives 3	8 gives nothing	9 gives 9
> > 	* gives nothing	0 gives E	# gives nothing
> > 
> >    off-hook (green phone) gives 0
> >    on-hook (red phone) gives <1b><5b><31><39><7e>
> > 
> >    Killing X and then running evtest on /dev/input/event1 doesn't
> >    return any events, neither does reading /dev/tty1 for the twl4030
> >    keypad - the numeric keys are completely dead.  /proc/interrupts
> >    shows no new interrupt counts when pressing the key for
> >    'twl4030_keypad'.  Unbinding/rebinding the twl4030 driver doesn't
> >    sort it out, neither does restarting X.
> 
> 3. Touchscreen is dead, presumably because no devices are bound to
>    ads7846 SPI driver.
> 
> ls -al /sys/bus/spi/devices/
> total 0
> drwxr-xr-x  2 root root 0 Jan  1 01:02 .
> drwxr-xr-x  4 root root 0 Jan  1 01:02 ..
> lrwxrwxrwx  1 root root 0 Jan  1 01:02 spi1.0 -> ../../../devices/platform/omap2_mcspi.1/spi1.0
> 
> is the only SPI device which appears, but is unbound.  I'm sure this used
> to work at some point.

Anybody from TI looking into these?

Regards,

Tony

RE: State of LDP3430 platform

[Woodruff, Richard]

> From: Tony Lindgren [mailto:tony@atomide.com]
> Sent: Wednesday, February 23, 2011 4:50 PM

> Anybody from TI looking into these?

I'll poke some folks and check.  I've not booted my LDP for a while.

As an older 3430 dev board its lost its shine compared to 3630 and 4430 dev boards.

Regards,
Richard W.

RE: State of LDP3430 platform

[Rajendra Nayak]

> -----Original Message-----
> From: linux-omap-owner@vger.kernel.org
[mailto:linux-omap-owner@vger.kernel.org] On Behalf Of Woodruff, Richard
> Sent: Thursday, February 24, 2011 4:53 AM
> To: Tony Lindgren; Russell King - ARM Linux
> Cc: linux-omap@vger.kernel.org; Paul Walmsley; Shilimkar, Santosh
> Subject: RE: State of LDP3430 platform
>
> > From: Tony Lindgren [mailto:tony@atomide.com]
> > Sent: Wednesday, February 23, 2011 4:50 PM
>
> > Anybody from TI looking into these?
>
> I'll poke some folks and check.  I've not booted my LDP for a while.

There was a regulator mapping issue on 3430SDP because of
which tocuhscreen was broken and is now fixed with this patch
http://marc.info/?l=linux-arm-kernel&m=129673276608954&w=2
Looks like the same issue on LDP. Will check it up.

Regards,
Rajendra

>
> As an older 3430 dev board its lost its shine compared to 3630 and 4430
dev boards.
>
> Regards,
> Richard W.
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html

RE: State of LDP3430 platform

[Janorkar, Mayuresh]

> -----Original Message-----
> From: linux-omap-owner@vger.kernel.org [mailto:linux-omap-
> owner@vger.kernel.org] On Behalf Of Tony Lindgren
> Sent: Thursday, February 24, 2011 4:20 AM
> To: Russell King - ARM Linux
> Cc: linux-omap@vger.kernel.org; Paul Walmsley; Shilimkar, Santosh;
> Woodruff, Richard
> Subject: Re: State of LDP3430 platform
> 
> * Russell King - ARM Linux <linux@arm.linux.org.uk> [110212 08:09]:
> > On Sat, Feb 12, 2011 at 04:02:16PM +0000, Russell King - ARM Linux
> wrote:
> > > Another LDP3430 report...
> > >
> > > The LDP3430 seems to be getting there, but:
> > >
> > > 1. LCD screen seems wrong.  The X display looks rather large, and
> > >    flickery - looks like the LCD timing parameters are wrong.  Some
> > >    text disappears off the RHS.
> > >
> > >    fbset reports:
> > > 	mode "240x320-510"
> > > 		# D: 48.001 MHz, H: 168.424 kHz, V: 510.375 Hz
> > > 		geometry 240 320 240 320 16
> > > 		timings 20833 3 39 2 7 3 1
> > > 		accel false
> > > 		rgba 5/11,6/5,5/0,0/0
> > >
> > >    kernel config:
> > > 	CONFIG_FB_OMAP=y
> > > 	CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE=2
> > >
> > >    with the supplied kernel:
> > > 	mode "640x480-64"
> > > 		# D: 21.601 MHz, H: 31.396 kHz, V: 63.813 Hz
> > > 		geometry 640 480 640 640 16
> > > 		timings 46295 40 4 8 2 4 2
> > > 		accel false
> > > 		rgba 5/11,6/5,5/0,0/0
> > >    so the LCD timings in the kernel appear to be wrong for the panel
> > >    on the LDP.  What is 'CONFIG_FB_OMAP_LCD_VGA'?  There's *no* help

I would send a patch for this to Tomi.

> > >    for this configuration option so god only knows what it's right
> > >    setting should be.  Please give it some help text to explain what
> > >    it is and what it does.
I think it is because x_res and y_res of panel are set to QVGA (320 X 240)
and the content sent is VGA (640 X 480)


With CONFIG_FB_OMAP_LCD_VGA=y the resolution taken is VGA (640 X 480)
You can check drivers/video/omap/lcd_ldp.c
http://lxr.linux.no/#linux+v2.6.37/drivers/video/omap/lcd_ldp.c#L185

> >
> > LCD works better with FB_OMAP_LCD_VGA set, but why is this necessary?

This would set the resolution to VGA (640 X 480)

3430 SDP has a switch to toggle between VGA (640 X 480) and QQVGA (320 X 240). So this switch must also be toggled along with the when we are booting a kernel with CONFIG_FB_OMAP_LCD_VGA=y

In LDP it is controlled by a GPIO:
#define LCD_PANEL_QVGA_GPIO             56
Depending on value of this the resolution is selected.
If LCD_PANEL_QVGA_GPIO is 1 then resolution is 320 X 240

Also, could you please share other CONFIG options which you are enabling over omap2plus_defconfig? (Otherwise please share .config)

-Thanks,
Mayuresh

> >
> > > 2. Keyboard - numeric keys produce wrong ascii for their labelled
> > >    function.  This is from /dev/tty1 with X running:
> > >
> > > 	1 gives nothing	2 gives 4	3 gives 7
> > > 	4 gives 2	5 gives 5	6 gives 8
> > > 	7 gives 3	8 gives nothing	9 gives 9
> > > 	* gives nothing	0 gives E	# gives nothing
> > >
> > >    off-hook (green phone) gives 0
> > >    on-hook (red phone) gives <1b><5b><31><39><7e>
> > >
> > >    Killing X and then running evtest on /dev/input/event1 doesn't
> > >    return any events, neither does reading /dev/tty1 for the twl4030
> > >    keypad - the numeric keys are completely dead.  /proc/interrupts
> > >    shows no new interrupt counts when pressing the key for
> > >    'twl4030_keypad'.  Unbinding/rebinding the twl4030 driver doesn't
> > >    sort it out, neither does restarting X.
> >
> > 3. Touchscreen is dead, presumably because no devices are bound to
> >    ads7846 SPI driver.
> >
> > ls -al /sys/bus/spi/devices/
> > total 0
> > drwxr-xr-x  2 root root 0 Jan  1 01:02 .
> > drwxr-xr-x  4 root root 0 Jan  1 01:02 ..
> > lrwxrwxrwx  1 root root 0 Jan  1 01:02 spi1.0 ->
> ../../../devices/platform/omap2_mcspi.1/spi1.0
> >
> > is the only SPI device which appears, but is unbound.  I'm sure this
> used
> > to work at some point.
> 
> Anybody from TI looking into these?
> 
> Regards,
> 
> Tony
> --
> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html

Re: State of LDP3430 platform

[Russell King - ARM Linux]

[-- Attachment #1: Type: text/plain, Size: 215 bytes --]

On Thu, Feb 24, 2011 at 01:51:50PM +0530, Janorkar, Mayuresh wrote:
> Also, could you please share other CONFIG options which you are enabling
> over omap2plus_defconfig? (Otherwise please share .config)

Attached.

[-- Attachment #2: ldp3430.config --]
[-- Type: text/plain, Size: 41466 bytes --]

#
# Automatically generated make config: don't edit
# Linux/arm 2.6.38-rc4 Kernel Configuration
# Sat Feb 12 16:43:38 2011
#
CONFIG_ARM=y
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
CONFIG_HAVE_SCHED_CLOCK=y
CONFIG_GENERIC_GPIO=y
# CONFIG_ARCH_USES_GETTIMEOFFSET is not set
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_HAVE_PROC_CPU=y
CONFIG_STACKTRACE_SUPPORT=y
CONFIG_HAVE_LATENCYTOP_SUPPORT=y
CONFIG_LOCKDEP_SUPPORT=y
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_GENERIC_IRQ_PROBE=y
CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_ARCH_HAS_CPUFREQ=y
CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y
CONFIG_GENERIC_HWEIGHT=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_ARM_L1_CACHE_SHIFT_6=y
CONFIG_VECTORS_BASE=0xffff0000
CONFIG_ARM_PATCH_PHYS_VIRT=y
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
CONFIG_CONSTRUCTORS=y
CONFIG_HAVE_IRQ_WORK=y

#
# General setup
#
CONFIG_EXPERIMENTAL=y
CONFIG_BROKEN_ON_SMP=y
CONFIG_INIT_ENV_ARG_LIMIT=32
CONFIG_CROSS_COMPILE=""
CONFIG_LOCALVERSION=""
# CONFIG_LOCALVERSION_AUTO is not set
CONFIG_HAVE_KERNEL_GZIP=y
CONFIG_HAVE_KERNEL_LZMA=y
CONFIG_HAVE_KERNEL_LZO=y
# CONFIG_KERNEL_GZIP is not set
# CONFIG_KERNEL_LZMA is not set
CONFIG_KERNEL_LZO=y
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
CONFIG_SYSVIPC_SYSCTL=y
# CONFIG_POSIX_MQUEUE is not set
CONFIG_BSD_PROCESS_ACCT=y
# CONFIG_BSD_PROCESS_ACCT_V3 is not set
# CONFIG_TASKSTATS is not set
# CONFIG_AUDIT is not set
CONFIG_HAVE_GENERIC_HARDIRQS=y

#
# IRQ subsystem
#
CONFIG_GENERIC_HARDIRQS=y
# CONFIG_GENERIC_HARDIRQS_NO_DEPRECATED is not set
CONFIG_HAVE_SPARSE_IRQ=y
# CONFIG_GENERIC_PENDING_IRQ is not set
# CONFIG_AUTO_IRQ_AFFINITY is not set
# CONFIG_IRQ_PER_CPU is not set
# CONFIG_SPARSE_IRQ is not set

#
# RCU Subsystem
#
CONFIG_TINY_RCU=y
# CONFIG_PREEMPT_RCU is not set
# CONFIG_RCU_TRACE is not set
# CONFIG_TREE_RCU_TRACE is not set
# CONFIG_IKCONFIG is not set
CONFIG_LOG_BUF_SHIFT=14
# CONFIG_CGROUPS is not set
# CONFIG_NAMESPACES is not set
# CONFIG_SCHED_AUTOGROUP is not set
CONFIG_SYSFS_DEPRECATED=y
CONFIG_SYSFS_DEPRECATED_V2=y
# CONFIG_RELAY is not set
CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_RD_GZIP=y
# CONFIG_RD_BZIP2 is not set
# CONFIG_RD_LZMA is not set
# CONFIG_RD_XZ is not set
# CONFIG_RD_LZO is not set
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_SYSCTL=y
CONFIG_ANON_INODES=y
CONFIG_EXPERT=y
CONFIG_EMBEDDED=y
CONFIG_UID16=y
# CONFIG_SYSCTL_SYSCALL is not set
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_ALL is not set
CONFIG_KALLSYMS_EXTRA_PASS=y
CONFIG_HOTPLUG=y
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_ELF_CORE=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_EPOLL=y
CONFIG_SIGNALFD=y
CONFIG_TIMERFD=y
CONFIG_EVENTFD=y
CONFIG_SHMEM=y
CONFIG_AIO=y
CONFIG_HAVE_PERF_EVENTS=y
CONFIG_PERF_USE_VMALLOC=y

#
# Kernel Performance Events And Counters
#
# CONFIG_PERF_EVENTS is not set
# CONFIG_PERF_COUNTERS is not set
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_COMPAT_BRK=y
CONFIG_SLAB=y
# CONFIG_SLUB is not set
# CONFIG_SLOB is not set
# CONFIG_PROFILING is not set
CONFIG_HAVE_OPROFILE=y
# CONFIG_KPROBES is not set
CONFIG_HAVE_KPROBES=y
CONFIG_HAVE_KRETPROBES=y
CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
CONFIG_HAVE_CLK=y
CONFIG_HAVE_DMA_API_DEBUG=y

#
# GCOV-based kernel profiling
#
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
CONFIG_SLABINFO=y
CONFIG_RT_MUTEXES=y
CONFIG_BASE_SMALL=0
CONFIG_MODULES=y
# CONFIG_MODULE_FORCE_LOAD is not set
CONFIG_MODULE_UNLOAD=y
# CONFIG_MODULE_FORCE_UNLOAD is not set
# CONFIG_MODVERSIONS is not set
CONFIG_MODULE_SRCVERSION_ALL=y
CONFIG_BLOCK=y
# CONFIG_LBDAF is not set
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_BLK_DEV_INTEGRITY is not set

#
# IO Schedulers
#
CONFIG_IOSCHED_NOOP=y
CONFIG_IOSCHED_DEADLINE=y
CONFIG_IOSCHED_CFQ=y
# CONFIG_DEFAULT_DEADLINE is not set
CONFIG_DEFAULT_CFQ=y
# CONFIG_DEFAULT_NOOP is not set
CONFIG_DEFAULT_IOSCHED="cfq"
# CONFIG_INLINE_SPIN_TRYLOCK is not set
# CONFIG_INLINE_SPIN_TRYLOCK_BH is not set
# CONFIG_INLINE_SPIN_LOCK is not set
# CONFIG_INLINE_SPIN_LOCK_BH is not set
# CONFIG_INLINE_SPIN_LOCK_IRQ is not set
# CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set
CONFIG_INLINE_SPIN_UNLOCK=y
# CONFIG_INLINE_SPIN_UNLOCK_BH is not set
CONFIG_INLINE_SPIN_UNLOCK_IRQ=y
# CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set
# CONFIG_INLINE_READ_TRYLOCK is not set
# CONFIG_INLINE_READ_LOCK is not set
# CONFIG_INLINE_READ_LOCK_BH is not set
# CONFIG_INLINE_READ_LOCK_IRQ is not set
# CONFIG_INLINE_READ_LOCK_IRQSAVE is not set
CONFIG_INLINE_READ_UNLOCK=y
# CONFIG_INLINE_READ_UNLOCK_BH is not set
CONFIG_INLINE_READ_UNLOCK_IRQ=y
# CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set
# CONFIG_INLINE_WRITE_TRYLOCK is not set
# CONFIG_INLINE_WRITE_LOCK is not set
# CONFIG_INLINE_WRITE_LOCK_BH is not set
# CONFIG_INLINE_WRITE_LOCK_IRQ is not set
# CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set
CONFIG_INLINE_WRITE_UNLOCK=y
# CONFIG_INLINE_WRITE_UNLOCK_BH is not set
CONFIG_INLINE_WRITE_UNLOCK_IRQ=y
# CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set
# CONFIG_MUTEX_SPIN_ON_OWNER is not set
CONFIG_FREEZER=y

#
# System Type
#
CONFIG_MMU=y
# CONFIG_ARCH_INTEGRATOR is not set
# CONFIG_ARCH_REALVIEW is not set
# CONFIG_ARCH_VERSATILE is not set
# CONFIG_ARCH_VEXPRESS is not set
# CONFIG_ARCH_AT91 is not set
# CONFIG_ARCH_BCMRING is not set
# CONFIG_ARCH_CLPS711X is not set
# CONFIG_ARCH_CNS3XXX is not set
# CONFIG_ARCH_GEMINI is not set
# CONFIG_ARCH_EBSA110 is not set
# CONFIG_ARCH_EP93XX is not set
# CONFIG_ARCH_FOOTBRIDGE is not set
# CONFIG_ARCH_MXC is not set
# CONFIG_ARCH_MXS is not set
# CONFIG_ARCH_STMP3XXX is not set
# CONFIG_ARCH_NETX is not set
# CONFIG_ARCH_H720X is not set
# CONFIG_ARCH_IOP13XX is not set
# CONFIG_ARCH_IOP32X is not set
# CONFIG_ARCH_IOP33X is not set
# CONFIG_ARCH_IXP23XX is not set
# CONFIG_ARCH_IXP2000 is not set
# CONFIG_ARCH_IXP4XX is not set
# CONFIG_ARCH_DOVE is not set
# CONFIG_ARCH_KIRKWOOD is not set
# CONFIG_ARCH_LOKI is not set
# CONFIG_ARCH_LPC32XX is not set
# CONFIG_ARCH_MV78XX0 is not set
# CONFIG_ARCH_ORION5X is not set
# CONFIG_ARCH_MMP is not set
# CONFIG_ARCH_KS8695 is not set
# CONFIG_ARCH_NS9XXX is not set
# CONFIG_ARCH_W90X900 is not set
# CONFIG_ARCH_NUC93X is not set
# CONFIG_ARCH_TEGRA is not set
# CONFIG_ARCH_PNX4008 is not set
# CONFIG_ARCH_PXA is not set
# CONFIG_ARCH_MSM is not set
# CONFIG_ARCH_SHMOBILE is not set
# CONFIG_ARCH_RPC is not set
# CONFIG_ARCH_SA1100 is not set
# CONFIG_ARCH_S3C2410 is not set
# CONFIG_ARCH_S3C64XX is not set
# CONFIG_ARCH_S5P64X0 is not set
# CONFIG_ARCH_S5P6442 is not set
# CONFIG_ARCH_S5PC100 is not set
# CONFIG_ARCH_S5PV210 is not set
# CONFIG_ARCH_S5PV310 is not set
# CONFIG_ARCH_SHARK is not set
# CONFIG_ARCH_TCC_926 is not set
# CONFIG_ARCH_U300 is not set
# CONFIG_ARCH_U8500 is not set
# CONFIG_ARCH_NOMADIK is not set
# CONFIG_ARCH_DAVINCI is not set
CONFIG_ARCH_OMAP=y
# CONFIG_PLAT_SPEAR is not set
# CONFIG_ARCH_VT8500 is not set
# CONFIG_GPIO_PCA953X is not set
# CONFIG_KEYBOARD_GPIO_POLLED is not set

#
# TI OMAP Common Features
#
CONFIG_ARCH_OMAP_OTG=y
# CONFIG_ARCH_OMAP1 is not set
CONFIG_ARCH_OMAP2PLUS=y

#
# OMAP Feature Selections
#
# CONFIG_OMAP_SMARTREFLEX is not set
# CONFIG_OMAP_RESET_CLOCKS is not set
CONFIG_OMAP_MUX=y
CONFIG_OMAP_MUX_DEBUG=y
CONFIG_OMAP_MUX_WARNINGS=y
CONFIG_OMAP_MCBSP=y
CONFIG_OMAP_MBOX_FWK=y
CONFIG_OMAP_MBOX_KFIFO_SIZE=256
CONFIG_OMAP_32K_TIMER=y
CONFIG_OMAP3_L2_AUX_SECURE_SAVE_RESTORE=y
CONFIG_OMAP3_L2_AUX_SECURE_SERVICE_SET_ID=43
CONFIG_OMAP_32K_TIMER_HZ=128
CONFIG_OMAP_DM_TIMER=y
# CONFIG_OMAP_PM_NONE is not set
CONFIG_OMAP_PM_NOOP=y

#
# TI OMAP2/3/4 Specific Features
#
# CONFIG_ARCH_OMAP2PLUS_TYPICAL is not set
# CONFIG_ARCH_OMAP2 is not set
CONFIG_ARCH_OMAP3=y
# CONFIG_ARCH_OMAP4 is not set
CONFIG_ARCH_OMAP3430=y
CONFIG_OMAP_PACKAGE_CBB=y

#
# OMAP Board Type
#
# CONFIG_MACH_OMAP3_BEAGLE is not set
# CONFIG_MACH_DEVKIT8000 is not set
CONFIG_MACH_OMAP_LDP=y
# CONFIG_MACH_OMAP3530_LV_SOM is not set
# CONFIG_MACH_OMAP3_TORPEDO is not set
# CONFIG_MACH_OVERO is not set
# CONFIG_MACH_OMAP3EVM is not set
# CONFIG_MACH_OMAP3517EVM is not set
# CONFIG_MACH_CRANEBOARD is not set
# CONFIG_MACH_OMAP3_PANDORA is not set
# CONFIG_MACH_OMAP3_TOUCHBOOK is not set
CONFIG_MACH_OMAP_3430SDP=y
# CONFIG_MACH_NOKIA_RM680 is not set
CONFIG_MACH_NOKIA_RX51=y
# CONFIG_MACH_OMAP_ZOOM2 is not set
# CONFIG_MACH_OMAP_ZOOM3 is not set
# CONFIG_MACH_CM_T35 is not set
# CONFIG_MACH_CM_T3517 is not set
# CONFIG_MACH_IGEP0020 is not set
# CONFIG_MACH_IGEP0030 is not set
# CONFIG_MACH_SBC3530 is not set
# CONFIG_MACH_OMAP_3630SDP is not set
# CONFIG_OMAP3_EMU is not set
# CONFIG_OMAP3_SDRC_AC_TIMING is not set

#
# Processor Type
#
CONFIG_CPU_V7=y
CONFIG_CPU_32v6K=y
CONFIG_CPU_32v7=y
CONFIG_CPU_ABRT_EV7=y
CONFIG_CPU_PABRT_V7=y
CONFIG_CPU_CACHE_V7=y
CONFIG_CPU_CACHE_VIPT=y
CONFIG_CPU_COPY_V6=y
CONFIG_CPU_TLB_V7=y
CONFIG_CPU_HAS_ASID=y
CONFIG_CPU_CP15=y
CONFIG_CPU_CP15_MMU=y

#
# Processor Features
#
CONFIG_ARM_THUMB=y
# CONFIG_ARM_THUMBEE is not set
# CONFIG_SWP_EMULATE is not set
# CONFIG_CPU_ICACHE_DISABLE is not set
# CONFIG_CPU_DCACHE_DISABLE is not set
# CONFIG_CPU_BPREDICT_DISABLE is not set
CONFIG_ARM_L1_CACHE_SHIFT=6
CONFIG_ARM_DMA_MEM_BUFFERABLE=y
CONFIG_ARM_ERRATA_430973=y
CONFIG_ARM_ERRATA_458693=y
CONFIG_ARM_ERRATA_460075=y
CONFIG_ARM_ERRATA_743622=y

#
# Bus support
#
# CONFIG_PCI_SYSCALL is not set
# CONFIG_ARCH_SUPPORTS_MSI is not set
# CONFIG_PCCARD is not set

#
# Kernel Features
#
CONFIG_TICK_ONESHOT=y
CONFIG_NO_HZ=y
CONFIG_HIGH_RES_TIMERS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_VMSPLIT_3G=y
# CONFIG_VMSPLIT_2G is not set
# CONFIG_VMSPLIT_1G is not set
CONFIG_PAGE_OFFSET=0xC0000000
CONFIG_PREEMPT_NONE=y
# CONFIG_PREEMPT_VOLUNTARY is not set
# CONFIG_PREEMPT is not set
CONFIG_HZ=128
# CONFIG_THUMB2_KERNEL is not set
CONFIG_AEABI=y
CONFIG_OABI_COMPAT=y
CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y
# CONFIG_ARCH_SPARSEMEM_DEFAULT is not set
# CONFIG_ARCH_SELECT_MEMORY_MODEL is not set
CONFIG_HIGHMEM=y
CONFIG_HIGHPTE=y
CONFIG_SELECT_MEMORY_MODEL=y
CONFIG_FLATMEM_MANUAL=y
CONFIG_FLATMEM=y
CONFIG_FLAT_NODE_MEM_MAP=y
CONFIG_HAVE_MEMBLOCK=y
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_SPLIT_PTLOCK_CPUS=4
# CONFIG_COMPACTION is not set
# CONFIG_PHYS_ADDR_T_64BIT is not set
CONFIG_ZONE_DMA_FLAG=0
CONFIG_BOUNCE=y
CONFIG_VIRT_TO_BUS=y
# CONFIG_KSM is not set
CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
CONFIG_NEED_PER_CPU_KM=y
CONFIG_FORCE_MAX_ZONEORDER=11
# CONFIG_LEDS is not set
CONFIG_ALIGNMENT_TRAP=y
# CONFIG_UACCESS_WITH_MEMCPY is not set
# CONFIG_SECCOMP is not set
# CONFIG_CC_STACKPROTECTOR is not set
CONFIG_DEPRECATED_PARAM_STRUCT=y

#
# Boot options
#
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_CMDLINE="root=/dev/nfs nfsroot=192.168.0.1:/home/user/buildroot ip=192.168.0.2:192.168.0.1:192.168.0.1:255.255.255.0:tgt:eth0:off rw console=ttyS2,115200n8"
# CONFIG_CMDLINE_FORCE is not set
# CONFIG_XIP_KERNEL is not set
# CONFIG_KEXEC is not set
# CONFIG_CRASH_DUMP is not set
# CONFIG_AUTO_ZRELADDR is not set

#
# CPU Power Management
#
# CONFIG_CPU_FREQ is not set
# CONFIG_CPU_IDLE is not set

#
# Floating point emulation
#

#
# At least one emulation must be selected
#
CONFIG_FPE_NWFPE=y
# CONFIG_FPE_NWFPE_XP is not set
# CONFIG_FPE_FASTFPE is not set
CONFIG_VFP=y
CONFIG_VFPv3=y
# CONFIG_NEON is not set

#
# Userspace binary formats
#
CONFIG_BINFMT_ELF=y
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
CONFIG_HAVE_AOUT=y
# CONFIG_BINFMT_AOUT is not set
CONFIG_BINFMT_MISC=y

#
# Power management options
#
CONFIG_PM=y
# CONFIG_PM_DEBUG is not set
CONFIG_PM_SLEEP=y
CONFIG_SUSPEND=y
CONFIG_SUSPEND_FREEZER=y
CONFIG_APM_EMULATION=y
CONFIG_PM_RUNTIME=y
CONFIG_PM_OPS=y
CONFIG_ARCH_HAS_OPP=y
CONFIG_PM_OPP=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_NET=y

#
# Networking options
#
CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_XFRM=y
# CONFIG_XFRM_USER is not set
# CONFIG_XFRM_SUB_POLICY is not set
# CONFIG_XFRM_MIGRATE is not set
# CONFIG_XFRM_STATISTICS is not set
# CONFIG_NET_KEY is not set
CONFIG_INET=y
# CONFIG_IP_MULTICAST is not set
# CONFIG_IP_ADVANCED_ROUTER is not set
CONFIG_IP_FIB_HASH=y
CONFIG_IP_PNP=y
CONFIG_IP_PNP_DHCP=y
# CONFIG_IP_PNP_BOOTP is not set
# CONFIG_IP_PNP_RARP is not set
# CONFIG_NET_IPIP is not set
# CONFIG_NET_IPGRE_DEMUX is not set
# CONFIG_ARPD is not set
# CONFIG_SYN_COOKIES is not set
# CONFIG_INET_AH is not set
# CONFIG_INET_ESP is not set
# CONFIG_INET_IPCOMP is not set
# CONFIG_INET_XFRM_TUNNEL is not set
# CONFIG_INET_TUNNEL is not set
CONFIG_INET_XFRM_MODE_TRANSPORT=y
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
# CONFIG_INET_XFRM_MODE_BEET is not set
CONFIG_INET_LRO=y
CONFIG_INET_DIAG=y
CONFIG_INET_TCP_DIAG=y
# CONFIG_TCP_CONG_ADVANCED is not set
CONFIG_TCP_CONG_CUBIC=y
CONFIG_DEFAULT_TCP_CONG="cubic"
# CONFIG_TCP_MD5SIG is not set
# CONFIG_IPV6 is not set
# CONFIG_NETWORK_SECMARK is not set
# CONFIG_NETWORK_PHY_TIMESTAMPING is not set
# CONFIG_NETFILTER is not set
# CONFIG_IP_DCCP is not set
# CONFIG_IP_SCTP is not set
# CONFIG_RDS is not set
# CONFIG_TIPC is not set
# CONFIG_ATM is not set
# CONFIG_L2TP is not set
# CONFIG_BRIDGE is not set
# CONFIG_NET_DSA is not set
# CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set
# CONFIG_LLC2 is not set
# CONFIG_IPX is not set
# CONFIG_ATALK is not set
# CONFIG_X25 is not set
# CONFIG_LAPB is not set
# CONFIG_ECONET is not set
# CONFIG_WAN_ROUTER is not set
# CONFIG_PHONET is not set
# CONFIG_IEEE802154 is not set
# CONFIG_NET_SCHED is not set
# CONFIG_DCB is not set
# CONFIG_BATMAN_ADV is not set

#
# Network testing
#
# CONFIG_NET_PKTGEN is not set
# CONFIG_HAMRADIO is not set
# CONFIG_CAN is not set
# CONFIG_IRDA is not set
# CONFIG_BT is not set
# CONFIG_AF_RXRPC is not set
# CONFIG_WIRELESS is not set
# CONFIG_WIMAX is not set
# CONFIG_RFKILL is not set
# CONFIG_NET_9P is not set
# CONFIG_CAIF is not set
# CONFIG_CEPH_LIB is not set

#
# Device Drivers
#

#
# Generic Driver Options
#
CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
# CONFIG_DEVTMPFS is not set
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
# CONFIG_FW_LOADER is not set
# CONFIG_DEBUG_DRIVER is not set
# CONFIG_DEBUG_DEVRES is not set
# CONFIG_SYS_HYPERVISOR is not set
# CONFIG_CONNECTOR is not set
# CONFIG_MTD is not set
# CONFIG_PARPORT is not set
CONFIG_BLK_DEV=y
# CONFIG_BLK_DEV_COW_COMMON is not set
CONFIG_BLK_DEV_LOOP=y
# CONFIG_BLK_DEV_CRYPTOLOOP is not set

#
# DRBD disabled because PROC_FS, INET or CONNECTOR not selected
#
# CONFIG_BLK_DEV_NBD is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=16384
# CONFIG_BLK_DEV_XIP is not set
# CONFIG_CDROM_PKTCDVD is not set
# CONFIG_ATA_OVER_ETH is not set
# CONFIG_MG_DISK is not set
# CONFIG_BLK_DEV_RBD is not set
CONFIG_MISC_DEVICES=y
# CONFIG_AD525X_DPOT is not set
# CONFIG_ICS932S401 is not set
# CONFIG_ENCLOSURE_SERVICES is not set
# CONFIG_APDS9802ALS is not set
# CONFIG_ISL29003 is not set
# CONFIG_ISL29020 is not set
# CONFIG_SENSORS_TSL2550 is not set
# CONFIG_SENSORS_BH1780 is not set
# CONFIG_SENSORS_BH1770 is not set
# CONFIG_SENSORS_APDS990X is not set
# CONFIG_HMC6352 is not set
# CONFIG_DS1682 is not set
# CONFIG_TI_DAC7512 is not set
# CONFIG_BMP085 is not set
# CONFIG_C2PORT is not set

#
# EEPROM support
#
CONFIG_EEPROM_AT24=y
CONFIG_EEPROM_AT25=y
# CONFIG_EEPROM_LEGACY is not set
# CONFIG_EEPROM_MAX6875 is not set
# CONFIG_EEPROM_93CX6 is not set
# CONFIG_IWMC3200TOP is not set

#
# Texas Instruments shared transport line discipline
#
CONFIG_HAVE_IDE=y
# CONFIG_IDE is not set

#
# SCSI device support
#
CONFIG_SCSI_MOD=y
# CONFIG_RAID_ATTRS is not set
CONFIG_SCSI=y
CONFIG_SCSI_DMA=y
# CONFIG_SCSI_TGT is not set
# CONFIG_SCSI_NETLINK is not set
CONFIG_SCSI_PROC_FS=y

#
# SCSI support type (disk, tape, CD-ROM)
#
CONFIG_BLK_DEV_SD=y
# CONFIG_CHR_DEV_ST is not set
# CONFIG_CHR_DEV_OSST is not set
# CONFIG_BLK_DEV_SR is not set
# CONFIG_CHR_DEV_SG is not set
# CONFIG_CHR_DEV_SCH is not set
# CONFIG_SCSI_MULTI_LUN is not set
# CONFIG_SCSI_CONSTANTS is not set
# CONFIG_SCSI_LOGGING is not set
# CONFIG_SCSI_SCAN_ASYNC is not set
CONFIG_SCSI_WAIT_SCAN=m

#
# SCSI Transports
#
# CONFIG_SCSI_SPI_ATTRS is not set
# CONFIG_SCSI_FC_ATTRS is not set
# CONFIG_SCSI_ISCSI_ATTRS is not set
# CONFIG_SCSI_SAS_ATTRS is not set
# CONFIG_SCSI_SAS_LIBSAS is not set
# CONFIG_SCSI_SRP_ATTRS is not set
CONFIG_SCSI_LOWLEVEL=y
# CONFIG_ISCSI_TCP is not set
# CONFIG_ISCSI_BOOT_SYSFS is not set
# CONFIG_LIBFC is not set
# CONFIG_LIBFCOE is not set
# CONFIG_SCSI_DEBUG is not set
# CONFIG_SCSI_DH is not set
# CONFIG_SCSI_OSD_INITIATOR is not set
# CONFIG_ATA is not set
# CONFIG_MD is not set
# CONFIG_TARGET_CORE is not set
CONFIG_NETDEVICES=y
# CONFIG_DUMMY is not set
# CONFIG_BONDING is not set
# CONFIG_MACVLAN is not set
# CONFIG_EQUALIZER is not set
# CONFIG_TUN is not set
# CONFIG_VETH is not set
CONFIG_MII=y
CONFIG_PHYLIB=y

#
# MII PHY device drivers
#
# CONFIG_MARVELL_PHY is not set
# CONFIG_DAVICOM_PHY is not set
# CONFIG_QSEMI_PHY is not set
# CONFIG_LXT_PHY is not set
# CONFIG_CICADA_PHY is not set
# CONFIG_VITESSE_PHY is not set
CONFIG_SMSC_PHY=y
# CONFIG_BROADCOM_PHY is not set
# CONFIG_BCM63XX_PHY is not set
# CONFIG_ICPLUS_PHY is not set
# CONFIG_REALTEK_PHY is not set
# CONFIG_NATIONAL_PHY is not set
# CONFIG_STE10XP is not set
# CONFIG_LSI_ET1011C_PHY is not set
# CONFIG_MICREL_PHY is not set
# CONFIG_FIXED_PHY is not set
# CONFIG_MDIO_BITBANG is not set
CONFIG_NET_ETHERNET=y
# CONFIG_AX88796 is not set
# CONFIG_SMC91X is not set
# CONFIG_TI_DAVINCI_EMAC is not set
# CONFIG_TI_DAVINCI_MDIO is not set
# CONFIG_TI_DAVINCI_CPDMA is not set
# CONFIG_DM9000 is not set
# CONFIG_ENC28J60 is not set
# CONFIG_ETHOC is not set
# CONFIG_SMC911X is not set
CONFIG_SMSC911X=y
# CONFIG_SMSC911X_ARCH_HOOKS is not set
# CONFIG_DNET is not set
# CONFIG_IBM_NEW_EMAC_ZMII is not set
# CONFIG_IBM_NEW_EMAC_RGMII is not set
# CONFIG_IBM_NEW_EMAC_TAH is not set
# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
# CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set
# CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set
# CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set
# CONFIG_B44 is not set
# CONFIG_KS8851 is not set
# CONFIG_KS8851_MLL is not set
# CONFIG_NETDEV_1000 is not set
# CONFIG_NETDEV_10000 is not set
# CONFIG_WLAN is not set

#
# Enable WiMAX (Networking options) to see the WiMAX drivers
#
# CONFIG_WAN is not set

#
# CAIF transport drivers
#
# CONFIG_PPP is not set
# CONFIG_SLIP is not set
# CONFIG_NETCONSOLE is not set
# CONFIG_NETPOLL is not set
# CONFIG_NET_POLL_CONTROLLER is not set
# CONFIG_ISDN is not set
# CONFIG_PHONE is not set

#
# Input device support
#
CONFIG_INPUT=y
# CONFIG_INPUT_FF_MEMLESS is not set
# CONFIG_INPUT_POLLDEV is not set
# CONFIG_INPUT_SPARSEKMAP is not set

#
# Userland interfaces
#
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_JOYDEV is not set
CONFIG_INPUT_EVDEV=y
# CONFIG_INPUT_EVBUG is not set
CONFIG_INPUT_APMPOWER=y

#
# Input Device Drivers
#
CONFIG_INPUT_KEYBOARD=y
# CONFIG_KEYBOARD_ADP5588 is not set
# CONFIG_KEYBOARD_ATKBD is not set
# CONFIG_KEYBOARD_QT2160 is not set
# CONFIG_KEYBOARD_LKKBD is not set
CONFIG_KEYBOARD_GPIO=y
# CONFIG_KEYBOARD_TCA6416 is not set
# CONFIG_KEYBOARD_MATRIX is not set
# CONFIG_KEYBOARD_MAX7359 is not set
# CONFIG_KEYBOARD_MCS is not set
# CONFIG_KEYBOARD_NEWTON is not set
# CONFIG_KEYBOARD_OPENCORES is not set
# CONFIG_KEYBOARD_STOWAWAY is not set
# CONFIG_KEYBOARD_SUNKBD is not set
CONFIG_KEYBOARD_TWL4030=y
# CONFIG_KEYBOARD_XTKBD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TABLET is not set
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_ADS7846=y
# CONFIG_TOUCHSCREEN_AD7877 is not set
# CONFIG_TOUCHSCREEN_AD7879 is not set
# CONFIG_TOUCHSCREEN_BU21013 is not set
# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set
# CONFIG_TOUCHSCREEN_DYNAPRO is not set
# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set
# CONFIG_TOUCHSCREEN_EETI is not set
# CONFIG_TOUCHSCREEN_FUJITSU is not set
# CONFIG_TOUCHSCREEN_GUNZE is not set
# CONFIG_TOUCHSCREEN_ELO is not set
# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
# CONFIG_TOUCHSCREEN_MCS5000 is not set
# CONFIG_TOUCHSCREEN_MTOUCH is not set
# CONFIG_TOUCHSCREEN_INEXIO is not set
# CONFIG_TOUCHSCREEN_MK712 is not set
# CONFIG_TOUCHSCREEN_PENMOUNT is not set
# CONFIG_TOUCHSCREEN_QT602240 is not set
# CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set
# CONFIG_TOUCHSCREEN_TOUCHWIN is not set
# CONFIG_TOUCHSCREEN_TOUCHIT213 is not set
# CONFIG_TOUCHSCREEN_TSC2007 is not set
# CONFIG_TOUCHSCREEN_W90X900 is not set
# CONFIG_TOUCHSCREEN_ST1232 is not set
# CONFIG_TOUCHSCREEN_TPS6507X is not set
# CONFIG_INPUT_MISC is not set

#
# Hardware I/O ports
#
# CONFIG_SERIO is not set
# CONFIG_GAMEPORT is not set

#
# Character devices
#
CONFIG_VT=y
CONFIG_CONSOLE_TRANSLATIONS=y
CONFIG_VT_CONSOLE=y
CONFIG_HW_CONSOLE=y
# CONFIG_VT_HW_CONSOLE_BINDING is not set
CONFIG_DEVKMEM=y
# CONFIG_SERIAL_NONSTANDARD is not set
# CONFIG_N_GSM is not set

#
# Serial drivers
#
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_NR_UARTS=32
CONFIG_SERIAL_8250_RUNTIME_UARTS=4
CONFIG_SERIAL_8250_EXTENDED=y
CONFIG_SERIAL_8250_MANY_PORTS=y
CONFIG_SERIAL_8250_SHARE_IRQ=y
CONFIG_SERIAL_8250_DETECT_IRQ=y
CONFIG_SERIAL_8250_RSA=y

#
# Non-8250 serial port support
#
# CONFIG_SERIAL_MAX3100 is not set
# CONFIG_SERIAL_MAX3107 is not set
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
CONFIG_SERIAL_OMAP=y
CONFIG_SERIAL_OMAP_CONSOLE=y
# CONFIG_SERIAL_TIMBERDALE is not set
# CONFIG_SERIAL_ALTERA_JTAGUART is not set
# CONFIG_SERIAL_ALTERA_UART is not set
# CONFIG_SERIAL_IFX6X60 is not set
CONFIG_UNIX98_PTYS=y
# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
# CONFIG_LEGACY_PTYS is not set
# CONFIG_TTY_PRINTK is not set
# CONFIG_HVC_DCC is not set
# CONFIG_IPMI_HANDLER is not set
CONFIG_HW_RANDOM=y
# CONFIG_HW_RANDOM_TIMERIOMEM is not set
# CONFIG_R3964 is not set
# CONFIG_RAW_DRIVER is not set
# CONFIG_TCG_TPM is not set
# CONFIG_RAMOOPS is not set
CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_COMPAT=y
CONFIG_I2C_CHARDEV=y
# CONFIG_I2C_MUX is not set
CONFIG_I2C_HELPER_AUTO=y

#
# I2C Hardware Bus support
#

#
# I2C system bus drivers (mostly embedded / system-on-chip)
#
# CONFIG_I2C_DESIGNWARE is not set
# CONFIG_I2C_GPIO is not set
# CONFIG_I2C_OCORES is not set
CONFIG_I2C_OMAP=y
# CONFIG_I2C_PCA_PLATFORM is not set
# CONFIG_I2C_SIMTEC is not set
# CONFIG_I2C_XILINX is not set

#
# External I2C/SMBus adapter drivers
#
# CONFIG_I2C_PARPORT_LIGHT is not set
# CONFIG_I2C_TAOS_EVM is not set

#
# Other I2C/SMBus bus drivers
#
# CONFIG_I2C_STUB is not set
# CONFIG_I2C_DEBUG_CORE is not set
# CONFIG_I2C_DEBUG_ALGO is not set
# CONFIG_I2C_DEBUG_BUS is not set
CONFIG_SPI=y
# CONFIG_SPI_DEBUG is not set
CONFIG_SPI_MASTER=y

#
# SPI Master Controller Drivers
#
# CONFIG_SPI_BITBANG is not set
# CONFIG_SPI_GPIO is not set
CONFIG_SPI_OMAP24XX=y
# CONFIG_SPI_PXA2XX_PCI is not set
# CONFIG_SPI_XILINX is not set
# CONFIG_SPI_DESIGNWARE is not set

#
# SPI Protocol Masters
#
# CONFIG_SPI_SPIDEV is not set
# CONFIG_SPI_TLE62X0 is not set

#
# PPS support
#
# CONFIG_PPS is not set

#
# PPS generators support
#
CONFIG_ARCH_REQUIRE_GPIOLIB=y
CONFIG_GPIOLIB=y
# CONFIG_DEBUG_GPIO is not set
# CONFIG_GPIO_SYSFS is not set

#
# Memory mapped GPIO expanders:
#
CONFIG_GPIO_BASIC_MMIO=y
# CONFIG_GPIO_IT8761E is not set

#
# I2C GPIO expanders:
#
# CONFIG_GPIO_MAX7300 is not set
# CONFIG_GPIO_MAX732X is not set
# CONFIG_GPIO_PCF857X is not set
# CONFIG_GPIO_SX150X is not set
CONFIG_GPIO_TWL4030=y
# CONFIG_GPIO_ADP5588 is not set

#
# PCI GPIO expanders:
#

#
# SPI GPIO expanders:
#
# CONFIG_GPIO_MAX7301 is not set
# CONFIG_GPIO_MCP23S08 is not set
# CONFIG_GPIO_MC33880 is not set
# CONFIG_GPIO_74X164 is not set

#
# AC97 GPIO expanders:
#

#
# MODULbus GPIO expanders:
#
CONFIG_W1=y

#
# 1-wire Bus Masters
#
# CONFIG_W1_MASTER_DS2482 is not set
# CONFIG_W1_MASTER_DS1WM is not set
# CONFIG_W1_MASTER_GPIO is not set
# CONFIG_HDQ_MASTER_OMAP is not set

#
# 1-wire Slaves
#
# CONFIG_W1_SLAVE_THERM is not set
# CONFIG_W1_SLAVE_SMEM is not set
# CONFIG_W1_SLAVE_DS2423 is not set
# CONFIG_W1_SLAVE_DS2431 is not set
# CONFIG_W1_SLAVE_DS2433 is not set
# CONFIG_W1_SLAVE_DS2760 is not set
# CONFIG_W1_SLAVE_BQ27000 is not set
CONFIG_POWER_SUPPLY=y
# CONFIG_POWER_SUPPLY_DEBUG is not set
# CONFIG_PDA_POWER is not set
CONFIG_APM_POWER=y
# CONFIG_TEST_POWER is not set
# CONFIG_BATTERY_DS2782 is not set
# CONFIG_BATTERY_BQ20Z75 is not set
# CONFIG_BATTERY_BQ27x00 is not set
# CONFIG_BATTERY_MAX17040 is not set
# CONFIG_BATTERY_MAX17042 is not set
CONFIG_CHARGER_TWL4030=y
# CONFIG_CHARGER_GPIO is not set
# CONFIG_HWMON is not set
# CONFIG_THERMAL is not set
CONFIG_WATCHDOG=y
CONFIG_WATCHDOG_NOWAYOUT=y

#
# Watchdog Device Drivers
#
# CONFIG_SOFT_WATCHDOG is not set
# CONFIG_OMAP_WATCHDOG is not set
CONFIG_TWL4030_WATCHDOG=y
# CONFIG_MAX63XX_WATCHDOG is not set
CONFIG_SSB_POSSIBLE=y

#
# Sonics Silicon Backplane
#
# CONFIG_SSB is not set
CONFIG_MFD_SUPPORT=y
# CONFIG_MFD_CORE is not set
# CONFIG_MFD_88PM860X is not set
# CONFIG_MFD_SM501 is not set
# CONFIG_MFD_ASIC3 is not set
# CONFIG_HTC_EGPIO is not set
# CONFIG_HTC_PASIC3 is not set
# CONFIG_HTC_I2CPLD is not set
# CONFIG_TPS65010 is not set
# CONFIG_TPS6507X is not set
CONFIG_TWL4030_CORE=y
CONFIG_TWL4030_POWER=y
# CONFIG_TWL4030_CODEC is not set
# CONFIG_TWL6030_PWM is not set
# CONFIG_MFD_STMPE is not set
# CONFIG_MFD_TC3589X is not set
# CONFIG_MFD_TMIO is not set
# CONFIG_MFD_T7L66XB is not set
# CONFIG_MFD_TC6387XB is not set
# CONFIG_MFD_TC6393XB is not set
# CONFIG_PMIC_DA903X is not set
# CONFIG_PMIC_ADP5520 is not set
# CONFIG_MFD_MAX8925 is not set
# CONFIG_MFD_MAX8998 is not set
# CONFIG_MFD_WM8400 is not set
# CONFIG_MFD_WM831X_I2C is not set
# CONFIG_MFD_WM831X_SPI is not set
# CONFIG_MFD_WM8350_I2C is not set
# CONFIG_MFD_WM8994 is not set
# CONFIG_MFD_PCF50633 is not set
# CONFIG_MFD_MC13XXX is not set
# CONFIG_ABX500_CORE is not set
# CONFIG_EZX_PCAP is not set
# CONFIG_MFD_TPS6586X is not set
# CONFIG_MFD_WL1273_CORE is not set
CONFIG_REGULATOR=y
# CONFIG_REGULATOR_DEBUG is not set
# CONFIG_REGULATOR_DUMMY is not set
# CONFIG_REGULATOR_FIXED_VOLTAGE is not set
# CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set
# CONFIG_REGULATOR_USERSPACE_CONSUMER is not set
# CONFIG_REGULATOR_BQ24022 is not set
# CONFIG_REGULATOR_MAX1586 is not set
# CONFIG_REGULATOR_MAX8649 is not set
# CONFIG_REGULATOR_MAX8660 is not set
# CONFIG_REGULATOR_MAX8952 is not set
CONFIG_REGULATOR_TWL4030=y
# CONFIG_REGULATOR_LP3971 is not set
# CONFIG_REGULATOR_LP3972 is not set
# CONFIG_REGULATOR_TPS65023 is not set
# CONFIG_REGULATOR_TPS6507X is not set
# CONFIG_REGULATOR_ISL6271A is not set
# CONFIG_REGULATOR_AD5398 is not set
# CONFIG_REGULATOR_TPS6524X is not set
# CONFIG_MEDIA_SUPPORT is not set

#
# Graphics support
#
# CONFIG_DRM is not set
# CONFIG_VGASTATE is not set
CONFIG_VIDEO_OUTPUT_CONTROL=m
CONFIG_FB=y
# CONFIG_FIRMWARE_EDID is not set
# CONFIG_FB_DDC is not set
# CONFIG_FB_BOOT_VESA_SUPPORT is not set
CONFIG_FB_CFB_FILLRECT=y
CONFIG_FB_CFB_COPYAREA=y
CONFIG_FB_CFB_IMAGEBLIT=y
# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
# CONFIG_FB_SYS_FILLRECT is not set
# CONFIG_FB_SYS_COPYAREA is not set
# CONFIG_FB_SYS_IMAGEBLIT is not set
# CONFIG_FB_FOREIGN_ENDIAN is not set
# CONFIG_FB_SYS_FOPS is not set
# CONFIG_FB_WMT_GE_ROPS is not set
# CONFIG_FB_SVGALIB is not set
# CONFIG_FB_MACMODES is not set
# CONFIG_FB_BACKLIGHT is not set
# CONFIG_FB_MODE_HELPERS is not set
CONFIG_FB_TILEBLITTING=y

#
# Frame buffer hardware drivers
#
# CONFIG_FB_S1D13XXX is not set
# CONFIG_FB_VIRTUAL is not set
# CONFIG_FB_METRONOME is not set
# CONFIG_FB_MB862XX is not set
# CONFIG_FB_BROADSHEET is not set
CONFIG_FB_OMAP=y
CONFIG_FB_OMAP_LCD_VGA=y
# CONFIG_FB_OMAP_LCDC_EXTERNAL is not set
# CONFIG_FB_OMAP_LCD_MIPID is not set
# CONFIG_FB_OMAP_BOOTLOADER_INIT is not set
CONFIG_FB_OMAP_CONSISTENT_DMA_SIZE=2
# CONFIG_OMAP2_DSS is not set
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set

#
# Display device support
#
# CONFIG_DISPLAY_SUPPORT is not set

#
# Console display driver support
#
CONFIG_DUMMY_CONSOLE=y
# CONFIG_FRAMEBUFFER_CONSOLE is not set
CONFIG_LOGO=y
# CONFIG_LOGO_LINUX_MONO is not set
# CONFIG_LOGO_LINUX_VGA16 is not set
CONFIG_LOGO_LINUX_CLUT224=y
CONFIG_SOUND=y
# CONFIG_SOUND_OSS_CORE is not set
CONFIG_SND=y
CONFIG_SND_TIMER=y
CONFIG_SND_PCM=y
CONFIG_SND_JACK=y
# CONFIG_SND_SEQUENCER is not set
# CONFIG_SND_MIXER_OSS is not set
# CONFIG_SND_PCM_OSS is not set
# CONFIG_SND_HRTIMER is not set
# CONFIG_SND_DYNAMIC_MINORS is not set
CONFIG_SND_SUPPORT_OLD_API=y
CONFIG_SND_VERBOSE_PROCFS=y
# CONFIG_SND_VERBOSE_PRINTK is not set
# CONFIG_SND_DEBUG is not set
# CONFIG_SND_RAWMIDI_SEQ is not set
# CONFIG_SND_OPL3_LIB_SEQ is not set
# CONFIG_SND_OPL4_LIB_SEQ is not set
# CONFIG_SND_SBAWE_SEQ is not set
# CONFIG_SND_EMU10K1_SEQ is not set
CONFIG_SND_DRIVERS=y
# CONFIG_SND_DUMMY is not set
# CONFIG_SND_ALOOP is not set
# CONFIG_SND_MTPAV is not set
# CONFIG_SND_SERIAL_U16550 is not set
# CONFIG_SND_MPU401 is not set
CONFIG_SND_ARM=y
CONFIG_SND_SPI=y
CONFIG_SND_SOC=y
# CONFIG_SND_SOC_CACHE_LZO is not set
CONFIG_SND_OMAP_SOC=y
# CONFIG_SND_OMAP_SOC_RX51 is not set
# CONFIG_SND_OMAP_SOC_SDP3430 is not set
CONFIG_SND_SOC_I2C_AND_SPI=y
# CONFIG_SND_SOC_ALL_CODECS is not set
# CONFIG_SOUND_PRIME is not set
CONFIG_HID_SUPPORT=y
CONFIG_HID=y
# CONFIG_HIDRAW is not set
# CONFIG_HID_PID is not set

#
# Special HID drivers
#
# CONFIG_USB_SUPPORT is not set
CONFIG_USB_ARCH_HAS_EHCI=y
CONFIG_MMC=y
# CONFIG_MMC_DEBUG is not set
# CONFIG_MMC_UNSAFE_RESUME is not set
# CONFIG_MMC_CLKGATE is not set

#
# MMC/SD/SDIO Card Drivers
#
CONFIG_MMC_BLOCK=y
CONFIG_MMC_BLOCK_MINORS=8
CONFIG_MMC_BLOCK_BOUNCE=y
# CONFIG_SDIO_UART is not set
# CONFIG_MMC_TEST is not set

#
# MMC/SD/SDIO Host Controller Drivers
#
# CONFIG_MMC_SDHCI is not set
# CONFIG_MMC_OMAP is not set
CONFIG_MMC_OMAP_HS=y
# CONFIG_MMC_DW is not set
# CONFIG_MEMSTICK is not set
# CONFIG_NEW_LEDS is not set
# CONFIG_NFC_DEVICES is not set
# CONFIG_ACCESSIBILITY is not set
CONFIG_RTC_LIB=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_HCTOSYS=y
CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
# CONFIG_RTC_DEBUG is not set

#
# RTC interfaces
#
CONFIG_RTC_INTF_SYSFS=y
CONFIG_RTC_INTF_PROC=y
CONFIG_RTC_INTF_DEV=y
# CONFIG_RTC_DRV_TEST is not set

#
# I2C RTC drivers
#
# CONFIG_RTC_DRV_DS1307 is not set
# CONFIG_RTC_DRV_DS1374 is not set
# CONFIG_RTC_DRV_DS1672 is not set
# CONFIG_RTC_DRV_DS3232 is not set
# CONFIG_RTC_DRV_MAX6900 is not set
# CONFIG_RTC_DRV_RS5C372 is not set
# CONFIG_RTC_DRV_ISL1208 is not set
# CONFIG_RTC_DRV_ISL12022 is not set
# CONFIG_RTC_DRV_X1205 is not set
# CONFIG_RTC_DRV_PCF8563 is not set
# CONFIG_RTC_DRV_PCF8583 is not set
# CONFIG_RTC_DRV_M41T80 is not set
# CONFIG_RTC_DRV_BQ32K is not set
CONFIG_RTC_DRV_TWL4030=y
# CONFIG_RTC_DRV_S35390A is not set
# CONFIG_RTC_DRV_FM3130 is not set
# CONFIG_RTC_DRV_RX8581 is not set
# CONFIG_RTC_DRV_RX8025 is not set

#
# SPI RTC drivers
#
# CONFIG_RTC_DRV_M41T94 is not set
# CONFIG_RTC_DRV_DS1305 is not set
# CONFIG_RTC_DRV_DS1390 is not set
# CONFIG_RTC_DRV_MAX6902 is not set
# CONFIG_RTC_DRV_R9701 is not set
# CONFIG_RTC_DRV_RS5C348 is not set
# CONFIG_RTC_DRV_DS3234 is not set
# CONFIG_RTC_DRV_PCF2123 is not set

#
# Platform RTC drivers
#
# CONFIG_RTC_DRV_CMOS is not set
# CONFIG_RTC_DRV_DS1286 is not set
# CONFIG_RTC_DRV_DS1511 is not set
# CONFIG_RTC_DRV_DS1553 is not set
# CONFIG_RTC_DRV_DS1742 is not set
# CONFIG_RTC_DRV_STK17TA8 is not set
# CONFIG_RTC_DRV_M48T86 is not set
# CONFIG_RTC_DRV_M48T35 is not set
# CONFIG_RTC_DRV_M48T59 is not set
# CONFIG_RTC_DRV_MSM6242 is not set
# CONFIG_RTC_DRV_BQ4802 is not set
# CONFIG_RTC_DRV_RP5C01 is not set
# CONFIG_RTC_DRV_V3020 is not set

#
# on-CPU RTC drivers
#
# CONFIG_DMADEVICES is not set
# CONFIG_AUXDISPLAY is not set
# CONFIG_UIO is not set
# CONFIG_STAGING is not set
CONFIG_CLKDEV_LOOKUP=y

#
# File systems
#
CONFIG_EXT2_FS=y
# CONFIG_EXT2_FS_XATTR is not set
# CONFIG_EXT2_FS_XIP is not set
CONFIG_EXT3_FS=y
# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
# CONFIG_EXT3_FS_XATTR is not set
# CONFIG_EXT4_FS is not set
CONFIG_JBD=y
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
# CONFIG_XFS_FS is not set
# CONFIG_BTRFS_FS is not set
# CONFIG_NILFS2_FS is not set
# CONFIG_FS_POSIX_ACL is not set
CONFIG_FILE_LOCKING=y
CONFIG_FSNOTIFY=y
CONFIG_DNOTIFY=y
CONFIG_INOTIFY_USER=y
# CONFIG_FANOTIFY is not set
CONFIG_QUOTA=y
# CONFIG_QUOTA_NETLINK_INTERFACE is not set
CONFIG_PRINT_QUOTA_WARNING=y
# CONFIG_QUOTA_DEBUG is not set
CONFIG_QUOTA_TREE=y
# CONFIG_QFMT_V1 is not set
CONFIG_QFMT_V2=y
CONFIG_QUOTACTL=y
# CONFIG_AUTOFS4_FS is not set
# CONFIG_FUSE_FS is not set

#
# Caches
#
# CONFIG_FSCACHE is not set

#
# CD-ROM/DVD Filesystems
#
# CONFIG_ISO9660_FS is not set
# CONFIG_UDF_FS is not set

#
# DOS/FAT/NT Filesystems
#
CONFIG_FAT_FS=y
CONFIG_MSDOS_FS=y
CONFIG_VFAT_FS=y
CONFIG_FAT_DEFAULT_CODEPAGE=437
CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
# CONFIG_NTFS_FS is not set

#
# Pseudo filesystems
#
CONFIG_PROC_FS=y
CONFIG_PROC_SYSCTL=y
CONFIG_PROC_PAGE_MONITOR=y
CONFIG_SYSFS=y
CONFIG_TMPFS=y
# CONFIG_TMPFS_POSIX_ACL is not set
# CONFIG_HUGETLB_PAGE is not set
# CONFIG_CONFIGFS_FS is not set
CONFIG_MISC_FILESYSTEMS=y
# CONFIG_ADFS_FS is not set
# CONFIG_AFFS_FS is not set
# CONFIG_HFS_FS is not set
# CONFIG_HFSPLUS_FS is not set
# CONFIG_BEFS_FS is not set
# CONFIG_BFS_FS is not set
# CONFIG_EFS_FS is not set
# CONFIG_LOGFS is not set
# CONFIG_CRAMFS is not set
# CONFIG_SQUASHFS is not set
# CONFIG_VXFS_FS is not set
# CONFIG_MINIX_FS is not set
# CONFIG_OMFS_FS is not set
# CONFIG_HPFS_FS is not set
# CONFIG_QNX4FS_FS is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_SYSV_FS is not set
# CONFIG_UFS_FS is not set
CONFIG_NETWORK_FILESYSTEMS=y
CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
# CONFIG_NFS_V3_ACL is not set
# CONFIG_NFS_V4 is not set
# CONFIG_ROOT_NFS is not set
# CONFIG_NFSD is not set
CONFIG_LOCKD=y
CONFIG_LOCKD_V4=y
CONFIG_NFS_COMMON=y
CONFIG_SUNRPC=y
# CONFIG_RPCSEC_GSS_KRB5 is not set
# CONFIG_CEPH_FS is not set
# CONFIG_CIFS is not set
# CONFIG_NCP_FS is not set
# CONFIG_CODA_FS is not set
# CONFIG_AFS_FS is not set

#
# Partition Types
#
CONFIG_PARTITION_ADVANCED=y
# CONFIG_ACORN_PARTITION is not set
# CONFIG_OSF_PARTITION is not set
# CONFIG_AMIGA_PARTITION is not set
# CONFIG_ATARI_PARTITION is not set
# CONFIG_MAC_PARTITION is not set
CONFIG_MSDOS_PARTITION=y
# CONFIG_BSD_DISKLABEL is not set
# CONFIG_MINIX_SUBPARTITION is not set
# CONFIG_SOLARIS_X86_PARTITION is not set
# CONFIG_UNIXWARE_DISKLABEL is not set
# CONFIG_LDM_PARTITION is not set
# CONFIG_SGI_PARTITION is not set
# CONFIG_ULTRIX_PARTITION is not set
# CONFIG_SUN_PARTITION is not set
# CONFIG_KARMA_PARTITION is not set
# CONFIG_EFI_PARTITION is not set
# CONFIG_SYSV68_PARTITION is not set
CONFIG_NLS=y
CONFIG_NLS_DEFAULT="iso8859-1"
CONFIG_NLS_CODEPAGE_437=y
# CONFIG_NLS_CODEPAGE_737 is not set
# CONFIG_NLS_CODEPAGE_775 is not set
# CONFIG_NLS_CODEPAGE_850 is not set
# CONFIG_NLS_CODEPAGE_852 is not set
# CONFIG_NLS_CODEPAGE_855 is not set
# CONFIG_NLS_CODEPAGE_857 is not set
# CONFIG_NLS_CODEPAGE_860 is not set
# CONFIG_NLS_CODEPAGE_861 is not set
# CONFIG_NLS_CODEPAGE_862 is not set
# CONFIG_NLS_CODEPAGE_863 is not set
# CONFIG_NLS_CODEPAGE_864 is not set
# CONFIG_NLS_CODEPAGE_865 is not set
# CONFIG_NLS_CODEPAGE_866 is not set
# CONFIG_NLS_CODEPAGE_869 is not set
# CONFIG_NLS_CODEPAGE_936 is not set
# CONFIG_NLS_CODEPAGE_950 is not set
# CONFIG_NLS_CODEPAGE_932 is not set
# CONFIG_NLS_CODEPAGE_949 is not set
# CONFIG_NLS_CODEPAGE_874 is not set
# CONFIG_NLS_ISO8859_8 is not set
# CONFIG_NLS_CODEPAGE_1250 is not set
# CONFIG_NLS_CODEPAGE_1251 is not set
# CONFIG_NLS_ASCII is not set
CONFIG_NLS_ISO8859_1=y
# CONFIG_NLS_ISO8859_2 is not set
# CONFIG_NLS_ISO8859_3 is not set
# CONFIG_NLS_ISO8859_4 is not set
# CONFIG_NLS_ISO8859_5 is not set
# CONFIG_NLS_ISO8859_6 is not set
# CONFIG_NLS_ISO8859_7 is not set
# CONFIG_NLS_ISO8859_9 is not set
# CONFIG_NLS_ISO8859_13 is not set
# CONFIG_NLS_ISO8859_14 is not set
# CONFIG_NLS_ISO8859_15 is not set
# CONFIG_NLS_KOI8_R is not set
# CONFIG_NLS_KOI8_U is not set
# CONFIG_NLS_UTF8 is not set

#
# Kernel hacking
#
# CONFIG_PRINTK_TIME is not set
CONFIG_ENABLE_WARN_DEPRECATED=y
CONFIG_ENABLE_MUST_CHECK=y
CONFIG_FRAME_WARN=1024
CONFIG_MAGIC_SYSRQ=y
# CONFIG_STRIP_ASM_SYMS is not set
# CONFIG_UNUSED_SYMBOLS is not set
# CONFIG_DEBUG_FS is not set
# CONFIG_HEADERS_CHECK is not set
CONFIG_DEBUG_KERNEL=y
# CONFIG_DEBUG_SHIRQ is not set
# CONFIG_LOCKUP_DETECTOR is not set
# CONFIG_HARDLOCKUP_DETECTOR is not set
CONFIG_DETECT_HUNG_TASK=y
# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
CONFIG_SCHED_DEBUG=y
# CONFIG_SCHEDSTATS is not set
# CONFIG_TIMER_STATS is not set
# CONFIG_DEBUG_OBJECTS is not set
# CONFIG_DEBUG_SLAB is not set
# CONFIG_DEBUG_KMEMLEAK is not set
# CONFIG_DEBUG_RT_MUTEXES is not set
# CONFIG_RT_MUTEX_TESTER is not set
# CONFIG_DEBUG_SPINLOCK is not set
CONFIG_DEBUG_MUTEXES=y
CONFIG_BKL=y
# CONFIG_DEBUG_LOCK_ALLOC is not set
# CONFIG_PROVE_LOCKING is not set
# CONFIG_SPARSE_RCU_POINTER is not set
# CONFIG_LOCK_STAT is not set
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
# CONFIG_DEBUG_KOBJECT is not set
CONFIG_DEBUG_HIGHMEM=y
# CONFIG_DEBUG_BUGVERBOSE is not set
# CONFIG_DEBUG_INFO is not set
# CONFIG_DEBUG_VM is not set
# CONFIG_DEBUG_WRITECOUNT is not set
# CONFIG_DEBUG_MEMORY_INIT is not set
# CONFIG_DEBUG_LIST is not set
# CONFIG_TEST_LIST_SORT is not set
# CONFIG_DEBUG_SG is not set
# CONFIG_DEBUG_NOTIFIERS is not set
# CONFIG_DEBUG_CREDENTIALS is not set
# CONFIG_BOOT_PRINTK_DELAY is not set
# CONFIG_RCU_TORTURE_TEST is not set
# CONFIG_BACKTRACE_SELF_TEST is not set
# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
# CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set
# CONFIG_FAULT_INJECTION is not set
# CONFIG_LATENCYTOP is not set
# CONFIG_SYSCTL_SYSCALL_CHECK is not set
# CONFIG_PAGE_POISONING is not set
CONFIG_HAVE_FUNCTION_TRACER=y
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
CONFIG_HAVE_DYNAMIC_FTRACE=y
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
CONFIG_HAVE_C_RECORDMCOUNT=y
CONFIG_TRACING_SUPPORT=y
# CONFIG_FTRACE is not set
CONFIG_DMA_API_DEBUG=y
# CONFIG_ATOMIC64_SELFTEST is not set
# CONFIG_SAMPLES is not set
CONFIG_HAVE_ARCH_KGDB=y
# CONFIG_KGDB is not set
# CONFIG_STRICT_DEVMEM is not set
CONFIG_ARM_UNWIND=y
# CONFIG_DEBUG_USER is not set
# CONFIG_DEBUG_ERRORS is not set
# CONFIG_DEBUG_STACK_USAGE is not set
CONFIG_DEBUG_LL=y
# CONFIG_EARLY_PRINTK is not set
# CONFIG_DEBUG_ICEDCC is not set
# CONFIG_OC_ETM is not set

#
# Security options
#
# CONFIG_KEYS is not set
# CONFIG_SECURITY_DMESG_RESTRICT is not set
# CONFIG_SECURITY is not set
# CONFIG_SECURITYFS is not set
CONFIG_DEFAULT_SECURITY_DAC=y
CONFIG_DEFAULT_SECURITY=""
CONFIG_CRYPTO=y

#
# Crypto core or helper
#
CONFIG_CRYPTO_ALGAPI=y
CONFIG_CRYPTO_ALGAPI2=y
CONFIG_CRYPTO_AEAD2=y
CONFIG_CRYPTO_BLKCIPHER=y
CONFIG_CRYPTO_BLKCIPHER2=y
CONFIG_CRYPTO_HASH=y
CONFIG_CRYPTO_HASH2=y
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_PCOMP2=y
CONFIG_CRYPTO_MANAGER=y
CONFIG_CRYPTO_MANAGER2=y
CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y
# CONFIG_CRYPTO_GF128MUL is not set
# CONFIG_CRYPTO_NULL is not set
CONFIG_CRYPTO_WORKQUEUE=y
# CONFIG_CRYPTO_CRYPTD is not set
# CONFIG_CRYPTO_AUTHENC is not set
# CONFIG_CRYPTO_TEST is not set

#
# Authenticated Encryption with Associated Data
#
# CONFIG_CRYPTO_CCM is not set
# CONFIG_CRYPTO_GCM is not set
# CONFIG_CRYPTO_SEQIV is not set

#
# Block modes
#
CONFIG_CRYPTO_CBC=y
# CONFIG_CRYPTO_CTR is not set
# CONFIG_CRYPTO_CTS is not set
CONFIG_CRYPTO_ECB=m
# CONFIG_CRYPTO_LRW is not set
CONFIG_CRYPTO_PCBC=m
# CONFIG_CRYPTO_XTS is not set

#
# Hash modes
#
# CONFIG_CRYPTO_HMAC is not set
# CONFIG_CRYPTO_XCBC is not set
# CONFIG_CRYPTO_VMAC is not set

#
# Digest
#
CONFIG_CRYPTO_CRC32C=y
# CONFIG_CRYPTO_GHASH is not set
# CONFIG_CRYPTO_MD4 is not set
CONFIG_CRYPTO_MD5=y
# CONFIG_CRYPTO_MICHAEL_MIC is not set
# CONFIG_CRYPTO_RMD128 is not set
# CONFIG_CRYPTO_RMD160 is not set
# CONFIG_CRYPTO_RMD256 is not set
# CONFIG_CRYPTO_RMD320 is not set
# CONFIG_CRYPTO_SHA1 is not set
# CONFIG_CRYPTO_SHA256 is not set
# CONFIG_CRYPTO_SHA512 is not set
# CONFIG_CRYPTO_TGR192 is not set
# CONFIG_CRYPTO_WP512 is not set

#
# Ciphers
#
# CONFIG_CRYPTO_AES is not set
# CONFIG_CRYPTO_ANUBIS is not set
# CONFIG_CRYPTO_ARC4 is not set
# CONFIG_CRYPTO_BLOWFISH is not set
# CONFIG_CRYPTO_CAMELLIA is not set
# CONFIG_CRYPTO_CAST5 is not set
# CONFIG_CRYPTO_CAST6 is not set
CONFIG_CRYPTO_DES=y
# CONFIG_CRYPTO_FCRYPT is not set
# CONFIG_CRYPTO_KHAZAD is not set
# CONFIG_CRYPTO_SALSA20 is not set
# CONFIG_CRYPTO_SEED is not set
# CONFIG_CRYPTO_SERPENT is not set
# CONFIG_CRYPTO_TEA is not set
# CONFIG_CRYPTO_TWOFISH is not set

#
# Compression
#
# CONFIG_CRYPTO_DEFLATE is not set
# CONFIG_CRYPTO_ZLIB is not set
# CONFIG_CRYPTO_LZO is not set

#
# Random Number Generation
#
# CONFIG_CRYPTO_ANSI_CPRNG is not set
# CONFIG_CRYPTO_USER_API_HASH is not set
# CONFIG_CRYPTO_USER_API_SKCIPHER is not set
CONFIG_CRYPTO_HW=y
# CONFIG_CRYPTO_DEV_OMAP_SHAM is not set
# CONFIG_CRYPTO_DEV_OMAP_AES is not set
# CONFIG_BINARY_PRINTF is not set

#
# Library routines
#
CONFIG_BITREVERSE=y
CONFIG_GENERIC_FIND_LAST_BIT=y
CONFIG_CRC_CCITT=y
# CONFIG_CRC16 is not set
CONFIG_CRC_T10DIF=y
# CONFIG_CRC_ITU_T is not set
CONFIG_CRC32=y
# CONFIG_CRC7 is not set
CONFIG_LIBCRC32C=y
CONFIG_ZLIB_INFLATE=y
# CONFIG_XZ_DEC is not set
# CONFIG_XZ_DEC_BCJ is not set
CONFIG_DECOMPRESS_GZIP=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAS_DMA=y
CONFIG_NLATTR=y

RE: State of LDP3430 platform

[Rajendra Nayak]

> -----Original Message-----
> From: Rajendra Nayak [mailto:rnayak@ti.com]
> Sent: Thursday, February 24, 2011 12:39 PM
> To: Richard Woodruff; Tony Lindgren; Russell King - ARM Linux
> Cc: linux-omap@vger.kernel.org; Paul Walmsley; Santosh Shilimkar
> Subject: RE: State of LDP3430 platform
>
> > -----Original Message-----
> > From: linux-omap-owner@vger.kernel.org
> [mailto:linux-omap-owner@vger.kernel.org] On Behalf Of Woodruff, Richard
> > Sent: Thursday, February 24, 2011 4:53 AM
> > To: Tony Lindgren; Russell King - ARM Linux
> > Cc: linux-omap@vger.kernel.org; Paul Walmsley; Shilimkar, Santosh
> > Subject: RE: State of LDP3430 platform
> >
> > > From: Tony Lindgren [mailto:tony@atomide.com]
> > > Sent: Wednesday, February 23, 2011 4:50 PM
> >
> > > Anybody from TI looking into these?
> >
> > I'll poke some folks and check.  I've not booted my LDP for a while.
>
> There was a regulator mapping issue on 3430SDP because of
> which tocuhscreen was broken and is now fixed with this patch
> http://marc.info/?l=linux-arm-kernel&m=129673276608954&w=2
> Looks like the same issue on LDP. Will check it up.

This one should now have LDP TS working..
http://www.mail-archive.com/linux-omap@vger.kernel.org/msg45306.html

>
> Regards,
> Rajendra
>
> >
> > As an older 3430 dev board its lost its shine compared to 3630 and
4430
> dev boards.
> >
> > Regards,
> > Richard W.
> >
> > --
> > To unsubscribe from this list: send the line "unsubscribe linux-omap"
in
> > the body of a message to majordomo@vger.kernel.org
> > More majordomo info at  http://vger.kernel.org/majordomo-info.html