From: "Nadav Har'El" <nyh@il.ibm.com>
To: kvm@vger.kernel.org
Cc: gleb@redhat.com, avi@redhat.com
Subject: [PATCH 26/29] nVMX: Additional TSC-offset handling
Date: Thu, 27 Jan 2011 10:43:10 +0200 [thread overview]
Message-ID: <201101270843.p0R8hA6K002750@rice.haifa.ibm.com> (raw)
In-Reply-To: 1296116987-nyh@il.ibm.com
In the unlikely case that L1 does not capture MSR_IA32_TSC, L0 needs to
emulate this MSR write by L2 by modifying vmcs02.tsc_offset.
We also need to set vmcs12.tsc_offset, for this change to survive the next
nested entry (see prepare_vmcs02()).
Signed-off-by: Nadav Har'El <nyh@il.ibm.com>
---
arch/x86/kvm/vmx.c | 11 +++++++++++
1 file changed, 11 insertions(+)
--- .before/arch/x86/kvm/vmx.c 2011-01-26 18:06:06.000000000 +0200
+++ .after/arch/x86/kvm/vmx.c 2011-01-26 18:06:06.000000000 +0200
@@ -1655,12 +1655,23 @@ static u64 guest_read_tsc(void)
static void vmx_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
{
vmcs_write64(TSC_OFFSET, offset);
+ if (is_guest_mode(vcpu))
+ /*
+ * We are only changing TSC_OFFSET when L2 is running if for
+ * some reason L1 chose not to trap the TSC MSR. Since
+ * prepare_vmcs12() does not copy tsc_offset, we need to also
+ * set the vmcs12 field here.
+ */
+ get_vmcs12_fields(vcpu)->tsc_offset = offset -
+ to_vmx(vcpu)->nested.vmcs01_fields->tsc_offset;
}
static void vmx_adjust_tsc_offset(struct kvm_vcpu *vcpu, s64 adjustment)
{
u64 offset = vmcs_read64(TSC_OFFSET);
vmcs_write64(TSC_OFFSET, offset + adjustment);
+ if (is_guest_mode(vcpu))
+ get_vmcs12_fields(vcpu)->tsc_offset += adjustment;
}
static bool guest_cpuid_has_vmx(struct kvm_vcpu *vcpu)
next prev parent reply other threads:[~2011-01-27 8:43 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-01-27 8:29 [PATCH 0/29] nVMX: Nested VMX, v8 Nadav Har'El
2011-01-27 8:30 ` [PATCH 01/29] nVMX: Add "nested" module option to vmx.c Nadav Har'El
2011-01-27 8:30 ` [PATCH 02/29] nVMX: Implement VMXON and VMXOFF Nadav Har'El
2011-01-27 8:31 ` [PATCH 03/29] nVMX: Allow setting the VMXE bit in CR4 Nadav Har'El
2011-01-27 8:31 ` [PATCH 04/29] nVMX: Introduce vmcs12: a VMCS structure for L1 Nadav Har'El
2011-01-27 8:32 ` [PATCH 05/29] nVMX: Implement reading and writing of VMX MSRs Nadav Har'El
2011-01-30 9:52 ` Avi Kivity
2011-01-31 8:57 ` Nadav Har'El
2011-01-31 9:01 ` Avi Kivity
2011-01-27 8:32 ` [PATCH 06/29] nVMX: Decoding memory operands of VMX instructions Nadav Har'El
2011-01-27 8:33 ` [PATCH 07/29] nVMX: Hold a vmcs02 for each vmcs12 Nadav Har'El
2011-01-30 10:02 ` Avi Kivity
2011-01-31 9:26 ` Nadav Har'El
2011-01-31 9:41 ` Avi Kivity
2011-02-03 12:57 ` Nadav Har'El
2011-02-06 9:16 ` Avi Kivity
2011-02-13 13:04 ` Nadav Har'El
2011-02-13 14:58 ` Avi Kivity
2011-02-13 20:07 ` Nadav Har'El
2011-01-27 8:33 ` [PATCH 08/29] nVMX: Fix local_vcpus_link handling Nadav Har'El
2011-01-30 10:08 ` Avi Kivity
2011-01-27 8:34 ` [PATCH 09/29] nVMX: Add VMCS fields to the vmcs12 Nadav Har'El
2011-01-30 10:10 ` Avi Kivity
2011-01-27 8:34 ` [PATCH 10/29] nVMX: Success/failure of VMX instructions Nadav Har'El
2011-01-27 8:35 ` [PATCH 11/29] nVMX: Implement VMCLEAR Nadav Har'El
2011-01-30 12:07 ` Avi Kivity
2011-01-27 8:35 ` [PATCH 12/29] nVMX: Implement VMPTRLD Nadav Har'El
2011-01-27 8:36 ` [PATCH 13/29] nVMX: Implement VMPTRST Nadav Har'El
2011-01-27 8:37 ` [PATCH 14/29] nVMX: Implement VMREAD and VMWRITE Nadav Har'El
2011-01-27 8:37 ` [PATCH 15/29] nVMX: Prepare vmcs02 from vmcs01 and vmcs12 Nadav Har'El
2011-01-27 8:38 ` [PATCH 16/29] nVMX: Move register-syncing to a function Nadav Har'El
2011-01-27 8:38 ` [PATCH 17/29] nVMX: Implement VMLAUNCH and VMRESUME Nadav Har'El
2011-01-27 8:39 ` [PATCH 18/29] nVMX: No need for handle_vmx_insn function any more Nadav Har'El
2011-01-27 8:39 ` [PATCH 19/29] nVMX: Exiting from L2 to L1 Nadav Har'El
2011-01-27 8:40 ` [PATCH 20/29] nVMX: Deciding if L0 or L1 should handle an L2 exit Nadav Har'El
2011-01-27 8:40 ` [PATCH 21/29] nVMX: Correct handling of interrupt injection Nadav Har'El
2011-01-27 8:41 ` [PATCH 22/29] nVMX: Correct handling of exception injection Nadav Har'El
2011-01-27 8:41 ` [PATCH 23/29] nVMX: Correct handling of idt vectoring info Nadav Har'El
2011-01-27 8:42 ` [PATCH 24/29] nVMX: Handling of CR0 and CR4 modifying instructions Nadav Har'El
2011-01-27 8:42 ` [PATCH 25/29] nVMX: Further fixes for lazy FPU loading Nadav Har'El
2011-01-27 8:43 ` Nadav Har'El [this message]
2011-01-27 8:43 ` [PATCH 27/29] nVMX: Add VMX to list of supported cpuid features Nadav Har'El
2011-01-27 8:44 ` [PATCH 28/29] nVMX: Miscellenous small corrections Nadav Har'El
2011-01-27 8:44 ` [PATCH 29/29] nVMX: Documentation Nadav Har'El
2011-01-28 8:41 ` [PATCH 0/29] nVMX: Nested VMX, v8 Juerg Haefliger
2011-01-28 17:16 ` Nadav Har'El
2011-01-31 10:07 ` Nadav Har'El
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