All of lore.kernel.org
 help / color / mirror / Atom feed
* RE: Xen security advisory CVE-2011-1898 - VT-d (PCI passthrough) MSI
@ 2011-05-17  7:42 Jan Beulich
  2011-05-17 22:52 ` Cihula, Joseph
  0 siblings, 1 reply; 38+ messages in thread
From: Jan Beulich @ 2011-05-17  7:42 UTC (permalink / raw)
  To: Ian.Campbell, joseph.cihula; +Cc: xen-devel


[-- Attachment #1.1: Type: text/plain, Size: 1866 bytes --]

>>> "Cihula, Joseph"  05/16/11 11:34 PM >>>
>IOMMU adds security capabilities.  IR adds additional security capabilities.  IOMMU allows for fully isolating the hypervisor
>from domains even if the domains control DMA devices.  It helps to protect against buggy drivers or device FW by limiting
>the areas such bugs can affect to just the DMA data buffers.  IOMMU, in conjunction with Intel(R) Trusted Execution
>Technology (TXT), provides DMA protection through the entire launch process and into runtime.  This is all true regardless
>of the presence of IR.  IR adds the ability to prevent DoS attacks by untrusted domains with assigned DMA devices,
>malicious device FW, etc.  This is incremental--not all or nothing.

I think this is the problem - you're saying things like "fully isolating" and "regardless of the presence of IR", while the paper they made accessible meanwhile makes clear that neither is true. Thus the mere presence of DMA protection creates false expectation of customers - without IR (and with MSI supported by the system, not necessarily the device passed through) there's no way for isolation to become complete (actually, with non-MSI-capable devices or by disallowing MSI altogether on capable ones, depending of whether MSI writes bypass the IOMMU or simply get 1:1 translated, it could be possible to make this secure).

>The 00-block-msis-on-trap-vectors patch (esp. in conjunction with TXT) prevents all known security exploits of MSI misuse.

All? Not really, just a very small subset, and only partially. The SIPI one is perhaps the worst case (not prevented by this patch), but being able to send SMI or NMI perhaps isn't much better (as long as we're considering DoS attacks to also be a problem, which at least I do, and in which case said patch only converts from one [worse] to another ["better"] evil).

Jan


[-- Attachment #1.2: HTML --]
[-- Type: text/html, Size: 2186 bytes --]

[-- Attachment #2: Type: text/plain, Size: 138 bytes --]

_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xensource.com
http://lists.xensource.com/xen-devel

^ permalink raw reply	[flat|nested] 38+ messages in thread
* Xen security advisory CVE-2011-1898 - VT-d (PCI passthrough) MSI
@ 2011-05-12 13:48 Ian Jackson
  2011-05-12 13:49 ` Ian Jackson
                   ` (3 more replies)
  0 siblings, 4 replies; 38+ messages in thread
From: Ian Jackson @ 2011-05-12 13:48 UTC (permalink / raw)
  To: xen-devel

[-- Attachment #1: message body text --]
[-- Type: text/plain, Size: 4521 bytes --]

-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1

             Xen security advisory CVE-2011-1898
           VT-d (PCI passthrough) MSI trap injection

ISSUE DESCRIPTION
=================

Intel VT-d chipsets without interrupt remapping do not prevent a guest
which owns a PCI device from using DMA to generate MSI interrupts by
writing to the interrupt injection registers.  This can be exploited
to inject traps and gain control of the host.


VULNERABLE SYSTEMS
==================

You are not vulnerable if you do not use "PCI passthrough".  That is,
if you do not pass actual PCI devices (eg, graphics and network
controllers) through to guests, for use by PCI device drivers in the
guest.

In Xen with xend/xm or with xl this would be enabled by the "pci="
option in the domain config file, or by using the "xl pci-attach" or
"xm pci-attach" management command; if you do not use these features,
you are not vulnerable.

You are not vulnerable if you are using PCI passthrough, but are not
using Intel VT-d or AMD-Vi (aka "iommu") to attempt to prevent escape
by guest DMA.  This is because in such a configuration, privilege
escalation and denial of service are possible by guests anyway, and
the present issue does not make the situation any worse.

You are vulnerable if you use Intel VT-d to pass PCI devices through
to untrusted guests, unless your have interrupt remapping supported
and enabled.  This is the case whether you are using Xen, KVM, or
another virtualisation system.

Interrupt remapping is available in newer Intel VT-d chipsets.


IMPACT
======

A guest given a PCI passthrough device can escalate its privilege and
gain control of the whole system.


MITIGATION AND RESOLUTION
=========================

No complete software fix is available but we understand that Intel has
addressed this issue with newer hardware.

We believe a patch along the lines of the one attached can be applied
to Xen to reduce the impact to a denial of service.  Even with such a
patch, a guest can still cause a complete system crash or resource
starvation.

Upgrading to recent hardware that is interrupt remapping capable will
resolve the remaining denial of service issues.  Support for interrupt
remapping, when the hardware is capable, is present in all currently
maintained versions of Xen.

On such recent hardware, when passing pci devices through to untrusted
guests, we recommend the use of the "iommu=required" Xen command line
boot option and the second atttached patch, to avoid unknowingly
booting into a vulnerable configuration.


REFERENCES
==========

Thanks to Rafal Wojtczuk and Joanna Rutkowska of Invisible Things Lab
for bringing this issue to our attention.  Their paper on the attack
will soon be available from Invisible Things Lab, at
www.invisiblethingslab.com.

Information regarding chipset versions and interrupt remapping support
should be available from Intel; please use your usual support and
security response channels at Intel.

We believe that this vulnerability exists with all virtualisation
systems which aim to support passing pci devices through to
untrusted guests, on the affected Intel hardware.  If you are using
a hypervisor other than Xen please refer to your hypervisor's usual
security support and advisory release channels.


PATCHES
=======

The first patch is intended to reduce the impact from full privilege
escalation to denial of service.
 Filename: 00-block-msis-on-trap-vectors
 SHA1: 0fcc1914714c228e98b3e84597e06cb5de09003c
 SHA256: 998e8d5632ee6ad92f52796fe94923f9c38096c5adf2ca74209a6792436ea1e9

The second patch is intended to ensure that when Xen boots with
"iommu=required" it will also insist that interrupt remapping is
supported and enabled.  It arranges that booting with that option on
vulnerable hardware will fail, rather than appearing to succeed but
actually being vulnerable to guests.
 Filename: intremap05033.patch
 SHA1: 1cd26adc5ead0c07b67bf354f03164235d67395c
 SHA256: 7f8c7d95d33bbd5c4f25671b380e70020fda1ba6cb50b67e59131fa8e59c1c66

Unfortunately we have not been able to test either patch.  Both will
be applied to xen-unstable very soon.  We also intend to provide
backports in the supported released Xen trees.

-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.9 (GNU/Linux)

iJwEAQECAAYFAk3L5JUACgkQQz2i6ICVfYMh9wP/S/D3xN48bKBM2sBNuO08Hqhy
0ViFGdgZGs3p5EbRCIRTGe6YZonh8oIJi/JSxevd5WD7gDeV+8Dfr4in/gKXWThI
6kyJCzMZdJeB4ecJsX64sKS9pShJT39J1RAoeLeEGiPahO1Id6UySyF23xoF0R0E
7RpPPfG5lxS0xwdQO4M=
=yfWW
-----END PGP SIGNATURE-----


[-- Attachment #2: mitigation patch for old hardware --]
[-- Type: application/octet-stream, Size: 4213 bytes --]

# HG changeset patch
# User Keir Fraser <keir@xen.org>
# Date 1304332766 -3600
# Node ID 0bc9f306cb5222f39b0edcc830fb75d796ef146e
# Parent  24346f749826275540ab7bc95980355ec96c8cf8
x86, vtd: Protect against malicious MSIs from untrusted devices.

In the absence of VT-d interrupt remapping support, a device can send
arbitrary APIC messages to host CPUs. One class of attack that results
is to confuse the hypervisor by delivering asynchronous interrupts to
vectors that are expected to handle only synchronous
traps/exceptions.

We block this class of attack by:
(1) setting APIC.TPR=0x10, to block all interrupts below vector
0x20. This blocks delivery to all architectural exception vectors.
(2) checking APIC.ISR[vec] for vectors 0x80 (fast syscall) and 0x82
(hypercall). In these cases we BUG if we detect we are handling a
hardware interrupt -- turning a potentially more severe infiltration
into a straightforward system crash (i.e, DoS).

Thanks to Invisible Things Lab <http://www.invisiblethingslab.com>
for discovery and detailed investigation of this attack.

Signed-off-by: Keir Fraser <keir@xen.org>

diff -r 24346f749826 -r 0bc9f306cb52 xen/arch/x86/apic.c
--- a/xen/arch/x86/apic.c	Sun May 01 13:17:44 2011 +0100
+++ b/xen/arch/x86/apic.c	Mon May 02 11:39:26 2011 +0100
@@ -560,12 +560,9 @@
     init_apic_ldr();
 
     /*
-     * Set Task Priority to 'accept all'. We never change this
-     * later on.
+     * Set Task Priority to reject any interrupts below FIRST_DYNAMIC_VECTOR.
      */
-    value = apic_read(APIC_TASKPRI);
-    value &= ~APIC_TPRI_MASK;
-    apic_write_around(APIC_TASKPRI, value);
+    apic_write_around(APIC_TASKPRI, (FIRST_DYNAMIC_VECTOR & 0xF0) - 0x10);
 
     /*
      * After a crash, we no longer service the interrupts and a pending
@@ -1439,3 +1436,9 @@
 
     return 0;
 }
+
+void check_for_unexpected_msi(unsigned int vector)
+{
+    unsigned long v = apic_read(APIC_ISR + ((vector & ~0x1f) >> 1));
+    BUG_ON(v & (1 << (vector & 0x1f)));
+}
diff -r 24346f749826 -r 0bc9f306cb52 xen/arch/x86/x86_64/compat/entry.S
--- a/xen/arch/x86/x86_64/compat/entry.S	Sun May 01 13:17:44 2011 +0100
+++ b/xen/arch/x86/x86_64/compat/entry.S	Mon May 02 11:39:26 2011 +0100
@@ -10,12 +10,22 @@
 #include <asm/page.h>
 #include <asm/desc.h>
 #include <public/xen.h>
+#include <irq_vectors.h>
 
         ALIGN
 ENTRY(compat_hypercall)
         pushq $0
         movl  $TRAP_syscall,4(%rsp)
         SAVE_ALL
+
+        cmpb  $0,untrusted_msi(%rip)
+UNLIKELY_START(ne, msi_check)
+        movl  $HYPERCALL_VECTOR,%edi
+        call  check_for_unexpected_msi
+        RESTORE_ALL
+        SAVE_ALL
+UNLIKELY_END(msi_check)
+
         GET_CURRENT(%rbx)
 
         cmpl  $NR_hypercalls,%eax
diff -r 24346f749826 -r 0bc9f306cb52 xen/arch/x86/x86_64/entry.S
--- a/xen/arch/x86/x86_64/entry.S	Sun May 01 13:17:44 2011 +0100
+++ b/xen/arch/x86/x86_64/entry.S	Mon May 02 11:39:26 2011 +0100
@@ -297,6 +297,14 @@
         pushq $0
         SAVE_ALL
 
+        cmpb  $0,untrusted_msi(%rip)
+UNLIKELY_START(ne, msi_check)
+        movl  $0x80,%edi
+        call  check_for_unexpected_msi
+        RESTORE_ALL
+        SAVE_ALL
+UNLIKELY_END(msi_check)
+
         GET_CURRENT(%rbx)
 
         /* Check that the callback is non-null. */
diff -r 24346f749826 -r 0bc9f306cb52 xen/drivers/passthrough/vtd/iommu.c
--- a/xen/drivers/passthrough/vtd/iommu.c	Sun May 01 13:17:44 2011 +0100
+++ b/xen/drivers/passthrough/vtd/iommu.c	Mon May 02 11:39:26 2011 +0100
@@ -45,6 +45,9 @@
 #define nr_ioapics              iosapic_get_nr_iosapics()
 #endif
 
+/* Possible unfiltered LAPIC/MSI messages from untrusted sources? */
+bool_t __read_mostly untrusted_msi;
+
 int nr_iommus;
 
 static void setup_dom0_devices(struct domain *d);
@@ -1579,6 +1582,14 @@
     if (!pdev)
         return -ENODEV;
 
+    /*
+     * Devices assigned to untrusted domains (here assumed to be any domU)
+     * can attempt to send arbitrary LAPIC/MSI messages. We are unprotected
+     * by the root complex unless interrupt remapping is enabled.
+     */
+    if ( (target != dom0) && !iommu_intremap )
+        untrusted_msi = 1;
+
     ret = domain_context_unmap(source, bus, devfn);
     if ( ret )
         return ret;

[-- Attachment #3: assurance patch for new hardware --]
[-- Type: application/octet-stream, Size: 1035 bytes --]

diff -r 2f08c89b767d xen/drivers/passthrough/vtd/iommu.c
--- a/xen/drivers/passthrough/vtd/iommu.c	Wed Apr 20 17:13:08 2011 +0100
+++ b/xen/drivers/passthrough/vtd/iommu.c	Tue May 03 16:54:24 2011 -0700
@@ -1960,6 +1960,8 @@ static int init_vtd_hw(void)
                     "ioapic_to_iommu: ioapic 0x%x (id: 0x%x) is NULL! "
                     "Will not try to enable Interrupt Remapping.\n",
                     apic, IO_APIC_ID(apic));
+                if ( force_iommu )
+                    panic("intremap remapping failed to enable with iommu=required/force in grub\n");
                 break;
             }
         }
@@ -1973,6 +1975,9 @@ static int init_vtd_hw(void)
             {
                 dprintk(XENLOG_WARNING VTDPREFIX,
                         "Interrupt Remapping not enabled\n");
+
+                if ( force_iommu && platform_supports_intremap() )
+                    panic("intremap remapping failed to enable with iommu=required/force in grub\n");
                 break;
             }
         }

[-- Attachment #4: Type: text/plain, Size: 138 bytes --]

_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xensource.com
http://lists.xensource.com/xen-devel

^ permalink raw reply	[flat|nested] 38+ messages in thread

end of thread, other threads:[~2011-06-01 18:06 UTC | newest]

Thread overview: 38+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2011-05-17  7:42 Xen security advisory CVE-2011-1898 - VT-d (PCI passthrough) MSI Jan Beulich
2011-05-17 22:52 ` Cihula, Joseph
2011-05-18  8:54   ` Ian Campbell
2011-05-19 20:48     ` Cihula, Joseph
2011-05-20 10:17       ` Tim Deegan
2011-05-20 16:02         ` Cihula, Joseph
2011-05-22 18:14           ` Tim Deegan
2011-05-23 21:35             ` Cihula, Joseph
2011-05-24  9:03               ` Tim Deegan
2011-05-24 16:56               ` Ian Jackson
2011-05-24 19:23                 ` Cihula, Joseph
2011-05-25 10:13                   ` Xen security advisory CVE-2011-1898 - VT-d (PCI passthrough) MSI [and 2 more messages] Ian Jackson
2011-06-01 18:06                     ` Cihula, Joseph
2011-05-25 10:46                   ` Xen security advisory CVE-2011-1898 - VT-d (PCI passthrough) MSI Alan Cox
2011-05-20 17:19         ` Ian Jackson
2011-05-22 18:15           ` Tim Deegan
2011-05-23  9:02             ` Ian Campbell
2011-05-24 15:15               ` Ian Jackson
2011-05-24 15:57                 ` Keir Fraser
2011-05-24 16:16                   ` Ian Pratt
2011-05-24 17:14                     ` Ian Jackson
2011-05-24 19:35                       ` Cihula, Joseph
  -- strict thread matches above, loose matches on Subject: below --
2011-05-12 13:48 Ian Jackson
2011-05-12 13:49 ` Ian Jackson
2011-05-13  8:08 ` Jan Beulich
2011-05-13 11:08   ` Joanna Rutkowska
2011-05-13 11:11     ` Ian Campbell
2011-05-13 11:20       ` Joanna Rutkowska
2011-05-13 12:34         ` Jan Beulich
2011-05-13 12:29     ` Jan Beulich
2011-05-13 12:50       ` Tim Deegan
2011-05-13 10:25 ` Ian Campbell
2011-05-16 21:34   ` Cihula, Joseph
2011-05-18  8:53     ` Ian Campbell
2011-05-18 10:03       ` Keir Fraser
2011-05-18 10:06         ` Ian Campbell
2011-05-13 17:32 ` Joanna Rutkowska
2011-05-13 17:35   ` Joanna Rutkowska

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.