* PEBS availability
@ 2011-05-24 15:49 Pádraig Brady
2011-05-24 17:26 ` David Ahern
2011-05-24 20:37 ` Arun Sharma
0 siblings, 2 replies; 5+ messages in thread
From: Pádraig Brady @ 2011-05-24 15:49 UTC (permalink / raw)
To: linux-perf-users
Hi,
I've just got a shiny new i3-2310M and am a
bit surprised that `perf` isn't listing
detailed stats like L1 cache misses etc.
$ perf stat true
Performance counter stats for 'true':
1,239 cache-misses # 1.555 M/sec
9,314 cache-references # 11.693 M/sec
3,940 branch-misses # 4.871 %
80,885 branches # 101.546 M/sec
403,808 instructions # 0.000 IPC
<not counted> cycles
81 page-faults # 0.102 M/sec
0 CPU-migrations # 0.000 M/sec
1 context-switches # 0.001 M/sec
0.796537 task-clock-msecs # 0.032 CPUs
0.024654938 seconds time elapsed
I searched for a while but found it _very_ difficult
to find info on what was available on particular intel CPUs.
I did see in the "Nehalem Core PMU programming guide":
http://software.intel.com/file/30320
that the above stats are core features and that the other
counters I mentioned are PEBS (Precise Event Based Sampling)
and are not available on all systems.
So am I out of look with my new i3 sandy bridge CPU?
Are PEBS restricted to i7 versions only?
Is this documented anywhere?
Maybe I need some kernel support as hinted at by:
http://lwn.net/Articles/430100/
My kernel is 2.6.38.6-27.fc15.x86_64
cheers.
Pádraig.
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: PEBS availability
2011-05-24 15:49 PEBS availability Pádraig Brady
@ 2011-05-24 17:26 ` David Ahern
2011-05-24 20:37 ` Arun Sharma
1 sibling, 0 replies; 5+ messages in thread
From: David Ahern @ 2011-05-24 17:26 UTC (permalink / raw)
To: Pádraig Brady; +Cc: linux-perf-users
On 05/24/11 09:49, Pádraig Brady wrote:
> Hi,
>
> I've just got a shiny new i3-2310M and am a
> bit surprised that `perf` isn't listing
> detailed stats like L1 cache misses etc.
'perf list | grep Hardware' will show you counters recognized by perf
(perhaps with F15, "perf list hw" works). You can add more counters
using the -e option.
You might also want to try 2.6.39 kernel and upstream version of perf.
Ingo added a number of default counters to perf stat.
David
>
> $ perf stat true
>
> Performance counter stats for 'true':
>
> 1,239 cache-misses # 1.555 M/sec
> 9,314 cache-references # 11.693 M/sec
> 3,940 branch-misses # 4.871 %
> 80,885 branches # 101.546 M/sec
> 403,808 instructions # 0.000 IPC
> <not counted> cycles
> 81 page-faults # 0.102 M/sec
> 0 CPU-migrations # 0.000 M/sec
> 1 context-switches # 0.001 M/sec
> 0.796537 task-clock-msecs # 0.032 CPUs
>
> 0.024654938 seconds time elapsed
>
> I searched for a while but found it _very_ difficult
> to find info on what was available on particular intel CPUs.
>
> I did see in the "Nehalem Core PMU programming guide":
> http://software.intel.com/file/30320
> that the above stats are core features and that the other
> counters I mentioned are PEBS (Precise Event Based Sampling)
> and are not available on all systems.
>
> So am I out of look with my new i3 sandy bridge CPU?
> Are PEBS restricted to i7 versions only?
> Is this documented anywhere?
>
> Maybe I need some kernel support as hinted at by:
> http://lwn.net/Articles/430100/
> My kernel is 2.6.38.6-27.fc15.x86_64
>
> cheers.
> Pádraig.
> --
> To unsubscribe from this list: send the line "unsubscribe linux-perf-users" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: PEBS availability
2011-05-24 15:49 PEBS availability Pádraig Brady
2011-05-24 17:26 ` David Ahern
@ 2011-05-24 20:37 ` Arun Sharma
2011-05-25 8:33 ` Pádraig Brady
2011-05-27 10:13 ` Pádraig Brady
1 sibling, 2 replies; 5+ messages in thread
From: Arun Sharma @ 2011-05-24 20:37 UTC (permalink / raw)
To: Pádraig Brady; +Cc: linux-perf-users
On Tue, May 24, 2011 at 04:49:27PM +0100, Pádraig Brady wrote:
>
> So am I out of look with my new i3 sandy bridge CPU?
> Are PEBS restricted to i7 versions only?
> Is this documented anywhere?
i3 and i7 are marketing terms that don't mean much.
Engineers care more about the output of:
#!/usr/bin/env python
import struct
def cpuid(eax):
f = open("/dev/cpu/0/cpuid", "rb")
f.seek(eax)
data = f.read(16)
f.close()
return struct.unpack('IIII', data)
print "%x" % cpuid(1)[0]
>
> Maybe I need some kernel support as hinted at by:
> http://lwn.net/Articles/430100/
> My kernel is 2.6.38.6-27.fc15.x86_64
Your kernel probably has support for most of PEBS. What's missing is
support in user space for all the events in manuals.
http://thread.gmane.org/gmane.comp.linux.perfmon2.devel/2912
Kernel is still missing:
* Ability to dump all of x86 architectural state to perf.data on an
event
* Uncore events
* Exposing offcore events to userspace
http://lwn.net/Articles/441209/ has a summary of recent discussions on
this topic.
-Arun
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: PEBS availability
2011-05-24 20:37 ` Arun Sharma
@ 2011-05-25 8:33 ` Pádraig Brady
2011-05-27 10:13 ` Pádraig Brady
1 sibling, 0 replies; 5+ messages in thread
From: Pádraig Brady @ 2011-05-25 8:33 UTC (permalink / raw)
To: Arun Sharma; +Cc: linux-perf-users
On 24/05/11 21:37, Arun Sharma wrote:
> On Tue, May 24, 2011 at 04:49:27PM +0100, Pádraig Brady wrote:
>>
>> So am I out of look with my new i3 sandy bridge CPU?
>> Are PEBS restricted to i7 versions only?
>> Is this documented anywhere?
>
> i3 and i7 are marketing terms that don't mean much.
> Engineers care more about the output of:
>
> #!/usr/bin/env python
>
> import struct
>
> def cpuid(eax):
> f = open("/dev/cpu/0/cpuid", "rb")
> f.seek(eax)
> data = f.read(16)
> f.close()
> return struct.unpack('IIII', data)
>
> print "%x" % cpuid(1)[0]
206a7
>> Maybe I need some kernel support as hinted at by:
>> http://lwn.net/Articles/430100/
>> My kernel is 2.6.38.6-27.fc15.x86_64
>
> Your kernel probably has support for most of PEBS. What's missing is
> support in user space for all the events in manuals.
>
> http://thread.gmane.org/gmane.comp.linux.perfmon2.devel/2912
>
> Kernel is still missing:
>
> * Ability to dump all of x86 architectural state to perf.data on an
> event
> * Uncore events
> * Exposing offcore events to userspace
>
> http://lwn.net/Articles/441209/ has a summary of recent discussions on
> this topic.
Excellent. I'll start digging from there.
cheers,
Pádraig.
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: PEBS availability
2011-05-24 20:37 ` Arun Sharma
2011-05-25 8:33 ` Pádraig Brady
@ 2011-05-27 10:13 ` Pádraig Brady
1 sibling, 0 replies; 5+ messages in thread
From: Pádraig Brady @ 2011-05-27 10:13 UTC (permalink / raw)
To: linux-perf-users
On 24/05/11 21:37, Arun Sharma wrote:
> On Tue, May 24, 2011 at 04:49:27PM +0100, Pádraig Brady wrote:
>>
>> So am I out of look with my new i3 sandy bridge CPU?
>> Are PEBS restricted to i7 versions only?
>> Is this documented anywhere?
>
> i3 and i7 are marketing terms that don't mean much.
> Engineers care more about the output of:
>
> #!/usr/bin/env python
>
> import struct
>
> def cpuid(eax):
> f = open("/dev/cpu/0/cpuid", "rb")
> f.seek(eax)
> data = f.read(16)
> f.close()
> return struct.unpack('IIII', data)
>
> print "%x" % cpuid(1)[0]
>
>>
>> Maybe I need some kernel support as hinted at by:
>> http://lwn.net/Articles/430100/
>> My kernel is 2.6.38.6-27.fc15.x86_64
>
> Your kernel probably has support for most of PEBS. What's missing is
> support in user space for all the events in manuals.
>
> http://thread.gmane.org/gmane.comp.linux.perfmon2.devel/2912
Well that was easy.
My Fedora 15 kernel was missing support for sandy bridge PEBS,
and creating a new bzImage with the patch I referenced makes
the counters available:
old-kern:$ perf stat -e L1-dcache-loads true
Error: L1-dcache-loads event is not supported.
Fatal: Not all events could be opened.
new-kern:$ perf stat -e L1-dcache-loads true
98,331 L1-dcache-loads
cheers,
Pádraig.
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2011-05-27 10:15 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
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2011-05-24 15:49 PEBS availability Pádraig Brady
2011-05-24 17:26 ` David Ahern
2011-05-24 20:37 ` Arun Sharma
2011-05-25 8:33 ` Pádraig Brady
2011-05-27 10:13 ` Pádraig Brady
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